Commit | Line | Data |
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252b5132 | 1 | /* Instruction printing code for the AMD 29000 |
56da5fed | 2 | Copyright 1990, 1993, 1994, 1995, 1998, 2000, 2001, 2002 |
060d22b0 | 3 | Free Software Foundation, Inc. |
252b5132 RH |
4 | Contributed by Cygnus Support. Written by Jim Kingdon. |
5 | ||
47b0e7ad | 6 | This file is part of GDB and GNU Binutils. |
252b5132 | 7 | |
47b0e7ad NC |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
252b5132 | 12 | |
47b0e7ad NC |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
252b5132 | 17 | |
47b0e7ad NC |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
21 | MA 02110-1301, USA. */ | |
252b5132 | 22 | |
0d8dfecf | 23 | #include "sysdep.h" |
252b5132 RH |
24 | #include "dis-asm.h" |
25 | #include "opcode/a29k.h" | |
26 | ||
27 | /* Print a symbolic representation of a general-purpose | |
28 | register number NUM on STREAM. | |
29 | NUM is a number as found in the instruction, not as found in | |
30 | debugging symbols; it must be in the range 0-255. */ | |
47b0e7ad | 31 | |
252b5132 | 32 | static void |
47b0e7ad | 33 | print_general (int num, struct disassemble_info *info) |
252b5132 RH |
34 | { |
35 | if (num < 128) | |
36 | (*info->fprintf_func) (info->stream, "gr%d", num); | |
37 | else | |
38 | (*info->fprintf_func) (info->stream, "lr%d", num - 128); | |
39 | } | |
40 | ||
41 | /* Like print_general but a special-purpose register. | |
7fa108a4 | 42 | |
252b5132 RH |
43 | The mnemonics used by the AMD assembler are not quite the same |
44 | as the ones in the User's Manual. We use the ones that the | |
45 | assembler uses. */ | |
47b0e7ad | 46 | |
252b5132 | 47 | static void |
47b0e7ad | 48 | print_special (unsigned int num, struct disassemble_info *info) |
252b5132 RH |
49 | { |
50 | /* Register names of registers 0-SPEC0_NUM-1. */ | |
47b0e7ad NC |
51 | static char *spec0_names[] = |
52 | { | |
53 | "vab", "ops", "cps", "cfg", "cha", "chd", "chc", "rbp", "tmc", "tmr", | |
54 | "pc0", "pc1", "pc2", "mmu", "lru", "rsn", "rma0", "rmc0", "rma1", "rmc1", | |
55 | "spc0", "spc1", "spc2", "iba0", "ibc0", "iba1", "ibc1", "dba", "dbc", | |
56 | "cir", "cdr" | |
252b5132 RH |
57 | }; |
58 | #define SPEC0_NUM ((sizeof spec0_names) / (sizeof spec0_names[0])) | |
59 | ||
60 | /* Register names of registers 128-128+SPEC128_NUM-1. */ | |
47b0e7ad NC |
61 | static char *spec128_names[] = |
62 | { | |
63 | "ipc", "ipa", "ipb", "q", "alu", "bp", "fc", "cr" | |
252b5132 RH |
64 | }; |
65 | #define SPEC128_NUM ((sizeof spec128_names) / (sizeof spec128_names[0])) | |
66 | ||
67 | /* Register names of registers 160-160+SPEC160_NUM-1. */ | |
47b0e7ad NC |
68 | static char *spec160_names[] = |
69 | { | |
70 | "fpe", "inte", "fps", "sr163", "exop" | |
252b5132 RH |
71 | }; |
72 | #define SPEC160_NUM ((sizeof spec160_names) / (sizeof spec160_names[0])) | |
73 | ||
74 | if (num < SPEC0_NUM) | |
75 | (*info->fprintf_func) (info->stream, spec0_names[num]); | |
76 | else if (num >= 128 && num < 128 + SPEC128_NUM) | |
77 | (*info->fprintf_func) (info->stream, spec128_names[num-128]); | |
78 | else if (num >= 160 && num < 160 + SPEC160_NUM) | |
79 | (*info->fprintf_func) (info->stream, spec160_names[num-160]); | |
80 | else | |
81 | (*info->fprintf_func) (info->stream, "sr%d", num); | |
82 | } | |
83 | ||
84 | /* Is an instruction with OPCODE a delayed branch? */ | |
47b0e7ad | 85 | |
252b5132 | 86 | static int |
47b0e7ad | 87 | is_delayed_branch (int opcode) |
252b5132 RH |
88 | { |
89 | return (opcode == 0xa8 || opcode == 0xa9 || opcode == 0xa0 || opcode == 0xa1 | |
90 | || opcode == 0xa4 || opcode == 0xa5 | |
91 | || opcode == 0xb4 || opcode == 0xb5 | |
92 | || opcode == 0xc4 || opcode == 0xc0 | |
93 | || opcode == 0xac || opcode == 0xad | |
94 | || opcode == 0xcc); | |
95 | } | |
96 | ||
97 | /* Now find the four bytes of INSN and put them in *INSN{0,8,16,24}. */ | |
47b0e7ad | 98 | |
252b5132 | 99 | static void |
47b0e7ad NC |
100 | find_bytes_big (char *insn, |
101 | unsigned char *insn0, | |
102 | unsigned char *insn8, | |
103 | unsigned char *insn16, | |
104 | unsigned char *insn24) | |
252b5132 RH |
105 | { |
106 | *insn24 = insn[0]; | |
107 | *insn16 = insn[1]; | |
108 | *insn8 = insn[2]; | |
109 | *insn0 = insn[3]; | |
110 | } | |
111 | ||
112 | static void | |
47b0e7ad NC |
113 | find_bytes_little (char *insn, |
114 | unsigned char *insn0, | |
115 | unsigned char *insn8, | |
116 | unsigned char *insn16, | |
117 | unsigned char *insn24) | |
252b5132 RH |
118 | { |
119 | *insn24 = insn[3]; | |
120 | *insn16 = insn[2]; | |
121 | *insn8 = insn[1]; | |
122 | *insn0 = insn[0]; | |
123 | } | |
124 | ||
125 | typedef void (*find_byte_func_type) | |
47b0e7ad NC |
126 | (char *, unsigned char *, unsigned char *, |
127 | unsigned char *, unsigned char *); | |
252b5132 RH |
128 | |
129 | /* Print one instruction from MEMADDR on INFO->STREAM. | |
130 | Return the size of the instruction (always 4 on a29k). */ | |
131 | ||
132 | static int | |
47b0e7ad | 133 | print_insn (bfd_vma memaddr, struct disassemble_info *info) |
252b5132 RH |
134 | { |
135 | /* The raw instruction. */ | |
136 | char insn[4]; | |
137 | ||
138 | /* The four bytes of the instruction. */ | |
139 | unsigned char insn24, insn16, insn8, insn0; | |
140 | ||
141 | find_byte_func_type find_byte_func = (find_byte_func_type)info->private_data; | |
142 | ||
56da5fed | 143 | struct a29k_opcode const * opcode; |
252b5132 RH |
144 | |
145 | { | |
146 | int status = | |
147 | (*info->read_memory_func) (memaddr, (bfd_byte *) &insn[0], 4, info); | |
148 | if (status != 0) | |
149 | { | |
150 | (*info->memory_error_func) (status, memaddr, info); | |
151 | return -1; | |
152 | } | |
153 | } | |
154 | ||
155 | (*find_byte_func) (insn, &insn0, &insn8, &insn16, &insn24); | |
156 | ||
157 | printf ("%02x%02x%02x%02x ", insn24, insn16, insn8, insn0); | |
158 | ||
47b0e7ad NC |
159 | /* Handle the nop (aseq 0x40,gr1,gr1) specially. */ |
160 | if ( (insn24 == 0x70) | |
161 | && (insn16 == 0x40) | |
162 | && (insn8 == 0x01) | |
163 | && (insn0 == 0x01)) | |
164 | { | |
165 | (*info->fprintf_func) (info->stream,"nop"); | |
166 | return 4; | |
167 | } | |
252b5132 RH |
168 | |
169 | /* The opcode is always in insn24. */ | |
170 | for (opcode = &a29k_opcodes[0]; | |
171 | opcode < &a29k_opcodes[num_opcodes]; | |
172 | ++opcode) | |
173 | { | |
174 | if (((unsigned long) insn24 << 24) == opcode->opcode) | |
175 | { | |
176 | char *s; | |
7fa108a4 | 177 | |
252b5132 RH |
178 | (*info->fprintf_func) (info->stream, "%s ", opcode->name); |
179 | for (s = opcode->args; *s != '\0'; ++s) | |
180 | { | |
181 | switch (*s) | |
182 | { | |
183 | case 'a': | |
184 | print_general (insn8, info); | |
185 | break; | |
7fa108a4 | 186 | |
252b5132 RH |
187 | case 'b': |
188 | print_general (insn0, info); | |
189 | break; | |
190 | ||
191 | case 'c': | |
192 | print_general (insn16, info); | |
193 | break; | |
194 | ||
195 | case 'i': | |
196 | (*info->fprintf_func) (info->stream, "%d", insn0); | |
197 | break; | |
198 | ||
199 | case 'x': | |
47b0e7ad NC |
200 | (*info->fprintf_func) (info->stream, "0x%x", |
201 | (insn16 << 8) + insn0); | |
252b5132 RH |
202 | break; |
203 | ||
204 | case 'h': | |
205 | /* This used to be %x for binutils. */ | |
206 | (*info->fprintf_func) (info->stream, "0x%x", | |
47b0e7ad | 207 | (insn16 << 24) + (insn0 << 16)); |
252b5132 RH |
208 | break; |
209 | ||
210 | case 'X': | |
211 | (*info->fprintf_func) (info->stream, "%d", | |
47b0e7ad | 212 | ((insn16 << 8) + insn0) | 0xffff0000); |
252b5132 RH |
213 | break; |
214 | ||
215 | case 'P': | |
216 | /* This output looks just like absolute addressing, but | |
217 | maybe that's OK (it's what the GDB m68k and EBMON | |
218 | a29k disassemblers do). */ | |
219 | /* All the shifting is to sign-extend it. p*/ | |
220 | (*info->print_address_func) | |
221 | (memaddr + | |
222 | (((int)((insn16 << 10) + (insn0 << 2)) << 14) >> 14), | |
223 | info); | |
224 | break; | |
225 | ||
226 | case 'A': | |
227 | (*info->print_address_func) | |
228 | ((insn16 << 10) + (insn0 << 2), info); | |
229 | break; | |
230 | ||
231 | case 'e': | |
232 | (*info->fprintf_func) (info->stream, "%d", insn16 >> 7); | |
233 | break; | |
234 | ||
235 | case 'n': | |
236 | (*info->fprintf_func) (info->stream, "0x%x", insn16 & 0x7f); | |
237 | break; | |
238 | ||
239 | case 'v': | |
240 | (*info->fprintf_func) (info->stream, "0x%x", insn16); | |
241 | break; | |
242 | ||
243 | case 's': | |
244 | print_special (insn8, info); | |
245 | break; | |
246 | ||
247 | case 'u': | |
248 | (*info->fprintf_func) (info->stream, "%d", insn0 >> 7); | |
249 | break; | |
250 | ||
251 | case 'r': | |
252 | (*info->fprintf_func) (info->stream, "%d", (insn0 >> 4) & 7); | |
253 | break; | |
254 | ||
255 | case 'I': | |
256 | if ((insn16 & 3) != 0) | |
257 | (*info->fprintf_func) (info->stream, "%d", insn16 & 3); | |
258 | break; | |
259 | ||
260 | case 'd': | |
261 | (*info->fprintf_func) (info->stream, "%d", (insn0 >> 2) & 3); | |
262 | break; | |
263 | ||
264 | case 'f': | |
265 | (*info->fprintf_func) (info->stream, "%d", insn0 & 3); | |
266 | break; | |
267 | ||
268 | case 'F': | |
47b0e7ad NC |
269 | (*info->fprintf_func) (info->stream, "%d", |
270 | (insn16 >> 2) & 15); | |
252b5132 RH |
271 | break; |
272 | ||
273 | case 'C': | |
274 | (*info->fprintf_func) (info->stream, "%d", insn16 & 3); | |
275 | break; | |
276 | ||
277 | default: | |
278 | (*info->fprintf_func) (info->stream, "%c", *s); | |
279 | } | |
280 | } | |
281 | ||
282 | /* Now we look for a const,consth pair of instructions, | |
283 | in which case we try to print the symbolic address. */ | |
284 | if (insn24 == 2) /* consth */ | |
285 | { | |
286 | int errcode; | |
287 | char prev_insn[4]; | |
288 | unsigned char prev_insn0, prev_insn8, prev_insn16, prev_insn24; | |
7fa108a4 | 289 | |
252b5132 RH |
290 | errcode = (*info->read_memory_func) (memaddr - 4, |
291 | (bfd_byte *) &prev_insn[0], | |
292 | 4, | |
293 | info); | |
294 | if (errcode == 0) | |
295 | { | |
296 | /* If it is a delayed branch, we need to look at the | |
297 | instruction before the delayed brach to handle | |
298 | things like | |
7fa108a4 | 299 | |
252b5132 RH |
300 | const _foo |
301 | call _printf | |
302 | consth _foo | |
303 | */ | |
47b0e7ad NC |
304 | (*find_byte_func) (prev_insn, & prev_insn0, & prev_insn8, |
305 | & prev_insn16, & prev_insn24); | |
252b5132 RH |
306 | if (is_delayed_branch (prev_insn24)) |
307 | { | |
308 | errcode = (*info->read_memory_func) | |
47b0e7ad NC |
309 | (memaddr - 8, (bfd_byte *) & prev_insn[0], 4, info); |
310 | (*find_byte_func) (prev_insn, & prev_insn0, & prev_insn8, | |
311 | & prev_insn16, & prev_insn24); | |
252b5132 RH |
312 | } |
313 | } | |
7fa108a4 | 314 | |
252b5132 RH |
315 | /* If there was a problem reading memory, then assume |
316 | the previous instruction was not const. */ | |
317 | if (errcode == 0) | |
318 | { | |
319 | /* Is it const to the same register? */ | |
320 | if (prev_insn24 == 3 | |
321 | && prev_insn8 == insn8) | |
322 | { | |
323 | (*info->fprintf_func) (info->stream, "\t; "); | |
324 | (*info->print_address_func) | |
325 | (((insn16 << 24) + (insn0 << 16) | |
326 | + (prev_insn16 << 8) + (prev_insn0)), | |
327 | info); | |
328 | } | |
329 | } | |
330 | } | |
331 | ||
332 | return 4; | |
333 | } | |
334 | } | |
335 | /* This used to be %8x for binutils. */ | |
336 | (*info->fprintf_func) | |
337 | (info->stream, ".word 0x%08x", | |
338 | (insn24 << 24) + (insn16 << 16) + (insn8 << 8) + insn0); | |
339 | return 4; | |
340 | } | |
341 | ||
342 | /* Disassemble an big-endian a29k instruction. */ | |
47b0e7ad | 343 | |
252b5132 | 344 | int |
47b0e7ad | 345 | print_insn_big_a29k (bfd_vma memaddr, struct disassemble_info *info) |
252b5132 RH |
346 | { |
347 | info->private_data = (PTR) find_bytes_big; | |
348 | return print_insn (memaddr, info); | |
349 | } | |
350 | ||
351 | /* Disassemble a little-endian a29k instruction. */ | |
47b0e7ad | 352 | |
252b5132 | 353 | int |
47b0e7ad | 354 | print_insn_little_a29k (bfd_vma memaddr, struct disassemble_info *info) |
252b5132 RH |
355 | { |
356 | info->private_data = (PTR) find_bytes_little; | |
357 | return print_insn (memaddr, info); | |
358 | } |