ubsan: m32r: left shift of negative value
[deliverable/binutils-gdb.git] / opcodes / bpf-opc.c
CommitLineData
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1/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2/* Instruction opcode table for bpf.
3
4THIS FILE IS MACHINE GENERATED WITH CGEN.
5
b3adc24a 6Copyright (C) 1996-2020 Free Software Foundation, Inc.
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7
8This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9
10 This file is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
13 any later version.
14
15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
19
20 You should have received a copy of the GNU General Public License along
21 with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
23
24*/
25
26#include "sysdep.h"
27#include "ansidecl.h"
28#include "bfd.h"
29#include "symcat.h"
30#include "bpf-desc.h"
31#include "bpf-opc.h"
32#include "libiberty.h"
33
34/* -- opc.c */
35\f
36/* -- asm.c */
37/* The hash functions are recorded here to help keep assembler code out of
38 the disassembler and vice versa. */
39
40static int asm_hash_insn_p (const CGEN_INSN *);
41static unsigned int asm_hash_insn (const char *);
42static int dis_hash_insn_p (const CGEN_INSN *);
43static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
44
45/* Instruction formats. */
46
47#define F(f) & bpf_cgen_ifld_table[BPF_##f]
48static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
49 0, 0, 0x0, { { 0 } }
50};
51
52static const CGEN_IFMT ifmt_addile ATTRIBUTE_UNUSED = {
53 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
54};
55
56static const CGEN_IFMT ifmt_addrle ATTRIBUTE_UNUSED = {
57 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
58};
59
60static const CGEN_IFMT ifmt_negle ATTRIBUTE_UNUSED = {
61 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
62};
63
64static const CGEN_IFMT ifmt_addibe ATTRIBUTE_UNUSED = {
65 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
66};
67
68static const CGEN_IFMT ifmt_addrbe ATTRIBUTE_UNUSED = {
69 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
70};
71
72static const CGEN_IFMT ifmt_negbe ATTRIBUTE_UNUSED = {
73 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
74};
75
76static const CGEN_IFMT ifmt_endlele ATTRIBUTE_UNUSED = {
77 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
78};
79
80static const CGEN_IFMT ifmt_endlebe ATTRIBUTE_UNUSED = {
81 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
82};
83
84static const CGEN_IFMT ifmt_lddwle ATTRIBUTE_UNUSED = {
85 8, 128, 0xff, { { F (F_IMM64) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_DSTLE) }, { F (F_OP_CLASS) }, { 0 } }
86};
87
88static const CGEN_IFMT ifmt_lddwbe ATTRIBUTE_UNUSED = {
89 8, 128, 0xff, { { F (F_IMM64) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_SRCBE) }, { F (F_OP_CLASS) }, { 0 } }
90};
91
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92static const CGEN_IFMT ifmt_ldabsw ATTRIBUTE_UNUSED = {
93 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_REGS) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_OP_CLASS) }, { 0 } }
94};
95
96static const CGEN_IFMT ifmt_ldindwle ATTRIBUTE_UNUSED = {
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97 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_DSTLE) }, { F (F_OP_CLASS) }, { 0 } }
98};
99
3719fd55 100static const CGEN_IFMT ifmt_ldindwbe ATTRIBUTE_UNUSED = {
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101 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_SRCBE) }, { F (F_OP_CLASS) }, { 0 } }
102};
103
104static const CGEN_IFMT ifmt_ldxwle ATTRIBUTE_UNUSED = {
105 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_DSTLE) }, { F (F_OP_CLASS) }, { 0 } }
106};
107
108static const CGEN_IFMT ifmt_ldxwbe ATTRIBUTE_UNUSED = {
109 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_SRCBE) }, { F (F_OP_CLASS) }, { 0 } }
110};
111
112static const CGEN_IFMT ifmt_stble ATTRIBUTE_UNUSED = {
113 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_DSTLE) }, { F (F_OP_CLASS) }, { 0 } }
114};
115
116static const CGEN_IFMT ifmt_stbbe ATTRIBUTE_UNUSED = {
117 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_SRCBE) }, { F (F_OP_CLASS) }, { 0 } }
118};
119
120static const CGEN_IFMT ifmt_jeqile ATTRIBUTE_UNUSED = {
121 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
122};
123
124static const CGEN_IFMT ifmt_jeqrle ATTRIBUTE_UNUSED = {
125 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
126};
127
128static const CGEN_IFMT ifmt_jeqibe ATTRIBUTE_UNUSED = {
129 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
130};
131
132static const CGEN_IFMT ifmt_jeqrbe ATTRIBUTE_UNUSED = {
133 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
134};
135
136static const CGEN_IFMT ifmt_ja ATTRIBUTE_UNUSED = {
137 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_REGS) }, { F (F_OP_CODE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
138};
139
140static const CGEN_IFMT ifmt_call ATTRIBUTE_UNUSED = {
141 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_REGS) }, { F (F_OP_CODE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
142};
143
144static const CGEN_IFMT ifmt_exit ATTRIBUTE_UNUSED = {
145 8, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_REGS) }, { F (F_OP_CODE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
146};
147
148#undef F
149
150#define A(a) (1 << CGEN_INSN_##a)
151#define OPERAND(op) BPF_OPERAND_##op
152#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
153#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
154
155/* The instruction table. */
156
157static const CGEN_OPCODE bpf_cgen_insn_opcode_table[MAX_INSNS] =
158{
159 /* Special null first entry.
160 A `num' value of zero is thus invalid.
161 Also, the special `invalid' insn resides here. */
162 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
163/* add $dstle,$imm32 */
164 {
165 { 0, 0, 0, 0 },
166 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
167 & ifmt_addile, { 0x7 }
168 },
169/* add $dstle,$srcle */
170 {
171 { 0, 0, 0, 0 },
172 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
173 & ifmt_addrle, { 0xf }
174 },
175/* add32 $dstle,$imm32 */
176 {
177 { 0, 0, 0, 0 },
178 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
179 & ifmt_addile, { 0x4 }
180 },
181/* add32 $dstle,$srcle */
182 {
183 { 0, 0, 0, 0 },
184 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
185 & ifmt_addrle, { 0xc }
186 },
187/* sub $dstle,$imm32 */
188 {
189 { 0, 0, 0, 0 },
190 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
191 & ifmt_addile, { 0x17 }
192 },
193/* sub $dstle,$srcle */
194 {
195 { 0, 0, 0, 0 },
196 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
197 & ifmt_addrle, { 0x1f }
198 },
199/* sub32 $dstle,$imm32 */
200 {
201 { 0, 0, 0, 0 },
202 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
203 & ifmt_addile, { 0x14 }
204 },
205/* sub32 $dstle,$srcle */
206 {
207 { 0, 0, 0, 0 },
208 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
209 & ifmt_addrle, { 0x1c }
210 },
211/* mul $dstle,$imm32 */
212 {
213 { 0, 0, 0, 0 },
214 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
215 & ifmt_addile, { 0x27 }
216 },
217/* mul $dstle,$srcle */
218 {
219 { 0, 0, 0, 0 },
220 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
221 & ifmt_addrle, { 0x2f }
222 },
223/* mul32 $dstle,$imm32 */
224 {
225 { 0, 0, 0, 0 },
226 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
227 & ifmt_addile, { 0x24 }
228 },
229/* mul32 $dstle,$srcle */
230 {
231 { 0, 0, 0, 0 },
232 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
233 & ifmt_addrle, { 0x2c }
234 },
235/* div $dstle,$imm32 */
236 {
237 { 0, 0, 0, 0 },
238 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
239 & ifmt_addile, { 0x37 }
240 },
241/* div $dstle,$srcle */
242 {
243 { 0, 0, 0, 0 },
244 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
245 & ifmt_addrle, { 0x3f }
246 },
247/* div32 $dstle,$imm32 */
248 {
249 { 0, 0, 0, 0 },
250 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
251 & ifmt_addile, { 0x34 }
252 },
253/* div32 $dstle,$srcle */
254 {
255 { 0, 0, 0, 0 },
256 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
257 & ifmt_addrle, { 0x3c }
258 },
259/* or $dstle,$imm32 */
260 {
261 { 0, 0, 0, 0 },
262 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
263 & ifmt_addile, { 0x47 }
264 },
265/* or $dstle,$srcle */
266 {
267 { 0, 0, 0, 0 },
268 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
269 & ifmt_addrle, { 0x4f }
270 },
271/* or32 $dstle,$imm32 */
272 {
273 { 0, 0, 0, 0 },
274 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
275 & ifmt_addile, { 0x44 }
276 },
277/* or32 $dstle,$srcle */
278 {
279 { 0, 0, 0, 0 },
280 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
281 & ifmt_addrle, { 0x4c }
282 },
283/* and $dstle,$imm32 */
284 {
285 { 0, 0, 0, 0 },
286 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
287 & ifmt_addile, { 0x57 }
288 },
289/* and $dstle,$srcle */
290 {
291 { 0, 0, 0, 0 },
292 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
293 & ifmt_addrle, { 0x5f }
294 },
295/* and32 $dstle,$imm32 */
296 {
297 { 0, 0, 0, 0 },
298 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
299 & ifmt_addile, { 0x54 }
300 },
301/* and32 $dstle,$srcle */
302 {
303 { 0, 0, 0, 0 },
304 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
305 & ifmt_addrle, { 0x5c }
306 },
307/* lsh $dstle,$imm32 */
308 {
309 { 0, 0, 0, 0 },
310 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
311 & ifmt_addile, { 0x67 }
312 },
313/* lsh $dstle,$srcle */
314 {
315 { 0, 0, 0, 0 },
316 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
317 & ifmt_addrle, { 0x6f }
318 },
319/* lsh32 $dstle,$imm32 */
320 {
321 { 0, 0, 0, 0 },
322 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
323 & ifmt_addile, { 0x64 }
324 },
325/* lsh32 $dstle,$srcle */
326 {
327 { 0, 0, 0, 0 },
328 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
329 & ifmt_addrle, { 0x6c }
330 },
331/* rsh $dstle,$imm32 */
332 {
333 { 0, 0, 0, 0 },
334 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
335 & ifmt_addile, { 0x77 }
336 },
337/* rsh $dstle,$srcle */
338 {
339 { 0, 0, 0, 0 },
340 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
341 & ifmt_addrle, { 0x7f }
342 },
343/* rsh32 $dstle,$imm32 */
344 {
345 { 0, 0, 0, 0 },
346 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
347 & ifmt_addile, { 0x74 }
348 },
349/* rsh32 $dstle,$srcle */
350 {
351 { 0, 0, 0, 0 },
352 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
353 & ifmt_addrle, { 0x7c }
354 },
355/* mod $dstle,$imm32 */
356 {
357 { 0, 0, 0, 0 },
358 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
359 & ifmt_addile, { 0x97 }
360 },
361/* mod $dstle,$srcle */
362 {
363 { 0, 0, 0, 0 },
364 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
365 & ifmt_addrle, { 0x9f }
366 },
367/* mod32 $dstle,$imm32 */
368 {
369 { 0, 0, 0, 0 },
370 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
371 & ifmt_addile, { 0x94 }
372 },
373/* mod32 $dstle,$srcle */
374 {
375 { 0, 0, 0, 0 },
376 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
377 & ifmt_addrle, { 0x9c }
378 },
379/* xor $dstle,$imm32 */
380 {
381 { 0, 0, 0, 0 },
382 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
383 & ifmt_addile, { 0xa7 }
384 },
385/* xor $dstle,$srcle */
386 {
387 { 0, 0, 0, 0 },
388 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
389 & ifmt_addrle, { 0xaf }
390 },
391/* xor32 $dstle,$imm32 */
392 {
393 { 0, 0, 0, 0 },
394 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
395 & ifmt_addile, { 0xa4 }
396 },
397/* xor32 $dstle,$srcle */
398 {
399 { 0, 0, 0, 0 },
400 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
401 & ifmt_addrle, { 0xac }
402 },
403/* mov $dstle,$imm32 */
404 {
405 { 0, 0, 0, 0 },
406 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
407 & ifmt_addile, { 0xb7 }
408 },
409/* mov $dstle,$srcle */
410 {
411 { 0, 0, 0, 0 },
412 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
413 & ifmt_addrle, { 0xbf }
414 },
415/* mov32 $dstle,$imm32 */
416 {
417 { 0, 0, 0, 0 },
418 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
419 & ifmt_addile, { 0xb4 }
420 },
421/* mov32 $dstle,$srcle */
422 {
423 { 0, 0, 0, 0 },
424 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
425 & ifmt_addrle, { 0xbc }
426 },
427/* arsh $dstle,$imm32 */
428 {
429 { 0, 0, 0, 0 },
430 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
431 & ifmt_addile, { 0xc7 }
432 },
433/* arsh $dstle,$srcle */
434 {
435 { 0, 0, 0, 0 },
436 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
437 & ifmt_addrle, { 0xcf }
438 },
439/* arsh32 $dstle,$imm32 */
440 {
441 { 0, 0, 0, 0 },
442 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
443 & ifmt_addile, { 0xc4 }
444 },
445/* arsh32 $dstle,$srcle */
446 {
447 { 0, 0, 0, 0 },
448 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
449 & ifmt_addrle, { 0xcc }
450 },
451/* neg $dstle */
452 {
453 { 0, 0, 0, 0 },
454 { { MNEM, ' ', OP (DSTLE), 0 } },
455 & ifmt_negle, { 0x8f }
456 },
457/* neg32 $dstle */
458 {
459 { 0, 0, 0, 0 },
460 { { MNEM, ' ', OP (DSTLE), 0 } },
461 & ifmt_negle, { 0x8c }
462 },
463/* add $dstbe,$imm32 */
464 {
465 { 0, 0, 0, 0 },
466 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
467 & ifmt_addibe, { 0x7 }
468 },
469/* add $dstbe,$srcbe */
470 {
471 { 0, 0, 0, 0 },
472 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
473 & ifmt_addrbe, { 0xf }
474 },
475/* add32 $dstbe,$imm32 */
476 {
477 { 0, 0, 0, 0 },
478 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
479 & ifmt_addibe, { 0x4 }
480 },
481/* add32 $dstbe,$srcbe */
482 {
483 { 0, 0, 0, 0 },
484 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
485 & ifmt_addrbe, { 0xc }
486 },
487/* sub $dstbe,$imm32 */
488 {
489 { 0, 0, 0, 0 },
490 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
491 & ifmt_addibe, { 0x17 }
492 },
493/* sub $dstbe,$srcbe */
494 {
495 { 0, 0, 0, 0 },
496 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
497 & ifmt_addrbe, { 0x1f }
498 },
499/* sub32 $dstbe,$imm32 */
500 {
501 { 0, 0, 0, 0 },
502 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
503 & ifmt_addibe, { 0x14 }
504 },
505/* sub32 $dstbe,$srcbe */
506 {
507 { 0, 0, 0, 0 },
508 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
509 & ifmt_addrbe, { 0x1c }
510 },
511/* mul $dstbe,$imm32 */
512 {
513 { 0, 0, 0, 0 },
514 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
515 & ifmt_addibe, { 0x27 }
516 },
517/* mul $dstbe,$srcbe */
518 {
519 { 0, 0, 0, 0 },
520 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
521 & ifmt_addrbe, { 0x2f }
522 },
523/* mul32 $dstbe,$imm32 */
524 {
525 { 0, 0, 0, 0 },
526 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
527 & ifmt_addibe, { 0x24 }
528 },
529/* mul32 $dstbe,$srcbe */
530 {
531 { 0, 0, 0, 0 },
532 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
533 & ifmt_addrbe, { 0x2c }
534 },
535/* div $dstbe,$imm32 */
536 {
537 { 0, 0, 0, 0 },
538 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
539 & ifmt_addibe, { 0x37 }
540 },
541/* div $dstbe,$srcbe */
542 {
543 { 0, 0, 0, 0 },
544 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
545 & ifmt_addrbe, { 0x3f }
546 },
547/* div32 $dstbe,$imm32 */
548 {
549 { 0, 0, 0, 0 },
550 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
551 & ifmt_addibe, { 0x34 }
552 },
553/* div32 $dstbe,$srcbe */
554 {
555 { 0, 0, 0, 0 },
556 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
557 & ifmt_addrbe, { 0x3c }
558 },
559/* or $dstbe,$imm32 */
560 {
561 { 0, 0, 0, 0 },
562 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
563 & ifmt_addibe, { 0x47 }
564 },
565/* or $dstbe,$srcbe */
566 {
567 { 0, 0, 0, 0 },
568 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
569 & ifmt_addrbe, { 0x4f }
570 },
571/* or32 $dstbe,$imm32 */
572 {
573 { 0, 0, 0, 0 },
574 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
575 & ifmt_addibe, { 0x44 }
576 },
577/* or32 $dstbe,$srcbe */
578 {
579 { 0, 0, 0, 0 },
580 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
581 & ifmt_addrbe, { 0x4c }
582 },
583/* and $dstbe,$imm32 */
584 {
585 { 0, 0, 0, 0 },
586 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
587 & ifmt_addibe, { 0x57 }
588 },
589/* and $dstbe,$srcbe */
590 {
591 { 0, 0, 0, 0 },
592 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
593 & ifmt_addrbe, { 0x5f }
594 },
595/* and32 $dstbe,$imm32 */
596 {
597 { 0, 0, 0, 0 },
598 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
599 & ifmt_addibe, { 0x54 }
600 },
601/* and32 $dstbe,$srcbe */
602 {
603 { 0, 0, 0, 0 },
604 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
605 & ifmt_addrbe, { 0x5c }
606 },
607/* lsh $dstbe,$imm32 */
608 {
609 { 0, 0, 0, 0 },
610 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
611 & ifmt_addibe, { 0x67 }
612 },
613/* lsh $dstbe,$srcbe */
614 {
615 { 0, 0, 0, 0 },
616 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
617 & ifmt_addrbe, { 0x6f }
618 },
619/* lsh32 $dstbe,$imm32 */
620 {
621 { 0, 0, 0, 0 },
622 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
623 & ifmt_addibe, { 0x64 }
624 },
625/* lsh32 $dstbe,$srcbe */
626 {
627 { 0, 0, 0, 0 },
628 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
629 & ifmt_addrbe, { 0x6c }
630 },
631/* rsh $dstbe,$imm32 */
632 {
633 { 0, 0, 0, 0 },
634 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
635 & ifmt_addibe, { 0x77 }
636 },
637/* rsh $dstbe,$srcbe */
638 {
639 { 0, 0, 0, 0 },
640 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
641 & ifmt_addrbe, { 0x7f }
642 },
643/* rsh32 $dstbe,$imm32 */
644 {
645 { 0, 0, 0, 0 },
646 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
647 & ifmt_addibe, { 0x74 }
648 },
649/* rsh32 $dstbe,$srcbe */
650 {
651 { 0, 0, 0, 0 },
652 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
653 & ifmt_addrbe, { 0x7c }
654 },
655/* mod $dstbe,$imm32 */
656 {
657 { 0, 0, 0, 0 },
658 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
659 & ifmt_addibe, { 0x97 }
660 },
661/* mod $dstbe,$srcbe */
662 {
663 { 0, 0, 0, 0 },
664 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
665 & ifmt_addrbe, { 0x9f }
666 },
667/* mod32 $dstbe,$imm32 */
668 {
669 { 0, 0, 0, 0 },
670 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
671 & ifmt_addibe, { 0x94 }
672 },
673/* mod32 $dstbe,$srcbe */
674 {
675 { 0, 0, 0, 0 },
676 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
677 & ifmt_addrbe, { 0x9c }
678 },
679/* xor $dstbe,$imm32 */
680 {
681 { 0, 0, 0, 0 },
682 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
683 & ifmt_addibe, { 0xa7 }
684 },
685/* xor $dstbe,$srcbe */
686 {
687 { 0, 0, 0, 0 },
688 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
689 & ifmt_addrbe, { 0xaf }
690 },
691/* xor32 $dstbe,$imm32 */
692 {
693 { 0, 0, 0, 0 },
694 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
695 & ifmt_addibe, { 0xa4 }
696 },
697/* xor32 $dstbe,$srcbe */
698 {
699 { 0, 0, 0, 0 },
700 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
701 & ifmt_addrbe, { 0xac }
702 },
703/* mov $dstbe,$imm32 */
704 {
705 { 0, 0, 0, 0 },
706 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
707 & ifmt_addibe, { 0xb7 }
708 },
709/* mov $dstbe,$srcbe */
710 {
711 { 0, 0, 0, 0 },
712 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
713 & ifmt_addrbe, { 0xbf }
714 },
715/* mov32 $dstbe,$imm32 */
716 {
717 { 0, 0, 0, 0 },
718 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
719 & ifmt_addibe, { 0xb4 }
720 },
721/* mov32 $dstbe,$srcbe */
722 {
723 { 0, 0, 0, 0 },
724 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
725 & ifmt_addrbe, { 0xbc }
726 },
727/* arsh $dstbe,$imm32 */
728 {
729 { 0, 0, 0, 0 },
730 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
731 & ifmt_addibe, { 0xc7 }
732 },
733/* arsh $dstbe,$srcbe */
734 {
735 { 0, 0, 0, 0 },
736 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
737 & ifmt_addrbe, { 0xcf }
738 },
739/* arsh32 $dstbe,$imm32 */
740 {
741 { 0, 0, 0, 0 },
742 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
743 & ifmt_addibe, { 0xc4 }
744 },
745/* arsh32 $dstbe,$srcbe */
746 {
747 { 0, 0, 0, 0 },
748 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
749 & ifmt_addrbe, { 0xcc }
750 },
751/* neg $dstbe */
752 {
753 { 0, 0, 0, 0 },
754 { { MNEM, ' ', OP (DSTBE), 0 } },
755 & ifmt_negbe, { 0x8f }
756 },
757/* neg32 $dstbe */
758 {
759 { 0, 0, 0, 0 },
760 { { MNEM, ' ', OP (DSTBE), 0 } },
761 & ifmt_negbe, { 0x8c }
762 },
763/* endle $dstle,$endsize */
764 {
765 { 0, 0, 0, 0 },
766 { { MNEM, ' ', OP (DSTLE), ',', OP (ENDSIZE), 0 } },
767 & ifmt_endlele, { 0xd4 }
768 },
769/* endbe $dstle,$endsize */
770 {
771 { 0, 0, 0, 0 },
772 { { MNEM, ' ', OP (DSTLE), ',', OP (ENDSIZE), 0 } },
773 & ifmt_endlele, { 0xdc }
774 },
775/* endle $dstbe,$endsize */
776 {
777 { 0, 0, 0, 0 },
778 { { MNEM, ' ', OP (DSTBE), ',', OP (ENDSIZE), 0 } },
779 & ifmt_endlebe, { 0xd4 }
780 },
781/* endbe $dstbe,$endsize */
782 {
783 { 0, 0, 0, 0 },
784 { { MNEM, ' ', OP (DSTBE), ',', OP (ENDSIZE), 0 } },
785 & ifmt_endlebe, { 0xdc }
786 },
787/* lddw $dstle,$imm64 */
788 {
789 { 0, 0, 0, 0 },
790 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM64), 0 } },
791 & ifmt_lddwle, { 0x18 }
792 },
793/* lddw $dstbe,$imm64 */
794 {
795 { 0, 0, 0, 0 },
796 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM64), 0 } },
797 & ifmt_lddwbe, { 0x18 }
798 },
3719fd55 799/* ldabsw $imm32 */
79472b45
JM
800 {
801 { 0, 0, 0, 0 },
3719fd55
JM
802 { { MNEM, ' ', OP (IMM32), 0 } },
803 & ifmt_ldabsw, { 0x20 }
79472b45 804 },
3719fd55 805/* ldabsh $imm32 */
79472b45
JM
806 {
807 { 0, 0, 0, 0 },
3719fd55
JM
808 { { MNEM, ' ', OP (IMM32), 0 } },
809 & ifmt_ldabsw, { 0x28 }
79472b45 810 },
3719fd55 811/* ldabsb $imm32 */
79472b45
JM
812 {
813 { 0, 0, 0, 0 },
3719fd55
JM
814 { { MNEM, ' ', OP (IMM32), 0 } },
815 & ifmt_ldabsw, { 0x30 }
79472b45 816 },
3719fd55 817/* ldabsdw $imm32 */
79472b45
JM
818 {
819 { 0, 0, 0, 0 },
3719fd55
JM
820 { { MNEM, ' ', OP (IMM32), 0 } },
821 & ifmt_ldabsw, { 0x38 }
79472b45 822 },
92434a14 823/* ldindw $srcle,$imm32 */
79472b45
JM
824 {
825 { 0, 0, 0, 0 },
92434a14 826 { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
3719fd55 827 & ifmt_ldindwle, { 0x40 }
79472b45 828 },
92434a14 829/* ldindh $srcle,$imm32 */
79472b45
JM
830 {
831 { 0, 0, 0, 0 },
92434a14 832 { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
3719fd55 833 & ifmt_ldindwle, { 0x48 }
79472b45 834 },
92434a14 835/* ldindb $srcle,$imm32 */
79472b45
JM
836 {
837 { 0, 0, 0, 0 },
92434a14 838 { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
3719fd55 839 & ifmt_ldindwle, { 0x50 }
79472b45 840 },
92434a14 841/* ldinddw $srcle,$imm32 */
79472b45
JM
842 {
843 { 0, 0, 0, 0 },
92434a14 844 { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
3719fd55 845 & ifmt_ldindwle, { 0x58 }
79472b45 846 },
92434a14 847/* ldindw $srcbe,$imm32 */
79472b45
JM
848 {
849 { 0, 0, 0, 0 },
92434a14 850 { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
3719fd55 851 & ifmt_ldindwbe, { 0x40 }
79472b45 852 },
92434a14 853/* ldindh $srcbe,$imm32 */
79472b45
JM
854 {
855 { 0, 0, 0, 0 },
92434a14 856 { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
3719fd55 857 & ifmt_ldindwbe, { 0x48 }
79472b45 858 },
92434a14 859/* ldindb $srcbe,$imm32 */
79472b45
JM
860 {
861 { 0, 0, 0, 0 },
92434a14 862 { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
3719fd55 863 & ifmt_ldindwbe, { 0x50 }
79472b45 864 },
92434a14 865/* ldinddw $srcbe,$imm32 */
79472b45
JM
866 {
867 { 0, 0, 0, 0 },
92434a14 868 { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
3719fd55 869 & ifmt_ldindwbe, { 0x58 }
79472b45
JM
870 },
871/* ldxw $dstle,[$srcle+$offset16] */
872 {
873 { 0, 0, 0, 0 },
874 { { MNEM, ' ', OP (DSTLE), ',', '[', OP (SRCLE), '+', OP (OFFSET16), ']', 0 } },
875 & ifmt_ldxwle, { 0x61 }
876 },
877/* ldxh $dstle,[$srcle+$offset16] */
878 {
879 { 0, 0, 0, 0 },
880 { { MNEM, ' ', OP (DSTLE), ',', '[', OP (SRCLE), '+', OP (OFFSET16), ']', 0 } },
881 & ifmt_ldxwle, { 0x69 }
882 },
883/* ldxb $dstle,[$srcle+$offset16] */
884 {
885 { 0, 0, 0, 0 },
886 { { MNEM, ' ', OP (DSTLE), ',', '[', OP (SRCLE), '+', OP (OFFSET16), ']', 0 } },
887 & ifmt_ldxwle, { 0x71 }
888 },
889/* ldxdw $dstle,[$srcle+$offset16] */
890 {
891 { 0, 0, 0, 0 },
892 { { MNEM, ' ', OP (DSTLE), ',', '[', OP (SRCLE), '+', OP (OFFSET16), ']', 0 } },
893 & ifmt_ldxwle, { 0x79 }
894 },
895/* stxw [$dstle+$offset16],$srcle */
896 {
897 { 0, 0, 0, 0 },
898 { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } },
899 & ifmt_ldxwle, { 0x63 }
900 },
901/* stxh [$dstle+$offset16],$srcle */
902 {
903 { 0, 0, 0, 0 },
904 { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } },
905 & ifmt_ldxwle, { 0x6b }
906 },
907/* stxb [$dstle+$offset16],$srcle */
908 {
909 { 0, 0, 0, 0 },
910 { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } },
911 & ifmt_ldxwle, { 0x73 }
912 },
913/* stxdw [$dstle+$offset16],$srcle */
914 {
915 { 0, 0, 0, 0 },
916 { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } },
917 & ifmt_ldxwle, { 0x7b }
918 },
919/* ldxw $dstbe,[$srcbe+$offset16] */
920 {
921 { 0, 0, 0, 0 },
922 { { MNEM, ' ', OP (DSTBE), ',', '[', OP (SRCBE), '+', OP (OFFSET16), ']', 0 } },
923 & ifmt_ldxwbe, { 0x61 }
924 },
925/* ldxh $dstbe,[$srcbe+$offset16] */
926 {
927 { 0, 0, 0, 0 },
928 { { MNEM, ' ', OP (DSTBE), ',', '[', OP (SRCBE), '+', OP (OFFSET16), ']', 0 } },
929 & ifmt_ldxwbe, { 0x69 }
930 },
931/* ldxb $dstbe,[$srcbe+$offset16] */
932 {
933 { 0, 0, 0, 0 },
934 { { MNEM, ' ', OP (DSTBE), ',', '[', OP (SRCBE), '+', OP (OFFSET16), ']', 0 } },
935 & ifmt_ldxwbe, { 0x71 }
936 },
937/* ldxdw $dstbe,[$srcbe+$offset16] */
938 {
939 { 0, 0, 0, 0 },
940 { { MNEM, ' ', OP (DSTBE), ',', '[', OP (SRCBE), '+', OP (OFFSET16), ']', 0 } },
941 & ifmt_ldxwbe, { 0x79 }
942 },
943/* stxw [$dstbe+$offset16],$srcbe */
944 {
945 { 0, 0, 0, 0 },
946 { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } },
947 & ifmt_ldxwbe, { 0x63 }
948 },
949/* stxh [$dstbe+$offset16],$srcbe */
950 {
951 { 0, 0, 0, 0 },
952 { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } },
953 & ifmt_ldxwbe, { 0x6b }
954 },
955/* stxb [$dstbe+$offset16],$srcbe */
956 {
957 { 0, 0, 0, 0 },
958 { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } },
959 & ifmt_ldxwbe, { 0x73 }
960 },
961/* stxdw [$dstbe+$offset16],$srcbe */
962 {
963 { 0, 0, 0, 0 },
964 { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } },
965 & ifmt_ldxwbe, { 0x7b }
966 },
967/* stb [$dstle+$offset16],$imm32 */
968 {
969 { 0, 0, 0, 0 },
970 { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
971 & ifmt_stble, { 0x72 }
972 },
973/* sth [$dstle+$offset16],$imm32 */
974 {
975 { 0, 0, 0, 0 },
976 { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
977 & ifmt_stble, { 0x6a }
978 },
979/* stw [$dstle+$offset16],$imm32 */
980 {
981 { 0, 0, 0, 0 },
982 { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
983 & ifmt_stble, { 0x62 }
984 },
985/* stdw [$dstle+$offset16],$imm32 */
986 {
987 { 0, 0, 0, 0 },
988 { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
989 & ifmt_stble, { 0x7a }
990 },
991/* stb [$dstbe+$offset16],$imm32 */
992 {
993 { 0, 0, 0, 0 },
994 { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
995 & ifmt_stbbe, { 0x72 }
996 },
997/* sth [$dstbe+$offset16],$imm32 */
998 {
999 { 0, 0, 0, 0 },
1000 { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
1001 & ifmt_stbbe, { 0x6a }
1002 },
1003/* stw [$dstbe+$offset16],$imm32 */
1004 {
1005 { 0, 0, 0, 0 },
1006 { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
1007 & ifmt_stbbe, { 0x62 }
1008 },
1009/* stdw [$dstbe+$offset16],$imm32 */
1010 {
1011 { 0, 0, 0, 0 },
1012 { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
1013 & ifmt_stbbe, { 0x7a }
1014 },
1015/* jeq $dstle,$imm32,$disp16 */
1016 {
1017 { 0, 0, 0, 0 },
1018 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1019 & ifmt_jeqile, { 0x15 }
1020 },
1021/* jeq $dstle,$srcle,$disp16 */
1022 {
1023 { 0, 0, 0, 0 },
1024 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1025 & ifmt_jeqrle, { 0x1d }
1026 },
1027/* jgt $dstle,$imm32,$disp16 */
1028 {
1029 { 0, 0, 0, 0 },
1030 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1031 & ifmt_jeqile, { 0x25 }
1032 },
1033/* jgt $dstle,$srcle,$disp16 */
1034 {
1035 { 0, 0, 0, 0 },
1036 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1037 & ifmt_jeqrle, { 0x2d }
1038 },
1039/* jge $dstle,$imm32,$disp16 */
1040 {
1041 { 0, 0, 0, 0 },
1042 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1043 & ifmt_jeqile, { 0x35 }
1044 },
1045/* jge $dstle,$srcle,$disp16 */
1046 {
1047 { 0, 0, 0, 0 },
1048 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1049 & ifmt_jeqrle, { 0x3d }
1050 },
1051/* jlt $dstle,$imm32,$disp16 */
1052 {
1053 { 0, 0, 0, 0 },
1054 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1055 & ifmt_jeqile, { 0xa5 }
1056 },
1057/* jlt $dstle,$srcle,$disp16 */
1058 {
1059 { 0, 0, 0, 0 },
1060 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1061 & ifmt_jeqrle, { 0xad }
1062 },
1063/* jle $dstle,$imm32,$disp16 */
1064 {
1065 { 0, 0, 0, 0 },
1066 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1067 & ifmt_jeqile, { 0xb5 }
1068 },
1069/* jle $dstle,$srcle,$disp16 */
1070 {
1071 { 0, 0, 0, 0 },
1072 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1073 & ifmt_jeqrle, { 0xbd }
1074 },
1075/* jset $dstle,$imm32,$disp16 */
1076 {
1077 { 0, 0, 0, 0 },
1078 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1079 & ifmt_jeqile, { 0x45 }
1080 },
1081/* jset $dstle,$srcle,$disp16 */
1082 {
1083 { 0, 0, 0, 0 },
1084 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1085 & ifmt_jeqrle, { 0x4d }
1086 },
1087/* jne $dstle,$imm32,$disp16 */
1088 {
1089 { 0, 0, 0, 0 },
1090 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1091 & ifmt_jeqile, { 0x55 }
1092 },
1093/* jne $dstle,$srcle,$disp16 */
1094 {
1095 { 0, 0, 0, 0 },
1096 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1097 & ifmt_jeqrle, { 0x5d }
1098 },
1099/* jsgt $dstle,$imm32,$disp16 */
1100 {
1101 { 0, 0, 0, 0 },
1102 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1103 & ifmt_jeqile, { 0x65 }
1104 },
1105/* jsgt $dstle,$srcle,$disp16 */
1106 {
1107 { 0, 0, 0, 0 },
1108 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1109 & ifmt_jeqrle, { 0x6d }
1110 },
1111/* jsge $dstle,$imm32,$disp16 */
1112 {
1113 { 0, 0, 0, 0 },
1114 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1115 & ifmt_jeqile, { 0x75 }
1116 },
1117/* jsge $dstle,$srcle,$disp16 */
1118 {
1119 { 0, 0, 0, 0 },
1120 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1121 & ifmt_jeqrle, { 0x7d }
1122 },
1123/* jslt $dstle,$imm32,$disp16 */
1124 {
1125 { 0, 0, 0, 0 },
1126 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1127 & ifmt_jeqile, { 0xc5 }
1128 },
1129/* jslt $dstle,$srcle,$disp16 */
1130 {
1131 { 0, 0, 0, 0 },
1132 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1133 & ifmt_jeqrle, { 0xcd }
1134 },
1135/* jsle $dstle,$imm32,$disp16 */
1136 {
1137 { 0, 0, 0, 0 },
1138 { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1139 & ifmt_jeqile, { 0xd5 }
1140 },
1141/* jsle $dstle,$srcle,$disp16 */
1142 {
1143 { 0, 0, 0, 0 },
1144 { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1145 & ifmt_jeqrle, { 0xdd }
1146 },
1147/* jeq $dstbe,$imm32,$disp16 */
1148 {
1149 { 0, 0, 0, 0 },
1150 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1151 & ifmt_jeqibe, { 0x15 }
1152 },
1153/* jeq $dstbe,$srcbe,$disp16 */
1154 {
1155 { 0, 0, 0, 0 },
1156 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1157 & ifmt_jeqrbe, { 0x1d }
1158 },
1159/* jgt $dstbe,$imm32,$disp16 */
1160 {
1161 { 0, 0, 0, 0 },
1162 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1163 & ifmt_jeqibe, { 0x25 }
1164 },
1165/* jgt $dstbe,$srcbe,$disp16 */
1166 {
1167 { 0, 0, 0, 0 },
1168 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1169 & ifmt_jeqrbe, { 0x2d }
1170 },
1171/* jge $dstbe,$imm32,$disp16 */
1172 {
1173 { 0, 0, 0, 0 },
1174 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1175 & ifmt_jeqibe, { 0x35 }
1176 },
1177/* jge $dstbe,$srcbe,$disp16 */
1178 {
1179 { 0, 0, 0, 0 },
1180 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1181 & ifmt_jeqrbe, { 0x3d }
1182 },
1183/* jlt $dstbe,$imm32,$disp16 */
1184 {
1185 { 0, 0, 0, 0 },
1186 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1187 & ifmt_jeqibe, { 0xa5 }
1188 },
1189/* jlt $dstbe,$srcbe,$disp16 */
1190 {
1191 { 0, 0, 0, 0 },
1192 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1193 & ifmt_jeqrbe, { 0xad }
1194 },
1195/* jle $dstbe,$imm32,$disp16 */
1196 {
1197 { 0, 0, 0, 0 },
1198 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1199 & ifmt_jeqibe, { 0xb5 }
1200 },
1201/* jle $dstbe,$srcbe,$disp16 */
1202 {
1203 { 0, 0, 0, 0 },
1204 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1205 & ifmt_jeqrbe, { 0xbd }
1206 },
1207/* jset $dstbe,$imm32,$disp16 */
1208 {
1209 { 0, 0, 0, 0 },
1210 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1211 & ifmt_jeqibe, { 0x45 }
1212 },
1213/* jset $dstbe,$srcbe,$disp16 */
1214 {
1215 { 0, 0, 0, 0 },
1216 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1217 & ifmt_jeqrbe, { 0x4d }
1218 },
1219/* jne $dstbe,$imm32,$disp16 */
1220 {
1221 { 0, 0, 0, 0 },
1222 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1223 & ifmt_jeqibe, { 0x55 }
1224 },
1225/* jne $dstbe,$srcbe,$disp16 */
1226 {
1227 { 0, 0, 0, 0 },
1228 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1229 & ifmt_jeqrbe, { 0x5d }
1230 },
1231/* jsgt $dstbe,$imm32,$disp16 */
1232 {
1233 { 0, 0, 0, 0 },
1234 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1235 & ifmt_jeqibe, { 0x65 }
1236 },
1237/* jsgt $dstbe,$srcbe,$disp16 */
1238 {
1239 { 0, 0, 0, 0 },
1240 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1241 & ifmt_jeqrbe, { 0x6d }
1242 },
1243/* jsge $dstbe,$imm32,$disp16 */
1244 {
1245 { 0, 0, 0, 0 },
1246 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1247 & ifmt_jeqibe, { 0x75 }
1248 },
1249/* jsge $dstbe,$srcbe,$disp16 */
1250 {
1251 { 0, 0, 0, 0 },
1252 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1253 & ifmt_jeqrbe, { 0x7d }
1254 },
1255/* jslt $dstbe,$imm32,$disp16 */
1256 {
1257 { 0, 0, 0, 0 },
1258 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1259 & ifmt_jeqibe, { 0xc5 }
1260 },
1261/* jslt $dstbe,$srcbe,$disp16 */
1262 {
1263 { 0, 0, 0, 0 },
1264 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1265 & ifmt_jeqrbe, { 0xcd }
1266 },
1267/* jsle $dstbe,$imm32,$disp16 */
1268 {
1269 { 0, 0, 0, 0 },
1270 { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1271 & ifmt_jeqibe, { 0xd5 }
1272 },
1273/* jsle $dstbe,$srcbe,$disp16 */
1274 {
1275 { 0, 0, 0, 0 },
1276 { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1277 & ifmt_jeqrbe, { 0xdd }
1278 },
1279/* ja $disp16 */
1280 {
1281 { 0, 0, 0, 0 },
1282 { { MNEM, ' ', OP (DISP16), 0 } },
1283 & ifmt_ja, { 0x5 }
1284 },
1285/* call $disp32 */
1286 {
1287 { 0, 0, 0, 0 },
1288 { { MNEM, ' ', OP (DISP32), 0 } },
1289 & ifmt_call, { 0x85 }
1290 },
1291/* exit */
1292 {
1293 { 0, 0, 0, 0 },
1294 { { MNEM, 0 } },
1295 & ifmt_exit, { 0x95 }
1296 },
1297/* xadddw [$dstle+$offset16],$srcle */
1298 {
1299 { 0, 0, 0, 0 },
1300 { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } },
1301 & ifmt_ldxwle, { 0xdb }
1302 },
1303/* xaddw [$dstle+$offset16],$srcle */
1304 {
1305 { 0, 0, 0, 0 },
1306 { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } },
1307 & ifmt_ldxwle, { 0xc3 }
1308 },
1309/* xadddw [$dstbe+$offset16],$srcbe */
1310 {
1311 { 0, 0, 0, 0 },
1312 { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } },
1313 & ifmt_ldxwbe, { 0xdb }
1314 },
1315/* xaddw [$dstbe+$offset16],$srcbe */
1316 {
1317 { 0, 0, 0, 0 },
1318 { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } },
1319 & ifmt_ldxwbe, { 0xc3 }
1320 },
1321};
1322
1323#undef A
1324#undef OPERAND
1325#undef MNEM
1326#undef OP
1327
1328/* Formats for ALIAS macro-insns. */
1329
1330#define F(f) & bpf_cgen_ifld_table[BPF_##f]
1331#undef F
1332
1333/* Each non-simple macro entry points to an array of expansion possibilities. */
1334
1335#define A(a) (1 << CGEN_INSN_##a)
1336#define OPERAND(op) BPF_OPERAND_##op
1337#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
1338#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
1339
1340/* The macro instruction table. */
1341
1342static const CGEN_IBASE bpf_cgen_macro_insn_table[] =
1343{
1344};
1345
1346/* The macro instruction opcode table. */
1347
1348static const CGEN_OPCODE bpf_cgen_macro_insn_opcode_table[] =
1349{
1350};
1351
1352#undef A
1353#undef OPERAND
1354#undef MNEM
1355#undef OP
1356
1357#ifndef CGEN_ASM_HASH_P
1358#define CGEN_ASM_HASH_P(insn) 1
1359#endif
1360
1361#ifndef CGEN_DIS_HASH_P
1362#define CGEN_DIS_HASH_P(insn) 1
1363#endif
1364
1365/* Return non-zero if INSN is to be added to the hash table.
1366 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
1367
1368static int
1369asm_hash_insn_p (const CGEN_INSN *insn ATTRIBUTE_UNUSED)
1370{
1371 return CGEN_ASM_HASH_P (insn);
1372}
1373
1374static int
1375dis_hash_insn_p (const CGEN_INSN *insn)
1376{
1377 /* If building the hash table and the NO-DIS attribute is present,
1378 ignore. */
1379 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
1380 return 0;
1381 return CGEN_DIS_HASH_P (insn);
1382}
1383
1384#ifndef CGEN_ASM_HASH
1385#define CGEN_ASM_HASH_SIZE 127
1386#ifdef CGEN_MNEMONIC_OPERANDS
1387#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
1388#else
1389#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
1390#endif
1391#endif
1392
1393/* It doesn't make much sense to provide a default here,
1394 but while this is under development we do.
1395 BUFFER is a pointer to the bytes of the insn, target order.
1396 VALUE is the first base_insn_bitsize bits as an int in host order. */
1397
1398#ifndef CGEN_DIS_HASH
1399#define CGEN_DIS_HASH_SIZE 256
1400#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
1401#endif
1402
1403/* The result is the hash value of the insn.
1404 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
1405
1406static unsigned int
1407asm_hash_insn (const char *mnem)
1408{
1409 return CGEN_ASM_HASH (mnem);
1410}
1411
1412/* BUF is a pointer to the bytes of the insn, target order.
1413 VALUE is the first base_insn_bitsize bits as an int in host order. */
1414
1415static unsigned int
1416dis_hash_insn (const char *buf ATTRIBUTE_UNUSED,
1417 CGEN_INSN_INT value ATTRIBUTE_UNUSED)
1418{
1419 return CGEN_DIS_HASH (buf, value);
1420}
1421
1422/* Set the recorded length of the insn in the CGEN_FIELDS struct. */
1423
1424static void
1425set_fields_bitsize (CGEN_FIELDS *fields, int size)
1426{
1427 CGEN_FIELDS_BITSIZE (fields) = size;
1428}
1429
1430/* Function to call before using the operand instance table.
1431 This plugs the opcode entries and macro instructions into the cpu table. */
1432
1433void
1434bpf_cgen_init_opcode_table (CGEN_CPU_DESC cd)
1435{
1436 int i;
1437 int num_macros = (sizeof (bpf_cgen_macro_insn_table) /
1438 sizeof (bpf_cgen_macro_insn_table[0]));
1439 const CGEN_IBASE *ib = & bpf_cgen_macro_insn_table[0];
1440 const CGEN_OPCODE *oc = & bpf_cgen_macro_insn_opcode_table[0];
1441 CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
1442
1443 /* This test has been added to avoid a warning generated
1444 if memset is called with a third argument of value zero. */
1445 if (num_macros >= 1)
1446 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
1447 for (i = 0; i < num_macros; ++i)
1448 {
1449 insns[i].base = &ib[i];
1450 insns[i].opcode = &oc[i];
1451 bpf_cgen_build_insn_regex (& insns[i]);
1452 }
1453 cd->macro_insn_table.init_entries = insns;
1454 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
1455 cd->macro_insn_table.num_init_entries = num_macros;
1456
1457 oc = & bpf_cgen_insn_opcode_table[0];
1458 insns = (CGEN_INSN *) cd->insn_table.init_entries;
1459 for (i = 0; i < MAX_INSNS; ++i)
1460 {
1461 insns[i].opcode = &oc[i];
1462 bpf_cgen_build_insn_regex (& insns[i]);
1463 }
1464
1465 cd->sizeof_fields = sizeof (CGEN_FIELDS);
1466 cd->set_fields_bitsize = set_fields_bitsize;
1467
1468 cd->asm_hash_p = asm_hash_insn_p;
1469 cd->asm_hash = asm_hash_insn;
1470 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
1471
1472 cd->dis_hash_p = dis_hash_insn_p;
1473 cd->dis_hash = dis_hash_insn;
1474 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
1475}
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