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f6e6b40f BE |
1 | /* Disassembler interface for targets using CGEN. -*- C -*- |
2 | CGEN: Cpu tools GENerator | |
3 | ||
4 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
5 | - the resultant file is machine generated, cgen-dis.in isn't | |
6 | ||
7 | Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. | |
8 | ||
9 | This file is part of the GNU Binutils and GDB, the GNU debugger. | |
10 | ||
11 | This program is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
13 | the Free Software Foundation; either version 2, or (at your option) | |
14 | any later version. | |
15 | ||
16 | This program is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
22 | along with this program; if not, write to the Free Software Foundation, Inc., | |
23 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
24 | ||
25 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. | |
26 | Keep that in mind. */ | |
27 | ||
28 | #include "sysdep.h" | |
29 | #include <stdio.h> | |
30 | #include "ansidecl.h" | |
31 | #include "dis-asm.h" | |
32 | #include "bfd.h" | |
33 | #include "symcat.h" | |
34 | #include "@prefix@-desc.h" | |
35 | #include "@prefix@-opc.h" | |
36 | #include "opintl.h" | |
37 | ||
38 | /* Default text to print if an instruction isn't recognized. */ | |
39 | #define UNKNOWN_INSN_MSG _("*unknown*") | |
40 | ||
41 | static void print_normal | |
42 | PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int)); | |
43 | static void print_address | |
44 | PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int)); | |
45 | static void print_keyword | |
46 | PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int)); | |
47 | static void print_insn_normal | |
48 | PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *, | |
49 | bfd_vma, int)); | |
50 | static int print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, | |
51 | disassemble_info *, char *, int)); | |
52 | static int default_print_insn | |
53 | PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *)); | |
54 | \f | |
55 | /* -- disassembler routines inserted here */ | |
56 | \f | |
57 | /* Default print handler. */ | |
58 | ||
59 | static void | |
60 | print_normal (cd, dis_info, value, attrs, pc, length) | |
61 | #ifdef CGEN_PRINT_NORMAL | |
62 | CGEN_CPU_DESC cd; | |
63 | #else | |
64 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; | |
65 | #endif | |
66 | PTR dis_info; | |
67 | long value; | |
68 | unsigned int attrs; | |
69 | #ifdef CGEN_PRINT_NORMAL | |
70 | bfd_vma pc; | |
71 | int length; | |
72 | #else | |
73 | bfd_vma pc ATTRIBUTE_UNUSED; | |
74 | int length ATTRIBUTE_UNUSED; | |
75 | #endif | |
76 | { | |
77 | disassemble_info *info = (disassemble_info *) dis_info; | |
78 | ||
79 | #ifdef CGEN_PRINT_NORMAL | |
80 | CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); | |
81 | #endif | |
82 | ||
83 | /* Print the operand as directed by the attributes. */ | |
84 | if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) | |
85 | ; /* nothing to do */ | |
86 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) | |
87 | (*info->fprintf_func) (info->stream, "%ld", value); | |
88 | else | |
89 | (*info->fprintf_func) (info->stream, "0x%lx", value); | |
90 | } | |
91 | ||
92 | /* Default address handler. */ | |
93 | ||
94 | static void | |
95 | print_address (cd, dis_info, value, attrs, pc, length) | |
96 | #ifdef CGEN_PRINT_NORMAL | |
97 | CGEN_CPU_DESC cd; | |
98 | #else | |
99 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; | |
100 | #endif | |
101 | PTR dis_info; | |
102 | bfd_vma value; | |
103 | unsigned int attrs; | |
104 | #ifdef CGEN_PRINT_NORMAL | |
105 | bfd_vma pc; | |
106 | int length; | |
107 | #else | |
108 | bfd_vma pc ATTRIBUTE_UNUSED; | |
109 | int length ATTRIBUTE_UNUSED; | |
110 | #endif | |
111 | { | |
112 | disassemble_info *info = (disassemble_info *) dis_info; | |
113 | ||
114 | #ifdef CGEN_PRINT_ADDRESS | |
115 | CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); | |
116 | #endif | |
117 | ||
118 | /* Print the operand as directed by the attributes. */ | |
119 | if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) | |
120 | ; /* nothing to do */ | |
121 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) | |
122 | (*info->print_address_func) (value, info); | |
123 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) | |
124 | (*info->print_address_func) (value, info); | |
125 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) | |
126 | (*info->fprintf_func) (info->stream, "%ld", (long) value); | |
127 | else | |
128 | (*info->fprintf_func) (info->stream, "0x%lx", (long) value); | |
129 | } | |
130 | ||
131 | /* Keyword print handler. */ | |
132 | ||
133 | static void | |
134 | print_keyword (cd, dis_info, keyword_table, value, attrs) | |
135 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; | |
136 | PTR dis_info; | |
137 | CGEN_KEYWORD *keyword_table; | |
138 | long value; | |
139 | unsigned int attrs ATTRIBUTE_UNUSED; | |
140 | { | |
141 | disassemble_info *info = (disassemble_info *) dis_info; | |
142 | const CGEN_KEYWORD_ENTRY *ke; | |
143 | ||
144 | ke = cgen_keyword_lookup_value (keyword_table, value); | |
145 | if (ke != NULL) | |
146 | (*info->fprintf_func) (info->stream, "%s", ke->name); | |
147 | else | |
148 | (*info->fprintf_func) (info->stream, "???"); | |
149 | } | |
150 | \f | |
151 | /* Default insn printer. | |
152 | ||
153 | DIS_INFO is defined as `PTR' so the disassembler needn't know anything | |
154 | about disassemble_info. */ | |
155 | ||
156 | static void | |
157 | print_insn_normal (cd, dis_info, insn, fields, pc, length) | |
158 | CGEN_CPU_DESC cd; | |
159 | PTR dis_info; | |
160 | const CGEN_INSN *insn; | |
161 | CGEN_FIELDS *fields; | |
162 | bfd_vma pc; | |
163 | int length; | |
164 | { | |
165 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); | |
166 | disassemble_info *info = (disassemble_info *) dis_info; | |
167 | const unsigned char *syn; | |
168 | ||
169 | CGEN_INIT_PRINT (cd); | |
170 | ||
171 | for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) | |
172 | { | |
173 | if (CGEN_SYNTAX_MNEMONIC_P (*syn)) | |
174 | { | |
175 | (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn)); | |
176 | continue; | |
177 | } | |
178 | if (CGEN_SYNTAX_CHAR_P (*syn)) | |
179 | { | |
180 | (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn)); | |
181 | continue; | |
182 | } | |
183 | ||
184 | /* We have an operand. */ | |
185 | @arch@_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info, | |
186 | fields, CGEN_INSN_ATTRS (insn), pc, length); | |
187 | } | |
188 | } | |
189 | \f | |
6bb95a0f DB |
190 | /* Subroutine of print_insn. Reads an insn into the given buffers and updates |
191 | the extract info. | |
192 | Returns 0 if all is well, non-zero otherwise. */ | |
f6e6b40f | 193 | static int |
6bb95a0f | 194 | read_insn (cd, pc, info, buf, buflen, ex_info, insn_value) |
f6e6b40f BE |
195 | CGEN_CPU_DESC cd; |
196 | bfd_vma pc; | |
197 | disassemble_info *info; | |
198 | char *buf; | |
199 | int buflen; | |
6bb95a0f DB |
200 | CGEN_EXTRACT_INFO *ex_info; |
201 | unsigned long *insn_value; | |
f6e6b40f | 202 | { |
6bb95a0f DB |
203 | int status = (*info->read_memory_func) (pc, buf, buflen, info); |
204 | if (status != 0) | |
205 | { | |
206 | (*info->memory_error_func) (status, pc, info); | |
207 | return -1; | |
208 | } | |
f6e6b40f | 209 | |
6bb95a0f DB |
210 | ex_info->dis_info = info; |
211 | ex_info->valid = (1 << buflen) - 1; | |
212 | ex_info->insn_bytes = buf; | |
f6e6b40f BE |
213 | |
214 | switch (buflen) | |
215 | { | |
216 | case 1: | |
6bb95a0f | 217 | *insn_value = buf[0]; |
f6e6b40f BE |
218 | break; |
219 | case 2: | |
6bb95a0f | 220 | *insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb16 (buf) : bfd_getl16 (buf); |
f6e6b40f BE |
221 | break; |
222 | case 4: | |
6bb95a0f | 223 | *insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb32 (buf) : bfd_getl32 (buf); |
f6e6b40f BE |
224 | break; |
225 | default: | |
226 | abort (); | |
227 | } | |
228 | ||
6bb95a0f DB |
229 | return 0; |
230 | } | |
231 | ||
232 | /* Utility to print an insn. | |
233 | BUF is the base part of the insn, target byte order, BUFLEN bytes long. | |
234 | The result is the size of the insn in bytes or zero for an unknown insn | |
235 | or -1 if an error occurs fetching data (memory_error_func will have | |
236 | been called). */ | |
237 | ||
238 | static int | |
239 | print_insn (cd, pc, info, buf, buflen) | |
240 | CGEN_CPU_DESC cd; | |
241 | bfd_vma pc; | |
242 | disassemble_info *info; | |
243 | char *buf; | |
244 | int buflen; | |
245 | { | |
246 | unsigned long insn_value; | |
247 | const CGEN_INSN_LIST *insn_list; | |
248 | CGEN_EXTRACT_INFO ex_info; | |
249 | ||
250 | int rc = read_insn (cd, pc, info, buf, buflen, & ex_info, & insn_value); | |
251 | if (rc != 0) | |
252 | return rc; | |
253 | ||
f6e6b40f BE |
254 | /* The instructions are stored in hash lists. |
255 | Pick the first one and keep trying until we find the right one. */ | |
256 | ||
257 | insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); | |
258 | while (insn_list != NULL) | |
259 | { | |
260 | const CGEN_INSN *insn = insn_list->insn; | |
261 | CGEN_FIELDS fields; | |
262 | int length; | |
263 | ||
264 | #ifdef CGEN_VALIDATE_INSN_SUPPORTED | |
265 | /* not needed as insn shouldn't be in hash lists if not supported */ | |
266 | /* Supported by this cpu? */ | |
267 | if (! @arch@_cgen_insn_supported (cd, insn)) | |
268 | { | |
269 | insn_list = CGEN_DIS_NEXT_INSN (insn_list); | |
270 | continue; | |
271 | } | |
272 | #endif | |
273 | ||
274 | /* Basic bit mask must be correct. */ | |
275 | /* ??? May wish to allow target to defer this check until the extract | |
276 | handler. */ | |
277 | if ((insn_value & CGEN_INSN_BASE_MASK (insn)) | |
278 | == CGEN_INSN_BASE_VALUE (insn)) | |
279 | { | |
280 | /* Printing is handled in two passes. The first pass parses the | |
281 | machine insn and extracts the fields. The second pass prints | |
282 | them. */ | |
283 | ||
1ffd7d02 DB |
284 | /* Make sure the entire insn is loaded into insn_value, if it |
285 | can fit. */ | |
286 | if (CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize && | |
287 | (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) | |
6bb95a0f DB |
288 | { |
289 | unsigned long full_insn_value; | |
290 | int rc = read_insn (cd, pc, info, buf, | |
291 | CGEN_INSN_BITSIZE (insn) / 8, | |
292 | & ex_info, & full_insn_value); | |
293 | if (rc != 0) | |
294 | return rc; | |
295 | length = CGEN_EXTRACT_FN (cd, insn) | |
296 | (cd, insn, &ex_info, full_insn_value, &fields, pc); | |
297 | } | |
298 | else | |
1ffd7d02 DB |
299 | length = CGEN_EXTRACT_FN (cd, insn) |
300 | (cd, insn, &ex_info, insn_value, &fields, pc); | |
6bb95a0f | 301 | |
f6e6b40f BE |
302 | /* length < 0 -> error */ |
303 | if (length < 0) | |
304 | return length; | |
305 | if (length > 0) | |
306 | { | |
307 | CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); | |
308 | /* length is in bits, result is in bytes */ | |
309 | return length / 8; | |
310 | } | |
311 | } | |
312 | ||
313 | insn_list = CGEN_DIS_NEXT_INSN (insn_list); | |
314 | } | |
315 | ||
316 | return 0; | |
317 | } | |
318 | ||
319 | /* Default value for CGEN_PRINT_INSN. | |
320 | The result is the size of the insn in bytes or zero for an unknown insn | |
321 | or -1 if an error occured fetching bytes. */ | |
322 | ||
323 | #ifndef CGEN_PRINT_INSN | |
324 | #define CGEN_PRINT_INSN default_print_insn | |
325 | #endif | |
326 | ||
327 | static int | |
328 | default_print_insn (cd, pc, info) | |
329 | CGEN_CPU_DESC cd; | |
330 | bfd_vma pc; | |
331 | disassemble_info *info; | |
332 | { | |
333 | char buf[CGEN_MAX_INSN_SIZE]; | |
334 | int status; | |
335 | ||
336 | /* Read the base part of the insn. */ | |
337 | ||
338 | status = (*info->read_memory_func) (pc, buf, cd->base_insn_bitsize / 8, info); | |
339 | if (status != 0) | |
340 | { | |
341 | (*info->memory_error_func) (status, pc, info); | |
342 | return -1; | |
343 | } | |
344 | ||
345 | return print_insn (cd, pc, info, buf, cd->base_insn_bitsize / 8); | |
346 | } | |
347 | ||
348 | /* Main entry point. | |
349 | Print one instruction from PC on INFO->STREAM. | |
350 | Return the size of the instruction (in bytes). */ | |
351 | ||
352 | int | |
353 | print_insn_@arch@ (pc, info) | |
354 | bfd_vma pc; | |
355 | disassemble_info *info; | |
356 | { | |
357 | static CGEN_CPU_DESC cd = 0; | |
358 | static int prev_isa; | |
359 | static int prev_mach; | |
360 | static int prev_endian; | |
361 | int length; | |
362 | int isa,mach; | |
363 | int endian = (info->endian == BFD_ENDIAN_BIG | |
364 | ? CGEN_ENDIAN_BIG | |
365 | : CGEN_ENDIAN_LITTLE); | |
366 | enum bfd_architecture arch; | |
367 | ||
368 | /* ??? gdb will set mach but leave the architecture as "unknown" */ | |
369 | #ifndef CGEN_BFD_ARCH | |
370 | #define CGEN_BFD_ARCH bfd_arch_@arch@ | |
371 | #endif | |
372 | arch = info->arch; | |
373 | if (arch == bfd_arch_unknown) | |
374 | arch = CGEN_BFD_ARCH; | |
375 | ||
376 | /* There's no standard way to compute the isa number (e.g. for arm thumb) | |
377 | so we leave it to the target. */ | |
378 | #ifdef CGEN_COMPUTE_ISA | |
379 | isa = CGEN_COMPUTE_ISA (info); | |
380 | #else | |
381 | isa = 0; | |
382 | #endif | |
383 | ||
384 | mach = info->mach; | |
385 | ||
386 | /* If we've switched cpu's, close the current table and open a new one. */ | |
387 | if (cd | |
388 | && (isa != prev_isa | |
389 | || mach != prev_mach | |
390 | || endian != prev_endian)) | |
391 | { | |
392 | @arch@_cgen_cpu_close (cd); | |
393 | cd = 0; | |
394 | } | |
395 | ||
396 | /* If we haven't initialized yet, initialize the opcode table. */ | |
397 | if (! cd) | |
398 | { | |
399 | const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach); | |
400 | const char *mach_name; | |
401 | ||
402 | if (!arch_type) | |
403 | abort (); | |
404 | mach_name = arch_type->printable_name; | |
405 | ||
406 | prev_isa = isa; | |
407 | prev_mach = mach; | |
408 | prev_endian = endian; | |
409 | cd = @arch@_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, | |
410 | CGEN_CPU_OPEN_BFDMACH, mach_name, | |
411 | CGEN_CPU_OPEN_ENDIAN, prev_endian, | |
412 | CGEN_CPU_OPEN_END); | |
413 | if (!cd) | |
414 | abort (); | |
415 | @arch@_cgen_init_dis (cd); | |
416 | } | |
417 | ||
418 | /* We try to have as much common code as possible. | |
419 | But at this point some targets need to take over. */ | |
420 | /* ??? Some targets may need a hook elsewhere. Try to avoid this, | |
421 | but if not possible try to move this hook elsewhere rather than | |
422 | have two hooks. */ | |
423 | length = CGEN_PRINT_INSN (cd, pc, info); | |
424 | if (length > 0) | |
425 | return length; | |
426 | if (length < 0) | |
427 | return -1; | |
428 | ||
429 | (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); | |
430 | return cd->default_insn_bitsize / 8; | |
431 | } |