Commit | Line | Data |
---|---|---|
f6e6b40f BE |
1 | /* Disassembler interface for targets using CGEN. -*- C -*- |
2 | CGEN: Cpu tools GENerator | |
3 | ||
4 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
5 | - the resultant file is machine generated, cgen-dis.in isn't | |
6 | ||
98f70fc4 AM |
7 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 |
8 | Free Software Foundation, Inc. | |
f6e6b40f BE |
9 | |
10 | This file is part of the GNU Binutils and GDB, the GNU debugger. | |
11 | ||
12 | This program is free software; you can redistribute it and/or modify | |
13 | it under the terms of the GNU General Public License as published by | |
14 | the Free Software Foundation; either version 2, or (at your option) | |
15 | any later version. | |
16 | ||
17 | This program is distributed in the hope that it will be useful, | |
18 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | GNU General Public License for more details. | |
21 | ||
22 | You should have received a copy of the GNU General Public License | |
23 | along with this program; if not, write to the Free Software Foundation, Inc., | |
24 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
25 | ||
26 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. | |
27 | Keep that in mind. */ | |
28 | ||
29 | #include "sysdep.h" | |
30 | #include <stdio.h> | |
31 | #include "ansidecl.h" | |
32 | #include "dis-asm.h" | |
33 | #include "bfd.h" | |
34 | #include "symcat.h" | |
98f70fc4 | 35 | #include "libiberty.h" |
f6e6b40f BE |
36 | #include "@prefix@-desc.h" |
37 | #include "@prefix@-opc.h" | |
38 | #include "opintl.h" | |
39 | ||
40 | /* Default text to print if an instruction isn't recognized. */ | |
41 | #define UNKNOWN_INSN_MSG _("*unknown*") | |
42 | ||
43 | static void print_normal | |
44 | PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int)); | |
45 | static void print_address | |
46 | PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int)); | |
47 | static void print_keyword | |
48 | PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int)); | |
49 | static void print_insn_normal | |
50 | PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *, | |
51 | bfd_vma, int)); | |
0e2ee3ca NC |
52 | static int print_insn |
53 | PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned)); | |
f6e6b40f BE |
54 | static int default_print_insn |
55 | PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *)); | |
0e2ee3ca NC |
56 | static int read_insn |
57 | PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, | |
58 | CGEN_EXTRACT_INFO *, unsigned long *)); | |
f6e6b40f BE |
59 | \f |
60 | /* -- disassembler routines inserted here */ | |
61 | \f | |
62 | /* Default print handler. */ | |
63 | ||
64 | static void | |
65 | print_normal (cd, dis_info, value, attrs, pc, length) | |
f6e6b40f | 66 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; |
f6e6b40f BE |
67 | PTR dis_info; |
68 | long value; | |
69 | unsigned int attrs; | |
f6e6b40f BE |
70 | bfd_vma pc ATTRIBUTE_UNUSED; |
71 | int length ATTRIBUTE_UNUSED; | |
f6e6b40f BE |
72 | { |
73 | disassemble_info *info = (disassemble_info *) dis_info; | |
74 | ||
75 | #ifdef CGEN_PRINT_NORMAL | |
76 | CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); | |
77 | #endif | |
78 | ||
79 | /* Print the operand as directed by the attributes. */ | |
80 | if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) | |
81 | ; /* nothing to do */ | |
82 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) | |
83 | (*info->fprintf_func) (info->stream, "%ld", value); | |
84 | else | |
85 | (*info->fprintf_func) (info->stream, "0x%lx", value); | |
86 | } | |
87 | ||
88 | /* Default address handler. */ | |
89 | ||
90 | static void | |
91 | print_address (cd, dis_info, value, attrs, pc, length) | |
f6e6b40f | 92 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; |
f6e6b40f BE |
93 | PTR dis_info; |
94 | bfd_vma value; | |
95 | unsigned int attrs; | |
f6e6b40f BE |
96 | bfd_vma pc ATTRIBUTE_UNUSED; |
97 | int length ATTRIBUTE_UNUSED; | |
f6e6b40f BE |
98 | { |
99 | disassemble_info *info = (disassemble_info *) dis_info; | |
100 | ||
101 | #ifdef CGEN_PRINT_ADDRESS | |
102 | CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); | |
103 | #endif | |
104 | ||
105 | /* Print the operand as directed by the attributes. */ | |
106 | if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) | |
107 | ; /* nothing to do */ | |
108 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) | |
109 | (*info->print_address_func) (value, info); | |
110 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) | |
111 | (*info->print_address_func) (value, info); | |
112 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) | |
113 | (*info->fprintf_func) (info->stream, "%ld", (long) value); | |
114 | else | |
115 | (*info->fprintf_func) (info->stream, "0x%lx", (long) value); | |
116 | } | |
117 | ||
118 | /* Keyword print handler. */ | |
119 | ||
120 | static void | |
121 | print_keyword (cd, dis_info, keyword_table, value, attrs) | |
122 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; | |
123 | PTR dis_info; | |
124 | CGEN_KEYWORD *keyword_table; | |
125 | long value; | |
126 | unsigned int attrs ATTRIBUTE_UNUSED; | |
127 | { | |
128 | disassemble_info *info = (disassemble_info *) dis_info; | |
129 | const CGEN_KEYWORD_ENTRY *ke; | |
130 | ||
131 | ke = cgen_keyword_lookup_value (keyword_table, value); | |
132 | if (ke != NULL) | |
133 | (*info->fprintf_func) (info->stream, "%s", ke->name); | |
134 | else | |
135 | (*info->fprintf_func) (info->stream, "???"); | |
136 | } | |
137 | \f | |
138 | /* Default insn printer. | |
139 | ||
140 | DIS_INFO is defined as `PTR' so the disassembler needn't know anything | |
141 | about disassemble_info. */ | |
142 | ||
143 | static void | |
144 | print_insn_normal (cd, dis_info, insn, fields, pc, length) | |
145 | CGEN_CPU_DESC cd; | |
146 | PTR dis_info; | |
147 | const CGEN_INSN *insn; | |
148 | CGEN_FIELDS *fields; | |
149 | bfd_vma pc; | |
150 | int length; | |
151 | { | |
152 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); | |
153 | disassemble_info *info = (disassemble_info *) dis_info; | |
4a9f416d | 154 | const CGEN_SYNTAX_CHAR_TYPE *syn; |
f6e6b40f BE |
155 | |
156 | CGEN_INIT_PRINT (cd); | |
157 | ||
158 | for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) | |
159 | { | |
160 | if (CGEN_SYNTAX_MNEMONIC_P (*syn)) | |
161 | { | |
162 | (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn)); | |
163 | continue; | |
164 | } | |
165 | if (CGEN_SYNTAX_CHAR_P (*syn)) | |
166 | { | |
167 | (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn)); | |
168 | continue; | |
169 | } | |
170 | ||
171 | /* We have an operand. */ | |
172 | @arch@_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info, | |
173 | fields, CGEN_INSN_ATTRS (insn), pc, length); | |
174 | } | |
175 | } | |
176 | \f | |
6bb95a0f DB |
177 | /* Subroutine of print_insn. Reads an insn into the given buffers and updates |
178 | the extract info. | |
179 | Returns 0 if all is well, non-zero otherwise. */ | |
0e2ee3ca | 180 | |
f6e6b40f | 181 | static int |
6bb95a0f | 182 | read_insn (cd, pc, info, buf, buflen, ex_info, insn_value) |
0e2ee3ca | 183 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; |
f6e6b40f BE |
184 | bfd_vma pc; |
185 | disassemble_info *info; | |
186 | char *buf; | |
187 | int buflen; | |
6bb95a0f DB |
188 | CGEN_EXTRACT_INFO *ex_info; |
189 | unsigned long *insn_value; | |
f6e6b40f | 190 | { |
6bb95a0f DB |
191 | int status = (*info->read_memory_func) (pc, buf, buflen, info); |
192 | if (status != 0) | |
193 | { | |
194 | (*info->memory_error_func) (status, pc, info); | |
195 | return -1; | |
196 | } | |
f6e6b40f | 197 | |
6bb95a0f DB |
198 | ex_info->dis_info = info; |
199 | ex_info->valid = (1 << buflen) - 1; | |
200 | ex_info->insn_bytes = buf; | |
f6e6b40f | 201 | |
7e30bc36 | 202 | *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG); |
6bb95a0f DB |
203 | return 0; |
204 | } | |
205 | ||
206 | /* Utility to print an insn. | |
207 | BUF is the base part of the insn, target byte order, BUFLEN bytes long. | |
208 | The result is the size of the insn in bytes or zero for an unknown insn | |
209 | or -1 if an error occurs fetching data (memory_error_func will have | |
210 | been called). */ | |
211 | ||
212 | static int | |
213 | print_insn (cd, pc, info, buf, buflen) | |
214 | CGEN_CPU_DESC cd; | |
215 | bfd_vma pc; | |
216 | disassemble_info *info; | |
217 | char *buf; | |
0e2ee3ca | 218 | unsigned int buflen; |
6bb95a0f | 219 | { |
81f6038f | 220 | CGEN_INSN_INT insn_value; |
6bb95a0f DB |
221 | const CGEN_INSN_LIST *insn_list; |
222 | CGEN_EXTRACT_INFO ex_info; | |
6e9a3f4d | 223 | int basesize; |
6bb95a0f | 224 | |
52646233 | 225 | /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */ |
6e9a3f4d JH |
226 | basesize = cd->base_insn_bitsize < buflen * 8 ? |
227 | cd->base_insn_bitsize : buflen * 8; | |
228 | insn_value = cgen_get_insn_value (cd, buf, basesize); | |
229 | ||
52646233 FCE |
230 | |
231 | /* Fill in ex_info fields like read_insn would. Don't actually call | |
232 | read_insn, since the incoming buffer is already read (and possibly | |
233 | modified a la m32r). */ | |
234 | ex_info.valid = (1 << buflen) - 1; | |
235 | ex_info.dis_info = info; | |
236 | ex_info.insn_bytes = buf; | |
6bb95a0f | 237 | |
f6e6b40f BE |
238 | /* The instructions are stored in hash lists. |
239 | Pick the first one and keep trying until we find the right one. */ | |
240 | ||
241 | insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); | |
242 | while (insn_list != NULL) | |
243 | { | |
244 | const CGEN_INSN *insn = insn_list->insn; | |
245 | CGEN_FIELDS fields; | |
246 | int length; | |
52646233 | 247 | unsigned long insn_value_cropped; |
f6e6b40f BE |
248 | |
249 | #ifdef CGEN_VALIDATE_INSN_SUPPORTED | |
0e2ee3ca | 250 | /* Not needed as insn shouldn't be in hash lists if not supported. */ |
f6e6b40f BE |
251 | /* Supported by this cpu? */ |
252 | if (! @arch@_cgen_insn_supported (cd, insn)) | |
253 | { | |
254 | insn_list = CGEN_DIS_NEXT_INSN (insn_list); | |
255 | continue; | |
256 | } | |
257 | #endif | |
258 | ||
259 | /* Basic bit mask must be correct. */ | |
260 | /* ??? May wish to allow target to defer this check until the extract | |
261 | handler. */ | |
52646233 FCE |
262 | |
263 | /* Base size may exceed this instruction's size. Extract the | |
264 | relevant part from the buffer. */ | |
0e2ee3ca NC |
265 | if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && |
266 | (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) | |
52646233 FCE |
267 | insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), |
268 | info->endian == BFD_ENDIAN_BIG); | |
269 | else | |
270 | insn_value_cropped = insn_value; | |
271 | ||
272 | if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn)) | |
f6e6b40f BE |
273 | == CGEN_INSN_BASE_VALUE (insn)) |
274 | { | |
275 | /* Printing is handled in two passes. The first pass parses the | |
276 | machine insn and extracts the fields. The second pass prints | |
277 | them. */ | |
278 | ||
1ffd7d02 DB |
279 | /* Make sure the entire insn is loaded into insn_value, if it |
280 | can fit. */ | |
0e2ee3ca NC |
281 | if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) && |
282 | (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) | |
6bb95a0f DB |
283 | { |
284 | unsigned long full_insn_value; | |
285 | int rc = read_insn (cd, pc, info, buf, | |
286 | CGEN_INSN_BITSIZE (insn) / 8, | |
287 | & ex_info, & full_insn_value); | |
288 | if (rc != 0) | |
289 | return rc; | |
290 | length = CGEN_EXTRACT_FN (cd, insn) | |
291 | (cd, insn, &ex_info, full_insn_value, &fields, pc); | |
292 | } | |
293 | else | |
1ffd7d02 | 294 | length = CGEN_EXTRACT_FN (cd, insn) |
84fd0d38 | 295 | (cd, insn, &ex_info, insn_value_cropped, &fields, pc); |
6bb95a0f | 296 | |
f6e6b40f BE |
297 | /* length < 0 -> error */ |
298 | if (length < 0) | |
299 | return length; | |
300 | if (length > 0) | |
301 | { | |
302 | CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); | |
303 | /* length is in bits, result is in bytes */ | |
304 | return length / 8; | |
305 | } | |
306 | } | |
307 | ||
308 | insn_list = CGEN_DIS_NEXT_INSN (insn_list); | |
309 | } | |
310 | ||
311 | return 0; | |
312 | } | |
313 | ||
314 | /* Default value for CGEN_PRINT_INSN. | |
315 | The result is the size of the insn in bytes or zero for an unknown insn | |
316 | or -1 if an error occured fetching bytes. */ | |
317 | ||
318 | #ifndef CGEN_PRINT_INSN | |
319 | #define CGEN_PRINT_INSN default_print_insn | |
320 | #endif | |
321 | ||
322 | static int | |
323 | default_print_insn (cd, pc, info) | |
324 | CGEN_CPU_DESC cd; | |
325 | bfd_vma pc; | |
326 | disassemble_info *info; | |
327 | { | |
328 | char buf[CGEN_MAX_INSN_SIZE]; | |
a00ad97d | 329 | int buflen; |
f6e6b40f BE |
330 | int status; |
331 | ||
a00ad97d FCE |
332 | /* Attempt to read the base part of the insn. */ |
333 | buflen = cd->base_insn_bitsize / 8; | |
334 | status = (*info->read_memory_func) (pc, buf, buflen, info); | |
335 | ||
336 | /* Try again with the minimum part, if min < base. */ | |
337 | if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) | |
338 | { | |
339 | buflen = cd->min_insn_bitsize / 8; | |
340 | status = (*info->read_memory_func) (pc, buf, buflen, info); | |
341 | } | |
f6e6b40f | 342 | |
f6e6b40f BE |
343 | if (status != 0) |
344 | { | |
345 | (*info->memory_error_func) (status, pc, info); | |
346 | return -1; | |
347 | } | |
348 | ||
a00ad97d | 349 | return print_insn (cd, pc, info, buf, buflen); |
f6e6b40f BE |
350 | } |
351 | ||
352 | /* Main entry point. | |
353 | Print one instruction from PC on INFO->STREAM. | |
354 | Return the size of the instruction (in bytes). */ | |
355 | ||
748f46d4 GH |
356 | typedef struct cpu_desc_list { |
357 | struct cpu_desc_list *next; | |
358 | int isa; | |
359 | int mach; | |
360 | int endian; | |
361 | CGEN_CPU_DESC cd; | |
362 | } cpu_desc_list; | |
363 | ||
f6e6b40f BE |
364 | int |
365 | print_insn_@arch@ (pc, info) | |
366 | bfd_vma pc; | |
367 | disassemble_info *info; | |
368 | { | |
748f46d4 GH |
369 | static cpu_desc_list *cd_list = 0; |
370 | cpu_desc_list *cl = 0; | |
f6e6b40f BE |
371 | static CGEN_CPU_DESC cd = 0; |
372 | static int prev_isa; | |
373 | static int prev_mach; | |
374 | static int prev_endian; | |
375 | int length; | |
376 | int isa,mach; | |
377 | int endian = (info->endian == BFD_ENDIAN_BIG | |
378 | ? CGEN_ENDIAN_BIG | |
379 | : CGEN_ENDIAN_LITTLE); | |
380 | enum bfd_architecture arch; | |
381 | ||
382 | /* ??? gdb will set mach but leave the architecture as "unknown" */ | |
383 | #ifndef CGEN_BFD_ARCH | |
384 | #define CGEN_BFD_ARCH bfd_arch_@arch@ | |
385 | #endif | |
386 | arch = info->arch; | |
387 | if (arch == bfd_arch_unknown) | |
388 | arch = CGEN_BFD_ARCH; | |
27fca2d8 PM |
389 | |
390 | /* There's no standard way to compute the machine or isa number | |
f6e6b40f | 391 | so we leave it to the target. */ |
27fca2d8 PM |
392 | #ifdef CGEN_COMPUTE_MACH |
393 | mach = CGEN_COMPUTE_MACH (info); | |
394 | #else | |
395 | mach = info->mach; | |
396 | #endif | |
397 | ||
f6e6b40f BE |
398 | #ifdef CGEN_COMPUTE_ISA |
399 | isa = CGEN_COMPUTE_ISA (info); | |
400 | #else | |
cadaa522 | 401 | isa = info->insn_sets; |
f6e6b40f BE |
402 | #endif |
403 | ||
748f46d4 | 404 | /* If we've switched cpu's, try to find a handle we've used before */ |
f6e6b40f BE |
405 | if (cd |
406 | && (isa != prev_isa | |
407 | || mach != prev_mach | |
408 | || endian != prev_endian)) | |
409 | { | |
f6e6b40f | 410 | cd = 0; |
748f46d4 GH |
411 | for (cl = cd_list; cl; cl = cl->next) |
412 | { | |
413 | if (cl->isa == isa && | |
414 | cl->mach == mach && | |
415 | cl->endian == endian) | |
416 | { | |
417 | cd = cl->cd; | |
418 | break; | |
419 | } | |
420 | } | |
421 | } | |
f6e6b40f BE |
422 | |
423 | /* If we haven't initialized yet, initialize the opcode table. */ | |
424 | if (! cd) | |
425 | { | |
426 | const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach); | |
427 | const char *mach_name; | |
428 | ||
429 | if (!arch_type) | |
430 | abort (); | |
431 | mach_name = arch_type->printable_name; | |
432 | ||
433 | prev_isa = isa; | |
434 | prev_mach = mach; | |
435 | prev_endian = endian; | |
436 | cd = @arch@_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, | |
437 | CGEN_CPU_OPEN_BFDMACH, mach_name, | |
438 | CGEN_CPU_OPEN_ENDIAN, prev_endian, | |
439 | CGEN_CPU_OPEN_END); | |
440 | if (!cd) | |
441 | abort (); | |
748f46d4 GH |
442 | |
443 | /* save this away for future reference */ | |
444 | cl = xmalloc (sizeof (struct cpu_desc_list)); | |
445 | cl->cd = cd; | |
446 | cl->isa = isa; | |
447 | cl->mach = mach; | |
448 | cl->endian = endian; | |
449 | cl->next = cd_list; | |
450 | cd_list = cl; | |
451 | ||
f6e6b40f BE |
452 | @arch@_cgen_init_dis (cd); |
453 | } | |
454 | ||
455 | /* We try to have as much common code as possible. | |
456 | But at this point some targets need to take over. */ | |
457 | /* ??? Some targets may need a hook elsewhere. Try to avoid this, | |
458 | but if not possible try to move this hook elsewhere rather than | |
459 | have two hooks. */ | |
460 | length = CGEN_PRINT_INSN (cd, pc, info); | |
461 | if (length > 0) | |
462 | return length; | |
463 | if (length < 0) | |
464 | return -1; | |
465 | ||
466 | (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); | |
467 | return cd->default_insn_bitsize / 8; | |
468 | } |