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[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
aef6203b 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
40b36596 3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132 4
9b201bb5
NC		 5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
7499d566 8 it under the terms of the GNU General Public License as published by
9b201bb5 9 the Free Software Foundation; either version 3 of the License, or
7499d566 10 (at your option) any later version.
252b5132 11
7499d566
NC		 12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
252b5132 16
7499d566
NC		 17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
9b201bb5
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
0d8dfecf 22#include "sysdep.h"
252b5132
RH		 23#include "dis-asm.h"
24
25#ifdef ARCH_all
252b5132
RH		 26#define ARCH_alpha
27#define ARCH_arc
28#define ARCH_arm
adde6300 29#define ARCH_avr
4b7f6baa 30#define ARCH_bfin
3d3d428f 31#define ARCH_cr16
6c95a37f 32#define ARCH_cris
1fe1f39c 33#define ARCH_crx
252b5132
RH		 34#define ARCH_d10v
35#define ARCH_d30v
d172d4ba 36#define ARCH_dlx
e729279b
NC		 37#define ARCH_fr30
38#define ARCH_frv
252b5132
RH		 39#define ARCH_h8300
40#define ARCH_h8500
41#define ARCH_hppa
5b93d8bb 42#define ARCH_i370
252b5132 43#define ARCH_i386
9d751335 44#define ARCH_i860
252b5132 45#define ARCH_i960
800eeca4 46#define ARCH_ia64
e729279b
NC		 47#define ARCH_ip2k
48#define ARCH_iq2000
84e94c90 49#define ARCH_lm32
e729279b 50#define ARCH_m32c
252b5132 51#define ARCH_m32r
60bcf0fa
NC		 52#define ARCH_m68hc11
53#define ARCH_m68hc12
e729279b 54#define ARCH_m68k
252b5132 55#define ARCH_m88k
7499d566 56#define ARCH_maxq
252b5132 57#define ARCH_mcore
bd2f2e55 58#define ARCH_mep
7ba29e2a 59#define ARCH_microblaze
252b5132 60#define ARCH_mips
3c3bdf30 61#define ARCH_mmix
252b5132
RH		 62#define ARCH_mn10200
63#define ARCH_mn10300
59b1530d 64#define ARCH_moxie
d031aafb 65#define ARCH_mt
2469cfa2 66#define ARCH_msp430
252b5132 67#define ARCH_ns32k
87e6d782 68#define ARCH_openrisc
3b16e843 69#define ARCH_or32
e135f41b 70#define ARCH_pdp11
1e608f98 71#define ARCH_pj
252b5132
RH		 72#define ARCH_powerpc
73#define ARCH_rs6000
c7927a3c 74#define ARCH_rx
a85d7ed0 75#define ARCH_s390
1c0d3aa6 76#define ARCH_score
252b5132
RH		 77#define ARCH_sh
78#define ARCH_sparc
e9f53129 79#define ARCH_spu
252b5132 80#define ARCH_tic30
026df7c5 81#define ARCH_tic4x
5c84d377 82#define ARCH_tic54x
40b36596 83#define ARCH_tic6x
252b5132
RH		 84#define ARCH_tic80
85#define ARCH_v850
86#define ARCH_vax
87#define ARCH_w65
93fbbb04 88#define ARCH_xstormy16
d70c5fc7 89#define ARCH_xc16x
e0001a05 90#define ARCH_xtensa
3c9b82ba 91#define ARCH_z80
252b5132 92#define ARCH_z8k
d28847ce 93#define INCLUDE_SHMEDIA
252b5132
RH		 94#endif
95
49f58d10
JB		 96#ifdef ARCH_m32c
97#include "m32c-desc.h"
98#endif
252b5132
RH		 99
100disassembler_ftype
101disassembler (abfd)
102 bfd *abfd;
103{
104 enum bfd_architecture a = bfd_get_arch (abfd);
105 disassembler_ftype disassemble;
106
107 switch (a)
108 {
109 /* If you add a case to this table, also add it to the
110 ARCH_all definition right above this function. */
252b5132
RH		 111#ifdef ARCH_alpha
112 case bfd_arch_alpha:
113 disassemble = print_insn_alpha;
114 break;
115#endif
116#ifdef ARCH_arc
117 case bfd_arch_arc:
118 {
0d2bcfaf 119 disassemble = arc_get_disassembler (abfd);
252b5132
RH		 120 break;
121 }
122#endif
123#ifdef ARCH_arm
124 case bfd_arch_arm:
125 if (bfd_big_endian (abfd))
126 disassemble = print_insn_big_arm;
127 else
128 disassemble = print_insn_little_arm;
129 break;
130#endif
adde6300
AM		 131#ifdef ARCH_avr
132 case bfd_arch_avr:
133 disassemble = print_insn_avr;
134 break;
135#endif
4b7f6baa
CM		 136#ifdef ARCH_bfin
137 case bfd_arch_bfin:
138 disassemble = print_insn_bfin;
139 break;
140#endif
3d3d428f
NC		 141#ifdef ARCH_cr16
142 case bfd_arch_cr16:
143 disassemble = print_insn_cr16;
144 break;
145#endif
6c95a37f
HPN		 146#ifdef ARCH_cris
147 case bfd_arch_cris:
78966507 148 disassemble = cris_get_disassembler (abfd);
6c95a37f 149 break;
1fe1f39c
NC		 150#endif
151#ifdef ARCH_crx
152 case bfd_arch_crx:
153 disassemble = print_insn_crx;
154 break;
6c95a37f 155#endif
252b5132
RH		 156#ifdef ARCH_d10v
157 case bfd_arch_d10v:
158 disassemble = print_insn_d10v;
159 break;
160#endif
161#ifdef ARCH_d30v
162 case bfd_arch_d30v:
163 disassemble = print_insn_d30v;
164 break;
165#endif
d172d4ba
NC		 166#ifdef ARCH_dlx
167 case bfd_arch_dlx:
168 /* As far as I know we only handle big-endian DLX objects. */
169 disassemble = print_insn_dlx;
170 break;
171#endif
252b5132
RH		 172#ifdef ARCH_h8300
173 case bfd_arch_h8300:
049f8936
NC		 174 if (bfd_get_mach (abfd) == bfd_mach_h8300h
175 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
252b5132 176 disassemble = print_insn_h8300h;
049f8936 177 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
d43ff6d2 178 || bfd_get_mach (abfd) == bfd_mach_h8300sn
a53b85e2
AO		 179 || bfd_get_mach (abfd) == bfd_mach_h8300sx
180 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
252b5132 181 disassemble = print_insn_h8300s;
b7ed8fad 182 else
252b5132
RH		 183 disassemble = print_insn_h8300;
184 break;
185#endif
186#ifdef ARCH_h8500
187 case bfd_arch_h8500:
188 disassemble = print_insn_h8500;
189 break;
190#endif
191#ifdef ARCH_hppa
192 case bfd_arch_hppa:
193 disassemble = print_insn_hppa;
194 break;
195#endif
5b93d8bb
AM		 196#ifdef ARCH_i370
197 case bfd_arch_i370:
198 disassemble = print_insn_i370;
199 break;
200#endif
252b5132
RH		 201#ifdef ARCH_i386
202 case bfd_arch_i386:
8a9036a4 203 case bfd_arch_l1om:
e396998b 204 disassemble = print_insn_i386;
252b5132
RH		 205 break;
206#endif
9d751335
JE		 207#ifdef ARCH_i860
208 case bfd_arch_i860:
209 disassemble = print_insn_i860;
210 break;
211#endif
252b5132
RH		 212#ifdef ARCH_i960
213 case bfd_arch_i960:
214 disassemble = print_insn_i960;
215 break;
216#endif
800eeca4
JW		 217#ifdef ARCH_ia64
218 case bfd_arch_ia64:
219 disassemble = print_insn_ia64;
220 break;
221#endif
a40cbfa3
NC		 222#ifdef ARCH_ip2k
223 case bfd_arch_ip2k:
224 disassemble = print_insn_ip2k;
225 break;
226#endif
252b5132
RH		 227#ifdef ARCH_fr30
228 case bfd_arch_fr30:
229 disassemble = print_insn_fr30;
230 break;
231#endif
84e94c90
NC		 232#ifdef ARCH_lm32
233 case bfd_arch_lm32:
234 disassemble = print_insn_lm32;
235 break;
236#endif
252b5132
RH		 237#ifdef ARCH_m32r
238 case bfd_arch_m32r:
239 disassemble = print_insn_m32r;
240 break;
241#endif
60bcf0fa
NC		 242#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
243 case bfd_arch_m68hc11:
244 disassemble = print_insn_m68hc11;
245 break;
246 case bfd_arch_m68hc12:
247 disassemble = print_insn_m68hc12;
248 break;
249#endif
252b5132
RH		 250#ifdef ARCH_m68k
251 case bfd_arch_m68k:
252 disassemble = print_insn_m68k;
253 break;
254#endif
255#ifdef ARCH_m88k
256 case bfd_arch_m88k:
257 disassemble = print_insn_m88k;
258 break;
259#endif
7499d566
NC		 260#ifdef ARCH_maxq
261 case bfd_arch_maxq:
262 disassemble = print_insn_maxq_little;
263 break;
264#endif
d031aafb
NS		 265#ifdef ARCH_mt
266 case bfd_arch_mt:
267 disassemble = print_insn_mt;
ac188222
DB		 268 break;
269#endif
7ba29e2a
NC		 270#ifdef ARCH_microblaze
271 case bfd_arch_microblaze:
272 disassemble = print_insn_microblaze;
273 break;
274#endif
2469cfa2
NC		 275#ifdef ARCH_msp430
276 case bfd_arch_msp430:
277 disassemble = print_insn_msp430;
278 break;
279#endif
252b5132
RH		 280#ifdef ARCH_ns32k
281 case bfd_arch_ns32k:
282 disassemble = print_insn_ns32k;
283 break;
284#endif
285#ifdef ARCH_mcore
286 case bfd_arch_mcore:
287 disassemble = print_insn_mcore;
288 break;
289#endif
bd2f2e55
DB		 290#ifdef ARCH_mep
291 case bfd_arch_mep:
292 disassemble = print_insn_mep;
293 break;
294#endif
252b5132
RH		 295#ifdef ARCH_mips
296 case bfd_arch_mips:
297 if (bfd_big_endian (abfd))
298 disassemble = print_insn_big_mips;
299 else
300 disassemble = print_insn_little_mips;
301 break;
302#endif
3c3bdf30
NC		 303#ifdef ARCH_mmix
304 case bfd_arch_mmix:
305 disassemble = print_insn_mmix;
306 break;
307#endif
252b5132
RH		 308#ifdef ARCH_mn10200
309 case bfd_arch_mn10200:
310 disassemble = print_insn_mn10200;
311 break;
312#endif
313#ifdef ARCH_mn10300
314 case bfd_arch_mn10300:
315 disassemble = print_insn_mn10300;
316 break;
317#endif
87e6d782
NC		 318#ifdef ARCH_openrisc
319 case bfd_arch_openrisc:
320 disassemble = print_insn_openrisc;
321 break;
322#endif
3b16e843
NC		 323#ifdef ARCH_or32
324 case bfd_arch_or32:
325 if (bfd_big_endian (abfd))
326 disassemble = print_insn_big_or32;
327 else
328 disassemble = print_insn_little_or32;
329 break;
330#endif
e135f41b
NC		 331#ifdef ARCH_pdp11
332 case bfd_arch_pdp11:
333 disassemble = print_insn_pdp11;
334 break;
335#endif
1e608f98
ILT		 336#ifdef ARCH_pj
337 case bfd_arch_pj:
338 disassemble = print_insn_pj;
339 break;
340#endif
252b5132
RH		 341#ifdef ARCH_powerpc
342 case bfd_arch_powerpc:
343 if (bfd_big_endian (abfd))
344 disassemble = print_insn_big_powerpc;
345 else
346 disassemble = print_insn_little_powerpc;
347 break;
348#endif
349#ifdef ARCH_rs6000
350 case bfd_arch_rs6000:
39c20e8f 351 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP		 352 disassemble = print_insn_big_powerpc;
353 else
354 disassemble = print_insn_rs6000;
252b5132
RH		 355 break;
356#endif
c7927a3c
NC		 357#ifdef ARCH_rx
358 case bfd_arch_rx:
359 disassemble = print_insn_rx;
360 break;
361#endif
a85d7ed0
NC		 362#ifdef ARCH_s390
363 case bfd_arch_s390:
364 disassemble = print_insn_s390;
365 break;
366#endif
1c0d3aa6
NC		 367#ifdef ARCH_score
368 case bfd_arch_score:
369 if (bfd_big_endian (abfd))
370 disassemble = print_insn_big_score;
371 else
372 disassemble = print_insn_little_score;
373 break;
374#endif
252b5132
RH		 375#ifdef ARCH_sh
376 case bfd_arch_sh:
1c509ca8 377 disassemble = print_insn_sh;
252b5132
RH		 378 break;
379#endif
380#ifdef ARCH_sparc
381 case bfd_arch_sparc:
382 disassemble = print_insn_sparc;
383 break;
384#endif
e9f53129
AM		 385#ifdef ARCH_spu
386 case bfd_arch_spu:
387 disassemble = print_insn_spu;
388 break;
389#endif
252b5132
RH		 390#ifdef ARCH_tic30
391 case bfd_arch_tic30:
392 disassemble = print_insn_tic30;
393 break;
394#endif
026df7c5
NC		 395#ifdef ARCH_tic4x
396 case bfd_arch_tic4x:
397 disassemble = print_insn_tic4x;
398 break;
399#endif
5c84d377
TW		 400#ifdef ARCH_tic54x
401 case bfd_arch_tic54x:
402 disassemble = print_insn_tic54x;
403 break;
404#endif
40b36596
JM		 405#ifdef ARCH_tic6x
406 case bfd_arch_tic6x:
407 disassemble = print_insn_tic6x;
408 break;
409#endif
252b5132
RH		 410#ifdef ARCH_tic80
411 case bfd_arch_tic80:
412 disassemble = print_insn_tic80;
413 break;
414#endif
415#ifdef ARCH_v850
416 case bfd_arch_v850:
417 disassemble = print_insn_v850;
418 break;
419#endif
420#ifdef ARCH_w65
421 case bfd_arch_w65:
422 disassemble = print_insn_w65;
423 break;
424#endif
93fbbb04
GK		 425#ifdef ARCH_xstormy16
426 case bfd_arch_xstormy16:
427 disassemble = print_insn_xstormy16;
428 break;
429#endif
d70c5fc7
NC		 430#ifdef ARCH_xc16x
431 case bfd_arch_xc16x:
432 disassemble = print_insn_xc16x;
433 break;
434#endif
e0001a05
NC		 435#ifdef ARCH_xtensa
436 case bfd_arch_xtensa:
437 disassemble = print_insn_xtensa;
438 break;
439#endif
3c9b82ba
NC		 440#ifdef ARCH_z80
441 case bfd_arch_z80:
442 disassemble = print_insn_z80;
443 break;
444#endif
252b5132
RH		 445#ifdef ARCH_z8k
446 case bfd_arch_z8k:
447 if (bfd_get_mach(abfd) == bfd_mach_z8001)
448 disassemble = print_insn_z8001;
b7ed8fad 449 else
252b5132
RH		 450 disassemble = print_insn_z8002;
451 break;
452#endif
453#ifdef ARCH_vax
454 case bfd_arch_vax:
455 disassemble = print_insn_vax;
456 break;
fd3c93d5
DB		 457#endif
458#ifdef ARCH_frv
459 case bfd_arch_frv:
460 disassemble = print_insn_frv;
461 break;
47b1a55a 462#endif
59b1530d
AG		 463#ifdef ARCH_moxie
464 case bfd_arch_moxie:
465 disassemble = print_insn_moxie;
466 break;
467#endif
47b1a55a
SC		 468#ifdef ARCH_iq2000
469 case bfd_arch_iq2000:
470 disassemble = print_insn_iq2000;
471 break;
49f58d10
JB		 472#endif
473#ifdef ARCH_m32c
474 case bfd_arch_m32c:
475 disassemble = print_insn_m32c;
476 break;
252b5132
RH		 477#endif
478 default:
479 return 0;
480 }
481 return disassemble;
482}
94470b23
NC		 483
484void
9aaaa291 485disassembler_usage (stream)
7f32bebc 486 FILE * stream ATTRIBUTE_UNUSED;
94470b23 487{
58efb6c0
NC		 488#ifdef ARCH_arm
489 print_arm_disassembler_options (stream);
490#endif
640c0ccd
CD		 491#ifdef ARCH_mips
492 print_mips_disassembler_options (stream);
493#endif
07dd56a9
NC		 494#ifdef ARCH_powerpc
495 print_ppc_disassembler_options (stream);
496#endif
f59a29b9
L		 497#ifdef ARCH_i386
498 print_i386_disassembler_options (stream);
499#endif
112b7c50
AK		 500#ifdef ARCH_s390
501 print_s390_disassembler_options (stream);
502#endif
b7ed8fad 503
94470b23
NC		 504 return;
505}
22a398e1
NC		 506
507void
508disassemble_init_for_target (struct disassemble_info * info)
509{
510 if (info == NULL)
511 return;
512
513 switch (info->arch)
514 {
515#ifdef ARCH_arm
516 case bfd_arch_arm:
517 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 518 info->disassembler_needs_relocs = TRUE;
22a398e1 519 break;
0bcb06d2
AS		 520#endif
521#ifdef ARCH_ia64
522 case bfd_arch_ia64:
523 info->skip_zeroes = 16;
524 break;
525#endif
526#ifdef ARCH_tic4x
527 case bfd_arch_tic4x:
528 info->skip_zeroes = 32;
fb53f5a8 529 break;
49f58d10 530#endif
bd2f2e55
DB		 531#ifdef ARCH_mep
532 case bfd_arch_mep:
533 info->skip_zeroes = 256;
534 info->skip_zeroes_at_end = 0;
535 break;
536#endif
49f58d10
JB		 537#ifdef ARCH_m32c
538 case bfd_arch_m32c:
539 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB		 540 if (! info->insn_sets)
541 {
542 info->insn_sets = cgen_bitset_create (ISA_MAX);
543 if (info->mach == bfd_mach_m16c)
544 cgen_bitset_set (info->insn_sets, ISA_M16C);
545 else
546 cgen_bitset_set (info->insn_sets, ISA_M32C);
547 }
49f58d10 548 break;
22a398e1
NC		 549#endif
550 default:
551 break;
552 }
553}
GDB Binutils - Deliverables
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