projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
More build fixes in opcodes
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
aef6203b 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
9b201bb5 3 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
252b5132 4
9b201bb5
NC		 5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
7499d566 8 it under the terms of the GNU General Public License as published by
9b201bb5 9 the Free Software Foundation; either version 3 of the License, or
7499d566 10 (at your option) any later version.
252b5132 11
7499d566
NC		 12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
252b5132 16
7499d566
NC		 17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
9b201bb5
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
0d8dfecf 22#include "sysdep.h"
252b5132
RH		 23#include "dis-asm.h"
24
25#ifdef ARCH_all
252b5132
RH		 26#define ARCH_alpha
27#define ARCH_arc
28#define ARCH_arm
adde6300 29#define ARCH_avr
4b7f6baa 30#define ARCH_bfin
3d3d428f 31#define ARCH_cr16
6c95a37f 32#define ARCH_cris
1fe1f39c 33#define ARCH_crx
252b5132
RH		 34#define ARCH_d10v
35#define ARCH_d30v
d172d4ba 36#define ARCH_dlx
e729279b
NC		 37#define ARCH_fr30
38#define ARCH_frv
252b5132
RH		 39#define ARCH_h8300
40#define ARCH_h8500
41#define ARCH_hppa
5b93d8bb 42#define ARCH_i370
252b5132 43#define ARCH_i386
9d751335 44#define ARCH_i860
252b5132 45#define ARCH_i960
800eeca4 46#define ARCH_ia64
e729279b
NC		 47#define ARCH_ip2k
48#define ARCH_iq2000
84e94c90 49#define ARCH_lm32
e729279b 50#define ARCH_m32c
252b5132 51#define ARCH_m32r
60bcf0fa
NC		 52#define ARCH_m68hc11
53#define ARCH_m68hc12
e729279b 54#define ARCH_m68k
252b5132 55#define ARCH_m88k
7499d566 56#define ARCH_maxq
252b5132 57#define ARCH_mcore
bd2f2e55 58#define ARCH_mep
7ba29e2a 59#define ARCH_microblaze
252b5132 60#define ARCH_mips
3c3bdf30 61#define ARCH_mmix
252b5132
RH		 62#define ARCH_mn10200
63#define ARCH_mn10300
59b1530d 64#define ARCH_moxie
d031aafb 65#define ARCH_mt
2469cfa2 66#define ARCH_msp430
252b5132 67#define ARCH_ns32k
87e6d782 68#define ARCH_openrisc
3b16e843 69#define ARCH_or32
e135f41b 70#define ARCH_pdp11
1e608f98 71#define ARCH_pj
252b5132
RH		 72#define ARCH_powerpc
73#define ARCH_rs6000
a85d7ed0 74#define ARCH_s390
1c0d3aa6 75#define ARCH_score
252b5132
RH		 76#define ARCH_sh
77#define ARCH_sparc
e9f53129 78#define ARCH_spu
252b5132 79#define ARCH_tic30
026df7c5 80#define ARCH_tic4x
5c84d377 81#define ARCH_tic54x
252b5132
RH		 82#define ARCH_tic80
83#define ARCH_v850
84#define ARCH_vax
85#define ARCH_w65
93fbbb04 86#define ARCH_xstormy16
d70c5fc7 87#define ARCH_xc16x
e0001a05 88#define ARCH_xtensa
3c9b82ba 89#define ARCH_z80
252b5132 90#define ARCH_z8k
d28847ce 91#define INCLUDE_SHMEDIA
252b5132
RH		 92#endif
93
49f58d10
JB		 94#ifdef ARCH_m32c
95#include "m32c-desc.h"
96#endif
252b5132
RH		 97
98disassembler_ftype
99disassembler (abfd)
100 bfd *abfd;
101{
102 enum bfd_architecture a = bfd_get_arch (abfd);
103 disassembler_ftype disassemble;
104
105 switch (a)
106 {
107 /* If you add a case to this table, also add it to the
108 ARCH_all definition right above this function. */
252b5132
RH		 109#ifdef ARCH_alpha
110 case bfd_arch_alpha:
111 disassemble = print_insn_alpha;
112 break;
113#endif
114#ifdef ARCH_arc
115 case bfd_arch_arc:
116 {
0d2bcfaf 117 disassemble = arc_get_disassembler (abfd);
252b5132
RH		 118 break;
119 }
120#endif
121#ifdef ARCH_arm
122 case bfd_arch_arm:
123 if (bfd_big_endian (abfd))
124 disassemble = print_insn_big_arm;
125 else
126 disassemble = print_insn_little_arm;
127 break;
128#endif
adde6300
AM		 129#ifdef ARCH_avr
130 case bfd_arch_avr:
131 disassemble = print_insn_avr;
132 break;
133#endif
4b7f6baa
CM		 134#ifdef ARCH_bfin
135 case bfd_arch_bfin:
136 disassemble = print_insn_bfin;
137 break;
138#endif
3d3d428f
NC		 139#ifdef ARCH_cr16
140 case bfd_arch_cr16:
141 disassemble = print_insn_cr16;
142 break;
143#endif
6c95a37f
HPN		 144#ifdef ARCH_cris
145 case bfd_arch_cris:
78966507 146 disassemble = cris_get_disassembler (abfd);
6c95a37f 147 break;
1fe1f39c
NC		 148#endif
149#ifdef ARCH_crx
150 case bfd_arch_crx:
151 disassemble = print_insn_crx;
152 break;
6c95a37f 153#endif
252b5132
RH		 154#ifdef ARCH_d10v
155 case bfd_arch_d10v:
156 disassemble = print_insn_d10v;
157 break;
158#endif
159#ifdef ARCH_d30v
160 case bfd_arch_d30v:
161 disassemble = print_insn_d30v;
162 break;
163#endif
d172d4ba
NC		 164#ifdef ARCH_dlx
165 case bfd_arch_dlx:
166 /* As far as I know we only handle big-endian DLX objects. */
167 disassemble = print_insn_dlx;
168 break;
169#endif
252b5132
RH		 170#ifdef ARCH_h8300
171 case bfd_arch_h8300:
049f8936
NC		 172 if (bfd_get_mach (abfd) == bfd_mach_h8300h
173 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
252b5132 174 disassemble = print_insn_h8300h;
049f8936 175 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
d43ff6d2 176 || bfd_get_mach (abfd) == bfd_mach_h8300sn
a53b85e2
AO		 177 || bfd_get_mach (abfd) == bfd_mach_h8300sx
178 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
252b5132 179 disassemble = print_insn_h8300s;
b7ed8fad 180 else
252b5132
RH		 181 disassemble = print_insn_h8300;
182 break;
183#endif
184#ifdef ARCH_h8500
185 case bfd_arch_h8500:
186 disassemble = print_insn_h8500;
187 break;
188#endif
189#ifdef ARCH_hppa
190 case bfd_arch_hppa:
191 disassemble = print_insn_hppa;
192 break;
193#endif
5b93d8bb
AM		 194#ifdef ARCH_i370
195 case bfd_arch_i370:
196 disassemble = print_insn_i370;
197 break;
198#endif
252b5132
RH		 199#ifdef ARCH_i386
200 case bfd_arch_i386:
8a9036a4 201 case bfd_arch_l1om:
e396998b 202 disassemble = print_insn_i386;
252b5132
RH		 203 break;
204#endif
9d751335
JE		 205#ifdef ARCH_i860
206 case bfd_arch_i860:
207 disassemble = print_insn_i860;
208 break;
209#endif
252b5132
RH		 210#ifdef ARCH_i960
211 case bfd_arch_i960:
212 disassemble = print_insn_i960;
213 break;
214#endif
800eeca4
JW		 215#ifdef ARCH_ia64
216 case bfd_arch_ia64:
217 disassemble = print_insn_ia64;
218 break;
219#endif
a40cbfa3
NC		 220#ifdef ARCH_ip2k
221 case bfd_arch_ip2k:
222 disassemble = print_insn_ip2k;
223 break;
224#endif
252b5132
RH		 225#ifdef ARCH_fr30
226 case bfd_arch_fr30:
227 disassemble = print_insn_fr30;
228 break;
229#endif
84e94c90
NC		 230#ifdef ARCH_lm32
231 case bfd_arch_lm32:
232 disassemble = print_insn_lm32;
233 break;
234#endif
252b5132
RH		 235#ifdef ARCH_m32r
236 case bfd_arch_m32r:
237 disassemble = print_insn_m32r;
238 break;
239#endif
60bcf0fa
NC		 240#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
241 case bfd_arch_m68hc11:
242 disassemble = print_insn_m68hc11;
243 break;
244 case bfd_arch_m68hc12:
245 disassemble = print_insn_m68hc12;
246 break;
247#endif
252b5132
RH		 248#ifdef ARCH_m68k
249 case bfd_arch_m68k:
250 disassemble = print_insn_m68k;
251 break;
252#endif
253#ifdef ARCH_m88k
254 case bfd_arch_m88k:
255 disassemble = print_insn_m88k;
256 break;
257#endif
7499d566
NC		 258#ifdef ARCH_maxq
259 case bfd_arch_maxq:
260 disassemble = print_insn_maxq_little;
261 break;
262#endif
d031aafb
NS		 263#ifdef ARCH_mt
264 case bfd_arch_mt:
265 disassemble = print_insn_mt;
ac188222
DB		 266 break;
267#endif
7ba29e2a
NC		 268#ifdef ARCH_microblaze
269 case bfd_arch_microblaze:
270 disassemble = print_insn_microblaze;
271 break;
272#endif
2469cfa2
NC		 273#ifdef ARCH_msp430
274 case bfd_arch_msp430:
275 disassemble = print_insn_msp430;
276 break;
277#endif
252b5132
RH		 278#ifdef ARCH_ns32k
279 case bfd_arch_ns32k:
280 disassemble = print_insn_ns32k;
281 break;
282#endif
283#ifdef ARCH_mcore
284 case bfd_arch_mcore:
285 disassemble = print_insn_mcore;
286 break;
287#endif
bd2f2e55
DB		 288#ifdef ARCH_mep
289 case bfd_arch_mep:
290 disassemble = print_insn_mep;
291 break;
292#endif
252b5132
RH		 293#ifdef ARCH_mips
294 case bfd_arch_mips:
295 if (bfd_big_endian (abfd))
296 disassemble = print_insn_big_mips;
297 else
298 disassemble = print_insn_little_mips;
299 break;
300#endif
3c3bdf30
NC		 301#ifdef ARCH_mmix
302 case bfd_arch_mmix:
303 disassemble = print_insn_mmix;
304 break;
305#endif
252b5132
RH		 306#ifdef ARCH_mn10200
307 case bfd_arch_mn10200:
308 disassemble = print_insn_mn10200;
309 break;
310#endif
311#ifdef ARCH_mn10300
312 case bfd_arch_mn10300:
313 disassemble = print_insn_mn10300;
314 break;
315#endif
87e6d782
NC		 316#ifdef ARCH_openrisc
317 case bfd_arch_openrisc:
318 disassemble = print_insn_openrisc;
319 break;
320#endif
3b16e843
NC		 321#ifdef ARCH_or32
322 case bfd_arch_or32:
323 if (bfd_big_endian (abfd))
324 disassemble = print_insn_big_or32;
325 else
326 disassemble = print_insn_little_or32;
327 break;
328#endif
e135f41b
NC		 329#ifdef ARCH_pdp11
330 case bfd_arch_pdp11:
331 disassemble = print_insn_pdp11;
332 break;
333#endif
1e608f98
ILT		 334#ifdef ARCH_pj
335 case bfd_arch_pj:
336 disassemble = print_insn_pj;
337 break;
338#endif
252b5132
RH		 339#ifdef ARCH_powerpc
340 case bfd_arch_powerpc:
341 if (bfd_big_endian (abfd))
342 disassemble = print_insn_big_powerpc;
343 else
344 disassemble = print_insn_little_powerpc;
345 break;
346#endif
347#ifdef ARCH_rs6000
348 case bfd_arch_rs6000:
39c20e8f 349 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP		 350 disassemble = print_insn_big_powerpc;
351 else
352 disassemble = print_insn_rs6000;
252b5132
RH		 353 break;
354#endif
a85d7ed0
NC		 355#ifdef ARCH_s390
356 case bfd_arch_s390:
357 disassemble = print_insn_s390;
358 break;
359#endif
1c0d3aa6
NC		 360#ifdef ARCH_score
361 case bfd_arch_score:
362 if (bfd_big_endian (abfd))
363 disassemble = print_insn_big_score;
364 else
365 disassemble = print_insn_little_score;
366 break;
367#endif
252b5132
RH		 368#ifdef ARCH_sh
369 case bfd_arch_sh:
1c509ca8 370 disassemble = print_insn_sh;
252b5132
RH		 371 break;
372#endif
373#ifdef ARCH_sparc
374 case bfd_arch_sparc:
375 disassemble = print_insn_sparc;
376 break;
377#endif
e9f53129
AM		 378#ifdef ARCH_spu
379 case bfd_arch_spu:
380 disassemble = print_insn_spu;
381 break;
382#endif
252b5132
RH		 383#ifdef ARCH_tic30
384 case bfd_arch_tic30:
385 disassemble = print_insn_tic30;
386 break;
387#endif
026df7c5
NC		 388#ifdef ARCH_tic4x
389 case bfd_arch_tic4x:
390 disassemble = print_insn_tic4x;
391 break;
392#endif
5c84d377
TW		 393#ifdef ARCH_tic54x
394 case bfd_arch_tic54x:
395 disassemble = print_insn_tic54x;
396 break;
397#endif
252b5132
RH		 398#ifdef ARCH_tic80
399 case bfd_arch_tic80:
400 disassemble = print_insn_tic80;
401 break;
402#endif
403#ifdef ARCH_v850
404 case bfd_arch_v850:
405 disassemble = print_insn_v850;
406 break;
407#endif
408#ifdef ARCH_w65
409 case bfd_arch_w65:
410 disassemble = print_insn_w65;
411 break;
412#endif
93fbbb04
GK		 413#ifdef ARCH_xstormy16
414 case bfd_arch_xstormy16:
415 disassemble = print_insn_xstormy16;
416 break;
417#endif
d70c5fc7
NC		 418#ifdef ARCH_xc16x
419 case bfd_arch_xc16x:
420 disassemble = print_insn_xc16x;
421 break;
422#endif
e0001a05
NC		 423#ifdef ARCH_xtensa
424 case bfd_arch_xtensa:
425 disassemble = print_insn_xtensa;
426 break;
427#endif
3c9b82ba
NC		 428#ifdef ARCH_z80
429 case bfd_arch_z80:
430 disassemble = print_insn_z80;
431 break;
432#endif
252b5132
RH		 433#ifdef ARCH_z8k
434 case bfd_arch_z8k:
435 if (bfd_get_mach(abfd) == bfd_mach_z8001)
436 disassemble = print_insn_z8001;
b7ed8fad 437 else
252b5132
RH		 438 disassemble = print_insn_z8002;
439 break;
440#endif
441#ifdef ARCH_vax
442 case bfd_arch_vax:
443 disassemble = print_insn_vax;
444 break;
fd3c93d5
DB		 445#endif
446#ifdef ARCH_frv
447 case bfd_arch_frv:
448 disassemble = print_insn_frv;
449 break;
47b1a55a 450#endif
59b1530d
AG		 451#ifdef ARCH_moxie
452 case bfd_arch_moxie:
453 disassemble = print_insn_moxie;
454 break;
455#endif
47b1a55a
SC		 456#ifdef ARCH_iq2000
457 case bfd_arch_iq2000:
458 disassemble = print_insn_iq2000;
459 break;
49f58d10
JB		 460#endif
461#ifdef ARCH_m32c
462 case bfd_arch_m32c:
463 disassemble = print_insn_m32c;
464 break;
252b5132
RH		 465#endif
466 default:
467 return 0;
468 }
469 return disassemble;
470}
94470b23
NC		 471
472void
9aaaa291 473disassembler_usage (stream)
7f32bebc 474 FILE * stream ATTRIBUTE_UNUSED;
94470b23 475{
58efb6c0
NC		 476#ifdef ARCH_arm
477 print_arm_disassembler_options (stream);
478#endif
640c0ccd
CD		 479#ifdef ARCH_mips
480 print_mips_disassembler_options (stream);
481#endif
07dd56a9
NC		 482#ifdef ARCH_powerpc
483 print_ppc_disassembler_options (stream);
484#endif
f59a29b9
L		 485#ifdef ARCH_i386
486 print_i386_disassembler_options (stream);
487#endif
112b7c50
AK		 488#ifdef ARCH_s390
489 print_s390_disassembler_options (stream);
490#endif
b7ed8fad 491
94470b23
NC		 492 return;
493}
22a398e1
NC		 494
495void
496disassemble_init_for_target (struct disassemble_info * info)
497{
498 if (info == NULL)
499 return;
500
501 switch (info->arch)
502 {
503#ifdef ARCH_arm
504 case bfd_arch_arm:
505 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 506 info->disassembler_needs_relocs = TRUE;
22a398e1 507 break;
0bcb06d2
AS		 508#endif
509#ifdef ARCH_ia64
510 case bfd_arch_ia64:
511 info->skip_zeroes = 16;
512 break;
513#endif
514#ifdef ARCH_tic4x
515 case bfd_arch_tic4x:
516 info->skip_zeroes = 32;
fb53f5a8 517 break;
49f58d10 518#endif
bd2f2e55
DB		 519#ifdef ARCH_mep
520 case bfd_arch_mep:
521 info->skip_zeroes = 256;
522 info->skip_zeroes_at_end = 0;
523 break;
524#endif
49f58d10
JB		 525#ifdef ARCH_m32c
526 case bfd_arch_m32c:
527 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB		 528 if (! info->insn_sets)
529 {
530 info->insn_sets = cgen_bitset_create (ISA_MAX);
531 if (info->mach == bfd_mach_m16c)
532 cgen_bitset_set (info->insn_sets, ISA_M16C);
533 else
534 cgen_bitset_set (info->insn_sets, ISA_M32C);
535 }
49f58d10 536 break;
22a398e1
NC		 537#endif
538 default:
539 break;
540 }
541}
GDB Binutils - Deliverables
This page took 0.432713 seconds and 4 git commands to generate.