x86: fold to-scalar-int conversion insns
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
219d1afa 2 Copyright (C) 1994-2018 Free Software Foundation, Inc.
252b5132 3
9b201bb5
NC
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7499d566 7 it under the terms of the GNU General Public License as published by
9b201bb5 8 the Free Software Foundation; either version 3 of the License, or
7499d566 9 (at your option) any later version.
252b5132 10
7499d566
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
7499d566
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
9b201bb5
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
0d8dfecf 21#include "sysdep.h"
88c1242d 22#include "disassemble.h"
65b48a81 23#include "safe-ctype.h"
003ca0fd 24#include <assert.h>
252b5132
RH
25
26#ifdef ARCH_all
a06ea964 27#define ARCH_aarch64
252b5132
RH
28#define ARCH_alpha
29#define ARCH_arc
30#define ARCH_arm
adde6300 31#define ARCH_avr
4b7f6baa 32#define ARCH_bfin
3d3d428f 33#define ARCH_cr16
6c95a37f 34#define ARCH_cris
1fe1f39c 35#define ARCH_crx
252b5132
RH
36#define ARCH_d10v
37#define ARCH_d30v
d172d4ba 38#define ARCH_dlx
56b13185 39#define ARCH_epiphany
e729279b
NC
40#define ARCH_fr30
41#define ARCH_frv
3f8107ab 42#define ARCH_ft32
252b5132
RH
43#define ARCH_h8300
44#define ARCH_h8500
45#define ARCH_hppa
5b93d8bb 46#define ARCH_i370
252b5132 47#define ARCH_i386
9d751335 48#define ARCH_i860
252b5132 49#define ARCH_i960
800eeca4 50#define ARCH_ia64
e729279b
NC
51#define ARCH_ip2k
52#define ARCH_iq2000
84e94c90 53#define ARCH_lm32
e729279b 54#define ARCH_m32c
252b5132 55#define ARCH_m32r
60bcf0fa
NC
56#define ARCH_m68hc11
57#define ARCH_m68hc12
e729279b 58#define ARCH_m68k
252b5132
RH
59#define ARCH_m88k
60#define ARCH_mcore
bd2f2e55 61#define ARCH_mep
a3c62988 62#define ARCH_metag
7ba29e2a 63#define ARCH_microblaze
252b5132 64#define ARCH_mips
3c3bdf30 65#define ARCH_mmix
252b5132
RH
66#define ARCH_mn10200
67#define ARCH_mn10300
59b1530d 68#define ARCH_moxie
d031aafb 69#define ARCH_mt
2469cfa2 70#define ARCH_msp430
35c08157 71#define ARCH_nds32
36591ba1 72#define ARCH_nios2
252b5132 73#define ARCH_ns32k
73589c9d 74#define ARCH_or1k
e135f41b 75#define ARCH_pdp11
1e608f98 76#define ARCH_pj
252b5132 77#define ARCH_powerpc
11146849 78#define ARCH_pru
0bccfb29 79#define ARCH_riscv
252b5132 80#define ARCH_rs6000
99c513f6 81#define ARCH_rl78
c7927a3c 82#define ARCH_rx
a85d7ed0 83#define ARCH_s390
1c0d3aa6 84#define ARCH_score
252b5132
RH
85#define ARCH_sh
86#define ARCH_sparc
e9f53129 87#define ARCH_spu
252b5132 88#define ARCH_tic30
026df7c5 89#define ARCH_tic4x
5c84d377 90#define ARCH_tic54x
40b36596 91#define ARCH_tic6x
252b5132 92#define ARCH_tic80
aa137e4d
NC
93#define ARCH_tilegx
94#define ARCH_tilepro
252b5132
RH
95#define ARCH_v850
96#define ARCH_vax
1945cfa5 97#define ARCH_visium
252b5132 98#define ARCH_w65
62ecb94c 99#define ARCH_wasm32
93fbbb04 100#define ARCH_xstormy16
d70c5fc7 101#define ARCH_xc16x
f6c1a2d5 102#define ARCH_xgate
e0001a05 103#define ARCH_xtensa
3c9b82ba 104#define ARCH_z80
252b5132 105#define ARCH_z8k
d28847ce 106#define INCLUDE_SHMEDIA
252b5132
RH
107#endif
108
49f58d10
JB
109#ifdef ARCH_m32c
110#include "m32c-desc.h"
111#endif
252b5132
RH
112
113disassembler_ftype
b28b8b5e
L
114disassembler (enum bfd_architecture a,
115 bfd_boolean big ATTRIBUTE_UNUSED,
116 unsigned long mach ATTRIBUTE_UNUSED,
e347efc3 117 bfd *abfd ATTRIBUTE_UNUSED)
252b5132 118{
252b5132
RH
119 disassembler_ftype disassemble;
120
121 switch (a)
122 {
123 /* If you add a case to this table, also add it to the
124 ARCH_all definition right above this function. */
a06ea964
NC
125#ifdef ARCH_aarch64
126 case bfd_arch_aarch64:
127 disassemble = print_insn_aarch64;
128 break;
129#endif
252b5132
RH
130#ifdef ARCH_alpha
131 case bfd_arch_alpha:
132 disassemble = print_insn_alpha;
133 break;
134#endif
135#ifdef ARCH_arc
136 case bfd_arch_arc:
6ca4eb77
AM
137 disassemble = arc_get_disassembler (abfd);
138 break;
252b5132
RH
139#endif
140#ifdef ARCH_arm
141 case bfd_arch_arm:
003ca0fd 142 if (big)
252b5132
RH
143 disassemble = print_insn_big_arm;
144 else
145 disassemble = print_insn_little_arm;
146 break;
147#endif
adde6300
AM
148#ifdef ARCH_avr
149 case bfd_arch_avr:
150 disassemble = print_insn_avr;
151 break;
152#endif
4b7f6baa
CM
153#ifdef ARCH_bfin
154 case bfd_arch_bfin:
155 disassemble = print_insn_bfin;
156 break;
157#endif
3d3d428f
NC
158#ifdef ARCH_cr16
159 case bfd_arch_cr16:
160 disassemble = print_insn_cr16;
161 break;
162#endif
6c95a37f
HPN
163#ifdef ARCH_cris
164 case bfd_arch_cris:
78966507 165 disassemble = cris_get_disassembler (abfd);
6c95a37f 166 break;
1fe1f39c
NC
167#endif
168#ifdef ARCH_crx
169 case bfd_arch_crx:
170 disassemble = print_insn_crx;
171 break;
6c95a37f 172#endif
252b5132
RH
173#ifdef ARCH_d10v
174 case bfd_arch_d10v:
175 disassemble = print_insn_d10v;
176 break;
177#endif
178#ifdef ARCH_d30v
179 case bfd_arch_d30v:
180 disassemble = print_insn_d30v;
181 break;
182#endif
d172d4ba
NC
183#ifdef ARCH_dlx
184 case bfd_arch_dlx:
185 /* As far as I know we only handle big-endian DLX objects. */
186 disassemble = print_insn_dlx;
187 break;
188#endif
252b5132
RH
189#ifdef ARCH_h8300
190 case bfd_arch_h8300:
003ca0fd 191 if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
252b5132 192 disassemble = print_insn_h8300h;
003ca0fd
YQ
193 else if (mach == bfd_mach_h8300s
194 || mach == bfd_mach_h8300sn
195 || mach == bfd_mach_h8300sx
196 || mach == bfd_mach_h8300sxn)
252b5132 197 disassemble = print_insn_h8300s;
b7ed8fad 198 else
252b5132
RH
199 disassemble = print_insn_h8300;
200 break;
201#endif
202#ifdef ARCH_h8500
203 case bfd_arch_h8500:
204 disassemble = print_insn_h8500;
205 break;
206#endif
207#ifdef ARCH_hppa
208 case bfd_arch_hppa:
209 disassemble = print_insn_hppa;
210 break;
211#endif
5b93d8bb
AM
212#ifdef ARCH_i370
213 case bfd_arch_i370:
214 disassemble = print_insn_i370;
215 break;
216#endif
252b5132
RH
217#ifdef ARCH_i386
218 case bfd_arch_i386:
7b6d09fb 219 case bfd_arch_iamcu:
8a9036a4 220 case bfd_arch_l1om:
7a9068fe 221 case bfd_arch_k1om:
e396998b 222 disassemble = print_insn_i386;
252b5132
RH
223 break;
224#endif
9d751335
JE
225#ifdef ARCH_i860
226 case bfd_arch_i860:
227 disassemble = print_insn_i860;
228 break;
229#endif
252b5132
RH
230#ifdef ARCH_i960
231 case bfd_arch_i960:
232 disassemble = print_insn_i960;
233 break;
234#endif
800eeca4
JW
235#ifdef ARCH_ia64
236 case bfd_arch_ia64:
237 disassemble = print_insn_ia64;
238 break;
239#endif
a40cbfa3
NC
240#ifdef ARCH_ip2k
241 case bfd_arch_ip2k:
242 disassemble = print_insn_ip2k;
243 break;
244#endif
cfb8c092
NC
245#ifdef ARCH_epiphany
246 case bfd_arch_epiphany:
247 disassemble = print_insn_epiphany;
248 break;
249#endif
252b5132
RH
250#ifdef ARCH_fr30
251 case bfd_arch_fr30:
252 disassemble = print_insn_fr30;
253 break;
254#endif
84e94c90
NC
255#ifdef ARCH_lm32
256 case bfd_arch_lm32:
257 disassemble = print_insn_lm32;
258 break;
259#endif
252b5132
RH
260#ifdef ARCH_m32r
261 case bfd_arch_m32r:
262 disassemble = print_insn_m32r;
263 break;
264#endif
6927f982
NC
265#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
266 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
60bcf0fa
NC
267 case bfd_arch_m68hc11:
268 disassemble = print_insn_m68hc11;
269 break;
270 case bfd_arch_m68hc12:
271 disassemble = print_insn_m68hc12;
272 break;
6927f982
NC
273 case bfd_arch_m9s12x:
274 disassemble = print_insn_m9s12x;
275 break;
276 case bfd_arch_m9s12xg:
277 disassemble = print_insn_m9s12xg;
278 break;
60bcf0fa 279#endif
252b5132
RH
280#ifdef ARCH_m68k
281 case bfd_arch_m68k:
282 disassemble = print_insn_m68k;
283 break;
284#endif
285#ifdef ARCH_m88k
286 case bfd_arch_m88k:
287 disassemble = print_insn_m88k;
288 break;
289#endif
d031aafb
NS
290#ifdef ARCH_mt
291 case bfd_arch_mt:
292 disassemble = print_insn_mt;
ac188222
DB
293 break;
294#endif
7ba29e2a
NC
295#ifdef ARCH_microblaze
296 case bfd_arch_microblaze:
297 disassemble = print_insn_microblaze;
298 break;
299#endif
2469cfa2
NC
300#ifdef ARCH_msp430
301 case bfd_arch_msp430:
302 disassemble = print_insn_msp430;
303 break;
304#endif
35c08157
KLC
305#ifdef ARCH_nds32
306 case bfd_arch_nds32:
307 disassemble = print_insn_nds32;
308 break;
309#endif
252b5132
RH
310#ifdef ARCH_ns32k
311 case bfd_arch_ns32k:
312 disassemble = print_insn_ns32k;
313 break;
314#endif
315#ifdef ARCH_mcore
316 case bfd_arch_mcore:
317 disassemble = print_insn_mcore;
318 break;
319#endif
bd2f2e55
DB
320#ifdef ARCH_mep
321 case bfd_arch_mep:
322 disassemble = print_insn_mep;
323 break;
324#endif
a3c62988
NC
325#ifdef ARCH_metag
326 case bfd_arch_metag:
327 disassemble = print_insn_metag;
328 break;
329#endif
252b5132
RH
330#ifdef ARCH_mips
331 case bfd_arch_mips:
003ca0fd 332 if (big)
252b5132
RH
333 disassemble = print_insn_big_mips;
334 else
335 disassemble = print_insn_little_mips;
336 break;
337#endif
3c3bdf30
NC
338#ifdef ARCH_mmix
339 case bfd_arch_mmix:
340 disassemble = print_insn_mmix;
341 break;
342#endif
252b5132
RH
343#ifdef ARCH_mn10200
344 case bfd_arch_mn10200:
345 disassemble = print_insn_mn10200;
346 break;
347#endif
348#ifdef ARCH_mn10300
349 case bfd_arch_mn10300:
350 disassemble = print_insn_mn10300;
351 break;
352#endif
36591ba1
SL
353#ifdef ARCH_nios2
354 case bfd_arch_nios2:
003ca0fd 355 if (big)
36591ba1
SL
356 disassemble = print_insn_big_nios2;
357 else
358 disassemble = print_insn_little_nios2;
359 break;
360#endif
73589c9d
CS
361#ifdef ARCH_or1k
362 case bfd_arch_or1k:
363 disassemble = print_insn_or1k;
3b16e843
NC
364 break;
365#endif
e135f41b
NC
366#ifdef ARCH_pdp11
367 case bfd_arch_pdp11:
368 disassemble = print_insn_pdp11;
369 break;
370#endif
1e608f98
ILT
371#ifdef ARCH_pj
372 case bfd_arch_pj:
373 disassemble = print_insn_pj;
374 break;
375#endif
252b5132
RH
376#ifdef ARCH_powerpc
377 case bfd_arch_powerpc:
52fe4420
AM
378#endif
379#ifdef ARCH_rs6000
380 case bfd_arch_rs6000:
381#endif
382#if defined ARCH_powerpc || defined ARCH_rs6000
003ca0fd 383 if (big)
252b5132
RH
384 disassemble = print_insn_big_powerpc;
385 else
386 disassemble = print_insn_little_powerpc;
387 break;
388#endif
11146849
DD
389#ifdef ARCH_pru
390 case bfd_arch_pru:
391 disassemble = print_insn_pru;
392 break;
393#endif
e23eba97
NC
394#ifdef ARCH_riscv
395 case bfd_arch_riscv:
396 disassemble = print_insn_riscv;
ae4c0df4 397 break;
e23eba97 398#endif
99c513f6
DD
399#ifdef ARCH_rl78
400 case bfd_arch_rl78:
0952813b 401 disassemble = rl78_get_disassembler (abfd);
99c513f6
DD
402 break;
403#endif
c7927a3c
NC
404#ifdef ARCH_rx
405 case bfd_arch_rx:
406 disassemble = print_insn_rx;
407 break;
408#endif
a85d7ed0
NC
409#ifdef ARCH_s390
410 case bfd_arch_s390:
411 disassemble = print_insn_s390;
412 break;
413#endif
1c0d3aa6
NC
414#ifdef ARCH_score
415 case bfd_arch_score:
003ca0fd 416 if (big)
6ca4eb77 417 disassemble = print_insn_big_score;
1c0d3aa6 418 else
6ca4eb77 419 disassemble = print_insn_little_score;
1c0d3aa6
NC
420 break;
421#endif
252b5132
RH
422#ifdef ARCH_sh
423 case bfd_arch_sh:
1c509ca8 424 disassemble = print_insn_sh;
252b5132
RH
425 break;
426#endif
427#ifdef ARCH_sparc
428 case bfd_arch_sparc:
429 disassemble = print_insn_sparc;
430 break;
431#endif
e9f53129
AM
432#ifdef ARCH_spu
433 case bfd_arch_spu:
434 disassemble = print_insn_spu;
435 break;
436#endif
252b5132
RH
437#ifdef ARCH_tic30
438 case bfd_arch_tic30:
439 disassemble = print_insn_tic30;
440 break;
441#endif
026df7c5
NC
442#ifdef ARCH_tic4x
443 case bfd_arch_tic4x:
444 disassemble = print_insn_tic4x;
445 break;
446#endif
5c84d377
TW
447#ifdef ARCH_tic54x
448 case bfd_arch_tic54x:
449 disassemble = print_insn_tic54x;
450 break;
451#endif
40b36596
JM
452#ifdef ARCH_tic6x
453 case bfd_arch_tic6x:
454 disassemble = print_insn_tic6x;
455 break;
456#endif
252b5132
RH
457#ifdef ARCH_tic80
458 case bfd_arch_tic80:
459 disassemble = print_insn_tic80;
460 break;
461#endif
3f8107ab
AM
462#ifdef ARCH_ft32
463 case bfd_arch_ft32:
464 disassemble = print_insn_ft32;
465 break;
466#endif
252b5132
RH
467#ifdef ARCH_v850
468 case bfd_arch_v850:
de863c74 469 case bfd_arch_v850_rh850:
252b5132
RH
470 disassemble = print_insn_v850;
471 break;
472#endif
473#ifdef ARCH_w65
474 case bfd_arch_w65:
475 disassemble = print_insn_w65;
476 break;
477#endif
62ecb94c
PC
478#ifdef ARCH_wasm32
479 case bfd_arch_wasm32:
480 disassemble = print_insn_wasm32;
481 break;
482#endif
f6c1a2d5
NC
483#ifdef ARCH_xgate
484 case bfd_arch_xgate:
485 disassemble = print_insn_xgate;
486 break;
487#endif
93fbbb04
GK
488#ifdef ARCH_xstormy16
489 case bfd_arch_xstormy16:
490 disassemble = print_insn_xstormy16;
491 break;
492#endif
d70c5fc7
NC
493#ifdef ARCH_xc16x
494 case bfd_arch_xc16x:
495 disassemble = print_insn_xc16x;
496 break;
497#endif
e0001a05
NC
498#ifdef ARCH_xtensa
499 case bfd_arch_xtensa:
500 disassemble = print_insn_xtensa;
501 break;
502#endif
3c9b82ba
NC
503#ifdef ARCH_z80
504 case bfd_arch_z80:
505 disassemble = print_insn_z80;
506 break;
507#endif
252b5132
RH
508#ifdef ARCH_z8k
509 case bfd_arch_z8k:
003ca0fd 510 if (mach == bfd_mach_z8001)
252b5132 511 disassemble = print_insn_z8001;
b7ed8fad 512 else
252b5132
RH
513 disassemble = print_insn_z8002;
514 break;
515#endif
516#ifdef ARCH_vax
517 case bfd_arch_vax:
518 disassemble = print_insn_vax;
519 break;
fd3c93d5 520#endif
1945cfa5
EB
521#ifdef ARCH_visium
522 case bfd_arch_visium:
523 disassemble = print_insn_visium;
524 break;
525#endif
fd3c93d5
DB
526#ifdef ARCH_frv
527 case bfd_arch_frv:
528 disassemble = print_insn_frv;
529 break;
47b1a55a 530#endif
59b1530d
AG
531#ifdef ARCH_moxie
532 case bfd_arch_moxie:
533 disassemble = print_insn_moxie;
534 break;
535#endif
47b1a55a
SC
536#ifdef ARCH_iq2000
537 case bfd_arch_iq2000:
538 disassemble = print_insn_iq2000;
539 break;
49f58d10
JB
540#endif
541#ifdef ARCH_m32c
542 case bfd_arch_m32c:
543 disassemble = print_insn_m32c;
544 break;
aa137e4d
NC
545#endif
546#ifdef ARCH_tilegx
547 case bfd_arch_tilegx:
548 disassemble = print_insn_tilegx;
549 break;
550#endif
551#ifdef ARCH_tilepro
552 case bfd_arch_tilepro:
553 disassemble = print_insn_tilepro;
554 break;
252b5132
RH
555#endif
556 default:
557 return 0;
558 }
559 return disassemble;
560}
94470b23
NC
561
562void
e6c7cdec 563disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
94470b23 564{
a06ea964
NC
565#ifdef ARCH_aarch64
566 print_aarch64_disassembler_options (stream);
567#endif
37fd5ef3
CZ
568#ifdef ARCH_arc
569 print_arc_disassembler_options (stream);
570#endif
58efb6c0
NC
571#ifdef ARCH_arm
572 print_arm_disassembler_options (stream);
573#endif
640c0ccd
CD
574#ifdef ARCH_mips
575 print_mips_disassembler_options (stream);
576#endif
07dd56a9
NC
577#ifdef ARCH_powerpc
578 print_ppc_disassembler_options (stream);
579#endif
e23eba97
NC
580#ifdef ARCH_riscv
581 print_riscv_disassembler_options (stream);
582#endif
f59a29b9
L
583#ifdef ARCH_i386
584 print_i386_disassembler_options (stream);
585#endif
112b7c50
AK
586#ifdef ARCH_s390
587 print_s390_disassembler_options (stream);
588#endif
62ecb94c
PC
589#ifdef ARCH_wasm32
590 print_wasm32_disassembler_options (stream);
591#endif
b7ed8fad 592
94470b23
NC
593 return;
594}
22a398e1
NC
595
596void
597disassemble_init_for_target (struct disassemble_info * info)
598{
599 if (info == NULL)
600 return;
601
602 switch (info->arch)
603 {
a06ea964
NC
604#ifdef ARCH_aarch64
605 case bfd_arch_aarch64:
606 info->symbol_is_valid = aarch64_symbol_is_valid;
607 info->disassembler_needs_relocs = TRUE;
608 break;
609#endif
22a398e1
NC
610#ifdef ARCH_arm
611 case bfd_arch_arm:
612 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 613 info->disassembler_needs_relocs = TRUE;
22a398e1 614 break;
0bcb06d2
AS
615#endif
616#ifdef ARCH_ia64
617 case bfd_arch_ia64:
618 info->skip_zeroes = 16;
619 break;
620#endif
621#ifdef ARCH_tic4x
622 case bfd_arch_tic4x:
623 info->skip_zeroes = 32;
fb53f5a8 624 break;
49f58d10 625#endif
bd2f2e55
DB
626#ifdef ARCH_mep
627 case bfd_arch_mep:
628 info->skip_zeroes = 256;
629 info->skip_zeroes_at_end = 0;
630 break;
631#endif
a3c62988
NC
632#ifdef ARCH_metag
633 case bfd_arch_metag:
634 info->disassembler_needs_relocs = TRUE;
635 break;
636#endif
49f58d10
JB
637#ifdef ARCH_m32c
638 case bfd_arch_m32c:
6ca4eb77
AM
639 /* This processor in fact is little endian. The value set here
640 reflects the way opcodes are written in the cgen description. */
49f58d10 641 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB
642 if (! info->insn_sets)
643 {
644 info->insn_sets = cgen_bitset_create (ISA_MAX);
645 if (info->mach == bfd_mach_m16c)
646 cgen_bitset_set (info->insn_sets, ISA_M16C);
647 else
648 cgen_bitset_set (info->insn_sets, ISA_M32C);
649 }
49f58d10 650 break;
b240011a 651#endif
024d185c
DD
652#ifdef ARCH_pru
653 case bfd_arch_pru:
654 info->disassembler_needs_relocs = TRUE;
655 break;
656#endif
fbc22555
DD
657#ifdef ARCH_powerpc
658 case bfd_arch_powerpc:
659#endif
b240011a
AM
660#ifdef ARCH_rs6000
661 case bfd_arch_rs6000:
662#endif
663#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
664 disassemble_init_powerpc (info);
665 break;
65b48a81 666#endif
62ecb94c
PC
667#ifdef ARCH_wasm32
668 case bfd_arch_wasm32:
669 disassemble_init_wasm32 (info);
670 break;
671#endif
65b48a81
PB
672#ifdef ARCH_s390
673 case bfd_arch_s390:
674 disassemble_init_s390 (info);
675 break;
22a398e1
NC
676#endif
677 default:
678 break;
679 }
680}
65b48a81
PB
681
682/* Remove whitespace and consecutive commas from OPTIONS. */
683
684char *
685remove_whitespace_and_extra_commas (char *options)
686{
687 char *str;
688 size_t i, len;
689
690 if (options == NULL)
691 return NULL;
692
693 /* Strip off all trailing whitespace and commas. */
694 for (len = strlen (options); len > 0; len--)
695 {
696 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
697 break;
698 options[len - 1] = '\0';
699 }
700
701 /* Convert all remaining whitespace to commas. */
702 for (i = 0; options[i] != '\0'; i++)
703 if (ISSPACE (options[i]))
704 options[i] = ',';
705
706 /* Remove consecutive commas. */
707 for (str = options; *str != '\0'; str++)
708 if (*str == ',' && (*(str + 1) == ',' || str == options))
709 {
710 char *next = str + 1;
711 while (*next == ',')
712 next++;
713 len = strlen (next);
714 if (str != options)
715 str++;
716 memmove (str, next, len);
717 next[len - (size_t)(next - str)] = '\0';
718 }
719 return (strlen (options) != 0) ? options : NULL;
720}
721
722/* Like STRCMP, but treat ',' the same as '\0' so that we match
723 strings like "foobar" against "foobar,xxyyzz,...". */
724
725int
726disassembler_options_cmp (const char *s1, const char *s2)
727{
728 unsigned char c1, c2;
729
730 do
731 {
732 c1 = (unsigned char) *s1++;
733 if (c1 == ',')
734 c1 = '\0';
735 c2 = (unsigned char) *s2++;
736 if (c2 == ',')
737 c2 = '\0';
738 if (c1 == '\0')
739 return c1 - c2;
740 }
741 while (c1 == c2);
742
743 return c1 - c2;
744}
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