Re-enable GAS for z8k-coff
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
aef6203b
AM
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005 Free Software Foundation, Inc.
252b5132 4
7499d566
NC
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
252b5132 9
7499d566
NC
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
252b5132 14
7499d566
NC
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
f4321104 17 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132 18
0d8dfecf 19#include "sysdep.h"
252b5132
RH
20#include "dis-asm.h"
21
22#ifdef ARCH_all
252b5132
RH
23#define ARCH_alpha
24#define ARCH_arc
25#define ARCH_arm
adde6300 26#define ARCH_avr
6c95a37f 27#define ARCH_cris
1fe1f39c 28#define ARCH_crx
252b5132
RH
29#define ARCH_d10v
30#define ARCH_d30v
d172d4ba 31#define ARCH_dlx
e729279b
NC
32#define ARCH_fr30
33#define ARCH_frv
252b5132
RH
34#define ARCH_h8300
35#define ARCH_h8500
36#define ARCH_hppa
5b93d8bb 37#define ARCH_i370
252b5132 38#define ARCH_i386
9d751335 39#define ARCH_i860
252b5132 40#define ARCH_i960
800eeca4 41#define ARCH_ia64
e729279b
NC
42#define ARCH_ip2k
43#define ARCH_iq2000
44#define ARCH_m32c
252b5132 45#define ARCH_m32r
60bcf0fa
NC
46#define ARCH_m68hc11
47#define ARCH_m68hc12
e729279b 48#define ARCH_m68k
252b5132 49#define ARCH_m88k
7499d566 50#define ARCH_maxq
252b5132
RH
51#define ARCH_mcore
52#define ARCH_mips
3c3bdf30 53#define ARCH_mmix
252b5132
RH
54#define ARCH_mn10200
55#define ARCH_mn10300
ac188222 56#define ARCH_ms1
2469cfa2 57#define ARCH_msp430
252b5132 58#define ARCH_ns32k
87e6d782 59#define ARCH_openrisc
3b16e843 60#define ARCH_or32
e135f41b 61#define ARCH_pdp11
1e608f98 62#define ARCH_pj
252b5132
RH
63#define ARCH_powerpc
64#define ARCH_rs6000
a85d7ed0 65#define ARCH_s390
252b5132
RH
66#define ARCH_sh
67#define ARCH_sparc
68#define ARCH_tic30
026df7c5 69#define ARCH_tic4x
5c84d377 70#define ARCH_tic54x
252b5132
RH
71#define ARCH_tic80
72#define ARCH_v850
73#define ARCH_vax
74#define ARCH_w65
93fbbb04 75#define ARCH_xstormy16
e0001a05 76#define ARCH_xtensa
252b5132 77#define ARCH_z8k
d28847ce 78#define INCLUDE_SHMEDIA
252b5132
RH
79#endif
80
49f58d10
JB
81#ifdef ARCH_m32c
82#include "m32c-desc.h"
83#endif
252b5132
RH
84
85disassembler_ftype
86disassembler (abfd)
87 bfd *abfd;
88{
89 enum bfd_architecture a = bfd_get_arch (abfd);
90 disassembler_ftype disassemble;
91
92 switch (a)
93 {
94 /* If you add a case to this table, also add it to the
95 ARCH_all definition right above this function. */
252b5132
RH
96#ifdef ARCH_alpha
97 case bfd_arch_alpha:
98 disassemble = print_insn_alpha;
99 break;
100#endif
101#ifdef ARCH_arc
102 case bfd_arch_arc:
103 {
0d2bcfaf 104 disassemble = arc_get_disassembler (abfd);
252b5132
RH
105 break;
106 }
107#endif
108#ifdef ARCH_arm
109 case bfd_arch_arm:
110 if (bfd_big_endian (abfd))
111 disassemble = print_insn_big_arm;
112 else
113 disassemble = print_insn_little_arm;
114 break;
115#endif
adde6300
AM
116#ifdef ARCH_avr
117 case bfd_arch_avr:
118 disassemble = print_insn_avr;
119 break;
120#endif
6c95a37f
HPN
121#ifdef ARCH_cris
122 case bfd_arch_cris:
78966507 123 disassemble = cris_get_disassembler (abfd);
6c95a37f 124 break;
1fe1f39c
NC
125#endif
126#ifdef ARCH_crx
127 case bfd_arch_crx:
128 disassemble = print_insn_crx;
129 break;
6c95a37f 130#endif
252b5132
RH
131#ifdef ARCH_d10v
132 case bfd_arch_d10v:
133 disassemble = print_insn_d10v;
134 break;
135#endif
136#ifdef ARCH_d30v
137 case bfd_arch_d30v:
138 disassemble = print_insn_d30v;
139 break;
140#endif
d172d4ba
NC
141#ifdef ARCH_dlx
142 case bfd_arch_dlx:
143 /* As far as I know we only handle big-endian DLX objects. */
144 disassemble = print_insn_dlx;
145 break;
146#endif
252b5132
RH
147#ifdef ARCH_h8300
148 case bfd_arch_h8300:
049f8936
NC
149 if (bfd_get_mach (abfd) == bfd_mach_h8300h
150 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
252b5132 151 disassemble = print_insn_h8300h;
049f8936 152 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
d43ff6d2 153 || bfd_get_mach (abfd) == bfd_mach_h8300sn
a53b85e2
AO
154 || bfd_get_mach (abfd) == bfd_mach_h8300sx
155 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
252b5132 156 disassemble = print_insn_h8300s;
b7ed8fad 157 else
252b5132
RH
158 disassemble = print_insn_h8300;
159 break;
160#endif
161#ifdef ARCH_h8500
162 case bfd_arch_h8500:
163 disassemble = print_insn_h8500;
164 break;
165#endif
166#ifdef ARCH_hppa
167 case bfd_arch_hppa:
168 disassemble = print_insn_hppa;
169 break;
170#endif
5b93d8bb
AM
171#ifdef ARCH_i370
172 case bfd_arch_i370:
173 disassemble = print_insn_i370;
174 break;
175#endif
252b5132
RH
176#ifdef ARCH_i386
177 case bfd_arch_i386:
e396998b 178 disassemble = print_insn_i386;
252b5132
RH
179 break;
180#endif
9d751335
JE
181#ifdef ARCH_i860
182 case bfd_arch_i860:
183 disassemble = print_insn_i860;
184 break;
185#endif
252b5132
RH
186#ifdef ARCH_i960
187 case bfd_arch_i960:
188 disassemble = print_insn_i960;
189 break;
190#endif
800eeca4
JW
191#ifdef ARCH_ia64
192 case bfd_arch_ia64:
193 disassemble = print_insn_ia64;
194 break;
195#endif
a40cbfa3
NC
196#ifdef ARCH_ip2k
197 case bfd_arch_ip2k:
198 disassemble = print_insn_ip2k;
199 break;
200#endif
252b5132
RH
201#ifdef ARCH_fr30
202 case bfd_arch_fr30:
203 disassemble = print_insn_fr30;
204 break;
205#endif
206#ifdef ARCH_m32r
207 case bfd_arch_m32r:
208 disassemble = print_insn_m32r;
209 break;
210#endif
60bcf0fa
NC
211#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
212 case bfd_arch_m68hc11:
213 disassemble = print_insn_m68hc11;
214 break;
215 case bfd_arch_m68hc12:
216 disassemble = print_insn_m68hc12;
217 break;
218#endif
252b5132
RH
219#ifdef ARCH_m68k
220 case bfd_arch_m68k:
221 disassemble = print_insn_m68k;
222 break;
223#endif
224#ifdef ARCH_m88k
225 case bfd_arch_m88k:
226 disassemble = print_insn_m88k;
227 break;
228#endif
7499d566
NC
229#ifdef ARCH_maxq
230 case bfd_arch_maxq:
231 disassemble = print_insn_maxq_little;
232 break;
233#endif
ac188222
DB
234#ifdef ARCH_ms1
235 case bfd_arch_ms1:
236 disassemble = print_insn_ms1;
237 break;
238#endif
2469cfa2
NC
239#ifdef ARCH_msp430
240 case bfd_arch_msp430:
241 disassemble = print_insn_msp430;
242 break;
243#endif
252b5132
RH
244#ifdef ARCH_ns32k
245 case bfd_arch_ns32k:
246 disassemble = print_insn_ns32k;
247 break;
248#endif
249#ifdef ARCH_mcore
250 case bfd_arch_mcore:
251 disassemble = print_insn_mcore;
252 break;
253#endif
254#ifdef ARCH_mips
255 case bfd_arch_mips:
256 if (bfd_big_endian (abfd))
257 disassemble = print_insn_big_mips;
258 else
259 disassemble = print_insn_little_mips;
260 break;
261#endif
3c3bdf30
NC
262#ifdef ARCH_mmix
263 case bfd_arch_mmix:
264 disassemble = print_insn_mmix;
265 break;
266#endif
252b5132
RH
267#ifdef ARCH_mn10200
268 case bfd_arch_mn10200:
269 disassemble = print_insn_mn10200;
270 break;
271#endif
272#ifdef ARCH_mn10300
273 case bfd_arch_mn10300:
274 disassemble = print_insn_mn10300;
275 break;
276#endif
87e6d782
NC
277#ifdef ARCH_openrisc
278 case bfd_arch_openrisc:
279 disassemble = print_insn_openrisc;
280 break;
281#endif
3b16e843
NC
282#ifdef ARCH_or32
283 case bfd_arch_or32:
284 if (bfd_big_endian (abfd))
285 disassemble = print_insn_big_or32;
286 else
287 disassemble = print_insn_little_or32;
288 break;
289#endif
e135f41b
NC
290#ifdef ARCH_pdp11
291 case bfd_arch_pdp11:
292 disassemble = print_insn_pdp11;
293 break;
294#endif
1e608f98
ILT
295#ifdef ARCH_pj
296 case bfd_arch_pj:
297 disassemble = print_insn_pj;
298 break;
299#endif
252b5132
RH
300#ifdef ARCH_powerpc
301 case bfd_arch_powerpc:
302 if (bfd_big_endian (abfd))
303 disassemble = print_insn_big_powerpc;
304 else
305 disassemble = print_insn_little_powerpc;
306 break;
307#endif
308#ifdef ARCH_rs6000
309 case bfd_arch_rs6000:
39c20e8f 310 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP
311 disassemble = print_insn_big_powerpc;
312 else
313 disassemble = print_insn_rs6000;
252b5132
RH
314 break;
315#endif
a85d7ed0
NC
316#ifdef ARCH_s390
317 case bfd_arch_s390:
318 disassemble = print_insn_s390;
319 break;
320#endif
252b5132
RH
321#ifdef ARCH_sh
322 case bfd_arch_sh:
1c509ca8 323 disassemble = print_insn_sh;
252b5132
RH
324 break;
325#endif
326#ifdef ARCH_sparc
327 case bfd_arch_sparc:
328 disassemble = print_insn_sparc;
329 break;
330#endif
331#ifdef ARCH_tic30
332 case bfd_arch_tic30:
333 disassemble = print_insn_tic30;
334 break;
335#endif
026df7c5
NC
336#ifdef ARCH_tic4x
337 case bfd_arch_tic4x:
338 disassemble = print_insn_tic4x;
339 break;
340#endif
5c84d377
TW
341#ifdef ARCH_tic54x
342 case bfd_arch_tic54x:
343 disassemble = print_insn_tic54x;
344 break;
345#endif
252b5132
RH
346#ifdef ARCH_tic80
347 case bfd_arch_tic80:
348 disassemble = print_insn_tic80;
349 break;
350#endif
351#ifdef ARCH_v850
352 case bfd_arch_v850:
353 disassemble = print_insn_v850;
354 break;
355#endif
356#ifdef ARCH_w65
357 case bfd_arch_w65:
358 disassemble = print_insn_w65;
359 break;
360#endif
93fbbb04
GK
361#ifdef ARCH_xstormy16
362 case bfd_arch_xstormy16:
363 disassemble = print_insn_xstormy16;
364 break;
365#endif
e0001a05
NC
366#ifdef ARCH_xtensa
367 case bfd_arch_xtensa:
368 disassemble = print_insn_xtensa;
369 break;
370#endif
252b5132
RH
371#ifdef ARCH_z8k
372 case bfd_arch_z8k:
373 if (bfd_get_mach(abfd) == bfd_mach_z8001)
374 disassemble = print_insn_z8001;
b7ed8fad 375 else
252b5132
RH
376 disassemble = print_insn_z8002;
377 break;
378#endif
379#ifdef ARCH_vax
380 case bfd_arch_vax:
381 disassemble = print_insn_vax;
382 break;
fd3c93d5
DB
383#endif
384#ifdef ARCH_frv
385 case bfd_arch_frv:
386 disassemble = print_insn_frv;
387 break;
47b1a55a
SC
388#endif
389#ifdef ARCH_iq2000
390 case bfd_arch_iq2000:
391 disassemble = print_insn_iq2000;
392 break;
49f58d10
JB
393#endif
394#ifdef ARCH_m32c
395 case bfd_arch_m32c:
396 disassemble = print_insn_m32c;
397 break;
252b5132
RH
398#endif
399 default:
400 return 0;
401 }
402 return disassemble;
403}
94470b23
NC
404
405void
9aaaa291 406disassembler_usage (stream)
7f32bebc 407 FILE * stream ATTRIBUTE_UNUSED;
94470b23 408{
58efb6c0
NC
409#ifdef ARCH_arm
410 print_arm_disassembler_options (stream);
411#endif
640c0ccd
CD
412#ifdef ARCH_mips
413 print_mips_disassembler_options (stream);
414#endif
07dd56a9
NC
415#ifdef ARCH_powerpc
416 print_ppc_disassembler_options (stream);
417#endif
b7ed8fad 418
94470b23
NC
419 return;
420}
22a398e1
NC
421
422void
423disassemble_init_for_target (struct disassemble_info * info)
424{
425 if (info == NULL)
426 return;
427
428 switch (info->arch)
429 {
430#ifdef ARCH_arm
431 case bfd_arch_arm:
432 info->symbol_is_valid = arm_symbol_is_valid;
433 break;
0bcb06d2
AS
434#endif
435#ifdef ARCH_ia64
436 case bfd_arch_ia64:
437 info->skip_zeroes = 16;
438 break;
439#endif
440#ifdef ARCH_tic4x
441 case bfd_arch_tic4x:
442 info->skip_zeroes = 32;
49f58d10
JB
443#endif
444#ifdef ARCH_m32c
445 case bfd_arch_m32c:
446 info->endian = BFD_ENDIAN_BIG;
447 if (info->mach == bfd_mach_m16c)
760c0f6a 448 info->insn_sets = 1 << ISA_M16C;
49f58d10 449 else
760c0f6a 450 info->insn_sets = 1 << ISA_M32C;
49f58d10 451 break;
22a398e1
NC
452#endif
453 default:
454 break;
455 }
456}
This page took 0.332013 seconds and 4 git commands to generate.