Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* Select disassembly routine for specified architecture. |
aef6203b AM |
2 | Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, |
3 | 2004, 2005 Free Software Foundation, Inc. | |
252b5132 | 4 | |
7499d566 NC |
5 | This program is free software; you can redistribute it and/or modify |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
252b5132 | 9 | |
7499d566 NC |
10 | This program is distributed in the hope that it will be useful, |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
252b5132 | 14 | |
7499d566 NC |
15 | You should have received a copy of the GNU General Public License |
16 | along with this program; if not, write to the Free Software | |
17 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
252b5132 | 18 | |
0d8dfecf | 19 | #include "sysdep.h" |
252b5132 RH |
20 | #include "dis-asm.h" |
21 | ||
22 | #ifdef ARCH_all | |
23 | #define ARCH_a29k | |
24 | #define ARCH_alpha | |
25 | #define ARCH_arc | |
26 | #define ARCH_arm | |
adde6300 | 27 | #define ARCH_avr |
6c95a37f | 28 | #define ARCH_cris |
1fe1f39c | 29 | #define ARCH_crx |
252b5132 RH |
30 | #define ARCH_d10v |
31 | #define ARCH_d30v | |
d172d4ba | 32 | #define ARCH_dlx |
252b5132 RH |
33 | #define ARCH_h8300 |
34 | #define ARCH_h8500 | |
35 | #define ARCH_hppa | |
5b93d8bb | 36 | #define ARCH_i370 |
252b5132 | 37 | #define ARCH_i386 |
9d751335 | 38 | #define ARCH_i860 |
252b5132 | 39 | #define ARCH_i960 |
a40cbfa3 | 40 | #define ARCH_ip2k |
800eeca4 | 41 | #define ARCH_ia64 |
252b5132 RH |
42 | #define ARCH_fr30 |
43 | #define ARCH_m32r | |
44 | #define ARCH_m68k | |
60bcf0fa NC |
45 | #define ARCH_m68hc11 |
46 | #define ARCH_m68hc12 | |
252b5132 | 47 | #define ARCH_m88k |
7499d566 | 48 | #define ARCH_maxq |
252b5132 RH |
49 | #define ARCH_mcore |
50 | #define ARCH_mips | |
3c3bdf30 | 51 | #define ARCH_mmix |
252b5132 RH |
52 | #define ARCH_mn10200 |
53 | #define ARCH_mn10300 | |
2469cfa2 | 54 | #define ARCH_msp430 |
252b5132 | 55 | #define ARCH_ns32k |
87e6d782 | 56 | #define ARCH_openrisc |
3b16e843 | 57 | #define ARCH_or32 |
e135f41b | 58 | #define ARCH_pdp11 |
1e608f98 | 59 | #define ARCH_pj |
252b5132 RH |
60 | #define ARCH_powerpc |
61 | #define ARCH_rs6000 | |
a85d7ed0 | 62 | #define ARCH_s390 |
252b5132 RH |
63 | #define ARCH_sh |
64 | #define ARCH_sparc | |
65 | #define ARCH_tic30 | |
026df7c5 | 66 | #define ARCH_tic4x |
5c84d377 | 67 | #define ARCH_tic54x |
252b5132 RH |
68 | #define ARCH_tic80 |
69 | #define ARCH_v850 | |
70 | #define ARCH_vax | |
71 | #define ARCH_w65 | |
93fbbb04 | 72 | #define ARCH_xstormy16 |
e0001a05 | 73 | #define ARCH_xtensa |
252b5132 | 74 | #define ARCH_z8k |
fd3c93d5 | 75 | #define ARCH_frv |
47b1a55a | 76 | #define ARCH_iq2000 |
d28847ce | 77 | #define INCLUDE_SHMEDIA |
252b5132 RH |
78 | #endif |
79 | ||
80 | ||
81 | disassembler_ftype | |
82 | disassembler (abfd) | |
83 | bfd *abfd; | |
84 | { | |
85 | enum bfd_architecture a = bfd_get_arch (abfd); | |
86 | disassembler_ftype disassemble; | |
87 | ||
88 | switch (a) | |
89 | { | |
90 | /* If you add a case to this table, also add it to the | |
91 | ARCH_all definition right above this function. */ | |
92 | #ifdef ARCH_a29k | |
93 | case bfd_arch_a29k: | |
94 | /* As far as I know we only handle big-endian 29k objects. */ | |
95 | disassemble = print_insn_big_a29k; | |
96 | break; | |
97 | #endif | |
98 | #ifdef ARCH_alpha | |
99 | case bfd_arch_alpha: | |
100 | disassemble = print_insn_alpha; | |
101 | break; | |
102 | #endif | |
103 | #ifdef ARCH_arc | |
104 | case bfd_arch_arc: | |
105 | { | |
0d2bcfaf | 106 | disassemble = arc_get_disassembler (abfd); |
252b5132 RH |
107 | break; |
108 | } | |
109 | #endif | |
110 | #ifdef ARCH_arm | |
111 | case bfd_arch_arm: | |
112 | if (bfd_big_endian (abfd)) | |
113 | disassemble = print_insn_big_arm; | |
114 | else | |
115 | disassemble = print_insn_little_arm; | |
116 | break; | |
117 | #endif | |
adde6300 AM |
118 | #ifdef ARCH_avr |
119 | case bfd_arch_avr: | |
120 | disassemble = print_insn_avr; | |
121 | break; | |
122 | #endif | |
6c95a37f HPN |
123 | #ifdef ARCH_cris |
124 | case bfd_arch_cris: | |
78966507 | 125 | disassemble = cris_get_disassembler (abfd); |
6c95a37f | 126 | break; |
1fe1f39c NC |
127 | #endif |
128 | #ifdef ARCH_crx | |
129 | case bfd_arch_crx: | |
130 | disassemble = print_insn_crx; | |
131 | break; | |
6c95a37f | 132 | #endif |
252b5132 RH |
133 | #ifdef ARCH_d10v |
134 | case bfd_arch_d10v: | |
135 | disassemble = print_insn_d10v; | |
136 | break; | |
137 | #endif | |
138 | #ifdef ARCH_d30v | |
139 | case bfd_arch_d30v: | |
140 | disassemble = print_insn_d30v; | |
141 | break; | |
142 | #endif | |
d172d4ba NC |
143 | #ifdef ARCH_dlx |
144 | case bfd_arch_dlx: | |
145 | /* As far as I know we only handle big-endian DLX objects. */ | |
146 | disassemble = print_insn_dlx; | |
147 | break; | |
148 | #endif | |
252b5132 RH |
149 | #ifdef ARCH_h8300 |
150 | case bfd_arch_h8300: | |
049f8936 NC |
151 | if (bfd_get_mach (abfd) == bfd_mach_h8300h |
152 | || bfd_get_mach (abfd) == bfd_mach_h8300hn) | |
252b5132 | 153 | disassemble = print_insn_h8300h; |
049f8936 | 154 | else if (bfd_get_mach (abfd) == bfd_mach_h8300s |
d43ff6d2 | 155 | || bfd_get_mach (abfd) == bfd_mach_h8300sn |
a53b85e2 AO |
156 | || bfd_get_mach (abfd) == bfd_mach_h8300sx |
157 | || bfd_get_mach (abfd) == bfd_mach_h8300sxn) | |
252b5132 | 158 | disassemble = print_insn_h8300s; |
b7ed8fad | 159 | else |
252b5132 RH |
160 | disassemble = print_insn_h8300; |
161 | break; | |
162 | #endif | |
163 | #ifdef ARCH_h8500 | |
164 | case bfd_arch_h8500: | |
165 | disassemble = print_insn_h8500; | |
166 | break; | |
167 | #endif | |
168 | #ifdef ARCH_hppa | |
169 | case bfd_arch_hppa: | |
170 | disassemble = print_insn_hppa; | |
171 | break; | |
172 | #endif | |
5b93d8bb AM |
173 | #ifdef ARCH_i370 |
174 | case bfd_arch_i370: | |
175 | disassemble = print_insn_i370; | |
176 | break; | |
177 | #endif | |
252b5132 RH |
178 | #ifdef ARCH_i386 |
179 | case bfd_arch_i386: | |
e396998b | 180 | disassemble = print_insn_i386; |
252b5132 RH |
181 | break; |
182 | #endif | |
9d751335 JE |
183 | #ifdef ARCH_i860 |
184 | case bfd_arch_i860: | |
185 | disassemble = print_insn_i860; | |
186 | break; | |
187 | #endif | |
252b5132 RH |
188 | #ifdef ARCH_i960 |
189 | case bfd_arch_i960: | |
190 | disassemble = print_insn_i960; | |
191 | break; | |
192 | #endif | |
800eeca4 JW |
193 | #ifdef ARCH_ia64 |
194 | case bfd_arch_ia64: | |
195 | disassemble = print_insn_ia64; | |
196 | break; | |
197 | #endif | |
a40cbfa3 NC |
198 | #ifdef ARCH_ip2k |
199 | case bfd_arch_ip2k: | |
200 | disassemble = print_insn_ip2k; | |
201 | break; | |
202 | #endif | |
252b5132 RH |
203 | #ifdef ARCH_fr30 |
204 | case bfd_arch_fr30: | |
205 | disassemble = print_insn_fr30; | |
206 | break; | |
207 | #endif | |
208 | #ifdef ARCH_m32r | |
209 | case bfd_arch_m32r: | |
210 | disassemble = print_insn_m32r; | |
211 | break; | |
212 | #endif | |
60bcf0fa NC |
213 | #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) |
214 | case bfd_arch_m68hc11: | |
215 | disassemble = print_insn_m68hc11; | |
216 | break; | |
217 | case bfd_arch_m68hc12: | |
218 | disassemble = print_insn_m68hc12; | |
219 | break; | |
220 | #endif | |
252b5132 RH |
221 | #ifdef ARCH_m68k |
222 | case bfd_arch_m68k: | |
223 | disassemble = print_insn_m68k; | |
224 | break; | |
225 | #endif | |
226 | #ifdef ARCH_m88k | |
227 | case bfd_arch_m88k: | |
228 | disassemble = print_insn_m88k; | |
229 | break; | |
230 | #endif | |
7499d566 NC |
231 | #ifdef ARCH_maxq |
232 | case bfd_arch_maxq: | |
233 | disassemble = print_insn_maxq_little; | |
234 | break; | |
235 | #endif | |
2469cfa2 NC |
236 | #ifdef ARCH_msp430 |
237 | case bfd_arch_msp430: | |
238 | disassemble = print_insn_msp430; | |
239 | break; | |
240 | #endif | |
252b5132 RH |
241 | #ifdef ARCH_ns32k |
242 | case bfd_arch_ns32k: | |
243 | disassemble = print_insn_ns32k; | |
244 | break; | |
245 | #endif | |
246 | #ifdef ARCH_mcore | |
247 | case bfd_arch_mcore: | |
248 | disassemble = print_insn_mcore; | |
249 | break; | |
250 | #endif | |
251 | #ifdef ARCH_mips | |
252 | case bfd_arch_mips: | |
253 | if (bfd_big_endian (abfd)) | |
254 | disassemble = print_insn_big_mips; | |
255 | else | |
256 | disassemble = print_insn_little_mips; | |
257 | break; | |
258 | #endif | |
3c3bdf30 NC |
259 | #ifdef ARCH_mmix |
260 | case bfd_arch_mmix: | |
261 | disassemble = print_insn_mmix; | |
262 | break; | |
263 | #endif | |
252b5132 RH |
264 | #ifdef ARCH_mn10200 |
265 | case bfd_arch_mn10200: | |
266 | disassemble = print_insn_mn10200; | |
267 | break; | |
268 | #endif | |
269 | #ifdef ARCH_mn10300 | |
270 | case bfd_arch_mn10300: | |
271 | disassemble = print_insn_mn10300; | |
272 | break; | |
273 | #endif | |
87e6d782 NC |
274 | #ifdef ARCH_openrisc |
275 | case bfd_arch_openrisc: | |
276 | disassemble = print_insn_openrisc; | |
277 | break; | |
278 | #endif | |
3b16e843 NC |
279 | #ifdef ARCH_or32 |
280 | case bfd_arch_or32: | |
281 | if (bfd_big_endian (abfd)) | |
282 | disassemble = print_insn_big_or32; | |
283 | else | |
284 | disassemble = print_insn_little_or32; | |
285 | break; | |
286 | #endif | |
e135f41b NC |
287 | #ifdef ARCH_pdp11 |
288 | case bfd_arch_pdp11: | |
289 | disassemble = print_insn_pdp11; | |
290 | break; | |
291 | #endif | |
1e608f98 ILT |
292 | #ifdef ARCH_pj |
293 | case bfd_arch_pj: | |
294 | disassemble = print_insn_pj; | |
295 | break; | |
296 | #endif | |
252b5132 RH |
297 | #ifdef ARCH_powerpc |
298 | case bfd_arch_powerpc: | |
299 | if (bfd_big_endian (abfd)) | |
300 | disassemble = print_insn_big_powerpc; | |
301 | else | |
302 | disassemble = print_insn_little_powerpc; | |
303 | break; | |
304 | #endif | |
305 | #ifdef ARCH_rs6000 | |
306 | case bfd_arch_rs6000: | |
39c20e8f | 307 | if (bfd_get_mach (abfd) == bfd_mach_ppc_620) |
7f6d05e8 CP |
308 | disassemble = print_insn_big_powerpc; |
309 | else | |
310 | disassemble = print_insn_rs6000; | |
252b5132 RH |
311 | break; |
312 | #endif | |
a85d7ed0 NC |
313 | #ifdef ARCH_s390 |
314 | case bfd_arch_s390: | |
315 | disassemble = print_insn_s390; | |
316 | break; | |
317 | #endif | |
252b5132 RH |
318 | #ifdef ARCH_sh |
319 | case bfd_arch_sh: | |
1c509ca8 | 320 | disassemble = print_insn_sh; |
252b5132 RH |
321 | break; |
322 | #endif | |
323 | #ifdef ARCH_sparc | |
324 | case bfd_arch_sparc: | |
325 | disassemble = print_insn_sparc; | |
326 | break; | |
327 | #endif | |
328 | #ifdef ARCH_tic30 | |
329 | case bfd_arch_tic30: | |
330 | disassemble = print_insn_tic30; | |
331 | break; | |
332 | #endif | |
026df7c5 NC |
333 | #ifdef ARCH_tic4x |
334 | case bfd_arch_tic4x: | |
335 | disassemble = print_insn_tic4x; | |
336 | break; | |
337 | #endif | |
5c84d377 TW |
338 | #ifdef ARCH_tic54x |
339 | case bfd_arch_tic54x: | |
340 | disassemble = print_insn_tic54x; | |
341 | break; | |
342 | #endif | |
252b5132 RH |
343 | #ifdef ARCH_tic80 |
344 | case bfd_arch_tic80: | |
345 | disassemble = print_insn_tic80; | |
346 | break; | |
347 | #endif | |
348 | #ifdef ARCH_v850 | |
349 | case bfd_arch_v850: | |
350 | disassemble = print_insn_v850; | |
351 | break; | |
352 | #endif | |
353 | #ifdef ARCH_w65 | |
354 | case bfd_arch_w65: | |
355 | disassemble = print_insn_w65; | |
356 | break; | |
357 | #endif | |
93fbbb04 GK |
358 | #ifdef ARCH_xstormy16 |
359 | case bfd_arch_xstormy16: | |
360 | disassemble = print_insn_xstormy16; | |
361 | break; | |
362 | #endif | |
e0001a05 NC |
363 | #ifdef ARCH_xtensa |
364 | case bfd_arch_xtensa: | |
365 | disassemble = print_insn_xtensa; | |
366 | break; | |
367 | #endif | |
252b5132 RH |
368 | #ifdef ARCH_z8k |
369 | case bfd_arch_z8k: | |
370 | if (bfd_get_mach(abfd) == bfd_mach_z8001) | |
371 | disassemble = print_insn_z8001; | |
b7ed8fad | 372 | else |
252b5132 RH |
373 | disassemble = print_insn_z8002; |
374 | break; | |
375 | #endif | |
376 | #ifdef ARCH_vax | |
377 | case bfd_arch_vax: | |
378 | disassemble = print_insn_vax; | |
379 | break; | |
fd3c93d5 DB |
380 | #endif |
381 | #ifdef ARCH_frv | |
382 | case bfd_arch_frv: | |
383 | disassemble = print_insn_frv; | |
384 | break; | |
47b1a55a SC |
385 | #endif |
386 | #ifdef ARCH_iq2000 | |
387 | case bfd_arch_iq2000: | |
388 | disassemble = print_insn_iq2000; | |
389 | break; | |
252b5132 RH |
390 | #endif |
391 | default: | |
392 | return 0; | |
393 | } | |
394 | return disassemble; | |
395 | } | |
94470b23 NC |
396 | |
397 | void | |
9aaaa291 | 398 | disassembler_usage (stream) |
7f32bebc | 399 | FILE * stream ATTRIBUTE_UNUSED; |
94470b23 | 400 | { |
58efb6c0 NC |
401 | #ifdef ARCH_arm |
402 | print_arm_disassembler_options (stream); | |
403 | #endif | |
640c0ccd CD |
404 | #ifdef ARCH_mips |
405 | print_mips_disassembler_options (stream); | |
406 | #endif | |
07dd56a9 NC |
407 | #ifdef ARCH_powerpc |
408 | print_ppc_disassembler_options (stream); | |
409 | #endif | |
b7ed8fad | 410 | |
94470b23 NC |
411 | return; |
412 | } | |
22a398e1 NC |
413 | |
414 | void | |
415 | disassemble_init_for_target (struct disassemble_info * info) | |
416 | { | |
417 | if (info == NULL) | |
418 | return; | |
419 | ||
420 | switch (info->arch) | |
421 | { | |
422 | #ifdef ARCH_arm | |
423 | case bfd_arch_arm: | |
424 | info->symbol_is_valid = arm_symbol_is_valid; | |
425 | break; | |
0bcb06d2 AS |
426 | #endif |
427 | #ifdef ARCH_ia64 | |
428 | case bfd_arch_ia64: | |
429 | info->skip_zeroes = 16; | |
430 | break; | |
431 | #endif | |
432 | #ifdef ARCH_tic4x | |
433 | case bfd_arch_tic4x: | |
434 | info->skip_zeroes = 32; | |
22a398e1 NC |
435 | #endif |
436 | default: | |
437 | break; | |
438 | } | |
439 | } |