Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* Select disassembly routine for specified architecture. |
aef6203b AM |
2 | Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, |
3 | 2004, 2005 Free Software Foundation, Inc. | |
252b5132 | 4 | |
7499d566 NC |
5 | This program is free software; you can redistribute it and/or modify |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
252b5132 | 9 | |
7499d566 NC |
10 | This program is distributed in the hope that it will be useful, |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
252b5132 | 14 | |
7499d566 NC |
15 | You should have received a copy of the GNU General Public License |
16 | along with this program; if not, write to the Free Software | |
f4321104 | 17 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
252b5132 | 18 | |
0d8dfecf | 19 | #include "sysdep.h" |
252b5132 RH |
20 | #include "dis-asm.h" |
21 | ||
22 | #ifdef ARCH_all | |
23 | #define ARCH_a29k | |
24 | #define ARCH_alpha | |
25 | #define ARCH_arc | |
26 | #define ARCH_arm | |
adde6300 | 27 | #define ARCH_avr |
6c95a37f | 28 | #define ARCH_cris |
1fe1f39c | 29 | #define ARCH_crx |
252b5132 RH |
30 | #define ARCH_d10v |
31 | #define ARCH_d30v | |
d172d4ba | 32 | #define ARCH_dlx |
252b5132 RH |
33 | #define ARCH_h8300 |
34 | #define ARCH_h8500 | |
35 | #define ARCH_hppa | |
5b93d8bb | 36 | #define ARCH_i370 |
252b5132 | 37 | #define ARCH_i386 |
9d751335 | 38 | #define ARCH_i860 |
252b5132 | 39 | #define ARCH_i960 |
a40cbfa3 | 40 | #define ARCH_ip2k |
800eeca4 | 41 | #define ARCH_ia64 |
252b5132 RH |
42 | #define ARCH_fr30 |
43 | #define ARCH_m32r | |
44 | #define ARCH_m68k | |
60bcf0fa NC |
45 | #define ARCH_m68hc11 |
46 | #define ARCH_m68hc12 | |
252b5132 | 47 | #define ARCH_m88k |
7499d566 | 48 | #define ARCH_maxq |
252b5132 RH |
49 | #define ARCH_mcore |
50 | #define ARCH_mips | |
3c3bdf30 | 51 | #define ARCH_mmix |
252b5132 RH |
52 | #define ARCH_mn10200 |
53 | #define ARCH_mn10300 | |
ac188222 | 54 | #define ARCH_ms1 |
2469cfa2 | 55 | #define ARCH_msp430 |
252b5132 | 56 | #define ARCH_ns32k |
87e6d782 | 57 | #define ARCH_openrisc |
3b16e843 | 58 | #define ARCH_or32 |
e135f41b | 59 | #define ARCH_pdp11 |
1e608f98 | 60 | #define ARCH_pj |
252b5132 RH |
61 | #define ARCH_powerpc |
62 | #define ARCH_rs6000 | |
a85d7ed0 | 63 | #define ARCH_s390 |
252b5132 RH |
64 | #define ARCH_sh |
65 | #define ARCH_sparc | |
66 | #define ARCH_tic30 | |
026df7c5 | 67 | #define ARCH_tic4x |
5c84d377 | 68 | #define ARCH_tic54x |
252b5132 RH |
69 | #define ARCH_tic80 |
70 | #define ARCH_v850 | |
71 | #define ARCH_vax | |
72 | #define ARCH_w65 | |
93fbbb04 | 73 | #define ARCH_xstormy16 |
e0001a05 | 74 | #define ARCH_xtensa |
252b5132 | 75 | #define ARCH_z8k |
fd3c93d5 | 76 | #define ARCH_frv |
47b1a55a | 77 | #define ARCH_iq2000 |
d28847ce | 78 | #define INCLUDE_SHMEDIA |
252b5132 RH |
79 | #endif |
80 | ||
81 | ||
82 | disassembler_ftype | |
83 | disassembler (abfd) | |
84 | bfd *abfd; | |
85 | { | |
86 | enum bfd_architecture a = bfd_get_arch (abfd); | |
87 | disassembler_ftype disassemble; | |
88 | ||
89 | switch (a) | |
90 | { | |
91 | /* If you add a case to this table, also add it to the | |
92 | ARCH_all definition right above this function. */ | |
93 | #ifdef ARCH_a29k | |
94 | case bfd_arch_a29k: | |
95 | /* As far as I know we only handle big-endian 29k objects. */ | |
96 | disassemble = print_insn_big_a29k; | |
97 | break; | |
98 | #endif | |
99 | #ifdef ARCH_alpha | |
100 | case bfd_arch_alpha: | |
101 | disassemble = print_insn_alpha; | |
102 | break; | |
103 | #endif | |
104 | #ifdef ARCH_arc | |
105 | case bfd_arch_arc: | |
106 | { | |
0d2bcfaf | 107 | disassemble = arc_get_disassembler (abfd); |
252b5132 RH |
108 | break; |
109 | } | |
110 | #endif | |
111 | #ifdef ARCH_arm | |
112 | case bfd_arch_arm: | |
113 | if (bfd_big_endian (abfd)) | |
114 | disassemble = print_insn_big_arm; | |
115 | else | |
116 | disassemble = print_insn_little_arm; | |
117 | break; | |
118 | #endif | |
adde6300 AM |
119 | #ifdef ARCH_avr |
120 | case bfd_arch_avr: | |
121 | disassemble = print_insn_avr; | |
122 | break; | |
123 | #endif | |
6c95a37f HPN |
124 | #ifdef ARCH_cris |
125 | case bfd_arch_cris: | |
78966507 | 126 | disassemble = cris_get_disassembler (abfd); |
6c95a37f | 127 | break; |
1fe1f39c NC |
128 | #endif |
129 | #ifdef ARCH_crx | |
130 | case bfd_arch_crx: | |
131 | disassemble = print_insn_crx; | |
132 | break; | |
6c95a37f | 133 | #endif |
252b5132 RH |
134 | #ifdef ARCH_d10v |
135 | case bfd_arch_d10v: | |
136 | disassemble = print_insn_d10v; | |
137 | break; | |
138 | #endif | |
139 | #ifdef ARCH_d30v | |
140 | case bfd_arch_d30v: | |
141 | disassemble = print_insn_d30v; | |
142 | break; | |
143 | #endif | |
d172d4ba NC |
144 | #ifdef ARCH_dlx |
145 | case bfd_arch_dlx: | |
146 | /* As far as I know we only handle big-endian DLX objects. */ | |
147 | disassemble = print_insn_dlx; | |
148 | break; | |
149 | #endif | |
252b5132 RH |
150 | #ifdef ARCH_h8300 |
151 | case bfd_arch_h8300: | |
049f8936 NC |
152 | if (bfd_get_mach (abfd) == bfd_mach_h8300h |
153 | || bfd_get_mach (abfd) == bfd_mach_h8300hn) | |
252b5132 | 154 | disassemble = print_insn_h8300h; |
049f8936 | 155 | else if (bfd_get_mach (abfd) == bfd_mach_h8300s |
d43ff6d2 | 156 | || bfd_get_mach (abfd) == bfd_mach_h8300sn |
a53b85e2 AO |
157 | || bfd_get_mach (abfd) == bfd_mach_h8300sx |
158 | || bfd_get_mach (abfd) == bfd_mach_h8300sxn) | |
252b5132 | 159 | disassemble = print_insn_h8300s; |
b7ed8fad | 160 | else |
252b5132 RH |
161 | disassemble = print_insn_h8300; |
162 | break; | |
163 | #endif | |
164 | #ifdef ARCH_h8500 | |
165 | case bfd_arch_h8500: | |
166 | disassemble = print_insn_h8500; | |
167 | break; | |
168 | #endif | |
169 | #ifdef ARCH_hppa | |
170 | case bfd_arch_hppa: | |
171 | disassemble = print_insn_hppa; | |
172 | break; | |
173 | #endif | |
5b93d8bb AM |
174 | #ifdef ARCH_i370 |
175 | case bfd_arch_i370: | |
176 | disassemble = print_insn_i370; | |
177 | break; | |
178 | #endif | |
252b5132 RH |
179 | #ifdef ARCH_i386 |
180 | case bfd_arch_i386: | |
e396998b | 181 | disassemble = print_insn_i386; |
252b5132 RH |
182 | break; |
183 | #endif | |
9d751335 JE |
184 | #ifdef ARCH_i860 |
185 | case bfd_arch_i860: | |
186 | disassemble = print_insn_i860; | |
187 | break; | |
188 | #endif | |
252b5132 RH |
189 | #ifdef ARCH_i960 |
190 | case bfd_arch_i960: | |
191 | disassemble = print_insn_i960; | |
192 | break; | |
193 | #endif | |
800eeca4 JW |
194 | #ifdef ARCH_ia64 |
195 | case bfd_arch_ia64: | |
196 | disassemble = print_insn_ia64; | |
197 | break; | |
198 | #endif | |
a40cbfa3 NC |
199 | #ifdef ARCH_ip2k |
200 | case bfd_arch_ip2k: | |
201 | disassemble = print_insn_ip2k; | |
202 | break; | |
203 | #endif | |
252b5132 RH |
204 | #ifdef ARCH_fr30 |
205 | case bfd_arch_fr30: | |
206 | disassemble = print_insn_fr30; | |
207 | break; | |
208 | #endif | |
209 | #ifdef ARCH_m32r | |
210 | case bfd_arch_m32r: | |
211 | disassemble = print_insn_m32r; | |
212 | break; | |
213 | #endif | |
60bcf0fa NC |
214 | #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) |
215 | case bfd_arch_m68hc11: | |
216 | disassemble = print_insn_m68hc11; | |
217 | break; | |
218 | case bfd_arch_m68hc12: | |
219 | disassemble = print_insn_m68hc12; | |
220 | break; | |
221 | #endif | |
252b5132 RH |
222 | #ifdef ARCH_m68k |
223 | case bfd_arch_m68k: | |
224 | disassemble = print_insn_m68k; | |
225 | break; | |
226 | #endif | |
227 | #ifdef ARCH_m88k | |
228 | case bfd_arch_m88k: | |
229 | disassemble = print_insn_m88k; | |
230 | break; | |
231 | #endif | |
7499d566 NC |
232 | #ifdef ARCH_maxq |
233 | case bfd_arch_maxq: | |
234 | disassemble = print_insn_maxq_little; | |
235 | break; | |
236 | #endif | |
ac188222 DB |
237 | #ifdef ARCH_ms1 |
238 | case bfd_arch_ms1: | |
239 | disassemble = print_insn_ms1; | |
240 | break; | |
241 | #endif | |
2469cfa2 NC |
242 | #ifdef ARCH_msp430 |
243 | case bfd_arch_msp430: | |
244 | disassemble = print_insn_msp430; | |
245 | break; | |
246 | #endif | |
252b5132 RH |
247 | #ifdef ARCH_ns32k |
248 | case bfd_arch_ns32k: | |
249 | disassemble = print_insn_ns32k; | |
250 | break; | |
251 | #endif | |
252 | #ifdef ARCH_mcore | |
253 | case bfd_arch_mcore: | |
254 | disassemble = print_insn_mcore; | |
255 | break; | |
256 | #endif | |
257 | #ifdef ARCH_mips | |
258 | case bfd_arch_mips: | |
259 | if (bfd_big_endian (abfd)) | |
260 | disassemble = print_insn_big_mips; | |
261 | else | |
262 | disassemble = print_insn_little_mips; | |
263 | break; | |
264 | #endif | |
3c3bdf30 NC |
265 | #ifdef ARCH_mmix |
266 | case bfd_arch_mmix: | |
267 | disassemble = print_insn_mmix; | |
268 | break; | |
269 | #endif | |
252b5132 RH |
270 | #ifdef ARCH_mn10200 |
271 | case bfd_arch_mn10200: | |
272 | disassemble = print_insn_mn10200; | |
273 | break; | |
274 | #endif | |
275 | #ifdef ARCH_mn10300 | |
276 | case bfd_arch_mn10300: | |
277 | disassemble = print_insn_mn10300; | |
278 | break; | |
279 | #endif | |
87e6d782 NC |
280 | #ifdef ARCH_openrisc |
281 | case bfd_arch_openrisc: | |
282 | disassemble = print_insn_openrisc; | |
283 | break; | |
284 | #endif | |
3b16e843 NC |
285 | #ifdef ARCH_or32 |
286 | case bfd_arch_or32: | |
287 | if (bfd_big_endian (abfd)) | |
288 | disassemble = print_insn_big_or32; | |
289 | else | |
290 | disassemble = print_insn_little_or32; | |
291 | break; | |
292 | #endif | |
e135f41b NC |
293 | #ifdef ARCH_pdp11 |
294 | case bfd_arch_pdp11: | |
295 | disassemble = print_insn_pdp11; | |
296 | break; | |
297 | #endif | |
1e608f98 ILT |
298 | #ifdef ARCH_pj |
299 | case bfd_arch_pj: | |
300 | disassemble = print_insn_pj; | |
301 | break; | |
302 | #endif | |
252b5132 RH |
303 | #ifdef ARCH_powerpc |
304 | case bfd_arch_powerpc: | |
305 | if (bfd_big_endian (abfd)) | |
306 | disassemble = print_insn_big_powerpc; | |
307 | else | |
308 | disassemble = print_insn_little_powerpc; | |
309 | break; | |
310 | #endif | |
311 | #ifdef ARCH_rs6000 | |
312 | case bfd_arch_rs6000: | |
39c20e8f | 313 | if (bfd_get_mach (abfd) == bfd_mach_ppc_620) |
7f6d05e8 CP |
314 | disassemble = print_insn_big_powerpc; |
315 | else | |
316 | disassemble = print_insn_rs6000; | |
252b5132 RH |
317 | break; |
318 | #endif | |
a85d7ed0 NC |
319 | #ifdef ARCH_s390 |
320 | case bfd_arch_s390: | |
321 | disassemble = print_insn_s390; | |
322 | break; | |
323 | #endif | |
252b5132 RH |
324 | #ifdef ARCH_sh |
325 | case bfd_arch_sh: | |
1c509ca8 | 326 | disassemble = print_insn_sh; |
252b5132 RH |
327 | break; |
328 | #endif | |
329 | #ifdef ARCH_sparc | |
330 | case bfd_arch_sparc: | |
331 | disassemble = print_insn_sparc; | |
332 | break; | |
333 | #endif | |
334 | #ifdef ARCH_tic30 | |
335 | case bfd_arch_tic30: | |
336 | disassemble = print_insn_tic30; | |
337 | break; | |
338 | #endif | |
026df7c5 NC |
339 | #ifdef ARCH_tic4x |
340 | case bfd_arch_tic4x: | |
341 | disassemble = print_insn_tic4x; | |
342 | break; | |
343 | #endif | |
5c84d377 TW |
344 | #ifdef ARCH_tic54x |
345 | case bfd_arch_tic54x: | |
346 | disassemble = print_insn_tic54x; | |
347 | break; | |
348 | #endif | |
252b5132 RH |
349 | #ifdef ARCH_tic80 |
350 | case bfd_arch_tic80: | |
351 | disassemble = print_insn_tic80; | |
352 | break; | |
353 | #endif | |
354 | #ifdef ARCH_v850 | |
355 | case bfd_arch_v850: | |
356 | disassemble = print_insn_v850; | |
357 | break; | |
358 | #endif | |
359 | #ifdef ARCH_w65 | |
360 | case bfd_arch_w65: | |
361 | disassemble = print_insn_w65; | |
362 | break; | |
363 | #endif | |
93fbbb04 GK |
364 | #ifdef ARCH_xstormy16 |
365 | case bfd_arch_xstormy16: | |
366 | disassemble = print_insn_xstormy16; | |
367 | break; | |
368 | #endif | |
e0001a05 NC |
369 | #ifdef ARCH_xtensa |
370 | case bfd_arch_xtensa: | |
371 | disassemble = print_insn_xtensa; | |
372 | break; | |
373 | #endif | |
252b5132 RH |
374 | #ifdef ARCH_z8k |
375 | case bfd_arch_z8k: | |
376 | if (bfd_get_mach(abfd) == bfd_mach_z8001) | |
377 | disassemble = print_insn_z8001; | |
b7ed8fad | 378 | else |
252b5132 RH |
379 | disassemble = print_insn_z8002; |
380 | break; | |
381 | #endif | |
382 | #ifdef ARCH_vax | |
383 | case bfd_arch_vax: | |
384 | disassemble = print_insn_vax; | |
385 | break; | |
fd3c93d5 DB |
386 | #endif |
387 | #ifdef ARCH_frv | |
388 | case bfd_arch_frv: | |
389 | disassemble = print_insn_frv; | |
390 | break; | |
47b1a55a SC |
391 | #endif |
392 | #ifdef ARCH_iq2000 | |
393 | case bfd_arch_iq2000: | |
394 | disassemble = print_insn_iq2000; | |
395 | break; | |
252b5132 RH |
396 | #endif |
397 | default: | |
398 | return 0; | |
399 | } | |
400 | return disassemble; | |
401 | } | |
94470b23 NC |
402 | |
403 | void | |
9aaaa291 | 404 | disassembler_usage (stream) |
7f32bebc | 405 | FILE * stream ATTRIBUTE_UNUSED; |
94470b23 | 406 | { |
58efb6c0 NC |
407 | #ifdef ARCH_arm |
408 | print_arm_disassembler_options (stream); | |
409 | #endif | |
640c0ccd CD |
410 | #ifdef ARCH_mips |
411 | print_mips_disassembler_options (stream); | |
412 | #endif | |
07dd56a9 NC |
413 | #ifdef ARCH_powerpc |
414 | print_ppc_disassembler_options (stream); | |
415 | #endif | |
b7ed8fad | 416 | |
94470b23 NC |
417 | return; |
418 | } | |
22a398e1 NC |
419 | |
420 | void | |
421 | disassemble_init_for_target (struct disassemble_info * info) | |
422 | { | |
423 | if (info == NULL) | |
424 | return; | |
425 | ||
426 | switch (info->arch) | |
427 | { | |
428 | #ifdef ARCH_arm | |
429 | case bfd_arch_arm: | |
430 | info->symbol_is_valid = arm_symbol_is_valid; | |
431 | break; | |
0bcb06d2 AS |
432 | #endif |
433 | #ifdef ARCH_ia64 | |
434 | case bfd_arch_ia64: | |
435 | info->skip_zeroes = 16; | |
436 | break; | |
437 | #endif | |
438 | #ifdef ARCH_tic4x | |
439 | case bfd_arch_tic4x: | |
440 | info->skip_zeroes = 32; | |
22a398e1 NC |
441 | #endif |
442 | default: | |
443 | break; | |
444 | } | |
445 | } |