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252b5132 RH |
1 | /* Assembler interface for targets using CGEN. -*- C -*- |
2 | CGEN: Cpu tools GENerator | |
3 | ||
4 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
5 | - the resultant file is machine generated, cgen-asm.in isn't | |
6 | ||
060d22b0 | 7 | Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. |
252b5132 RH |
8 | |
9 | This file is part of the GNU Binutils and GDB, the GNU debugger. | |
10 | ||
11 | This program is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
13 | the Free Software Foundation; either version 2, or (at your option) | |
14 | any later version. | |
15 | ||
16 | This program is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
22 | along with this program; if not, write to the Free Software Foundation, Inc., | |
23 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
24 | ||
25 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. | |
26 | Keep that in mind. */ | |
27 | ||
28 | #include "sysdep.h" | |
252b5132 RH |
29 | #include <stdio.h> |
30 | #include "ansidecl.h" | |
3882b010 | 31 | #include "safe-ctype.h" |
252b5132 RH |
32 | #include "bfd.h" |
33 | #include "symcat.h" | |
34 | #include "fr30-desc.h" | |
35 | #include "fr30-opc.h" | |
36 | #include "opintl.h" | |
fc7bc883 | 37 | #include "xregex.h" |
d5b2f4d6 | 38 | #include "libiberty.h" |
252b5132 RH |
39 | |
40 | #undef min | |
41 | #define min(a,b) ((a) < (b) ? (a) : (b)) | |
42 | #undef max | |
43 | #define max(a,b) ((a) > (b) ? (a) : (b)) | |
44 | ||
d5b2f4d6 NC |
45 | static const char * parse_insn_normal PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *)); |
46 | static int parse_register_number PARAMS ((const char **)); | |
47 | static const char * parse_register_list PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *, int, int)); | |
48 | static const char * parse_low_register_list_ld PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); | |
49 | static const char * parse_hi_register_list_ld PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); | |
50 | static const char * parse_low_register_list_st PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); | |
51 | static const char * parse_hi_register_list_st PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); | |
52 | const char * fr30_cgen_parse_operand PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *)); | |
252b5132 RH |
53 | \f |
54 | /* -- assembler routines inserted here */ | |
55 | ||
56 | /* -- asm.c */ | |
57 | /* Handle register lists for LDMx and STMx */ | |
58 | ||
59 | static int | |
60 | parse_register_number (strp) | |
61 | const char **strp; | |
62 | { | |
63 | int regno; | |
64 | if (**strp < '0' || **strp > '9') | |
65 | return -1; /* error */ | |
66 | regno = **strp - '0'; | |
67 | ++*strp; | |
68 | ||
69 | if (**strp >= '0' && **strp <= '9') | |
70 | { | |
71 | regno = regno * 10 + (**strp - '0'); | |
72 | ++*strp; | |
73 | } | |
74 | ||
75 | return regno; | |
76 | } | |
77 | ||
78 | static const char * | |
79 | parse_register_list (cd, strp, opindex, valuep, high_low, load_store) | |
d5b2f4d6 | 80 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; |
252b5132 | 81 | const char **strp; |
d5b2f4d6 | 82 | int opindex ATTRIBUTE_UNUSED; |
252b5132 RH |
83 | unsigned long *valuep; |
84 | int high_low; /* 0 == high, 1 == low */ | |
85 | int load_store; /* 0 == load, 1 == store */ | |
86 | { | |
87 | int regno; | |
88 | *valuep = 0; | |
89 | while (**strp && **strp != ')') | |
90 | { | |
91 | if (**strp != 'R' && **strp != 'r') | |
92 | break; | |
93 | ++*strp; | |
94 | ||
95 | regno = parse_register_number (strp); | |
96 | if (regno == -1) | |
97 | return "Register number is not valid"; | |
98 | if (regno > 7 && !high_low) | |
99 | return "Register must be between r0 and r7"; | |
100 | if (regno < 8 && high_low) | |
101 | return "Register must be between r8 and r15"; | |
102 | ||
103 | if (high_low) | |
104 | regno -= 8; | |
105 | ||
106 | if (load_store) /* mask is reversed for store */ | |
107 | *valuep |= 0x80 >> regno; | |
108 | else | |
109 | *valuep |= 1 << regno; | |
110 | ||
111 | if (**strp == ',') | |
112 | { | |
113 | if (*(*strp + 1) == ')') | |
114 | break; | |
115 | ++*strp; | |
116 | } | |
117 | } | |
118 | ||
119 | if (!*strp || **strp != ')') | |
120 | return "Register list is not valid"; | |
121 | ||
122 | return NULL; | |
123 | } | |
124 | ||
125 | static const char * | |
126 | parse_low_register_list_ld (cd, strp, opindex, valuep) | |
127 | CGEN_CPU_DESC cd; | |
128 | const char **strp; | |
129 | int opindex; | |
130 | unsigned long *valuep; | |
131 | { | |
132 | return parse_register_list (cd, strp, opindex, valuep, 0/*low*/, 0/*load*/); | |
133 | } | |
134 | ||
135 | static const char * | |
136 | parse_hi_register_list_ld (cd, strp, opindex, valuep) | |
137 | CGEN_CPU_DESC cd; | |
138 | const char **strp; | |
139 | int opindex; | |
140 | unsigned long *valuep; | |
141 | { | |
142 | return parse_register_list (cd, strp, opindex, valuep, 1/*high*/, 0/*load*/); | |
143 | } | |
144 | ||
145 | static const char * | |
146 | parse_low_register_list_st (cd, strp, opindex, valuep) | |
147 | CGEN_CPU_DESC cd; | |
148 | const char **strp; | |
149 | int opindex; | |
150 | unsigned long *valuep; | |
151 | { | |
152 | return parse_register_list (cd, strp, opindex, valuep, 0/*low*/, 1/*store*/); | |
153 | } | |
154 | ||
155 | static const char * | |
156 | parse_hi_register_list_st (cd, strp, opindex, valuep) | |
157 | CGEN_CPU_DESC cd; | |
158 | const char **strp; | |
159 | int opindex; | |
160 | unsigned long *valuep; | |
161 | { | |
162 | return parse_register_list (cd, strp, opindex, valuep, 1/*high*/, 1/*store*/); | |
163 | } | |
164 | ||
165 | /* -- */ | |
166 | ||
167 | /* Main entry point for operand parsing. | |
168 | ||
169 | This function is basically just a big switch statement. Earlier versions | |
170 | used tables to look up the function to use, but | |
171 | - if the table contains both assembler and disassembler functions then | |
172 | the disassembler contains much of the assembler and vice-versa, | |
173 | - there's a lot of inlining possibilities as things grow, | |
174 | - using a switch statement avoids the function call overhead. | |
175 | ||
176 | This function could be moved into `parse_insn_normal', but keeping it | |
177 | separate makes clear the interface between `parse_insn_normal' and each of | |
d5b2f4d6 | 178 | the handlers. */ |
252b5132 RH |
179 | |
180 | const char * | |
181 | fr30_cgen_parse_operand (cd, opindex, strp, fields) | |
182 | CGEN_CPU_DESC cd; | |
183 | int opindex; | |
184 | const char ** strp; | |
185 | CGEN_FIELDS * fields; | |
186 | { | |
eb1b03df DE |
187 | const char * errmsg = NULL; |
188 | /* Used by scalar operands that still need to be parsed. */ | |
189 | long junk; | |
252b5132 RH |
190 | |
191 | switch (opindex) | |
192 | { | |
193 | case FR30_OPERAND_CRI : | |
194 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_cr_names, & fields->f_CRi); | |
195 | break; | |
196 | case FR30_OPERAND_CRJ : | |
197 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_cr_names, & fields->f_CRj); | |
198 | break; | |
199 | case FR30_OPERAND_R13 : | |
eb1b03df | 200 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r13, & junk); |
252b5132 RH |
201 | break; |
202 | case FR30_OPERAND_R14 : | |
eb1b03df | 203 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r14, & junk); |
252b5132 RH |
204 | break; |
205 | case FR30_OPERAND_R15 : | |
eb1b03df | 206 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r15, & junk); |
252b5132 RH |
207 | break; |
208 | case FR30_OPERAND_RI : | |
209 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Ri); | |
210 | break; | |
211 | case FR30_OPERAND_RIC : | |
212 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Ric); | |
213 | break; | |
214 | case FR30_OPERAND_RJ : | |
215 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Rj); | |
216 | break; | |
217 | case FR30_OPERAND_RJC : | |
218 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Rjc); | |
219 | break; | |
220 | case FR30_OPERAND_RS1 : | |
221 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_dr_names, & fields->f_Rs1); | |
222 | break; | |
223 | case FR30_OPERAND_RS2 : | |
224 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_dr_names, & fields->f_Rs2); | |
225 | break; | |
226 | case FR30_OPERAND_CC : | |
227 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CC, &fields->f_cc); | |
228 | break; | |
229 | case FR30_OPERAND_CCC : | |
230 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CCC, &fields->f_ccc); | |
231 | break; | |
232 | case FR30_OPERAND_DIR10 : | |
233 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR10, &fields->f_dir10); | |
234 | break; | |
235 | case FR30_OPERAND_DIR8 : | |
236 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR8, &fields->f_dir8); | |
237 | break; | |
238 | case FR30_OPERAND_DIR9 : | |
239 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR9, &fields->f_dir9); | |
240 | break; | |
241 | case FR30_OPERAND_DISP10 : | |
242 | errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP10, &fields->f_disp10); | |
243 | break; | |
244 | case FR30_OPERAND_DISP8 : | |
245 | errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP8, &fields->f_disp8); | |
246 | break; | |
247 | case FR30_OPERAND_DISP9 : | |
248 | errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP9, &fields->f_disp9); | |
249 | break; | |
250 | case FR30_OPERAND_I20 : | |
251 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I20, &fields->f_i20); | |
252 | break; | |
253 | case FR30_OPERAND_I32 : | |
254 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I32, &fields->f_i32); | |
255 | break; | |
256 | case FR30_OPERAND_I8 : | |
257 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I8, &fields->f_i8); | |
258 | break; | |
259 | case FR30_OPERAND_LABEL12 : | |
260 | { | |
261 | bfd_vma value; | |
262 | errmsg = cgen_parse_address (cd, strp, FR30_OPERAND_LABEL12, 0, NULL, & value); | |
263 | fields->f_rel12 = value; | |
264 | } | |
265 | break; | |
266 | case FR30_OPERAND_LABEL9 : | |
267 | { | |
268 | bfd_vma value; | |
269 | errmsg = cgen_parse_address (cd, strp, FR30_OPERAND_LABEL9, 0, NULL, & value); | |
270 | fields->f_rel9 = value; | |
271 | } | |
272 | break; | |
273 | case FR30_OPERAND_M4 : | |
274 | errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_M4, &fields->f_m4); | |
275 | break; | |
276 | case FR30_OPERAND_PS : | |
eb1b03df | 277 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_ps, & junk); |
252b5132 RH |
278 | break; |
279 | case FR30_OPERAND_REGLIST_HI_LD : | |
280 | errmsg = parse_hi_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_HI_LD, &fields->f_reglist_hi_ld); | |
281 | break; | |
282 | case FR30_OPERAND_REGLIST_HI_ST : | |
283 | errmsg = parse_hi_register_list_st (cd, strp, FR30_OPERAND_REGLIST_HI_ST, &fields->f_reglist_hi_st); | |
284 | break; | |
285 | case FR30_OPERAND_REGLIST_LOW_LD : | |
286 | errmsg = parse_low_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_LOW_LD, &fields->f_reglist_low_ld); | |
287 | break; | |
288 | case FR30_OPERAND_REGLIST_LOW_ST : | |
289 | errmsg = parse_low_register_list_st (cd, strp, FR30_OPERAND_REGLIST_LOW_ST, &fields->f_reglist_low_st); | |
290 | break; | |
291 | case FR30_OPERAND_S10 : | |
292 | errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_S10, &fields->f_s10); | |
293 | break; | |
294 | case FR30_OPERAND_U10 : | |
295 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U10, &fields->f_u10); | |
296 | break; | |
297 | case FR30_OPERAND_U4 : | |
298 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4, &fields->f_u4); | |
299 | break; | |
300 | case FR30_OPERAND_U4C : | |
301 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4C, &fields->f_u4c); | |
302 | break; | |
303 | case FR30_OPERAND_U8 : | |
304 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U8, &fields->f_u8); | |
305 | break; | |
306 | case FR30_OPERAND_UDISP6 : | |
307 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_UDISP6, &fields->f_udisp6); | |
308 | break; | |
309 | ||
310 | default : | |
311 | /* xgettext:c-format */ | |
312 | fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex); | |
313 | abort (); | |
314 | } | |
315 | ||
316 | return errmsg; | |
317 | } | |
318 | ||
319 | cgen_parse_fn * const fr30_cgen_parse_handlers[] = | |
320 | { | |
321 | parse_insn_normal, | |
322 | }; | |
323 | ||
324 | void | |
325 | fr30_cgen_init_asm (cd) | |
326 | CGEN_CPU_DESC cd; | |
327 | { | |
328 | fr30_cgen_init_opcode_table (cd); | |
329 | fr30_cgen_init_ibld_table (cd); | |
330 | cd->parse_handlers = & fr30_cgen_parse_handlers[0]; | |
331 | cd->parse_operand = fr30_cgen_parse_operand; | |
332 | } | |
333 | ||
fc7bc883 RH |
334 | \f |
335 | ||
336 | /* | |
337 | Regex construction routine. | |
338 | ||
339 | This translates an opcode syntax string into a regex string, | |
340 | by replacing any non-character syntax element (such as an | |
341 | opcode) with the pattern '.*' | |
342 | ||
343 | It then compiles the regex and stores it in the opcode, for | |
344 | later use by fr30_cgen_assemble_insn | |
345 | ||
346 | returns NULL for success, an error message for failure | |
347 | */ | |
348 | ||
349 | char * | |
350 | fr30_cgen_build_insn_regex (insn) | |
351 | CGEN_INSN *insn; | |
352 | { | |
d5b2f4d6 | 353 | CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); |
fc7bc883 RH |
354 | const char *mnem = CGEN_INSN_MNEMONIC (insn); |
355 | int mnem_len; | |
356 | char rxbuf[CGEN_MAX_RX_ELEMENTS]; | |
357 | char *rx = rxbuf; | |
358 | const CGEN_SYNTAX_CHAR_TYPE *syn; | |
359 | int reg_err; | |
360 | ||
361 | syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); | |
362 | ||
363 | /* Mnemonics come first in the syntax string */ | |
364 | if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) return "missing mnemonic in syntax string"; | |
365 | ++syn; | |
366 | ||
367 | /* copy the literal mnemonic out of the insn */ | |
368 | memset (rx, 0, CGEN_MAX_RX_ELEMENTS); | |
369 | mnem_len = strlen(mnem); | |
370 | memcpy (rx, mnem, mnem_len); | |
371 | rx += mnem_len; | |
372 | ||
373 | /* copy any remaining literals from the syntax string into the rx */ | |
374 | for(; * syn != 0 && rx < rxbuf + (CGEN_MAX_RX_ELEMENTS - 9); ++syn, ++rx) | |
375 | { | |
376 | if (CGEN_SYNTAX_CHAR_P (* syn)) | |
377 | { | |
378 | char tmp = CGEN_SYNTAX_CHAR (* syn); | |
379 | switch (tmp) | |
380 | { | |
381 | /* escape any regex metacharacters in the syntax */ | |
382 | case '.': case '[': case '\\': | |
383 | case '*': case '^': case '$': | |
384 | ||
385 | #ifdef CGEN_ESCAPE_EXTENDED_REGEX | |
386 | case '?': case '{': case '}': | |
387 | case '(': case ')': case '*': | |
388 | case '|': case '+': case ']': | |
389 | #endif | |
390 | ||
391 | * rx++ = '\\'; | |
392 | break; | |
393 | } | |
394 | /* insert syntax char into rx */ | |
395 | * rx = tmp; | |
396 | } | |
397 | else | |
398 | { | |
399 | /* replace non-syntax fields with globs */ | |
400 | * rx = '.'; | |
401 | * ++rx = '*'; | |
402 | } | |
403 | } | |
404 | ||
405 | /* trailing whitespace ok */ | |
406 | * rx++ = '['; | |
407 | * rx++ = ' '; | |
408 | * rx++ = '\t'; | |
409 | * rx++ = ']'; | |
410 | * rx++ = '*'; | |
411 | ||
412 | /* but anchor it after that */ | |
413 | * rx++ = '$'; | |
414 | * rx = '\0'; | |
415 | ||
416 | CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); | |
417 | reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB|REG_ICASE); | |
418 | ||
419 | if (reg_err == 0) | |
420 | return NULL; | |
421 | else | |
422 | { | |
423 | static char msg[80]; | |
424 | regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80); | |
425 | regfree ((regex_t *) CGEN_INSN_RX (insn)); | |
426 | free (CGEN_INSN_RX (insn)); | |
427 | (CGEN_INSN_RX (insn)) = NULL; | |
428 | return msg; | |
429 | } | |
430 | } | |
431 | ||
252b5132 RH |
432 | \f |
433 | /* Default insn parser. | |
434 | ||
435 | The syntax string is scanned and operands are parsed and stored in FIELDS. | |
436 | Relocs are queued as we go via other callbacks. | |
437 | ||
438 | ??? Note that this is currently an all-or-nothing parser. If we fail to | |
439 | parse the instruction, we return 0 and the caller will start over from | |
440 | the beginning. Backtracking will be necessary in parsing subexpressions, | |
441 | but that can be handled there. Not handling backtracking here may get | |
442 | expensive in the case of the m68k. Deal with later. | |
443 | ||
444 | Returns NULL for success, an error message for failure. | |
445 | */ | |
446 | ||
447 | static const char * | |
448 | parse_insn_normal (cd, insn, strp, fields) | |
449 | CGEN_CPU_DESC cd; | |
450 | const CGEN_INSN *insn; | |
451 | const char **strp; | |
452 | CGEN_FIELDS *fields; | |
453 | { | |
454 | /* ??? Runtime added insns not handled yet. */ | |
455 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); | |
456 | const char *str = *strp; | |
457 | const char *errmsg; | |
458 | const char *p; | |
b3466c39 | 459 | const CGEN_SYNTAX_CHAR_TYPE * syn; |
252b5132 RH |
460 | #ifdef CGEN_MNEMONIC_OPERANDS |
461 | /* FIXME: wip */ | |
462 | int past_opcode_p; | |
463 | #endif | |
464 | ||
465 | /* For now we assume the mnemonic is first (there are no leading operands). | |
466 | We can parse it without needing to set up operand parsing. | |
467 | GAS's input scrubber will ensure mnemonics are lowercase, but we may | |
468 | not be called from GAS. */ | |
469 | p = CGEN_INSN_MNEMONIC (insn); | |
3882b010 | 470 | while (*p && TOLOWER (*p) == TOLOWER (*str)) |
252b5132 | 471 | ++p, ++str; |
1fa60b5d DE |
472 | |
473 | if (* p) | |
474 | return _("unrecognized instruction"); | |
475 | ||
476 | #ifndef CGEN_MNEMONIC_OPERANDS | |
3882b010 | 477 | if (* str && !ISSPACE (* str)) |
252b5132 | 478 | return _("unrecognized instruction"); |
1fa60b5d | 479 | #endif |
252b5132 RH |
480 | |
481 | CGEN_INIT_PARSE (cd); | |
482 | cgen_init_parse_operand (cd); | |
483 | #ifdef CGEN_MNEMONIC_OPERANDS | |
484 | past_opcode_p = 0; | |
485 | #endif | |
486 | ||
487 | /* We don't check for (*str != '\0') here because we want to parse | |
488 | any trailing fake arguments in the syntax string. */ | |
489 | syn = CGEN_SYNTAX_STRING (syntax); | |
490 | ||
491 | /* Mnemonics come first for now, ensure valid string. */ | |
492 | if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) | |
493 | abort (); | |
494 | ||
495 | ++syn; | |
496 | ||
497 | while (* syn != 0) | |
498 | { | |
499 | /* Non operand chars must match exactly. */ | |
500 | if (CGEN_SYNTAX_CHAR_P (* syn)) | |
501 | { | |
1fa60b5d DE |
502 | /* FIXME: While we allow for non-GAS callers above, we assume the |
503 | first char after the mnemonic part is a space. */ | |
504 | /* FIXME: We also take inappropriate advantage of the fact that | |
505 | GAS's input scrubber will remove extraneous blanks. */ | |
3882b010 | 506 | if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn))) |
252b5132 RH |
507 | { |
508 | #ifdef CGEN_MNEMONIC_OPERANDS | |
b3466c39 | 509 | if (CGEN_SYNTAX_CHAR(* syn) == ' ') |
252b5132 RH |
510 | past_opcode_p = 1; |
511 | #endif | |
512 | ++ syn; | |
513 | ++ str; | |
514 | } | |
b3466c39 | 515 | else if (*str) |
252b5132 RH |
516 | { |
517 | /* Syntax char didn't match. Can't be this insn. */ | |
6bb95a0f DB |
518 | static char msg [80]; |
519 | /* xgettext:c-format */ | |
520 | sprintf (msg, _("syntax error (expected char `%c', found `%c')"), | |
b3466c39 DB |
521 | CGEN_SYNTAX_CHAR(*syn), *str); |
522 | return msg; | |
523 | } | |
524 | else | |
525 | { | |
526 | /* Ran out of input. */ | |
527 | static char msg [80]; | |
528 | /* xgettext:c-format */ | |
529 | sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"), | |
530 | CGEN_SYNTAX_CHAR(*syn)); | |
6bb95a0f | 531 | return msg; |
252b5132 RH |
532 | } |
533 | continue; | |
534 | } | |
535 | ||
536 | /* We have an operand of some sort. */ | |
537 | errmsg = fr30_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), | |
538 | &str, fields); | |
539 | if (errmsg) | |
540 | return errmsg; | |
541 | ||
542 | /* Done with this operand, continue with next one. */ | |
543 | ++ syn; | |
544 | } | |
545 | ||
546 | /* If we're at the end of the syntax string, we're done. */ | |
b3466c39 | 547 | if (* syn == 0) |
252b5132 RH |
548 | { |
549 | /* FIXME: For the moment we assume a valid `str' can only contain | |
550 | blanks now. IE: We needn't try again with a longer version of | |
551 | the insn and it is assumed that longer versions of insns appear | |
552 | before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ | |
3882b010 | 553 | while (ISSPACE (* str)) |
252b5132 RH |
554 | ++ str; |
555 | ||
556 | if (* str != '\0') | |
557 | return _("junk at end of line"); /* FIXME: would like to include `str' */ | |
558 | ||
559 | return NULL; | |
560 | } | |
561 | ||
562 | /* We couldn't parse it. */ | |
563 | return _("unrecognized instruction"); | |
564 | } | |
565 | \f | |
566 | /* Main entry point. | |
567 | This routine is called for each instruction to be assembled. | |
568 | STR points to the insn to be assembled. | |
569 | We assume all necessary tables have been initialized. | |
570 | The assembled instruction, less any fixups, is stored in BUF. | |
571 | Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value | |
572 | still needs to be converted to target byte order, otherwise BUF is an array | |
573 | of bytes in target byte order. | |
574 | The result is a pointer to the insn's entry in the opcode table, | |
575 | or NULL if an error occured (an error message will have already been | |
576 | printed). | |
577 | ||
578 | Note that when processing (non-alias) macro-insns, | |
579 | this function recurses. | |
580 | ||
581 | ??? It's possible to make this cpu-independent. | |
582 | One would have to deal with a few minor things. | |
583 | At this point in time doing so would be more of a curiosity than useful | |
584 | [for example this file isn't _that_ big], but keeping the possibility in | |
585 | mind helps keep the design clean. */ | |
586 | ||
587 | const CGEN_INSN * | |
588 | fr30_cgen_assemble_insn (cd, str, fields, buf, errmsg) | |
589 | CGEN_CPU_DESC cd; | |
590 | const char *str; | |
591 | CGEN_FIELDS *fields; | |
592 | CGEN_INSN_BYTES_PTR buf; | |
593 | char **errmsg; | |
594 | { | |
595 | const char *start; | |
596 | CGEN_INSN_LIST *ilist; | |
b3466c39 DB |
597 | const char *parse_errmsg = NULL; |
598 | const char *insert_errmsg = NULL; | |
fc7bc883 | 599 | int recognized_mnemonic = 0; |
252b5132 RH |
600 | |
601 | /* Skip leading white space. */ | |
3882b010 | 602 | while (ISSPACE (* str)) |
252b5132 RH |
603 | ++ str; |
604 | ||
605 | /* The instructions are stored in hashed lists. | |
606 | Get the first in the list. */ | |
607 | ilist = CGEN_ASM_LOOKUP_INSN (cd, str); | |
608 | ||
609 | /* Keep looking until we find a match. */ | |
610 | ||
611 | start = str; | |
612 | for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) | |
613 | { | |
614 | const CGEN_INSN *insn = ilist->insn; | |
fc7bc883 | 615 | recognized_mnemonic = 1; |
252b5132 | 616 | |
6bb95a0f DB |
617 | #ifdef CGEN_VALIDATE_INSN_SUPPORTED |
618 | /* not usually needed as unsupported opcodes shouldn't be in the hash lists */ | |
252b5132 RH |
619 | /* Is this insn supported by the selected cpu? */ |
620 | if (! fr30_cgen_insn_supported (cd, insn)) | |
621 | continue; | |
622 | #endif | |
623 | ||
624 | /* If the RELAX attribute is set, this is an insn that shouldn't be | |
625 | chosen immediately. Instead, it is used during assembler/linker | |
626 | relaxation if possible. */ | |
627 | if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0) | |
628 | continue; | |
629 | ||
630 | str = start; | |
631 | ||
fc7bc883 RH |
632 | /* skip this insn if str doesn't look right lexically */ |
633 | if (CGEN_INSN_RX (insn) != NULL && | |
634 | regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH) | |
635 | continue; | |
636 | ||
252b5132 RH |
637 | /* Allow parse/insert handlers to obtain length of insn. */ |
638 | CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); | |
639 | ||
b3466c39 DB |
640 | parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields); |
641 | if (parse_errmsg != NULL) | |
6bb95a0f | 642 | continue; |
252b5132 | 643 | |
6bb95a0f | 644 | /* ??? 0 is passed for `pc' */ |
b3466c39 DB |
645 | insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, |
646 | (bfd_vma) 0); | |
647 | if (insert_errmsg != NULL) | |
6bb95a0f DB |
648 | continue; |
649 | ||
650 | /* It is up to the caller to actually output the insn and any | |
651 | queued relocs. */ | |
652 | return insn; | |
252b5132 RH |
653 | } |
654 | ||
252b5132 | 655 | { |
6bb95a0f | 656 | static char errbuf[150]; |
fc7bc883 | 657 | #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS |
b3466c39 | 658 | const char *tmp_errmsg; |
6bb95a0f | 659 | |
b3466c39 DB |
660 | /* If requesting verbose error messages, use insert_errmsg. |
661 | Failing that, use parse_errmsg */ | |
662 | tmp_errmsg = (insert_errmsg ? insert_errmsg : | |
663 | parse_errmsg ? parse_errmsg : | |
fc7bc883 | 664 | recognized_mnemonic ? _("unrecognized form of instruction") : |
b3466c39 DB |
665 | _("unrecognized instruction")); |
666 | ||
6bb95a0f DB |
667 | if (strlen (start) > 50) |
668 | /* xgettext:c-format */ | |
669 | sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); | |
670 | else | |
671 | /* xgettext:c-format */ | |
672 | sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); | |
673 | #else | |
252b5132 RH |
674 | if (strlen (start) > 50) |
675 | /* xgettext:c-format */ | |
676 | sprintf (errbuf, _("bad instruction `%.50s...'"), start); | |
677 | else | |
678 | /* xgettext:c-format */ | |
679 | sprintf (errbuf, _("bad instruction `%.50s'"), start); | |
6bb95a0f | 680 | #endif |
252b5132 RH |
681 | |
682 | *errmsg = errbuf; | |
683 | return NULL; | |
684 | } | |
685 | } | |
686 | \f | |
687 | #if 0 /* This calls back to GAS which we can't do without care. */ | |
688 | ||
689 | /* Record each member of OPVALS in the assembler's symbol table. | |
690 | This lets GAS parse registers for us. | |
691 | ??? Interesting idea but not currently used. */ | |
692 | ||
693 | /* Record each member of OPVALS in the assembler's symbol table. | |
694 | FIXME: Not currently used. */ | |
695 | ||
696 | void | |
697 | fr30_cgen_asm_hash_keywords (cd, opvals) | |
698 | CGEN_CPU_DESC cd; | |
699 | CGEN_KEYWORD *opvals; | |
700 | { | |
701 | CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL); | |
702 | const CGEN_KEYWORD_ENTRY * ke; | |
703 | ||
704 | while ((ke = cgen_keyword_search_next (& search)) != NULL) | |
705 | { | |
706 | #if 0 /* Unnecessary, should be done in the search routine. */ | |
707 | if (! fr30_cgen_opval_supported (ke)) | |
708 | continue; | |
709 | #endif | |
710 | cgen_asm_record_register (cd, ke->name, ke->value); | |
711 | } | |
712 | } | |
713 | ||
714 | #endif /* 0 */ |