[deliverable/binutils-gdb.git] / opcodes / h8300-dis.c

/* Disassemble h8300 instructions.
   Copyright 1993, 1994, 1996, 1998, 2000, 2001, 2002, 2003, 2004, 2005
   Free Software Foundation, Inc.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
   MA 02110-1301, USA.  */

#define DEFINE_TABLE

#include "sysdep.h"
#define h8_opcodes h8ops
#include "opcode/h8300.h"
#include "dis-asm.h"
#include "opintl.h"
#include "libiberty.h"

struct h8_instruction
{
  int length;
  const struct h8_opcode *opcode;
};

struct h8_instruction *h8_instructions;

/* Run through the opcodes and sort them into order to make them easy
   to disassemble.  */

static void
bfd_h8_disassemble_init (void)
{
  unsigned int i;
  unsigned int nopcodes;
  const struct h8_opcode *p;
  struct h8_instruction *pi;

  nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);

  h8_instructions = xmalloc (nopcodes * sizeof (struct h8_instruction));

  for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++)
    {
      int n1 = 0;
      int n2 = 0;

      if ((int) p->data.nib[0] < 16)
	n1 = (int) p->data.nib[0];
      else
	n1 = 0;

      if ((int) p->data.nib[1] < 16)
	n2 = (int) p->data.nib[1];
      else
	n2 = 0;

      /* Just make sure there are an even number of nibbles in it, and
	 that the count is the same as the length.  */
      for (i = 0; p->data.nib[i] != (op_type) E; i++)
	;

      if (i & 1)
	{
	  fprintf (stderr, "Internal error, h8_disassemble_init.\n");
	  abort ();
	}

      pi->length = i / 2;
      pi->opcode = p;
    }

  /* Add entry for the NULL vector terminator.  */
  pi->length = 0;
  pi->opcode = p;
}

static void
extract_immediate (FILE *stream,
		   op_type looking_for,
		   int thisnib,
		   unsigned char *data,
		   int *cst,
		   int *len,
		   const struct h8_opcode *q)
{
  switch (looking_for & SIZE)
    {
    case L_2:
      *len = 2;
      *cst = thisnib & 3;

      /* DISP2 special treatment.  */
      if ((looking_for & MODE) == DISP)
	{
	  if (OP_KIND (q->how) == O_MOVAB
	      || OP_KIND (q->how) == O_MOVAW
	      || OP_KIND (q->how) == O_MOVAL)
	    {
	      /* Handling for mova insn.  */
	      switch (q->args.nib[0] & MODE)
		{
		case INDEXB:
		default:
		  break;
		case INDEXW:
		  *cst *= 2;
		  break;
		case INDEXL:
		  *cst *= 4;
		  break;
		}
	    }
	  else
	    {
	      /* Handling for non-mova insn.  */
	      switch (OP_SIZE (q->how))
		{
		default: break;
		case SW:
		  *cst *= 2;
		  break;
		case SL:
		  *cst *= 4;
		  break;
		}
	    }
	}
      break;
    case L_8:
      *len = 8;
      *cst = data[0];
      break;
    case L_16:
    case L_16U:
      *len = 16;
      *cst = (data[0] << 8) + data [1];
#if 0
      if ((looking_for & SIZE) == L_16)
	*cst = (short) *cst;	/* Sign extend.  */
#endif
      break;
    case L_32:
      *len = 32;
      *cst = (data[0] << 24) + (data[1] << 16) + (data[2] << 8) + data[3];
      break;
    default:
      *len = 0;
      *cst = 0;
      fprintf (stream, "DISP bad size\n");
      break;
    }
}

static const char *regnames[] =
{
  "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
  "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
};
static const char *wregnames[] =
{
  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
  "e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
};
static const char *lregnames[] =
{
  "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
  "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
};
static const char *cregnames[] =
{
  "ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
};

static void
print_one_arg (disassemble_info *info,
	       bfd_vma addr,
	       op_type x,
	       int cst,
	       int cstlen,
	       int rdisp_n,
	       int rn,
	       const char **pregnames,
	       int len)
{
  void * stream = info->stream;
  fprintf_ftype outfn = info->fprintf_func;

  if ((x & SIZE) == L_3 || (x & SIZE) == L_3NZ)
    outfn (stream, "#0x%x", (unsigned) cst);
  else if ((x & MODE) == IMM)
    outfn (stream, "#0x%x", (unsigned) cst);
  else if ((x & MODE) == DBIT || (x & MODE) == KBIT)
    outfn (stream, "#%d", (unsigned) cst);
  else if ((x & MODE) == CONST_2)
    outfn (stream, "#2");
  else if ((x & MODE) == CONST_4)
    outfn (stream, "#4");
  else if ((x & MODE) == CONST_8)
    outfn (stream, "#8");
  else if ((x & MODE) == CONST_16)
    outfn (stream, "#16");
  else if ((x & MODE) == REG)
    {
      switch (x & SIZE)
	{
	case L_8:
	  outfn (stream, "%s", regnames[rn]);
	  break;
	case L_16:
	case L_16U:
	  outfn (stream, "%s", wregnames[rn]);
	  break;
	case L_P:
	case L_32:
	  outfn (stream, "%s", lregnames[rn]);
	  break;
	}
    }
  else if ((x & MODE) == LOWREG)
    {
      switch (x & SIZE)
	{
	case L_8:
	  /* Always take low half of reg.  */
	  outfn (stream, "%s.b", regnames[rn < 8 ? rn + 8 : rn]);
	  break;
	case L_16:
	case L_16U:
	  /* Always take low half of reg.  */
	  outfn (stream, "%s.w", wregnames[rn < 8 ? rn : rn - 8]);
	  break;
	case L_P:
	case L_32:
	  outfn (stream, "%s.l", lregnames[rn]);
	  break;
	}
    }
  else if ((x & MODE) == POSTINC)
    outfn (stream, "@%s+", pregnames[rn]);

  else if ((x & MODE) == POSTDEC)
    outfn (stream, "@%s-", pregnames[rn]);

  else if ((x & MODE) == PREINC)
    outfn (stream, "@+%s", pregnames[rn]);

  else if ((x & MODE) == PREDEC)
    outfn (stream, "@-%s", pregnames[rn]);

  else if ((x & MODE) == IND)
    outfn (stream, "@%s", pregnames[rn]);

  else if ((x & MODE) == ABS || (x & ABSJMP))
    outfn (stream, "@0x%x:%d", (unsigned) cst, cstlen);

  else if ((x & MODE) == MEMIND)
    outfn (stream, "@@%d (0x%x)", cst, cst);

  else if ((x & MODE) == VECIND)
    {
      /* FIXME Multiplier should be 2 or 4, depending on processor mode,
	 by which is meant "normal" vs. "middle", "advanced", "maximum".  */

      int offset = (cst + 0x80) * 4;
      outfn (stream, "@@%d (0x%x)", offset, offset);
    }
  else if ((x & MODE) == PCREL)
    {
      if ((x & SIZE) == L_16 ||
	  (x & SIZE) == L_16U)
	{
	  outfn (stream, ".%s%d (0x%lx)",
		   (short) cst > 0 ? "+" : "",
		   (short) cst, 
		   (long)(addr + (short) cst + len));
	}
      else
	{
	  outfn (stream, ".%s%d (0x%lx)",
		   (char) cst > 0 ? "+" : "",
		   (char) cst, 
		   (long)(addr + (char) cst + len));
	}
    }
  else if ((x & MODE) == DISP)
    outfn (stream, "@(0x%x:%d,%s)", cst, cstlen, pregnames[rdisp_n]);

  else if ((x & MODE) == INDEXB)
    /* Always take low half of reg.  */
    outfn (stream, "@(0x%x:%d,%s.b)", cst, cstlen, 
	   regnames[rdisp_n < 8 ? rdisp_n + 8 : rdisp_n]);

  else if ((x & MODE) == INDEXW)
    /* Always take low half of reg.  */
    outfn (stream, "@(0x%x:%d,%s.w)", cst, cstlen, 
	   wregnames[rdisp_n < 8 ? rdisp_n : rdisp_n - 8]);

  else if ((x & MODE) == INDEXL)
    outfn (stream, "@(0x%x:%d,%s.l)", cst, cstlen, lregnames[rdisp_n]);

  else if (x & CTRL)
    outfn (stream, cregnames[rn]);

  else if ((x & MODE) == CCR)
    outfn (stream, "ccr");

  else if ((x & MODE) == EXR)
    outfn (stream, "exr");

  else if ((x & MODE) == MACREG)
    outfn (stream, "mac%c", cst ? 'l' : 'h');

  else
    /* xgettext:c-format */
    outfn (stream, _("Hmmmm 0x%x"), x);
}

static unsigned int
bfd_h8_disassemble (bfd_vma addr, disassemble_info *info, int mach)
{
  /* Find the first entry in the table for this opcode.  */
  int regno[3] = { 0, 0, 0 };
  int dispregno[3] = { 0, 0, 0 };
  int cst[3] = { 0, 0, 0 };
  int cstlen[3] = { 0, 0, 0 };
  static bfd_boolean init = 0;
  const struct h8_instruction *qi;
  char const **pregnames = mach != 0 ? lregnames : wregnames;
  int status;
  unsigned int l;
  unsigned char data[MAX_CODE_NIBBLES];
  void *stream = info->stream;
  fprintf_ftype outfn = info->fprintf_func;

  if (!init)
    {
      bfd_h8_disassemble_init ();
      init = 1;
    }

  status = info->read_memory_func (addr, data, 2, info);
  if (status != 0)
    {
      info->memory_error_func (status, addr, info);
      return -1;
    }

  for (l = 2; status == 0 && l < sizeof (data) / 2; l += 2)
    status = info->read_memory_func (addr + l, data + l, 2, info);

  /* Find the exact opcode/arg combo.  */
  for (qi = h8_instructions; qi->opcode->name; qi++)
    {
      const struct h8_opcode *q = qi->opcode;
      op_type *nib = q->data.nib;
      unsigned int len = 0;

      while (1)
	{
	  op_type looking_for = *nib;
	  int thisnib = data[len / 2];
	  int opnr;

	  thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib / 16) & 0xf);
	  opnr = ((looking_for & OP3) == OP3 ? 2
		  : (looking_for & DST) == DST ? 1 : 0);

	  if (looking_for < 16 && looking_for >= 0)
	    {
	      if (looking_for != thisnib)
		goto fail;
	    }
	  else
	    {
	      if ((int) looking_for & (int) B31)
		{
		  if (!((thisnib & 0x8) != 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B31);
		  thisnib &= 0x7;
		}
	      else if ((int) looking_for & (int) B30)
		{
		  if (!((thisnib & 0x8) == 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B30);
		}

	      if ((int) looking_for & (int) B21)
		{
		  if (!((thisnib & 0x4) != 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B21);
		  thisnib &= 0xb;
		}
	      else if ((int) looking_for & (int) B20)
		{
		  if (!((thisnib & 0x4) == 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B20);
		}
	      if ((int) looking_for & (int) B11)
		{
		  if (!((thisnib & 0x2) != 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B11);
		  thisnib &= 0xd;
		}
	      else if ((int) looking_for & (int) B10)
		{
		  if (!((thisnib & 0x2) == 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B10);
		}

	      if ((int) looking_for & (int) B01)
		{
		  if (!((thisnib & 0x1) != 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B01);
		  thisnib &= 0xe;
		}
	      else if ((int) looking_for & (int) B00)
		{
		  if (!((thisnib & 0x1) == 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B00);
		}

	      if (looking_for & IGNORE)
		{
		  /* Hitachi has declared that IGNORE must be zero.  */
		  if (thisnib != 0)
		    goto fail;
		}
	      else if ((looking_for & MODE) == DATA)
		{
		  ;			/* Skip embedded data.  */
		}
	      else if ((looking_for & MODE) == DBIT)
		{
		  /* Exclude adds/subs by looking at bit 0 and 2, and
                     make sure the operand size, either w or l,
                     matches by looking at bit 1.  */
		  if ((looking_for & 7) != (thisnib & 7))
		    goto fail;

		  cst[opnr] = (thisnib & 0x8) ? 2 : 1;
		}
	      else if ((looking_for & MODE) == DISP
		       || (looking_for & MODE) == ABS
		       || (looking_for & MODE) == PCREL
		       || (looking_for & MODE) == INDEXB
		       || (looking_for & MODE) == INDEXW
		       || (looking_for & MODE) == INDEXL)
		{
		  extract_immediate (stream, looking_for, thisnib, 
				     data + len / 2, cst + opnr, 
				     cstlen + opnr, q);
		  /* Even address == bra, odd == bra/s.  */
		  if (q->how == O (O_BRAS, SB))
		    cst[opnr] -= 1;
		}
	      else if ((looking_for & MODE) == REG
		       || (looking_for & MODE) == LOWREG
		       || (looking_for & MODE) == IND
		       || (looking_for & MODE) == PREINC
		       || (looking_for & MODE) == POSTINC
		       || (looking_for & MODE) == PREDEC
		       || (looking_for & MODE) == POSTDEC)
		{
		  regno[opnr] = thisnib;
		}
	      else if (looking_for & CTRL)	/* Control Register.  */
		{
		  thisnib &= 7;
		  if (((looking_for & MODE) == CCR  && (thisnib != C_CCR))
		      || ((looking_for & MODE) == EXR  && (thisnib != C_EXR))
		      || ((looking_for & MODE) == MACH && (thisnib != C_MACH))
		      || ((looking_for & MODE) == MACL && (thisnib != C_MACL))
		      || ((looking_for & MODE) == VBR  && (thisnib != C_VBR))
		      || ((looking_for & MODE) == SBR  && (thisnib != C_SBR)))
		    goto fail;
		  if (((looking_for & MODE) == CCR_EXR
		       && (thisnib != C_CCR && thisnib != C_EXR))
		      || ((looking_for & MODE) == VBR_SBR
			  && (thisnib != C_VBR && thisnib != C_SBR))
		      || ((looking_for & MODE) == MACREG
			  && (thisnib != C_MACH && thisnib != C_MACL)))
		    goto fail;
		  if (((looking_for & MODE) == CC_EX_VB_SB
		       && (thisnib != C_CCR && thisnib != C_EXR
			   && thisnib != C_VBR && thisnib != C_SBR)))
		    goto fail;

		  regno[opnr] = thisnib;
		}
	      else if ((looking_for & SIZE) == L_5)
		{
		  cst[opnr] = data[len / 2] & 31;
		  cstlen[opnr] = 5;
		}
	      else if ((looking_for & SIZE) == L_4)
		{
		  cst[opnr] = thisnib;
		  cstlen[opnr] = 4;
		}
	      else if ((looking_for & SIZE) == L_16
		       || (looking_for & SIZE) == L_16U)
		{
		  cst[opnr] = (data[len / 2]) * 256 + data[(len + 2) / 2];
		  cstlen[opnr] = 16;
		}
	      else if ((looking_for & MODE) == MEMIND)
		{
		  cst[opnr] = data[1];
		}
	      else if ((looking_for & MODE) == VECIND)
		{
		  cst[opnr] = data[1] & 0x7f;
		}
	      else if ((looking_for & SIZE) == L_32)
		{
		  int i = len / 2;

		  cst[opnr] = ((data[i] << 24) 
			       | (data[i + 1] << 16) 
			       | (data[i + 2] << 8)
			       | (data[i + 3]));

		  cstlen[opnr] = 32;
		}
	      else if ((looking_for & SIZE) == L_24)
		{
		  int i = len / 2;

		  cst[opnr] = 
		    (data[i] << 16) | (data[i + 1] << 8) | (data[i + 2]);
		  cstlen[opnr] = 24;
		}
	      else if (looking_for & IGNORE)
		{
		  ;
		}
	      else if (looking_for & DISPREG)
		{
		  dispregno[opnr] = thisnib & 7;
		}
	      else if ((looking_for & MODE) == KBIT)
		{
		  switch (thisnib)
		    {
		    case 9:
		      cst[opnr] = 4;
		      break;
		    case 8:
		      cst[opnr] = 2;
		      break;
		    case 0:
		      cst[opnr] = 1;
		      break;
		    default:
		      goto fail;
		    }
		}
	      else if ((looking_for & SIZE) == L_8)
		{
		  cstlen[opnr] = 8;
		  cst[opnr] = data[len / 2];
		}
	      else if ((looking_for & SIZE) == L_3
		       || (looking_for & SIZE) == L_3NZ)
		{
		  cst[opnr] = thisnib & 0x7;
		  if (cst[opnr] == 0 && (looking_for & SIZE) == L_3NZ)
		    goto fail;
		}
	      else if ((looking_for & SIZE) == L_2)
		{
		  cstlen[opnr] = 2;
		  cst[opnr] = thisnib & 0x3;
		}
	      else if ((looking_for & MODE) == MACREG)
		{
		  cst[opnr] = (thisnib == 3);
		}
	      else if (looking_for == (op_type) E)
		{
		  outfn (stream, "%s\t", q->name);

		  /* Gross.  Disgusting.  */
		  if (strcmp (q->name, "ldm.l") == 0)
		    {
		      int count, high;

		      count = (data[1] / 16) & 0x3;
		      high = regno[1];

		      outfn (stream, "@sp+,er%d-er%d", high - count, high);
		      return qi->length;
		    }

		  if (strcmp (q->name, "stm.l") == 0)
		    {
		      int count, low;

		      count = (data[1] / 16) & 0x3;
		      low = regno[0];

		      outfn (stream, "er%d-er%d,@-sp", low, low + count);
		      return qi->length;
		    }
		  if (strcmp (q->name, "rte/l") == 0
		      || strcmp (q->name, "rts/l") == 0)
		    {
		      if (regno[0] == 0)
			outfn (stream, "er%d", regno[1]);
		      else
			outfn (stream, "er%d-er%d", regno[1] - regno[0],
			       regno[1]);
		      return qi->length;
		    }
		  if (strncmp (q->name, "mova", 4) == 0)
		    {
		      op_type *args = q->args.nib;

		      if (args[1] == (op_type) E)
			{
			  /* Short form.  */
			  print_one_arg (info, addr, args[0], cst[0], 
					 cstlen[0], dispregno[0], regno[0], 
					 pregnames, qi->length);
			  outfn (stream, ",er%d", dispregno[0]);
			}
		      else
			{
			  outfn (stream, "@(0x%x:%d,", cst[0], cstlen[0]);
			  print_one_arg (info, addr, args[1], cst[1], 
					 cstlen[1], dispregno[1], regno[1], 
					 pregnames, qi->length);
			  outfn (stream, ".%c),",
				 (args[0] & MODE) == INDEXB ? 'b' : 'w');
			  print_one_arg (info, addr, args[2], cst[2], 
					 cstlen[2], dispregno[2], regno[2], 
					 pregnames, qi->length);
			}
		      return qi->length;
		    }
		  /* Fill in the args.  */
		  {
		    op_type *args = q->args.nib;
		    int hadone = 0;
		    int nargs;

		    /* Special case handling for the adds and subs instructions
		       since in H8 mode thay can only take the r0-r7 registers
		       but in other (higher) modes they can take the er0-er7
		       registers as well.  */
		    if (strcmp (qi->opcode->name, "adds") == 0
			|| strcmp (qi->opcode->name, "subs") == 0)
		      {
			outfn (stream, "#%d,%s", cst[0], pregnames[regno[1] & 0x7]);
			return qi->length;
		      }

		    for (nargs = 0; 
			 nargs < 3 && args[nargs] != (op_type) E;
			 nargs++)
		      {
			int x = args[nargs];

			if (hadone)
			  outfn (stream, ",");

			print_one_arg (info, addr, x,
				       cst[nargs], cstlen[nargs],
				       dispregno[nargs], regno[nargs],
				       pregnames, qi->length);

			hadone = 1;
		      }
		  }

		  return qi->length;
		}
	      else
		/* xgettext:c-format */
		outfn (stream, _("Don't understand 0x%x \n"), looking_for);
	    }

	  len++;
	  nib++;
	}

    fail:
      ;
    }

  /* Fell off the end.  */
  outfn (stream, ".word\tH'%x,H'%x", data[0], data[1]);
  return 2;
}

int
print_insn_h8300 (bfd_vma addr, disassemble_info *info)
{
  return bfd_h8_disassemble (addr, info, 0);
}

int
print_insn_h8300h (bfd_vma addr, disassemble_info *info)
{
  return bfd_h8_disassemble (addr, info, 1);
}

int
print_insn_h8300s (bfd_vma addr, disassemble_info *info)
{
  return bfd_h8_disassemble (addr, info, 2);
}
Commit	Line	Data
252b5132	1	/* Disassemble h8300 instructions.
47b0e7ad	2	Copyright 1993, 1994, 1996, 1998, 2000, 2001, 2002, 2003, 2004, 2005
56da5fed	3	Free Software Foundation, Inc.
252b5132	4
ed049af3 NC	5	This program is free software; you can redistribute it and/or modify
	6	it under the terms of the GNU General Public License as published by
	7	the Free Software Foundation; either version 2 of the License, or
	8	(at your option) any later version.
252b5132	9
ed049af3 NC	10	This program is distributed in the hope that it will be useful,
	11	but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	GNU General Public License for more details.
252b5132	14
ed049af3 NC	15	You should have received a copy of the GNU General Public License
ed049af3 NC	16	along with this program; if not, write to the Free Software
47b0e7ad NC	17	Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
47b0e7ad NC	18	MA 02110-1301, USA. */
252b5132 RH	19
	20	#define DEFINE_TABLE
	21
0d8dfecf	22	#include "sysdep.h"
252b5132 RH	23	#define h8_opcodes h8ops
	24	#include "opcode/h8300.h"
	25	#include "dis-asm.h"
	26	#include "opintl.h"
a3e64b75 KD	27	#include "libiberty.h"
	28
	29	struct h8_instruction
	30	{
	31	int length;
	32	const struct h8_opcode *opcode;
	33	};
	34
	35	struct h8_instruction *h8_instructions;
252b5132	36
252b5132	37	/* Run through the opcodes and sort them into order to make them easy
3903e627	38	to disassemble. */
20dc5b5a	39
252b5132	40	static void
47b0e7ad	41	bfd_h8_disassemble_init (void)
252b5132 RH	42	{
252b5132 RH	43	unsigned int i;
a3e64b75 KD	44	unsigned int nopcodes;
	45	const struct h8_opcode *p;
	46	struct h8_instruction *pi;
252b5132	47
a3e64b75	48	nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);
b34976b6	49
47b0e7ad	50	h8_instructions = xmalloc (nopcodes * sizeof (struct h8_instruction));
a3e64b75 KD	51
a3e64b75 KD	52	for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++)
252b5132 RH	53	{
	54	int n1 = 0;
	55	int n2 = 0;
	56
	57	if ((int) p->data.nib[0] < 16)
5fec0fc5	58	n1 = (int) p->data.nib[0];
252b5132 RH	59	else
252b5132 RH	60	n1 = 0;
53d388d1	61
252b5132	62	if ((int) p->data.nib[1] < 16)
5fec0fc5	63	n2 = (int) p->data.nib[1];
252b5132 RH	64	else
	65	n2 = 0;
	66
	67	/* Just make sure there are an even number of nibbles in it, and
3903e627	68	that the count is the same as the length. */
20dc5b5a	69	for (i = 0; p->data.nib[i] != (op_type) E; i++)
53d388d1 JL	70	;
53d388d1 JL	71
252b5132	72	if (i & 1)
20dc5b5a MS	73	{
	74	fprintf (stderr, "Internal error, h8_disassemble_init.\n");
	75	abort ();
	76	}
53d388d1	77
a3e64b75 KD	78	pi->length = i / 2;
a3e64b75 KD	79	pi->opcode = p;
252b5132	80	}
a3e64b75 KD	81
	82	/* Add entry for the NULL vector terminator. */
	83	pi->length = 0;
	84	pi->opcode = p;
252b5132 RH	85	}
252b5132 RH	86
20dc5b5a	87	static void
47b0e7ad NC	88	extract_immediate (FILE *stream,
	89	op_type looking_for,
	90	int thisnib,
	91	unsigned char *data,
	92	int *cst,
	93	int *len,
	94	const struct h8_opcode *q)
20dc5b5a MS	95	{
	96	switch (looking_for & SIZE)
	97	{
	98	case L_2:
	99	*len = 2;
	100	*cst = thisnib & 3;
	101
	102	/* DISP2 special treatment. */
	103	if ((looking_for & MODE) == DISP)
	104	{
47b0e7ad NC	105	if (OP_KIND (q->how) == O_MOVAB
	106	\|\| OP_KIND (q->how) == O_MOVAW
	107	\|\| OP_KIND (q->how) == O_MOVAL)
20dc5b5a MS	108	{
20dc5b5a MS	109	/* Handling for mova insn. */
47b0e7ad NC	110	switch (q->args.nib[0] & MODE)
	111	{
	112	case INDEXB:
	113	default:
	114	break;
	115	case INDEXW:
	116	cst = 2;
	117	break;
	118	case INDEXL:
	119	cst = 4;
	120	break;
	121	}
20dc5b5a MS	122	}
	123	else
	124	{
	125	/* Handling for non-mova insn. */
47b0e7ad NC	126	switch (OP_SIZE (q->how))
	127	{
	128	default: break;
	129	case SW:
	130	cst = 2;
	131	break;
	132	case SL:
	133	cst = 4;
	134	break;
	135	}
20dc5b5a MS	136	}
	137	}
	138	break;
	139	case L_8:
	140	*len = 8;
	141	*cst = data[0];
	142	break;
	143	case L_16:
	144	case L_16U:
	145	*len = 16;
	146	*cst = (data[0] << 8) + data [1];
	147	#if 0
	148	if ((looking_for & SIZE) == L_16)
47b0e7ad	149	cst = (short) cst; /* Sign extend. */
20dc5b5a MS	150	#endif
	151	break;
	152	case L_32:
	153	*len = 32;
	154	*cst = (data[0] << 24) + (data[1] << 16) + (data[2] << 8) + data[3];
	155	break;
	156	default:
	157	*len = 0;
	158	*cst = 0;
	159	fprintf (stream, "DISP bad size\n");
	160	break;
	161	}
	162	}
	163
	164	static const char *regnames[] =
	165	{
	166	"r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
	167	"r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
	168	};
	169	static const char *wregnames[] =
	170	{
	171	"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
	172	"e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
	173	};
	174	static const char *lregnames[] =
	175	{
	176	"er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
	177	"er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
	178	};
	179	static const char *cregnames[] =
	180	{
	181	"ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
	182	};
	183
	184	static void
47b0e7ad NC	185	print_one_arg (disassemble_info *info,
	186	bfd_vma addr,
	187	op_type x,
	188	int cst,
	189	int cstlen,
	190	int rdisp_n,
	191	int rn,
	192	const char **pregnames,
	193	int len)
252b5132	194	{
47b0e7ad	195	void * stream = info->stream;
20dc5b5a MS	196	fprintf_ftype outfn = info->fprintf_func;
20dc5b5a MS	197
47b0e7ad NC	198	if ((x & SIZE) == L_3 \|\| (x & SIZE) == L_3NZ)
47b0e7ad NC	199	outfn (stream, "#0x%x", (unsigned) cst);
20dc5b5a	200	else if ((x & MODE) == IMM)
47b0e7ad NC	201	outfn (stream, "#0x%x", (unsigned) cst);
	202	else if ((x & MODE) == DBIT \|\| (x & MODE) == KBIT)
	203	outfn (stream, "#%d", (unsigned) cst);
20dc5b5a MS	204	else if ((x & MODE) == CONST_2)
	205	outfn (stream, "#2");
	206	else if ((x & MODE) == CONST_4)
	207	outfn (stream, "#4");
	208	else if ((x & MODE) == CONST_8)
	209	outfn (stream, "#8");
	210	else if ((x & MODE) == CONST_16)
	211	outfn (stream, "#16");
	212	else if ((x & MODE) == REG)
	213	{
	214	switch (x & SIZE)
	215	{
	216	case L_8:
	217	outfn (stream, "%s", regnames[rn]);
	218	break;
	219	case L_16:
	220	case L_16U:
	221	outfn (stream, "%s", wregnames[rn]);
	222	break;
	223	case L_P:
	224	case L_32:
	225	outfn (stream, "%s", lregnames[rn]);
	226	break;
	227	}
	228	}
	229	else if ((x & MODE) == LOWREG)
	230	{
	231	switch (x & SIZE)
	232	{
	233	case L_8:
	234	/* Always take low half of reg. */
	235	outfn (stream, "%s.b", regnames[rn < 8 ? rn + 8 : rn]);
	236	break;
	237	case L_16:
	238	case L_16U:
	239	/* Always take low half of reg. */
	240	outfn (stream, "%s.w", wregnames[rn < 8 ? rn : rn - 8]);
	241	break;
	242	case L_P:
	243	case L_32:
	244	outfn (stream, "%s.l", lregnames[rn]);
	245	break;
	246	}
	247	}
	248	else if ((x & MODE) == POSTINC)
47b0e7ad NC	249	outfn (stream, "@%s+", pregnames[rn]);
47b0e7ad NC	250
20dc5b5a	251	else if ((x & MODE) == POSTDEC)
47b0e7ad NC	252	outfn (stream, "@%s-", pregnames[rn]);
47b0e7ad NC	253
20dc5b5a	254	else if ((x & MODE) == PREINC)
47b0e7ad NC	255	outfn (stream, "@+%s", pregnames[rn]);
47b0e7ad NC	256
20dc5b5a	257	else if ((x & MODE) == PREDEC)
47b0e7ad NC	258	outfn (stream, "@-%s", pregnames[rn]);
47b0e7ad NC	259
20dc5b5a	260	else if ((x & MODE) == IND)
47b0e7ad NC	261	outfn (stream, "@%s", pregnames[rn]);
47b0e7ad NC	262
20dc5b5a	263	else if ((x & MODE) == ABS \|\| (x & ABSJMP))
47b0e7ad NC	264	outfn (stream, "@0x%x:%d", (unsigned) cst, cstlen);
47b0e7ad NC	265
20dc5b5a	266	else if ((x & MODE) == MEMIND)
47b0e7ad NC	267	outfn (stream, "@@%d (0x%x)", cst, cst);
47b0e7ad NC	268
20dc5b5a MS	269	else if ((x & MODE) == VECIND)
	270	{
	271	/* FIXME Multiplier should be 2 or 4, depending on processor mode,
	272	by which is meant "normal" vs. "middle", "advanced", "maximum". */
	273
	274	int offset = (cst + 0x80) * 4;
	275	outfn (stream, "@@%d (0x%x)", offset, offset);
	276	}
	277	else if ((x & MODE) == PCREL)
	278	{
	279	if ((x & SIZE) == L_16 \|\|
	280	(x & SIZE) == L_16U)
	281	{
0fd3a477	282	outfn (stream, ".%s%d (0x%lx)",
20dc5b5a MS	283	(short) cst > 0 ? "+" : "",
20dc5b5a MS	284	(short) cst,
0fd3a477	285	(long)(addr + (short) cst + len));
20dc5b5a MS	286	}
	287	else
	288	{
0fd3a477	289	outfn (stream, ".%s%d (0x%lx)",
20dc5b5a MS	290	(char) cst > 0 ? "+" : "",
20dc5b5a MS	291	(char) cst,
0fd3a477	292	(long)(addr + (char) cst + len));
20dc5b5a MS	293	}
	294	}
	295	else if ((x & MODE) == DISP)
47b0e7ad NC	296	outfn (stream, "@(0x%x:%d,%s)", cst, cstlen, pregnames[rdisp_n]);
47b0e7ad NC	297
20dc5b5a	298	else if ((x & MODE) == INDEXB)
47b0e7ad NC	299	/* Always take low half of reg. */
	300	outfn (stream, "@(0x%x:%d,%s.b)", cst, cstlen,
	301	regnames[rdisp_n < 8 ? rdisp_n + 8 : rdisp_n]);
	302
20dc5b5a	303	else if ((x & MODE) == INDEXW)
47b0e7ad NC	304	/* Always take low half of reg. */
	305	outfn (stream, "@(0x%x:%d,%s.w)", cst, cstlen,
	306	wregnames[rdisp_n < 8 ? rdisp_n : rdisp_n - 8]);
	307
20dc5b5a	308	else if ((x & MODE) == INDEXL)
47b0e7ad NC	309	outfn (stream, "@(0x%x:%d,%s.l)", cst, cstlen, lregnames[rdisp_n]);
47b0e7ad NC	310
20dc5b5a	311	else if (x & CTRL)
47b0e7ad NC	312	outfn (stream, cregnames[rn]);
47b0e7ad NC	313
20dc5b5a	314	else if ((x & MODE) == CCR)
47b0e7ad NC	315	outfn (stream, "ccr");
47b0e7ad NC	316
20dc5b5a	317	else if ((x & MODE) == EXR)
47b0e7ad NC	318	outfn (stream, "exr");
47b0e7ad NC	319
20dc5b5a	320	else if ((x & MODE) == MACREG)
47b0e7ad NC	321	outfn (stream, "mac%c", cst ? 'l' : 'h');
47b0e7ad NC	322
20dc5b5a MS	323	else
	324	/* xgettext:c-format */
	325	outfn (stream, _("Hmmmm 0x%x"), x);
	326	}
	327
	328	static unsigned int
47b0e7ad	329	bfd_h8_disassemble (bfd_vma addr, disassemble_info *info, int mach)
20dc5b5a MS	330	{
	331	/* Find the first entry in the table for this opcode. */
	332	int regno[3] = { 0, 0, 0 };
	333	int dispregno[3] = { 0, 0, 0 };
	334	int cst[3] = { 0, 0, 0 };
	335	int cstlen[3] = { 0, 0, 0 };
b34976b6	336	static bfd_boolean init = 0;
a3e64b75	337	const struct h8_instruction *qi;
20dc5b5a	338	char const **pregnames = mach != 0 ? lregnames : wregnames;
252b5132	339	int status;
20dc5b5a MS	340	unsigned int l;
20dc5b5a MS	341	unsigned char data[MAX_CODE_NIBBLES];
252b5132	342	void *stream = info->stream;
20dc5b5a	343	fprintf_ftype outfn = info->fprintf_func;
252b5132 RH	344
	345	if (!init)
	346	{
	347	bfd_h8_disassemble_init ();
	348	init = 1;
	349	}
	350
3903e627	351	status = info->read_memory_func (addr, data, 2, info);
5fec0fc5	352	if (status != 0)
252b5132	353	{
3903e627	354	info->memory_error_func (status, addr, info);
252b5132 RH	355	return -1;
252b5132 RH	356	}
53d388d1	357
20dc5b5a	358	for (l = 2; status == 0 && l < sizeof (data) / 2; l += 2)
53d388d1	359	status = info->read_memory_func (addr + l, data + l, 2, info);
252b5132	360
3903e627	361	/* Find the exact opcode/arg combo. */
a3e64b75	362	for (qi = h8_instructions; qi->opcode->name; qi++)
252b5132	363	{
a3e64b75	364	const struct h8_opcode *q = qi->opcode;
c07ab2ec	365	op_type *nib = q->data.nib;
252b5132 RH	366	unsigned int len = 0;
252b5132 RH	367
252b5132 RH	368	while (1)
	369	{
	370	op_type looking_for = *nib;
20dc5b5a MS	371	int thisnib = data[len / 2];
20dc5b5a MS	372	int opnr;
53d388d1	373
20dc5b5a MS	374	thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib / 16) & 0xf);
	375	opnr = ((looking_for & OP3) == OP3 ? 2
	376	: (looking_for & DST) == DST ? 1 : 0);
53d388d1	377
5fec0fc5	378	if (looking_for < 16 && looking_for >= 0)
252b5132	379	{
5fec0fc5	380	if (looking_for != thisnib)
252b5132 RH	381	goto fail;
252b5132 RH	382	}
5fec0fc5	383	else
252b5132	384	{
252b5132 RH	385	if ((int) looking_for & (int) B31)
252b5132 RH	386	{
20dc5b5a	387	if (!((thisnib & 0x8) != 0))
252b5132	388	goto fail;
53d388d1	389
252b5132	390	looking_for = (op_type) ((int) looking_for & ~(int) B31);
20dc5b5a	391	thisnib &= 0x7;
252b5132	392	}
20dc5b5a	393	else if ((int) looking_for & (int) B30)
252b5132	394	{
20dc5b5a	395	if (!((thisnib & 0x8) == 0))
252b5132	396	goto fail;
53d388d1	397
252b5132 RH	398	looking_for = (op_type) ((int) looking_for & ~(int) B30);
	399	}
	400
20dc5b5a MS	401	if ((int) looking_for & (int) B21)
	402	{
	403	if (!((thisnib & 0x4) != 0))
	404	goto fail;
	405
	406	looking_for = (op_type) ((int) looking_for & ~(int) B21);
	407	thisnib &= 0xb;
	408	}
	409	else if ((int) looking_for & (int) B20)
	410	{
	411	if (!((thisnib & 0x4) == 0))
	412	goto fail;
	413
	414	looking_for = (op_type) ((int) looking_for & ~(int) B20);
	415	}
	416	if ((int) looking_for & (int) B11)
	417	{
	418	if (!((thisnib & 0x2) != 0))
	419	goto fail;
	420
	421	looking_for = (op_type) ((int) looking_for & ~(int) B11);
	422	thisnib &= 0xd;
	423	}
	424	else if ((int) looking_for & (int) B10)
	425	{
	426	if (!((thisnib & 0x2) == 0))
	427	goto fail;
	428
	429	looking_for = (op_type) ((int) looking_for & ~(int) B10);
	430	}
	431
	432	if ((int) looking_for & (int) B01)
	433	{
	434	if (!((thisnib & 0x1) != 0))
	435	goto fail;
	436
	437	looking_for = (op_type) ((int) looking_for & ~(int) B01);
	438	thisnib &= 0xe;
	439	}
	440	else if ((int) looking_for & (int) B00)
	441	{
	442	if (!((thisnib & 0x1) == 0))
	443	goto fail;
	444
	445	looking_for = (op_type) ((int) looking_for & ~(int) B00);
	446	}
	447
	448	if (looking_for & IGNORE)
	449	{
	450	/* Hitachi has declared that IGNORE must be zero. */
	451	if (thisnib != 0)
	452	goto fail;
	453	}
	454	else if ((looking_for & MODE) == DATA)
	455	{
	456	; /* Skip embedded data. */
	457	}
	458	else if ((looking_for & MODE) == DBIT)
252b5132	459	{
53d388d1 JL	460	/* Exclude adds/subs by looking at bit 0 and 2, and
	461	make sure the operand size, either w or l,
	462	matches by looking at bit 1. */
	463	if ((looking_for & 7) != (thisnib & 7))
3903e627	464	goto fail;
53d388d1	465
20dc5b5a	466	cst[opnr] = (thisnib & 0x8) ? 2 : 1;
5fec0fc5	467	}
47b0e7ad NC	468	else if ((looking_for & MODE) == DISP
	469	\|\| (looking_for & MODE) == ABS
	470	\|\| (looking_for & MODE) == PCREL
	471	\|\| (looking_for & MODE) == INDEXB
	472	\|\| (looking_for & MODE) == INDEXW
	473	\|\| (looking_for & MODE) == INDEXL)
252b5132	474	{
20dc5b5a MS	475	extract_immediate (stream, looking_for, thisnib,
	476	data + len / 2, cst + opnr,
	477	cstlen + opnr, q);
	478	/* Even address == bra, odd == bra/s. */
	479	if (q->how == O (O_BRAS, SB))
	480	cst[opnr] -= 1;
252b5132	481	}
47b0e7ad NC	482	else if ((looking_for & MODE) == REG
	483	\|\| (looking_for & MODE) == LOWREG
	484	\|\| (looking_for & MODE) == IND
	485	\|\| (looking_for & MODE) == PREINC
	486	\|\| (looking_for & MODE) == POSTINC
	487	\|\| (looking_for & MODE) == PREDEC
	488	\|\| (looking_for & MODE) == POSTDEC)
252b5132	489	{
20dc5b5a	490	regno[opnr] = thisnib;
252b5132	491	}
47b0e7ad	492	else if (looking_for & CTRL) /* Control Register. */
252b5132	493	{
20dc5b5a	494	thisnib &= 7;
47b0e7ad NC	495	if (((looking_for & MODE) == CCR && (thisnib != C_CCR))
	496	\|\| ((looking_for & MODE) == EXR && (thisnib != C_EXR))
	497	\|\| ((looking_for & MODE) == MACH && (thisnib != C_MACH))
	498	\|\| ((looking_for & MODE) == MACL && (thisnib != C_MACL))
	499	\|\| ((looking_for & MODE) == VBR && (thisnib != C_VBR))
	500	\|\| ((looking_for & MODE) == SBR && (thisnib != C_SBR)))
20dc5b5a	501	goto fail;
47b0e7ad NC	502	if (((looking_for & MODE) == CCR_EXR
	503	&& (thisnib != C_CCR && thisnib != C_EXR))
	504	\|\| ((looking_for & MODE) == VBR_SBR
	505	&& (thisnib != C_VBR && thisnib != C_SBR))
	506	\|\| ((looking_for & MODE) == MACREG
	507	&& (thisnib != C_MACH && thisnib != C_MACL)))
20dc5b5a	508	goto fail;
47b0e7ad NC	509	if (((looking_for & MODE) == CC_EX_VB_SB
	510	&& (thisnib != C_CCR && thisnib != C_EXR
	511	&& thisnib != C_VBR && thisnib != C_SBR)))
20dc5b5a MS	512	goto fail;
	513
	514	regno[opnr] = thisnib;
	515	}
	516	else if ((looking_for & SIZE) == L_5)
	517	{
	518	cst[opnr] = data[len / 2] & 31;
	519	cstlen[opnr] = 5;
	520	}
	521	else if ((looking_for & SIZE) == L_4)
	522	{
	523	cst[opnr] = thisnib;
	524	cstlen[opnr] = 4;
	525	}
47b0e7ad NC	526	else if ((looking_for & SIZE) == L_16
47b0e7ad NC	527	\|\| (looking_for & SIZE) == L_16U)
20dc5b5a MS	528	{
	529	cst[opnr] = (data[len / 2]) * 256 + data[(len + 2) / 2];
	530	cstlen[opnr] = 16;
	531	}
	532	else if ((looking_for & MODE) == MEMIND)
	533	{
	534	cst[opnr] = data[1];
252b5132	535	}
20dc5b5a	536	else if ((looking_for & MODE) == VECIND)
252b5132	537	{
20dc5b5a	538	cst[opnr] = data[1] & 0x7f;
252b5132	539	}
20dc5b5a	540	else if ((looking_for & SIZE) == L_32)
252b5132	541	{
20dc5b5a	542	int i = len / 2;
53d388d1	543
20dc5b5a MS	544	cst[opnr] = ((data[i] << 24)
	545	\| (data[i + 1] << 16)
	546	\| (data[i + 2] << 8)
	547	\| (data[i + 3]));
252b5132	548
20dc5b5a	549	cstlen[opnr] = 32;
252b5132	550	}
20dc5b5a	551	else if ((looking_for & SIZE) == L_24)
252b5132	552	{
20dc5b5a	553	int i = len / 2;
53d388d1	554
20dc5b5a MS	555	cst[opnr] =
	556	(data[i] << 16) \| (data[i + 1] << 8) \| (data[i + 2]);
	557	cstlen[opnr] = 24;
252b5132 RH	558	}
	559	else if (looking_for & IGNORE)
	560	{
3903e627	561	;
252b5132 RH	562	}
	563	else if (looking_for & DISPREG)
	564	{
20dc5b5a	565	dispregno[opnr] = thisnib & 7;
252b5132	566	}
20dc5b5a	567	else if ((looking_for & MODE) == KBIT)
252b5132	568	{
5fec0fc5	569	switch (thisnib)
252b5132 RH	570	{
252b5132 RH	571	case 9:
20dc5b5a	572	cst[opnr] = 4;
252b5132 RH	573	break;
252b5132 RH	574	case 8:
20dc5b5a	575	cst[opnr] = 2;
252b5132 RH	576	break;
252b5132 RH	577	case 0:
20dc5b5a	578	cst[opnr] = 1;
252b5132 RH	579	break;
	580	default:
	581	goto fail;
	582	}
	583	}
20dc5b5a	584	else if ((looking_for & SIZE) == L_8)
252b5132	585	{
20dc5b5a MS	586	cstlen[opnr] = 8;
20dc5b5a MS	587	cst[opnr] = data[len / 2];
252b5132	588	}
47b0e7ad NC	589	else if ((looking_for & SIZE) == L_3
47b0e7ad NC	590	\|\| (looking_for & SIZE) == L_3NZ)
252b5132	591	{
20dc5b5a MS	592	cst[opnr] = thisnib & 0x7;
	593	if (cst[opnr] == 0 && (looking_for & SIZE) == L_3NZ)
	594	goto fail;
252b5132	595	}
20dc5b5a	596	else if ((looking_for & SIZE) == L_2)
252b5132	597	{
20dc5b5a MS	598	cstlen[opnr] = 2;
20dc5b5a MS	599	cst[opnr] = thisnib & 0x3;
252b5132	600	}
20dc5b5a	601	else if ((looking_for & MODE) == MACREG)
252b5132	602	{
20dc5b5a	603	cst[opnr] = (thisnib == 3);
252b5132	604	}
20dc5b5a	605	else if (looking_for == (op_type) E)
252b5132	606	{
20dc5b5a	607	outfn (stream, "%s\t", q->name);
252b5132 RH	608
	609	/* Gross. Disgusting. */
	610	if (strcmp (q->name, "ldm.l") == 0)
	611	{
	612	int count, high;
	613
20dc5b5a MS	614	count = (data[1] / 16) & 0x3;
20dc5b5a MS	615	high = regno[1];
252b5132	616
20dc5b5a	617	outfn (stream, "@sp+,er%d-er%d", high - count, high);
a3e64b75	618	return qi->length;
252b5132 RH	619	}
	620
	621	if (strcmp (q->name, "stm.l") == 0)
	622	{
	623	int count, low;
	624
20dc5b5a MS	625	count = (data[1] / 16) & 0x3;
20dc5b5a MS	626	low = regno[0];
252b5132	627
20dc5b5a MS	628	outfn (stream, "er%d-er%d,@-sp", low, low + count);
	629	return qi->length;
	630	}
	631	if (strcmp (q->name, "rte/l") == 0
	632	\|\| strcmp (q->name, "rts/l") == 0)
	633	{
	634	if (regno[0] == 0)
	635	outfn (stream, "er%d", regno[1]);
	636	else
47b0e7ad NC	637	outfn (stream, "er%d-er%d", regno[1] - regno[0],
47b0e7ad NC	638	regno[1]);
20dc5b5a MS	639	return qi->length;
	640	}
	641	if (strncmp (q->name, "mova", 4) == 0)
	642	{
	643	op_type *args = q->args.nib;
	644
	645	if (args[1] == (op_type) E)
	646	{
	647	/* Short form. */
	648	print_one_arg (info, addr, args[0], cst[0],
	649	cstlen[0], dispregno[0], regno[0],
	650	pregnames, qi->length);
	651	outfn (stream, ",er%d", dispregno[0]);
	652	}
	653	else
	654	{
	655	outfn (stream, "@(0x%x:%d,", cst[0], cstlen[0]);
	656	print_one_arg (info, addr, args[1], cst[1],
	657	cstlen[1], dispregno[1], regno[1],
	658	pregnames, qi->length);
	659	outfn (stream, ".%c),",
	660	(args[0] & MODE) == INDEXB ? 'b' : 'w');
	661	print_one_arg (info, addr, args[2], cst[2],
	662	cstlen[2], dispregno[2], regno[2],
	663	pregnames, qi->length);
	664	}
a3e64b75	665	return qi->length;
252b5132	666	}
3903e627	667	/* Fill in the args. */
252b5132 RH	668	{
	669	op_type *args = q->args.nib;
	670	int hadone = 0;
20dc5b5a	671	int nargs;
252b5132	672
91809fda	673	/* Special case handling for the adds and subs instructions
47b0e7ad NC	674	since in H8 mode thay can only take the r0-r7 registers
	675	but in other (higher) modes they can take the er0-er7
	676	registers as well. */
91809fda NC	677	if (strcmp (qi->opcode->name, "adds") == 0
	678	\|\| strcmp (qi->opcode->name, "subs") == 0)
	679	{
	680	outfn (stream, "#%d,%s", cst[0], pregnames[regno[1] & 0x7]);
	681	return qi->length;
	682	}
	683
20dc5b5a	684	for (nargs = 0;
47b0e7ad	685	nargs < 3 && args[nargs] != (op_type) E;
20dc5b5a	686	nargs++)
252b5132	687	{
20dc5b5a	688	int x = args[nargs];
53d388d1	689
252b5132	690	if (hadone)
20dc5b5a MS	691	outfn (stream, ",");
	692
	693	print_one_arg (info, addr, x,
	694	cst[nargs], cstlen[nargs],
	695	dispregno[nargs], regno[nargs],
	696	pregnames, qi->length);
53d388d1	697
252b5132	698	hadone = 1;
252b5132 RH	699	}
252b5132 RH	700	}
53d388d1	701
a3e64b75	702	return qi->length;
252b5132	703	}
252b5132	704	else
5fec0fc5	705	/* xgettext:c-format */
20dc5b5a	706	outfn (stream, _("Don't understand 0x%x \n"), looking_for);
252b5132	707	}
53d388d1	708
252b5132 RH	709	len++;
	710	nib++;
	711	}
53d388d1	712
252b5132	713	fail:
c07ab2ec	714	;
252b5132 RH	715	}
252b5132 RH	716
5fec0fc5	717	/* Fell off the end. */
ed049af3	718	outfn (stream, ".word\tH'%x,H'%x", data[0], data[1]);
252b5132 RH	719	return 2;
	720	}
	721
5fec0fc5	722	int
47b0e7ad	723	print_insn_h8300 (bfd_vma addr, disassemble_info *info)
252b5132	724	{
5fec0fc5	725	return bfd_h8_disassemble (addr, info, 0);
252b5132 RH	726	}
252b5132 RH	727
5fec0fc5	728	int
47b0e7ad	729	print_insn_h8300h (bfd_vma addr, disassemble_info *info)
252b5132	730	{
5fec0fc5	731	return bfd_h8_disassemble (addr, info, 1);
252b5132 RH	732	}
252b5132 RH	733
5fec0fc5	734	int
47b0e7ad	735	print_insn_h8300s (bfd_vma addr, disassemble_info *info)
252b5132	736	{
5fec0fc5	737	return bfd_h8_disassemble (addr, info, 2);
252b5132	738	}