[deliverable/binutils-gdb.git] / opcodes / h8300-dis.c

/* Disassemble h8300 instructions.
   Copyright (C) 1993-2020 Free Software Foundation, Inc.

   This file is part of the GNU opcodes library.

   This library is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

   It is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
   MA 02110-1301, USA.  */

#define DEFINE_TABLE

#include "sysdep.h"
#define h8_opcodes h8ops
#include "opcode/h8300.h"
#include "disassemble.h"
#include "opintl.h"
#include "libiberty.h"

struct h8_instruction
{
  int length;
  const struct h8_opcode *opcode;
};

struct h8_instruction *h8_instructions;

/* Run through the opcodes and sort them into order to make them easy
   to disassemble.  */

static void
bfd_h8_disassemble_init (void)
{
  unsigned int i;
  unsigned int nopcodes;
  const struct h8_opcode *p;
  struct h8_instruction *pi;

  nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);

  h8_instructions = xmalloc (nopcodes * sizeof (struct h8_instruction));

  for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++)
    {
      /* Just make sure there are an even number of nibbles in it, and
	 that the count is the same as the length.  */
      for (i = 0; p->data.nib[i] != (op_type) E; i++)
	;

      if (i & 1)
	{
	  /* xgettext:c-format */
	  opcodes_error_handler (_("internal error, h8_disassemble_init"));
	  abort ();
	}

      pi->length = i / 2;
      pi->opcode = p;
    }

  /* Add entry for the NULL vector terminator.  */
  pi->length = 0;
  pi->opcode = p;
}

static void
extract_immediate (FILE *stream,
		   op_type looking_for,
		   int thisnib,
		   unsigned char *data,
		   int *cst,
		   int *len,
		   const struct h8_opcode *q)
{
  switch (looking_for & SIZE)
    {
    case L_2:
      *len = 2;
      *cst = thisnib & 3;

      /* DISP2 special treatment.  */
      if ((looking_for & MODE) == DISP)
	{
	  if (OP_KIND (q->how) == O_MOVAB
	      || OP_KIND (q->how) == O_MOVAW
	      || OP_KIND (q->how) == O_MOVAL)
	    {
	      /* Handling for mova insn.  */
	      switch (q->args.nib[0] & MODE)
		{
		case INDEXB:
		default:
		  break;
		case INDEXW:
		  *cst *= 2;
		  break;
		case INDEXL:
		  *cst *= 4;
		  break;
		}
	    }
	  else
	    {
	      /* Handling for non-mova insn.  */
	      switch (OP_SIZE (q->how))
		{
		default: break;
		case SW:
		  *cst *= 2;
		  break;
		case SL:
		  *cst *= 4;
		  break;
		}
	    }
	}
      break;
    case L_8:
      *len = 8;
      *cst = data[0];
      break;
    case L_16:
    case L_16U:
      *len = 16;
      *cst = (data[0] << 8) + data [1];
#if 0
      if ((looking_for & SIZE) == L_16)
	*cst = (short) *cst;	/* Sign extend.  */
#endif
      break;
    case L_32:
      *len = 32;
      *cst = (((unsigned) data[0] << 24) + (data[1] << 16)
	      + (data[2] << 8) + data[3]);
      break;
    default:
      *len = 0;
      *cst = 0;
      fprintf (stream, "DISP bad size\n");
      break;
    }
}

static const char *regnames[] =
{
  "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
  "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
};
static const char *wregnames[] =
{
  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
  "e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
};
static const char *lregnames[] =
{
  "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
  "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
};
static const char *cregnames[] =
{
  "ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
};

static void
print_one_arg (disassemble_info *info,
	       bfd_vma addr,
	       op_type x,
	       int cst,
	       int cstlen,
	       int rdisp_n,
	       int rn,
	       const char **pregnames,
	       int len)
{
  void * stream = info->stream;
  fprintf_ftype outfn = info->fprintf_func;

  if ((x & SIZE) == L_3 || (x & SIZE) == L_3NZ)
    outfn (stream, "#0x%x", (unsigned) cst);
  else if ((x & MODE) == IMM)
    outfn (stream, "#0x%x", (unsigned) cst);
  else if ((x & MODE) == DBIT || (x & MODE) == KBIT)
    outfn (stream, "#%d", (unsigned) cst);
  else if ((x & MODE) == CONST_2)
    outfn (stream, "#2");
  else if ((x & MODE) == CONST_4)
    outfn (stream, "#4");
  else if ((x & MODE) == CONST_8)
    outfn (stream, "#8");
  else if ((x & MODE) == CONST_16)
    outfn (stream, "#16");
  else if ((x & MODE) == REG)
    {
      switch (x & SIZE)
	{
	case L_8:
	  outfn (stream, "%s", regnames[rn]);
	  break;
	case L_16:
	case L_16U:
	  outfn (stream, "%s", wregnames[rn]);
	  break;
	case L_P:
	case L_32:
	  outfn (stream, "%s", lregnames[rn]);
	  break;
	}
    }
  else if ((x & MODE) == LOWREG)
    {
      switch (x & SIZE)
	{
	case L_8:
	  /* Always take low half of reg.  */
	  outfn (stream, "%s.b", regnames[rn < 8 ? rn + 8 : rn]);
	  break;
	case L_16:
	case L_16U:
	  /* Always take low half of reg.  */
	  outfn (stream, "%s.w", wregnames[rn < 8 ? rn : rn - 8]);
	  break;
	case L_P:
	case L_32:
	  outfn (stream, "%s.l", lregnames[rn]);
	  break;
	}
    }
  else if ((x & MODE) == POSTINC)
    outfn (stream, "@%s+", pregnames[rn]);

  else if ((x & MODE) == POSTDEC)
    outfn (stream, "@%s-", pregnames[rn]);

  else if ((x & MODE) == PREINC)
    outfn (stream, "@+%s", pregnames[rn]);

  else if ((x & MODE) == PREDEC)
    outfn (stream, "@-%s", pregnames[rn]);

  else if ((x & MODE) == IND)
    outfn (stream, "@%s", pregnames[rn]);

  else if ((x & MODE) == ABS || (x & ABSJMP))
    outfn (stream, "@0x%x:%d", (unsigned) cst, cstlen);

  else if ((x & MODE) == MEMIND)
    outfn (stream, "@@%d (0x%x)", cst, cst);

  else if ((x & MODE) == VECIND)
    {
      /* FIXME Multiplier should be 2 or 4, depending on processor mode,
	 by which is meant "normal" vs. "middle", "advanced", "maximum".  */

      int offset = (cst + 0x80) * 4;
      outfn (stream, "@@%d (0x%x)", offset, offset);
    }
  else if ((x & MODE) == PCREL)
    {
      if ((x & SIZE) == L_16 ||
	  (x & SIZE) == L_16U)
	{
	  outfn (stream, ".%s%d (0x%lx)",
		   (short) cst > 0 ? "+" : "",
		   (short) cst,
		   (long)(addr + (short) cst + len));
	}
      else
	{
	  outfn (stream, ".%s%d (0x%lx)",
		   (char) cst > 0 ? "+" : "",
		   (char) cst,
		   (long)(addr + (char) cst + len));
	}
    }
  else if ((x & MODE) == DISP)
    outfn (stream, "@(0x%x:%d,%s)", cst, cstlen, pregnames[rdisp_n]);

  else if ((x & MODE) == INDEXB)
    /* Always take low half of reg.  */
    outfn (stream, "@(0x%x:%d,%s.b)", cst, cstlen,
	   regnames[rdisp_n < 8 ? rdisp_n + 8 : rdisp_n]);

  else if ((x & MODE) == INDEXW)
    /* Always take low half of reg.  */
    outfn (stream, "@(0x%x:%d,%s.w)", cst, cstlen,
	   wregnames[rdisp_n < 8 ? rdisp_n : rdisp_n - 8]);

  else if ((x & MODE) == INDEXL)
    outfn (stream, "@(0x%x:%d,%s.l)", cst, cstlen, lregnames[rdisp_n]);

  else if (x & CTRL)
    outfn (stream, "%s", cregnames[rn]);

  else if ((x & MODE) == CCR)
    outfn (stream, "ccr");

  else if ((x & MODE) == EXR)
    outfn (stream, "exr");

  else if ((x & MODE) == MACREG)
    outfn (stream, "mac%c", cst ? 'l' : 'h');

  else
    /* xgettext:c-format */
    outfn (stream, _("Hmmmm 0x%x"), x);
}

static unsigned int
bfd_h8_disassemble (bfd_vma addr, disassemble_info *info, int mach)
{
  /* Find the first entry in the table for this opcode.  */
  int regno[3] = { 0, 0, 0 };
  int dispregno[3] = { 0, 0, 0 };
  int cst[3] = { 0, 0, 0 };
  int cstlen[3] = { 0, 0, 0 };
  static bfd_boolean init = 0;
  const struct h8_instruction *qi;
  char const **pregnames = mach != 0 ? lregnames : wregnames;
  int status;
  unsigned int l;
  unsigned char data[MAX_CODE_NIBBLES];
  void *stream = info->stream;
  fprintf_ftype outfn = info->fprintf_func;

  if (!init)
    {
      bfd_h8_disassemble_init ();
      init = 1;
    }

  status = info->read_memory_func (addr, data, 2, info);
  if (status != 0)
    {
      info->memory_error_func (status, addr, info);
      return -1;
    }

  for (l = 2; status == 0 && l < sizeof (data) / 2; l += 2)
    status = info->read_memory_func (addr + l, data + l, 2, info);

  /* Find the exact opcode/arg combo.  */
  for (qi = h8_instructions; qi->opcode->name; qi++)
    {
      const struct h8_opcode *q = qi->opcode;
      const op_type *nib = q->data.nib;
      unsigned int len = 0;

      while (1)
	{
	  op_type looking_for = *nib;
	  int thisnib = data[len / 2];
	  int opnr;

	  thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib / 16) & 0xf);
	  opnr = ((looking_for & OP3) == OP3 ? 2
		  : (looking_for & DST) == DST ? 1 : 0);

	  if (looking_for < 16 && looking_for >= 0)
	    {
	      if (looking_for != thisnib)
		goto fail;
	    }
	  else
	    {
	      if ((int) looking_for & (int) B31)
		{
		  if (!((thisnib & 0x8) != 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B31);
		  thisnib &= 0x7;
		}
	      else if ((int) looking_for & (int) B30)
		{
		  if (!((thisnib & 0x8) == 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B30);
		}

	      if ((int) looking_for & (int) B21)
		{
		  if (!((thisnib & 0x4) != 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B21);
		  thisnib &= 0xb;
		}
	      else if ((int) looking_for & (int) B20)
		{
		  if (!((thisnib & 0x4) == 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B20);
		}
	      if ((int) looking_for & (int) B11)
		{
		  if (!((thisnib & 0x2) != 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B11);
		  thisnib &= 0xd;
		}
	      else if ((int) looking_for & (int) B10)
		{
		  if (!((thisnib & 0x2) == 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B10);
		}

	      if ((int) looking_for & (int) B01)
		{
		  if (!((thisnib & 0x1) != 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B01);
		  thisnib &= 0xe;
		}
	      else if ((int) looking_for & (int) B00)
		{
		  if (!((thisnib & 0x1) == 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B00);
		}

	      if (looking_for & IGNORE)
		{
		  /* Hitachi has declared that IGNORE must be zero.  */
		  if (thisnib != 0)
		    goto fail;
		}
	      else if ((looking_for & MODE) == DATA)
		{
		  ;			/* Skip embedded data.  */
		}
	      else if ((looking_for & MODE) == DBIT)
		{
		  /* Exclude adds/subs by looking at bit 0 and 2, and
                     make sure the operand size, either w or l,
                     matches by looking at bit 1.  */
		  if ((looking_for & 7) != (thisnib & 7))
		    goto fail;

		  cst[opnr] = (thisnib & 0x8) ? 2 : 1;
		}
	      else if ((looking_for & MODE) == DISP
		       || (looking_for & MODE) == ABS
		       || (looking_for & MODE) == PCREL
		       || (looking_for & MODE) == INDEXB
		       || (looking_for & MODE) == INDEXW
		       || (looking_for & MODE) == INDEXL)
		{
		  extract_immediate (stream, looking_for, thisnib,
				     data + len / 2, cst + opnr,
				     cstlen + opnr, q);
		  /* Even address == bra, odd == bra/s.  */
		  if (q->how == O (O_BRAS, SB))
		    cst[opnr] -= 1;
		}
	      else if ((looking_for & MODE) == REG
		       || (looking_for & MODE) == LOWREG
		       || (looking_for & MODE) == IND
		       || (looking_for & MODE) == PREINC
		       || (looking_for & MODE) == POSTINC
		       || (looking_for & MODE) == PREDEC
		       || (looking_for & MODE) == POSTDEC)
		{
		  regno[opnr] = thisnib;
		}
	      else if (looking_for & CTRL)	/* Control Register.  */
		{
		  thisnib &= 7;
		  if (((looking_for & MODE) == CCR  && (thisnib != C_CCR))
		      || ((looking_for & MODE) == EXR  && (thisnib != C_EXR))
		      || ((looking_for & MODE) == MACH && (thisnib != C_MACH))
		      || ((looking_for & MODE) == MACL && (thisnib != C_MACL))
		      || ((looking_for & MODE) == VBR  && (thisnib != C_VBR))
		      || ((looking_for & MODE) == SBR  && (thisnib != C_SBR)))
		    goto fail;
		  if (((looking_for & MODE) == CCR_EXR
		       && (thisnib != C_CCR && thisnib != C_EXR))
		      || ((looking_for & MODE) == VBR_SBR
			  && (thisnib != C_VBR && thisnib != C_SBR))
		      || ((looking_for & MODE) == MACREG
			  && (thisnib != C_MACH && thisnib != C_MACL)))
		    goto fail;
		  if (((looking_for & MODE) == CC_EX_VB_SB
		       && (thisnib != C_CCR && thisnib != C_EXR
			   && thisnib != C_VBR && thisnib != C_SBR)))
		    goto fail;

		  regno[opnr] = thisnib;
		}
	      else if ((looking_for & SIZE) == L_5)
		{
		  cst[opnr] = data[len / 2] & 31;
		  cstlen[opnr] = 5;
		}
	      else if ((looking_for & SIZE) == L_4)
		{
		  cst[opnr] = thisnib;
		  cstlen[opnr] = 4;
		}
	      else if ((looking_for & SIZE) == L_16
		       || (looking_for & SIZE) == L_16U)
		{
		  cst[opnr] = (data[len / 2]) * 256 + data[(len + 2) / 2];
		  cstlen[opnr] = 16;
		}
	      else if ((looking_for & MODE) == MEMIND)
		{
		  cst[opnr] = data[1];
		}
	      else if ((looking_for & MODE) == VECIND)
		{
		  cst[opnr] = data[1] & 0x7f;
		}
	      else if ((looking_for & SIZE) == L_32)
		{
		  int i = len / 2;

		  cst[opnr] = (((unsigned) data[i] << 24)
			       | (data[i + 1] << 16)
			       | (data[i + 2] << 8)
			       | (data[i + 3]));

		  cstlen[opnr] = 32;
		}
	      else if ((looking_for & SIZE) == L_24)
		{
		  int i = len / 2;

		  cst[opnr] =
		    (data[i] << 16) | (data[i + 1] << 8) | (data[i + 2]);
		  cstlen[opnr] = 24;
		}
	      else if (looking_for & DISPREG)
		{
		  dispregno[opnr] = thisnib & 7;
		}
	      else if ((looking_for & MODE) == KBIT)
		{
		  switch (thisnib)
		    {
		    case 9:
		      cst[opnr] = 4;
		      break;
		    case 8:
		      cst[opnr] = 2;
		      break;
		    case 0:
		      cst[opnr] = 1;
		      break;
		    default:
		      goto fail;
		    }
		}
	      else if ((looking_for & SIZE) == L_8)
		{
		  cstlen[opnr] = 8;
		  cst[opnr] = data[len / 2];
		}
	      else if ((looking_for & SIZE) == L_3
		       || (looking_for & SIZE) == L_3NZ)
		{
		  cst[opnr] = thisnib & 0x7;
		  if (cst[opnr] == 0 && (looking_for & SIZE) == L_3NZ)
		    goto fail;
		}
	      else if ((looking_for & SIZE) == L_2)
		{
		  cstlen[opnr] = 2;
		  cst[opnr] = thisnib & 0x3;
		}
	      else if ((looking_for & MODE) == MACREG)
		{
		  cst[opnr] = (thisnib == 3);
		}
	      else if (looking_for == (op_type) E)
		{
		  outfn (stream, "%s\t", q->name);

		  /* Gross.  Disgusting.  */
		  if (strcmp (q->name, "ldm.l") == 0)
		    {
		      int count, high;

		      count = (data[1] / 16) & 0x3;
		      high = regno[1];

		      outfn (stream, "@sp+,er%d-er%d", high - count, high);
		      return qi->length;
		    }

		  if (strcmp (q->name, "stm.l") == 0)
		    {
		      int count, low;

		      count = (data[1] / 16) & 0x3;
		      low = regno[0];

		      outfn (stream, "er%d-er%d,@-sp", low, low + count);
		      return qi->length;
		    }
		  if (strcmp (q->name, "rte/l") == 0
		      || strcmp (q->name, "rts/l") == 0)
		    {
		      if (regno[0] == 0)
			outfn (stream, "er%d", regno[1]);
		      else
			outfn (stream, "er%d-er%d", regno[1] - regno[0],
			       regno[1]);
		      return qi->length;
		    }
		  if (CONST_STRNEQ (q->name, "mova"))
		    {
		      const op_type *args = q->args.nib;

		      if (args[1] == (op_type) E)
			{
			  /* Short form.  */
			  print_one_arg (info, addr, args[0], cst[0],
					 cstlen[0], dispregno[0], regno[0],
					 pregnames, qi->length);
			  outfn (stream, ",er%d", dispregno[0]);
			}
		      else
			{
			  outfn (stream, "@(0x%x:%d,", cst[0], cstlen[0]);
			  print_one_arg (info, addr, args[1], cst[1],
					 cstlen[1], dispregno[1], regno[1],
					 pregnames, qi->length);
			  outfn (stream, ".%c),",
				 (args[0] & MODE) == INDEXB ? 'b' : 'w');
			  print_one_arg (info, addr, args[2], cst[2],
					 cstlen[2], dispregno[2], regno[2],
					 pregnames, qi->length);
			}
		      return qi->length;
		    }
		  /* Fill in the args.  */
		  {
		    const op_type *args = q->args.nib;
		    int hadone = 0;
		    int nargs;

		    /* Special case handling for the adds and subs instructions
		       since in H8 mode thay can only take the r0-r7 registers
		       but in other (higher) modes they can take the er0-er7
		       registers as well.  */
		    if (strcmp (qi->opcode->name, "adds") == 0
			|| strcmp (qi->opcode->name, "subs") == 0)
		      {
			outfn (stream, "#%d,%s", cst[0], pregnames[regno[1] & 0x7]);
			return qi->length;
		      }

		    for (nargs = 0;
			 nargs < 3 && args[nargs] != (op_type) E;
			 nargs++)
		      {
			int x = args[nargs];

			if (hadone)
			  outfn (stream, ",");

			print_one_arg (info, addr, x,
				       cst[nargs], cstlen[nargs],
				       dispregno[nargs], regno[nargs],
				       pregnames, qi->length);

			hadone = 1;
		      }
		  }

		  return qi->length;
		}
	      else
		/* xgettext:c-format */
		outfn (stream, _("Don't understand 0x%x \n"), looking_for);
	    }

	  len++;
	  nib++;
	}

    fail:
      ;
    }

  /* Fell off the end.  */
  outfn (stream, ".word\tH'%x,H'%x", data[0], data[1]);
  return 2;
}

int
print_insn_h8300 (bfd_vma addr, disassemble_info *info)
{
  return bfd_h8_disassemble (addr, info, 0);
}

int
print_insn_h8300h (bfd_vma addr, disassemble_info *info)
{
  return bfd_h8_disassemble (addr, info, 1);
}

int
print_insn_h8300s (bfd_vma addr, disassemble_info *info)
{
  return bfd_h8_disassemble (addr, info, 2);
}
Commit	Line	Data
252b5132	1	/* Disassemble h8300 instructions.
b3adc24a	2	Copyright (C) 1993-2020 Free Software Foundation, Inc.
252b5132	3
9b201bb5 NC	4	This file is part of the GNU opcodes library.
	5
	6	This library is free software; you can redistribute it and/or modify
ed049af3	7	it under the terms of the GNU General Public License as published by
9b201bb5 NC	8	the Free Software Foundation; either version 3, or (at your option)
9b201bb5 NC	9	any later version.
252b5132	10
9b201bb5 NC	11	It is distributed in the hope that it will be useful, but WITHOUT
	12	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	13	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	14	License for more details.
252b5132	15
ed049af3 NC	16	You should have received a copy of the GNU General Public License
ed049af3 NC	17	along with this program; if not, write to the Free Software
47b0e7ad NC	18	Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
47b0e7ad NC	19	MA 02110-1301, USA. */
252b5132 RH	20
	21	#define DEFINE_TABLE
	22
0d8dfecf	23	#include "sysdep.h"
252b5132 RH	24	#define h8_opcodes h8ops
252b5132 RH	25	#include "opcode/h8300.h"
88c1242d	26	#include "disassemble.h"
252b5132	27	#include "opintl.h"
a3e64b75 KD	28	#include "libiberty.h"
	29
	30	struct h8_instruction
	31	{
	32	int length;
	33	const struct h8_opcode *opcode;
	34	};
	35
	36	struct h8_instruction *h8_instructions;
252b5132	37
252b5132	38	/* Run through the opcodes and sort them into order to make them easy
3903e627	39	to disassemble. */
20dc5b5a	40
252b5132	41	static void
47b0e7ad	42	bfd_h8_disassemble_init (void)
252b5132 RH	43	{
252b5132 RH	44	unsigned int i;
a3e64b75 KD	45	unsigned int nopcodes;
	46	const struct h8_opcode *p;
	47	struct h8_instruction *pi;
252b5132	48
a3e64b75	49	nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);
b34976b6	50
47b0e7ad	51	h8_instructions = xmalloc (nopcodes * sizeof (struct h8_instruction));
a3e64b75 KD	52
a3e64b75 KD	53	for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++)
252b5132	54	{
252b5132	55	/* Just make sure there are an even number of nibbles in it, and
3903e627	56	that the count is the same as the length. */
20dc5b5a	57	for (i = 0; p->data.nib[i] != (op_type) E; i++)
53d388d1 JL	58	;
53d388d1 JL	59
252b5132	60	if (i & 1)
20dc5b5a	61	{
a6743a54 AM	62	/* xgettext:c-format */
a6743a54 AM	63	opcodes_error_handler (_("internal error, h8_disassemble_init"));
20dc5b5a MS	64	abort ();
20dc5b5a MS	65	}
53d388d1	66
a3e64b75 KD	67	pi->length = i / 2;
a3e64b75 KD	68	pi->opcode = p;
252b5132	69	}
a3e64b75 KD	70
	71	/* Add entry for the NULL vector terminator. */
	72	pi->length = 0;
	73	pi->opcode = p;
252b5132 RH	74	}
252b5132 RH	75
20dc5b5a	76	static void
47b0e7ad NC	77	extract_immediate (FILE *stream,
	78	op_type looking_for,
	79	int thisnib,
	80	unsigned char *data,
	81	int *cst,
	82	int *len,
	83	const struct h8_opcode *q)
20dc5b5a MS	84	{
	85	switch (looking_for & SIZE)
	86	{
	87	case L_2:
	88	*len = 2;
	89	*cst = thisnib & 3;
	90
	91	/* DISP2 special treatment. */
	92	if ((looking_for & MODE) == DISP)
	93	{
47b0e7ad NC	94	if (OP_KIND (q->how) == O_MOVAB
	95	\|\| OP_KIND (q->how) == O_MOVAW
	96	\|\| OP_KIND (q->how) == O_MOVAL)
20dc5b5a MS	97	{
20dc5b5a MS	98	/* Handling for mova insn. */
47b0e7ad NC	99	switch (q->args.nib[0] & MODE)
	100	{
	101	case INDEXB:
	102	default:
	103	break;
	104	case INDEXW:
	105	cst = 2;
	106	break;
	107	case INDEXL:
	108	cst = 4;
	109	break;
	110	}
20dc5b5a MS	111	}
	112	else
	113	{
	114	/* Handling for non-mova insn. */
47b0e7ad NC	115	switch (OP_SIZE (q->how))
	116	{
	117	default: break;
	118	case SW:
	119	cst = 2;
	120	break;
	121	case SL:
	122	cst = 4;
	123	break;
	124	}
20dc5b5a MS	125	}
	126	}
	127	break;
	128	case L_8:
	129	*len = 8;
	130	*cst = data[0];
	131	break;
	132	case L_16:
	133	case L_16U:
	134	*len = 16;
	135	*cst = (data[0] << 8) + data [1];
	136	#if 0
	137	if ((looking_for & SIZE) == L_16)
47b0e7ad	138	cst = (short) cst; /* Sign extend. */
20dc5b5a MS	139	#endif
	140	break;
	141	case L_32:
	142	*len = 32;
f8a87c78 AM	143	*cst = (((unsigned) data[0] << 24) + (data[1] << 16)
f8a87c78 AM	144	+ (data[2] << 8) + data[3]);
20dc5b5a MS	145	break;
	146	default:
	147	*len = 0;
	148	*cst = 0;
	149	fprintf (stream, "DISP bad size\n");
	150	break;
	151	}
	152	}
	153
	154	static const char *regnames[] =
	155	{
	156	"r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
	157	"r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
	158	};
	159	static const char *wregnames[] =
	160	{
	161	"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
	162	"e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
	163	};
	164	static const char *lregnames[] =
	165	{
	166	"er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
	167	"er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
	168	};
	169	static const char *cregnames[] =
	170	{
	171	"ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
	172	};
	173
	174	static void
47b0e7ad NC	175	print_one_arg (disassemble_info *info,
	176	bfd_vma addr,
	177	op_type x,
	178	int cst,
	179	int cstlen,
	180	int rdisp_n,
	181	int rn,
	182	const char **pregnames,
	183	int len)
252b5132	184	{
47b0e7ad	185	void * stream = info->stream;
20dc5b5a MS	186	fprintf_ftype outfn = info->fprintf_func;
20dc5b5a MS	187
47b0e7ad NC	188	if ((x & SIZE) == L_3 \|\| (x & SIZE) == L_3NZ)
47b0e7ad NC	189	outfn (stream, "#0x%x", (unsigned) cst);
20dc5b5a	190	else if ((x & MODE) == IMM)
47b0e7ad NC	191	outfn (stream, "#0x%x", (unsigned) cst);
	192	else if ((x & MODE) == DBIT \|\| (x & MODE) == KBIT)
	193	outfn (stream, "#%d", (unsigned) cst);
20dc5b5a MS	194	else if ((x & MODE) == CONST_2)
	195	outfn (stream, "#2");
	196	else if ((x & MODE) == CONST_4)
	197	outfn (stream, "#4");
	198	else if ((x & MODE) == CONST_8)
	199	outfn (stream, "#8");
	200	else if ((x & MODE) == CONST_16)
	201	outfn (stream, "#16");
	202	else if ((x & MODE) == REG)
	203	{
	204	switch (x & SIZE)
	205	{
	206	case L_8:
	207	outfn (stream, "%s", regnames[rn]);
	208	break;
	209	case L_16:
	210	case L_16U:
	211	outfn (stream, "%s", wregnames[rn]);
	212	break;
	213	case L_P:
	214	case L_32:
	215	outfn (stream, "%s", lregnames[rn]);
	216	break;
	217	}
	218	}
	219	else if ((x & MODE) == LOWREG)
	220	{
	221	switch (x & SIZE)
	222	{
	223	case L_8:
	224	/* Always take low half of reg. */
	225	outfn (stream, "%s.b", regnames[rn < 8 ? rn + 8 : rn]);
	226	break;
	227	case L_16:
	228	case L_16U:
	229	/* Always take low half of reg. */
	230	outfn (stream, "%s.w", wregnames[rn < 8 ? rn : rn - 8]);
	231	break;
	232	case L_P:
	233	case L_32:
	234	outfn (stream, "%s.l", lregnames[rn]);
	235	break;
	236	}
	237	}
	238	else if ((x & MODE) == POSTINC)
47b0e7ad NC	239	outfn (stream, "@%s+", pregnames[rn]);
47b0e7ad NC	240
20dc5b5a	241	else if ((x & MODE) == POSTDEC)
47b0e7ad NC	242	outfn (stream, "@%s-", pregnames[rn]);
47b0e7ad NC	243
20dc5b5a	244	else if ((x & MODE) == PREINC)
47b0e7ad NC	245	outfn (stream, "@+%s", pregnames[rn]);
47b0e7ad NC	246
20dc5b5a	247	else if ((x & MODE) == PREDEC)
47b0e7ad NC	248	outfn (stream, "@-%s", pregnames[rn]);
47b0e7ad NC	249
20dc5b5a	250	else if ((x & MODE) == IND)
47b0e7ad NC	251	outfn (stream, "@%s", pregnames[rn]);
47b0e7ad NC	252
20dc5b5a	253	else if ((x & MODE) == ABS \|\| (x & ABSJMP))
47b0e7ad NC	254	outfn (stream, "@0x%x:%d", (unsigned) cst, cstlen);
47b0e7ad NC	255
20dc5b5a	256	else if ((x & MODE) == MEMIND)
47b0e7ad NC	257	outfn (stream, "@@%d (0x%x)", cst, cst);
47b0e7ad NC	258
20dc5b5a MS	259	else if ((x & MODE) == VECIND)
	260	{
	261	/* FIXME Multiplier should be 2 or 4, depending on processor mode,
	262	by which is meant "normal" vs. "middle", "advanced", "maximum". */
	263
	264	int offset = (cst + 0x80) * 4;
	265	outfn (stream, "@@%d (0x%x)", offset, offset);
	266	}
	267	else if ((x & MODE) == PCREL)
	268	{
	269	if ((x & SIZE) == L_16 \|\|
	270	(x & SIZE) == L_16U)
	271	{
0fd3a477	272	outfn (stream, ".%s%d (0x%lx)",
20dc5b5a	273	(short) cst > 0 ? "+" : "",
43e65147	274	(short) cst,
0fd3a477	275	(long)(addr + (short) cst + len));
20dc5b5a MS	276	}
	277	else
	278	{
0fd3a477	279	outfn (stream, ".%s%d (0x%lx)",
20dc5b5a	280	(char) cst > 0 ? "+" : "",
43e65147	281	(char) cst,
0fd3a477	282	(long)(addr + (char) cst + len));
20dc5b5a MS	283	}
	284	}
	285	else if ((x & MODE) == DISP)
47b0e7ad NC	286	outfn (stream, "@(0x%x:%d,%s)", cst, cstlen, pregnames[rdisp_n]);
47b0e7ad NC	287
20dc5b5a	288	else if ((x & MODE) == INDEXB)
47b0e7ad	289	/* Always take low half of reg. */
43e65147	290	outfn (stream, "@(0x%x:%d,%s.b)", cst, cstlen,
47b0e7ad NC	291	regnames[rdisp_n < 8 ? rdisp_n + 8 : rdisp_n]);
47b0e7ad NC	292
20dc5b5a	293	else if ((x & MODE) == INDEXW)
47b0e7ad	294	/* Always take low half of reg. */
43e65147	295	outfn (stream, "@(0x%x:%d,%s.w)", cst, cstlen,
47b0e7ad NC	296	wregnames[rdisp_n < 8 ? rdisp_n : rdisp_n - 8]);
47b0e7ad NC	297
20dc5b5a	298	else if ((x & MODE) == INDEXL)
47b0e7ad NC	299	outfn (stream, "@(0x%x:%d,%s.l)", cst, cstlen, lregnames[rdisp_n]);
47b0e7ad NC	300
20dc5b5a	301	else if (x & CTRL)
48891606	302	outfn (stream, "%s", cregnames[rn]);
47b0e7ad	303
20dc5b5a	304	else if ((x & MODE) == CCR)
47b0e7ad NC	305	outfn (stream, "ccr");
47b0e7ad NC	306
20dc5b5a	307	else if ((x & MODE) == EXR)
47b0e7ad NC	308	outfn (stream, "exr");
47b0e7ad NC	309
20dc5b5a	310	else if ((x & MODE) == MACREG)
47b0e7ad NC	311	outfn (stream, "mac%c", cst ? 'l' : 'h');
47b0e7ad NC	312
20dc5b5a MS	313	else
	314	/* xgettext:c-format */
	315	outfn (stream, _("Hmmmm 0x%x"), x);
	316	}
	317
	318	static unsigned int
47b0e7ad	319	bfd_h8_disassemble (bfd_vma addr, disassemble_info *info, int mach)
20dc5b5a MS	320	{
	321	/* Find the first entry in the table for this opcode. */
	322	int regno[3] = { 0, 0, 0 };
	323	int dispregno[3] = { 0, 0, 0 };
	324	int cst[3] = { 0, 0, 0 };
	325	int cstlen[3] = { 0, 0, 0 };
b34976b6	326	static bfd_boolean init = 0;
a3e64b75	327	const struct h8_instruction *qi;
20dc5b5a	328	char const **pregnames = mach != 0 ? lregnames : wregnames;
252b5132	329	int status;
20dc5b5a MS	330	unsigned int l;
20dc5b5a MS	331	unsigned char data[MAX_CODE_NIBBLES];
252b5132	332	void *stream = info->stream;
20dc5b5a	333	fprintf_ftype outfn = info->fprintf_func;
252b5132 RH	334
	335	if (!init)
	336	{
	337	bfd_h8_disassemble_init ();
	338	init = 1;
	339	}
	340
3903e627	341	status = info->read_memory_func (addr, data, 2, info);
5fec0fc5	342	if (status != 0)
252b5132	343	{
3903e627	344	info->memory_error_func (status, addr, info);
252b5132 RH	345	return -1;
252b5132 RH	346	}
53d388d1	347
20dc5b5a	348	for (l = 2; status == 0 && l < sizeof (data) / 2; l += 2)
53d388d1	349	status = info->read_memory_func (addr + l, data + l, 2, info);
252b5132	350
3903e627	351	/* Find the exact opcode/arg combo. */
a3e64b75	352	for (qi = h8_instructions; qi->opcode->name; qi++)
252b5132	353	{
a3e64b75	354	const struct h8_opcode *q = qi->opcode;
a3202ebb	355	const op_type *nib = q->data.nib;
252b5132 RH	356	unsigned int len = 0;
252b5132 RH	357
252b5132 RH	358	while (1)
	359	{
	360	op_type looking_for = *nib;
20dc5b5a MS	361	int thisnib = data[len / 2];
20dc5b5a MS	362	int opnr;
53d388d1	363
20dc5b5a MS	364	thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib / 16) & 0xf);
	365	opnr = ((looking_for & OP3) == OP3 ? 2
	366	: (looking_for & DST) == DST ? 1 : 0);
53d388d1	367
5fec0fc5	368	if (looking_for < 16 && looking_for >= 0)
252b5132	369	{
5fec0fc5	370	if (looking_for != thisnib)
252b5132 RH	371	goto fail;
252b5132 RH	372	}
5fec0fc5	373	else
252b5132	374	{
252b5132 RH	375	if ((int) looking_for & (int) B31)
252b5132 RH	376	{
20dc5b5a	377	if (!((thisnib & 0x8) != 0))
252b5132	378	goto fail;
53d388d1	379
252b5132	380	looking_for = (op_type) ((int) looking_for & ~(int) B31);
20dc5b5a	381	thisnib &= 0x7;
252b5132	382	}
20dc5b5a	383	else if ((int) looking_for & (int) B30)
252b5132	384	{
20dc5b5a	385	if (!((thisnib & 0x8) == 0))
252b5132	386	goto fail;
53d388d1	387
252b5132 RH	388	looking_for = (op_type) ((int) looking_for & ~(int) B30);
	389	}
	390
20dc5b5a MS	391	if ((int) looking_for & (int) B21)
	392	{
	393	if (!((thisnib & 0x4) != 0))
	394	goto fail;
	395
	396	looking_for = (op_type) ((int) looking_for & ~(int) B21);
	397	thisnib &= 0xb;
	398	}
	399	else if ((int) looking_for & (int) B20)
	400	{
	401	if (!((thisnib & 0x4) == 0))
	402	goto fail;
	403
	404	looking_for = (op_type) ((int) looking_for & ~(int) B20);
	405	}
	406	if ((int) looking_for & (int) B11)
	407	{
	408	if (!((thisnib & 0x2) != 0))
	409	goto fail;
	410
	411	looking_for = (op_type) ((int) looking_for & ~(int) B11);
	412	thisnib &= 0xd;
	413	}
	414	else if ((int) looking_for & (int) B10)
	415	{
	416	if (!((thisnib & 0x2) == 0))
	417	goto fail;
	418
	419	looking_for = (op_type) ((int) looking_for & ~(int) B10);
	420	}
	421
	422	if ((int) looking_for & (int) B01)
	423	{
	424	if (!((thisnib & 0x1) != 0))
	425	goto fail;
	426
	427	looking_for = (op_type) ((int) looking_for & ~(int) B01);
	428	thisnib &= 0xe;
	429	}
	430	else if ((int) looking_for & (int) B00)
	431	{
	432	if (!((thisnib & 0x1) == 0))
	433	goto fail;
	434
	435	looking_for = (op_type) ((int) looking_for & ~(int) B00);
	436	}
	437
	438	if (looking_for & IGNORE)
	439	{
	440	/* Hitachi has declared that IGNORE must be zero. */
	441	if (thisnib != 0)
	442	goto fail;
	443	}
	444	else if ((looking_for & MODE) == DATA)
	445	{
	446	; /* Skip embedded data. */
	447	}
	448	else if ((looking_for & MODE) == DBIT)
252b5132	449	{
53d388d1 JL	450	/* Exclude adds/subs by looking at bit 0 and 2, and
	451	make sure the operand size, either w or l,
	452	matches by looking at bit 1. */
	453	if ((looking_for & 7) != (thisnib & 7))
3903e627	454	goto fail;
53d388d1	455
20dc5b5a	456	cst[opnr] = (thisnib & 0x8) ? 2 : 1;
5fec0fc5	457	}
47b0e7ad NC	458	else if ((looking_for & MODE) == DISP
	459	\|\| (looking_for & MODE) == ABS
	460	\|\| (looking_for & MODE) == PCREL
	461	\|\| (looking_for & MODE) == INDEXB
	462	\|\| (looking_for & MODE) == INDEXW
	463	\|\| (looking_for & MODE) == INDEXL)
252b5132	464	{
43e65147 L	465	extract_immediate (stream, looking_for, thisnib,
43e65147 L	466	data + len / 2, cst + opnr,
20dc5b5a MS	467	cstlen + opnr, q);
	468	/* Even address == bra, odd == bra/s. */
	469	if (q->how == O (O_BRAS, SB))
	470	cst[opnr] -= 1;
252b5132	471	}
47b0e7ad NC	472	else if ((looking_for & MODE) == REG
	473	\|\| (looking_for & MODE) == LOWREG
	474	\|\| (looking_for & MODE) == IND
	475	\|\| (looking_for & MODE) == PREINC
	476	\|\| (looking_for & MODE) == POSTINC
	477	\|\| (looking_for & MODE) == PREDEC
	478	\|\| (looking_for & MODE) == POSTDEC)
252b5132	479	{
20dc5b5a	480	regno[opnr] = thisnib;
252b5132	481	}
47b0e7ad	482	else if (looking_for & CTRL) /* Control Register. */
252b5132	483	{
20dc5b5a	484	thisnib &= 7;
47b0e7ad NC	485	if (((looking_for & MODE) == CCR && (thisnib != C_CCR))
	486	\|\| ((looking_for & MODE) == EXR && (thisnib != C_EXR))
	487	\|\| ((looking_for & MODE) == MACH && (thisnib != C_MACH))
	488	\|\| ((looking_for & MODE) == MACL && (thisnib != C_MACL))
	489	\|\| ((looking_for & MODE) == VBR && (thisnib != C_VBR))
	490	\|\| ((looking_for & MODE) == SBR && (thisnib != C_SBR)))
20dc5b5a	491	goto fail;
47b0e7ad NC	492	if (((looking_for & MODE) == CCR_EXR
	493	&& (thisnib != C_CCR && thisnib != C_EXR))
	494	\|\| ((looking_for & MODE) == VBR_SBR
	495	&& (thisnib != C_VBR && thisnib != C_SBR))
	496	\|\| ((looking_for & MODE) == MACREG
	497	&& (thisnib != C_MACH && thisnib != C_MACL)))
20dc5b5a	498	goto fail;
47b0e7ad NC	499	if (((looking_for & MODE) == CC_EX_VB_SB
	500	&& (thisnib != C_CCR && thisnib != C_EXR
	501	&& thisnib != C_VBR && thisnib != C_SBR)))
20dc5b5a MS	502	goto fail;
	503
	504	regno[opnr] = thisnib;
	505	}
	506	else if ((looking_for & SIZE) == L_5)
	507	{
	508	cst[opnr] = data[len / 2] & 31;
	509	cstlen[opnr] = 5;
	510	}
	511	else if ((looking_for & SIZE) == L_4)
	512	{
	513	cst[opnr] = thisnib;
	514	cstlen[opnr] = 4;
	515	}
47b0e7ad NC	516	else if ((looking_for & SIZE) == L_16
47b0e7ad NC	517	\|\| (looking_for & SIZE) == L_16U)
20dc5b5a MS	518	{
	519	cst[opnr] = (data[len / 2]) * 256 + data[(len + 2) / 2];
	520	cstlen[opnr] = 16;
	521	}
	522	else if ((looking_for & MODE) == MEMIND)
	523	{
	524	cst[opnr] = data[1];
252b5132	525	}
20dc5b5a	526	else if ((looking_for & MODE) == VECIND)
252b5132	527	{
20dc5b5a	528	cst[opnr] = data[1] & 0x7f;
252b5132	529	}
20dc5b5a	530	else if ((looking_for & SIZE) == L_32)
252b5132	531	{
20dc5b5a	532	int i = len / 2;
53d388d1	533
f8a87c78	534	cst[opnr] = (((unsigned) data[i] << 24)
43e65147	535	\| (data[i + 1] << 16)
20dc5b5a MS	536	\| (data[i + 2] << 8)
20dc5b5a MS	537	\| (data[i + 3]));
252b5132	538
20dc5b5a	539	cstlen[opnr] = 32;
252b5132	540	}
20dc5b5a	541	else if ((looking_for & SIZE) == L_24)
252b5132	542	{
20dc5b5a	543	int i = len / 2;
53d388d1	544
43e65147	545	cst[opnr] =
20dc5b5a MS	546	(data[i] << 16) \| (data[i + 1] << 8) \| (data[i + 2]);
20dc5b5a MS	547	cstlen[opnr] = 24;
252b5132	548	}
252b5132 RH	549	else if (looking_for & DISPREG)
252b5132 RH	550	{
20dc5b5a	551	dispregno[opnr] = thisnib & 7;
252b5132	552	}
20dc5b5a	553	else if ((looking_for & MODE) == KBIT)
252b5132	554	{
5fec0fc5	555	switch (thisnib)
252b5132 RH	556	{
252b5132 RH	557	case 9:
20dc5b5a	558	cst[opnr] = 4;
252b5132 RH	559	break;
252b5132 RH	560	case 8:
20dc5b5a	561	cst[opnr] = 2;
252b5132 RH	562	break;
252b5132 RH	563	case 0:
20dc5b5a	564	cst[opnr] = 1;
252b5132 RH	565	break;
	566	default:
	567	goto fail;
	568	}
	569	}
20dc5b5a	570	else if ((looking_for & SIZE) == L_8)
252b5132	571	{
20dc5b5a MS	572	cstlen[opnr] = 8;
20dc5b5a MS	573	cst[opnr] = data[len / 2];
252b5132	574	}
47b0e7ad NC	575	else if ((looking_for & SIZE) == L_3
47b0e7ad NC	576	\|\| (looking_for & SIZE) == L_3NZ)
252b5132	577	{
20dc5b5a MS	578	cst[opnr] = thisnib & 0x7;
	579	if (cst[opnr] == 0 && (looking_for & SIZE) == L_3NZ)
	580	goto fail;
252b5132	581	}
20dc5b5a	582	else if ((looking_for & SIZE) == L_2)
252b5132	583	{
20dc5b5a MS	584	cstlen[opnr] = 2;
20dc5b5a MS	585	cst[opnr] = thisnib & 0x3;
252b5132	586	}
20dc5b5a	587	else if ((looking_for & MODE) == MACREG)
252b5132	588	{
20dc5b5a	589	cst[opnr] = (thisnib == 3);
252b5132	590	}
20dc5b5a	591	else if (looking_for == (op_type) E)
252b5132	592	{
20dc5b5a	593	outfn (stream, "%s\t", q->name);
252b5132 RH	594
	595	/* Gross. Disgusting. */
	596	if (strcmp (q->name, "ldm.l") == 0)
	597	{
	598	int count, high;
	599
20dc5b5a MS	600	count = (data[1] / 16) & 0x3;
20dc5b5a MS	601	high = regno[1];
252b5132	602
20dc5b5a	603	outfn (stream, "@sp+,er%d-er%d", high - count, high);
a3e64b75	604	return qi->length;
252b5132 RH	605	}
	606
	607	if (strcmp (q->name, "stm.l") == 0)
	608	{
	609	int count, low;
	610
20dc5b5a MS	611	count = (data[1] / 16) & 0x3;
20dc5b5a MS	612	low = regno[0];
252b5132	613
20dc5b5a MS	614	outfn (stream, "er%d-er%d,@-sp", low, low + count);
	615	return qi->length;
	616	}
	617	if (strcmp (q->name, "rte/l") == 0
	618	\|\| strcmp (q->name, "rts/l") == 0)
	619	{
	620	if (regno[0] == 0)
	621	outfn (stream, "er%d", regno[1]);
	622	else
47b0e7ad NC	623	outfn (stream, "er%d-er%d", regno[1] - regno[0],
47b0e7ad NC	624	regno[1]);
20dc5b5a MS	625	return qi->length;
20dc5b5a MS	626	}
0112cd26	627	if (CONST_STRNEQ (q->name, "mova"))
20dc5b5a	628	{
a3202ebb	629	const op_type *args = q->args.nib;
20dc5b5a MS	630
	631	if (args[1] == (op_type) E)
	632	{
	633	/* Short form. */
43e65147 L	634	print_one_arg (info, addr, args[0], cst[0],
43e65147 L	635	cstlen[0], dispregno[0], regno[0],
20dc5b5a MS	636	pregnames, qi->length);
	637	outfn (stream, ",er%d", dispregno[0]);
	638	}
	639	else
	640	{
	641	outfn (stream, "@(0x%x:%d,", cst[0], cstlen[0]);
43e65147 L	642	print_one_arg (info, addr, args[1], cst[1],
43e65147 L	643	cstlen[1], dispregno[1], regno[1],
20dc5b5a MS	644	pregnames, qi->length);
	645	outfn (stream, ".%c),",
	646	(args[0] & MODE) == INDEXB ? 'b' : 'w');
43e65147 L	647	print_one_arg (info, addr, args[2], cst[2],
43e65147 L	648	cstlen[2], dispregno[2], regno[2],
20dc5b5a MS	649	pregnames, qi->length);
20dc5b5a MS	650	}
a3e64b75	651	return qi->length;
252b5132	652	}
3903e627	653	/* Fill in the args. */
252b5132	654	{
a3202ebb	655	const op_type *args = q->args.nib;
252b5132	656	int hadone = 0;
20dc5b5a	657	int nargs;
252b5132	658
91809fda	659	/* Special case handling for the adds and subs instructions
47b0e7ad NC	660	since in H8 mode thay can only take the r0-r7 registers
	661	but in other (higher) modes they can take the er0-er7
	662	registers as well. */
91809fda NC	663	if (strcmp (qi->opcode->name, "adds") == 0
	664	\|\| strcmp (qi->opcode->name, "subs") == 0)
	665	{
	666	outfn (stream, "#%d,%s", cst[0], pregnames[regno[1] & 0x7]);
	667	return qi->length;
	668	}
	669
43e65147	670	for (nargs = 0;
47b0e7ad	671	nargs < 3 && args[nargs] != (op_type) E;
20dc5b5a	672	nargs++)
252b5132	673	{
20dc5b5a	674	int x = args[nargs];
53d388d1	675
252b5132	676	if (hadone)
20dc5b5a MS	677	outfn (stream, ",");
	678
	679	print_one_arg (info, addr, x,
	680	cst[nargs], cstlen[nargs],
	681	dispregno[nargs], regno[nargs],
	682	pregnames, qi->length);
53d388d1	683
252b5132	684	hadone = 1;
252b5132 RH	685	}
252b5132 RH	686	}
53d388d1	687
a3e64b75	688	return qi->length;
252b5132	689	}
252b5132	690	else
5fec0fc5	691	/* xgettext:c-format */
20dc5b5a	692	outfn (stream, _("Don't understand 0x%x \n"), looking_for);
252b5132	693	}
53d388d1	694
252b5132 RH	695	len++;
	696	nib++;
	697	}
53d388d1	698
252b5132	699	fail:
c07ab2ec	700	;
252b5132 RH	701	}
252b5132 RH	702
5fec0fc5	703	/* Fell off the end. */
ed049af3	704	outfn (stream, ".word\tH'%x,H'%x", data[0], data[1]);
252b5132 RH	705	return 2;
	706	}
	707
5fec0fc5	708	int
47b0e7ad	709	print_insn_h8300 (bfd_vma addr, disassemble_info *info)
252b5132	710	{
5fec0fc5	711	return bfd_h8_disassemble (addr, info, 0);
252b5132 RH	712	}
252b5132 RH	713
5fec0fc5	714	int
47b0e7ad	715	print_insn_h8300h (bfd_vma addr, disassemble_info *info)
252b5132	716	{
5fec0fc5	717	return bfd_h8_disassemble (addr, info, 1);
252b5132 RH	718	}
252b5132 RH	719
5fec0fc5	720	int
47b0e7ad	721	print_insn_h8300s (bfd_vma addr, disassemble_info *info)
252b5132	722	{
5fec0fc5	723	return bfd_h8_disassemble (addr, info, 2);
252b5132	724	}