[deliverable/binutils-gdb.git] / opcodes / h8300-dis.c

/* Disassemble h8300 instructions.
   Copyright (C) 1993-2017 Free Software Foundation, Inc.

   This file is part of the GNU opcodes library.

   This library is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

   It is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
   MA 02110-1301, USA.  */

#define DEFINE_TABLE

#include "sysdep.h"
#define h8_opcodes h8ops
#include "opcode/h8300.h"
#include "disassemble.h"
#include "opintl.h"
#include "libiberty.h"

struct h8_instruction
{
  int length;
  const struct h8_opcode *opcode;
};

struct h8_instruction *h8_instructions;

/* Run through the opcodes and sort them into order to make them easy
   to disassemble.  */

static void
bfd_h8_disassemble_init (void)
{
  unsigned int i;
  unsigned int nopcodes;
  const struct h8_opcode *p;
  struct h8_instruction *pi;

  nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);

  h8_instructions = xmalloc (nopcodes * sizeof (struct h8_instruction));

  for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++)
    {
      /* Just make sure there are an even number of nibbles in it, and
	 that the count is the same as the length.  */
      for (i = 0; p->data.nib[i] != (op_type) E; i++)
	;

      if (i & 1)
	{
	  fprintf (stderr, "Internal error, h8_disassemble_init.\n");
	  abort ();
	}

      pi->length = i / 2;
      pi->opcode = p;
    }

  /* Add entry for the NULL vector terminator.  */
  pi->length = 0;
  pi->opcode = p;
}

static void
extract_immediate (FILE *stream,
		   op_type looking_for,
		   int thisnib,
		   unsigned char *data,
		   int *cst,
		   int *len,
		   const struct h8_opcode *q)
{
  switch (looking_for & SIZE)
    {
    case L_2:
      *len = 2;
      *cst = thisnib & 3;

      /* DISP2 special treatment.  */
      if ((looking_for & MODE) == DISP)
	{
	  if (OP_KIND (q->how) == O_MOVAB
	      || OP_KIND (q->how) == O_MOVAW
	      || OP_KIND (q->how) == O_MOVAL)
	    {
	      /* Handling for mova insn.  */
	      switch (q->args.nib[0] & MODE)
		{
		case INDEXB:
		default:
		  break;
		case INDEXW:
		  *cst *= 2;
		  break;
		case INDEXL:
		  *cst *= 4;
		  break;
		}
	    }
	  else
	    {
	      /* Handling for non-mova insn.  */
	      switch (OP_SIZE (q->how))
		{
		default: break;
		case SW:
		  *cst *= 2;
		  break;
		case SL:
		  *cst *= 4;
		  break;
		}
	    }
	}
      break;
    case L_8:
      *len = 8;
      *cst = data[0];
      break;
    case L_16:
    case L_16U:
      *len = 16;
      *cst = (data[0] << 8) + data [1];
#if 0
      if ((looking_for & SIZE) == L_16)
	*cst = (short) *cst;	/* Sign extend.  */
#endif
      break;
    case L_32:
      *len = 32;
      *cst = (data[0] << 24) + (data[1] << 16) + (data[2] << 8) + data[3];
      break;
    default:
      *len = 0;
      *cst = 0;
      fprintf (stream, "DISP bad size\n");
      break;
    }
}

static const char *regnames[] =
{
  "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
  "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
};
static const char *wregnames[] =
{
  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
  "e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
};
static const char *lregnames[] =
{
  "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
  "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
};
static const char *cregnames[] =
{
  "ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
};

static void
print_one_arg (disassemble_info *info,
	       bfd_vma addr,
	       op_type x,
	       int cst,
	       int cstlen,
	       int rdisp_n,
	       int rn,
	       const char **pregnames,
	       int len)
{
  void * stream = info->stream;
  fprintf_ftype outfn = info->fprintf_func;

  if ((x & SIZE) == L_3 || (x & SIZE) == L_3NZ)
    outfn (stream, "#0x%x", (unsigned) cst);
  else if ((x & MODE) == IMM)
    outfn (stream, "#0x%x", (unsigned) cst);
  else if ((x & MODE) == DBIT || (x & MODE) == KBIT)
    outfn (stream, "#%d", (unsigned) cst);
  else if ((x & MODE) == CONST_2)
    outfn (stream, "#2");
  else if ((x & MODE) == CONST_4)
    outfn (stream, "#4");
  else if ((x & MODE) == CONST_8)
    outfn (stream, "#8");
  else if ((x & MODE) == CONST_16)
    outfn (stream, "#16");
  else if ((x & MODE) == REG)
    {
      switch (x & SIZE)
	{
	case L_8:
	  outfn (stream, "%s", regnames[rn]);
	  break;
	case L_16:
	case L_16U:
	  outfn (stream, "%s", wregnames[rn]);
	  break;
	case L_P:
	case L_32:
	  outfn (stream, "%s", lregnames[rn]);
	  break;
	}
    }
  else if ((x & MODE) == LOWREG)
    {
      switch (x & SIZE)
	{
	case L_8:
	  /* Always take low half of reg.  */
	  outfn (stream, "%s.b", regnames[rn < 8 ? rn + 8 : rn]);
	  break;
	case L_16:
	case L_16U:
	  /* Always take low half of reg.  */
	  outfn (stream, "%s.w", wregnames[rn < 8 ? rn : rn - 8]);
	  break;
	case L_P:
	case L_32:
	  outfn (stream, "%s.l", lregnames[rn]);
	  break;
	}
    }
  else if ((x & MODE) == POSTINC)
    outfn (stream, "@%s+", pregnames[rn]);

  else if ((x & MODE) == POSTDEC)
    outfn (stream, "@%s-", pregnames[rn]);

  else if ((x & MODE) == PREINC)
    outfn (stream, "@+%s", pregnames[rn]);

  else if ((x & MODE) == PREDEC)
    outfn (stream, "@-%s", pregnames[rn]);

  else if ((x & MODE) == IND)
    outfn (stream, "@%s", pregnames[rn]);

  else if ((x & MODE) == ABS || (x & ABSJMP))
    outfn (stream, "@0x%x:%d", (unsigned) cst, cstlen);

  else if ((x & MODE) == MEMIND)
    outfn (stream, "@@%d (0x%x)", cst, cst);

  else if ((x & MODE) == VECIND)
    {
      /* FIXME Multiplier should be 2 or 4, depending on processor mode,
	 by which is meant "normal" vs. "middle", "advanced", "maximum".  */

      int offset = (cst + 0x80) * 4;
      outfn (stream, "@@%d (0x%x)", offset, offset);
    }
  else if ((x & MODE) == PCREL)
    {
      if ((x & SIZE) == L_16 ||
	  (x & SIZE) == L_16U)
	{
	  outfn (stream, ".%s%d (0x%lx)",
		   (short) cst > 0 ? "+" : "",
		   (short) cst,
		   (long)(addr + (short) cst + len));
	}
      else
	{
	  outfn (stream, ".%s%d (0x%lx)",
		   (char) cst > 0 ? "+" : "",
		   (char) cst,
		   (long)(addr + (char) cst + len));
	}
    }
  else if ((x & MODE) == DISP)
    outfn (stream, "@(0x%x:%d,%s)", cst, cstlen, pregnames[rdisp_n]);

  else if ((x & MODE) == INDEXB)
    /* Always take low half of reg.  */
    outfn (stream, "@(0x%x:%d,%s.b)", cst, cstlen,
	   regnames[rdisp_n < 8 ? rdisp_n + 8 : rdisp_n]);

  else if ((x & MODE) == INDEXW)
    /* Always take low half of reg.  */
    outfn (stream, "@(0x%x:%d,%s.w)", cst, cstlen,
	   wregnames[rdisp_n < 8 ? rdisp_n : rdisp_n - 8]);

  else if ((x & MODE) == INDEXL)
    outfn (stream, "@(0x%x:%d,%s.l)", cst, cstlen, lregnames[rdisp_n]);

  else if (x & CTRL)
    outfn (stream, "%s", cregnames[rn]);

  else if ((x & MODE) == CCR)
    outfn (stream, "ccr");

  else if ((x & MODE) == EXR)
    outfn (stream, "exr");

  else if ((x & MODE) == MACREG)
    outfn (stream, "mac%c", cst ? 'l' : 'h');

  else
    /* xgettext:c-format */
    outfn (stream, _("Hmmmm 0x%x"), x);
}

static unsigned int
bfd_h8_disassemble (bfd_vma addr, disassemble_info *info, int mach)
{
  /* Find the first entry in the table for this opcode.  */
  int regno[3] = { 0, 0, 0 };
  int dispregno[3] = { 0, 0, 0 };
  int cst[3] = { 0, 0, 0 };
  int cstlen[3] = { 0, 0, 0 };
  static bfd_boolean init = 0;
  const struct h8_instruction *qi;
  char const **pregnames = mach != 0 ? lregnames : wregnames;
  int status;
  unsigned int l;
  unsigned char data[MAX_CODE_NIBBLES];
  void *stream = info->stream;
  fprintf_ftype outfn = info->fprintf_func;

  if (!init)
    {
      bfd_h8_disassemble_init ();
      init = 1;
    }

  status = info->read_memory_func (addr, data, 2, info);
  if (status != 0)
    {
      info->memory_error_func (status, addr, info);
      return -1;
    }

  for (l = 2; status == 0 && l < sizeof (data) / 2; l += 2)
    status = info->read_memory_func (addr + l, data + l, 2, info);

  /* Find the exact opcode/arg combo.  */
  for (qi = h8_instructions; qi->opcode->name; qi++)
    {
      const struct h8_opcode *q = qi->opcode;
      const op_type *nib = q->data.nib;
      unsigned int len = 0;

      while (1)
	{
	  op_type looking_for = *nib;
	  int thisnib = data[len / 2];
	  int opnr;

	  thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib / 16) & 0xf);
	  opnr = ((looking_for & OP3) == OP3 ? 2
		  : (looking_for & DST) == DST ? 1 : 0);

	  if (looking_for < 16 && looking_for >= 0)
	    {
	      if (looking_for != thisnib)
		goto fail;
	    }
	  else
	    {
	      if ((int) looking_for & (int) B31)
		{
		  if (!((thisnib & 0x8) != 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B31);
		  thisnib &= 0x7;
		}
	      else if ((int) looking_for & (int) B30)
		{
		  if (!((thisnib & 0x8) == 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B30);
		}

	      if ((int) looking_for & (int) B21)
		{
		  if (!((thisnib & 0x4) != 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B21);
		  thisnib &= 0xb;
		}
	      else if ((int) looking_for & (int) B20)
		{
		  if (!((thisnib & 0x4) == 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B20);
		}
	      if ((int) looking_for & (int) B11)
		{
		  if (!((thisnib & 0x2) != 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B11);
		  thisnib &= 0xd;
		}
	      else if ((int) looking_for & (int) B10)
		{
		  if (!((thisnib & 0x2) == 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B10);
		}

	      if ((int) looking_for & (int) B01)
		{
		  if (!((thisnib & 0x1) != 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B01);
		  thisnib &= 0xe;
		}
	      else if ((int) looking_for & (int) B00)
		{
		  if (!((thisnib & 0x1) == 0))
		    goto fail;

		  looking_for = (op_type) ((int) looking_for & ~(int) B00);
		}

	      if (looking_for & IGNORE)
		{
		  /* Hitachi has declared that IGNORE must be zero.  */
		  if (thisnib != 0)
		    goto fail;
		}
	      else if ((looking_for & MODE) == DATA)
		{
		  ;			/* Skip embedded data.  */
		}
	      else if ((looking_for & MODE) == DBIT)
		{
		  /* Exclude adds/subs by looking at bit 0 and 2, and
                     make sure the operand size, either w or l,
                     matches by looking at bit 1.  */
		  if ((looking_for & 7) != (thisnib & 7))
		    goto fail;

		  cst[opnr] = (thisnib & 0x8) ? 2 : 1;
		}
	      else if ((looking_for & MODE) == DISP
		       || (looking_for & MODE) == ABS
		       || (looking_for & MODE) == PCREL
		       || (looking_for & MODE) == INDEXB
		       || (looking_for & MODE) == INDEXW
		       || (looking_for & MODE) == INDEXL)
		{
		  extract_immediate (stream, looking_for, thisnib,
				     data + len / 2, cst + opnr,
				     cstlen + opnr, q);
		  /* Even address == bra, odd == bra/s.  */
		  if (q->how == O (O_BRAS, SB))
		    cst[opnr] -= 1;
		}
	      else if ((looking_for & MODE) == REG
		       || (looking_for & MODE) == LOWREG
		       || (looking_for & MODE) == IND
		       || (looking_for & MODE) == PREINC
		       || (looking_for & MODE) == POSTINC
		       || (looking_for & MODE) == PREDEC
		       || (looking_for & MODE) == POSTDEC)
		{
		  regno[opnr] = thisnib;
		}
	      else if (looking_for & CTRL)	/* Control Register.  */
		{
		  thisnib &= 7;
		  if (((looking_for & MODE) == CCR  && (thisnib != C_CCR))
		      || ((looking_for & MODE) == EXR  && (thisnib != C_EXR))
		      || ((looking_for & MODE) == MACH && (thisnib != C_MACH))
		      || ((looking_for & MODE) == MACL && (thisnib != C_MACL))
		      || ((looking_for & MODE) == VBR  && (thisnib != C_VBR))
		      || ((looking_for & MODE) == SBR  && (thisnib != C_SBR)))
		    goto fail;
		  if (((looking_for & MODE) == CCR_EXR
		       && (thisnib != C_CCR && thisnib != C_EXR))
		      || ((looking_for & MODE) == VBR_SBR
			  && (thisnib != C_VBR && thisnib != C_SBR))
		      || ((looking_for & MODE) == MACREG
			  && (thisnib != C_MACH && thisnib != C_MACL)))
		    goto fail;
		  if (((looking_for & MODE) == CC_EX_VB_SB
		       && (thisnib != C_CCR && thisnib != C_EXR
			   && thisnib != C_VBR && thisnib != C_SBR)))
		    goto fail;

		  regno[opnr] = thisnib;
		}
	      else if ((looking_for & SIZE) == L_5)
		{
		  cst[opnr] = data[len / 2] & 31;
		  cstlen[opnr] = 5;
		}
	      else if ((looking_for & SIZE) == L_4)
		{
		  cst[opnr] = thisnib;
		  cstlen[opnr] = 4;
		}
	      else if ((looking_for & SIZE) == L_16
		       || (looking_for & SIZE) == L_16U)
		{
		  cst[opnr] = (data[len / 2]) * 256 + data[(len + 2) / 2];
		  cstlen[opnr] = 16;
		}
	      else if ((looking_for & MODE) == MEMIND)
		{
		  cst[opnr] = data[1];
		}
	      else if ((looking_for & MODE) == VECIND)
		{
		  cst[opnr] = data[1] & 0x7f;
		}
	      else if ((looking_for & SIZE) == L_32)
		{
		  int i = len / 2;

		  cst[opnr] = ((data[i] << 24)
			       | (data[i + 1] << 16)
			       | (data[i + 2] << 8)
			       | (data[i + 3]));

		  cstlen[opnr] = 32;
		}
	      else if ((looking_for & SIZE) == L_24)
		{
		  int i = len / 2;

		  cst[opnr] =
		    (data[i] << 16) | (data[i + 1] << 8) | (data[i + 2]);
		  cstlen[opnr] = 24;
		}
	      else if (looking_for & DISPREG)
		{
		  dispregno[opnr] = thisnib & 7;
		}
	      else if ((looking_for & MODE) == KBIT)
		{
		  switch (thisnib)
		    {
		    case 9:
		      cst[opnr] = 4;
		      break;
		    case 8:
		      cst[opnr] = 2;
		      break;
		    case 0:
		      cst[opnr] = 1;
		      break;
		    default:
		      goto fail;
		    }
		}
	      else if ((looking_for & SIZE) == L_8)
		{
		  cstlen[opnr] = 8;
		  cst[opnr] = data[len / 2];
		}
	      else if ((looking_for & SIZE) == L_3
		       || (looking_for & SIZE) == L_3NZ)
		{
		  cst[opnr] = thisnib & 0x7;
		  if (cst[opnr] == 0 && (looking_for & SIZE) == L_3NZ)
		    goto fail;
		}
	      else if ((looking_for & SIZE) == L_2)
		{
		  cstlen[opnr] = 2;
		  cst[opnr] = thisnib & 0x3;
		}
	      else if ((looking_for & MODE) == MACREG)
		{
		  cst[opnr] = (thisnib == 3);
		}
	      else if (looking_for == (op_type) E)
		{
		  outfn (stream, "%s\t", q->name);

		  /* Gross.  Disgusting.  */
		  if (strcmp (q->name, "ldm.l") == 0)
		    {
		      int count, high;

		      count = (data[1] / 16) & 0x3;
		      high = regno[1];

		      outfn (stream, "@sp+,er%d-er%d", high - count, high);
		      return qi->length;
		    }

		  if (strcmp (q->name, "stm.l") == 0)
		    {
		      int count, low;

		      count = (data[1] / 16) & 0x3;
		      low = regno[0];

		      outfn (stream, "er%d-er%d,@-sp", low, low + count);
		      return qi->length;
		    }
		  if (strcmp (q->name, "rte/l") == 0
		      || strcmp (q->name, "rts/l") == 0)
		    {
		      if (regno[0] == 0)
			outfn (stream, "er%d", regno[1]);
		      else
			outfn (stream, "er%d-er%d", regno[1] - regno[0],
			       regno[1]);
		      return qi->length;
		    }
		  if (CONST_STRNEQ (q->name, "mova"))
		    {
		      const op_type *args = q->args.nib;

		      if (args[1] == (op_type) E)
			{
			  /* Short form.  */
			  print_one_arg (info, addr, args[0], cst[0],
					 cstlen[0], dispregno[0], regno[0],
					 pregnames, qi->length);
			  outfn (stream, ",er%d", dispregno[0]);
			}
		      else
			{
			  outfn (stream, "@(0x%x:%d,", cst[0], cstlen[0]);
			  print_one_arg (info, addr, args[1], cst[1],
					 cstlen[1], dispregno[1], regno[1],
					 pregnames, qi->length);
			  outfn (stream, ".%c),",
				 (args[0] & MODE) == INDEXB ? 'b' : 'w');
			  print_one_arg (info, addr, args[2], cst[2],
					 cstlen[2], dispregno[2], regno[2],
					 pregnames, qi->length);
			}
		      return qi->length;
		    }
		  /* Fill in the args.  */
		  {
		    const op_type *args = q->args.nib;
		    int hadone = 0;
		    int nargs;

		    /* Special case handling for the adds and subs instructions
		       since in H8 mode thay can only take the r0-r7 registers
		       but in other (higher) modes they can take the er0-er7
		       registers as well.  */
		    if (strcmp (qi->opcode->name, "adds") == 0
			|| strcmp (qi->opcode->name, "subs") == 0)
		      {
			outfn (stream, "#%d,%s", cst[0], pregnames[regno[1] & 0x7]);
			return qi->length;
		      }

		    for (nargs = 0;
			 nargs < 3 && args[nargs] != (op_type) E;
			 nargs++)
		      {
			int x = args[nargs];

			if (hadone)
			  outfn (stream, ",");

			print_one_arg (info, addr, x,
				       cst[nargs], cstlen[nargs],
				       dispregno[nargs], regno[nargs],
				       pregnames, qi->length);

			hadone = 1;
		      }
		  }

		  return qi->length;
		}
	      else
		/* xgettext:c-format */
		outfn (stream, _("Don't understand 0x%x \n"), looking_for);
	    }

	  len++;
	  nib++;
	}

    fail:
      ;
    }

  /* Fell off the end.  */
  outfn (stream, ".word\tH'%x,H'%x", data[0], data[1]);
  return 2;
}

int
print_insn_h8300 (bfd_vma addr, disassemble_info *info)
{
  return bfd_h8_disassemble (addr, info, 0);
}

int
print_insn_h8300h (bfd_vma addr, disassemble_info *info)
{
  return bfd_h8_disassemble (addr, info, 1);
}

int
print_insn_h8300s (bfd_vma addr, disassemble_info *info)
{
  return bfd_h8_disassemble (addr, info, 2);
}
Commit	Line	Data
252b5132	1	/* Disassemble h8300 instructions.
2571583a	2	Copyright (C) 1993-2017 Free Software Foundation, Inc.
252b5132	3
9b201bb5 NC	4	This file is part of the GNU opcodes library.
	5
	6	This library is free software; you can redistribute it and/or modify
ed049af3	7	it under the terms of the GNU General Public License as published by
9b201bb5 NC	8	the Free Software Foundation; either version 3, or (at your option)
9b201bb5 NC	9	any later version.
252b5132	10
9b201bb5 NC	11	It is distributed in the hope that it will be useful, but WITHOUT
	12	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	13	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	14	License for more details.
252b5132	15
ed049af3 NC	16	You should have received a copy of the GNU General Public License
ed049af3 NC	17	along with this program; if not, write to the Free Software
47b0e7ad NC	18	Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
47b0e7ad NC	19	MA 02110-1301, USA. */
252b5132 RH	20
	21	#define DEFINE_TABLE
	22
0d8dfecf	23	#include "sysdep.h"
252b5132 RH	24	#define h8_opcodes h8ops
252b5132 RH	25	#include "opcode/h8300.h"
88c1242d	26	#include "disassemble.h"
252b5132	27	#include "opintl.h"
a3e64b75 KD	28	#include "libiberty.h"
	29
	30	struct h8_instruction
	31	{
	32	int length;
	33	const struct h8_opcode *opcode;
	34	};
	35
	36	struct h8_instruction *h8_instructions;
252b5132	37
252b5132	38	/* Run through the opcodes and sort them into order to make them easy
3903e627	39	to disassemble. */
20dc5b5a	40
252b5132	41	static void
47b0e7ad	42	bfd_h8_disassemble_init (void)
252b5132 RH	43	{
252b5132 RH	44	unsigned int i;
a3e64b75 KD	45	unsigned int nopcodes;
	46	const struct h8_opcode *p;
	47	struct h8_instruction *pi;
252b5132	48
a3e64b75	49	nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);
b34976b6	50
47b0e7ad	51	h8_instructions = xmalloc (nopcodes * sizeof (struct h8_instruction));
a3e64b75 KD	52
a3e64b75 KD	53	for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++)
252b5132	54	{
252b5132	55	/* Just make sure there are an even number of nibbles in it, and
3903e627	56	that the count is the same as the length. */
20dc5b5a	57	for (i = 0; p->data.nib[i] != (op_type) E; i++)
53d388d1 JL	58	;
53d388d1 JL	59
252b5132	60	if (i & 1)
20dc5b5a MS	61	{
	62	fprintf (stderr, "Internal error, h8_disassemble_init.\n");
	63	abort ();
	64	}
53d388d1	65
a3e64b75 KD	66	pi->length = i / 2;
a3e64b75 KD	67	pi->opcode = p;
252b5132	68	}
a3e64b75 KD	69
	70	/* Add entry for the NULL vector terminator. */
	71	pi->length = 0;
	72	pi->opcode = p;
252b5132 RH	73	}
252b5132 RH	74
20dc5b5a	75	static void
47b0e7ad NC	76	extract_immediate (FILE *stream,
	77	op_type looking_for,
	78	int thisnib,
	79	unsigned char *data,
	80	int *cst,
	81	int *len,
	82	const struct h8_opcode *q)
20dc5b5a MS	83	{
	84	switch (looking_for & SIZE)
	85	{
	86	case L_2:
	87	*len = 2;
	88	*cst = thisnib & 3;
	89
	90	/* DISP2 special treatment. */
	91	if ((looking_for & MODE) == DISP)
	92	{
47b0e7ad NC	93	if (OP_KIND (q->how) == O_MOVAB
	94	\|\| OP_KIND (q->how) == O_MOVAW
	95	\|\| OP_KIND (q->how) == O_MOVAL)
20dc5b5a MS	96	{
20dc5b5a MS	97	/* Handling for mova insn. */
47b0e7ad NC	98	switch (q->args.nib[0] & MODE)
	99	{
	100	case INDEXB:
	101	default:
	102	break;
	103	case INDEXW:
	104	cst = 2;
	105	break;
	106	case INDEXL:
	107	cst = 4;
	108	break;
	109	}
20dc5b5a MS	110	}
	111	else
	112	{
	113	/* Handling for non-mova insn. */
47b0e7ad NC	114	switch (OP_SIZE (q->how))
	115	{
	116	default: break;
	117	case SW:
	118	cst = 2;
	119	break;
	120	case SL:
	121	cst = 4;
	122	break;
	123	}
20dc5b5a MS	124	}
	125	}
	126	break;
	127	case L_8:
	128	*len = 8;
	129	*cst = data[0];
	130	break;
	131	case L_16:
	132	case L_16U:
	133	*len = 16;
	134	*cst = (data[0] << 8) + data [1];
	135	#if 0
	136	if ((looking_for & SIZE) == L_16)
47b0e7ad	137	cst = (short) cst; /* Sign extend. */
20dc5b5a MS	138	#endif
	139	break;
	140	case L_32:
	141	*len = 32;
	142	*cst = (data[0] << 24) + (data[1] << 16) + (data[2] << 8) + data[3];
	143	break;
	144	default:
	145	*len = 0;
	146	*cst = 0;
	147	fprintf (stream, "DISP bad size\n");
	148	break;
	149	}
	150	}
	151
	152	static const char *regnames[] =
	153	{
	154	"r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
	155	"r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
	156	};
	157	static const char *wregnames[] =
	158	{
	159	"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
	160	"e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
	161	};
	162	static const char *lregnames[] =
	163	{
	164	"er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
	165	"er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
	166	};
	167	static const char *cregnames[] =
	168	{
	169	"ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
	170	};
	171
	172	static void
47b0e7ad NC	173	print_one_arg (disassemble_info *info,
	174	bfd_vma addr,
	175	op_type x,
	176	int cst,
	177	int cstlen,
	178	int rdisp_n,
	179	int rn,
	180	const char **pregnames,
	181	int len)
252b5132	182	{
47b0e7ad	183	void * stream = info->stream;
20dc5b5a MS	184	fprintf_ftype outfn = info->fprintf_func;
20dc5b5a MS	185
47b0e7ad NC	186	if ((x & SIZE) == L_3 \|\| (x & SIZE) == L_3NZ)
47b0e7ad NC	187	outfn (stream, "#0x%x", (unsigned) cst);
20dc5b5a	188	else if ((x & MODE) == IMM)
47b0e7ad NC	189	outfn (stream, "#0x%x", (unsigned) cst);
	190	else if ((x & MODE) == DBIT \|\| (x & MODE) == KBIT)
	191	outfn (stream, "#%d", (unsigned) cst);
20dc5b5a MS	192	else if ((x & MODE) == CONST_2)
	193	outfn (stream, "#2");
	194	else if ((x & MODE) == CONST_4)
	195	outfn (stream, "#4");
	196	else if ((x & MODE) == CONST_8)
	197	outfn (stream, "#8");
	198	else if ((x & MODE) == CONST_16)
	199	outfn (stream, "#16");
	200	else if ((x & MODE) == REG)
	201	{
	202	switch (x & SIZE)
	203	{
	204	case L_8:
	205	outfn (stream, "%s", regnames[rn]);
	206	break;
	207	case L_16:
	208	case L_16U:
	209	outfn (stream, "%s", wregnames[rn]);
	210	break;
	211	case L_P:
	212	case L_32:
	213	outfn (stream, "%s", lregnames[rn]);
	214	break;
	215	}
	216	}
	217	else if ((x & MODE) == LOWREG)
	218	{
	219	switch (x & SIZE)
	220	{
	221	case L_8:
	222	/* Always take low half of reg. */
	223	outfn (stream, "%s.b", regnames[rn < 8 ? rn + 8 : rn]);
	224	break;
	225	case L_16:
	226	case L_16U:
	227	/* Always take low half of reg. */
	228	outfn (stream, "%s.w", wregnames[rn < 8 ? rn : rn - 8]);
	229	break;
	230	case L_P:
	231	case L_32:
	232	outfn (stream, "%s.l", lregnames[rn]);
	233	break;
	234	}
	235	}
	236	else if ((x & MODE) == POSTINC)
47b0e7ad NC	237	outfn (stream, "@%s+", pregnames[rn]);
47b0e7ad NC	238
20dc5b5a	239	else if ((x & MODE) == POSTDEC)
47b0e7ad NC	240	outfn (stream, "@%s-", pregnames[rn]);
47b0e7ad NC	241
20dc5b5a	242	else if ((x & MODE) == PREINC)
47b0e7ad NC	243	outfn (stream, "@+%s", pregnames[rn]);
47b0e7ad NC	244
20dc5b5a	245	else if ((x & MODE) == PREDEC)
47b0e7ad NC	246	outfn (stream, "@-%s", pregnames[rn]);
47b0e7ad NC	247
20dc5b5a	248	else if ((x & MODE) == IND)
47b0e7ad NC	249	outfn (stream, "@%s", pregnames[rn]);
47b0e7ad NC	250
20dc5b5a	251	else if ((x & MODE) == ABS \|\| (x & ABSJMP))
47b0e7ad NC	252	outfn (stream, "@0x%x:%d", (unsigned) cst, cstlen);
47b0e7ad NC	253
20dc5b5a	254	else if ((x & MODE) == MEMIND)
47b0e7ad NC	255	outfn (stream, "@@%d (0x%x)", cst, cst);
47b0e7ad NC	256
20dc5b5a MS	257	else if ((x & MODE) == VECIND)
	258	{
	259	/* FIXME Multiplier should be 2 or 4, depending on processor mode,
	260	by which is meant "normal" vs. "middle", "advanced", "maximum". */
	261
	262	int offset = (cst + 0x80) * 4;
	263	outfn (stream, "@@%d (0x%x)", offset, offset);
	264	}
	265	else if ((x & MODE) == PCREL)
	266	{
	267	if ((x & SIZE) == L_16 \|\|
	268	(x & SIZE) == L_16U)
	269	{
0fd3a477	270	outfn (stream, ".%s%d (0x%lx)",
20dc5b5a	271	(short) cst > 0 ? "+" : "",
43e65147	272	(short) cst,
0fd3a477	273	(long)(addr + (short) cst + len));
20dc5b5a MS	274	}
	275	else
	276	{
0fd3a477	277	outfn (stream, ".%s%d (0x%lx)",
20dc5b5a	278	(char) cst > 0 ? "+" : "",
43e65147	279	(char) cst,
0fd3a477	280	(long)(addr + (char) cst + len));
20dc5b5a MS	281	}
	282	}
	283	else if ((x & MODE) == DISP)
47b0e7ad NC	284	outfn (stream, "@(0x%x:%d,%s)", cst, cstlen, pregnames[rdisp_n]);
47b0e7ad NC	285
20dc5b5a	286	else if ((x & MODE) == INDEXB)
47b0e7ad	287	/* Always take low half of reg. */
43e65147	288	outfn (stream, "@(0x%x:%d,%s.b)", cst, cstlen,
47b0e7ad NC	289	regnames[rdisp_n < 8 ? rdisp_n + 8 : rdisp_n]);
47b0e7ad NC	290
20dc5b5a	291	else if ((x & MODE) == INDEXW)
47b0e7ad	292	/* Always take low half of reg. */
43e65147	293	outfn (stream, "@(0x%x:%d,%s.w)", cst, cstlen,
47b0e7ad NC	294	wregnames[rdisp_n < 8 ? rdisp_n : rdisp_n - 8]);
47b0e7ad NC	295
20dc5b5a	296	else if ((x & MODE) == INDEXL)
47b0e7ad NC	297	outfn (stream, "@(0x%x:%d,%s.l)", cst, cstlen, lregnames[rdisp_n]);
47b0e7ad NC	298
20dc5b5a	299	else if (x & CTRL)
48891606	300	outfn (stream, "%s", cregnames[rn]);
47b0e7ad	301
20dc5b5a	302	else if ((x & MODE) == CCR)
47b0e7ad NC	303	outfn (stream, "ccr");
47b0e7ad NC	304
20dc5b5a	305	else if ((x & MODE) == EXR)
47b0e7ad NC	306	outfn (stream, "exr");
47b0e7ad NC	307
20dc5b5a	308	else if ((x & MODE) == MACREG)
47b0e7ad NC	309	outfn (stream, "mac%c", cst ? 'l' : 'h');
47b0e7ad NC	310
20dc5b5a MS	311	else
	312	/* xgettext:c-format */
	313	outfn (stream, _("Hmmmm 0x%x"), x);
	314	}
	315
	316	static unsigned int
47b0e7ad	317	bfd_h8_disassemble (bfd_vma addr, disassemble_info *info, int mach)
20dc5b5a MS	318	{
	319	/* Find the first entry in the table for this opcode. */
	320	int regno[3] = { 0, 0, 0 };
	321	int dispregno[3] = { 0, 0, 0 };
	322	int cst[3] = { 0, 0, 0 };
	323	int cstlen[3] = { 0, 0, 0 };
b34976b6	324	static bfd_boolean init = 0;
a3e64b75	325	const struct h8_instruction *qi;
20dc5b5a	326	char const **pregnames = mach != 0 ? lregnames : wregnames;
252b5132	327	int status;
20dc5b5a MS	328	unsigned int l;
20dc5b5a MS	329	unsigned char data[MAX_CODE_NIBBLES];
252b5132	330	void *stream = info->stream;
20dc5b5a	331	fprintf_ftype outfn = info->fprintf_func;
252b5132 RH	332
	333	if (!init)
	334	{
	335	bfd_h8_disassemble_init ();
	336	init = 1;
	337	}
	338
3903e627	339	status = info->read_memory_func (addr, data, 2, info);
5fec0fc5	340	if (status != 0)
252b5132	341	{
3903e627	342	info->memory_error_func (status, addr, info);
252b5132 RH	343	return -1;
252b5132 RH	344	}
53d388d1	345
20dc5b5a	346	for (l = 2; status == 0 && l < sizeof (data) / 2; l += 2)
53d388d1	347	status = info->read_memory_func (addr + l, data + l, 2, info);
252b5132	348
3903e627	349	/* Find the exact opcode/arg combo. */
a3e64b75	350	for (qi = h8_instructions; qi->opcode->name; qi++)
252b5132	351	{
a3e64b75	352	const struct h8_opcode *q = qi->opcode;
a3202ebb	353	const op_type *nib = q->data.nib;
252b5132 RH	354	unsigned int len = 0;
252b5132 RH	355
252b5132 RH	356	while (1)
	357	{
	358	op_type looking_for = *nib;
20dc5b5a MS	359	int thisnib = data[len / 2];
20dc5b5a MS	360	int opnr;
53d388d1	361
20dc5b5a MS	362	thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib / 16) & 0xf);
	363	opnr = ((looking_for & OP3) == OP3 ? 2
	364	: (looking_for & DST) == DST ? 1 : 0);
53d388d1	365
5fec0fc5	366	if (looking_for < 16 && looking_for >= 0)
252b5132	367	{
5fec0fc5	368	if (looking_for != thisnib)
252b5132 RH	369	goto fail;
252b5132 RH	370	}
5fec0fc5	371	else
252b5132	372	{
252b5132 RH	373	if ((int) looking_for & (int) B31)
252b5132 RH	374	{
20dc5b5a	375	if (!((thisnib & 0x8) != 0))
252b5132	376	goto fail;
53d388d1	377
252b5132	378	looking_for = (op_type) ((int) looking_for & ~(int) B31);
20dc5b5a	379	thisnib &= 0x7;
252b5132	380	}
20dc5b5a	381	else if ((int) looking_for & (int) B30)
252b5132	382	{
20dc5b5a	383	if (!((thisnib & 0x8) == 0))
252b5132	384	goto fail;
53d388d1	385
252b5132 RH	386	looking_for = (op_type) ((int) looking_for & ~(int) B30);
	387	}
	388
20dc5b5a MS	389	if ((int) looking_for & (int) B21)
	390	{
	391	if (!((thisnib & 0x4) != 0))
	392	goto fail;
	393
	394	looking_for = (op_type) ((int) looking_for & ~(int) B21);
	395	thisnib &= 0xb;
	396	}
	397	else if ((int) looking_for & (int) B20)
	398	{
	399	if (!((thisnib & 0x4) == 0))
	400	goto fail;
	401
	402	looking_for = (op_type) ((int) looking_for & ~(int) B20);
	403	}
	404	if ((int) looking_for & (int) B11)
	405	{
	406	if (!((thisnib & 0x2) != 0))
	407	goto fail;
	408
	409	looking_for = (op_type) ((int) looking_for & ~(int) B11);
	410	thisnib &= 0xd;
	411	}
	412	else if ((int) looking_for & (int) B10)
	413	{
	414	if (!((thisnib & 0x2) == 0))
	415	goto fail;
	416
	417	looking_for = (op_type) ((int) looking_for & ~(int) B10);
	418	}
	419
	420	if ((int) looking_for & (int) B01)
	421	{
	422	if (!((thisnib & 0x1) != 0))
	423	goto fail;
	424
	425	looking_for = (op_type) ((int) looking_for & ~(int) B01);
	426	thisnib &= 0xe;
	427	}
	428	else if ((int) looking_for & (int) B00)
	429	{
	430	if (!((thisnib & 0x1) == 0))
	431	goto fail;
	432
	433	looking_for = (op_type) ((int) looking_for & ~(int) B00);
	434	}
	435
	436	if (looking_for & IGNORE)
	437	{
	438	/* Hitachi has declared that IGNORE must be zero. */
	439	if (thisnib != 0)
	440	goto fail;
	441	}
	442	else if ((looking_for & MODE) == DATA)
	443	{
	444	; /* Skip embedded data. */
	445	}
	446	else if ((looking_for & MODE) == DBIT)
252b5132	447	{
53d388d1 JL	448	/* Exclude adds/subs by looking at bit 0 and 2, and
	449	make sure the operand size, either w or l,
	450	matches by looking at bit 1. */
	451	if ((looking_for & 7) != (thisnib & 7))
3903e627	452	goto fail;
53d388d1	453
20dc5b5a	454	cst[opnr] = (thisnib & 0x8) ? 2 : 1;
5fec0fc5	455	}
47b0e7ad NC	456	else if ((looking_for & MODE) == DISP
	457	\|\| (looking_for & MODE) == ABS
	458	\|\| (looking_for & MODE) == PCREL
	459	\|\| (looking_for & MODE) == INDEXB
	460	\|\| (looking_for & MODE) == INDEXW
	461	\|\| (looking_for & MODE) == INDEXL)
252b5132	462	{
43e65147 L	463	extract_immediate (stream, looking_for, thisnib,
43e65147 L	464	data + len / 2, cst + opnr,
20dc5b5a MS	465	cstlen + opnr, q);
	466	/* Even address == bra, odd == bra/s. */
	467	if (q->how == O (O_BRAS, SB))
	468	cst[opnr] -= 1;
252b5132	469	}
47b0e7ad NC	470	else if ((looking_for & MODE) == REG
	471	\|\| (looking_for & MODE) == LOWREG
	472	\|\| (looking_for & MODE) == IND
	473	\|\| (looking_for & MODE) == PREINC
	474	\|\| (looking_for & MODE) == POSTINC
	475	\|\| (looking_for & MODE) == PREDEC
	476	\|\| (looking_for & MODE) == POSTDEC)
252b5132	477	{
20dc5b5a	478	regno[opnr] = thisnib;
252b5132	479	}
47b0e7ad	480	else if (looking_for & CTRL) /* Control Register. */
252b5132	481	{
20dc5b5a	482	thisnib &= 7;
47b0e7ad NC	483	if (((looking_for & MODE) == CCR && (thisnib != C_CCR))
	484	\|\| ((looking_for & MODE) == EXR && (thisnib != C_EXR))
	485	\|\| ((looking_for & MODE) == MACH && (thisnib != C_MACH))
	486	\|\| ((looking_for & MODE) == MACL && (thisnib != C_MACL))
	487	\|\| ((looking_for & MODE) == VBR && (thisnib != C_VBR))
	488	\|\| ((looking_for & MODE) == SBR && (thisnib != C_SBR)))
20dc5b5a	489	goto fail;
47b0e7ad NC	490	if (((looking_for & MODE) == CCR_EXR
	491	&& (thisnib != C_CCR && thisnib != C_EXR))
	492	\|\| ((looking_for & MODE) == VBR_SBR
	493	&& (thisnib != C_VBR && thisnib != C_SBR))
	494	\|\| ((looking_for & MODE) == MACREG
	495	&& (thisnib != C_MACH && thisnib != C_MACL)))
20dc5b5a	496	goto fail;
47b0e7ad NC	497	if (((looking_for & MODE) == CC_EX_VB_SB
	498	&& (thisnib != C_CCR && thisnib != C_EXR
	499	&& thisnib != C_VBR && thisnib != C_SBR)))
20dc5b5a MS	500	goto fail;
	501
	502	regno[opnr] = thisnib;
	503	}
	504	else if ((looking_for & SIZE) == L_5)
	505	{
	506	cst[opnr] = data[len / 2] & 31;
	507	cstlen[opnr] = 5;
	508	}
	509	else if ((looking_for & SIZE) == L_4)
	510	{
	511	cst[opnr] = thisnib;
	512	cstlen[opnr] = 4;
	513	}
47b0e7ad NC	514	else if ((looking_for & SIZE) == L_16
47b0e7ad NC	515	\|\| (looking_for & SIZE) == L_16U)
20dc5b5a MS	516	{
	517	cst[opnr] = (data[len / 2]) * 256 + data[(len + 2) / 2];
	518	cstlen[opnr] = 16;
	519	}
	520	else if ((looking_for & MODE) == MEMIND)
	521	{
	522	cst[opnr] = data[1];
252b5132	523	}
20dc5b5a	524	else if ((looking_for & MODE) == VECIND)
252b5132	525	{
20dc5b5a	526	cst[opnr] = data[1] & 0x7f;
252b5132	527	}
20dc5b5a	528	else if ((looking_for & SIZE) == L_32)
252b5132	529	{
20dc5b5a	530	int i = len / 2;
53d388d1	531
43e65147 L	532	cst[opnr] = ((data[i] << 24)
43e65147 L	533	\| (data[i + 1] << 16)
20dc5b5a MS	534	\| (data[i + 2] << 8)
20dc5b5a MS	535	\| (data[i + 3]));
252b5132	536
20dc5b5a	537	cstlen[opnr] = 32;
252b5132	538	}
20dc5b5a	539	else if ((looking_for & SIZE) == L_24)
252b5132	540	{
20dc5b5a	541	int i = len / 2;
53d388d1	542
43e65147	543	cst[opnr] =
20dc5b5a MS	544	(data[i] << 16) \| (data[i + 1] << 8) \| (data[i + 2]);
20dc5b5a MS	545	cstlen[opnr] = 24;
252b5132	546	}
252b5132 RH	547	else if (looking_for & DISPREG)
252b5132 RH	548	{
20dc5b5a	549	dispregno[opnr] = thisnib & 7;
252b5132	550	}
20dc5b5a	551	else if ((looking_for & MODE) == KBIT)
252b5132	552	{
5fec0fc5	553	switch (thisnib)
252b5132 RH	554	{
252b5132 RH	555	case 9:
20dc5b5a	556	cst[opnr] = 4;
252b5132 RH	557	break;
252b5132 RH	558	case 8:
20dc5b5a	559	cst[opnr] = 2;
252b5132 RH	560	break;
252b5132 RH	561	case 0:
20dc5b5a	562	cst[opnr] = 1;
252b5132 RH	563	break;
	564	default:
	565	goto fail;
	566	}
	567	}
20dc5b5a	568	else if ((looking_for & SIZE) == L_8)
252b5132	569	{
20dc5b5a MS	570	cstlen[opnr] = 8;
20dc5b5a MS	571	cst[opnr] = data[len / 2];
252b5132	572	}
47b0e7ad NC	573	else if ((looking_for & SIZE) == L_3
47b0e7ad NC	574	\|\| (looking_for & SIZE) == L_3NZ)
252b5132	575	{
20dc5b5a MS	576	cst[opnr] = thisnib & 0x7;
	577	if (cst[opnr] == 0 && (looking_for & SIZE) == L_3NZ)
	578	goto fail;
252b5132	579	}
20dc5b5a	580	else if ((looking_for & SIZE) == L_2)
252b5132	581	{
20dc5b5a MS	582	cstlen[opnr] = 2;
20dc5b5a MS	583	cst[opnr] = thisnib & 0x3;
252b5132	584	}
20dc5b5a	585	else if ((looking_for & MODE) == MACREG)
252b5132	586	{
20dc5b5a	587	cst[opnr] = (thisnib == 3);
252b5132	588	}
20dc5b5a	589	else if (looking_for == (op_type) E)
252b5132	590	{
20dc5b5a	591	outfn (stream, "%s\t", q->name);
252b5132 RH	592
	593	/* Gross. Disgusting. */
	594	if (strcmp (q->name, "ldm.l") == 0)
	595	{
	596	int count, high;
	597
20dc5b5a MS	598	count = (data[1] / 16) & 0x3;
20dc5b5a MS	599	high = regno[1];
252b5132	600
20dc5b5a	601	outfn (stream, "@sp+,er%d-er%d", high - count, high);
a3e64b75	602	return qi->length;
252b5132 RH	603	}
	604
	605	if (strcmp (q->name, "stm.l") == 0)
	606	{
	607	int count, low;
	608
20dc5b5a MS	609	count = (data[1] / 16) & 0x3;
20dc5b5a MS	610	low = regno[0];
252b5132	611
20dc5b5a MS	612	outfn (stream, "er%d-er%d,@-sp", low, low + count);
	613	return qi->length;
	614	}
	615	if (strcmp (q->name, "rte/l") == 0
	616	\|\| strcmp (q->name, "rts/l") == 0)
	617	{
	618	if (regno[0] == 0)
	619	outfn (stream, "er%d", regno[1]);
	620	else
47b0e7ad NC	621	outfn (stream, "er%d-er%d", regno[1] - regno[0],
47b0e7ad NC	622	regno[1]);
20dc5b5a MS	623	return qi->length;
20dc5b5a MS	624	}
0112cd26	625	if (CONST_STRNEQ (q->name, "mova"))
20dc5b5a	626	{
a3202ebb	627	const op_type *args = q->args.nib;
20dc5b5a MS	628
	629	if (args[1] == (op_type) E)
	630	{
	631	/* Short form. */
43e65147 L	632	print_one_arg (info, addr, args[0], cst[0],
43e65147 L	633	cstlen[0], dispregno[0], regno[0],
20dc5b5a MS	634	pregnames, qi->length);
	635	outfn (stream, ",er%d", dispregno[0]);
	636	}
	637	else
	638	{
	639	outfn (stream, "@(0x%x:%d,", cst[0], cstlen[0]);
43e65147 L	640	print_one_arg (info, addr, args[1], cst[1],
43e65147 L	641	cstlen[1], dispregno[1], regno[1],
20dc5b5a MS	642	pregnames, qi->length);
	643	outfn (stream, ".%c),",
	644	(args[0] & MODE) == INDEXB ? 'b' : 'w');
43e65147 L	645	print_one_arg (info, addr, args[2], cst[2],
43e65147 L	646	cstlen[2], dispregno[2], regno[2],
20dc5b5a MS	647	pregnames, qi->length);
20dc5b5a MS	648	}
a3e64b75	649	return qi->length;
252b5132	650	}
3903e627	651	/* Fill in the args. */
252b5132	652	{
a3202ebb	653	const op_type *args = q->args.nib;
252b5132	654	int hadone = 0;
20dc5b5a	655	int nargs;
252b5132	656
91809fda	657	/* Special case handling for the adds and subs instructions
47b0e7ad NC	658	since in H8 mode thay can only take the r0-r7 registers
	659	but in other (higher) modes they can take the er0-er7
	660	registers as well. */
91809fda NC	661	if (strcmp (qi->opcode->name, "adds") == 0
	662	\|\| strcmp (qi->opcode->name, "subs") == 0)
	663	{
	664	outfn (stream, "#%d,%s", cst[0], pregnames[regno[1] & 0x7]);
	665	return qi->length;
	666	}
	667
43e65147	668	for (nargs = 0;
47b0e7ad	669	nargs < 3 && args[nargs] != (op_type) E;
20dc5b5a	670	nargs++)
252b5132	671	{
20dc5b5a	672	int x = args[nargs];
53d388d1	673
252b5132	674	if (hadone)
20dc5b5a MS	675	outfn (stream, ",");
	676
	677	print_one_arg (info, addr, x,
	678	cst[nargs], cstlen[nargs],
	679	dispregno[nargs], regno[nargs],
	680	pregnames, qi->length);
53d388d1	681
252b5132	682	hadone = 1;
252b5132 RH	683	}
252b5132 RH	684	}
53d388d1	685
a3e64b75	686	return qi->length;
252b5132	687	}
252b5132	688	else
5fec0fc5	689	/* xgettext:c-format */
20dc5b5a	690	outfn (stream, _("Don't understand 0x%x \n"), looking_for);
252b5132	691	}
53d388d1	692
252b5132 RH	693	len++;
	694	nib++;
	695	}
53d388d1	696
252b5132	697	fail:
c07ab2ec	698	;
252b5132 RH	699	}
252b5132 RH	700
5fec0fc5	701	/* Fell off the end. */
ed049af3	702	outfn (stream, ".word\tH'%x,H'%x", data[0], data[1]);
252b5132 RH	703	return 2;
	704	}
	705
5fec0fc5	706	int
47b0e7ad	707	print_insn_h8300 (bfd_vma addr, disassemble_info *info)
252b5132	708	{
5fec0fc5	709	return bfd_h8_disassemble (addr, info, 0);
252b5132 RH	710	}
252b5132 RH	711
5fec0fc5	712	int
47b0e7ad	713	print_insn_h8300h (bfd_vma addr, disassemble_info *info)
252b5132	714	{
5fec0fc5	715	return bfd_h8_disassemble (addr, info, 1);
252b5132 RH	716	}
252b5132 RH	717
5fec0fc5	718	int
47b0e7ad	719	print_insn_h8300s (bfd_vma addr, disassemble_info *info)
252b5132	720	{
5fec0fc5	721	return bfd_h8_disassemble (addr, info, 2);
252b5132	722	}