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252b5132 RH |
1 | /* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c. |
2 | Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc. | |
3 | ||
4 | Contributed by the Center for Software Science at the | |
5 | University of Utah (pa-gdb-bugs@cs.utah.edu). | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #include <ansidecl.h> | |
22 | #include "sysdep.h" | |
23 | #include "dis-asm.h" | |
24 | #include "libhppa.h" | |
25 | #include "opcode/hppa.h" | |
26 | ||
27 | /* Integer register names, indexed by the numbers which appear in the | |
28 | opcodes. */ | |
29 | static const char *const reg_names[] = | |
30 | {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9", | |
31 | "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", | |
32 | "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1", | |
33 | "sp", "r31"}; | |
34 | ||
35 | /* Floating point register names, indexed by the numbers which appear in the | |
36 | opcodes. */ | |
37 | static const char *const fp_reg_names[] = | |
38 | {"fpsr", "fpe2", "fpe4", "fpe6", | |
39 | "fr4", "fr5", "fr6", "fr7", "fr8", | |
40 | "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", | |
41 | "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", | |
42 | "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"}; | |
43 | ||
44 | typedef unsigned int CORE_ADDR; | |
45 | ||
46 | /* Get at various relevent fields of an instruction word. */ | |
47 | ||
48 | #define MASK_5 0x1f | |
49 | #define MASK_11 0x7ff | |
50 | #define MASK_14 0x3fff | |
51 | #define MASK_21 0x1fffff | |
52 | ||
53 | /* This macro gets bit fields using HP's numbering (MSB = 0) */ | |
54 | ||
55 | #define GET_FIELD(X, FROM, TO) \ | |
56 | ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1)) | |
57 | ||
58 | /* Some of these have been converted to 2-d arrays because they | |
59 | consume less storage this way. If the maintenance becomes a | |
60 | problem, convert them back to const 1-d pointer arrays. */ | |
61 | static const char control_reg[][6] = { | |
62 | "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", | |
63 | "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4", | |
64 | "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr", | |
65 | "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3", | |
66 | "tr4", "tr5", "tr6", "tr7" | |
67 | }; | |
68 | ||
69 | static const char compare_cond_names[][5] = { | |
70 | "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", | |
71 | ",od", ",tr", ",<>", ",>=", ",>", ",>>=", | |
72 | ",>>", ",nsv", ",ev" | |
73 | }; | |
74 | static const char add_cond_names[][5] = { | |
75 | "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", | |
76 | ",od", ",tr", ",<>", ",>=", ",>", ",uv", | |
77 | ",vnz", ",nsv", ",ev" | |
78 | }; | |
79 | static const char *const logical_cond_names[] = { | |
80 | "", ",=", ",<", ",<=", 0, 0, 0, ",od", | |
81 | ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"}; | |
82 | static const char *const unit_cond_names[] = { | |
83 | "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc", | |
84 | ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc" | |
85 | }; | |
86 | static const char shift_cond_names[][4] = { | |
87 | "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev" | |
88 | }; | |
89 | static const char index_compl_names[][4] = {"", ",m", ",s", ",sm"}; | |
90 | static const char short_ldst_compl_names[][4] = {"", ",ma", "", ",mb"}; | |
91 | static const char *const short_bytes_compl_names[] = { | |
92 | "", ",b,m", ",e", ",e,m" | |
93 | }; | |
94 | static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"}; | |
95 | static const char float_comp_names[][8] = | |
96 | { | |
97 | ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>", | |
98 | ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>", | |
99 | ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<", | |
100 | ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true" | |
101 | }; | |
102 | ||
103 | /* For a bunch of different instructions form an index into a | |
104 | completer name table. */ | |
105 | #define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \ | |
106 | GET_FIELD (insn, 18, 18) << 1) | |
107 | ||
108 | #define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \ | |
109 | (GET_FIELD ((insn), 19, 19) ? 8 : 0)) | |
110 | ||
111 | /* Utility function to print registers. Put these first, so gcc's function | |
112 | inlining can do its stuff. */ | |
113 | ||
114 | #define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR) | |
115 | ||
116 | static void | |
117 | fput_reg (reg, info) | |
118 | unsigned reg; | |
119 | disassemble_info *info; | |
120 | { | |
121 | (*info->fprintf_func) (info->stream, reg ? reg_names[reg] : "r0"); | |
122 | } | |
123 | ||
124 | static void | |
125 | fput_fp_reg (reg, info) | |
126 | unsigned reg; | |
127 | disassemble_info *info; | |
128 | { | |
129 | (*info->fprintf_func) (info->stream, reg ? fp_reg_names[reg] : "fr0"); | |
130 | } | |
131 | ||
132 | static void | |
133 | fput_fp_reg_r (reg, info) | |
134 | unsigned reg; | |
135 | disassemble_info *info; | |
136 | { | |
137 | /* Special case floating point exception registers. */ | |
138 | if (reg < 4) | |
139 | (*info->fprintf_func) (info->stream, "fpe%d", reg * 2 + 1); | |
140 | else | |
141 | (*info->fprintf_func) (info->stream, "%sR", reg ? fp_reg_names[reg] | |
142 | : "fr0"); | |
143 | } | |
144 | ||
145 | static void | |
146 | fput_creg (reg, info) | |
147 | unsigned reg; | |
148 | disassemble_info *info; | |
149 | { | |
150 | (*info->fprintf_func) (info->stream, control_reg[reg]); | |
151 | } | |
152 | ||
153 | /* print constants with sign */ | |
154 | ||
155 | static void | |
156 | fput_const (num, info) | |
157 | unsigned num; | |
158 | disassemble_info *info; | |
159 | { | |
160 | if ((int)num < 0) | |
161 | (*info->fprintf_func) (info->stream, "-%x", -(int)num); | |
162 | else | |
163 | (*info->fprintf_func) (info->stream, "%x", num); | |
164 | } | |
165 | ||
166 | /* Routines to extract various sized constants out of hppa | |
167 | instructions. */ | |
168 | ||
169 | /* extract a 3-bit space register number from a be, ble, mtsp or mfsp */ | |
170 | static int | |
171 | extract_3 (word) | |
172 | unsigned word; | |
173 | { | |
174 | return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17); | |
175 | } | |
176 | ||
177 | static int | |
178 | extract_5_load (word) | |
179 | unsigned word; | |
180 | { | |
181 | return low_sign_extend (word >> 16 & MASK_5, 5); | |
182 | } | |
183 | ||
184 | /* extract the immediate field from a st{bhw}s instruction */ | |
185 | static int | |
186 | extract_5_store (word) | |
187 | unsigned word; | |
188 | { | |
189 | return low_sign_extend (word & MASK_5, 5); | |
190 | } | |
191 | ||
192 | /* extract the immediate field from a break instruction */ | |
193 | static unsigned | |
194 | extract_5r_store (word) | |
195 | unsigned word; | |
196 | { | |
197 | return (word & MASK_5); | |
198 | } | |
199 | ||
200 | /* extract the immediate field from a {sr}sm instruction */ | |
201 | static unsigned | |
202 | extract_5R_store (word) | |
203 | unsigned word; | |
204 | { | |
205 | return (word >> 16 & MASK_5); | |
206 | } | |
207 | ||
208 | /* extract the immediate field from a bb instruction */ | |
209 | static unsigned | |
210 | extract_5Q_store (word) | |
211 | unsigned word; | |
212 | { | |
213 | return (word >> 21 & MASK_5); | |
214 | } | |
215 | ||
216 | /* extract an 11 bit immediate field */ | |
217 | static int | |
218 | extract_11 (word) | |
219 | unsigned word; | |
220 | { | |
221 | return low_sign_extend (word & MASK_11, 11); | |
222 | } | |
223 | ||
224 | /* extract a 14 bit immediate field */ | |
225 | static int | |
226 | extract_14 (word) | |
227 | unsigned word; | |
228 | { | |
229 | return low_sign_extend (word & MASK_14, 14); | |
230 | } | |
231 | ||
232 | /* extract a 21 bit constant */ | |
233 | ||
234 | static int | |
235 | extract_21 (word) | |
236 | unsigned word; | |
237 | { | |
238 | int val; | |
239 | ||
240 | word &= MASK_21; | |
241 | word <<= 11; | |
242 | val = GET_FIELD (word, 20, 20); | |
243 | val <<= 11; | |
244 | val |= GET_FIELD (word, 9, 19); | |
245 | val <<= 2; | |
246 | val |= GET_FIELD (word, 5, 6); | |
247 | val <<= 5; | |
248 | val |= GET_FIELD (word, 0, 4); | |
249 | val <<= 2; | |
250 | val |= GET_FIELD (word, 7, 8); | |
251 | return sign_extend (val, 21) << 11; | |
252 | } | |
253 | ||
254 | /* extract a 12 bit constant from branch instructions */ | |
255 | ||
256 | static int | |
257 | extract_12 (word) | |
258 | unsigned word; | |
259 | { | |
260 | return sign_extend (GET_FIELD (word, 19, 28) | | |
261 | GET_FIELD (word, 29, 29) << 10 | | |
262 | (word & 0x1) << 11, 12) << 2; | |
263 | } | |
264 | ||
265 | /* extract a 17 bit constant from branch instructions, returning the | |
266 | 19 bit signed value. */ | |
267 | ||
268 | static int | |
269 | extract_17 (word) | |
270 | unsigned word; | |
271 | { | |
272 | return sign_extend (GET_FIELD (word, 19, 28) | | |
273 | GET_FIELD (word, 29, 29) << 10 | | |
274 | GET_FIELD (word, 11, 15) << 11 | | |
275 | (word & 0x1) << 16, 17) << 2; | |
276 | } | |
277 | ||
278 | /* Print one instruction. */ | |
279 | int | |
280 | print_insn_hppa (memaddr, info) | |
281 | bfd_vma memaddr; | |
282 | disassemble_info *info; | |
283 | { | |
284 | bfd_byte buffer[4]; | |
285 | unsigned int insn, i; | |
286 | ||
287 | { | |
288 | int status = | |
289 | (*info->read_memory_func) (memaddr, buffer, sizeof (buffer), info); | |
290 | if (status != 0) | |
291 | { | |
292 | (*info->memory_error_func) (status, memaddr, info); | |
293 | return -1; | |
294 | } | |
295 | } | |
296 | ||
297 | insn = bfd_getb32 (buffer); | |
298 | ||
299 | for (i = 0; i < NUMOPCODES; ++i) | |
300 | { | |
301 | const struct pa_opcode *opcode = &pa_opcodes[i]; | |
302 | if ((insn & opcode->mask) == opcode->match) | |
303 | { | |
304 | register const char *s; | |
305 | ||
306 | (*info->fprintf_func) (info->stream, "%s", opcode->name); | |
307 | ||
308 | if (!strchr ("cfCY<?!@-+&U>~nHNZFIMadu|", opcode->args[0])) | |
309 | (*info->fprintf_func) (info->stream, " "); | |
310 | for (s = opcode->args; *s != '\0'; ++s) | |
311 | { | |
312 | switch (*s) | |
313 | { | |
314 | case 'x': | |
315 | fput_reg (GET_FIELD (insn, 11, 15), info); | |
316 | break; | |
317 | case 'X': | |
318 | if (GET_FIELD (insn, 25, 25)) | |
319 | fput_fp_reg_r (GET_FIELD (insn, 11, 15), info); | |
320 | else | |
321 | fput_fp_reg (GET_FIELD (insn, 11, 15), info); | |
322 | break; | |
323 | case 'b': | |
324 | fput_reg (GET_FIELD (insn, 6, 10), info); | |
325 | break; | |
326 | case '^': | |
327 | fput_creg (GET_FIELD (insn, 6, 10), info); | |
328 | break; | |
329 | case 'E': | |
330 | if (GET_FIELD (insn, 25, 25)) | |
331 | fput_fp_reg_r (GET_FIELD (insn, 6, 10), info); | |
332 | else | |
333 | fput_fp_reg (GET_FIELD (insn, 6, 10), info); | |
334 | break; | |
335 | case 't': | |
336 | fput_reg (GET_FIELD (insn, 27, 31), info); | |
337 | break; | |
338 | case 'v': | |
339 | if (GET_FIELD (insn, 25, 25)) | |
340 | fput_fp_reg_r (GET_FIELD (insn, 27, 31), info); | |
341 | else | |
342 | fput_fp_reg (GET_FIELD (insn, 27, 31), info); | |
343 | break; | |
344 | case 'y': | |
345 | fput_fp_reg (GET_FIELD (insn, 27, 31), info); | |
346 | break; | |
347 | case '4': | |
348 | { | |
349 | int reg = GET_FIELD (insn, 6, 10); | |
350 | ||
351 | reg |= (GET_FIELD (insn, 26, 26) << 4); | |
352 | fput_fp_reg (reg, info); | |
353 | break; | |
354 | } | |
355 | case '6': | |
356 | { | |
357 | int reg = GET_FIELD (insn, 11, 15); | |
358 | ||
359 | reg |= (GET_FIELD (insn, 26, 26) << 4); | |
360 | fput_fp_reg (reg, info); | |
361 | break; | |
362 | } | |
363 | case '7': | |
364 | { | |
365 | int reg = GET_FIELD (insn, 27, 31); | |
366 | ||
367 | reg |= (GET_FIELD (insn, 26, 26) << 4); | |
368 | fput_fp_reg (reg, info); | |
369 | break; | |
370 | } | |
371 | case '8': | |
372 | { | |
373 | int reg = GET_FIELD (insn, 16, 20); | |
374 | ||
375 | reg |= (GET_FIELD (insn, 26, 26) << 4); | |
376 | fput_fp_reg (reg, info); | |
377 | break; | |
378 | } | |
379 | case '9': | |
380 | { | |
381 | int reg = GET_FIELD (insn, 21, 25); | |
382 | ||
383 | reg |= (GET_FIELD (insn, 26, 26) << 4); | |
384 | fput_fp_reg (reg, info); | |
385 | break; | |
386 | } | |
387 | case '5': | |
388 | fput_const (extract_5_load (insn), info); | |
389 | break; | |
390 | case 's': | |
391 | (*info->fprintf_func) (info->stream, | |
392 | "sr%d", GET_FIELD (insn, 16, 17)); | |
393 | break; | |
394 | case 'S': | |
395 | (*info->fprintf_func) (info->stream, "sr%d", extract_3 (insn)); | |
396 | break; | |
397 | case 'c': | |
398 | (*info->fprintf_func) (info->stream, "%s ", | |
399 | index_compl_names[GET_COMPL (insn)]); | |
400 | break; | |
401 | case 'C': | |
402 | (*info->fprintf_func) (info->stream, "%s ", | |
403 | short_ldst_compl_names[GET_COMPL (insn)]); | |
404 | break; | |
405 | case 'Y': | |
406 | (*info->fprintf_func) (info->stream, "%s ", | |
407 | short_bytes_compl_names[GET_COMPL (insn)]); | |
408 | break; | |
409 | /* these four conditions are for the set of instructions | |
410 | which distinguish true/false conditions by opcode rather | |
411 | than by the 'f' bit (sigh): comb, comib, addb, addib */ | |
412 | case '<': | |
413 | fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)], | |
414 | info); | |
415 | break; | |
416 | case '?': | |
417 | fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18) | |
418 | + GET_FIELD (insn, 4, 4) * 8], info); | |
419 | break; | |
420 | case '@': | |
421 | fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18) | |
422 | + GET_FIELD (insn, 4, 4) * 8], info); | |
423 | break; | |
424 | case 'a': | |
425 | (*info->fprintf_func) (info->stream, "%s ", | |
426 | compare_cond_names[GET_COND (insn)]); | |
427 | break; | |
428 | case 'd': | |
429 | (*info->fprintf_func) (info->stream, "%s ", | |
430 | add_cond_names[GET_COND (insn)]); | |
431 | break; | |
432 | case '!': | |
433 | (*info->fprintf_func) (info->stream, "%s", | |
434 | add_cond_names[GET_FIELD (insn, 16, 18)]); | |
435 | break; | |
436 | ||
437 | case '&': | |
438 | (*info->fprintf_func) (info->stream, "%s ", | |
439 | logical_cond_names[GET_COND (insn)]); | |
440 | break; | |
441 | case 'U': | |
442 | (*info->fprintf_func) (info->stream, "%s ", | |
443 | unit_cond_names[GET_COND (insn)]); | |
444 | break; | |
445 | case '|': | |
446 | case '>': | |
447 | case '~': | |
448 | (*info->fprintf_func) | |
449 | (info->stream, "%s", | |
450 | shift_cond_names[GET_FIELD (insn, 16, 18)]); | |
451 | ||
452 | /* If the next character in args is 'n', it will handle | |
453 | putting out the space. */ | |
454 | if (s[1] != 'n') | |
455 | (*info->fprintf_func) (info->stream, " "); | |
456 | break; | |
457 | case 'V': | |
458 | fput_const (extract_5_store (insn), info); | |
459 | break; | |
460 | case 'r': | |
461 | fput_const (extract_5r_store (insn), info); | |
462 | break; | |
463 | case 'R': | |
464 | fput_const (extract_5R_store (insn), info); | |
465 | break; | |
466 | case 'Q': | |
467 | fput_const (extract_5Q_store (insn), info); | |
468 | break; | |
469 | case 'i': | |
470 | fput_const (extract_11 (insn), info); | |
471 | break; | |
472 | case 'j': | |
473 | fput_const (extract_14 (insn), info); | |
474 | break; | |
475 | case 'k': | |
476 | fput_const (extract_21 (insn), info); | |
477 | break; | |
478 | case 'n': | |
479 | if (insn & 0x2) | |
480 | (*info->fprintf_func) (info->stream, ",n "); | |
481 | else | |
482 | (*info->fprintf_func) (info->stream, " "); | |
483 | break; | |
484 | case 'N': | |
485 | if ((insn & 0x20) && s[1]) | |
486 | (*info->fprintf_func) (info->stream, ",n "); | |
487 | else if (insn & 0x20) | |
488 | (*info->fprintf_func) (info->stream, ",n"); | |
489 | else if (s[1]) | |
490 | (*info->fprintf_func) (info->stream, " "); | |
491 | break; | |
492 | case 'w': | |
493 | (*info->print_address_func) (memaddr + 8 + extract_12 (insn), | |
494 | info); | |
495 | break; | |
496 | case 'W': | |
497 | /* 17 bit PC-relative branch. */ | |
498 | (*info->print_address_func) ((memaddr + 8 | |
499 | + extract_17 (insn)), | |
500 | info); | |
501 | break; | |
502 | case 'z': | |
503 | /* 17 bit displacement. This is an offset from a register | |
504 | so it gets disasssembled as just a number, not any sort | |
505 | of address. */ | |
506 | fput_const (extract_17 (insn), info); | |
507 | break; | |
508 | case 'p': | |
509 | (*info->fprintf_func) (info->stream, "%d", | |
510 | 31 - GET_FIELD (insn, 22, 26)); | |
511 | break; | |
512 | case 'P': | |
513 | (*info->fprintf_func) (info->stream, "%d", | |
514 | GET_FIELD (insn, 22, 26)); | |
515 | break; | |
516 | case 'T': | |
517 | (*info->fprintf_func) (info->stream, "%d", | |
518 | 32 - GET_FIELD (insn, 27, 31)); | |
519 | break; | |
520 | case 'A': | |
521 | fput_const (GET_FIELD (insn, 6, 18), info); | |
522 | break; | |
523 | case 'Z': | |
524 | if (GET_FIELD (insn, 26, 26)) | |
525 | (*info->fprintf_func) (info->stream, ",m "); | |
526 | else | |
527 | (*info->fprintf_func) (info->stream, " "); | |
528 | break; | |
529 | case 'D': | |
530 | fput_const (GET_FIELD (insn, 6, 31), info); | |
531 | break; | |
532 | case 'f': | |
533 | (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25)); | |
534 | break; | |
535 | case 'O': | |
536 | fput_const ((GET_FIELD (insn, 6,20) << 5 | | |
537 | GET_FIELD (insn, 27, 31)), info); | |
538 | break; | |
539 | case 'o': | |
540 | fput_const (GET_FIELD (insn, 6, 20), info); | |
541 | break; | |
542 | case '3': | |
543 | { | |
544 | int reg = GET_FIELD (insn, 21, 22); | |
545 | reg |= GET_FIELD (insn, 16, 18) << 2; | |
546 | if (GET_FIELD (insn, 23, 23) != 0) | |
547 | fput_fp_reg_r (reg, info); | |
548 | else | |
549 | fput_fp_reg (reg, info); | |
550 | break; | |
551 | } | |
552 | ||
553 | case '2': | |
554 | fput_const ((GET_FIELD (insn, 6, 22) << 5 | | |
555 | GET_FIELD (insn, 27, 31)), info); | |
556 | break; | |
557 | case '1': | |
558 | fput_const ((GET_FIELD (insn, 11, 20) << 5 | | |
559 | GET_FIELD (insn, 27, 31)), info); | |
560 | break; | |
561 | case '0': | |
562 | fput_const ((GET_FIELD (insn, 16, 20) << 5 | | |
563 | GET_FIELD (insn, 27, 31)), info); | |
564 | break; | |
565 | case 'u': | |
566 | (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25)); | |
567 | break; | |
568 | case 'F': | |
569 | /* if no destination completer and not before a completer | |
570 | for fcmp, need a space here */ | |
571 | if (GET_FIELD (insn, 21, 22) == 1 || s[1] == 'M') | |
572 | fputs_filtered (float_format_names[GET_FIELD (insn, 19, 20)], | |
573 | info); | |
574 | else | |
575 | (*info->fprintf_func) (info->stream, "%s ", | |
576 | float_format_names[GET_FIELD | |
577 | (insn, 19, 20)]); | |
578 | break; | |
579 | case 'G': | |
580 | (*info->fprintf_func) (info->stream, "%s ", | |
581 | float_format_names[GET_FIELD (insn, | |
582 | 17, 18)]); | |
583 | break; | |
584 | case 'H': | |
585 | if (GET_FIELD (insn, 26, 26) == 1) | |
586 | (*info->fprintf_func) (info->stream, "%s ", | |
587 | float_format_names[0]); | |
588 | else | |
589 | (*info->fprintf_func) (info->stream, "%s ", | |
590 | float_format_names[1]); | |
591 | break; | |
592 | case 'I': | |
593 | /* if no destination completer and not before a completer | |
594 | for fcmp, need a space here */ | |
595 | if (GET_FIELD (insn, 21, 22) == 1 || s[1] == 'M') | |
596 | fputs_filtered (float_format_names[GET_FIELD (insn, 20, 20)], | |
597 | info); | |
598 | else | |
599 | (*info->fprintf_func) (info->stream, "%s ", | |
600 | float_format_names[GET_FIELD | |
601 | (insn, 20, 20)]); | |
602 | break; | |
603 | case 'J': | |
604 | if (GET_FIELD (insn, 24, 24)) | |
605 | fput_fp_reg_r (GET_FIELD (insn, 6, 10), info); | |
606 | else | |
607 | fput_fp_reg (GET_FIELD (insn, 6, 10), info); | |
608 | ||
609 | break; | |
610 | case 'K': | |
611 | if (GET_FIELD (insn, 19, 19)) | |
612 | fput_fp_reg_r (GET_FIELD (insn, 11, 15), info); | |
613 | else | |
614 | fput_fp_reg (GET_FIELD (insn, 11, 15), info); | |
615 | break; | |
616 | case 'M': | |
617 | (*info->fprintf_func) (info->stream, "%s ", | |
618 | float_comp_names[GET_FIELD | |
619 | (insn, 27, 31)]); | |
620 | break; | |
621 | default: | |
622 | (*info->fprintf_func) (info->stream, "%c", *s); | |
623 | break; | |
624 | } | |
625 | } | |
626 | return sizeof(insn); | |
627 | } | |
628 | } | |
629 | (*info->fprintf_func) (info->stream, "#%8x", insn); | |
630 | return sizeof(insn); | |
631 | } |