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fix typo.
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
CommitLineData
252b5132 1/* Print i386 instructions for GDB, the GNU debugger.
060d22b0
NC		 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001
252b5132
RH		 4 Free Software Foundation, Inc.
5
6This file is part of GDB.
7
8This program is free software; you can redistribute it and/or modify
9it under the terms of the GNU General Public License as published by
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
12
13This program is distributed in the hope that it will be useful,
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
19along with this program; if not, write to the Free Software
20Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21
22/*
23 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 * July 1988
25 * modified by John Hassey (hassey@dg-rtp.dg.com)
52b15da3 26 * x86-64 support added by Jan Hubicka (jh@suse.cz)
252b5132
RH		 27 */
28
29/*
30 * The main tables describing the instructions is essentially a copy
31 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
32 * Programmers Manual. Usually, there is a capital letter, followed
33 * by a small letter. The capital letter tell the addressing mode,
34 * and the small letter tells about the operand size. Refer to
35 * the Intel manual for details.
36 */
37
38#include "dis-asm.h"
39#include "sysdep.h"
40#include "opintl.h"
41
42#define MAXLEN 20
43
44#include <setjmp.h>
45
46#ifndef UNIXWARE_COMPAT
47/* Set non-zero for broken, compatible instructions. Set to zero for
48 non-broken opcodes. */
49#define UNIXWARE_COMPAT 1
50#endif
51
252b5132
RH		 52static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *));
53
54struct dis_private
55{
56 /* Points to first byte not fetched. */
57 bfd_byte *max_fetched;
58 bfd_byte the_buffer[MAXLEN];
59 bfd_vma insn_start;
60 jmp_buf bailout;
61};
62
5076851f
ILT		 63/* The opcode for the fwait instruction, which we treat as a prefix
64 when we can. */
65#define FWAIT_OPCODE (0x9b)
66
52b15da3
JH		 67/* Set to 1 for 64bit mode disassembly. */
68static int mode_64bit;
69
5076851f
ILT		 70/* Flags for the prefixes for the current instruction. See below. */
71static int prefixes;
72
52b15da3
JH		 73/* REX prefix the current instruction. See below. */
74static int rex;
75/* Bits of REX we've already used. */
76static int rex_used;
77#define REX_MODE64 8
78#define REX_EXTX 4
79#define REX_EXTY 2
80#define REX_EXTZ 1
81/* Mark parts used in the REX prefix. When we are testing for
82 empty prefix (for 8bit register REX extension), just mask it
83 out. Otherwise test for REX bit is excuse for existence of REX
84 only in case value is nonzero. */
85#define USED_REX(value) \
86 { \
87 if (value) \
88 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
89 else \
90 rex_used |= 0x40; \
91 }
92
7d421014
ILT		 93/* Flags for prefixes which we somehow handled when printing the
94 current instruction. */
95static int used_prefixes;
96
5076851f
ILT		 97/* Flags stored in PREFIXES. */
98#define PREFIX_REPZ 1
99#define PREFIX_REPNZ 2
100#define PREFIX_LOCK 4
101#define PREFIX_CS 8
102#define PREFIX_SS 0x10
103#define PREFIX_DS 0x20
104#define PREFIX_ES 0x40
105#define PREFIX_FS 0x80
106#define PREFIX_GS 0x100
107#define PREFIX_DATA 0x200
108#define PREFIX_ADDR 0x400
109#define PREFIX_FWAIT 0x800
110
252b5132
RH		 111/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
112 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
113 on error. */
114#define FETCH_DATA(info, addr) \
115 ((addr) <= ((struct dis_private *)(info->private_data))->max_fetched \
116 ? 1 : fetch_data ((info), (addr)))
117
118static int
119fetch_data (info, addr)
120 struct disassemble_info *info;
121 bfd_byte *addr;
122{
123 int status;
124 struct dis_private *priv = (struct dis_private *)info->private_data;
125 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
126
127 status = (*info->read_memory_func) (start,
128 priv->max_fetched,
129 addr - priv->max_fetched,
130 info);
131 if (status != 0)
132 {
7d421014
ILT		 133 /* If we did manage to read at least one byte, then
134 print_insn_i386 will do something sensible. Otherwise, print
135 an error. We do that here because this is where we know
136 STATUS. */
137 if (priv->max_fetched == priv->the_buffer)
5076851f 138 (*info->memory_error_func) (status, start, info);
252b5132
RH		 139 longjmp (priv->bailout, 1);
140 }
141 else
142 priv->max_fetched = addr;
143 return 1;
144}
145
57d91c3c
ILT		 146#define XX NULL, 0
147
252b5132 148#define Eb OP_E, b_mode
52b15da3
JH		 149#define Ev OP_E, v_mode
150#define Ed OP_E, d_mode
252b5132 151#define indirEb OP_indirE, b_mode
252b5132
RH		 152#define indirEv OP_indirE, v_mode
153#define Ew OP_E, w_mode
154#define Ma OP_E, v_mode
2da11e11
AM		 155#define M OP_E, 0 /* lea */
156#define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
992aaec9 157#define Gb OP_G, b_mode
252b5132 158#define Gv OP_G, v_mode
992aaec9 159#define Gd OP_G, d_mode
252b5132 160#define Gw OP_G, w_mode
2da11e11 161#define Rd OP_Rd, d_mode
52b15da3 162#define Rm OP_Rd, m_mode
252b5132
RH		 163#define Ib OP_I, b_mode
164#define sIb OP_sI, b_mode /* sign extened byte */
165#define Iv OP_I, v_mode
52b15da3
JH		 166#define Iq OP_I, q_mode
167#define Iv64 OP_I64, v_mode
252b5132
RH		 168#define Iw OP_I, w_mode
169#define Jb OP_J, b_mode
170#define Jv OP_J, v_mode
52b15da3
JH		 171#define Cm OP_C, m_mode
172#define Dm OP_D, m_mode
252b5132
RH		 173#define Td OP_T, d_mode
174
52b15da3
JH		 175#define RMeAX OP_REG, eAX_reg
176#define RMeBX OP_REG, eBX_reg
177#define RMeCX OP_REG, eCX_reg
178#define RMeDX OP_REG, eDX_reg
179#define RMeSP OP_REG, eSP_reg
180#define RMeBP OP_REG, eBP_reg
181#define RMeSI OP_REG, eSI_reg
182#define RMeDI OP_REG, eDI_reg
183#define RMrAX OP_REG, rAX_reg
184#define RMrBX OP_REG, rBX_reg
185#define RMrCX OP_REG, rCX_reg
186#define RMrDX OP_REG, rDX_reg
187#define RMrSP OP_REG, rSP_reg
188#define RMrBP OP_REG, rBP_reg
189#define RMrSI OP_REG, rSI_reg
190#define RMrDI OP_REG, rDI_reg
191#define RMAL OP_REG, al_reg
192#define RMAL OP_REG, al_reg
193#define RMCL OP_REG, cl_reg
194#define RMDL OP_REG, dl_reg
195#define RMBL OP_REG, bl_reg
196#define RMAH OP_REG, ah_reg
197#define RMCH OP_REG, ch_reg
198#define RMDH OP_REG, dh_reg
199#define RMBH OP_REG, bh_reg
200#define RMAX OP_REG, ax_reg
201#define RMDX OP_REG, dx_reg
202
203#define eAX OP_IMREG, eAX_reg
204#define eBX OP_IMREG, eBX_reg
205#define eCX OP_IMREG, eCX_reg
206#define eDX OP_IMREG, eDX_reg
207#define eSP OP_IMREG, eSP_reg
208#define eBP OP_IMREG, eBP_reg
209#define eSI OP_IMREG, eSI_reg
210#define eDI OP_IMREG, eDI_reg
211#define AL OP_IMREG, al_reg
212#define AL OP_IMREG, al_reg
213#define CL OP_IMREG, cl_reg
214#define DL OP_IMREG, dl_reg
215#define BL OP_IMREG, bl_reg
216#define AH OP_IMREG, ah_reg
217#define CH OP_IMREG, ch_reg
218#define DH OP_IMREG, dh_reg
219#define BH OP_IMREG, bh_reg
220#define AX OP_IMREG, ax_reg
221#define DX OP_IMREG, dx_reg
222#define indirDX OP_IMREG, indir_dx_reg
252b5132
RH		 223
224#define Sw OP_SEG, w_mode
c608c12e 225#define Ap OP_DIR, 0
252b5132 226#define Ob OP_OFF, b_mode
52b15da3 227#define Ob64 OP_OFF64, b_mode
252b5132 228#define Ov OP_OFF, v_mode
52b15da3 229#define Ov64 OP_OFF64, v_mode
252b5132
RH		 230#define Xb OP_DSreg, eSI_reg
231#define Xv OP_DSreg, eSI_reg
232#define Yb OP_ESreg, eDI_reg
233#define Yv OP_ESreg, eDI_reg
234#define DSBX OP_DSreg, eBX_reg
235
236#define es OP_REG, es_reg
237#define ss OP_REG, ss_reg
238#define cs OP_REG, cs_reg
239#define ds OP_REG, ds_reg
240#define fs OP_REG, fs_reg
241#define gs OP_REG, gs_reg
242
243#define MX OP_MMX, 0
c608c12e 244#define XM OP_XMM, 0
252b5132 245#define EM OP_EM, v_mode
c608c12e 246#define EX OP_EX, v_mode
2da11e11 247#define MS OP_MS, v_mode
992aaec9 248#define XS OP_XS, v_mode
c608c12e 249#define None OP_E, 0
252b5132 250#define OPSUF OP_3DNowSuffix, 0
c608c12e 251#define OPSIMD OP_SIMD_Suffix, 0
252b5132 252
3ffd33cf
AM		 253#define cond_jump_flag NULL, cond_jump_mode
254#define loop_jcxz_flag NULL, loop_jcxz_mode
255
252b5132
RH		 256/* bits in sizeflag */
257#if 0 /* leave undefined until someone adds the extra flag to objdump */
258#define SUFFIX_ALWAYS 4
259#endif
260#define AFLAG 2
261#define DFLAG 1
262
2da11e11 263typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag));
252b5132
RH		 264
265static void OP_E PARAMS ((int, int));
266static void OP_G PARAMS ((int, int));
267static void OP_I PARAMS ((int, int));
52b15da3
JH		 268static void OP_I64 PARAMS ((int, int));
269static void OP_OFF PARAMS ((int, int));
270static void OP_REG PARAMS ((int, int));
271static void OP_IMREG PARAMS ((int, int));
272static void OP_OFF64 PARAMS ((int, int));
252b5132
RH		 273static void OP_indirE PARAMS ((int, int));
274static void OP_sI PARAMS ((int, int));
275static void OP_REG PARAMS ((int, int));
276static void OP_J PARAMS ((int, int));
277static void OP_DIR PARAMS ((int, int));
278static void OP_OFF PARAMS ((int, int));
279static void OP_ESreg PARAMS ((int, int));
280static void OP_DSreg PARAMS ((int, int));
281static void OP_SEG PARAMS ((int, int));
282static void OP_C PARAMS ((int, int));
283static void OP_D PARAMS ((int, int));
284static void OP_T PARAMS ((int, int));
2da11e11 285static void OP_Rd PARAMS ((int, int));
252b5132
RH		 286static void OP_ST PARAMS ((int, int));
287static void OP_STi PARAMS ((int, int));
252b5132 288static void OP_MMX PARAMS ((int, int));
c608c12e 289static void OP_XMM PARAMS ((int, int));
252b5132 290static void OP_EM PARAMS ((int, int));
c608c12e 291static void OP_EX PARAMS ((int, int));
252b5132 292static void OP_MS PARAMS ((int, int));
992aaec9 293static void OP_XS PARAMS ((int, int));
252b5132 294static void OP_3DNowSuffix PARAMS ((int, int));
c608c12e
AM		 295static void OP_SIMD_Suffix PARAMS ((int, int));
296static void SIMD_Fixup PARAMS ((int, int));
252b5132
RH		 297
298static void append_seg PARAMS ((void));
52b15da3 299static void set_op PARAMS ((unsigned int op, int));
2da11e11 300static void putop PARAMS ((const char *template, int sizeflag));
252b5132
RH		 301static void dofloat PARAMS ((int sizeflag));
302static int get16 PARAMS ((void));
52b15da3
JH		 303static bfd_vma get64 PARAMS ((void));
304static bfd_signed_vma get32 PARAMS ((void));
305static bfd_signed_vma get32s PARAMS ((void));
252b5132 306static void ckprefix PARAMS ((void));
7d421014 307static const char *prefix_name PARAMS ((int, int));
252b5132 308static void ptr_reg PARAMS ((int, int));
2da11e11 309static void BadOp PARAMS ((void));
252b5132 310
52b15da3
JH		 311#define b_mode 1 /* byte operand */
312#define v_mode 2 /* operand size depends on prefixes */
313#define w_mode 3 /* word operand */
314#define d_mode 4 /* double word operand */
315#define q_mode 5 /* quad word operand */
316#define x_mode 6
317#define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
3ffd33cf
AM		 318#define cond_jump_mode 8
319#define loop_jcxz_mode 9
252b5132
RH		 320
321#define es_reg 100
322#define cs_reg 101
323#define ss_reg 102
324#define ds_reg 103
325#define fs_reg 104
326#define gs_reg 105
252b5132 327
c608c12e
AM		 328#define eAX_reg 108
329#define eCX_reg 109
330#define eDX_reg 110
331#define eBX_reg 111
332#define eSP_reg 112
333#define eBP_reg 113
334#define eSI_reg 114
335#define eDI_reg 115
252b5132
RH		 336
337#define al_reg 116
338#define cl_reg 117
339#define dl_reg 118
340#define bl_reg 119
341#define ah_reg 120
342#define ch_reg 121
343#define dh_reg 122
344#define bh_reg 123
345
346#define ax_reg 124
347#define cx_reg 125
348#define dx_reg 126
349#define bx_reg 127
350#define sp_reg 128
351#define bp_reg 129
352#define si_reg 130
353#define di_reg 131
354
52b15da3
JH		 355#define rAX_reg 132
356#define rCX_reg 133
357#define rDX_reg 134
358#define rBX_reg 135
359#define rSP_reg 136
360#define rBP_reg 137
361#define rSI_reg 138
362#define rDI_reg 139
363
252b5132
RH		 364#define indir_dx_reg 150
365
c608c12e
AM		 366#define USE_GROUPS 1
367#define USE_PREFIX_USER_TABLE 2
368
57d91c3c
ILT		 369#define GRP1b NULL, NULL, 0, NULL, USE_GROUPS, NULL, 0
370#define GRP1S NULL, NULL, 1, NULL, USE_GROUPS, NULL, 0
371#define GRP1Ss NULL, NULL, 2, NULL, USE_GROUPS, NULL, 0
372#define GRP2b NULL, NULL, 3, NULL, USE_GROUPS, NULL, 0
373#define GRP2S NULL, NULL, 4, NULL, USE_GROUPS, NULL, 0
374#define GRP2b_one NULL, NULL, 5, NULL, USE_GROUPS, NULL, 0
375#define GRP2S_one NULL, NULL, 6, NULL, USE_GROUPS, NULL, 0
376#define GRP2b_cl NULL, NULL, 7, NULL, USE_GROUPS, NULL, 0
377#define GRP2S_cl NULL, NULL, 8, NULL, USE_GROUPS, NULL, 0
378#define GRP3b NULL, NULL, 9, NULL, USE_GROUPS, NULL, 0
379#define GRP3S NULL, NULL, 10, NULL, USE_GROUPS, NULL, 0
380#define GRP4 NULL, NULL, 11, NULL, USE_GROUPS, NULL, 0
381#define GRP5 NULL, NULL, 12, NULL, USE_GROUPS, NULL, 0
382#define GRP6 NULL, NULL, 13, NULL, USE_GROUPS, NULL, 0
383#define GRP7 NULL, NULL, 14, NULL, USE_GROUPS, NULL, 0
384#define GRP8 NULL, NULL, 15, NULL, USE_GROUPS, NULL, 0
385#define GRP9 NULL, NULL, 16, NULL, USE_GROUPS, NULL, 0
386#define GRP10 NULL, NULL, 17, NULL, USE_GROUPS, NULL, 0
387#define GRP11 NULL, NULL, 18, NULL, USE_GROUPS, NULL, 0
388#define GRP12 NULL, NULL, 19, NULL, USE_GROUPS, NULL, 0
389#define GRP13 NULL, NULL, 20, NULL, USE_GROUPS, NULL, 0
390#define GRP14 NULL, NULL, 21, NULL, USE_GROUPS, NULL, 0
391#define GRPAMD NULL, NULL, 22, NULL, USE_GROUPS, NULL, 0
392
393#define PREGRP0 NULL, NULL, 0, NULL, USE_PREFIX_USER_TABLE, NULL, 0
394#define PREGRP1 NULL, NULL, 1, NULL, USE_PREFIX_USER_TABLE, NULL, 0
395#define PREGRP2 NULL, NULL, 2, NULL, USE_PREFIX_USER_TABLE, NULL, 0
396#define PREGRP3 NULL, NULL, 3, NULL, USE_PREFIX_USER_TABLE, NULL, 0
397#define PREGRP4 NULL, NULL, 4, NULL, USE_PREFIX_USER_TABLE, NULL, 0
398#define PREGRP5 NULL, NULL, 5, NULL, USE_PREFIX_USER_TABLE, NULL, 0
399#define PREGRP6 NULL, NULL, 6, NULL, USE_PREFIX_USER_TABLE, NULL, 0
400#define PREGRP7 NULL, NULL, 7, NULL, USE_PREFIX_USER_TABLE, NULL, 0
401#define PREGRP8 NULL, NULL, 8, NULL, USE_PREFIX_USER_TABLE, NULL, 0
402#define PREGRP9 NULL, NULL, 9, NULL, USE_PREFIX_USER_TABLE, NULL, 0
403#define PREGRP10 NULL, NULL, 10, NULL, USE_PREFIX_USER_TABLE, NULL, 0
404#define PREGRP11 NULL, NULL, 11, NULL, USE_PREFIX_USER_TABLE, NULL, 0
405#define PREGRP12 NULL, NULL, 12, NULL, USE_PREFIX_USER_TABLE, NULL, 0
406#define PREGRP13 NULL, NULL, 13, NULL, USE_PREFIX_USER_TABLE, NULL, 0
407#define PREGRP14 NULL, NULL, 14, NULL, USE_PREFIX_USER_TABLE, NULL, 0
041bd2e0
JH		 408#define PREGRP15 NULL, NULL, 15, NULL, USE_PREFIX_USER_TABLE, NULL, 0
409#define PREGRP16 NULL, NULL, 16, NULL, USE_PREFIX_USER_TABLE, NULL, 0
410#define PREGRP17 NULL, NULL, 17, NULL, USE_PREFIX_USER_TABLE, NULL, 0
411#define PREGRP18 NULL, NULL, 18, NULL, USE_PREFIX_USER_TABLE, NULL, 0
412#define PREGRP19 NULL, NULL, 19, NULL, USE_PREFIX_USER_TABLE, NULL, 0
413#define PREGRP20 NULL, NULL, 20, NULL, USE_PREFIX_USER_TABLE, NULL, 0
414#define PREGRP21 NULL, NULL, 21, NULL, USE_PREFIX_USER_TABLE, NULL, 0
415#define PREGRP22 NULL, NULL, 22, NULL, USE_PREFIX_USER_TABLE, NULL, 0
416#define PREGRP23 NULL, NULL, 23, NULL, USE_PREFIX_USER_TABLE, NULL, 0
417#define PREGRP24 NULL, NULL, 24, NULL, USE_PREFIX_USER_TABLE, NULL, 0
0f17484f
AM		 418#define PREGRP25 NULL, NULL, 25, NULL, USE_PREFIX_USER_TABLE, NULL, 0
419#define PREGRP26 NULL, NULL, 26, NULL, USE_PREFIX_USER_TABLE, NULL, 0
252b5132
RH		 420
421#define FLOATCODE 50
57d91c3c 422#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
252b5132
RH		 423
424struct dis386 {
2da11e11 425 const char *name;
252b5132
RH		 426 op_rtn op1;
427 int bytemode1;
428 op_rtn op2;
429 int bytemode2;
430 op_rtn op3;
431 int bytemode3;
432};
433
434/* Upper case letters in the instruction names here are macros.
435 'A' => print 'b' if no register operands or suffix_always is true
436 'B' => print 'b' if suffix_always is true
437 'E' => print 'e' if 32-bit form of jcxz
3ffd33cf 438 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
252b5132
RH		 439 'L' => print 'l' if suffix_always is true
440 'N' => print 'n' if instruction has no wait "prefix"
52b15da3
JH		 441 'O' => print 'd', or 'o'
442 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
252b5132 443 or suffix_always is true
52b15da3
JH		 444 print 'q' if rex prefix is present.
445 'I' => print 'q' in 64bit mode and behave as 'P' otherwise
446 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always is true
447 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
448 'S' => print 'w', 'l' or 'q' if suffix_always is true
90530880 449 'T' => print 'q' in 64bit mode and behave as 'I' otherwise
041bd2e0 450 'X' => print 's', 'd' depending on data16 prefix (for XMM)
10084519 451 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
76f227a5 452 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
252b5132
RH		 453*/
454
2da11e11 455static const struct dis386 dis386_att[] = {
252b5132 456 /* 00 */
57d91c3c
ILT		 457 { "addB", Eb, Gb, XX },
458 { "addS", Ev, Gv, XX },
459 { "addB", Gb, Eb, XX },
460 { "addS", Gv, Ev, XX },
461 { "addB", AL, Ib, XX },
462 { "addS", eAX, Iv, XX },
52b15da3
JH		 463 { "pushI", es, XX, XX },
464 { "popI", es, XX, XX },
252b5132 465 /* 08 */
57d91c3c
ILT		 466 { "orB", Eb, Gb, XX },
467 { "orS", Ev, Gv, XX },
468 { "orB", Gb, Eb, XX },
469 { "orS", Gv, Ev, XX },
470 { "orB", AL, Ib, XX },
471 { "orS", eAX, Iv, XX },
52b15da3 472 { "pushI", cs, XX, XX },
57d91c3c 473 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
252b5132 474 /* 10 */
57d91c3c
ILT		 475 { "adcB", Eb, Gb, XX },
476 { "adcS", Ev, Gv, XX },
477 { "adcB", Gb, Eb, XX },
478 { "adcS", Gv, Ev, XX },
479 { "adcB", AL, Ib, XX },
480 { "adcS", eAX, Iv, XX },
52b15da3
JH		 481 { "pushI", ss, XX, XX },
482 { "popI", ss, XX, XX },
252b5132 483 /* 18 */
57d91c3c
ILT		 484 { "sbbB", Eb, Gb, XX },
485 { "sbbS", Ev, Gv, XX },
486 { "sbbB", Gb, Eb, XX },
487 { "sbbS", Gv, Ev, XX },
488 { "sbbB", AL, Ib, XX },
489 { "sbbS", eAX, Iv, XX },
52b15da3
JH		 490 { "pushI", ds, XX, XX },
491 { "popI", ds, XX, XX },
252b5132 492 /* 20 */
57d91c3c
ILT		 493 { "andB", Eb, Gb, XX },
494 { "andS", Ev, Gv, XX },
495 { "andB", Gb, Eb, XX },
496 { "andS", Gv, Ev, XX },
497 { "andB", AL, Ib, XX },
498 { "andS", eAX, Iv, XX },
499 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
500 { "daa", XX, XX, XX },
252b5132 501 /* 28 */
57d91c3c
ILT		 502 { "subB", Eb, Gb, XX },
503 { "subS", Ev, Gv, XX },
504 { "subB", Gb, Eb, XX },
505 { "subS", Gv, Ev, XX },
506 { "subB", AL, Ib, XX },
507 { "subS", eAX, Iv, XX },
508 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
509 { "das", XX, XX, XX },
252b5132 510 /* 30 */
57d91c3c
ILT		 511 { "xorB", Eb, Gb, XX },
512 { "xorS", Ev, Gv, XX },
513 { "xorB", Gb, Eb, XX },
514 { "xorS", Gv, Ev, XX },
515 { "xorB", AL, Ib, XX },
516 { "xorS", eAX, Iv, XX },
517 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
518 { "aaa", XX, XX, XX },
252b5132 519 /* 38 */
57d91c3c
ILT		 520 { "cmpB", Eb, Gb, XX },
521 { "cmpS", Ev, Gv, XX },
522 { "cmpB", Gb, Eb, XX },
523 { "cmpS", Gv, Ev, XX },
524 { "cmpB", AL, Ib, XX },
525 { "cmpS", eAX, Iv, XX },
526 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
527 { "aas", XX, XX, XX },
252b5132 528 /* 40 */
52b15da3
JH		 529 { "incS", RMeAX, XX, XX },
530 { "incS", RMeCX, XX, XX },
531 { "incS", RMeDX, XX, XX },
532 { "incS", RMeBX, XX, XX },
533 { "incS", RMeSP, XX, XX },
534 { "incS", RMeBP, XX, XX },
535 { "incS", RMeSI, XX, XX },
536 { "incS", RMeDI, XX, XX },
252b5132 537 /* 48 */
52b15da3
JH		 538 { "decS", RMeAX, XX, XX },
539 { "decS", RMeCX, XX, XX },
540 { "decS", RMeDX, XX, XX },
541 { "decS", RMeBX, XX, XX },
542 { "decS", RMeSP, XX, XX },
543 { "decS", RMeBP, XX, XX },
544 { "decS", RMeSI, XX, XX },
545 { "decS", RMeDI, XX, XX },
252b5132 546 /* 50 */
52b15da3
JH		 547 { "pushS", RMeAX, XX, XX },
548 { "pushS", RMeCX, XX, XX },
549 { "pushS", RMeDX, XX, XX },
550 { "pushS", RMeBX, XX, XX },
551 { "pushS", RMeSP, XX, XX },
552 { "pushS", RMeBP, XX, XX },
553 { "pushS", RMeSI, XX, XX },
554 { "pushS", RMeDI, XX, XX },
252b5132 555 /* 58 */
52b15da3
JH		 556 { "popS", RMeAX, XX, XX },
557 { "popS", RMeCX, XX, XX },
558 { "popS", RMeDX, XX, XX },
559 { "popS", RMeBX, XX, XX },
560 { "popS", RMeSP, XX, XX },
561 { "popS", RMeBP, XX, XX },
562 { "popS", RMeSI, XX, XX },
563 { "popS", RMeDI, XX, XX },
252b5132 564 /* 60 */
57d91c3c
ILT		 565 { "pushaP", XX, XX, XX },
566 { "popaP", XX, XX, XX },
567 { "boundS", Gv, Ma, XX },
568 { "arpl", Ew, Gw, XX },
569 { "(bad)", XX, XX, XX }, /* seg fs */
570 { "(bad)", XX, XX, XX }, /* seg gs */
571 { "(bad)", XX, XX, XX }, /* op size prefix */
572 { "(bad)", XX, XX, XX }, /* adr size prefix */
252b5132 573 /* 68 */
52b15da3 574 { "pushI", Iv, XX, XX }, /* 386 book wrong */
252b5132 575 { "imulS", Gv, Ev, Iv },
52b15da3 576 { "pushI", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
252b5132 577 { "imulS", Gv, Ev, sIb },
57d91c3c
ILT		 578 { "insb", Yb, indirDX, XX },
579 { "insR", Yv, indirDX, XX },
580 { "outsb", indirDX, Xb, XX },
581 { "outsR", indirDX, Xv, XX },
252b5132 582 /* 70 */
3ffd33cf
AM		 583 { "jo", Jb, cond_jump_flag, XX },
584 { "jno", Jb, cond_jump_flag, XX },
585 { "jb", Jb, cond_jump_flag, XX },
586 { "jae", Jb, cond_jump_flag, XX },
587 { "je", Jb, cond_jump_flag, XX },
588 { "jne", Jb, cond_jump_flag, XX },
589 { "jbe", Jb, cond_jump_flag, XX },
590 { "ja", Jb, cond_jump_flag, XX },
252b5132 591 /* 78 */
3ffd33cf
AM		 592 { "js", Jb, cond_jump_flag, XX },
593 { "jns", Jb, cond_jump_flag, XX },
594 { "jp", Jb, cond_jump_flag, XX },
595 { "jnp", Jb, cond_jump_flag, XX },
596 { "jl", Jb, cond_jump_flag, XX },
597 { "jge", Jb, cond_jump_flag, XX },
598 { "jle", Jb, cond_jump_flag, XX },
599 { "jg", Jb, cond_jump_flag, XX },
252b5132
RH		 600 /* 80 */
601 { GRP1b },
602 { GRP1S },
57d91c3c 603 { "(bad)", XX, XX, XX },
252b5132 604 { GRP1Ss },
57d91c3c
ILT		 605 { "testB", Eb, Gb, XX },
606 { "testS", Ev, Gv, XX },
607 { "xchgB", Eb, Gb, XX },
608 { "xchgS", Ev, Gv, XX },
252b5132 609 /* 88 */
57d91c3c
ILT		 610 { "movB", Eb, Gb, XX },
611 { "movS", Ev, Gv, XX },
612 { "movB", Gb, Eb, XX },
613 { "movS", Gv, Ev, XX },
614 { "movQ", Ev, Sw, XX },
615 { "leaS", Gv, M, XX },
616 { "movQ", Sw, Ev, XX },
90530880 617 { "popT", Ev, XX, XX },
252b5132 618 /* 90 */
57d91c3c 619 { "nop", XX, XX, XX },
041bd2e0 620 /* FIXME: NOP with REPz prefix is called PAUSE. */
52b15da3
JH		 621 { "xchgS", RMeCX, eAX, XX },
622 { "xchgS", RMeDX, eAX, XX },
623 { "xchgS", RMeBX, eAX, XX },
624 { "xchgS", RMeSP, eAX, XX },
625 { "xchgS", RMeBP, eAX, XX },
626 { "xchgS", RMeSI, eAX, XX },
627 { "xchgS", RMeDI, eAX, XX },
252b5132 628 /* 98 */
57d91c3c 629 { "cWtR", XX, XX, XX },
52b15da3
JH		 630 { "cRtO", XX, XX, XX },
631 { "lcallI", Ap, XX, XX },
57d91c3c 632 { "(bad)", XX, XX, XX }, /* fwait */
52b15da3
JH		 633 { "pushfI", XX, XX, XX },
634 { "popfI", XX, XX, XX },
57d91c3c
ILT		 635 { "sahf", XX, XX, XX },
636 { "lahf", XX, XX, XX },
252b5132 637 /* a0 */
57d91c3c
ILT		 638 { "movB", AL, Ob, XX },
639 { "movS", eAX, Ov, XX },
640 { "movB", Ob, AL, XX },
641 { "movS", Ov, eAX, XX },
642 { "movsb", Yb, Xb, XX },
643 { "movsR", Yv, Xv, XX },
644 { "cmpsb", Xb, Yb, XX },
645 { "cmpsR", Xv, Yv, XX },
252b5132 646 /* a8 */
57d91c3c
ILT		 647 { "testB", AL, Ib, XX },
648 { "testS", eAX, Iv, XX },
649 { "stosB", Yb, AL, XX },
650 { "stosS", Yv, eAX, XX },
651 { "lodsB", AL, Xb, XX },
652 { "lodsS", eAX, Xv, XX },
653 { "scasB", AL, Yb, XX },
654 { "scasS", eAX, Yv, XX },
252b5132 655 /* b0 */
52b15da3
JH		 656 { "movB", RMAL, Ib, XX },
657 { "movB", RMCL, Ib, XX },
658 { "movB", RMDL, Ib, XX },
659 { "movB", RMBL, Ib, XX },
660 { "movB", RMAH, Ib, XX },
661 { "movB", RMCH, Ib, XX },
662 { "movB", RMDH, Ib, XX },
663 { "movB", RMBH, Ib, XX },
252b5132 664 /* b8 */
52b15da3
JH		 665 { "movS", RMeAX, Iv, XX },
666 { "movS", RMeCX, Iv, XX },
667 { "movS", RMeDX, Iv, XX },
668 { "movS", RMeBX, Iv, XX },
669 { "movS", RMeSP, Iv, XX },
670 { "movS", RMeBP, Iv, XX },
671 { "movS", RMeSI, Iv, XX },
672 { "movS", RMeDI, Iv, XX },
252b5132
RH		 673 /* c0 */
674 { GRP2b },
675 { GRP2S },
e2914f48
JH		 676 { "retI", Iw, XX, XX },
677 { "retI", XX, XX, XX },
57d91c3c
ILT		 678 { "lesS", Gv, Mp, XX },
679 { "ldsS", Gv, Mp, XX },
680 { "movA", Eb, Ib, XX },
681 { "movQ", Ev, Iv, XX },
252b5132 682 /* c8 */
52b15da3
JH		 683 { "enterI", Iw, Ib, XX },
684 { "leaveI", XX, XX, XX },
e2914f48
JH		 685 { "lretP", Iw, XX, XX },
686 { "lretP", XX, XX, XX },
52b15da3
JH		 687 { "int3", XX, XX, XX },
688 { "int", Ib, XX, XX },
689 { "into", XX, XX, XX},
e2914f48 690 { "iretP", XX, XX, XX },
52b15da3
JH		 691 /* d0 */
692 { GRP2b_one },
693 { GRP2S_one },
694 { GRP2b_cl },
695 { GRP2S_cl },
696 { "aam", sIb, XX, XX },
697 { "aad", sIb, XX, XX },
698 { "(bad)", XX, XX, XX },
699 { "xlat", DSBX, XX, XX },
700 /* d8 */
701 { FLOAT },
702 { FLOAT },
703 { FLOAT },
704 { FLOAT },
705 { FLOAT },
706 { FLOAT },
707 { FLOAT },
708 { FLOAT },
709 /* e0 */
3ffd33cf
AM		 710 { "loopneF", Jb, loop_jcxz_flag, XX },
711 { "loopeF", Jb, loop_jcxz_flag, XX },
712 { "loopF", Jb, loop_jcxz_flag, XX },
713 { "jEcxz", Jb, loop_jcxz_flag, XX },
52b15da3
JH		 714 { "inB", AL, Ib, XX },
715 { "inS", eAX, Ib, XX },
716 { "outB", Ib, AL, XX },
717 { "outS", Ib, eAX, XX },
718 /* e8 */
719 { "callI", Jv, XX, XX },
720 { "jmpI", Jv, XX, XX },
721 { "ljmpI", Ap, XX, XX },
722 { "jmp", Jb, XX, XX },
723 { "inB", AL, indirDX, XX },
724 { "inS", eAX, indirDX, XX },
725 { "outB", indirDX, AL, XX },
726 { "outS", indirDX, eAX, XX },
727 /* f0 */
728 { "(bad)", XX, XX, XX }, /* lock prefix */
729 { "(bad)", XX, XX, XX },
730 { "(bad)", XX, XX, XX }, /* repne */
731 { "(bad)", XX, XX, XX }, /* repz */
732 { "hlt", XX, XX, XX },
733 { "cmc", XX, XX, XX },
734 { GRP3b },
735 { GRP3S },
736 /* f8 */
737 { "clc", XX, XX, XX },
738 { "stc", XX, XX, XX },
739 { "cli", XX, XX, XX },
740 { "sti", XX, XX, XX },
741 { "cld", XX, XX, XX },
742 { "std", XX, XX, XX },
743 { GRP4 },
744 { GRP5 },
745};
746
747static const struct dis386 dis386_intel[] = {
748 /* 00 */
749 { "add", Eb, Gb, XX },
750 { "add", Ev, Gv, XX },
751 { "add", Gb, Eb, XX },
752 { "add", Gv, Ev, XX },
753 { "add", AL, Ib, XX },
754 { "add", eAX, Iv, XX },
755 { "push", es, XX, XX },
756 { "pop", es, XX, XX },
757 /* 08 */
758 { "or", Eb, Gb, XX },
759 { "or", Ev, Gv, XX },
760 { "or", Gb, Eb, XX },
761 { "or", Gv, Ev, XX },
762 { "or", AL, Ib, XX },
763 { "or", eAX, Iv, XX },
764 { "push", cs, XX, XX },
765 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
766 /* 10 */
767 { "adc", Eb, Gb, XX },
768 { "adc", Ev, Gv, XX },
769 { "adc", Gb, Eb, XX },
770 { "adc", Gv, Ev, XX },
771 { "adc", AL, Ib, XX },
772 { "adc", eAX, Iv, XX },
773 { "push", ss, XX, XX },
774 { "pop", ss, XX, XX },
775 /* 18 */
776 { "sbb", Eb, Gb, XX },
777 { "sbb", Ev, Gv, XX },
778 { "sbb", Gb, Eb, XX },
779 { "sbb", Gv, Ev, XX },
780 { "sbb", AL, Ib, XX },
781 { "sbb", eAX, Iv, XX },
782 { "push", ds, XX, XX },
783 { "pop", ds, XX, XX },
784 /* 20 */
785 { "and", Eb, Gb, XX },
786 { "and", Ev, Gv, XX },
787 { "and", Gb, Eb, XX },
788 { "and", Gv, Ev, XX },
789 { "and", AL, Ib, XX },
790 { "and", eAX, Iv, XX },
791 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
792 { "daa", XX, XX, XX },
793 /* 28 */
794 { "sub", Eb, Gb, XX },
795 { "sub", Ev, Gv, XX },
796 { "sub", Gb, Eb, XX },
797 { "sub", Gv, Ev, XX },
798 { "sub", AL, Ib, XX },
799 { "sub", eAX, Iv, XX },
800 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
801 { "das", XX, XX, XX },
802 /* 30 */
803 { "xor", Eb, Gb, XX },
804 { "xor", Ev, Gv, XX },
805 { "xor", Gb, Eb, XX },
806 { "xor", Gv, Ev, XX },
807 { "xor", AL, Ib, XX },
808 { "xor", eAX, Iv, XX },
809 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
810 { "aaa", XX, XX, XX },
811 /* 38 */
812 { "cmp", Eb, Gb, XX },
813 { "cmp", Ev, Gv, XX },
814 { "cmp", Gb, Eb, XX },
815 { "cmp", Gv, Ev, XX },
816 { "cmp", AL, Ib, XX },
817 { "cmp", eAX, Iv, XX },
818 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
819 { "aas", XX, XX, XX },
820 /* 40 */
821 { "inc", RMeAX, XX, XX },
822 { "inc", RMeCX, XX, XX },
823 { "inc", RMeDX, XX, XX },
824 { "inc", RMeBX, XX, XX },
825 { "inc", RMeSP, XX, XX },
826 { "inc", RMeBP, XX, XX },
827 { "inc", RMeSI, XX, XX },
828 { "inc", RMeDI, XX, XX },
829 /* 48 */
830 { "dec", RMeAX, XX, XX },
831 { "dec", RMeCX, XX, XX },
832 { "dec", RMeDX, XX, XX },
833 { "dec", RMeBX, XX, XX },
834 { "dec", RMeSP, XX, XX },
835 { "dec", RMeBP, XX, XX },
836 { "dec", RMeSI, XX, XX },
837 { "dec", RMeDI, XX, XX },
838 /* 50 */
839 { "push", RMeAX, XX, XX },
840 { "push", RMeCX, XX, XX },
841 { "push", RMeDX, XX, XX },
842 { "push", RMeBX, XX, XX },
843 { "push", RMeSP, XX, XX },
844 { "push", RMeBP, XX, XX },
845 { "push", RMeSI, XX, XX },
846 { "push", RMeDI, XX, XX },
847 /* 58 */
848 { "pop", RMeAX, XX, XX },
849 { "pop", RMeCX, XX, XX },
850 { "pop", RMeDX, XX, XX },
851 { "pop", RMeBX, XX, XX },
852 { "pop", RMeSP, XX, XX },
853 { "pop", RMeBP, XX, XX },
854 { "pop", RMeSI, XX, XX },
855 { "pop", RMeDI, XX, XX },
856 /* 60 */
857 { "pusha", XX, XX, XX },
858 { "popa", XX, XX, XX },
859 { "bound", Gv, Ma, XX },
860 { "arpl", Ew, Gw, XX },
861 { "(bad)", XX, XX, XX }, /* seg fs */
862 { "(bad)", XX, XX, XX }, /* seg gs */
863 { "(bad)", XX, XX, XX }, /* op size prefix */
864 { "(bad)", XX, XX, XX }, /* adr size prefix */
865 /* 68 */
866 { "push", Iv, XX, XX }, /* 386 book wrong */
867 { "imul", Gv, Ev, Iv },
868 { "push", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
869 { "imul", Gv, Ev, sIb },
870 { "ins", Yb, indirDX, XX },
871 { "ins", Yv, indirDX, XX },
872 { "outs", indirDX, Xb, XX },
873 { "outs", indirDX, Xv, XX },
874 /* 70 */
875 { "jo", Jb, XX, XX },
876 { "jno", Jb, XX, XX },
877 { "jb", Jb, XX, XX },
878 { "jae", Jb, XX, XX },
879 { "je", Jb, XX, XX },
880 { "jne", Jb, XX, XX },
881 { "jbe", Jb, XX, XX },
882 { "ja", Jb, XX, XX },
883 /* 78 */
884 { "js", Jb, XX, XX },
885 { "jns", Jb, XX, XX },
886 { "jp", Jb, XX, XX },
887 { "jnp", Jb, XX, XX },
888 { "jl", Jb, XX, XX },
889 { "jge", Jb, XX, XX },
890 { "jle", Jb, XX, XX },
891 { "jg", Jb, XX, XX },
892 /* 80 */
893 { GRP1b },
894 { GRP1S },
895 { "(bad)", XX, XX, XX },
896 { GRP1Ss },
897 { "test", Eb, Gb, XX },
898 { "test", Ev, Gv, XX },
899 { "xchg", Eb, Gb, XX },
900 { "xchg", Ev, Gv, XX },
901 /* 88 */
902 { "mov", Eb, Gb, XX },
903 { "mov", Ev, Gv, XX },
904 { "mov", Gb, Eb, XX },
905 { "mov", Gv, Ev, XX },
906 { "mov", Ev, Sw, XX },
907 { "lea", Gv, M, XX },
908 { "mov", Sw, Ev, XX },
909 { "pop", Ev, XX, XX },
910 /* 90 */
911 { "nop", XX, XX, XX },
041bd2e0 912 /* FIXME: NOP with REPz prefix is called PAUSE. */
52b15da3
JH		 913 { "xchg", RMeCX, eAX, XX },
914 { "xchg", RMeDX, eAX, XX },
915 { "xchg", RMeBX, eAX, XX },
916 { "xchg", RMeSP, eAX, XX },
917 { "xchg", RMeBP, eAX, XX },
918 { "xchg", RMeSI, eAX, XX },
919 { "xchg", RMeDI, eAX, XX },
920 /* 98 */
921 { "cW", XX, XX, XX }, /* cwde and cbw */
922 { "cR", XX, XX, XX }, /* cdq and cwd */
923 { "lcall", Ap, XX, XX },
924 { "(bad)", XX, XX, XX }, /* fwait */
925 { "pushf", XX, XX, XX },
926 { "popf", XX, XX, XX },
927 { "sahf", XX, XX, XX },
928 { "lahf", XX, XX, XX },
929 /* a0 */
930 { "mov", AL, Ob, XX },
931 { "mov", eAX, Ov, XX },
932 { "mov", Ob, AL, XX },
933 { "mov", Ov, eAX, XX },
934 { "movs", Yb, Xb, XX },
935 { "movs", Yv, Xv, XX },
936 { "cmps", Xb, Yb, XX },
937 { "cmps", Xv, Yv, XX },
938 /* a8 */
939 { "test", AL, Ib, XX },
940 { "test", eAX, Iv, XX },
941 { "stos", Yb, AL, XX },
942 { "stos", Yv, eAX, XX },
943 { "lods", AL, Xb, XX },
944 { "lods", eAX, Xv, XX },
945 { "scas", AL, Yb, XX },
946 { "scas", eAX, Yv, XX },
947 /* b0 */
948 { "mov", RMAL, Ib, XX },
949 { "mov", RMCL, Ib, XX },
950 { "mov", RMDL, Ib, XX },
951 { "mov", RMBL, Ib, XX },
952 { "mov", RMAH, Ib, XX },
953 { "mov", RMCH, Ib, XX },
954 { "mov", RMDH, Ib, XX },
955 { "mov", RMBH, Ib, XX },
956 /* b8 */
957 { "mov", RMeAX, Iv, XX },
958 { "mov", RMeCX, Iv, XX },
959 { "mov", RMeDX, Iv, XX },
960 { "mov", RMeBX, Iv, XX },
961 { "mov", RMeSP, Iv, XX },
962 { "mov", RMeBP, Iv, XX },
963 { "mov", RMeSI, Iv, XX },
964 { "mov", RMeDI, Iv, XX },
965 /* c0 */
966 { GRP2b },
967 { GRP2S },
968 { "ret", Iw, XX, XX },
969 { "ret", XX, XX, XX },
970 { "les", Gv, Mp, XX },
971 { "lds", Gv, Mp, XX },
972 { "mov", Eb, Ib, XX },
973 { "mov", Ev, Iv, XX },
974 /* c8 */
975 { "enter", Iw, Ib, XX },
976 { "leave", XX, XX, XX },
977 { "lret", Iw, XX, XX },
978 { "lret", XX, XX, XX },
979 { "int3", XX, XX, XX },
980 { "int", Ib, XX, XX },
981 { "into", XX, XX, XX },
982 { "iret", XX, XX, XX },
983 /* d0 */
984 { GRP2b_one },
985 { GRP2S_one },
986 { GRP2b_cl },
987 { GRP2S_cl },
988 { "aam", sIb, XX, XX },
989 { "aad", sIb, XX, XX },
990 { "(bad)", XX, XX, XX },
991 { "xlat", DSBX, XX, XX },
992 /* d8 */
993 { FLOAT },
994 { FLOAT },
995 { FLOAT },
996 { FLOAT },
997 { FLOAT },
998 { FLOAT },
999 { FLOAT },
1000 { FLOAT },
1001 /* e0 */
1002 { "loopne", Jb, XX, XX },
1003 { "loope", Jb, XX, XX },
1004 { "loop", Jb, XX, XX },
1005 { "jEcxz", Jb, XX, XX },
1006 { "in", AL, Ib, XX },
1007 { "in", eAX, Ib, XX },
1008 { "out", Ib, AL, XX },
1009 { "out", Ib, eAX, XX },
1010 /* e8 */
1011 { "call", Jv, XX, XX },
1012 { "jmp", Jv, XX, XX },
1013 { "ljmp", Ap, XX, XX },
1014 { "jmp", Jb, XX, XX },
1015 { "in", AL, indirDX, XX },
1016 { "in", eAX, indirDX, XX },
1017 { "out", indirDX, AL, XX },
1018 { "out", indirDX, eAX, XX },
1019 /* f0 */
1020 { "(bad)", XX, XX, XX }, /* lock prefix */
1021 { "(bad)", XX, XX, XX },
1022 { "(bad)", XX, XX, XX }, /* repne */
1023 { "(bad)", XX, XX, XX }, /* repz */
1024 { "hlt", XX, XX, XX },
1025 { "cmc", XX, XX, XX },
1026 { GRP3b },
1027 { GRP3S },
1028 /* f8 */
1029 { "clc", XX, XX, XX },
1030 { "stc", XX, XX, XX },
1031 { "cli", XX, XX, XX },
1032 { "sti", XX, XX, XX },
1033 { "cld", XX, XX, XX },
1034 { "std", XX, XX, XX },
1035 { GRP4 },
1036 { GRP5 },
1037};
1038
1039/* 64bit mode is having some instruction set differences, so separate table is
1040 needed. */
1041static const struct dis386 disx86_64_att[] = {
1042 /* 00 */
1043 { "addB", Eb, Gb, XX },
1044 { "addS", Ev, Gv, XX },
1045 { "addB", Gb, Eb, XX },
1046 { "addS", Gv, Ev, XX },
1047 { "addB", AL, Ib, XX },
1048 { "addS", eAX, Iv, XX },
1049 { "(bad)", XX, XX, XX }, /* Reserved. */
1050 { "(bad)", XX, XX, XX }, /* Reserved. */
1051 /* 08 */
1052 { "orB", Eb, Gb, XX },
1053 { "orS", Ev, Gv, XX },
1054 { "orB", Gb, Eb, XX },
1055 { "orS", Gv, Ev, XX },
1056 { "orB", AL, Ib, XX },
1057 { "orS", eAX, Iv, XX },
1058 { "(bad)", XX, XX, XX }, /* Reserved. */
1059 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
1060 /* 10 */
1061 { "adcB", Eb, Gb, XX },
1062 { "adcS", Ev, Gv, XX },
1063 { "adcB", Gb, Eb, XX },
1064 { "adcS", Gv, Ev, XX },
1065 { "adcB", AL, Ib, XX },
1066 { "adcS", eAX, Iv, XX },
1067 { "(bad)", XX, XX, XX }, /* Reserved. */
1068 { "(bad)", XX, XX, XX }, /* Reserved. */
1069 /* 18 */
1070 { "sbbB", Eb, Gb, XX },
1071 { "sbbS", Ev, Gv, XX },
1072 { "sbbB", Gb, Eb, XX },
1073 { "sbbS", Gv, Ev, XX },
1074 { "sbbB", AL, Ib, XX },
1075 { "sbbS", eAX, Iv, XX },
1076 { "(bad)", XX, XX, XX }, /* Reserved. */
1077 { "(bad)", XX, XX, XX }, /* Reserved. */
1078 /* 20 */
1079 { "andB", Eb, Gb, XX },
1080 { "andS", Ev, Gv, XX },
1081 { "andB", Gb, Eb, XX },
1082 { "andS", Gv, Ev, XX },
1083 { "andB", AL, Ib, XX },
1084 { "andS", eAX, Iv, XX },
1085 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
1086 { "(bad)", XX, XX, XX }, /* Reserved. */
1087 /* 28 */
1088 { "subB", Eb, Gb, XX },
1089 { "subS", Ev, Gv, XX },
1090 { "subB", Gb, Eb, XX },
1091 { "subS", Gv, Ev, XX },
1092 { "subB", AL, Ib, XX },
1093 { "subS", eAX, Iv, XX },
1094 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
1095 { "(bad)", XX, XX, XX }, /* Reserved. */
1096 /* 30 */
1097 { "xorB", Eb, Gb, XX },
1098 { "xorS", Ev, Gv, XX },
1099 { "xorB", Gb, Eb, XX },
1100 { "xorS", Gv, Ev, XX },
1101 { "xorB", AL, Ib, XX },
1102 { "xorS", eAX, Iv, XX },
1103 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
1104 { "(bad)", XX, XX, XX }, /* Reserved. */
1105 /* 38 */
1106 { "cmpB", Eb, Gb, XX },
1107 { "cmpS", Ev, Gv, XX },
1108 { "cmpB", Gb, Eb, XX },
1109 { "cmpS", Gv, Ev, XX },
1110 { "cmpB", AL, Ib, XX },
1111 { "cmpS", eAX, Iv, XX },
1112 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
1113 { "(bad)", XX, XX, XX }, /* Reserved. */
1114 /* 40 */
1115 { "(bad)", XX, XX, XX }, /* REX prefix area. */
1116 { "(bad)", XX, XX, XX },
1117 { "(bad)", XX, XX, XX },
1118 { "(bad)", XX, XX, XX },
1119 { "(bad)", XX, XX, XX },
1120 { "(bad)", XX, XX, XX },
1121 { "(bad)", XX, XX, XX },
1122 { "(bad)", XX, XX, XX },
1123 /* 48 */
1124 { "(bad)", XX, XX, XX },
1125 { "(bad)", XX, XX, XX },
1126 { "(bad)", XX, XX, XX },
1127 { "(bad)", XX, XX, XX },
1128 { "(bad)", XX, XX, XX },
1129 { "(bad)", XX, XX, XX },
1130 { "(bad)", XX, XX, XX },
1131 { "(bad)", XX, XX, XX },
1132 /* 50 */
1133 { "pushI", RMrAX, XX, XX },
1134 { "pushI", RMrCX, XX, XX },
1135 { "pushI", RMrDX, XX, XX },
1136 { "pushI", RMrBX, XX, XX },
1137 { "pushI", RMrSP, XX, XX },
1138 { "pushI", RMrBP, XX, XX },
1139 { "pushI", RMrSI, XX, XX },
1140 { "pushI", RMrDI, XX, XX },
1141 /* 58 */
1142 { "popI", RMrAX, XX, XX },
1143 { "popI", RMrCX, XX, XX },
1144 { "popI", RMrDX, XX, XX },
1145 { "popI", RMrBX, XX, XX },
1146 { "popI", RMrSP, XX, XX },
1147 { "popI", RMrBP, XX, XX },
1148 { "popI", RMrSI, XX, XX },
1149 { "popI", RMrDI, XX, XX },
1150 /* 60 */
1151 { "(bad)", XX, XX, XX }, /* reserved. */
1152 { "(bad)", XX, XX, XX }, /* reserved. */
1153 { "(bad)", XX, XX, XX }, /* reserved. */
1154 { "movslR", Gv, Ed, XX },
1155 { "(bad)", XX, XX, XX }, /* seg fs */
1156 { "(bad)", XX, XX, XX }, /* seg gs */
1157 { "(bad)", XX, XX, XX }, /* op size prefix */
1158 { "(bad)", XX, XX, XX }, /* adr size prefix */
1159 /* 68 */
1160 { "pushI", Iq, XX, XX }, /* 386 book wrong */
1161 { "imulS", Gv, Ev, Iv },
1162 { "pushI", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
1163 { "imulS", Gv, Ev, sIb },
1164 { "insb", Yb, indirDX, XX },
1165 { "insR", Yv, indirDX, XX },
1166 { "outsb", indirDX, Xb, XX },
1167 { "outsR", indirDX, Xv, XX },
1168 /* 70 */
3ffd33cf
AM		 1169 { "jo", Jb, cond_jump_flag, XX },
1170 { "jno", Jb, cond_jump_flag, XX },
1171 { "jb", Jb, cond_jump_flag, XX },
1172 { "jae", Jb, cond_jump_flag, XX },
1173 { "je", Jb, cond_jump_flag, XX },
1174 { "jne", Jb, cond_jump_flag, XX },
1175 { "jbe", Jb, cond_jump_flag, XX },
1176 { "ja", Jb, cond_jump_flag, XX },
52b15da3 1177 /* 78 */
3ffd33cf
AM		 1178 { "js", Jb, cond_jump_flag, XX },
1179 { "jns", Jb, cond_jump_flag, XX },
1180 { "jp", Jb, cond_jump_flag, XX },
1181 { "jnp", Jb, cond_jump_flag, XX },
1182 { "jl", Jb, cond_jump_flag, XX },
1183 { "jge", Jb, cond_jump_flag, XX },
1184 { "jle", Jb, cond_jump_flag, XX },
1185 { "jg", Jb, cond_jump_flag, XX },
52b15da3
JH		 1186 /* 80 */
1187 { GRP1b },
1188 { GRP1S },
1189 { "(bad)", XX, XX, XX },
1190 { GRP1Ss },
1191 { "testB", Eb, Gb, XX },
1192 { "testS", Ev, Gv, XX },
1193 { "xchgB", Eb, Gb, XX },
1194 { "xchgS", Ev, Gv, XX },
1195 /* 88 */
1196 { "movB", Eb, Gb, XX },
1197 { "movS", Ev, Gv, XX },
1198 { "movB", Gb, Eb, XX },
1199 { "movS", Gv, Ev, XX },
1200 { "movQ", Ev, Sw, XX },
1201 { "leaS", Gv, M, XX },
1202 { "movQ", Sw, Ev, XX },
1203 { "popI", Ev, XX, XX },
1204 /* 90 */
1205 { "nop", XX, XX, XX },
041bd2e0 1206 /* FIXME: NOP with REPz prefix is called PAUSE. */
52b15da3
JH		 1207 { "xchgS", RMeCX, eAX, XX },
1208 { "xchgS", RMeDX, eAX, XX },
1209 { "xchgS", RMeBX, eAX, XX },
1210 { "xchgS", RMeSP, eAX, XX },
1211 { "xchgS", RMeBP, eAX, XX },
1212 { "xchgS", RMeSI, eAX, XX },
1213 { "xchgS", RMeDI, eAX, XX },
1214 /* 98 */
1215 { "cWtR", XX, XX, XX },
1216 { "cRtO", XX, XX, XX },
1217 { "(bad)", XX, XX, XX }, /* reserved. */
1218 { "(bad)", XX, XX, XX }, /* fwait */
1219 { "pushfI", XX, XX, XX },
1220 { "popfI", XX, XX, XX },
1221 { "(bad)", XX, XX, XX }, /* reserved. */
1222 { "(bad)", XX, XX, XX }, /* reserved. */
1223 /* a0 */
1224 { "movB", AL, Ob64, XX },
1225 { "movS", eAX, Ov64, XX },
1226 { "movB", Ob64, AL, XX },
1227 { "movS", Ov64, eAX, XX },
1228 { "movsb", Yb, Xb, XX },
1229 { "movsR", Yv, Xv, XX },
1230 { "cmpsb", Xb, Yb, XX },
1231 { "cmpsR", Xv, Yv, XX },
1232 /* a8 */
1233 { "testB", AL, Ib, XX },
1234 { "testS", eAX, Iv, XX },
1235 { "stosB", Yb, AL, XX },
1236 { "stosS", Yv, eAX, XX },
1237 { "lodsB", AL, Xb, XX },
1238 { "lodsS", eAX, Xv, XX },
1239 { "scasB", AL, Yb, XX },
1240 { "scasS", eAX, Yv, XX },
1241 /* b0 */
1242 { "movB", RMAL, Ib, XX },
1243 { "movB", RMCL, Ib, XX },
1244 { "movB", RMDL, Ib, XX },
1245 { "movB", RMBL, Ib, XX },
1246 { "movB", RMAH, Ib, XX },
1247 { "movB", RMCH, Ib, XX },
1248 { "movB", RMDH, Ib, XX },
1249 { "movB", RMBH, Ib, XX },
1250 /* b8 */
1251 { "movS", RMeAX, Iv64, XX },
1252 { "movS", RMeCX, Iv64, XX },
1253 { "movS", RMeDX, Iv64, XX },
1254 { "movS", RMeBX, Iv64, XX },
1255 { "movS", RMeSP, Iv64, XX },
1256 { "movS", RMeBP, Iv64, XX },
1257 { "movS", RMeSI, Iv64, XX },
1258 { "movS", RMeDI, Iv64, XX },
1259 /* c0 */
1260 { GRP2b },
1261 { GRP2S },
1262 { "retI", Iw, XX, XX },
1263 { "retI", XX, XX, XX },
1264 { "(bad)", XX, XX, XX }, /* reserved. */
1265 { "ldsS", Gv, Mp, XX },
1266 { "movA", Eb, Ib, XX },
1267 { "movQ", Ev, Iv, XX },
1268 /* c8 */
1269 { "enterI", Iw, Ib, XX },
1270 { "leaveI", XX, XX, XX },
e2914f48
JH		 1271 { "lretP", Iw, XX, XX },
1272 { "lretP", XX, XX, XX },
57d91c3c
ILT		 1273 { "int3", XX, XX, XX },
1274 { "int", Ib, XX, XX },
52b15da3 1275 { "(bad)", XX, XX, XX }, /* reserved. */
e2914f48 1276 { "iretP", XX, XX, XX },
252b5132
RH		 1277 /* d0 */
1278 { GRP2b_one },
1279 { GRP2S_one },
1280 { GRP2b_cl },
1281 { GRP2S_cl },
52b15da3
JH		 1282 { "(bad)", XX, XX, XX }, /* reserved. */
1283 { "(bad)", XX, XX, XX }, /* reserved. */
041bd2e0 1284 { "(bad)", XX, XX, XX }, /* reserved. */
57d91c3c 1285 { "xlat", DSBX, XX, XX },
252b5132
RH		 1286 /* d8 */
1287 { FLOAT },
1288 { FLOAT },
1289 { FLOAT },
1290 { FLOAT },
1291 { FLOAT },
1292 { FLOAT },
1293 { FLOAT },
1294 { FLOAT },
1295 /* e0 */
3ffd33cf
AM		 1296 { "loopneF", Jb, loop_jcxz_flag, XX },
1297 { "loopeF", Jb, loop_jcxz_flag, XX },
1298 { "loopF", Jb, loop_jcxz_flag, XX },
1299 { "jEcxz", Jb, loop_jcxz_flag, XX },
57d91c3c
ILT		 1300 { "inB", AL, Ib, XX },
1301 { "inS", eAX, Ib, XX },
1302 { "outB", Ib, AL, XX },
1303 { "outS", Ib, eAX, XX },
252b5132 1304 /* e8 */
52b15da3
JH		 1305 { "callI", Jv, XX, XX },
1306 { "jmpI", Jv, XX, XX },
1307 { "(bad)", XX, XX, XX }, /* reserved. */
57d91c3c
ILT		 1308 { "jmp", Jb, XX, XX },
1309 { "inB", AL, indirDX, XX },
1310 { "inS", eAX, indirDX, XX },
1311 { "outB", indirDX, AL, XX },
1312 { "outS", indirDX, eAX, XX },
252b5132 1313 /* f0 */
57d91c3c
ILT		 1314 { "(bad)", XX, XX, XX }, /* lock prefix */
1315 { "(bad)", XX, XX, XX },
1316 { "(bad)", XX, XX, XX }, /* repne */
1317 { "(bad)", XX, XX, XX }, /* repz */
1318 { "hlt", XX, XX, XX },
1319 { "cmc", XX, XX, XX },
252b5132
RH		 1320 { GRP3b },
1321 { GRP3S },
1322 /* f8 */
57d91c3c
ILT		 1323 { "clc", XX, XX, XX },
1324 { "stc", XX, XX, XX },
1325 { "cli", XX, XX, XX },
1326 { "sti", XX, XX, XX },
1327 { "cld", XX, XX, XX },
1328 { "std", XX, XX, XX },
252b5132
RH		 1329 { GRP4 },
1330 { GRP5 },
1331};
1332
52b15da3 1333static const struct dis386 dis386_64_intel[] = {
252b5132 1334 /* 00 */
57d91c3c
ILT		 1335 { "add", Eb, Gb, XX },
1336 { "add", Ev, Gv, XX },
1337 { "add", Gb, Eb, XX },
1338 { "add", Gv, Ev, XX },
1339 { "add", AL, Ib, XX },
1340 { "add", eAX, Iv, XX },
52b15da3
JH		 1341 { "(bad)", XX, XX, XX }, /* Reserved. */
1342 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1343 /* 08 */
57d91c3c
ILT		 1344 { "or", Eb, Gb, XX },
1345 { "or", Ev, Gv, XX },
1346 { "or", Gb, Eb, XX },
1347 { "or", Gv, Ev, XX },
1348 { "or", AL, Ib, XX },
1349 { "or", eAX, Iv, XX },
52b15da3 1350 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c 1351 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
252b5132 1352 /* 10 */
57d91c3c
ILT		 1353 { "adc", Eb, Gb, XX },
1354 { "adc", Ev, Gv, XX },
1355 { "adc", Gb, Eb, XX },
1356 { "adc", Gv, Ev, XX },
1357 { "adc", AL, Ib, XX },
1358 { "adc", eAX, Iv, XX },
52b15da3
JH		 1359 { "(bad)", XX, XX, XX }, /* Reserved. */
1360 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1361 /* 18 */
57d91c3c
ILT		 1362 { "sbb", Eb, Gb, XX },
1363 { "sbb", Ev, Gv, XX },
1364 { "sbb", Gb, Eb, XX },
1365 { "sbb", Gv, Ev, XX },
1366 { "sbb", AL, Ib, XX },
1367 { "sbb", eAX, Iv, XX },
52b15da3
JH		 1368 { "(bad)", XX, XX, XX }, /* Reserved. */
1369 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1370 /* 20 */
57d91c3c
ILT		 1371 { "and", Eb, Gb, XX },
1372 { "and", Ev, Gv, XX },
1373 { "and", Gb, Eb, XX },
1374 { "and", Gv, Ev, XX },
1375 { "and", AL, Ib, XX },
1376 { "and", eAX, Iv, XX },
1377 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
52b15da3 1378 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1379 /* 28 */
57d91c3c
ILT		 1380 { "sub", Eb, Gb, XX },
1381 { "sub", Ev, Gv, XX },
1382 { "sub", Gb, Eb, XX },
1383 { "sub", Gv, Ev, XX },
1384 { "sub", AL, Ib, XX },
1385 { "sub", eAX, Iv, XX },
1386 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
52b15da3 1387 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1388 /* 30 */
57d91c3c
ILT		 1389 { "xor", Eb, Gb, XX },
1390 { "xor", Ev, Gv, XX },
1391 { "xor", Gb, Eb, XX },
1392 { "xor", Gv, Ev, XX },
1393 { "xor", AL, Ib, XX },
1394 { "xor", eAX, Iv, XX },
1395 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
52b15da3 1396 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1397 /* 38 */
57d91c3c
ILT		 1398 { "cmp", Eb, Gb, XX },
1399 { "cmp", Ev, Gv, XX },
1400 { "cmp", Gb, Eb, XX },
1401 { "cmp", Gv, Ev, XX },
1402 { "cmp", AL, Ib, XX },
1403 { "cmp", eAX, Iv, XX },
1404 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
52b15da3 1405 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1406 /* 40 */
52b15da3
JH		 1407 { "(bad)", XX, XX, XX }, /* REX prefix area. */
1408 { "(bad)", XX, XX, XX },
1409 { "(bad)", XX, XX, XX },
1410 { "(bad)", XX, XX, XX },
1411 { "(bad)", XX, XX, XX },
1412 { "(bad)", XX, XX, XX },
1413 { "(bad)", XX, XX, XX },
1414 { "(bad)", XX, XX, XX },
252b5132 1415 /* 48 */
52b15da3
JH		 1416 { "(bad)", XX, XX, XX },
1417 { "(bad)", XX, XX, XX },
1418 { "(bad)", XX, XX, XX },
1419 { "(bad)", XX, XX, XX },
1420 { "(bad)", XX, XX, XX },
1421 { "(bad)", XX, XX, XX },
1422 { "(bad)", XX, XX, XX },
1423 { "(bad)", XX, XX, XX },
252b5132 1424 /* 50 */
52b15da3
JH		 1425 { "push", RMrAX, XX, XX },
1426 { "push", RMrCX, XX, XX },
1427 { "push", RMrDX, XX, XX },
1428 { "push", RMrBX, XX, XX },
1429 { "push", RMrSP, XX, XX },
1430 { "push", RMrBP, XX, XX },
1431 { "push", RMrSI, XX, XX },
1432 { "push", RMrDI, XX, XX },
252b5132 1433 /* 58 */
52b15da3
JH		 1434 { "pop", RMrAX, XX, XX },
1435 { "pop", RMrCX, XX, XX },
1436 { "pop", RMrDX, XX, XX },
1437 { "pop", RMrBX, XX, XX },
1438 { "pop", RMrSP, XX, XX },
1439 { "pop", RMrBP, XX, XX },
1440 { "pop", RMrSI, XX, XX },
1441 { "pop", RMrDI, XX, XX },
252b5132 1442 /* 60 */
52b15da3
JH		 1443 { "(bad)", XX, XX, XX }, /* Reserved. */
1444 { "(bad)", XX, XX, XX }, /* Reserved. */
1445 { "(bad)", XX, XX, XX }, /* Reserved. */
1446 { "movsx", Gv, Ed, XX },
57d91c3c
ILT		 1447 { "(bad)", XX, XX, XX }, /* seg fs */
1448 { "(bad)", XX, XX, XX }, /* seg gs */
1449 { "(bad)", XX, XX, XX }, /* op size prefix */
1450 { "(bad)", XX, XX, XX }, /* adr size prefix */
252b5132 1451 /* 68 */
52b15da3 1452 { "push", Iq, XX, XX }, /* 386 book wrong */
c608c12e 1453 { "imul", Gv, Ev, Iv },
57d91c3c 1454 { "push", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
c608c12e 1455 { "imul", Gv, Ev, sIb },
57d91c3c
ILT		 1456 { "ins", Yb, indirDX, XX },
1457 { "ins", Yv, indirDX, XX },
1458 { "outs", indirDX, Xb, XX },
1459 { "outs", indirDX, Xv, XX },
252b5132 1460 /* 70 */
57d91c3c
ILT		 1461 { "jo", Jb, XX, XX },
1462 { "jno", Jb, XX, XX },
1463 { "jb", Jb, XX, XX },
1464 { "jae", Jb, XX, XX },
1465 { "je", Jb, XX, XX },
1466 { "jne", Jb, XX, XX },
1467 { "jbe", Jb, XX, XX },
1468 { "ja", Jb, XX, XX },
252b5132 1469 /* 78 */
57d91c3c
ILT		 1470 { "js", Jb, XX, XX },
1471 { "jns", Jb, XX, XX },
1472 { "jp", Jb, XX, XX },
1473 { "jnp", Jb, XX, XX },
1474 { "jl", Jb, XX, XX },
1475 { "jge", Jb, XX, XX },
1476 { "jle", Jb, XX, XX },
1477 { "jg", Jb, XX, XX },
252b5132
RH		 1478 /* 80 */
1479 { GRP1b },
1480 { GRP1S },
57d91c3c 1481 { "(bad)", XX, XX, XX },
252b5132 1482 { GRP1Ss },
57d91c3c
ILT		 1483 { "test", Eb, Gb, XX },
1484 { "test", Ev, Gv, XX },
1485 { "xchg", Eb, Gb, XX },
1486 { "xchg", Ev, Gv, XX },
252b5132 1487 /* 88 */
57d91c3c
ILT		 1488 { "mov", Eb, Gb, XX },
1489 { "mov", Ev, Gv, XX },
1490 { "mov", Gb, Eb, XX },
1491 { "mov", Gv, Ev, XX },
1492 { "mov", Ev, Sw, XX },
1493 { "lea", Gv, M, XX },
1494 { "mov", Sw, Ev, XX },
1495 { "pop", Ev, XX, XX },
252b5132 1496 /* 90 */
57d91c3c 1497 { "nop", XX, XX, XX },
041bd2e0 1498 /* FIXME: NOP with REPz prefix is called PAUSE. */
52b15da3
JH		 1499 { "xchg", RMeCX, eAX, XX },
1500 { "xchg", RMeDX, eAX, XX },
1501 { "xchg", RMeBX, eAX, XX },
1502 { "xchg", RMeSP, eAX, XX },
1503 { "xchg", RMeBP, eAX, XX },
1504 { "xchg", RMeSI, eAX, XX },
1505 { "xchg", RMeDI, eAX, XX },
252b5132 1506 /* 98 */
57d91c3c
ILT		 1507 { "cW", XX, XX, XX }, /* cwde and cbw */
1508 { "cR", XX, XX, XX }, /* cdq and cwd */
52b15da3 1509 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c
ILT		 1510 { "(bad)", XX, XX, XX }, /* fwait */
1511 { "pushf", XX, XX, XX },
1512 { "popf", XX, XX, XX },
52b15da3
JH		 1513 { "(bad)", XX, XX, XX }, /* Reserved. */
1514 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1515 /* a0 */
57d91c3c
ILT		 1516 { "mov", AL, Ob, XX },
1517 { "mov", eAX, Ov, XX },
1518 { "mov", Ob, AL, XX },
1519 { "mov", Ov, eAX, XX },
1520 { "movs", Yb, Xb, XX },
1521 { "movs", Yv, Xv, XX },
1522 { "cmps", Xb, Yb, XX },
1523 { "cmps", Xv, Yv, XX },
252b5132 1524 /* a8 */
57d91c3c
ILT		 1525 { "test", AL, Ib, XX },
1526 { "test", eAX, Iv, XX },
1527 { "stos", Yb, AL, XX },
1528 { "stos", Yv, eAX, XX },
1529 { "lods", AL, Xb, XX },
1530 { "lods", eAX, Xv, XX },
1531 { "scas", AL, Yb, XX },
1532 { "scas", eAX, Yv, XX },
252b5132 1533 /* b0 */
52b15da3
JH		 1534 { "mov", RMAL, Ib, XX },
1535 { "mov", RMCL, Ib, XX },
1536 { "mov", RMDL, Ib, XX },
1537 { "mov", RMBL, Ib, XX },
1538 { "mov", RMAH, Ib, XX },
1539 { "mov", RMCH, Ib, XX },
1540 { "mov", RMDH, Ib, XX },
1541 { "mov", RMBH, Ib, XX },
252b5132 1542 /* b8 */
52b15da3
JH		 1543 { "mov", RMeAX, Iv, XX },
1544 { "mov", RMeCX, Iv, XX },
1545 { "mov", RMeDX, Iv, XX },
1546 { "mov", RMeBX, Iv, XX },
1547 { "mov", RMeSP, Iv, XX },
1548 { "mov", RMeBP, Iv, XX },
1549 { "mov", RMeSI, Iv, XX },
1550 { "mov", RMeDI, Iv, XX },
252b5132
RH		 1551 /* c0 */
1552 { GRP2b },
1553 { GRP2S },
57d91c3c
ILT		 1554 { "ret", Iw, XX, XX },
1555 { "ret", XX, XX, XX },
52b15da3 1556 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c
ILT		 1557 { "lds", Gv, Mp, XX },
1558 { "mov", Eb, Ib, XX },
1559 { "mov", Ev, Iv, XX },
252b5132 1560 /* c8 */
57d91c3c
ILT		 1561 { "enter", Iw, Ib, XX },
1562 { "leave", XX, XX, XX },
1563 { "lret", Iw, XX, XX },
1564 { "lret", XX, XX, XX },
1565 { "int3", XX, XX, XX },
1566 { "int", Ib, XX, XX },
52b15da3 1567 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c 1568 { "iret", XX, XX, XX },
252b5132
RH		 1569 /* d0 */
1570 { GRP2b_one },
1571 { GRP2S_one },
1572 { GRP2b_cl },
1573 { GRP2S_cl },
52b15da3
JH		 1574 { "(bad)", XX, XX, XX }, /* Reserved. */
1575 { "(bad)", XX, XX, XX }, /* Reserved. */
041bd2e0 1576 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c 1577 { "xlat", DSBX, XX, XX },
252b5132
RH		 1578 /* d8 */
1579 { FLOAT },
1580 { FLOAT },
1581 { FLOAT },
1582 { FLOAT },
1583 { FLOAT },
1584 { FLOAT },
1585 { FLOAT },
1586 { FLOAT },
1587 /* e0 */
57d91c3c
ILT		 1588 { "loopne", Jb, XX, XX },
1589 { "loope", Jb, XX, XX },
1590 { "loop", Jb, XX, XX },
1591 { "jEcxz", Jb, XX, XX },
1592 { "in", AL, Ib, XX },
1593 { "in", eAX, Ib, XX },
1594 { "out", Ib, AL, XX },
1595 { "out", Ib, eAX, XX },
252b5132 1596 /* e8 */
57d91c3c
ILT		 1597 { "call", Jv, XX, XX },
1598 { "jmp", Jv, XX, XX },
52b15da3 1599 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c
ILT		 1600 { "jmp", Jb, XX, XX },
1601 { "in", AL, indirDX, XX },
1602 { "in", eAX, indirDX, XX },
1603 { "out", indirDX, AL, XX },
1604 { "out", indirDX, eAX, XX },
252b5132 1605 /* f0 */
57d91c3c
ILT		 1606 { "(bad)", XX, XX, XX }, /* lock prefix */
1607 { "(bad)", XX, XX, XX },
1608 { "(bad)", XX, XX, XX }, /* repne */
1609 { "(bad)", XX, XX, XX }, /* repz */
1610 { "hlt", XX, XX, XX },
1611 { "cmc", XX, XX, XX },
252b5132
RH		 1612 { GRP3b },
1613 { GRP3S },
1614 /* f8 */
57d91c3c
ILT		 1615 { "clc", XX, XX, XX },
1616 { "stc", XX, XX, XX },
1617 { "cli", XX, XX, XX },
1618 { "sti", XX, XX, XX },
1619 { "cld", XX, XX, XX },
1620 { "std", XX, XX, XX },
252b5132
RH		 1621 { GRP4 },
1622 { GRP5 },
1623};
1624
2da11e11 1625static const struct dis386 dis386_twobyte_att[] = {
252b5132
RH		 1626 /* 00 */
1627 { GRP6 },
1628 { GRP7 },
57d91c3c
ILT		 1629 { "larS", Gv, Ew, XX },
1630 { "lslS", Gv, Ew, XX },
1631 { "(bad)", XX, XX, XX },
52b15da3 1632 { "syscall", XX, XX, XX },
57d91c3c 1633 { "clts", XX, XX, XX },
52b15da3 1634 { "sysretP", XX, XX, XX },
252b5132 1635 /* 08 */
57d91c3c
ILT		 1636 { "invd", XX, XX, XX },
1637 { "wbinvd", XX, XX, XX },
1638 { "(bad)", XX, XX, XX },
1639 { "ud2a", XX, XX, XX },
1640 { "(bad)", XX, XX, XX },
c608c12e 1641 { GRPAMD },
57d91c3c 1642 { "femms", XX, XX, XX },
252b5132
RH		 1643 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */
1644 /* 10 */
c608c12e
AM		 1645 { PREGRP8 },
1646 { PREGRP9 },
041bd2e0
JH		 1647 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1648 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
1649 { "unpcklpX", XM, EX, XX },
1650 { "unpckhpX", XM, EX, XX },
1651 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1652 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
252b5132 1653 /* 18 */
c608c12e 1654 { GRP14 },
57d91c3c
ILT		 1655 { "(bad)", XX, XX, XX },
1656 { "(bad)", XX, XX, XX },
1657 { "(bad)", XX, XX, XX },
1658 { "(bad)", XX, XX, XX },
1659 { "(bad)", XX, XX, XX },
1660 { "(bad)", XX, XX, XX },
1661 { "(bad)", XX, XX, XX },
252b5132
RH		 1662 /* 20 */
1663 /* these are all backward in appendix A of the intel book */
52b15da3
JH		 1664 { "movL", Rm, Cm, XX },
1665 { "movL", Rm, Dm, XX },
1666 { "movL", Cm, Rm, XX },
1667 { "movL", Dm, Rm, XX },
57d91c3c
ILT		 1668 { "movL", Rd, Td, XX },
1669 { "(bad)", XX, XX, XX },
1670 { "movL", Td, Rd, XX },
1671 { "(bad)", XX, XX, XX },
252b5132 1672 /* 28 */
041bd2e0
JH		 1673 { "movapX", XM, EX, XX },
1674 { "movapX", EX, XM, XX },
c608c12e 1675 { PREGRP2 },
041bd2e0 1676 { "movntpX", Ev, XM, XX },
2da11e11 1677 { PREGRP4 },
c608c12e 1678 { PREGRP3 },
041bd2e0
JH		 1679 { "ucomisX", XM,EX, XX },
1680 { "comisX", XM,EX, XX },
252b5132 1681 /* 30 */
57d91c3c
ILT		 1682 { "wrmsr", XX, XX, XX },
1683 { "rdtsc", XX, XX, XX },
1684 { "rdmsr", XX, XX, XX },
1685 { "rdpmc", XX, XX, XX },
1686 { "sysenter", XX, XX, XX },
1687 { "sysexit", XX, XX, XX },
1688 { "(bad)", XX, XX, XX },
1689 { "(bad)", XX, XX, XX },
252b5132 1690 /* 38 */
57d91c3c
ILT		 1691 { "(bad)", XX, XX, XX },
1692 { "(bad)", XX, XX, XX },
1693 { "(bad)", XX, XX, XX },
1694 { "(bad)", XX, XX, XX },
1695 { "(bad)", XX, XX, XX },
1696 { "(bad)", XX, XX, XX },
1697 { "(bad)", XX, XX, XX },
1698 { "(bad)", XX, XX, XX },
252b5132 1699 /* 40 */
57d91c3c
ILT		 1700 { "cmovo", Gv, Ev, XX },
1701 { "cmovno", Gv, Ev, XX },
1702 { "cmovb", Gv, Ev, XX },
1703 { "cmovae", Gv, Ev, XX },
1704 { "cmove", Gv, Ev, XX },
1705 { "cmovne", Gv, Ev, XX },
1706 { "cmovbe", Gv, Ev, XX },
1707 { "cmova", Gv, Ev, XX },
252b5132 1708 /* 48 */
57d91c3c
ILT		 1709 { "cmovs", Gv, Ev, XX },
1710 { "cmovns", Gv, Ev, XX },
1711 { "cmovp", Gv, Ev, XX },
1712 { "cmovnp", Gv, Ev, XX },
1713 { "cmovl", Gv, Ev, XX },
1714 { "cmovge", Gv, Ev, XX },
1715 { "cmovle", Gv, Ev, XX },
1716 { "cmovg", Gv, Ev, XX },
252b5132 1717 /* 50 */
992aaec9 1718 { "movmskpX", Gd, XS, XX },
c608c12e
AM		 1719 { PREGRP13 },
1720 { PREGRP12 },
1721 { PREGRP11 },
041bd2e0
JH		 1722 { "andpX", XM, EX, XX },
1723 { "andnpX", XM, EX, XX },
1724 { "orpX", XM, EX, XX },
1725 { "xorpX", XM, EX, XX },
252b5132 1726 /* 58 */
c608c12e
AM		 1727 { PREGRP0 },
1728 { PREGRP10 },
041bd2e0
JH		 1729 { PREGRP17 },
1730 { PREGRP16 },
c608c12e
AM		 1731 { PREGRP14 },
1732 { PREGRP7 },
1733 { PREGRP5 },
2da11e11 1734 { PREGRP6 },
252b5132 1735 /* 60 */
57d91c3c
ILT		 1736 { "punpcklbw", MX, EM, XX },
1737 { "punpcklwd", MX, EM, XX },
1738 { "punpckldq", MX, EM, XX },
1739 { "packsswb", MX, EM, XX },
1740 { "pcmpgtb", MX, EM, XX },
1741 { "pcmpgtw", MX, EM, XX },
1742 { "pcmpgtd", MX, EM, XX },
1743 { "packuswb", MX, EM, XX },
252b5132 1744 /* 68 */
57d91c3c
ILT		 1745 { "punpckhbw", MX, EM, XX },
1746 { "punpckhwd", MX, EM, XX },
1747 { "punpckhdq", MX, EM, XX },
1748 { "packssdw", MX, EM, XX },
0f17484f 1749 { PREGRP26 },
041bd2e0 1750 { PREGRP24 },
57d91c3c 1751 { "movd", MX, Ed, XX },
041bd2e0 1752 { PREGRP19 },
252b5132 1753 /* 70 */
041bd2e0 1754 { PREGRP22 },
252b5132
RH		 1755 { GRP10 },
1756 { GRP11 },
1757 { GRP12 },
57d91c3c
ILT		 1758 { "pcmpeqb", MX, EM, XX },
1759 { "pcmpeqw", MX, EM, XX },
1760 { "pcmpeqd", MX, EM, XX },
1761 { "emms", XX, XX, XX },
252b5132 1762 /* 78 */
57d91c3c
ILT		 1763 { "(bad)", XX, XX, XX },
1764 { "(bad)", XX, XX, XX },
1765 { "(bad)", XX, XX, XX },
1766 { "(bad)", XX, XX, XX },
1767 { "(bad)", XX, XX, XX },
1768 { "(bad)", XX, XX, XX },
041bd2e0
JH		 1769 { PREGRP23 },
1770 { PREGRP20 },
252b5132 1771 /* 80 */
3ffd33cf
AM		 1772 { "jo", Jv, cond_jump_flag, XX },
1773 { "jno", Jv, cond_jump_flag, XX },
1774 { "jb", Jv, cond_jump_flag, XX },
1775 { "jae", Jv, cond_jump_flag, XX },
1776 { "je", Jv, cond_jump_flag, XX },
1777 { "jne", Jv, cond_jump_flag, XX },
1778 { "jbe", Jv, cond_jump_flag, XX },
1779 { "ja", Jv, cond_jump_flag, XX },
252b5132 1780 /* 88 */
3ffd33cf
AM		 1781 { "js", Jv, cond_jump_flag, XX },
1782 { "jns", Jv, cond_jump_flag, XX },
1783 { "jp", Jv, cond_jump_flag, XX },
1784 { "jnp", Jv, cond_jump_flag, XX },
1785 { "jl", Jv, cond_jump_flag, XX },
1786 { "jge", Jv, cond_jump_flag, XX },
1787 { "jle", Jv, cond_jump_flag, XX },
1788 { "jg", Jv, cond_jump_flag, XX },
252b5132 1789 /* 90 */
57d91c3c
ILT		 1790 { "seto", Eb, XX, XX },
1791 { "setno", Eb, XX, XX },
1792 { "setb", Eb, XX, XX },
1793 { "setae", Eb, XX, XX },
1794 { "sete", Eb, XX, XX },
1795 { "setne", Eb, XX, XX },
1796 { "setbe", Eb, XX, XX },
1797 { "seta", Eb, XX, XX },
252b5132 1798 /* 98 */
57d91c3c
ILT		 1799 { "sets", Eb, XX, XX },
1800 { "setns", Eb, XX, XX },
1801 { "setp", Eb, XX, XX },
1802 { "setnp", Eb, XX, XX },
1803 { "setl", Eb, XX, XX },
1804 { "setge", Eb, XX, XX },
1805 { "setle", Eb, XX, XX },
1806 { "setg", Eb, XX, XX },
252b5132 1807 /* a0 */
52b15da3
JH		 1808 { "pushI", fs, XX, XX },
1809 { "popI", fs, XX, XX },
57d91c3c
ILT		 1810 { "cpuid", XX, XX, XX },
1811 { "btS", Ev, Gv, XX },
252b5132
RH		 1812 { "shldS", Ev, Gv, Ib },
1813 { "shldS", Ev, Gv, CL },
57d91c3c
ILT		 1814 { "(bad)", XX, XX, XX },
1815 { "(bad)", XX, XX, XX },
252b5132 1816 /* a8 */
52b15da3
JH		 1817 { "pushI", gs, XX, XX },
1818 { "popI", gs, XX, XX },
57d91c3c
ILT		 1819 { "rsm", XX, XX, XX },
1820 { "btsS", Ev, Gv, XX },
252b5132
RH		 1821 { "shrdS", Ev, Gv, Ib },
1822 { "shrdS", Ev, Gv, CL },
1823 { GRP13 },
57d91c3c 1824 { "imulS", Gv, Ev, XX },
252b5132 1825 /* b0 */
57d91c3c
ILT		 1826 { "cmpxchgB", Eb, Gb, XX },
1827 { "cmpxchgS", Ev, Gv, XX },
1828 { "lssS", Gv, Mp, XX },
1829 { "btrS", Ev, Gv, XX },
1830 { "lfsS", Gv, Mp, XX },
1831 { "lgsS", Gv, Mp, XX },
1832 { "movzbR", Gv, Eb, XX },
1833 { "movzwR", Gv, Ew, XX }, /* yes, there really is movzww ! */
252b5132 1834 /* b8 */
57d91c3c
ILT		 1835 { "(bad)", XX, XX, XX },
1836 { "ud2b", XX, XX, XX },
252b5132 1837 { GRP8 },
57d91c3c
ILT		 1838 { "btcS", Ev, Gv, XX },
1839 { "bsfS", Gv, Ev, XX },
1840 { "bsrS", Gv, Ev, XX },
1841 { "movsbR", Gv, Eb, XX },
1842 { "movswR", Gv, Ew, XX }, /* yes, there really is movsww ! */
252b5132 1843 /* c0 */
57d91c3c
ILT		 1844 { "xaddB", Eb, Gb, XX },
1845 { "xaddS", Ev, Gv, XX },
c608c12e 1846 { PREGRP1 },
041bd2e0 1847 { "movntiS", Ev, Gv, XX },
992aaec9
AM		 1848 { "pinsrw", MX, Ed, Ib },
1849 { "pextrw", Gd, MS, Ib },
041bd2e0 1850 { "shufpX", XM, EX, Ib },
252b5132
RH		 1851 { GRP9 },
1852 /* c8 */
52b15da3
JH		 1853 { "bswap", RMeAX, XX, XX }, /* bswap doesn't support 16 bit regs */
1854 { "bswap", RMeCX, XX, XX },
1855 { "bswap", RMeDX, XX, XX },
1856 { "bswap", RMeBX, XX, XX },
1857 { "bswap", RMeSP, XX, XX },
1858 { "bswap", RMeBP, XX, XX },
1859 { "bswap", RMeSI, XX, XX },
1860 { "bswap", RMeDI, XX, XX },
252b5132 1861 /* d0 */
57d91c3c
ILT		 1862 { "(bad)", XX, XX, XX },
1863 { "psrlw", MX, EM, XX },
1864 { "psrld", MX, EM, XX },
1865 { "psrlq", MX, EM, XX },
87890af0 1866 { "paddq", MX, EM, XX },
57d91c3c 1867 { "pmullw", MX, EM, XX },
041bd2e0 1868 { PREGRP21 },
992aaec9 1869 { "pmovmskb", Gd, MS, XX },
252b5132 1870 /* d8 */
57d91c3c
ILT		 1871 { "psubusb", MX, EM, XX },
1872 { "psubusw", MX, EM, XX },
1873 { "pminub", MX, EM, XX },
1874 { "pand", MX, EM, XX },
1875 { "paddusb", MX, EM, XX },
1876 { "paddusw", MX, EM, XX },
1877 { "pmaxub", MX, EM, XX },
1878 { "pandn", MX, EM, XX },
252b5132 1879 /* e0 */
57d91c3c
ILT		 1880 { "pavgb", MX, EM, XX },
1881 { "psraw", MX, EM, XX },
1882 { "psrad", MX, EM, XX },
1883 { "pavgw", MX, EM, XX },
1884 { "pmulhuw", MX, EM, XX },
1885 { "pmulhw", MX, EM, XX },
041bd2e0 1886 { PREGRP15 },
0f17484f 1887 { PREGRP25 },
252b5132 1888 /* e8 */
57d91c3c
ILT		 1889 { "psubsb", MX, EM, XX },
1890 { "psubsw", MX, EM, XX },
1891 { "pminsw", MX, EM, XX },
1892 { "por", MX, EM, XX },
1893 { "paddsb", MX, EM, XX },
1894 { "paddsw", MX, EM, XX },
1895 { "pmaxsw", MX, EM, XX },
1896 { "pxor", MX, EM, XX },
252b5132 1897 /* f0 */
57d91c3c
ILT		 1898 { "(bad)", XX, XX, XX },
1899 { "psllw", MX, EM, XX },
1900 { "pslld", MX, EM, XX },
1901 { "psllq", MX, EM, XX },
041bd2e0 1902 { "pmuludq", MX, EM, XX },
57d91c3c
ILT		 1903 { "pmaddwd", MX, EM, XX },
1904 { "psadbw", MX, EM, XX },
041bd2e0 1905 { PREGRP18 },
252b5132 1906 /* f8 */
57d91c3c
ILT		 1907 { "psubb", MX, EM, XX },
1908 { "psubw", MX, EM, XX },
1909 { "psubd", MX, EM, XX },
87890af0 1910 { "psubq", MX, EM, XX },
57d91c3c
ILT		 1911 { "paddb", MX, EM, XX },
1912 { "paddw", MX, EM, XX },
1913 { "paddd", MX, EM, XX },
1914 { "(bad)", XX, XX, XX }
252b5132
RH		 1915};
1916
2da11e11 1917static const struct dis386 dis386_twobyte_intel[] = {
252b5132
RH		 1918 /* 00 */
1919 { GRP6 },
1920 { GRP7 },
57d91c3c
ILT		 1921 { "lar", Gv, Ew, XX },
1922 { "lsl", Gv, Ew, XX },
1923 { "(bad)", XX, XX, XX },
52b15da3 1924 { "syscall", XX, XX, XX },
57d91c3c 1925 { "clts", XX, XX, XX },
52b15da3 1926 { "sysretP", XX, XX, XX },
252b5132 1927 /* 08 */
57d91c3c
ILT		 1928 { "invd", XX, XX, XX },
1929 { "wbinvd", XX, XX, XX },
1930 { "(bad)", XX, XX, XX },
1931 { "ud2a", XX, XX, XX },
1932 { "(bad)", XX, XX, XX },
c608c12e 1933 { GRPAMD },
57d91c3c 1934 { "femms" , XX, XX, XX},
252b5132
RH		 1935 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */
1936 /* 10 */
c2419411
AJ		 1937 { PREGRP8 },
1938 { PREGRP9 },
041bd2e0
JH		 1939 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1940 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
1941 { "unpcklpX", XM, EX, XX },
1942 { "unpckhpX", XM, EX, XX },
1943 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1944 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
252b5132 1945 /* 18 */
c608c12e 1946 { GRP14 },
57d91c3c
ILT		 1947 { "(bad)", XX, XX, XX },
1948 { "(bad)", XX, XX, XX },
1949 { "(bad)", XX, XX, XX },
1950 { "(bad)", XX, XX, XX },
1951 { "(bad)", XX, XX, XX },
1952 { "(bad)", XX, XX, XX },
1953 { "(bad)", XX, XX, XX },
252b5132
RH		 1954 /* 20 */
1955 /* these are all backward in appendix A of the intel book */
52b15da3
JH		 1956 { "mov", Rm, Cm, XX },
1957 { "mov", Rm, Dm, XX },
1958 { "mov", Cm, Rm, XX },
1959 { "mov", Dm, Rm, XX },
57d91c3c
ILT		 1960 { "mov", Rd, Td, XX },
1961 { "(bad)", XX, XX, XX },
1962 { "mov", Td, Rd, XX },
1963 { "(bad)", XX, XX, XX },
252b5132 1964 /* 28 */
041bd2e0
JH		 1965 { "movapX", XM, EX, XX },
1966 { "movapX", EX, XM, XX },
c608c12e 1967 { PREGRP2 },
041bd2e0 1968 { "movntpX", Ev, XM, XX },
2da11e11 1969 { PREGRP4 },
c608c12e 1970 { PREGRP3 },
041bd2e0
JH		 1971 { "ucomisX", XM,EX, XX },
1972 { "comisX", XM,EX, XX },
252b5132 1973 /* 30 */
57d91c3c
ILT		 1974 { "wrmsr", XX, XX, XX },
1975 { "rdtsc", XX, XX, XX },
1976 { "rdmsr", XX, XX, XX },
1977 { "rdpmc", XX, XX, XX },
1978 { "sysenter", XX, XX, XX },
1979 { "sysexit", XX, XX, XX },
1980 { "(bad)", XX, XX, XX },
1981 { "(bad)", XX, XX, XX },
252b5132 1982 /* 38 */
57d91c3c
ILT		 1983 { "(bad)", XX, XX, XX },
1984 { "(bad)", XX, XX, XX },
1985 { "(bad)", XX, XX, XX },
1986 { "(bad)", XX, XX, XX },
1987 { "(bad)", XX, XX, XX },
1988 { "(bad)", XX, XX, XX },
1989 { "(bad)", XX, XX, XX },
1990 { "(bad)", XX, XX, XX },
252b5132 1991 /* 40 */
57d91c3c
ILT		 1992 { "cmovo", Gv, Ev, XX },
1993 { "cmovno", Gv, Ev, XX },
1994 { "cmovb", Gv, Ev, XX },
1995 { "cmovae", Gv, Ev, XX },
1996 { "cmove", Gv, Ev, XX },
1997 { "cmovne", Gv, Ev, XX },
1998 { "cmovbe", Gv, Ev, XX },
1999 { "cmova", Gv, Ev, XX },
252b5132 2000 /* 48 */
57d91c3c
ILT		 2001 { "cmovs", Gv, Ev, XX },
2002 { "cmovns", Gv, Ev, XX },
2003 { "cmovp", Gv, Ev, XX },
2004 { "cmovnp", Gv, Ev, XX },
2005 { "cmovl", Gv, Ev, XX },
2006 { "cmovge", Gv, Ev, XX },
2007 { "cmovle", Gv, Ev, XX },
2008 { "cmovg", Gv, Ev, XX },
252b5132 2009 /* 50 */
992aaec9 2010 { "movmskpX", Gd, XS, XX },
c608c12e
AM		 2011 { PREGRP13 },
2012 { PREGRP12 },
2013 { PREGRP11 },
041bd2e0
JH		 2014 { "andpX", XM, EX, XX },
2015 { "andnpX", XM, EX, XX },
2016 { "orpX", XM, EX, XX },
2017 { "xorpX", XM, EX, XX },
252b5132 2018 /* 58 */
c608c12e
AM		 2019 { PREGRP0 },
2020 { PREGRP10 },
041bd2e0
JH		 2021 { PREGRP17 },
2022 { PREGRP16 },
c608c12e
AM		 2023 { PREGRP14 },
2024 { PREGRP7 },
2025 { PREGRP5 },
2da11e11 2026 { PREGRP6 },
252b5132 2027 /* 60 */
57d91c3c
ILT		 2028 { "punpcklbw", MX, EM, XX },
2029 { "punpcklwd", MX, EM, XX },
2030 { "punpckldq", MX, EM, XX },
2031 { "packsswb", MX, EM, XX },
2032 { "pcmpgtb", MX, EM, XX },
2033 { "pcmpgtw", MX, EM, XX },
2034 { "pcmpgtd", MX, EM, XX },
2035 { "packuswb", MX, EM, XX },
252b5132 2036 /* 68 */
57d91c3c
ILT		 2037 { "punpckhbw", MX, EM, XX },
2038 { "punpckhwd", MX, EM, XX },
2039 { "punpckhdq", MX, EM, XX },
2040 { "packssdw", MX, EM, XX },
0f17484f 2041 { PREGRP26 },
041bd2e0 2042 { PREGRP24 },
57d91c3c 2043 { "movd", MX, Ed, XX },
041bd2e0 2044 { PREGRP19 },
252b5132 2045 /* 70 */
041bd2e0 2046 { PREGRP22 },
252b5132
RH		 2047 { GRP10 },
2048 { GRP11 },
2049 { GRP12 },
57d91c3c
ILT		 2050 { "pcmpeqb", MX, EM, XX },
2051 { "pcmpeqw", MX, EM, XX },
2052 { "pcmpeqd", MX, EM, XX },
2053 { "emms", XX, XX, XX },
252b5132 2054 /* 78 */
57d91c3c
ILT		 2055 { "(bad)", XX, XX, XX },
2056 { "(bad)", XX, XX, XX },
2057 { "(bad)", XX, XX, XX },
2058 { "(bad)", XX, XX, XX },
2059 { "(bad)", XX, XX, XX },
2060 { "(bad)", XX, XX, XX },
041bd2e0
JH		 2061 { PREGRP23 },
2062 { PREGRP20 },
252b5132 2063 /* 80 */
57d91c3c
ILT		 2064 { "jo", Jv, XX, XX },
2065 { "jno", Jv, XX, XX },
2066 { "jb", Jv, XX, XX },
2067 { "jae", Jv, XX, XX },
2068 { "je", Jv, XX, XX },
2069 { "jne", Jv, XX, XX },
2070 { "jbe", Jv, XX, XX },
2071 { "ja", Jv, XX, XX },
252b5132 2072 /* 88 */
57d91c3c
ILT		 2073 { "js", Jv, XX, XX },
2074 { "jns", Jv, XX, XX },
2075 { "jp", Jv, XX, XX },
2076 { "jnp", Jv, XX, XX },
2077 { "jl", Jv, XX, XX },
2078 { "jge", Jv, XX, XX },
2079 { "jle", Jv, XX, XX },
2080 { "jg", Jv, XX, XX },
252b5132 2081 /* 90 */
57d91c3c
ILT		 2082 { "seto", Eb, XX, XX },
2083 { "setno", Eb, XX, XX },
2084 { "setb", Eb, XX, XX },
2085 { "setae", Eb, XX, XX },
2086 { "sete", Eb, XX, XX },
2087 { "setne", Eb, XX, XX },
2088 { "setbe", Eb, XX, XX },
2089 { "seta", Eb, XX, XX },
252b5132 2090 /* 98 */
57d91c3c
ILT		 2091 { "sets", Eb, XX, XX },
2092 { "setns", Eb, XX, XX },
2093 { "setp", Eb, XX, XX },
2094 { "setnp", Eb, XX, XX },
2095 { "setl", Eb, XX, XX },
2096 { "setge", Eb, XX, XX },
2097 { "setle", Eb, XX, XX },
2098 { "setg", Eb, XX, XX },
252b5132 2099 /* a0 */
57d91c3c
ILT		 2100 { "push", fs, XX, XX },
2101 { "pop", fs, XX, XX },
2102 { "cpuid", XX, XX, XX },
2103 { "bt", Ev, Gv, XX },
c608c12e
AM		 2104 { "shld", Ev, Gv, Ib },
2105 { "shld", Ev, Gv, CL },
57d91c3c
ILT		 2106 { "(bad)", XX, XX, XX },
2107 { "(bad)", XX, XX, XX },
252b5132 2108 /* a8 */
57d91c3c
ILT		 2109 { "push", gs, XX, XX },
2110 { "pop", gs, XX, XX },
2111 { "rsm" , XX, XX, XX},
2112 { "bts", Ev, Gv, XX },
c608c12e
AM		 2113 { "shrd", Ev, Gv, Ib },
2114 { "shrd", Ev, Gv, CL },
252b5132 2115 { GRP13 },
57d91c3c 2116 { "imul", Gv, Ev, XX },
252b5132 2117 /* b0 */
57d91c3c
ILT		 2118 { "cmpxchg", Eb, Gb, XX },
2119 { "cmpxchg", Ev, Gv, XX },
2120 { "lss", Gv, Mp, XX },
2121 { "btr", Ev, Gv, XX },
2122 { "lfs", Gv, Mp, XX },
2123 { "lgs", Gv, Mp, XX },
2124 { "movzx", Gv, Eb, XX },
2125 { "movzx", Gv, Ew, XX },
252b5132 2126 /* b8 */
57d91c3c
ILT		 2127 { "(bad)", XX, XX, XX },
2128 { "ud2b", XX, XX, XX },
252b5132 2129 { GRP8 },
57d91c3c
ILT		 2130 { "btc", Ev, Gv, XX },
2131 { "bsf", Gv, Ev, XX },
2132 { "bsr", Gv, Ev, XX },
2133 { "movsx", Gv, Eb, XX },
2134 { "movsx", Gv, Ew, XX },
252b5132 2135 /* c0 */
57d91c3c
ILT		 2136 { "xadd", Eb, Gb, XX },
2137 { "xadd", Ev, Gv, XX },
c608c12e 2138 { PREGRP1 },
041bd2e0 2139 { "movnti", Ev, Gv, XX },
992aaec9
AM		 2140 { "pinsrw", MX, Ed, Ib },
2141 { "pextrw", Gd, MS, Ib },
041bd2e0 2142 { "shufpX", XM, EX, Ib },
252b5132
RH		 2143 { GRP9 },
2144 /* c8 */
52b15da3
JH		 2145 { "bswap", RMeAX, XX, XX }, /* bswap doesn't support 16 bit regs */
2146 { "bswap", RMeCX, XX, XX },
2147 { "bswap", RMeDX, XX, XX },
2148 { "bswap", RMeBX, XX, XX },
2149 { "bswap", RMeSP, XX, XX },
2150 { "bswap", RMeBP, XX, XX },
2151 { "bswap", RMeSI, XX, XX },
2152 { "bswap", RMeDI, XX, XX },
252b5132 2153 /* d0 */
57d91c3c
ILT		 2154 { "(bad)", XX, XX, XX },
2155 { "psrlw", MX, EM, XX },
2156 { "psrld", MX, EM, XX },
2157 { "psrlq", MX, EM, XX },
87890af0 2158 { "paddq", MX, EM, XX },
57d91c3c 2159 { "pmullw", MX, EM, XX },
041bd2e0 2160 { PREGRP21 },
992aaec9 2161 { "pmovmskb", Gd, MS, XX },
252b5132 2162 /* d8 */
57d91c3c
ILT		 2163 { "psubusb", MX, EM, XX },
2164 { "psubusw", MX, EM, XX },
2165 { "pminub", MX, EM, XX },
2166 { "pand", MX, EM, XX },
2167 { "paddusb", MX, EM, XX },
2168 { "paddusw", MX, EM, XX },
2169 { "pmaxub", MX, EM, XX },
2170 { "pandn", MX, EM, XX },
252b5132 2171 /* e0 */
57d91c3c
ILT		 2172 { "pavgb", MX, EM, XX },
2173 { "psraw", MX, EM, XX },
2174 { "psrad", MX, EM, XX },
2175 { "pavgw", MX, EM, XX },
2176 { "pmulhuw", MX, EM, XX },
2177 { "pmulhw", MX, EM, XX },
041bd2e0 2178 { PREGRP15 },
0f17484f 2179 { PREGRP25 },
252b5132 2180 /* e8 */
57d91c3c
ILT		 2181 { "psubsb", MX, EM, XX },
2182 { "psubsw", MX, EM, XX },
2183 { "pminsw", MX, EM, XX },
2184 { "por", MX, EM, XX },
2185 { "paddsb", MX, EM, XX },
2186 { "paddsw", MX, EM, XX },
2187 { "pmaxsw", MX, EM, XX },
2188 { "pxor", MX, EM, XX },
252b5132 2189 /* f0 */
57d91c3c
ILT		 2190 { "(bad)", XX, XX, XX },
2191 { "psllw", MX, EM, XX },
2192 { "pslld", MX, EM, XX },
2193 { "psllq", MX, EM, XX },
041bd2e0 2194 { "pmuludq", MX, EM, XX },
57d91c3c
ILT		 2195 { "pmaddwd", MX, EM, XX },
2196 { "psadbw", MX, EM, XX },
041bd2e0 2197 { PREGRP18 },
252b5132 2198 /* f8 */
57d91c3c
ILT		 2199 { "psubb", MX, EM, XX },
2200 { "psubw", MX, EM, XX },
2201 { "psubd", MX, EM, XX },
87890af0 2202 { "psubq", MX, EM, XX },
57d91c3c
ILT		 2203 { "paddb", MX, EM, XX },
2204 { "paddw", MX, EM, XX },
2205 { "paddd", MX, EM, XX },
2206 { "(bad)", XX, XX, XX }
252b5132
RH		 2207};
2208
2209static const unsigned char onebyte_has_modrm[256] = {
c608c12e
AM		 2210 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2211 /* ------------------------------- */
2212 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
2213 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
2214 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
2215 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
2216 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
2217 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
2218 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
2219 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
2220 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
2221 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
2222 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
2223 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
2224 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
2225 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
2226 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
2227 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
2228 /* ------------------------------- */
2229 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 2230};
2231
2232static const unsigned char twobyte_has_modrm[256] = {
c608c12e
AM		 2233 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2234 /* ------------------------------- */
252b5132 2235 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
c608c12e 2236 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
4bba6815 2237 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
252b5132
RH		 2238 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
2239 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
4bba6815
AM		 2240 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
2241 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
c608c12e 2242 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
252b5132
RH		 2243 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
2244 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
4bba6815 2245 /* a0 */ 0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* af */
252b5132
RH		 2246 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
2247 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
4bba6815
AM		 2248 /* d0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
2249 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
2250 /* f0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
c608c12e
AM		 2251 /* ------------------------------- */
2252 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2253};
2254
041bd2e0 2255static const unsigned char twobyte_uses_SSE_prefix[256] = {
c608c12e
AM		 2256 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2257 /* ------------------------------- */
2258 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
2259 /* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
2260 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
2261 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
2262 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
041bd2e0
JH		 2263 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
2264 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
2265 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
c608c12e
AM		 2266 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
2267 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
2268 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
2269 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
2270 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
041bd2e0
JH		 2271 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
2272 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
2273 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
c608c12e
AM		 2274 /* ------------------------------- */
2275 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 2276};
2277
2278static char obuf[100];
2279static char *obufp;
2280static char scratchbuf[100];
2281static unsigned char *start_codep;
2282static unsigned char *insn_codep;
2283static unsigned char *codep;
2284static disassemble_info *the_info;
2285static int mod;
2286static int rm;
2287static int reg;
4bba6815 2288static unsigned char need_modrm;
2da11e11 2289static void oappend PARAMS ((const char *s));
252b5132 2290
4bba6815
AM		 2291/* If we are accessing mod/rm/reg without need_modrm set, then the
2292 values are stale. Hitting this abort likely indicates that you
2293 need to update onebyte_has_modrm or twobyte_has_modrm. */
2294#define MODRM_CHECK if (!need_modrm) abort ()
2295
52b15da3
JH		 2296static const char *names64[] = {
2297 "%rax","%rcx","%rdx","%rbx", "%rsp","%rbp","%rsi","%rdi",
2298 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
2299};
2300static const char *names32[] = {
252b5132 2301 "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi",
52b15da3 2302 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
252b5132 2303};
2da11e11 2304static const char *names16[] = {
252b5132 2305 "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di",
52b15da3 2306 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
252b5132 2307};
2da11e11 2308static const char *names8[] = {
252b5132
RH		 2309 "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh",
2310};
52b15da3 2311static const char *names8rex[] = {
c2419411 2312 "%al","%cl","%dl","%bl","%spl", "%bpl", "%sil", "%dil",
52b15da3
JH		 2313 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
2314};
2da11e11 2315static const char *names_seg[] = {
252b5132
RH		 2316 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
2317};
2da11e11 2318static const char *index16[] = {
252b5132
RH		 2319 "%bx,%si","%bx,%di","%bp,%si","%bp,%di","%si","%di","%bp","%bx"
2320};
2321
2da11e11 2322static const struct dis386 grps[][8] = {
252b5132
RH		 2323 /* GRP1b */
2324 {
57d91c3c
ILT		 2325 { "addA", Eb, Ib, XX },
2326 { "orA", Eb, Ib, XX },
2327 { "adcA", Eb, Ib, XX },
2328 { "sbbA", Eb, Ib, XX },
2329 { "andA", Eb, Ib, XX },
2330 { "subA", Eb, Ib, XX },
2331 { "xorA", Eb, Ib, XX },
2332 { "cmpA", Eb, Ib, XX }
252b5132
RH		 2333 },
2334 /* GRP1S */
2335 {
57d91c3c
ILT		 2336 { "addQ", Ev, Iv, XX },
2337 { "orQ", Ev, Iv, XX },
2338 { "adcQ", Ev, Iv, XX },
2339 { "sbbQ", Ev, Iv, XX },
2340 { "andQ", Ev, Iv, XX },
2341 { "subQ", Ev, Iv, XX },
2342 { "xorQ", Ev, Iv, XX },
2343 { "cmpQ", Ev, Iv, XX }
252b5132
RH		 2344 },
2345 /* GRP1Ss */
2346 {
57d91c3c
ILT		 2347 { "addQ", Ev, sIb, XX },
2348 { "orQ", Ev, sIb, XX },
2349 { "adcQ", Ev, sIb, XX },
2350 { "sbbQ", Ev, sIb, XX },
2351 { "andQ", Ev, sIb, XX },
2352 { "subQ", Ev, sIb, XX },
2353 { "xorQ", Ev, sIb, XX },
2354 { "cmpQ", Ev, sIb, XX }
252b5132
RH		 2355 },
2356 /* GRP2b */
2357 {
57d91c3c
ILT		 2358 { "rolA", Eb, Ib, XX },
2359 { "rorA", Eb, Ib, XX },
2360 { "rclA", Eb, Ib, XX },
2361 { "rcrA", Eb, Ib, XX },
2362 { "shlA", Eb, Ib, XX },
2363 { "shrA", Eb, Ib, XX },
2364 { "(bad)", XX, XX, XX },
2365 { "sarA", Eb, Ib, XX },
252b5132
RH		 2366 },
2367 /* GRP2S */
2368 {
57d91c3c
ILT		 2369 { "rolQ", Ev, Ib, XX },
2370 { "rorQ", Ev, Ib, XX },
2371 { "rclQ", Ev, Ib, XX },
2372 { "rcrQ", Ev, Ib, XX },
2373 { "shlQ", Ev, Ib, XX },
2374 { "shrQ", Ev, Ib, XX },
2375 { "(bad)", XX, XX, XX },
2376 { "sarQ", Ev, Ib, XX },
252b5132
RH		 2377 },
2378 /* GRP2b_one */
2379 {
57d91c3c
ILT		 2380 { "rolA", Eb, XX, XX },
2381 { "rorA", Eb, XX, XX },
2382 { "rclA", Eb, XX, XX },
2383 { "rcrA", Eb, XX, XX },
2384 { "shlA", Eb, XX, XX },
2385 { "shrA", Eb, XX, XX },
2386 { "(bad)", XX, XX, XX },
2387 { "sarA", Eb, XX, XX },
252b5132
RH		 2388 },
2389 /* GRP2S_one */
2390 {
57d91c3c
ILT		 2391 { "rolQ", Ev, XX, XX },
2392 { "rorQ", Ev, XX, XX },
2393 { "rclQ", Ev, XX, XX },
2394 { "rcrQ", Ev, XX, XX },
2395 { "shlQ", Ev, XX, XX },
2396 { "shrQ", Ev, XX, XX },
2397 { "(bad)", XX, XX, XX},
2398 { "sarQ", Ev, XX, XX },
252b5132
RH		 2399 },
2400 /* GRP2b_cl */
2401 {
57d91c3c
ILT		 2402 { "rolA", Eb, CL, XX },
2403 { "rorA", Eb, CL, XX },
2404 { "rclA", Eb, CL, XX },
2405 { "rcrA", Eb, CL, XX },
2406 { "shlA", Eb, CL, XX },
2407 { "shrA", Eb, CL, XX },
2408 { "(bad)", XX, XX, XX },
2409 { "sarA", Eb, CL, XX },
252b5132
RH		 2410 },
2411 /* GRP2S_cl */
2412 {
57d91c3c
ILT		 2413 { "rolQ", Ev, CL, XX },
2414 { "rorQ", Ev, CL, XX },
2415 { "rclQ", Ev, CL, XX },
2416 { "rcrQ", Ev, CL, XX },
2417 { "shlQ", Ev, CL, XX },
2418 { "shrQ", Ev, CL, XX },
2419 { "(bad)", XX, XX, XX },
2420 { "sarQ", Ev, CL, XX }
252b5132
RH		 2421 },
2422 /* GRP3b */
2423 {
57d91c3c
ILT		 2424 { "testA", Eb, Ib, XX },
2425 { "(bad)", Eb, XX, XX },
2426 { "notA", Eb, XX, XX },
2427 { "negA", Eb, XX, XX },
2428 { "mulB", AL, Eb, XX },
2429 { "imulB", AL, Eb, XX },
2430 { "divB", AL, Eb, XX },
2431 { "idivB", AL, Eb, XX }
252b5132
RH		 2432 },
2433 /* GRP3S */
2434 {
57d91c3c
ILT		 2435 { "testQ", Ev, Iv, XX },
2436 { "(bad)", XX, XX, XX },
2437 { "notQ", Ev, XX, XX },
2438 { "negQ", Ev, XX, XX },
2439 { "mulS", eAX, Ev, XX },
2440 { "imulS", eAX, Ev, XX },
2441 { "divS", eAX, Ev, XX },
2442 { "idivS", eAX, Ev, XX },
252b5132
RH		 2443 },
2444 /* GRP4 */
2445 {
57d91c3c
ILT		 2446 { "incA", Eb, XX, XX },
2447 { "decA", Eb, XX, XX },
2448 { "(bad)", XX, XX, XX },
2449 { "(bad)", XX, XX, XX },
2450 { "(bad)", XX, XX, XX },
2451 { "(bad)", XX, XX, XX },
2452 { "(bad)", XX, XX, XX },
2453 { "(bad)", XX, XX, XX },
252b5132
RH		 2454 },
2455 /* GRP5 */
2456 {
57d91c3c
ILT		 2457 { "incQ", Ev, XX, XX },
2458 { "decQ", Ev, XX, XX },
52b15da3
JH		 2459 { "callI", indirEv, XX, XX },
2460 { "lcallI", indirEv, XX, XX },
2461 { "jmpI", indirEv, XX, XX },
2462 { "ljmpI", indirEv, XX, XX },
90530880 2463 { "pushT", Ev, XX, XX },
57d91c3c 2464 { "(bad)", XX, XX, XX },
252b5132
RH		 2465 },
2466 /* GRP6 */
2467 {
57d91c3c
ILT		 2468 { "sldt", Ew, XX, XX },
2469 { "str", Ew, XX, XX },
2470 { "lldt", Ew, XX, XX },
2471 { "ltr", Ew, XX, XX },
2472 { "verr", Ew, XX, XX },
2473 { "verw", Ew, XX, XX },
2474 { "(bad)", XX, XX, XX },
2475 { "(bad)", XX, XX, XX }
252b5132
RH		 2476 },
2477 /* GRP7 */
2478 {
57d91c3c
ILT		 2479 { "sgdt", Ew, XX, XX },
2480 { "sidt", Ew, XX, XX },
2481 { "lgdt", Ew, XX, XX },
2482 { "lidt", Ew, XX, XX },
2483 { "smsw", Ew, XX, XX },
2484 { "(bad)", XX, XX, XX },
2485 { "lmsw", Ew, XX, XX },
2486 { "invlpg", Ew, XX, XX },
252b5132
RH		 2487 },
2488 /* GRP8 */
2489 {
57d91c3c
ILT		 2490 { "(bad)", XX, XX, XX },
2491 { "(bad)", XX, XX, XX },
2492 { "(bad)", XX, XX, XX },
2493 { "(bad)", XX, XX, XX },
2494 { "btQ", Ev, Ib, XX },
2495 { "btsQ", Ev, Ib, XX },
2496 { "btrQ", Ev, Ib, XX },
2497 { "btcQ", Ev, Ib, XX },
252b5132
RH		 2498 },
2499 /* GRP9 */
2500 {
57d91c3c
ILT		 2501 { "(bad)", XX, XX, XX },
2502 { "cmpxchg8b", Ev, XX, XX },
2503 { "(bad)", XX, XX, XX },
2504 { "(bad)", XX, XX, XX },
2505 { "(bad)", XX, XX, XX },
2506 { "(bad)", XX, XX, XX },
2507 { "(bad)", XX, XX, XX },
2508 { "(bad)", XX, XX, XX },
252b5132
RH		 2509 },
2510 /* GRP10 */
2511 {
57d91c3c
ILT		 2512 { "(bad)", XX, XX, XX },
2513 { "(bad)", XX, XX, XX },
2514 { "psrlw", MS, Ib, XX },
2515 { "(bad)", XX, XX, XX },
2516 { "psraw", MS, Ib, XX },
2517 { "(bad)", XX, XX, XX },
2518 { "psllw", MS, Ib, XX },
2519 { "(bad)", XX, XX, XX },
252b5132
RH		 2520 },
2521 /* GRP11 */
2522 {
57d91c3c
ILT		 2523 { "(bad)", XX, XX, XX },
2524 { "(bad)", XX, XX, XX },
2525 { "psrld", MS, Ib, XX },
2526 { "(bad)", XX, XX, XX },
2527 { "psrad", MS, Ib, XX },
2528 { "(bad)", XX, XX, XX },
2529 { "pslld", MS, Ib, XX },
2530 { "(bad)", XX, XX, XX },
252b5132
RH		 2531 },
2532 /* GRP12 */
2533 {
57d91c3c
ILT		 2534 { "(bad)", XX, XX, XX },
2535 { "(bad)", XX, XX, XX },
2536 { "psrlq", MS, Ib, XX },
041bd2e0 2537 { "psrldq", MS, Ib, XX },
57d91c3c
ILT		 2538 { "(bad)", XX, XX, XX },
2539 { "(bad)", XX, XX, XX },
2540 { "psllq", MS, Ib, XX },
041bd2e0 2541 { "pslldq", MS, Ib, XX },
252b5132
RH		 2542 },
2543 /* GRP13 */
2544 {
57d91c3c
ILT		 2545 { "fxsave", Ev, XX, XX },
2546 { "fxrstor", Ev, XX, XX },
2547 { "ldmxcsr", Ev, XX, XX },
2548 { "stmxcsr", Ev, XX, XX },
2549 { "(bad)", XX, XX, XX },
041bd2e0
JH		 2550 { "lfence", None, XX, XX },
2551 { "mfence", None, XX, XX },
57d91c3c 2552 { "sfence", None, XX, XX },
041bd2e0 2553 /* FIXME: the sfence with memory operand is clflush! */
c608c12e
AM		 2554 },
2555 /* GRP14 */
2556 {
57d91c3c
ILT		 2557 { "prefetchnta", Ev, XX, XX },
2558 { "prefetcht0", Ev, XX, XX },
2559 { "prefetcht1", Ev, XX, XX },
2560 { "prefetcht2", Ev, XX, XX },
2561 { "(bad)", XX, XX, XX },
2562 { "(bad)", XX, XX, XX },
2563 { "(bad)", XX, XX, XX },
2564 { "(bad)", XX, XX, XX },
252b5132 2565 },
c608c12e 2566 /* GRPAMD */
252b5132 2567 {
57d91c3c
ILT		 2568 { "prefetch", Eb, XX, XX },
2569 { "prefetchw", Eb, XX, XX },
2570 { "(bad)", XX, XX, XX },
2571 { "(bad)", XX, XX, XX },
2572 { "(bad)", XX, XX, XX },
2573 { "(bad)", XX, XX, XX },
2574 { "(bad)", XX, XX, XX },
2575 { "(bad)", XX, XX, XX },
252b5132
RH		 2576 }
2577
2578};
2579
041bd2e0 2580static const struct dis386 prefix_user_table[][4] = {
c608c12e
AM		 2581 /* PREGRP0 */
2582 {
57d91c3c
ILT		 2583 { "addps", XM, EX, XX },
2584 { "addss", XM, EX, XX },
041bd2e0
JH		 2585 { "addpd", XM, EX, XX },
2586 { "addsd", XM, EX, XX },
c608c12e
AM		 2587 },
2588 /* PREGRP1 */
2589 {
2590 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX */
2591 { "", XM, EX, OPSIMD },
041bd2e0
JH		 2592 { "", XM, EX, OPSIMD },
2593 { "", XM, EX, OPSIMD },
c608c12e
AM		 2594 },
2595 /* PREGRP2 */
2596 {
57d91c3c 2597 { "cvtpi2ps", XM, EM, XX },
76f227a5 2598 { "cvtsi2ssY", XM, Ev, XX },
041bd2e0 2599 { "cvtpi2pd", XM, EM, XX },
76f227a5 2600 { "cvtsi2sdY", XM, Ev, XX },
c608c12e
AM		 2601 },
2602 /* PREGRP3 */
2603 {
57d91c3c 2604 { "cvtps2pi", MX, EX, XX },
76f227a5 2605 { "cvtss2siY", Gv, EX, XX },
041bd2e0 2606 { "cvtpd2pi", MX, EX, XX },
76f227a5 2607 { "cvtsd2siY", Gv, EX, XX },
c608c12e
AM		 2608 },
2609 /* PREGRP4 */
2610 {
57d91c3c 2611 { "cvttps2pi", MX, EX, XX },
76f227a5 2612 { "cvttss2siY", Gv, EX, XX },
041bd2e0 2613 { "cvttpd2pi", MX, EX, XX },
76f227a5 2614 { "cvttsd2siY", Gv, EX, XX },
c608c12e
AM		 2615 },
2616 /* PREGRP5 */
2617 {
57d91c3c
ILT		 2618 { "divps", XM, EX, XX },
2619 { "divss", XM, EX, XX },
041bd2e0
JH		 2620 { "divpd", XM, EX, XX },
2621 { "divsd", XM, EX, XX },
c608c12e
AM		 2622 },
2623 /* PREGRP6 */
2624 {
57d91c3c
ILT		 2625 { "maxps", XM, EX, XX },
2626 { "maxss", XM, EX, XX },
041bd2e0
JH		 2627 { "maxpd", XM, EX, XX },
2628 { "maxsd", XM, EX, XX },
c608c12e
AM		 2629 },
2630 /* PREGRP7 */
2631 {
57d91c3c
ILT		 2632 { "minps", XM, EX, XX },
2633 { "minss", XM, EX, XX },
041bd2e0
JH		 2634 { "minpd", XM, EX, XX },
2635 { "minsd", XM, EX, XX },
c608c12e
AM		 2636 },
2637 /* PREGRP8 */
2638 {
57d91c3c
ILT		 2639 { "movups", XM, EX, XX },
2640 { "movss", XM, EX, XX },
041bd2e0
JH		 2641 { "movupd", XM, EX, XX },
2642 { "movsd", XM, EX, XX },
c608c12e
AM		 2643 },
2644 /* PREGRP9 */
2645 {
57d91c3c
ILT		 2646 { "movups", EX, XM, XX },
2647 { "movss", EX, XM, XX },
041bd2e0
JH		 2648 { "movupd", EX, XM, XX },
2649 { "movsd", EX, XM, XX },
c608c12e
AM		 2650 },
2651 /* PREGRP10 */
2652 {
57d91c3c
ILT		 2653 { "mulps", XM, EX, XX },
2654 { "mulss", XM, EX, XX },
041bd2e0
JH		 2655 { "mulpd", XM, EX, XX },
2656 { "mulsd", XM, EX, XX },
c608c12e
AM		 2657 },
2658 /* PREGRP11 */
2659 {
57d91c3c
ILT		 2660 { "rcpps", XM, EX, XX },
2661 { "rcpss", XM, EX, XX },
041bd2e0
JH		 2662 { "(bad)", XM, EX, XX },
2663 { "(bad)", XM, EX, XX },
c608c12e
AM		 2664 },
2665 /* PREGRP12 */
2666 {
57d91c3c
ILT		 2667 { "rsqrtps", XM, EX, XX },
2668 { "rsqrtss", XM, EX, XX },
041bd2e0
JH		 2669 { "(bad)", XM, EX, XX },
2670 { "(bad)", XM, EX, XX },
c608c12e
AM		 2671 },
2672 /* PREGRP13 */
2673 {
57d91c3c
ILT		 2674 { "sqrtps", XM, EX, XX },
2675 { "sqrtss", XM, EX, XX },
041bd2e0
JH		 2676 { "sqrtpd", XM, EX, XX },
2677 { "sqrtsd", XM, EX, XX },
c608c12e
AM		 2678 },
2679 /* PREGRP14 */
2680 {
57d91c3c
ILT		 2681 { "subps", XM, EX, XX },
2682 { "subss", XM, EX, XX },
041bd2e0
JH		 2683 { "subpd", XM, EX, XX },
2684 { "subsd", XM, EX, XX },
2685 },
2686 /* PREGRP15 */
2687 {
2688 { "(bad)", XM, EX, XX },
2689 { "cvtdq2pd", XM, EX, XX },
2690 { "cvttpd2dq", XM, EX, XX },
2691 { "cvtpd2dq", XM, EX, XX },
2692 },
2693 /* PREGRP16 */
2694 {
2695 { "cvtdq2ps", XM, EX, XX },
2696 { "cvttps2dq",XM, EX, XX },
2697 { "cvtps2dq",XM, EX, XX },
2698 { "(bad)", XM, EX, XX },
2699 },
2700 /* PREGRP17 */
2701 {
2702 { "cvtps2pd", XM, EX, XX },
2703 { "cvtss2sd", XM, EX, XX },
2704 { "cvtpd2ps", XM, EX, XX },
2705 { "cvtsd2ss", XM, EX, XX },
2706 },
2707 /* PREGRP18 */
2708 {
992aaec9 2709 { "maskmovq", MX, MS, XX },
041bd2e0 2710 { "(bad)", XM, EX, XX },
0f17484f 2711 { "maskmovdqu", XM, EX, XX },
041bd2e0
JH		 2712 { "(bad)", XM, EX, XX },
2713 },
2714 /* PREGRP19 */
2715 {
2716 { "movq", MX, EM, XX },
2717 { "movdqu", XM, EX, XX },
2718 { "movdqa", XM, EX, XX },
2719 { "(bad)", XM, EX, XX },
2720 },
2721 /* PREGRP20 */
2722 {
2723 { "movq", EM, MX, XX },
2724 { "movdqu", EX, XM, XX },
2725 { "movdqa", EX, XM, XX },
2726 { "(bad)", EX, XM, XX },
2727 },
2728 /* PREGRP21 */
2729 {
2730 { "(bad)", EX, XM, XX },
67d6227d 2731 { "movq2dq", XM, MS, XX },
041bd2e0 2732 { "movq", EX, XM, XX },
67d6227d 2733 { "movdq2q", MX, XS, XX },
041bd2e0
JH		 2734 },
2735 /* PREGRP22 */
2736 {
2737 { "pshufw", MX, EM, Ib },
2738 { "pshufhw", XM, EX, Ib },
2739 { "pshufd", XM, EX, Ib },
2740 { "pshuflw", XM, EX, Ib },
2741 },
2742 /* PREGRP23 */
2743 {
2744 { "movd", Ed, MX, XX },
67d6227d 2745 { "movq", XM, EX, XX },
041bd2e0 2746 { "movd", Ed, XM, XX },
0f17484f 2747 { "(bad)", Ed, XM, XX },
041bd2e0
JH		 2748 },
2749 /* PREGRP24 */
2750 {
0f17484f
AM		 2751 { "(bad)", MX, EX, XX },
2752 { "(bad)", XM, EX, XX },
041bd2e0 2753 { "punpckhqdq", XM, EX, XX },
0f17484f
AM		 2754 { "(bad)", XM, EX, XX },
2755 },
2756 /* PREGRP25 */
2757 {
2758 { "movntq", Ev, MX, XX },
2759 { "(bad)", Ev, XM, XX },
2760 { "movntdq", Ev, XM, XX },
2761 { "(bad)", Ev, XM, XX },
2762 },
2763 /* PREGRP26 */
2764 {
2765 { "(bad)", MX, EX, XX },
2766 { "(bad)", XM, EX, XX },
2767 { "punpcklqdq", XM, EX, XX },
2768 { "(bad)", XM, EX, XX },
041bd2e0 2769 },
c608c12e
AM		 2770};
2771
2772#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
2773
252b5132
RH		 2774static void
2775ckprefix ()
2776{
52b15da3
JH		 2777 int newrex;
2778 rex = 0;
252b5132 2779 prefixes = 0;
7d421014 2780 used_prefixes = 0;
52b15da3 2781 rex_used = 0;
252b5132
RH		 2782 while (1)
2783 {
2784 FETCH_DATA (the_info, codep + 1);
52b15da3 2785 newrex = 0;
252b5132
RH		 2786 switch (*codep)
2787 {
52b15da3
JH		 2788 /* REX prefixes family. */
2789 case 0x40:
2790 case 0x41:
2791 case 0x42:
2792 case 0x43:
2793 case 0x44:
2794 case 0x45:
2795 case 0x46:
2796 case 0x47:
2797 case 0x48:
2798 case 0x49:
2799 case 0x4a:
2800 case 0x4b:
2801 case 0x4c:
2802 case 0x4d:
2803 case 0x4e:
2804 case 0x4f:
2805 if (mode_64bit)
2806 newrex = *codep;
2807 else
2808 return;
2809 break;
252b5132
RH		 2810 case 0xf3:
2811 prefixes |= PREFIX_REPZ;
2812 break;
2813 case 0xf2:
2814 prefixes |= PREFIX_REPNZ;
2815 break;
2816 case 0xf0:
2817 prefixes |= PREFIX_LOCK;
2818 break;
2819 case 0x2e:
2820 prefixes |= PREFIX_CS;
2821 break;
2822 case 0x36:
2823 prefixes |= PREFIX_SS;
2824 break;
2825 case 0x3e:
2826 prefixes |= PREFIX_DS;
2827 break;
2828 case 0x26:
2829 prefixes |= PREFIX_ES;
2830 break;
2831 case 0x64:
2832 prefixes |= PREFIX_FS;
2833 break;
2834 case 0x65:
2835 prefixes |= PREFIX_GS;
2836 break;
2837 case 0x66:
2838 prefixes |= PREFIX_DATA;
2839 break;
2840 case 0x67:
2841 prefixes |= PREFIX_ADDR;
2842 break;
5076851f 2843 case FWAIT_OPCODE:
252b5132
RH		 2844 /* fwait is really an instruction. If there are prefixes
2845 before the fwait, they belong to the fwait, *not* to the
2846 following instruction. */
2847 if (prefixes)
2848 {
2849 prefixes |= PREFIX_FWAIT;
2850 codep++;
2851 return;
2852 }
2853 prefixes = PREFIX_FWAIT;
2854 break;
2855 default:
2856 return;
2857 }
52b15da3
JH		 2858 /* Rex is ignored when followed by another prefix. */
2859 if (rex)
2860 {
2861 oappend (prefix_name (rex, 0));
2862 oappend (" ");
2863 }
2864 rex = newrex;
252b5132
RH		 2865 codep++;
2866 }
2867}
2868
7d421014
ILT		 2869/* Return the name of the prefix byte PREF, or NULL if PREF is not a
2870 prefix byte. */
2871
2872static const char *
2873prefix_name (pref, sizeflag)
2874 int pref;
2875 int sizeflag;
2876{
2877 switch (pref)
2878 {
52b15da3
JH		 2879 /* REX prefixes family. */
2880 case 0x40:
2881 return "rex";
2882 case 0x41:
2883 return "rexZ";
2884 case 0x42:
2885 return "rexY";
2886 case 0x43:
2887 return "rexYZ";
2888 case 0x44:
2889 return "rexX";
2890 case 0x45:
2891 return "rexXZ";
2892 case 0x46:
2893 return "rexXY";
2894 case 0x47:
2895 return "rexXYZ";
2896 case 0x48:
2897 return "rex64";
2898 case 0x49:
2899 return "rex64Z";
2900 case 0x4a:
2901 return "rex64Y";
2902 case 0x4b:
2903 return "rex64YZ";
2904 case 0x4c:
2905 return "rex64X";
2906 case 0x4d:
2907 return "rex64XZ";
2908 case 0x4e:
2909 return "rex64XY";
2910 case 0x4f:
2911 return "rex64XYZ";
7d421014
ILT		 2912 case 0xf3:
2913 return "repz";
2914 case 0xf2:
2915 return "repnz";
2916 case 0xf0:
2917 return "lock";
2918 case 0x2e:
2919 return "cs";
2920 case 0x36:
2921 return "ss";
2922 case 0x3e:
2923 return "ds";
2924 case 0x26:
2925 return "es";
2926 case 0x64:
2927 return "fs";
2928 case 0x65:
2929 return "gs";
2930 case 0x66:
2931 return (sizeflag & DFLAG) ? "data16" : "data32";
2932 case 0x67:
2933 return (sizeflag & AFLAG) ? "addr16" : "addr32";
2934 case FWAIT_OPCODE:
2935 return "fwait";
2936 default:
2937 return NULL;
2938 }
2939}
2940
252b5132
RH		 2941static char op1out[100], op2out[100], op3out[100];
2942static int op_ad, op_index[3];
2943static unsigned int op_address[3];
52b15da3
JH		 2944static unsigned int op_riprel[3];
2945static bfd_vma start_pc;
252b5132
RH		 2946
2947\f
2948/*
2949 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
2950 * (see topic "Redundant prefixes" in the "Differences from 8086"
2951 * section of the "Virtual 8086 Mode" chapter.)
2952 * 'pc' should be the address of this instruction, it will
2953 * be used to print the target address if this is a relative jump or call
2954 * The function returns the length of this instruction in bytes.
2955 */
2956
252b5132
RH		 2957static int print_insn_i386
2958 PARAMS ((bfd_vma pc, disassemble_info *info));
2959
2960static char intel_syntax;
2961static char open_char;
2962static char close_char;
2963static char separator_char;
2964static char scale_char;
2965
2966int
2967print_insn_i386_att (pc, info)
2968 bfd_vma pc;
2969 disassemble_info *info;
2970{
2971 intel_syntax = 0;
2972 open_char = '(';
2973 close_char = ')';
2974 separator_char = ',';
2975 scale_char = ',';
2976
2977 return print_insn_i386 (pc, info);
2978}
2979
2980int
2981print_insn_i386_intel (pc, info)
2982 bfd_vma pc;
2983 disassemble_info *info;
2984{
2985 intel_syntax = 1;
2986 open_char = '[';
2987 close_char = ']';
2988 separator_char = '+';
2989 scale_char = '*';
2990
2991 return print_insn_i386 (pc, info);
2992}
2993
2994static int
2995print_insn_i386 (pc, info)
2996 bfd_vma pc;
2997 disassemble_info *info;
2998{
2da11e11 2999 const struct dis386 *dp;
252b5132
RH		 3000 int i;
3001 int two_source_ops;
3002 char *first, *second, *third;
3003 int needcomma;
041bd2e0 3004 unsigned char uses_SSE_prefix;
57d91c3c
ILT		 3005 VOLATILE int sizeflag;
3006 VOLATILE int orig_sizeflag;
252b5132
RH		 3007
3008 struct dis_private priv;
3009 bfd_byte *inbuf = priv.the_buffer;
3010
52b15da3
JH		 3011 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
3012 || info->mach == bfd_mach_x86_64);
3013
2da11e11 3014 if (info->mach == bfd_mach_i386_i386
52b15da3
JH		 3015 || info->mach == bfd_mach_x86_64
3016 || info->mach == bfd_mach_i386_i386_intel_syntax
3017 || info->mach == bfd_mach_x86_64_intel_syntax)
2da11e11
AM		 3018 sizeflag = AFLAG|DFLAG;
3019 else if (info->mach == bfd_mach_i386_i8086)
3020 sizeflag = 0;
3021 else
3022 abort ();
7d421014 3023 orig_sizeflag = sizeflag;
2da11e11 3024
4fe53c98 3025 /* The output looks better if we put 7 bytes on a line, since that
c608c12e 3026 puts most long word instructions on a single line. */
4fe53c98 3027 info->bytes_per_line = 7;
252b5132
RH		 3028
3029 info->private_data = (PTR) &priv;
3030 priv.max_fetched = priv.the_buffer;
3031 priv.insn_start = pc;
252b5132
RH		 3032
3033 obuf[0] = 0;
3034 op1out[0] = 0;
3035 op2out[0] = 0;
3036 op3out[0] = 0;
3037
3038 op_index[0] = op_index[1] = op_index[2] = -1;
3039
3040 the_info = info;
3041 start_pc = pc;
3042 start_codep = inbuf;
3043 codep = inbuf;
3044
5076851f
ILT		 3045 if (setjmp (priv.bailout) != 0)
3046 {
7d421014
ILT		 3047 const char *name;
3048
5076851f 3049 /* Getting here means we tried for data but didn't get it. That
7d421014
ILT		 3050 means we have an incomplete instruction of some sort. Just
3051 print the first byte as a prefix or a .byte pseudo-op. */
3052 if (codep > inbuf)
5076851f 3053 {
7d421014
ILT		 3054 name = prefix_name (inbuf[0], orig_sizeflag);
3055 if (name != NULL)
3056 (*info->fprintf_func) (info->stream, "%s", name);
3057 else
5076851f 3058 {
7d421014
ILT		 3059 /* Just print the first byte as a .byte instruction. */
3060 (*info->fprintf_func) (info->stream, ".byte 0x%x",
3061 (unsigned int) inbuf[0]);
5076851f 3062 }
5076851f 3063
7d421014 3064 return 1;
5076851f
ILT		 3065 }
3066
3067 return -1;
3068 }
3069
52b15da3 3070 obufp = obuf;
252b5132
RH		 3071 ckprefix ();
3072
3073 insn_codep = codep;
3074
3075 FETCH_DATA (info, codep + 1);
3076 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3077
252b5132
RH		 3078 if ((prefixes & PREFIX_FWAIT)
3079 && ((*codep < 0xd8) || (*codep > 0xdf)))
3080 {
7d421014
ILT		 3081 const char *name;
3082
3083 /* fwait not followed by floating point instruction. Print the
3084 first prefix, which is probably fwait itself. */
3085 name = prefix_name (inbuf[0], orig_sizeflag);
3086 if (name == NULL)
3087 name = INTERNAL_DISASSEMBLER_ERROR;
3088 (*info->fprintf_func) (info->stream, "%s", name);
3089 return 1;
252b5132
RH		 3090 }
3091
252b5132
RH		 3092 if (*codep == 0x0f)
3093 {
3094 FETCH_DATA (info, codep + 2);
3095 if (intel_syntax)
3096 dp = &dis386_twobyte_intel[*++codep];
3097 else
3098 dp = &dis386_twobyte_att[*++codep];
3099 need_modrm = twobyte_has_modrm[*codep];
041bd2e0 3100 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
252b5132
RH		 3101 }
3102 else
3103 {
3104 if (intel_syntax)
52b15da3
JH		 3105 if (mode_64bit)
3106 dp = &dis386_64_intel[*codep];
3107 else
3108 dp = &dis386_intel[*codep];
252b5132 3109 else
52b15da3
JH		 3110 if (mode_64bit)
3111 dp = &disx86_64_att[*codep];
3112 else
3113 dp = &dis386_att[*codep];
252b5132 3114 need_modrm = onebyte_has_modrm[*codep];
041bd2e0 3115 uses_SSE_prefix = 0;
252b5132
RH		 3116 }
3117 codep++;
3118
041bd2e0 3119 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
7d421014
ILT		 3120 {
3121 oappend ("repz ");
3122 used_prefixes |= PREFIX_REPZ;
3123 }
041bd2e0 3124 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
7d421014
ILT		 3125 {
3126 oappend ("repnz ");
3127 used_prefixes |= PREFIX_REPNZ;
3128 }
c608c12e 3129 if (prefixes & PREFIX_LOCK)
7d421014
ILT		 3130 {
3131 oappend ("lock ");
3132 used_prefixes |= PREFIX_LOCK;
3133 }
c608c12e 3134
c608c12e
AM		 3135 if (prefixes & PREFIX_ADDR)
3136 {
3137 sizeflag ^= AFLAG;
3ffd33cf
AM		 3138 if (dp->bytemode2 != loop_jcxz_mode)
3139 {
3140 if (sizeflag & AFLAG)
3141 oappend ("addr32 ");
3142 else
3143 oappend ("addr16 ");
3144 used_prefixes |= PREFIX_ADDR;
3145 }
3146 }
3147
3148 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
3149 {
3150 sizeflag ^= DFLAG;
3151 if (dp->bytemode2 == cond_jump_mode && dp->bytemode1 == v_mode)
3152 {
3153 if (sizeflag & DFLAG)
3154 oappend ("data32 ");
3155 else
3156 oappend ("data16 ");
3157 used_prefixes |= PREFIX_DATA;
3158 }
3159 }
3160
3161 if (dp->bytemode2 == cond_jump_mode || dp->bytemode2 == loop_jcxz_mode)
3162 {
3163 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS)
3164 {
3165 oappend ("cs ");
3166 used_prefixes |= PREFIX_CS;
3167 }
3168 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
3169 {
3170 oappend ("ds ");
3171 used_prefixes |= PREFIX_DS;
3172 }
c608c12e
AM		 3173 }
3174
252b5132
RH		 3175 if (need_modrm)
3176 {
3177 FETCH_DATA (info, codep + 1);
3178 mod = (*codep >> 6) & 3;
3179 reg = (*codep >> 3) & 7;
3180 rm = *codep & 7;
3181 }
8d5ec599
L		 3182 else
3183 {
3184 mod = 0;
3185 reg = 0;
3186 rm = 0;
3187 }
252b5132
RH		 3188
3189 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
3190 {
3191 dofloat (sizeflag);
3192 }
3193 else
3194 {
041bd2e0 3195 int index;
252b5132 3196 if (dp->name == NULL)
c608c12e
AM		 3197 {
3198 switch(dp->bytemode2)
3199 {
3200 case USE_GROUPS:
3201 dp = &grps[dp->bytemode1][reg];
3202 break;
3203 case USE_PREFIX_USER_TABLE:
041bd2e0 3204 index = 0;
7d421014 3205 used_prefixes |= (prefixes & PREFIX_REPZ);
041bd2e0
JH		 3206 if (prefixes & PREFIX_REPZ)
3207 index = 1;
3208 else
3209 {
3210 used_prefixes |= (prefixes & PREFIX_DATA);
3211 if (prefixes & PREFIX_DATA)
3212 index = 2;
3213 else
3214 {
3215 used_prefixes |= (prefixes & PREFIX_REPNZ);
3216 if (prefixes & PREFIX_REPNZ)
3217 index = 3;
041bd2e0
JH		 3218 }
3219 }
3220 dp = &prefix_user_table[dp->bytemode1][index];
c608c12e
AM		 3221 break;
3222 default:
3223 oappend (INTERNAL_DISASSEMBLER_ERROR);
3224 break;
3225 }
3226 }
252b5132
RH		 3227
3228 putop (dp->name, sizeflag);
3229
3230 obufp = op1out;
3231 op_ad = 2;
3232 if (dp->op1)
3233 (*dp->op1)(dp->bytemode1, sizeflag);
3234
3235 obufp = op2out;
3236 op_ad = 1;
3237 if (dp->op2)
3238 (*dp->op2)(dp->bytemode2, sizeflag);
3239
3240 obufp = op3out;
3241 op_ad = 0;
3242 if (dp->op3)
3243 (*dp->op3)(dp->bytemode3, sizeflag);
3244 }
3245
7d421014
ILT		 3246 /* See if any prefixes were not used. If so, print the first one
3247 separately. If we don't do this, we'll wind up printing an
3248 instruction stream which does not precisely correspond to the
3249 bytes we are disassembling. */
3250 if ((prefixes & ~used_prefixes) != 0)
3251 {
3252 const char *name;
3253
3254 name = prefix_name (inbuf[0], orig_sizeflag);
3255 if (name == NULL)
3256 name = INTERNAL_DISASSEMBLER_ERROR;
3257 (*info->fprintf_func) (info->stream, "%s", name);
3258 return 1;
3259 }
52b15da3
JH		 3260 if (rex & ~rex_used)
3261 {
3262 const char *name;
3263 name = prefix_name (rex | 0x40, orig_sizeflag);
3264 if (name == NULL)
3265 name = INTERNAL_DISASSEMBLER_ERROR;
3266 (*info->fprintf_func) (info->stream, "%s ", name);
3267 }
7d421014 3268
252b5132
RH		 3269 obufp = obuf + strlen (obuf);
3270 for (i = strlen (obuf); i < 6; i++)
3271 oappend (" ");
3272 oappend (" ");
3273 (*info->fprintf_func) (info->stream, "%s", obuf);
3274
3275 /* The enter and bound instructions are printed with operands in the same
3276 order as the intel book; everything else is printed in reverse order. */
2da11e11 3277 if (intel_syntax || two_source_ops)
252b5132
RH		 3278 {
3279 first = op1out;
3280 second = op2out;
3281 third = op3out;
3282 op_ad = op_index[0];
3283 op_index[0] = op_index[2];
3284 op_index[2] = op_ad;
3285 }
3286 else
3287 {
3288 first = op3out;
3289 second = op2out;
3290 third = op1out;
3291 }
3292 needcomma = 0;
3293 if (*first)
3294 {
52b15da3 3295 if (op_index[0] != -1 && !op_riprel[0])
252b5132
RH		 3296 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
3297 else
3298 (*info->fprintf_func) (info->stream, "%s", first);
3299 needcomma = 1;
3300 }
3301 if (*second)
3302 {
3303 if (needcomma)
3304 (*info->fprintf_func) (info->stream, ",");
52b15da3 3305 if (op_index[1] != -1 && !op_riprel[1])
252b5132
RH		 3306 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
3307 else
3308 (*info->fprintf_func) (info->stream, "%s", second);
3309 needcomma = 1;
3310 }
3311 if (*third)
3312 {
3313 if (needcomma)
3314 (*info->fprintf_func) (info->stream, ",");
52b15da3 3315 if (op_index[2] != -1 && !op_riprel[2])
252b5132
RH		 3316 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
3317 else
3318 (*info->fprintf_func) (info->stream, "%s", third);
3319 }
52b15da3
JH		 3320 for (i = 0; i < 3; i++)
3321 if (op_index[i] != -1 && op_riprel[i])
3322 {
3323 (*info->fprintf_func) (info->stream, " # ");
3324 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
3325 + op_address[op_index[i]]), info);
3326 }
252b5132
RH		 3327 return codep - inbuf;
3328}
3329
2da11e11 3330static const char *float_mem_att[] = {
252b5132
RH		 3331 /* d8 */
3332 "fadds",
3333 "fmuls",
3334 "fcoms",
3335 "fcomps",
3336 "fsubs",
3337 "fsubrs",
3338 "fdivs",
3339 "fdivrs",
3340 /* d9 */
3341 "flds",
3342 "(bad)",
3343 "fsts",
3344 "fstps",
3345 "fldenv",
3346 "fldcw",
3347 "fNstenv",
3348 "fNstcw",
3349 /* da */
3350 "fiaddl",
3351 "fimull",
3352 "ficoml",
3353 "ficompl",
3354 "fisubl",
3355 "fisubrl",
3356 "fidivl",
3357 "fidivrl",
3358 /* db */
3359 "fildl",
3360 "(bad)",
3361 "fistl",
3362 "fistpl",
3363 "(bad)",
3364 "fldt",
3365 "(bad)",
3366 "fstpt",
3367 /* dc */
3368 "faddl",
3369 "fmull",
3370 "fcoml",
3371 "fcompl",
3372 "fsubl",
3373 "fsubrl",
3374 "fdivl",
3375 "fdivrl",
3376 /* dd */
3377 "fldl",
3378 "(bad)",
3379 "fstl",
3380 "fstpl",
3381 "frstor",
3382 "(bad)",
3383 "fNsave",
3384 "fNstsw",
3385 /* de */
3386 "fiadd",
3387 "fimul",
3388 "ficom",
3389 "ficomp",
3390 "fisub",
3391 "fisubr",
3392 "fidiv",
3393 "fidivr",
3394 /* df */
3395 "fild",
3396 "(bad)",
3397 "fist",
3398 "fistp",
3399 "fbld",
3400 "fildll",
3401 "fbstp",
3402 "fistpll",
3403};
3404
2da11e11 3405static const char *float_mem_intel[] = {
252b5132
RH		 3406 /* d8 */
3407 "fadd",
3408 "fmul",
3409 "fcom",
3410 "fcomp",
3411 "fsub",
3412 "fsubr",
3413 "fdiv",
3414 "fdivr",
3415 /* d9 */
3416 "fld",
3417 "(bad)",
3418 "fst",
3419 "fstp",
3420 "fldenv",
3421 "fldcw",
3422 "fNstenv",
3423 "fNstcw",
3424 /* da */
3425 "fiadd",
3426 "fimul",
3427 "ficom",
3428 "ficomp",
3429 "fisub",
3430 "fisubr",
3431 "fidiv",
3432 "fidivr",
3433 /* db */
3434 "fild",
3435 "(bad)",
3436 "fist",
3437 "fistp",
3438 "(bad)",
3439 "fld",
3440 "(bad)",
3441 "fstp",
3442 /* dc */
3443 "fadd",
3444 "fmul",
3445 "fcom",
3446 "fcomp",
3447 "fsub",
3448 "fsubr",
3449 "fdiv",
3450 "fdivr",
3451 /* dd */
3452 "fld",
3453 "(bad)",
3454 "fst",
3455 "fstp",
3456 "frstor",
3457 "(bad)",
3458 "fNsave",
3459 "fNstsw",
3460 /* de */
3461 "fiadd",
3462 "fimul",
3463 "ficom",
3464 "ficomp",
3465 "fisub",
3466 "fisubr",
3467 "fidiv",
3468 "fidivr",
3469 /* df */
3470 "fild",
3471 "(bad)",
3472 "fist",
3473 "fistp",
3474 "fbld",
3475 "fild",
3476 "fbstp",
3477 "fistpll",
3478};
3479
3480#define ST OP_ST, 0
3481#define STi OP_STi, 0
3482
57d91c3c
ILT		 3483#define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
3484#define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
3485#define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
3486#define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
3487#define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
3488#define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
3489#define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
3490#define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
3491#define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
252b5132 3492
2da11e11 3493static const struct dis386 float_reg[][8] = {
252b5132
RH		 3494 /* d8 */
3495 {
57d91c3c
ILT		 3496 { "fadd", ST, STi, XX },
3497 { "fmul", ST, STi, XX },
3498 { "fcom", STi, XX, XX },
3499 { "fcomp", STi, XX, XX },
3500 { "fsub", ST, STi, XX },
3501 { "fsubr", ST, STi, XX },
3502 { "fdiv", ST, STi, XX },
3503 { "fdivr", ST, STi, XX },
252b5132
RH		 3504 },
3505 /* d9 */
3506 {
57d91c3c
ILT		 3507 { "fld", STi, XX, XX },
3508 { "fxch", STi, XX, XX },
252b5132 3509 { FGRPd9_2 },
57d91c3c 3510 { "(bad)", XX, XX, XX },
252b5132
RH		 3511 { FGRPd9_4 },
3512 { FGRPd9_5 },
3513 { FGRPd9_6 },
3514 { FGRPd9_7 },
3515 },
3516 /* da */
3517 {
57d91c3c
ILT		 3518 { "fcmovb", ST, STi, XX },
3519 { "fcmove", ST, STi, XX },
3520 { "fcmovbe",ST, STi, XX },
3521 { "fcmovu", ST, STi, XX },
3522 { "(bad)", XX, XX, XX },
252b5132 3523 { FGRPda_5 },
57d91c3c
ILT		 3524 { "(bad)", XX, XX, XX },
3525 { "(bad)", XX, XX, XX },
252b5132
RH		 3526 },
3527 /* db */
3528 {
57d91c3c
ILT		 3529 { "fcmovnb",ST, STi, XX },
3530 { "fcmovne",ST, STi, XX },
3531 { "fcmovnbe",ST, STi, XX },
3532 { "fcmovnu",ST, STi, XX },
252b5132 3533 { FGRPdb_4 },
57d91c3c
ILT		 3534 { "fucomi", ST, STi, XX },
3535 { "fcomi", ST, STi, XX },
3536 { "(bad)", XX, XX, XX },
252b5132
RH		 3537 },
3538 /* dc */
3539 {
57d91c3c
ILT		 3540 { "fadd", STi, ST, XX },
3541 { "fmul", STi, ST, XX },
3542 { "(bad)", XX, XX, XX },
3543 { "(bad)", XX, XX, XX },
252b5132 3544#if UNIXWARE_COMPAT
57d91c3c
ILT		 3545 { "fsub", STi, ST, XX },
3546 { "fsubr", STi, ST, XX },
3547 { "fdiv", STi, ST, XX },
3548 { "fdivr", STi, ST, XX },
252b5132 3549#else
57d91c3c
ILT		 3550 { "fsubr", STi, ST, XX },
3551 { "fsub", STi, ST, XX },
3552 { "fdivr", STi, ST, XX },
3553 { "fdiv", STi, ST, XX },
252b5132
RH		 3554#endif
3555 },
3556 /* dd */
3557 {
57d91c3c
ILT		 3558 { "ffree", STi, XX, XX },
3559 { "(bad)", XX, XX, XX },
3560 { "fst", STi, XX, XX },
3561 { "fstp", STi, XX, XX },
3562 { "fucom", STi, XX, XX },
3563 { "fucomp", STi, XX, XX },
3564 { "(bad)", XX, XX, XX },
3565 { "(bad)", XX, XX, XX },
252b5132
RH		 3566 },
3567 /* de */
3568 {
57d91c3c
ILT		 3569 { "faddp", STi, ST, XX },
3570 { "fmulp", STi, ST, XX },
3571 { "(bad)", XX, XX, XX },
252b5132
RH		 3572 { FGRPde_3 },
3573#if UNIXWARE_COMPAT
57d91c3c
ILT		 3574 { "fsubp", STi, ST, XX },
3575 { "fsubrp", STi, ST, XX },
3576 { "fdivp", STi, ST, XX },
3577 { "fdivrp", STi, ST, XX },
252b5132 3578#else
57d91c3c
ILT		 3579 { "fsubrp", STi, ST, XX },
3580 { "fsubp", STi, ST, XX },
3581 { "fdivrp", STi, ST, XX },
3582 { "fdivp", STi, ST, XX },
252b5132
RH		 3583#endif
3584 },
3585 /* df */
3586 {
c2419411 3587 { "ffreep", STi, XX, XX },
57d91c3c
ILT		 3588 { "(bad)", XX, XX, XX },
3589 { "(bad)", XX, XX, XX },
3590 { "(bad)", XX, XX, XX },
252b5132 3591 { FGRPdf_4 },
57d91c3c
ILT		 3592 { "fucomip",ST, STi, XX },
3593 { "fcomip", ST, STi, XX },
3594 { "(bad)", XX, XX, XX },
252b5132
RH		 3595 },
3596};
3597
3598
3599static char *fgrps[][8] = {
3600 /* d9_2 0 */
3601 {
3602 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3603 },
3604
3605 /* d9_4 1 */
3606 {
3607 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
3608 },
3609
3610 /* d9_5 2 */
3611 {
3612 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
3613 },
3614
3615 /* d9_6 3 */
3616 {
3617 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
3618 },
3619
3620 /* d9_7 4 */
3621 {
3622 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
3623 },
3624
3625 /* da_5 5 */
3626 {
3627 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3628 },
3629
3630 /* db_4 6 */
3631 {
3632 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
3633 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
3634 },
3635
3636 /* de_3 7 */
3637 {
3638 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3639 },
3640
3641 /* df_4 8 */
3642 {
3643 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3644 },
3645};
3646
3647static void
3648dofloat (sizeflag)
3649 int sizeflag;
3650{
2da11e11 3651 const struct dis386 *dp;
252b5132
RH		 3652 unsigned char floatop;
3653
3654 floatop = codep[-1];
3655
3656 if (mod != 3)
3657 {
3658 if (intel_syntax)
3659 putop (float_mem_intel[(floatop - 0xd8 ) * 8 + reg], sizeflag);
3660 else
3661 putop (float_mem_att[(floatop - 0xd8 ) * 8 + reg], sizeflag);
3662 obufp = op1out;
3663 if (floatop == 0xdb)
3664 OP_E (x_mode, sizeflag);
3665 else if (floatop == 0xdd)
3666 OP_E (d_mode, sizeflag);
2da11e11 3667 else
252b5132
RH		 3668 OP_E (v_mode, sizeflag);
3669 return;
3670 }
4bba6815
AM		 3671 /* skip mod/rm byte */
3672 MODRM_CHECK;
252b5132
RH		 3673 codep++;
3674
3675 dp = &float_reg[floatop - 0xd8][reg];
3676 if (dp->name == NULL)
3677 {
3678 putop (fgrps[dp->bytemode1][rm], sizeflag);
3679
3680 /* instruction fnstsw is only one with strange arg */
3681 if (floatop == 0xdf && codep[-1] == 0xe0)
3682 strcpy (op1out, names16[0]);
3683 }
3684 else
3685 {
3686 putop (dp->name, sizeflag);
3687
3688 obufp = op1out;
3689 if (dp->op1)
3690 (*dp->op1)(dp->bytemode1, sizeflag);
3691 obufp = op2out;
3692 if (dp->op2)
3693 (*dp->op2)(dp->bytemode2, sizeflag);
3694 }
3695}
3696
3697/* ARGSUSED */
3698static void
3699OP_ST (ignore, sizeflag)
57d91c3c
ILT		 3700 int ignore ATTRIBUTE_UNUSED;
3701 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 3702{
3703 oappend ("%st");
3704}
3705
3706/* ARGSUSED */
3707static void
3708OP_STi (ignore, sizeflag)
57d91c3c
ILT		 3709 int ignore ATTRIBUTE_UNUSED;
3710 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 3711{
3712 sprintf (scratchbuf, "%%st(%d)", rm);
3713 oappend (scratchbuf);
3714}
3715
3716
3717/* capital letters in template are macros */
3718static void
3719putop (template, sizeflag)
2da11e11 3720 const char *template;
252b5132
RH		 3721 int sizeflag;
3722{
2da11e11 3723 const char *p;
252b5132
RH		 3724
3725 for (p = template; *p; p++)
3726 {
3727 switch (*p)
3728 {
3729 default:
3730 *obufp++ = *p;
3731 break;
3732 case 'A':
3733 if (intel_syntax)
3734 break;
3735 if (mod != 3
3736#ifdef SUFFIX_ALWAYS
3737 || (sizeflag & SUFFIX_ALWAYS)
3738#endif
3739 )
3740 *obufp++ = 'b';
3741 break;
3742 case 'B':
3743 if (intel_syntax)
3744 break;
3745#ifdef SUFFIX_ALWAYS
3746 if (sizeflag & SUFFIX_ALWAYS)
3747 *obufp++ = 'b';
3748#endif
3749 break;
3750 case 'E': /* For jcxz/jecxz */
3751 if (sizeflag & AFLAG)
3752 *obufp++ = 'e';
3ffd33cf
AM		 3753 used_prefixes |= (prefixes & PREFIX_ADDR);
3754 break;
3755 case 'F':
3756 if ((prefixes & PREFIX_ADDR)
3757#ifdef SUFFIX_ALWAYS
3758 || (sizeflag & SUFFIX_ALWAYS)
3759#endif
3760 )
3761 {
3762 if (sizeflag & AFLAG)
3763 *obufp++ = 'l';
3764 else
3765 *obufp++ = 'w';
3766 used_prefixes |= (prefixes & PREFIX_ADDR);
3767 }
252b5132 3768 break;
90530880
JH		 3769 case 'I':
3770 if (intel_syntax)
3771 break;
3772 if (mode_64bit)
3773 *obufp++ = 'q';
3774 else
3775 {
3776 if ((prefixes & PREFIX_DATA)
3777#ifdef SUFFIX_ALWAYS
3778 || (sizeflag & SUFFIX_ALWAYS)
3779#endif
3780 )
3781 {
3782 if (sizeflag & DFLAG)
3783 *obufp++ = 'l';
3784 else
3785 *obufp++ = 'w';
3786 used_prefixes |= (prefixes & PREFIX_DATA);
3787 }
3788 }
3789 break;
252b5132
RH		 3790 case 'L':
3791 if (intel_syntax)
3792 break;
3793#ifdef SUFFIX_ALWAYS
3794 if (sizeflag & SUFFIX_ALWAYS)
3795 *obufp++ = 'l';
3796#endif
3797 break;
3798 case 'N':
3799 if ((prefixes & PREFIX_FWAIT) == 0)
3800 *obufp++ = 'n';
7d421014
ILT		 3801 else
3802 used_prefixes |= PREFIX_FWAIT;
252b5132 3803 break;
52b15da3
JH		 3804 case 'O':
3805 USED_REX (REX_MODE64);
3806 if (rex & REX_MODE64)
3807 *obufp++ = 'o';
3808 else
3809 *obufp++ = 'd';
3810 break;
252b5132
RH		 3811 case 'P':
3812 if (intel_syntax)
3813 break;
3814 if ((prefixes & PREFIX_DATA)
52b15da3 3815 || (rex & REX_MODE64)
252b5132
RH		 3816#ifdef SUFFIX_ALWAYS
3817 || (sizeflag & SUFFIX_ALWAYS)
3818#endif
3819 )
3820 {
52b15da3
JH		 3821 USED_REX (REX_MODE64);
3822 if (rex & REX_MODE64)
3823 *obufp++ = 'q';
c2419411 3824 else
52b15da3
JH		 3825 {
3826 if (sizeflag & DFLAG)
3827 *obufp++ = 'l';
3828 else
3829 *obufp++ = 'w';
3830 used_prefixes |= (prefixes & PREFIX_DATA);
3831 }
252b5132
RH		 3832 }
3833 break;
3834 case 'Q':
3835 if (intel_syntax)
3836 break;
90530880 3837 USED_REX (REX_MODE64);
252b5132
RH		 3838 if (mod != 3
3839#ifdef SUFFIX_ALWAYS
3840 || (sizeflag & SUFFIX_ALWAYS)
3841#endif
3842 )
3843 {
52b15da3
JH		 3844 if (rex & REX_MODE64)
3845 *obufp++ = 'q';
252b5132 3846 else
52b15da3
JH		 3847 {
3848 if (sizeflag & DFLAG)
3849 *obufp++ = 'l';
3850 else
3851 *obufp++ = 'w';
3852 used_prefixes |= (prefixes & PREFIX_DATA);
3853 }
252b5132
RH		 3854 }
3855 break;
3856 case 'R':
52b15da3 3857 USED_REX (REX_MODE64);
252b5132 3858 if (intel_syntax)
c608c12e 3859 {
52b15da3
JH		 3860 if (rex & REX_MODE64)
3861 {
3862 *obufp++ = 'q';
3863 *obufp++ = 't';
3864 }
3865 else if (sizeflag & DFLAG)
c608c12e
AM		 3866 {
3867 *obufp++ = 'd';
3868 *obufp++ = 'q';
3869 }
3870 else
3871 {
3872 *obufp++ = 'w';
3873 *obufp++ = 'd';
3874 }
3875 }
252b5132 3876 else
c608c12e 3877 {
52b15da3
JH		 3878 if (rex & REX_MODE64)
3879 *obufp++ = 'q';
3880 else if (sizeflag & DFLAG)
c608c12e
AM		 3881 *obufp++ = 'l';
3882 else
3883 *obufp++ = 'w';
3884 }
52b15da3
JH		 3885 if (!(rex & REX_MODE64))
3886 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3887 break;
3888 case 'S':
3889 if (intel_syntax)
3890 break;
3891#ifdef SUFFIX_ALWAYS
3892 if (sizeflag & SUFFIX_ALWAYS)
3893 {
52b15da3
JH		 3894 if (rex & REX_MODE64)
3895 *obufp++ = 'q';
252b5132 3896 else
52b15da3
JH		 3897 {
3898 if (sizeflag & DFLAG)
3899 *obufp++ = 'l';
3900 else
3901 *obufp++ = 'w';
3902 used_prefixes |= (prefixes & PREFIX_DATA);
3903 }
252b5132
RH		 3904 }
3905#endif
3906 break;
90530880
JH		 3907 case 'T':
3908 if (intel_syntax)
3909 break;
3910 if (mode_64bit)
3911 *obufp++ = 'q';
3912 else if (mod != 3
3913#ifdef SUFFIX_ALWAYS
3914 || (sizeflag & SUFFIX_ALWAYS)
3915#endif
3916 )
3917 {
3918 if (sizeflag & DFLAG)
3919 *obufp++ = 'l';
3920 else
3921 *obufp++ = 'w';
3922 used_prefixes |= (prefixes & PREFIX_DATA);
3923 }
3924 break;
041bd2e0
JH		 3925 case 'X':
3926 if (prefixes & PREFIX_DATA)
3927 *obufp++ = 'd';
3928 else
3929 *obufp++ = 's';
3930 used_prefixes |= (prefixes & PREFIX_DATA);
3931 break;
76f227a5
JH		 3932 case 'Y':
3933 if (intel_syntax)
3934 break;
3935 if (rex & REX_MODE64)
3936 {
3937 USED_REX (REX_MODE64);
3938 *obufp++ = 'q';
3939 }
3940 break;
52b15da3 3941 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
252b5132 3942 case 'W':
252b5132 3943 /* operand size flag for cwtl, cbtw */
52b15da3
JH		 3944 USED_REX (0);
3945 if (rex)
3946 *obufp++ = 'l';
3947 else if (sizeflag & DFLAG)
252b5132
RH		 3948 *obufp++ = 'w';
3949 else
3950 *obufp++ = 'b';
c608c12e
AM		 3951 if (intel_syntax)
3952 {
52b15da3
JH		 3953 if (rex)
3954 {
3955 *obufp++ = 'q';
3956 *obufp++ = 'e';
3957 }
c608c12e
AM		 3958 if (sizeflag & DFLAG)
3959 {
3960 *obufp++ = 'd';
3961 *obufp++ = 'e';
3962 }
3963 else
3964 {
3965 *obufp++ = 'w';
3966 }
3967 }
52b15da3
JH		 3968 if (!rex)
3969 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3970 break;
3971 }
3972 }
3973 *obufp = 0;
3974}
3975
3976static void
3977oappend (s)
2da11e11 3978 const char *s;
252b5132
RH		 3979{
3980 strcpy (obufp, s);
3981 obufp += strlen (s);
3982}
3983
3984static void
3985append_seg ()
3986{
3987 if (prefixes & PREFIX_CS)
7d421014
ILT		 3988 {
3989 oappend ("%cs:");
3990 used_prefixes |= PREFIX_CS;
3991 }
252b5132 3992 if (prefixes & PREFIX_DS)
7d421014
ILT		 3993 {
3994 oappend ("%ds:");
3995 used_prefixes |= PREFIX_DS;
3996 }
252b5132 3997 if (prefixes & PREFIX_SS)
7d421014
ILT		 3998 {
3999 oappend ("%ss:");
4000 used_prefixes |= PREFIX_SS;
4001 }
252b5132 4002 if (prefixes & PREFIX_ES)
7d421014
ILT		 4003 {
4004 oappend ("%es:");
4005 used_prefixes |= PREFIX_ES;
4006 }
252b5132 4007 if (prefixes & PREFIX_FS)
7d421014
ILT		 4008 {
4009 oappend ("%fs:");
4010 used_prefixes |= PREFIX_FS;
4011 }
252b5132 4012 if (prefixes & PREFIX_GS)
7d421014
ILT		 4013 {
4014 oappend ("%gs:");
4015 used_prefixes |= PREFIX_GS;
4016 }
252b5132
RH		 4017}
4018
4019static void
4020OP_indirE (bytemode, sizeflag)
4021 int bytemode;
4022 int sizeflag;
4023{
4024 if (!intel_syntax)
4025 oappend ("*");
4026 OP_E (bytemode, sizeflag);
4027}
4028
52b15da3
JH		 4029static void
4030print_operand_value (buf, hex, disp)
4031 char *buf;
4032 int hex;
4033 bfd_vma disp;
4034{
4035 if (mode_64bit)
4036 {
4037 if (hex)
4038 {
4039 char tmp[30];
4040 int i;
4041 buf[0] = '0';
4042 buf[1] = 'x';
4043 sprintf_vma (tmp, disp);
4044 for (i = 0; tmp[i] == '0' && tmp[i+1]; i++);
4045 strcpy (buf + 2, tmp + i);
4046 }
4047 else
4048 {
4049 bfd_signed_vma v = disp;
4050 char tmp[30];
4051 int i;
4052 if (v < 0)
4053 {
4054 *(buf++) = '-';
4055 v = -disp;
4056 /* Check for possible overflow on 0x8000000000000000 */
4057 if (v < 0)
4058 {
4059 strcpy (buf, "9223372036854775808");
4060 return;
4061 }
4062 }
4063 if (!v)
4064 {
4065 strcpy (buf, "0");
4066 return;
4067 }
4068
4069 i = 0;
4070 tmp[29] = 0;
4071 while (v)
4072 {
4073 tmp[28-i] = (v % 10) + '0';
4074 v /= 10;
4075 i++;
4076 }
4077 strcpy (buf, tmp + 29 - i);
4078 }
4079 }
4080 else
4081 {
4082 if (hex)
4083 sprintf (buf, "0x%x", (unsigned int) disp);
4084 else
4085 sprintf (buf, "%d", (int) disp);
4086 }
4087}
4088
252b5132
RH		 4089static void
4090OP_E (bytemode, sizeflag)
4091 int bytemode;
4092 int sizeflag;
4093{
52b15da3
JH		 4094 bfd_vma disp;
4095 int add = 0;
4096 int riprel = 0;
4097 USED_REX (REX_EXTZ);
4098 if (rex & REX_EXTZ)
4099 add += 8;
252b5132
RH		 4100
4101 /* skip mod/rm byte */
4bba6815 4102 MODRM_CHECK;
252b5132
RH		 4103 codep++;
4104
4105 if (mod == 3)
4106 {
4107 switch (bytemode)
4108 {
4109 case b_mode:
52b15da3
JH		 4110 USED_REX (0);
4111 if (rex)
4112 oappend (names8rex[rm + add]);
4113 else
4114 oappend (names8[rm + add]);
252b5132
RH		 4115 break;
4116 case w_mode:
52b15da3 4117 oappend (names16[rm + add]);
252b5132 4118 break;
2da11e11 4119 case d_mode:
52b15da3
JH		 4120 oappend (names32[rm + add]);
4121 break;
4122 case q_mode:
4123 oappend (names64[rm + add]);
4124 break;
4125 case m_mode:
4126 if (mode_64bit)
4127 oappend (names64[rm + add]);
4128 else
4129 oappend (names32[rm + add]);
2da11e11 4130 break;
252b5132 4131 case v_mode:
52b15da3
JH		 4132 USED_REX (REX_MODE64);
4133 if (rex & REX_MODE64)
4134 oappend (names64[rm + add]);
4135 else if (sizeflag & DFLAG)
4136 oappend (names32[rm + add]);
252b5132 4137 else
52b15da3 4138 oappend (names16[rm + add]);
7d421014 4139 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4140 break;
2da11e11 4141 case 0:
041bd2e0
JH		 4142 if ( !(codep[-2] == 0xAE && codep[-1] == 0xF8 /* sfence */)
4143 && !(codep[-2] == 0xAE && codep[-1] == 0xF0 /* mfence */)
4144 && !(codep[-2] == 0xAE && codep[-1] == 0xe8 /* lfence */))
2da11e11 4145 BadOp(); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */
c608c12e 4146 break;
252b5132 4147 default:
c608c12e 4148 oappend (INTERNAL_DISASSEMBLER_ERROR);
252b5132
RH		 4149 break;
4150 }
4151 return;
4152 }
4153
4154 disp = 0;
4155 append_seg ();
4156
4157 if (sizeflag & AFLAG) /* 32 bit address mode */
4158 {
4159 int havesib;
4160 int havebase;
4161 int base;
4162 int index = 0;
4163 int scale = 0;
4164
4165 havesib = 0;
4166 havebase = 1;
4167 base = rm;
4168
4169 if (base == 4)
4170 {
4171 havesib = 1;
4172 FETCH_DATA (the_info, codep + 1);
4173 scale = (*codep >> 6) & 3;
4174 index = (*codep >> 3) & 7;
4175 base = *codep & 7;
52b15da3
JH		 4176 USED_REX (REX_EXTY);
4177 USED_REX (REX_EXTZ);
4178 if (rex & REX_EXTY)
4179 index += 8;
4180 if (rex & REX_EXTZ)
4181 base += 8;
252b5132
RH		 4182 codep++;
4183 }
4184
4185 switch (mod)
4186 {
4187 case 0:
52b15da3 4188 if ((base & 7) == 5)
252b5132
RH		 4189 {
4190 havebase = 0;
52b15da3
JH		 4191 if (mode_64bit && !havesib)
4192 riprel = 1;
4193 disp = get32s ();
252b5132
RH		 4194 }
4195 break;
4196 case 1:
4197 FETCH_DATA (the_info, codep + 1);
4198 disp = *codep++;
4199 if ((disp & 0x80) != 0)
4200 disp -= 0x100;
4201 break;
4202 case 2:
52b15da3 4203 disp = get32s ();
252b5132
RH		 4204 break;
4205 }
4206
4207 if (!intel_syntax)
52b15da3 4208 if (mod != 0 || (base & 7) == 5)
252b5132 4209 {
52b15da3 4210 print_operand_value (scratchbuf, !riprel, disp);
252b5132 4211 oappend (scratchbuf);
52b15da3
JH		 4212 if (riprel)
4213 {
4214 set_op (disp, 1);
4215 oappend ("(%rip)");
4216 }
252b5132 4217 }
2da11e11 4218
252b5132
RH		 4219 if (havebase || (havesib && (index != 4 || scale != 0)))
4220 {
4221 if (intel_syntax)
4222 {
4223 switch (bytemode)
4224 {
4225 case b_mode:
52b15da3 4226 oappend ("BYTE PTR ");
252b5132
RH		 4227 break;
4228 case w_mode:
52b15da3 4229 oappend ("WORD PTR ");
252b5132
RH		 4230 break;
4231 case v_mode:
52b15da3 4232 oappend ("DWORD PTR ");
252b5132
RH		 4233 break;
4234 case d_mode:
52b15da3 4235 oappend ("QWORD PTR ");
252b5132 4236 break;
52b15da3
JH		 4237 case m_mode:
4238 if (mode_64bit)
4239 oappend ("DWORD PTR ");
4240 else
4241 oappend ("QWORD PTR ");
4242 break;
252b5132 4243 case x_mode:
52b15da3 4244 oappend ("XWORD PTR ");
252b5132
RH		 4245 break;
4246 default:
4247 break;
4248 }
4249 }
4250 *obufp++ = open_char;
52b15da3
JH		 4251 if (intel_syntax && riprel)
4252 oappend ("rip + ");
252b5132 4253 *obufp = '\0';
52b15da3
JH		 4254 USED_REX (REX_EXTZ);
4255 if (!havesib && (rex & REX_EXTZ))
4256 base += 8;
252b5132 4257 if (havebase)
52b15da3 4258 oappend (mode_64bit ? names64[base] : names32[base]);
252b5132
RH		 4259 if (havesib)
4260 {
4261 if (index != 4)
4262 {
4263 if (intel_syntax)
4264 {
4265 if (havebase)
4266 {
4267 *obufp++ = separator_char;
4268 *obufp = '\0';
4269 }
52b15da3 4270 sprintf (scratchbuf, "%s", mode_64bit ? names64[index] : names32[index]);
252b5132
RH		 4271 }
4272 else
52b15da3 4273 sprintf (scratchbuf, ",%s", mode_64bit ? names64[index] : names32[index]);
252b5132
RH		 4274 oappend (scratchbuf);
4275 }
4276 if (!intel_syntax
2da11e11 4277 || (intel_syntax
252b5132
RH		 4278 && bytemode != b_mode
4279 && bytemode != w_mode
4280 && bytemode != v_mode))
4281 {
4282 *obufp++ = scale_char;
4283 *obufp = '\0';
4284 sprintf (scratchbuf, "%d", 1 << scale);
4285 oappend (scratchbuf);
4286 }
4287 }
4288 if (intel_syntax)
52b15da3 4289 if (mod != 0 || (base & 7) == 5)
252b5132
RH		 4290 {
4291 /* Don't print zero displacements */
52b15da3 4292 if (disp != 0)
252b5132 4293 {
52b15da3 4294 print_operand_value (scratchbuf, 0, disp);
252b5132
RH		 4295 oappend (scratchbuf);
4296 }
4297 }
4298
4299 *obufp++ = close_char;
4300 *obufp = '\0';
4301 }
4302 else if (intel_syntax)
4303 {
52b15da3 4304 if (mod != 0 || (base & 7) == 5)
252b5132
RH		 4305 {
4306 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4307 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
4308 ;
4309 else
4310 {
4311 oappend (names_seg[3]);
4312 oappend (":");
4313 }
52b15da3 4314 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 4315 oappend (scratchbuf);
4316 }
4317 }
4318 }
4319 else
4320 { /* 16 bit address mode */
4321 switch (mod)
4322 {
4323 case 0:
52b15da3 4324 if ((rm & 7) == 6)
252b5132
RH		 4325 {
4326 disp = get16 ();
4327 if ((disp & 0x8000) != 0)
4328 disp -= 0x10000;
4329 }
4330 break;
4331 case 1:
4332 FETCH_DATA (the_info, codep + 1);
4333 disp = *codep++;
4334 if ((disp & 0x80) != 0)
4335 disp -= 0x100;
4336 break;
4337 case 2:
4338 disp = get16 ();
4339 if ((disp & 0x8000) != 0)
4340 disp -= 0x10000;
4341 break;
4342 }
4343
4344 if (!intel_syntax)
52b15da3 4345 if (mod != 0 || (rm & 7) == 6)
252b5132 4346 {
52b15da3 4347 print_operand_value (scratchbuf, 0, disp);
252b5132
RH		 4348 oappend (scratchbuf);
4349 }
4350
52b15da3 4351 if (mod != 0 || (rm & 7) != 6)
252b5132
RH		 4352 {
4353 *obufp++ = open_char;
4354 *obufp = '\0';
52b15da3 4355 oappend (index16[rm + add]);
252b5132
RH		 4356 *obufp++ = close_char;
4357 *obufp = '\0';
4358 }
4359 }
4360}
4361
252b5132
RH		 4362static void
4363OP_G (bytemode, sizeflag)
4364 int bytemode;
4365 int sizeflag;
4366{
52b15da3
JH		 4367 int add = 0;
4368 USED_REX (REX_EXTX);
4369 if (rex & REX_EXTX)
4370 add += 8;
252b5132
RH		 4371 switch (bytemode)
4372 {
4373 case b_mode:
52b15da3
JH		 4374 USED_REX (0);
4375 if (rex)
4376 oappend (names8rex[reg + add]);
4377 else
4378 oappend (names8[reg + add]);
252b5132
RH		 4379 break;
4380 case w_mode:
52b15da3 4381 oappend (names16[reg + add]);
252b5132
RH		 4382 break;
4383 case d_mode:
52b15da3
JH		 4384 oappend (names32[reg + add]);
4385 break;
4386 case q_mode:
4387 oappend (names64[reg + add]);
252b5132
RH		 4388 break;
4389 case v_mode:
52b15da3
JH		 4390 USED_REX (REX_MODE64);
4391 if (rex & REX_MODE64)
4392 oappend (names64[reg + add]);
4393 else if (sizeflag & DFLAG)
4394 oappend (names32[reg + add]);
252b5132 4395 else
52b15da3 4396 oappend (names16[reg + add]);
7d421014 4397 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4398 break;
4399 default:
4400 oappend (INTERNAL_DISASSEMBLER_ERROR);
4401 break;
4402 }
4403}
4404
52b15da3
JH		 4405static bfd_vma
4406get64 ()
4407{
4408 unsigned int a = 0;
4409 unsigned int b = 0;
4410 bfd_vma x = 0;
4411
4412#ifdef BFD64
4413 FETCH_DATA (the_info, codep + 8);
4414 a = *codep++ & 0xff;
4415 a |= (*codep++ & 0xff) << 8;
4416 a |= (*codep++ & 0xff) << 16;
4417 a |= (*codep++ & 0xff) << 24;
4418 b |= (*codep++ & 0xff);
4419 b |= (*codep++ & 0xff) << 8;
4420 b |= (*codep++ & 0xff) << 16;
4421 b |= (*codep++ & 0xff) << 24;
4422 x = a + ((bfd_vma) b << 32);
4423#else
4424 abort();
4425#endif
4426 return x;
4427}
4428
4429static bfd_signed_vma
252b5132
RH		 4430get32 ()
4431{
52b15da3 4432 bfd_signed_vma x = 0;
252b5132
RH		 4433
4434 FETCH_DATA (the_info, codep + 4);
52b15da3
JH		 4435 x = *codep++ & (bfd_signed_vma) 0xff;
4436 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4437 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4438 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4439 return x;
4440}
4441
4442static bfd_signed_vma
4443get32s ()
4444{
4445 bfd_signed_vma x = 0;
4446
4447 FETCH_DATA (the_info, codep + 4);
4448 x = *codep++ & (bfd_signed_vma) 0xff;
4449 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4450 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4451 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4452
4453 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
4454
252b5132
RH		 4455 return x;
4456}
4457
4458static int
4459get16 ()
4460{
4461 int x = 0;
4462
4463 FETCH_DATA (the_info, codep + 2);
4464 x = *codep++ & 0xff;
4465 x |= (*codep++ & 0xff) << 8;
4466 return x;
4467}
4468
4469static void
52b15da3 4470set_op (op, riprel)
252b5132 4471 unsigned int op;
52b15da3 4472 int riprel;
252b5132
RH		 4473{
4474 op_index[op_ad] = op_ad;
4475 op_address[op_ad] = op;
52b15da3 4476 op_riprel[op_ad] = riprel;
252b5132
RH		 4477}
4478
4479static void
4480OP_REG (code, sizeflag)
4481 int code;
4482 int sizeflag;
4483{
2da11e11 4484 const char *s;
52b15da3
JH		 4485 int add = 0;
4486 USED_REX (REX_EXTZ);
4487 if (rex & REX_EXTZ)
4488 add = 8;
4489
4490 switch (code)
4491 {
4492 case indir_dx_reg:
4493 s = "(%dx)";
4494 break;
4495 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4496 case sp_reg: case bp_reg: case si_reg: case di_reg:
4497 s = names16[code - ax_reg + add];
4498 break;
4499 case es_reg: case ss_reg: case cs_reg:
4500 case ds_reg: case fs_reg: case gs_reg:
4501 s = names_seg[code - es_reg + add];
4502 break;
4503 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4504 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
4505 USED_REX (0);
4506 if (rex)
4507 s = names8rex[code - al_reg + add];
4508 else
4509 s = names8[code - al_reg];
4510 break;
4511 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4512 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
4513 USED_REX (REX_MODE64);
4514 if (rex & REX_MODE64)
4515 s = names64[code - eAX_reg + add];
4516 else if (sizeflag & DFLAG)
4517 s = names32[code - eAX_reg + add];
4518 else
4519 s = names16[code - eAX_reg + add];
4520 used_prefixes |= (prefixes & PREFIX_DATA);
4521 break;
4522 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
4523 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
4524 s = names64[code - rAX_reg + add];
4525 break;
4526 default:
4527 s = INTERNAL_DISASSEMBLER_ERROR;
4528 break;
4529 }
4530 oappend (s);
4531}
4532
4533static void
4534OP_IMREG (code, sizeflag)
4535 int code;
4536 int sizeflag;
4537{
4538 const char *s;
252b5132
RH		 4539
4540 switch (code)
4541 {
4542 case indir_dx_reg:
4543 s = "(%dx)";
4544 break;
4545 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4546 case sp_reg: case bp_reg: case si_reg: case di_reg:
4547 s = names16[code - ax_reg];
4548 break;
4549 case es_reg: case ss_reg: case cs_reg:
4550 case ds_reg: case fs_reg: case gs_reg:
4551 s = names_seg[code - es_reg];
4552 break;
4553 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4554 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
52b15da3
JH		 4555 USED_REX (0);
4556 if (rex)
4557 s = names8rex[code - al_reg];
4558 else
4559 s = names8[code - al_reg];
252b5132
RH		 4560 break;
4561 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4562 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
52b15da3
JH		 4563 USED_REX (REX_MODE64);
4564 if (rex & REX_MODE64)
4565 s = names64[code - eAX_reg];
4566 else if (sizeflag & DFLAG)
252b5132
RH		 4567 s = names32[code - eAX_reg];
4568 else
4569 s = names16[code - eAX_reg];
7d421014 4570 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4571 break;
4572 default:
4573 s = INTERNAL_DISASSEMBLER_ERROR;
4574 break;
4575 }
4576 oappend (s);
4577}
4578
4579static void
4580OP_I (bytemode, sizeflag)
4581 int bytemode;
4582 int sizeflag;
4583{
52b15da3
JH		 4584 bfd_signed_vma op;
4585 bfd_signed_vma mask = -1;
252b5132
RH		 4586
4587 switch (bytemode)
4588 {
4589 case b_mode:
4590 FETCH_DATA (the_info, codep + 1);
52b15da3
JH		 4591 op = *codep++;
4592 mask = 0xff;
4593 break;
4594 case q_mode:
4595 op = get32s ();
252b5132
RH		 4596 break;
4597 case v_mode:
52b15da3
JH		 4598 USED_REX (REX_MODE64);
4599 if (rex & REX_MODE64)
4600 op = get32s ();
4601 else if (sizeflag & DFLAG)
4602 {
4603 op = get32 ();
4604 mask = 0xffffffff;
4605 }
252b5132 4606 else
52b15da3
JH		 4607 {
4608 op = get16 ();
4609 mask = 0xfffff;
4610 }
7d421014 4611 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4612 break;
4613 case w_mode:
52b15da3 4614 mask = 0xfffff;
252b5132
RH		 4615 op = get16 ();
4616 break;
4617 default:
4618 oappend (INTERNAL_DISASSEMBLER_ERROR);
4619 return;
4620 }
4621
52b15da3
JH		 4622 op &= mask;
4623 scratchbuf[0] = '$';
4624 print_operand_value (scratchbuf + !intel_syntax, 1, op);
4625 oappend (scratchbuf);
4626 scratchbuf[0] = '\0';
4627}
4628
4629static void
4630OP_I64 (bytemode, sizeflag)
4631 int bytemode;
4632 int sizeflag;
4633{
4634 bfd_signed_vma op;
4635 bfd_signed_vma mask = -1;
4636
4637 switch (bytemode)
4638 {
4639 case b_mode:
4640 FETCH_DATA (the_info, codep + 1);
4641 op = *codep++;
4642 mask = 0xff;
4643 break;
4644 case v_mode:
4645 USED_REX (REX_MODE64);
4646 if (rex & REX_MODE64)
4647 op = get64 ();
4648 else if (sizeflag & DFLAG)
4649 {
4650 op = get32 ();
4651 mask = 0xffffffff;
4652 }
4653 else
4654 {
4655 op = get16 ();
4656 mask = 0xfffff;
4657 }
4658 used_prefixes |= (prefixes & PREFIX_DATA);
4659 break;
4660 case w_mode:
4661 mask = 0xfffff;
4662 op = get16 ();
4663 break;
4664 default:
4665 oappend (INTERNAL_DISASSEMBLER_ERROR);
4666 return;
4667 }
4668
4669 op &= mask;
4670 scratchbuf[0] = '$';
4671 print_operand_value (scratchbuf + !intel_syntax, 1, op);
252b5132
RH		 4672 oappend (scratchbuf);
4673 scratchbuf[0] = '\0';
4674}
4675
4676static void
4677OP_sI (bytemode, sizeflag)
4678 int bytemode;
4679 int sizeflag;
4680{
52b15da3
JH		 4681 bfd_signed_vma op;
4682 bfd_signed_vma mask = -1;
252b5132
RH		 4683
4684 switch (bytemode)
4685 {
4686 case b_mode:
4687 FETCH_DATA (the_info, codep + 1);
4688 op = *codep++;
4689 if ((op & 0x80) != 0)
4690 op -= 0x100;
52b15da3 4691 mask = 0xffffffff;
252b5132
RH		 4692 break;
4693 case v_mode:
52b15da3
JH		 4694 USED_REX (REX_MODE64);
4695 if (rex & REX_MODE64)
4696 op = get32s ();
4697 else if (sizeflag & DFLAG)
4698 {
4699 op = get32s ();
4700 mask = 0xffffffff;
4701 }
252b5132
RH		 4702 else
4703 {
52b15da3 4704 mask = 0xffffffff;
252b5132
RH		 4705 op = get16();
4706 if ((op & 0x8000) != 0)
4707 op -= 0x10000;
4708 }
7d421014 4709 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4710 break;
4711 case w_mode:
4712 op = get16 ();
52b15da3 4713 mask = 0xffffffff;
252b5132
RH		 4714 if ((op & 0x8000) != 0)
4715 op -= 0x10000;
4716 break;
4717 default:
4718 oappend (INTERNAL_DISASSEMBLER_ERROR);
4719 return;
4720 }
52b15da3
JH		 4721
4722 scratchbuf[0] = '$';
4723 print_operand_value (scratchbuf + 1, 1, op);
252b5132
RH		 4724 oappend (scratchbuf);
4725}
4726
4727static void
4728OP_J (bytemode, sizeflag)
4729 int bytemode;
4730 int sizeflag;
4731{
52b15da3 4732 bfd_vma disp;
252b5132
RH		 4733 int mask = -1;
4734
4735 switch (bytemode)
4736 {
4737 case b_mode:
4738 FETCH_DATA (the_info, codep + 1);
4739 disp = *codep++;
4740 if ((disp & 0x80) != 0)
4741 disp -= 0x100;
4742 break;
4743 case v_mode:
4744 if (sizeflag & DFLAG)
52b15da3 4745 disp = get32s ();
252b5132
RH		 4746 else
4747 {
4748 disp = get16 ();
4749 /* for some reason, a data16 prefix on a jump instruction
4750 means that the pc is masked to 16 bits after the
4751 displacement is added! */
4752 mask = 0xffff;
4753 }
4754 break;
4755 default:
4756 oappend (INTERNAL_DISASSEMBLER_ERROR);
4757 return;
4758 }
4759 disp = (start_pc + codep - start_codep + disp) & mask;
52b15da3
JH		 4760 set_op (disp, 0);
4761 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 4762 oappend (scratchbuf);
4763}
4764
4765/* ARGSUSED */
4766static void
4767OP_SEG (dummy, sizeflag)
57d91c3c
ILT		 4768 int dummy ATTRIBUTE_UNUSED;
4769 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 4770{
4771 static char *sreg[] = {
4772 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
4773 };
4774
4775 oappend (sreg[reg]);
4776}
4777
c608c12e 4778/* ARGSUSED */
252b5132 4779static void
c608c12e 4780OP_DIR (dummy, sizeflag)
57d91c3c 4781 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 4782 int sizeflag;
4783{
4784 int seg, offset;
4785
c608c12e 4786 if (sizeflag & DFLAG)
252b5132 4787 {
c608c12e
AM		 4788 offset = get32 ();
4789 seg = get16 ();
252b5132 4790 }
c608c12e
AM		 4791 else
4792 {
4793 offset = get16 ();
4794 seg = get16 ();
4795 }
7d421014 4796 used_prefixes |= (prefixes & PREFIX_DATA);
c608c12e
AM		 4797 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
4798 oappend (scratchbuf);
252b5132
RH		 4799}
4800
4801/* ARGSUSED */
4802static void
52b15da3
JH		 4803OP_OFF (ignored, sizeflag)
4804 int ignored ATTRIBUTE_UNUSED;
252b5132
RH		 4805 int sizeflag;
4806{
52b15da3 4807 bfd_vma off;
252b5132
RH		 4808
4809 append_seg ();
4810
4811 if (sizeflag & AFLAG)
4812 off = get32 ();
4813 else
4814 off = get16 ();
4815
4816 if (intel_syntax)
4817 {
4818 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4819 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
4820 {
4821 oappend (names_seg[3]);
4822 oappend (":");
4823 }
4824 }
52b15da3
JH		 4825 print_operand_value (scratchbuf, 1, off);
4826 oappend (scratchbuf);
4827}
4828/* ARGSUSED */
4829static void
4830OP_OFF64 (ignored, sizeflag)
4831 int ignored ATTRIBUTE_UNUSED;
4832 int sizeflag ATTRIBUTE_UNUSED;
4833{
4834 bfd_vma off;
4835
4836 append_seg ();
4837
4838 off = get64();
4839
4840 if (intel_syntax)
4841 {
4842 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4843 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
4844 {
4845 oappend (names_seg[3]);
4846 oappend (":");
4847 }
4848 }
4849 print_operand_value (scratchbuf, 1, off);
252b5132
RH		 4850 oappend (scratchbuf);
4851}
4852
4853static void
4854ptr_reg (code, sizeflag)
4855 int code;
4856 int sizeflag;
4857{
2da11e11 4858 const char *s;
252b5132 4859 oappend ("(");
52b15da3
JH		 4860 USED_REX (REX_MODE64);
4861 if (rex & REX_MODE64)
4862 s = names64[code - eAX_reg];
4863 else if (sizeflag & AFLAG)
252b5132
RH		 4864 s = names32[code - eAX_reg];
4865 else
4866 s = names16[code - eAX_reg];
4867 oappend (s);
4868 oappend (")");
4869}
4870
4871static void
4872OP_ESreg (code, sizeflag)
4873 int code;
4874 int sizeflag;
4875{
4876 oappend ("%es:");
4877 ptr_reg (code, sizeflag);
4878}
4879
4880static void
4881OP_DSreg (code, sizeflag)
4882 int code;
4883 int sizeflag;
4884{
4885 if ((prefixes
4886 & (PREFIX_CS
4887 | PREFIX_DS
4888 | PREFIX_SS
4889 | PREFIX_ES
4890 | PREFIX_FS
4891 | PREFIX_GS)) == 0)
4892 prefixes |= PREFIX_DS;
4893 append_seg();
4894 ptr_reg (code, sizeflag);
4895}
4896
252b5132
RH		 4897/* ARGSUSED */
4898static void
4899OP_C (dummy, sizeflag)
57d91c3c
ILT		 4900 int dummy ATTRIBUTE_UNUSED;
4901 int sizeflag ATTRIBUTE_UNUSED;
252b5132 4902{
52b15da3
JH		 4903 int add = 0;
4904 USED_REX (REX_EXTX);
4905 if (rex & REX_EXTX)
4906 add = 8;
4907 sprintf (scratchbuf, "%%cr%d", reg+add);
252b5132
RH		 4908 oappend (scratchbuf);
4909}
4910
4911/* ARGSUSED */
4912static void
4913OP_D (dummy, sizeflag)
57d91c3c
ILT		 4914 int dummy ATTRIBUTE_UNUSED;
4915 int sizeflag ATTRIBUTE_UNUSED;
252b5132 4916{
52b15da3
JH		 4917 int add = 0;
4918 USED_REX (REX_EXTX);
4919 if (rex & REX_EXTX)
4920 add = 8;
4921 sprintf (scratchbuf, "%%db%d", reg+add);
252b5132
RH		 4922 oappend (scratchbuf);
4923}
4924
4925/* ARGSUSED */
4926static void
4927OP_T (dummy, sizeflag)
57d91c3c
ILT		 4928 int dummy ATTRIBUTE_UNUSED;
4929 int sizeflag ATTRIBUTE_UNUSED;
252b5132 4930{
252b5132
RH		 4931 sprintf (scratchbuf, "%%tr%d", reg);
4932 oappend (scratchbuf);
4933}
4934
4935static void
2da11e11 4936OP_Rd (bytemode, sizeflag)
252b5132
RH		 4937 int bytemode;
4938 int sizeflag;
4939{
2da11e11
AM		 4940 if (mod == 3)
4941 OP_E (bytemode, sizeflag);
4942 else
4943 BadOp();
252b5132
RH		 4944}
4945
4946static void
4947OP_MMX (ignore, sizeflag)
57d91c3c
ILT		 4948 int ignore ATTRIBUTE_UNUSED;
4949 int sizeflag ATTRIBUTE_UNUSED;
252b5132 4950{
041bd2e0
JH		 4951 int add = 0;
4952 USED_REX (REX_EXTX);
4953 if (rex & REX_EXTX)
4954 add = 8;
4955 used_prefixes |= (prefixes & PREFIX_DATA);
4956 if (prefixes & PREFIX_DATA)
4957 sprintf (scratchbuf, "%%xmm%d", reg + add);
4958 else
4959 sprintf (scratchbuf, "%%mm%d", reg + add);
252b5132
RH		 4960 oappend (scratchbuf);
4961}
4962
c608c12e
AM		 4963static void
4964OP_XMM (bytemode, sizeflag)
57d91c3c
ILT		 4965 int bytemode ATTRIBUTE_UNUSED;
4966 int sizeflag ATTRIBUTE_UNUSED;
c608c12e 4967{
041bd2e0
JH		 4968 int add = 0;
4969 USED_REX (REX_EXTX);
4970 if (rex & REX_EXTX)
4971 add = 8;
4972 sprintf (scratchbuf, "%%xmm%d", reg + add);
c608c12e
AM		 4973 oappend (scratchbuf);
4974}
4975
252b5132
RH		 4976static void
4977OP_EM (bytemode, sizeflag)
4978 int bytemode;
4979 int sizeflag;
4980{
041bd2e0 4981 int add = 0;
252b5132
RH		 4982 if (mod != 3)
4983 {
4984 OP_E (bytemode, sizeflag);
4985 return;
4986 }
041bd2e0
JH		 4987 USED_REX (REX_EXTZ);
4988 if (rex & REX_EXTZ)
4989 add = 8;
252b5132 4990
4bba6815
AM		 4991 /* skip mod/rm byte */
4992 MODRM_CHECK;
252b5132 4993 codep++;
041bd2e0
JH		 4994 used_prefixes |= (prefixes & PREFIX_DATA);
4995 if (prefixes & PREFIX_DATA)
4996 sprintf (scratchbuf, "%%xmm%d", rm + add);
4997 else
4998 sprintf (scratchbuf, "%%mm%d", rm + add);
252b5132
RH		 4999 oappend (scratchbuf);
5000}
5001
c608c12e
AM		 5002static void
5003OP_EX (bytemode, sizeflag)
5004 int bytemode;
5005 int sizeflag;
5006{
041bd2e0 5007 int add = 0;
c608c12e
AM		 5008 if (mod != 3)
5009 {
5010 OP_E (bytemode, sizeflag);
5011 return;
5012 }
041bd2e0
JH		 5013 USED_REX (REX_EXTZ);
5014 if (rex & REX_EXTZ)
5015 add = 8;
c608c12e 5016
4bba6815
AM		 5017 /* skip mod/rm byte */
5018 MODRM_CHECK;
c608c12e 5019 codep++;
041bd2e0 5020 sprintf (scratchbuf, "%%xmm%d", rm + add);
c608c12e
AM		 5021 oappend (scratchbuf);
5022}
5023
252b5132 5024static void
2da11e11
AM		 5025OP_MS (bytemode, sizeflag)
5026 int bytemode;
252b5132
RH		 5027 int sizeflag;
5028{
2da11e11
AM		 5029 if (mod == 3)
5030 OP_EM (bytemode, sizeflag);
5031 else
5032 BadOp();
252b5132
RH		 5033}
5034
992aaec9
AM		 5035static void
5036OP_XS (bytemode, sizeflag)
5037 int bytemode;
5038 int sizeflag;
5039{
5040 if (mod == 3)
5041 OP_EX (bytemode, sizeflag);
5042 else
5043 BadOp();
5044}
5045
252b5132
RH		 5046static const char *Suffix3DNow[] = {
5047/* 00 */ NULL, NULL, NULL, NULL,
5048/* 04 */ NULL, NULL, NULL, NULL,
5049/* 08 */ NULL, NULL, NULL, NULL,
9e525108 5050/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
252b5132
RH		 5051/* 10 */ NULL, NULL, NULL, NULL,
5052/* 14 */ NULL, NULL, NULL, NULL,
5053/* 18 */ NULL, NULL, NULL, NULL,
9e525108 5054/* 1C */ "pf2iw", "pf2id", NULL, NULL,
252b5132
RH		 5055/* 20 */ NULL, NULL, NULL, NULL,
5056/* 24 */ NULL, NULL, NULL, NULL,
5057/* 28 */ NULL, NULL, NULL, NULL,
5058/* 2C */ NULL, NULL, NULL, NULL,
5059/* 30 */ NULL, NULL, NULL, NULL,
5060/* 34 */ NULL, NULL, NULL, NULL,
5061/* 38 */ NULL, NULL, NULL, NULL,
5062/* 3C */ NULL, NULL, NULL, NULL,
5063/* 40 */ NULL, NULL, NULL, NULL,
5064/* 44 */ NULL, NULL, NULL, NULL,
5065/* 48 */ NULL, NULL, NULL, NULL,
5066/* 4C */ NULL, NULL, NULL, NULL,
5067/* 50 */ NULL, NULL, NULL, NULL,
5068/* 54 */ NULL, NULL, NULL, NULL,
5069/* 58 */ NULL, NULL, NULL, NULL,
5070/* 5C */ NULL, NULL, NULL, NULL,
5071/* 60 */ NULL, NULL, NULL, NULL,
5072/* 64 */ NULL, NULL, NULL, NULL,
5073/* 68 */ NULL, NULL, NULL, NULL,
5074/* 6C */ NULL, NULL, NULL, NULL,
5075/* 70 */ NULL, NULL, NULL, NULL,
5076/* 74 */ NULL, NULL, NULL, NULL,
5077/* 78 */ NULL, NULL, NULL, NULL,
5078/* 7C */ NULL, NULL, NULL, NULL,
5079/* 80 */ NULL, NULL, NULL, NULL,
5080/* 84 */ NULL, NULL, NULL, NULL,
9e525108
AM		 5081/* 88 */ NULL, NULL, "pfnacc", NULL,
5082/* 8C */ NULL, NULL, "pfpnacc", NULL,
252b5132
RH		 5083/* 90 */ "pfcmpge", NULL, NULL, NULL,
5084/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
5085/* 98 */ NULL, NULL, "pfsub", NULL,
5086/* 9C */ NULL, NULL, "pfadd", NULL,
5087/* A0 */ "pfcmpgt", NULL, NULL, NULL,
5088/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
5089/* A8 */ NULL, NULL, "pfsubr", NULL,
5090/* AC */ NULL, NULL, "pfacc", NULL,
5091/* B0 */ "pfcmpeq", NULL, NULL, NULL,
5092/* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
9e525108 5093/* B8 */ NULL, NULL, NULL, "pswapd",
252b5132
RH		 5094/* BC */ NULL, NULL, NULL, "pavgusb",
5095/* C0 */ NULL, NULL, NULL, NULL,
5096/* C4 */ NULL, NULL, NULL, NULL,
5097/* C8 */ NULL, NULL, NULL, NULL,
5098/* CC */ NULL, NULL, NULL, NULL,
5099/* D0 */ NULL, NULL, NULL, NULL,
5100/* D4 */ NULL, NULL, NULL, NULL,
5101/* D8 */ NULL, NULL, NULL, NULL,
5102/* DC */ NULL, NULL, NULL, NULL,
5103/* E0 */ NULL, NULL, NULL, NULL,
5104/* E4 */ NULL, NULL, NULL, NULL,
5105/* E8 */ NULL, NULL, NULL, NULL,
5106/* EC */ NULL, NULL, NULL, NULL,
5107/* F0 */ NULL, NULL, NULL, NULL,
5108/* F4 */ NULL, NULL, NULL, NULL,
5109/* F8 */ NULL, NULL, NULL, NULL,
5110/* FC */ NULL, NULL, NULL, NULL,
5111};
5112
5113static void
5114OP_3DNowSuffix (bytemode, sizeflag)
57d91c3c
ILT		 5115 int bytemode ATTRIBUTE_UNUSED;
5116 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 5117{
5118 const char *mnemonic;
5119
5120 FETCH_DATA (the_info, codep + 1);
5121 /* AMD 3DNow! instructions are specified by an opcode suffix in the
5122 place where an 8-bit immediate would normally go. ie. the last
5123 byte of the instruction. */
2da11e11 5124 obufp = obuf + strlen(obuf);
c608c12e 5125 mnemonic = Suffix3DNow[*codep++ & 0xff];
252b5132 5126 if (mnemonic)
2da11e11 5127 oappend (mnemonic);
252b5132
RH		 5128 else
5129 {
5130 /* Since a variable sized modrm/sib chunk is between the start
5131 of the opcode (0x0f0f) and the opcode suffix, we need to do
5132 all the modrm processing first, and don't know until now that
5133 we have a bad opcode. This necessitates some cleaning up. */
2da11e11
AM		 5134 op1out[0] = '\0';
5135 op2out[0] = '\0';
5136 BadOp();
252b5132
RH		 5137 }
5138}
c608c12e
AM		 5139
5140
5141static const char *simd_cmp_op [] = {
5142 "eq",
5143 "lt",
5144 "le",
5145 "unord",
5146 "neq",
5147 "nlt",
5148 "nle",
5149 "ord"
5150};
5151
5152static void
5153OP_SIMD_Suffix (bytemode, sizeflag)
57d91c3c
ILT		 5154 int bytemode ATTRIBUTE_UNUSED;
5155 int sizeflag ATTRIBUTE_UNUSED;
c608c12e
AM		 5156{
5157 unsigned int cmp_type;
5158
5159 FETCH_DATA (the_info, codep + 1);
2da11e11 5160 obufp = obuf + strlen(obuf);
c608c12e
AM		 5161 cmp_type = *codep++ & 0xff;
5162 if (cmp_type < 8)
5163 {
041bd2e0
JH		 5164 char suffix1 = 'p', suffix2 = 's';
5165 used_prefixes |= (prefixes & PREFIX_REPZ);
5166 if (prefixes & PREFIX_REPZ)
5167 suffix1 = 's';
5168 else
5169 {
5170 used_prefixes |= (prefixes & PREFIX_DATA);
5171 if (prefixes & PREFIX_DATA)
5172 suffix2 = 'd';
5173 else
5174 {
5175 used_prefixes |= (prefixes & PREFIX_REPNZ);
5176 if (prefixes & PREFIX_REPNZ)
5177 suffix1 = 's', suffix2 = 'd';
5178 }
5179 }
5180 sprintf (scratchbuf, "cmp%s%c%c",
5181 simd_cmp_op[cmp_type], suffix1, suffix2);
7d421014 5182 used_prefixes |= (prefixes & PREFIX_REPZ);
2da11e11 5183 oappend (scratchbuf);
c608c12e
AM		 5184 }
5185 else
5186 {
5187 /* We have a bad extension byte. Clean up. */
2da11e11
AM		 5188 op1out[0] = '\0';
5189 op2out[0] = '\0';
5190 BadOp();
c608c12e
AM		 5191 }
5192}
5193
5194static void
5195SIMD_Fixup (extrachar, sizeflag)
5196 int extrachar;
57d91c3c 5197 int sizeflag ATTRIBUTE_UNUSED;
c608c12e
AM		 5198{
5199 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
5200 forms of these instructions. */
5201 if (mod == 3)
5202 {
5203 char *p = obuf + strlen(obuf);
5204 *(p+1) = '\0';
5205 *p = *(p-1);
5206 *(p-1) = *(p-2);
5207 *(p-2) = *(p-3);
5208 *(p-3) = extrachar;
5209 }
5210}
2da11e11
AM		 5211
5212static void BadOp (void)
5213{
5214 codep = insn_codep + 1; /* throw away prefixes and 1st. opcode byte */
5215 oappend ("(bad)");
5216}
GDB Binutils - Deliverables
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