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2001-05-12 H.J. Lu <hjl@gnu.org>
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
CommitLineData
252b5132 1/* Print i386 instructions for GDB, the GNU debugger.
060d22b0
NC		 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001
252b5132
RH		 4 Free Software Foundation, Inc.
5
6This file is part of GDB.
7
8This program is free software; you can redistribute it and/or modify
9it under the terms of the GNU General Public License as published by
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
12
13This program is distributed in the hope that it will be useful,
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
19along with this program; if not, write to the Free Software
20Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21
22/*
23 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 * July 1988
25 * modified by John Hassey (hassey@dg-rtp.dg.com)
52b15da3 26 * x86-64 support added by Jan Hubicka (jh@suse.cz)
252b5132
RH		 27 */
28
29/*
30 * The main tables describing the instructions is essentially a copy
31 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
32 * Programmers Manual. Usually, there is a capital letter, followed
33 * by a small letter. The capital letter tell the addressing mode,
34 * and the small letter tells about the operand size. Refer to
35 * the Intel manual for details.
36 */
37
38#include "dis-asm.h"
39#include "sysdep.h"
40#include "opintl.h"
41
42#define MAXLEN 20
43
44#include <setjmp.h>
45
46#ifndef UNIXWARE_COMPAT
47/* Set non-zero for broken, compatible instructions. Set to zero for
48 non-broken opcodes. */
49#define UNIXWARE_COMPAT 1
50#endif
51
252b5132
RH		 52static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *));
53
54struct dis_private
55{
56 /* Points to first byte not fetched. */
57 bfd_byte *max_fetched;
58 bfd_byte the_buffer[MAXLEN];
59 bfd_vma insn_start;
60 jmp_buf bailout;
61};
62
5076851f
ILT		 63/* The opcode for the fwait instruction, which we treat as a prefix
64 when we can. */
65#define FWAIT_OPCODE (0x9b)
66
52b15da3
JH		 67/* Set to 1 for 64bit mode disassembly. */
68static int mode_64bit;
69
5076851f
ILT		 70/* Flags for the prefixes for the current instruction. See below. */
71static int prefixes;
72
52b15da3
JH		 73/* REX prefix the current instruction. See below. */
74static int rex;
75/* Bits of REX we've already used. */
76static int rex_used;
77#define REX_MODE64 8
78#define REX_EXTX 4
79#define REX_EXTY 2
80#define REX_EXTZ 1
81/* Mark parts used in the REX prefix. When we are testing for
82 empty prefix (for 8bit register REX extension), just mask it
83 out. Otherwise test for REX bit is excuse for existence of REX
84 only in case value is nonzero. */
85#define USED_REX(value) \
86 { \
87 if (value) \
88 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
89 else \
90 rex_used |= 0x40; \
91 }
92
7d421014
ILT		 93/* Flags for prefixes which we somehow handled when printing the
94 current instruction. */
95static int used_prefixes;
96
5076851f
ILT		 97/* Flags stored in PREFIXES. */
98#define PREFIX_REPZ 1
99#define PREFIX_REPNZ 2
100#define PREFIX_LOCK 4
101#define PREFIX_CS 8
102#define PREFIX_SS 0x10
103#define PREFIX_DS 0x20
104#define PREFIX_ES 0x40
105#define PREFIX_FS 0x80
106#define PREFIX_GS 0x100
107#define PREFIX_DATA 0x200
108#define PREFIX_ADDR 0x400
109#define PREFIX_FWAIT 0x800
110
252b5132
RH		 111/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
112 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
113 on error. */
114#define FETCH_DATA(info, addr) \
115 ((addr) <= ((struct dis_private *)(info->private_data))->max_fetched \
116 ? 1 : fetch_data ((info), (addr)))
117
118static int
119fetch_data (info, addr)
120 struct disassemble_info *info;
121 bfd_byte *addr;
122{
123 int status;
124 struct dis_private *priv = (struct dis_private *)info->private_data;
125 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
126
127 status = (*info->read_memory_func) (start,
128 priv->max_fetched,
129 addr - priv->max_fetched,
130 info);
131 if (status != 0)
132 {
7d421014
ILT		 133 /* If we did manage to read at least one byte, then
134 print_insn_i386 will do something sensible. Otherwise, print
135 an error. We do that here because this is where we know
136 STATUS. */
137 if (priv->max_fetched == priv->the_buffer)
5076851f 138 (*info->memory_error_func) (status, start, info);
252b5132
RH		 139 longjmp (priv->bailout, 1);
140 }
141 else
142 priv->max_fetched = addr;
143 return 1;
144}
145
57d91c3c
ILT		 146#define XX NULL, 0
147
252b5132 148#define Eb OP_E, b_mode
52b15da3
JH		 149#define Ev OP_E, v_mode
150#define Ed OP_E, d_mode
252b5132 151#define indirEb OP_indirE, b_mode
252b5132
RH		 152#define indirEv OP_indirE, v_mode
153#define Ew OP_E, w_mode
154#define Ma OP_E, v_mode
2da11e11
AM		 155#define M OP_E, 0 /* lea */
156#define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
992aaec9 157#define Gb OP_G, b_mode
252b5132 158#define Gv OP_G, v_mode
992aaec9 159#define Gd OP_G, d_mode
252b5132 160#define Gw OP_G, w_mode
2da11e11 161#define Rd OP_Rd, d_mode
52b15da3 162#define Rm OP_Rd, m_mode
252b5132
RH		 163#define Ib OP_I, b_mode
164#define sIb OP_sI, b_mode /* sign extened byte */
165#define Iv OP_I, v_mode
52b15da3
JH		 166#define Iq OP_I, q_mode
167#define Iv64 OP_I64, v_mode
252b5132
RH		 168#define Iw OP_I, w_mode
169#define Jb OP_J, b_mode
170#define Jv OP_J, v_mode
52b15da3
JH		 171#define Cm OP_C, m_mode
172#define Dm OP_D, m_mode
252b5132
RH		 173#define Td OP_T, d_mode
174
52b15da3
JH		 175#define RMeAX OP_REG, eAX_reg
176#define RMeBX OP_REG, eBX_reg
177#define RMeCX OP_REG, eCX_reg
178#define RMeDX OP_REG, eDX_reg
179#define RMeSP OP_REG, eSP_reg
180#define RMeBP OP_REG, eBP_reg
181#define RMeSI OP_REG, eSI_reg
182#define RMeDI OP_REG, eDI_reg
183#define RMrAX OP_REG, rAX_reg
184#define RMrBX OP_REG, rBX_reg
185#define RMrCX OP_REG, rCX_reg
186#define RMrDX OP_REG, rDX_reg
187#define RMrSP OP_REG, rSP_reg
188#define RMrBP OP_REG, rBP_reg
189#define RMrSI OP_REG, rSI_reg
190#define RMrDI OP_REG, rDI_reg
191#define RMAL OP_REG, al_reg
192#define RMAL OP_REG, al_reg
193#define RMCL OP_REG, cl_reg
194#define RMDL OP_REG, dl_reg
195#define RMBL OP_REG, bl_reg
196#define RMAH OP_REG, ah_reg
197#define RMCH OP_REG, ch_reg
198#define RMDH OP_REG, dh_reg
199#define RMBH OP_REG, bh_reg
200#define RMAX OP_REG, ax_reg
201#define RMDX OP_REG, dx_reg
202
203#define eAX OP_IMREG, eAX_reg
204#define eBX OP_IMREG, eBX_reg
205#define eCX OP_IMREG, eCX_reg
206#define eDX OP_IMREG, eDX_reg
207#define eSP OP_IMREG, eSP_reg
208#define eBP OP_IMREG, eBP_reg
209#define eSI OP_IMREG, eSI_reg
210#define eDI OP_IMREG, eDI_reg
211#define AL OP_IMREG, al_reg
212#define AL OP_IMREG, al_reg
213#define CL OP_IMREG, cl_reg
214#define DL OP_IMREG, dl_reg
215#define BL OP_IMREG, bl_reg
216#define AH OP_IMREG, ah_reg
217#define CH OP_IMREG, ch_reg
218#define DH OP_IMREG, dh_reg
219#define BH OP_IMREG, bh_reg
220#define AX OP_IMREG, ax_reg
221#define DX OP_IMREG, dx_reg
222#define indirDX OP_IMREG, indir_dx_reg
252b5132
RH		 223
224#define Sw OP_SEG, w_mode
c608c12e 225#define Ap OP_DIR, 0
252b5132 226#define Ob OP_OFF, b_mode
52b15da3 227#define Ob64 OP_OFF64, b_mode
252b5132 228#define Ov OP_OFF, v_mode
52b15da3 229#define Ov64 OP_OFF64, v_mode
252b5132
RH		 230#define Xb OP_DSreg, eSI_reg
231#define Xv OP_DSreg, eSI_reg
232#define Yb OP_ESreg, eDI_reg
233#define Yv OP_ESreg, eDI_reg
234#define DSBX OP_DSreg, eBX_reg
235
236#define es OP_REG, es_reg
237#define ss OP_REG, ss_reg
238#define cs OP_REG, cs_reg
239#define ds OP_REG, ds_reg
240#define fs OP_REG, fs_reg
241#define gs OP_REG, gs_reg
242
243#define MX OP_MMX, 0
c608c12e 244#define XM OP_XMM, 0
252b5132 245#define EM OP_EM, v_mode
c608c12e 246#define EX OP_EX, v_mode
2da11e11 247#define MS OP_MS, v_mode
992aaec9 248#define XS OP_XS, v_mode
c608c12e 249#define None OP_E, 0
252b5132 250#define OPSUF OP_3DNowSuffix, 0
c608c12e 251#define OPSIMD OP_SIMD_Suffix, 0
252b5132
RH		 252
253/* bits in sizeflag */
254#if 0 /* leave undefined until someone adds the extra flag to objdump */
255#define SUFFIX_ALWAYS 4
256#endif
257#define AFLAG 2
258#define DFLAG 1
259
2da11e11 260typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag));
252b5132
RH		 261
262static void OP_E PARAMS ((int, int));
263static void OP_G PARAMS ((int, int));
264static void OP_I PARAMS ((int, int));
52b15da3
JH		 265static void OP_I64 PARAMS ((int, int));
266static void OP_OFF PARAMS ((int, int));
267static void OP_REG PARAMS ((int, int));
268static void OP_IMREG PARAMS ((int, int));
269static void OP_OFF64 PARAMS ((int, int));
252b5132
RH		 270static void OP_indirE PARAMS ((int, int));
271static void OP_sI PARAMS ((int, int));
272static void OP_REG PARAMS ((int, int));
273static void OP_J PARAMS ((int, int));
274static void OP_DIR PARAMS ((int, int));
275static void OP_OFF PARAMS ((int, int));
276static void OP_ESreg PARAMS ((int, int));
277static void OP_DSreg PARAMS ((int, int));
278static void OP_SEG PARAMS ((int, int));
279static void OP_C PARAMS ((int, int));
280static void OP_D PARAMS ((int, int));
281static void OP_T PARAMS ((int, int));
2da11e11 282static void OP_Rd PARAMS ((int, int));
252b5132
RH		 283static void OP_ST PARAMS ((int, int));
284static void OP_STi PARAMS ((int, int));
252b5132 285static void OP_MMX PARAMS ((int, int));
c608c12e 286static void OP_XMM PARAMS ((int, int));
252b5132 287static void OP_EM PARAMS ((int, int));
c608c12e 288static void OP_EX PARAMS ((int, int));
252b5132 289static void OP_MS PARAMS ((int, int));
992aaec9 290static void OP_XS PARAMS ((int, int));
252b5132 291static void OP_3DNowSuffix PARAMS ((int, int));
c608c12e
AM		 292static void OP_SIMD_Suffix PARAMS ((int, int));
293static void SIMD_Fixup PARAMS ((int, int));
252b5132
RH		 294
295static void append_seg PARAMS ((void));
52b15da3 296static void set_op PARAMS ((unsigned int op, int));
2da11e11 297static void putop PARAMS ((const char *template, int sizeflag));
252b5132
RH		 298static void dofloat PARAMS ((int sizeflag));
299static int get16 PARAMS ((void));
52b15da3
JH		 300static bfd_vma get64 PARAMS ((void));
301static bfd_signed_vma get32 PARAMS ((void));
302static bfd_signed_vma get32s PARAMS ((void));
252b5132 303static void ckprefix PARAMS ((void));
7d421014 304static const char *prefix_name PARAMS ((int, int));
252b5132 305static void ptr_reg PARAMS ((int, int));
2da11e11 306static void BadOp PARAMS ((void));
252b5132 307
52b15da3
JH		 308#define b_mode 1 /* byte operand */
309#define v_mode 2 /* operand size depends on prefixes */
310#define w_mode 3 /* word operand */
311#define d_mode 4 /* double word operand */
312#define q_mode 5 /* quad word operand */
313#define x_mode 6
314#define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
252b5132
RH		 315
316#define es_reg 100
317#define cs_reg 101
318#define ss_reg 102
319#define ds_reg 103
320#define fs_reg 104
321#define gs_reg 105
252b5132 322
c608c12e
AM		 323#define eAX_reg 108
324#define eCX_reg 109
325#define eDX_reg 110
326#define eBX_reg 111
327#define eSP_reg 112
328#define eBP_reg 113
329#define eSI_reg 114
330#define eDI_reg 115
252b5132
RH		 331
332#define al_reg 116
333#define cl_reg 117
334#define dl_reg 118
335#define bl_reg 119
336#define ah_reg 120
337#define ch_reg 121
338#define dh_reg 122
339#define bh_reg 123
340
341#define ax_reg 124
342#define cx_reg 125
343#define dx_reg 126
344#define bx_reg 127
345#define sp_reg 128
346#define bp_reg 129
347#define si_reg 130
348#define di_reg 131
349
52b15da3
JH		 350#define rAX_reg 132
351#define rCX_reg 133
352#define rDX_reg 134
353#define rBX_reg 135
354#define rSP_reg 136
355#define rBP_reg 137
356#define rSI_reg 138
357#define rDI_reg 139
358
252b5132
RH		 359#define indir_dx_reg 150
360
c608c12e
AM		 361#define USE_GROUPS 1
362#define USE_PREFIX_USER_TABLE 2
363
57d91c3c
ILT		 364#define GRP1b NULL, NULL, 0, NULL, USE_GROUPS, NULL, 0
365#define GRP1S NULL, NULL, 1, NULL, USE_GROUPS, NULL, 0
366#define GRP1Ss NULL, NULL, 2, NULL, USE_GROUPS, NULL, 0
367#define GRP2b NULL, NULL, 3, NULL, USE_GROUPS, NULL, 0
368#define GRP2S NULL, NULL, 4, NULL, USE_GROUPS, NULL, 0
369#define GRP2b_one NULL, NULL, 5, NULL, USE_GROUPS, NULL, 0
370#define GRP2S_one NULL, NULL, 6, NULL, USE_GROUPS, NULL, 0
371#define GRP2b_cl NULL, NULL, 7, NULL, USE_GROUPS, NULL, 0
372#define GRP2S_cl NULL, NULL, 8, NULL, USE_GROUPS, NULL, 0
373#define GRP3b NULL, NULL, 9, NULL, USE_GROUPS, NULL, 0
374#define GRP3S NULL, NULL, 10, NULL, USE_GROUPS, NULL, 0
375#define GRP4 NULL, NULL, 11, NULL, USE_GROUPS, NULL, 0
376#define GRP5 NULL, NULL, 12, NULL, USE_GROUPS, NULL, 0
377#define GRP6 NULL, NULL, 13, NULL, USE_GROUPS, NULL, 0
378#define GRP7 NULL, NULL, 14, NULL, USE_GROUPS, NULL, 0
379#define GRP8 NULL, NULL, 15, NULL, USE_GROUPS, NULL, 0
380#define GRP9 NULL, NULL, 16, NULL, USE_GROUPS, NULL, 0
381#define GRP10 NULL, NULL, 17, NULL, USE_GROUPS, NULL, 0
382#define GRP11 NULL, NULL, 18, NULL, USE_GROUPS, NULL, 0
383#define GRP12 NULL, NULL, 19, NULL, USE_GROUPS, NULL, 0
384#define GRP13 NULL, NULL, 20, NULL, USE_GROUPS, NULL, 0
385#define GRP14 NULL, NULL, 21, NULL, USE_GROUPS, NULL, 0
386#define GRPAMD NULL, NULL, 22, NULL, USE_GROUPS, NULL, 0
387
388#define PREGRP0 NULL, NULL, 0, NULL, USE_PREFIX_USER_TABLE, NULL, 0
389#define PREGRP1 NULL, NULL, 1, NULL, USE_PREFIX_USER_TABLE, NULL, 0
390#define PREGRP2 NULL, NULL, 2, NULL, USE_PREFIX_USER_TABLE, NULL, 0
391#define PREGRP3 NULL, NULL, 3, NULL, USE_PREFIX_USER_TABLE, NULL, 0
392#define PREGRP4 NULL, NULL, 4, NULL, USE_PREFIX_USER_TABLE, NULL, 0
393#define PREGRP5 NULL, NULL, 5, NULL, USE_PREFIX_USER_TABLE, NULL, 0
394#define PREGRP6 NULL, NULL, 6, NULL, USE_PREFIX_USER_TABLE, NULL, 0
395#define PREGRP7 NULL, NULL, 7, NULL, USE_PREFIX_USER_TABLE, NULL, 0
396#define PREGRP8 NULL, NULL, 8, NULL, USE_PREFIX_USER_TABLE, NULL, 0
397#define PREGRP9 NULL, NULL, 9, NULL, USE_PREFIX_USER_TABLE, NULL, 0
398#define PREGRP10 NULL, NULL, 10, NULL, USE_PREFIX_USER_TABLE, NULL, 0
399#define PREGRP11 NULL, NULL, 11, NULL, USE_PREFIX_USER_TABLE, NULL, 0
400#define PREGRP12 NULL, NULL, 12, NULL, USE_PREFIX_USER_TABLE, NULL, 0
401#define PREGRP13 NULL, NULL, 13, NULL, USE_PREFIX_USER_TABLE, NULL, 0
402#define PREGRP14 NULL, NULL, 14, NULL, USE_PREFIX_USER_TABLE, NULL, 0
041bd2e0
JH		 403#define PREGRP15 NULL, NULL, 15, NULL, USE_PREFIX_USER_TABLE, NULL, 0
404#define PREGRP16 NULL, NULL, 16, NULL, USE_PREFIX_USER_TABLE, NULL, 0
405#define PREGRP17 NULL, NULL, 17, NULL, USE_PREFIX_USER_TABLE, NULL, 0
406#define PREGRP18 NULL, NULL, 18, NULL, USE_PREFIX_USER_TABLE, NULL, 0
407#define PREGRP19 NULL, NULL, 19, NULL, USE_PREFIX_USER_TABLE, NULL, 0
408#define PREGRP20 NULL, NULL, 20, NULL, USE_PREFIX_USER_TABLE, NULL, 0
409#define PREGRP21 NULL, NULL, 21, NULL, USE_PREFIX_USER_TABLE, NULL, 0
410#define PREGRP22 NULL, NULL, 22, NULL, USE_PREFIX_USER_TABLE, NULL, 0
411#define PREGRP23 NULL, NULL, 23, NULL, USE_PREFIX_USER_TABLE, NULL, 0
412#define PREGRP24 NULL, NULL, 24, NULL, USE_PREFIX_USER_TABLE, NULL, 0
0f17484f
AM		 413#define PREGRP25 NULL, NULL, 25, NULL, USE_PREFIX_USER_TABLE, NULL, 0
414#define PREGRP26 NULL, NULL, 26, NULL, USE_PREFIX_USER_TABLE, NULL, 0
252b5132
RH		 415
416#define FLOATCODE 50
57d91c3c 417#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
252b5132
RH		 418
419struct dis386 {
2da11e11 420 const char *name;
252b5132
RH		 421 op_rtn op1;
422 int bytemode1;
423 op_rtn op2;
424 int bytemode2;
425 op_rtn op3;
426 int bytemode3;
427};
428
429/* Upper case letters in the instruction names here are macros.
430 'A' => print 'b' if no register operands or suffix_always is true
431 'B' => print 'b' if suffix_always is true
432 'E' => print 'e' if 32-bit form of jcxz
433 'L' => print 'l' if suffix_always is true
434 'N' => print 'n' if instruction has no wait "prefix"
52b15da3
JH		 435 'O' => print 'd', or 'o'
436 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
252b5132 437 or suffix_always is true
52b15da3
JH		 438 print 'q' if rex prefix is present.
439 'I' => print 'q' in 64bit mode and behave as 'P' otherwise
440 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always is true
441 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
442 'S' => print 'w', 'l' or 'q' if suffix_always is true
90530880 443 'T' => print 'q' in 64bit mode and behave as 'I' otherwise
041bd2e0 444 'X' => print 's', 'd' depending on data16 prefix (for XMM)
10084519 445 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
76f227a5 446 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
252b5132
RH		 447*/
448
2da11e11 449static const struct dis386 dis386_att[] = {
252b5132 450 /* 00 */
57d91c3c
ILT		 451 { "addB", Eb, Gb, XX },
452 { "addS", Ev, Gv, XX },
453 { "addB", Gb, Eb, XX },
454 { "addS", Gv, Ev, XX },
455 { "addB", AL, Ib, XX },
456 { "addS", eAX, Iv, XX },
52b15da3
JH		 457 { "pushI", es, XX, XX },
458 { "popI", es, XX, XX },
252b5132 459 /* 08 */
57d91c3c
ILT		 460 { "orB", Eb, Gb, XX },
461 { "orS", Ev, Gv, XX },
462 { "orB", Gb, Eb, XX },
463 { "orS", Gv, Ev, XX },
464 { "orB", AL, Ib, XX },
465 { "orS", eAX, Iv, XX },
52b15da3 466 { "pushI", cs, XX, XX },
57d91c3c 467 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
252b5132 468 /* 10 */
57d91c3c
ILT		 469 { "adcB", Eb, Gb, XX },
470 { "adcS", Ev, Gv, XX },
471 { "adcB", Gb, Eb, XX },
472 { "adcS", Gv, Ev, XX },
473 { "adcB", AL, Ib, XX },
474 { "adcS", eAX, Iv, XX },
52b15da3
JH		 475 { "pushI", ss, XX, XX },
476 { "popI", ss, XX, XX },
252b5132 477 /* 18 */
57d91c3c
ILT		 478 { "sbbB", Eb, Gb, XX },
479 { "sbbS", Ev, Gv, XX },
480 { "sbbB", Gb, Eb, XX },
481 { "sbbS", Gv, Ev, XX },
482 { "sbbB", AL, Ib, XX },
483 { "sbbS", eAX, Iv, XX },
52b15da3
JH		 484 { "pushI", ds, XX, XX },
485 { "popI", ds, XX, XX },
252b5132 486 /* 20 */
57d91c3c
ILT		 487 { "andB", Eb, Gb, XX },
488 { "andS", Ev, Gv, XX },
489 { "andB", Gb, Eb, XX },
490 { "andS", Gv, Ev, XX },
491 { "andB", AL, Ib, XX },
492 { "andS", eAX, Iv, XX },
493 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
494 { "daa", XX, XX, XX },
252b5132 495 /* 28 */
57d91c3c
ILT		 496 { "subB", Eb, Gb, XX },
497 { "subS", Ev, Gv, XX },
498 { "subB", Gb, Eb, XX },
499 { "subS", Gv, Ev, XX },
500 { "subB", AL, Ib, XX },
501 { "subS", eAX, Iv, XX },
502 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
503 { "das", XX, XX, XX },
252b5132 504 /* 30 */
57d91c3c
ILT		 505 { "xorB", Eb, Gb, XX },
506 { "xorS", Ev, Gv, XX },
507 { "xorB", Gb, Eb, XX },
508 { "xorS", Gv, Ev, XX },
509 { "xorB", AL, Ib, XX },
510 { "xorS", eAX, Iv, XX },
511 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
512 { "aaa", XX, XX, XX },
252b5132 513 /* 38 */
57d91c3c
ILT		 514 { "cmpB", Eb, Gb, XX },
515 { "cmpS", Ev, Gv, XX },
516 { "cmpB", Gb, Eb, XX },
517 { "cmpS", Gv, Ev, XX },
518 { "cmpB", AL, Ib, XX },
519 { "cmpS", eAX, Iv, XX },
520 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
521 { "aas", XX, XX, XX },
252b5132 522 /* 40 */
52b15da3
JH		 523 { "incS", RMeAX, XX, XX },
524 { "incS", RMeCX, XX, XX },
525 { "incS", RMeDX, XX, XX },
526 { "incS", RMeBX, XX, XX },
527 { "incS", RMeSP, XX, XX },
528 { "incS", RMeBP, XX, XX },
529 { "incS", RMeSI, XX, XX },
530 { "incS", RMeDI, XX, XX },
252b5132 531 /* 48 */
52b15da3
JH		 532 { "decS", RMeAX, XX, XX },
533 { "decS", RMeCX, XX, XX },
534 { "decS", RMeDX, XX, XX },
535 { "decS", RMeBX, XX, XX },
536 { "decS", RMeSP, XX, XX },
537 { "decS", RMeBP, XX, XX },
538 { "decS", RMeSI, XX, XX },
539 { "decS", RMeDI, XX, XX },
252b5132 540 /* 50 */
52b15da3
JH		 541 { "pushS", RMeAX, XX, XX },
542 { "pushS", RMeCX, XX, XX },
543 { "pushS", RMeDX, XX, XX },
544 { "pushS", RMeBX, XX, XX },
545 { "pushS", RMeSP, XX, XX },
546 { "pushS", RMeBP, XX, XX },
547 { "pushS", RMeSI, XX, XX },
548 { "pushS", RMeDI, XX, XX },
252b5132 549 /* 58 */
52b15da3
JH		 550 { "popS", RMeAX, XX, XX },
551 { "popS", RMeCX, XX, XX },
552 { "popS", RMeDX, XX, XX },
553 { "popS", RMeBX, XX, XX },
554 { "popS", RMeSP, XX, XX },
555 { "popS", RMeBP, XX, XX },
556 { "popS", RMeSI, XX, XX },
557 { "popS", RMeDI, XX, XX },
252b5132 558 /* 60 */
57d91c3c
ILT		 559 { "pushaP", XX, XX, XX },
560 { "popaP", XX, XX, XX },
561 { "boundS", Gv, Ma, XX },
562 { "arpl", Ew, Gw, XX },
563 { "(bad)", XX, XX, XX }, /* seg fs */
564 { "(bad)", XX, XX, XX }, /* seg gs */
565 { "(bad)", XX, XX, XX }, /* op size prefix */
566 { "(bad)", XX, XX, XX }, /* adr size prefix */
252b5132 567 /* 68 */
52b15da3 568 { "pushI", Iv, XX, XX }, /* 386 book wrong */
252b5132 569 { "imulS", Gv, Ev, Iv },
52b15da3 570 { "pushI", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
252b5132 571 { "imulS", Gv, Ev, sIb },
57d91c3c
ILT		 572 { "insb", Yb, indirDX, XX },
573 { "insR", Yv, indirDX, XX },
574 { "outsb", indirDX, Xb, XX },
575 { "outsR", indirDX, Xv, XX },
252b5132 576 /* 70 */
57d91c3c
ILT		 577 { "jo", Jb, XX, XX },
578 { "jno", Jb, XX, XX },
579 { "jb", Jb, XX, XX },
580 { "jae", Jb, XX, XX },
581 { "je", Jb, XX, XX },
582 { "jne", Jb, XX, XX },
583 { "jbe", Jb, XX, XX },
584 { "ja", Jb, XX, XX },
252b5132 585 /* 78 */
57d91c3c
ILT		 586 { "js", Jb, XX, XX },
587 { "jns", Jb, XX, XX },
588 { "jp", Jb, XX, XX },
589 { "jnp", Jb, XX, XX },
590 { "jl", Jb, XX, XX },
591 { "jge", Jb, XX, XX },
592 { "jle", Jb, XX, XX },
593 { "jg", Jb, XX, XX },
252b5132
RH		 594 /* 80 */
595 { GRP1b },
596 { GRP1S },
57d91c3c 597 { "(bad)", XX, XX, XX },
252b5132 598 { GRP1Ss },
57d91c3c
ILT		 599 { "testB", Eb, Gb, XX },
600 { "testS", Ev, Gv, XX },
601 { "xchgB", Eb, Gb, XX },
602 { "xchgS", Ev, Gv, XX },
252b5132 603 /* 88 */
57d91c3c
ILT		 604 { "movB", Eb, Gb, XX },
605 { "movS", Ev, Gv, XX },
606 { "movB", Gb, Eb, XX },
607 { "movS", Gv, Ev, XX },
608 { "movQ", Ev, Sw, XX },
609 { "leaS", Gv, M, XX },
610 { "movQ", Sw, Ev, XX },
90530880 611 { "popT", Ev, XX, XX },
252b5132 612 /* 90 */
57d91c3c 613 { "nop", XX, XX, XX },
041bd2e0 614 /* FIXME: NOP with REPz prefix is called PAUSE. */
52b15da3
JH		 615 { "xchgS", RMeCX, eAX, XX },
616 { "xchgS", RMeDX, eAX, XX },
617 { "xchgS", RMeBX, eAX, XX },
618 { "xchgS", RMeSP, eAX, XX },
619 { "xchgS", RMeBP, eAX, XX },
620 { "xchgS", RMeSI, eAX, XX },
621 { "xchgS", RMeDI, eAX, XX },
252b5132 622 /* 98 */
57d91c3c 623 { "cWtR", XX, XX, XX },
52b15da3
JH		 624 { "cRtO", XX, XX, XX },
625 { "lcallI", Ap, XX, XX },
57d91c3c 626 { "(bad)", XX, XX, XX }, /* fwait */
52b15da3
JH		 627 { "pushfI", XX, XX, XX },
628 { "popfI", XX, XX, XX },
57d91c3c
ILT		 629 { "sahf", XX, XX, XX },
630 { "lahf", XX, XX, XX },
252b5132 631 /* a0 */
57d91c3c
ILT		 632 { "movB", AL, Ob, XX },
633 { "movS", eAX, Ov, XX },
634 { "movB", Ob, AL, XX },
635 { "movS", Ov, eAX, XX },
636 { "movsb", Yb, Xb, XX },
637 { "movsR", Yv, Xv, XX },
638 { "cmpsb", Xb, Yb, XX },
639 { "cmpsR", Xv, Yv, XX },
252b5132 640 /* a8 */
57d91c3c
ILT		 641 { "testB", AL, Ib, XX },
642 { "testS", eAX, Iv, XX },
643 { "stosB", Yb, AL, XX },
644 { "stosS", Yv, eAX, XX },
645 { "lodsB", AL, Xb, XX },
646 { "lodsS", eAX, Xv, XX },
647 { "scasB", AL, Yb, XX },
648 { "scasS", eAX, Yv, XX },
252b5132 649 /* b0 */
52b15da3
JH		 650 { "movB", RMAL, Ib, XX },
651 { "movB", RMCL, Ib, XX },
652 { "movB", RMDL, Ib, XX },
653 { "movB", RMBL, Ib, XX },
654 { "movB", RMAH, Ib, XX },
655 { "movB", RMCH, Ib, XX },
656 { "movB", RMDH, Ib, XX },
657 { "movB", RMBH, Ib, XX },
252b5132 658 /* b8 */
52b15da3
JH		 659 { "movS", RMeAX, Iv, XX },
660 { "movS", RMeCX, Iv, XX },
661 { "movS", RMeDX, Iv, XX },
662 { "movS", RMeBX, Iv, XX },
663 { "movS", RMeSP, Iv, XX },
664 { "movS", RMeBP, Iv, XX },
665 { "movS", RMeSI, Iv, XX },
666 { "movS", RMeDI, Iv, XX },
252b5132
RH		 667 /* c0 */
668 { GRP2b },
669 { GRP2S },
e2914f48
JH		 670 { "retI", Iw, XX, XX },
671 { "retI", XX, XX, XX },
57d91c3c
ILT		 672 { "lesS", Gv, Mp, XX },
673 { "ldsS", Gv, Mp, XX },
674 { "movA", Eb, Ib, XX },
675 { "movQ", Ev, Iv, XX },
252b5132 676 /* c8 */
52b15da3
JH		 677 { "enterI", Iw, Ib, XX },
678 { "leaveI", XX, XX, XX },
e2914f48
JH		 679 { "lretP", Iw, XX, XX },
680 { "lretP", XX, XX, XX },
52b15da3
JH		 681 { "int3", XX, XX, XX },
682 { "int", Ib, XX, XX },
683 { "into", XX, XX, XX},
e2914f48 684 { "iretP", XX, XX, XX },
52b15da3
JH		 685 /* d0 */
686 { GRP2b_one },
687 { GRP2S_one },
688 { GRP2b_cl },
689 { GRP2S_cl },
690 { "aam", sIb, XX, XX },
691 { "aad", sIb, XX, XX },
692 { "(bad)", XX, XX, XX },
693 { "xlat", DSBX, XX, XX },
694 /* d8 */
695 { FLOAT },
696 { FLOAT },
697 { FLOAT },
698 { FLOAT },
699 { FLOAT },
700 { FLOAT },
701 { FLOAT },
702 { FLOAT },
703 /* e0 */
704 { "loopne", Jb, XX, XX },
705 { "loope", Jb, XX, XX },
706 { "loop", Jb, XX, XX },
707 { "jEcxz", Jb, XX, XX },
708 { "inB", AL, Ib, XX },
709 { "inS", eAX, Ib, XX },
710 { "outB", Ib, AL, XX },
711 { "outS", Ib, eAX, XX },
712 /* e8 */
713 { "callI", Jv, XX, XX },
714 { "jmpI", Jv, XX, XX },
715 { "ljmpI", Ap, XX, XX },
716 { "jmp", Jb, XX, XX },
717 { "inB", AL, indirDX, XX },
718 { "inS", eAX, indirDX, XX },
719 { "outB", indirDX, AL, XX },
720 { "outS", indirDX, eAX, XX },
721 /* f0 */
722 { "(bad)", XX, XX, XX }, /* lock prefix */
723 { "(bad)", XX, XX, XX },
724 { "(bad)", XX, XX, XX }, /* repne */
725 { "(bad)", XX, XX, XX }, /* repz */
726 { "hlt", XX, XX, XX },
727 { "cmc", XX, XX, XX },
728 { GRP3b },
729 { GRP3S },
730 /* f8 */
731 { "clc", XX, XX, XX },
732 { "stc", XX, XX, XX },
733 { "cli", XX, XX, XX },
734 { "sti", XX, XX, XX },
735 { "cld", XX, XX, XX },
736 { "std", XX, XX, XX },
737 { GRP4 },
738 { GRP5 },
739};
740
741static const struct dis386 dis386_intel[] = {
742 /* 00 */
743 { "add", Eb, Gb, XX },
744 { "add", Ev, Gv, XX },
745 { "add", Gb, Eb, XX },
746 { "add", Gv, Ev, XX },
747 { "add", AL, Ib, XX },
748 { "add", eAX, Iv, XX },
749 { "push", es, XX, XX },
750 { "pop", es, XX, XX },
751 /* 08 */
752 { "or", Eb, Gb, XX },
753 { "or", Ev, Gv, XX },
754 { "or", Gb, Eb, XX },
755 { "or", Gv, Ev, XX },
756 { "or", AL, Ib, XX },
757 { "or", eAX, Iv, XX },
758 { "push", cs, XX, XX },
759 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
760 /* 10 */
761 { "adc", Eb, Gb, XX },
762 { "adc", Ev, Gv, XX },
763 { "adc", Gb, Eb, XX },
764 { "adc", Gv, Ev, XX },
765 { "adc", AL, Ib, XX },
766 { "adc", eAX, Iv, XX },
767 { "push", ss, XX, XX },
768 { "pop", ss, XX, XX },
769 /* 18 */
770 { "sbb", Eb, Gb, XX },
771 { "sbb", Ev, Gv, XX },
772 { "sbb", Gb, Eb, XX },
773 { "sbb", Gv, Ev, XX },
774 { "sbb", AL, Ib, XX },
775 { "sbb", eAX, Iv, XX },
776 { "push", ds, XX, XX },
777 { "pop", ds, XX, XX },
778 /* 20 */
779 { "and", Eb, Gb, XX },
780 { "and", Ev, Gv, XX },
781 { "and", Gb, Eb, XX },
782 { "and", Gv, Ev, XX },
783 { "and", AL, Ib, XX },
784 { "and", eAX, Iv, XX },
785 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
786 { "daa", XX, XX, XX },
787 /* 28 */
788 { "sub", Eb, Gb, XX },
789 { "sub", Ev, Gv, XX },
790 { "sub", Gb, Eb, XX },
791 { "sub", Gv, Ev, XX },
792 { "sub", AL, Ib, XX },
793 { "sub", eAX, Iv, XX },
794 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
795 { "das", XX, XX, XX },
796 /* 30 */
797 { "xor", Eb, Gb, XX },
798 { "xor", Ev, Gv, XX },
799 { "xor", Gb, Eb, XX },
800 { "xor", Gv, Ev, XX },
801 { "xor", AL, Ib, XX },
802 { "xor", eAX, Iv, XX },
803 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
804 { "aaa", XX, XX, XX },
805 /* 38 */
806 { "cmp", Eb, Gb, XX },
807 { "cmp", Ev, Gv, XX },
808 { "cmp", Gb, Eb, XX },
809 { "cmp", Gv, Ev, XX },
810 { "cmp", AL, Ib, XX },
811 { "cmp", eAX, Iv, XX },
812 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
813 { "aas", XX, XX, XX },
814 /* 40 */
815 { "inc", RMeAX, XX, XX },
816 { "inc", RMeCX, XX, XX },
817 { "inc", RMeDX, XX, XX },
818 { "inc", RMeBX, XX, XX },
819 { "inc", RMeSP, XX, XX },
820 { "inc", RMeBP, XX, XX },
821 { "inc", RMeSI, XX, XX },
822 { "inc", RMeDI, XX, XX },
823 /* 48 */
824 { "dec", RMeAX, XX, XX },
825 { "dec", RMeCX, XX, XX },
826 { "dec", RMeDX, XX, XX },
827 { "dec", RMeBX, XX, XX },
828 { "dec", RMeSP, XX, XX },
829 { "dec", RMeBP, XX, XX },
830 { "dec", RMeSI, XX, XX },
831 { "dec", RMeDI, XX, XX },
832 /* 50 */
833 { "push", RMeAX, XX, XX },
834 { "push", RMeCX, XX, XX },
835 { "push", RMeDX, XX, XX },
836 { "push", RMeBX, XX, XX },
837 { "push", RMeSP, XX, XX },
838 { "push", RMeBP, XX, XX },
839 { "push", RMeSI, XX, XX },
840 { "push", RMeDI, XX, XX },
841 /* 58 */
842 { "pop", RMeAX, XX, XX },
843 { "pop", RMeCX, XX, XX },
844 { "pop", RMeDX, XX, XX },
845 { "pop", RMeBX, XX, XX },
846 { "pop", RMeSP, XX, XX },
847 { "pop", RMeBP, XX, XX },
848 { "pop", RMeSI, XX, XX },
849 { "pop", RMeDI, XX, XX },
850 /* 60 */
851 { "pusha", XX, XX, XX },
852 { "popa", XX, XX, XX },
853 { "bound", Gv, Ma, XX },
854 { "arpl", Ew, Gw, XX },
855 { "(bad)", XX, XX, XX }, /* seg fs */
856 { "(bad)", XX, XX, XX }, /* seg gs */
857 { "(bad)", XX, XX, XX }, /* op size prefix */
858 { "(bad)", XX, XX, XX }, /* adr size prefix */
859 /* 68 */
860 { "push", Iv, XX, XX }, /* 386 book wrong */
861 { "imul", Gv, Ev, Iv },
862 { "push", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
863 { "imul", Gv, Ev, sIb },
864 { "ins", Yb, indirDX, XX },
865 { "ins", Yv, indirDX, XX },
866 { "outs", indirDX, Xb, XX },
867 { "outs", indirDX, Xv, XX },
868 /* 70 */
869 { "jo", Jb, XX, XX },
870 { "jno", Jb, XX, XX },
871 { "jb", Jb, XX, XX },
872 { "jae", Jb, XX, XX },
873 { "je", Jb, XX, XX },
874 { "jne", Jb, XX, XX },
875 { "jbe", Jb, XX, XX },
876 { "ja", Jb, XX, XX },
877 /* 78 */
878 { "js", Jb, XX, XX },
879 { "jns", Jb, XX, XX },
880 { "jp", Jb, XX, XX },
881 { "jnp", Jb, XX, XX },
882 { "jl", Jb, XX, XX },
883 { "jge", Jb, XX, XX },
884 { "jle", Jb, XX, XX },
885 { "jg", Jb, XX, XX },
886 /* 80 */
887 { GRP1b },
888 { GRP1S },
889 { "(bad)", XX, XX, XX },
890 { GRP1Ss },
891 { "test", Eb, Gb, XX },
892 { "test", Ev, Gv, XX },
893 { "xchg", Eb, Gb, XX },
894 { "xchg", Ev, Gv, XX },
895 /* 88 */
896 { "mov", Eb, Gb, XX },
897 { "mov", Ev, Gv, XX },
898 { "mov", Gb, Eb, XX },
899 { "mov", Gv, Ev, XX },
900 { "mov", Ev, Sw, XX },
901 { "lea", Gv, M, XX },
902 { "mov", Sw, Ev, XX },
903 { "pop", Ev, XX, XX },
904 /* 90 */
905 { "nop", XX, XX, XX },
041bd2e0 906 /* FIXME: NOP with REPz prefix is called PAUSE. */
52b15da3
JH		 907 { "xchg", RMeCX, eAX, XX },
908 { "xchg", RMeDX, eAX, XX },
909 { "xchg", RMeBX, eAX, XX },
910 { "xchg", RMeSP, eAX, XX },
911 { "xchg", RMeBP, eAX, XX },
912 { "xchg", RMeSI, eAX, XX },
913 { "xchg", RMeDI, eAX, XX },
914 /* 98 */
915 { "cW", XX, XX, XX }, /* cwde and cbw */
916 { "cR", XX, XX, XX }, /* cdq and cwd */
917 { "lcall", Ap, XX, XX },
918 { "(bad)", XX, XX, XX }, /* fwait */
919 { "pushf", XX, XX, XX },
920 { "popf", XX, XX, XX },
921 { "sahf", XX, XX, XX },
922 { "lahf", XX, XX, XX },
923 /* a0 */
924 { "mov", AL, Ob, XX },
925 { "mov", eAX, Ov, XX },
926 { "mov", Ob, AL, XX },
927 { "mov", Ov, eAX, XX },
928 { "movs", Yb, Xb, XX },
929 { "movs", Yv, Xv, XX },
930 { "cmps", Xb, Yb, XX },
931 { "cmps", Xv, Yv, XX },
932 /* a8 */
933 { "test", AL, Ib, XX },
934 { "test", eAX, Iv, XX },
935 { "stos", Yb, AL, XX },
936 { "stos", Yv, eAX, XX },
937 { "lods", AL, Xb, XX },
938 { "lods", eAX, Xv, XX },
939 { "scas", AL, Yb, XX },
940 { "scas", eAX, Yv, XX },
941 /* b0 */
942 { "mov", RMAL, Ib, XX },
943 { "mov", RMCL, Ib, XX },
944 { "mov", RMDL, Ib, XX },
945 { "mov", RMBL, Ib, XX },
946 { "mov", RMAH, Ib, XX },
947 { "mov", RMCH, Ib, XX },
948 { "mov", RMDH, Ib, XX },
949 { "mov", RMBH, Ib, XX },
950 /* b8 */
951 { "mov", RMeAX, Iv, XX },
952 { "mov", RMeCX, Iv, XX },
953 { "mov", RMeDX, Iv, XX },
954 { "mov", RMeBX, Iv, XX },
955 { "mov", RMeSP, Iv, XX },
956 { "mov", RMeBP, Iv, XX },
957 { "mov", RMeSI, Iv, XX },
958 { "mov", RMeDI, Iv, XX },
959 /* c0 */
960 { GRP2b },
961 { GRP2S },
962 { "ret", Iw, XX, XX },
963 { "ret", XX, XX, XX },
964 { "les", Gv, Mp, XX },
965 { "lds", Gv, Mp, XX },
966 { "mov", Eb, Ib, XX },
967 { "mov", Ev, Iv, XX },
968 /* c8 */
969 { "enter", Iw, Ib, XX },
970 { "leave", XX, XX, XX },
971 { "lret", Iw, XX, XX },
972 { "lret", XX, XX, XX },
973 { "int3", XX, XX, XX },
974 { "int", Ib, XX, XX },
975 { "into", XX, XX, XX },
976 { "iret", XX, XX, XX },
977 /* d0 */
978 { GRP2b_one },
979 { GRP2S_one },
980 { GRP2b_cl },
981 { GRP2S_cl },
982 { "aam", sIb, XX, XX },
983 { "aad", sIb, XX, XX },
984 { "(bad)", XX, XX, XX },
985 { "xlat", DSBX, XX, XX },
986 /* d8 */
987 { FLOAT },
988 { FLOAT },
989 { FLOAT },
990 { FLOAT },
991 { FLOAT },
992 { FLOAT },
993 { FLOAT },
994 { FLOAT },
995 /* e0 */
996 { "loopne", Jb, XX, XX },
997 { "loope", Jb, XX, XX },
998 { "loop", Jb, XX, XX },
999 { "jEcxz", Jb, XX, XX },
1000 { "in", AL, Ib, XX },
1001 { "in", eAX, Ib, XX },
1002 { "out", Ib, AL, XX },
1003 { "out", Ib, eAX, XX },
1004 /* e8 */
1005 { "call", Jv, XX, XX },
1006 { "jmp", Jv, XX, XX },
1007 { "ljmp", Ap, XX, XX },
1008 { "jmp", Jb, XX, XX },
1009 { "in", AL, indirDX, XX },
1010 { "in", eAX, indirDX, XX },
1011 { "out", indirDX, AL, XX },
1012 { "out", indirDX, eAX, XX },
1013 /* f0 */
1014 { "(bad)", XX, XX, XX }, /* lock prefix */
1015 { "(bad)", XX, XX, XX },
1016 { "(bad)", XX, XX, XX }, /* repne */
1017 { "(bad)", XX, XX, XX }, /* repz */
1018 { "hlt", XX, XX, XX },
1019 { "cmc", XX, XX, XX },
1020 { GRP3b },
1021 { GRP3S },
1022 /* f8 */
1023 { "clc", XX, XX, XX },
1024 { "stc", XX, XX, XX },
1025 { "cli", XX, XX, XX },
1026 { "sti", XX, XX, XX },
1027 { "cld", XX, XX, XX },
1028 { "std", XX, XX, XX },
1029 { GRP4 },
1030 { GRP5 },
1031};
1032
1033/* 64bit mode is having some instruction set differences, so separate table is
1034 needed. */
1035static const struct dis386 disx86_64_att[] = {
1036 /* 00 */
1037 { "addB", Eb, Gb, XX },
1038 { "addS", Ev, Gv, XX },
1039 { "addB", Gb, Eb, XX },
1040 { "addS", Gv, Ev, XX },
1041 { "addB", AL, Ib, XX },
1042 { "addS", eAX, Iv, XX },
1043 { "(bad)", XX, XX, XX }, /* Reserved. */
1044 { "(bad)", XX, XX, XX }, /* Reserved. */
1045 /* 08 */
1046 { "orB", Eb, Gb, XX },
1047 { "orS", Ev, Gv, XX },
1048 { "orB", Gb, Eb, XX },
1049 { "orS", Gv, Ev, XX },
1050 { "orB", AL, Ib, XX },
1051 { "orS", eAX, Iv, XX },
1052 { "(bad)", XX, XX, XX }, /* Reserved. */
1053 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
1054 /* 10 */
1055 { "adcB", Eb, Gb, XX },
1056 { "adcS", Ev, Gv, XX },
1057 { "adcB", Gb, Eb, XX },
1058 { "adcS", Gv, Ev, XX },
1059 { "adcB", AL, Ib, XX },
1060 { "adcS", eAX, Iv, XX },
1061 { "(bad)", XX, XX, XX }, /* Reserved. */
1062 { "(bad)", XX, XX, XX }, /* Reserved. */
1063 /* 18 */
1064 { "sbbB", Eb, Gb, XX },
1065 { "sbbS", Ev, Gv, XX },
1066 { "sbbB", Gb, Eb, XX },
1067 { "sbbS", Gv, Ev, XX },
1068 { "sbbB", AL, Ib, XX },
1069 { "sbbS", eAX, Iv, XX },
1070 { "(bad)", XX, XX, XX }, /* Reserved. */
1071 { "(bad)", XX, XX, XX }, /* Reserved. */
1072 /* 20 */
1073 { "andB", Eb, Gb, XX },
1074 { "andS", Ev, Gv, XX },
1075 { "andB", Gb, Eb, XX },
1076 { "andS", Gv, Ev, XX },
1077 { "andB", AL, Ib, XX },
1078 { "andS", eAX, Iv, XX },
1079 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
1080 { "(bad)", XX, XX, XX }, /* Reserved. */
1081 /* 28 */
1082 { "subB", Eb, Gb, XX },
1083 { "subS", Ev, Gv, XX },
1084 { "subB", Gb, Eb, XX },
1085 { "subS", Gv, Ev, XX },
1086 { "subB", AL, Ib, XX },
1087 { "subS", eAX, Iv, XX },
1088 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
1089 { "(bad)", XX, XX, XX }, /* Reserved. */
1090 /* 30 */
1091 { "xorB", Eb, Gb, XX },
1092 { "xorS", Ev, Gv, XX },
1093 { "xorB", Gb, Eb, XX },
1094 { "xorS", Gv, Ev, XX },
1095 { "xorB", AL, Ib, XX },
1096 { "xorS", eAX, Iv, XX },
1097 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
1098 { "(bad)", XX, XX, XX }, /* Reserved. */
1099 /* 38 */
1100 { "cmpB", Eb, Gb, XX },
1101 { "cmpS", Ev, Gv, XX },
1102 { "cmpB", Gb, Eb, XX },
1103 { "cmpS", Gv, Ev, XX },
1104 { "cmpB", AL, Ib, XX },
1105 { "cmpS", eAX, Iv, XX },
1106 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
1107 { "(bad)", XX, XX, XX }, /* Reserved. */
1108 /* 40 */
1109 { "(bad)", XX, XX, XX }, /* REX prefix area. */
1110 { "(bad)", XX, XX, XX },
1111 { "(bad)", XX, XX, XX },
1112 { "(bad)", XX, XX, XX },
1113 { "(bad)", XX, XX, XX },
1114 { "(bad)", XX, XX, XX },
1115 { "(bad)", XX, XX, XX },
1116 { "(bad)", XX, XX, XX },
1117 /* 48 */
1118 { "(bad)", XX, XX, XX },
1119 { "(bad)", XX, XX, XX },
1120 { "(bad)", XX, XX, XX },
1121 { "(bad)", XX, XX, XX },
1122 { "(bad)", XX, XX, XX },
1123 { "(bad)", XX, XX, XX },
1124 { "(bad)", XX, XX, XX },
1125 { "(bad)", XX, XX, XX },
1126 /* 50 */
1127 { "pushI", RMrAX, XX, XX },
1128 { "pushI", RMrCX, XX, XX },
1129 { "pushI", RMrDX, XX, XX },
1130 { "pushI", RMrBX, XX, XX },
1131 { "pushI", RMrSP, XX, XX },
1132 { "pushI", RMrBP, XX, XX },
1133 { "pushI", RMrSI, XX, XX },
1134 { "pushI", RMrDI, XX, XX },
1135 /* 58 */
1136 { "popI", RMrAX, XX, XX },
1137 { "popI", RMrCX, XX, XX },
1138 { "popI", RMrDX, XX, XX },
1139 { "popI", RMrBX, XX, XX },
1140 { "popI", RMrSP, XX, XX },
1141 { "popI", RMrBP, XX, XX },
1142 { "popI", RMrSI, XX, XX },
1143 { "popI", RMrDI, XX, XX },
1144 /* 60 */
1145 { "(bad)", XX, XX, XX }, /* reserved. */
1146 { "(bad)", XX, XX, XX }, /* reserved. */
1147 { "(bad)", XX, XX, XX }, /* reserved. */
1148 { "movslR", Gv, Ed, XX },
1149 { "(bad)", XX, XX, XX }, /* seg fs */
1150 { "(bad)", XX, XX, XX }, /* seg gs */
1151 { "(bad)", XX, XX, XX }, /* op size prefix */
1152 { "(bad)", XX, XX, XX }, /* adr size prefix */
1153 /* 68 */
1154 { "pushI", Iq, XX, XX }, /* 386 book wrong */
1155 { "imulS", Gv, Ev, Iv },
1156 { "pushI", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
1157 { "imulS", Gv, Ev, sIb },
1158 { "insb", Yb, indirDX, XX },
1159 { "insR", Yv, indirDX, XX },
1160 { "outsb", indirDX, Xb, XX },
1161 { "outsR", indirDX, Xv, XX },
1162 /* 70 */
1163 { "jo", Jb, XX, XX },
1164 { "jno", Jb, XX, XX },
1165 { "jb", Jb, XX, XX },
1166 { "jae", Jb, XX, XX },
1167 { "je", Jb, XX, XX },
1168 { "jne", Jb, XX, XX },
1169 { "jbe", Jb, XX, XX },
1170 { "ja", Jb, XX, XX },
1171 /* 78 */
1172 { "js", Jb, XX, XX },
1173 { "jns", Jb, XX, XX },
1174 { "jp", Jb, XX, XX },
1175 { "jnp", Jb, XX, XX },
1176 { "jl", Jb, XX, XX },
1177 { "jge", Jb, XX, XX },
1178 { "jle", Jb, XX, XX },
1179 { "jg", Jb, XX, XX },
1180 /* 80 */
1181 { GRP1b },
1182 { GRP1S },
1183 { "(bad)", XX, XX, XX },
1184 { GRP1Ss },
1185 { "testB", Eb, Gb, XX },
1186 { "testS", Ev, Gv, XX },
1187 { "xchgB", Eb, Gb, XX },
1188 { "xchgS", Ev, Gv, XX },
1189 /* 88 */
1190 { "movB", Eb, Gb, XX },
1191 { "movS", Ev, Gv, XX },
1192 { "movB", Gb, Eb, XX },
1193 { "movS", Gv, Ev, XX },
1194 { "movQ", Ev, Sw, XX },
1195 { "leaS", Gv, M, XX },
1196 { "movQ", Sw, Ev, XX },
1197 { "popI", Ev, XX, XX },
1198 /* 90 */
1199 { "nop", XX, XX, XX },
041bd2e0 1200 /* FIXME: NOP with REPz prefix is called PAUSE. */
52b15da3
JH		 1201 { "xchgS", RMeCX, eAX, XX },
1202 { "xchgS", RMeDX, eAX, XX },
1203 { "xchgS", RMeBX, eAX, XX },
1204 { "xchgS", RMeSP, eAX, XX },
1205 { "xchgS", RMeBP, eAX, XX },
1206 { "xchgS", RMeSI, eAX, XX },
1207 { "xchgS", RMeDI, eAX, XX },
1208 /* 98 */
1209 { "cWtR", XX, XX, XX },
1210 { "cRtO", XX, XX, XX },
1211 { "(bad)", XX, XX, XX }, /* reserved. */
1212 { "(bad)", XX, XX, XX }, /* fwait */
1213 { "pushfI", XX, XX, XX },
1214 { "popfI", XX, XX, XX },
1215 { "(bad)", XX, XX, XX }, /* reserved. */
1216 { "(bad)", XX, XX, XX }, /* reserved. */
1217 /* a0 */
1218 { "movB", AL, Ob64, XX },
1219 { "movS", eAX, Ov64, XX },
1220 { "movB", Ob64, AL, XX },
1221 { "movS", Ov64, eAX, XX },
1222 { "movsb", Yb, Xb, XX },
1223 { "movsR", Yv, Xv, XX },
1224 { "cmpsb", Xb, Yb, XX },
1225 { "cmpsR", Xv, Yv, XX },
1226 /* a8 */
1227 { "testB", AL, Ib, XX },
1228 { "testS", eAX, Iv, XX },
1229 { "stosB", Yb, AL, XX },
1230 { "stosS", Yv, eAX, XX },
1231 { "lodsB", AL, Xb, XX },
1232 { "lodsS", eAX, Xv, XX },
1233 { "scasB", AL, Yb, XX },
1234 { "scasS", eAX, Yv, XX },
1235 /* b0 */
1236 { "movB", RMAL, Ib, XX },
1237 { "movB", RMCL, Ib, XX },
1238 { "movB", RMDL, Ib, XX },
1239 { "movB", RMBL, Ib, XX },
1240 { "movB", RMAH, Ib, XX },
1241 { "movB", RMCH, Ib, XX },
1242 { "movB", RMDH, Ib, XX },
1243 { "movB", RMBH, Ib, XX },
1244 /* b8 */
1245 { "movS", RMeAX, Iv64, XX },
1246 { "movS", RMeCX, Iv64, XX },
1247 { "movS", RMeDX, Iv64, XX },
1248 { "movS", RMeBX, Iv64, XX },
1249 { "movS", RMeSP, Iv64, XX },
1250 { "movS", RMeBP, Iv64, XX },
1251 { "movS", RMeSI, Iv64, XX },
1252 { "movS", RMeDI, Iv64, XX },
1253 /* c0 */
1254 { GRP2b },
1255 { GRP2S },
1256 { "retI", Iw, XX, XX },
1257 { "retI", XX, XX, XX },
1258 { "(bad)", XX, XX, XX }, /* reserved. */
1259 { "ldsS", Gv, Mp, XX },
1260 { "movA", Eb, Ib, XX },
1261 { "movQ", Ev, Iv, XX },
1262 /* c8 */
1263 { "enterI", Iw, Ib, XX },
1264 { "leaveI", XX, XX, XX },
e2914f48
JH		 1265 { "lretP", Iw, XX, XX },
1266 { "lretP", XX, XX, XX },
57d91c3c
ILT		 1267 { "int3", XX, XX, XX },
1268 { "int", Ib, XX, XX },
52b15da3 1269 { "(bad)", XX, XX, XX }, /* reserved. */
e2914f48 1270 { "iretP", XX, XX, XX },
252b5132
RH		 1271 /* d0 */
1272 { GRP2b_one },
1273 { GRP2S_one },
1274 { GRP2b_cl },
1275 { GRP2S_cl },
52b15da3
JH		 1276 { "(bad)", XX, XX, XX }, /* reserved. */
1277 { "(bad)", XX, XX, XX }, /* reserved. */
041bd2e0 1278 { "(bad)", XX, XX, XX }, /* reserved. */
57d91c3c 1279 { "xlat", DSBX, XX, XX },
252b5132
RH		 1280 /* d8 */
1281 { FLOAT },
1282 { FLOAT },
1283 { FLOAT },
1284 { FLOAT },
1285 { FLOAT },
1286 { FLOAT },
1287 { FLOAT },
1288 { FLOAT },
1289 /* e0 */
57d91c3c
ILT		 1290 { "loopne", Jb, XX, XX },
1291 { "loope", Jb, XX, XX },
1292 { "loop", Jb, XX, XX },
1293 { "jEcxz", Jb, XX, XX },
1294 { "inB", AL, Ib, XX },
1295 { "inS", eAX, Ib, XX },
1296 { "outB", Ib, AL, XX },
1297 { "outS", Ib, eAX, XX },
252b5132 1298 /* e8 */
52b15da3
JH		 1299 { "callI", Jv, XX, XX },
1300 { "jmpI", Jv, XX, XX },
1301 { "(bad)", XX, XX, XX }, /* reserved. */
57d91c3c
ILT		 1302 { "jmp", Jb, XX, XX },
1303 { "inB", AL, indirDX, XX },
1304 { "inS", eAX, indirDX, XX },
1305 { "outB", indirDX, AL, XX },
1306 { "outS", indirDX, eAX, XX },
252b5132 1307 /* f0 */
57d91c3c
ILT		 1308 { "(bad)", XX, XX, XX }, /* lock prefix */
1309 { "(bad)", XX, XX, XX },
1310 { "(bad)", XX, XX, XX }, /* repne */
1311 { "(bad)", XX, XX, XX }, /* repz */
1312 { "hlt", XX, XX, XX },
1313 { "cmc", XX, XX, XX },
252b5132
RH		 1314 { GRP3b },
1315 { GRP3S },
1316 /* f8 */
57d91c3c
ILT		 1317 { "clc", XX, XX, XX },
1318 { "stc", XX, XX, XX },
1319 { "cli", XX, XX, XX },
1320 { "sti", XX, XX, XX },
1321 { "cld", XX, XX, XX },
1322 { "std", XX, XX, XX },
252b5132
RH		 1323 { GRP4 },
1324 { GRP5 },
1325};
1326
52b15da3 1327static const struct dis386 dis386_64_intel[] = {
252b5132 1328 /* 00 */
57d91c3c
ILT		 1329 { "add", Eb, Gb, XX },
1330 { "add", Ev, Gv, XX },
1331 { "add", Gb, Eb, XX },
1332 { "add", Gv, Ev, XX },
1333 { "add", AL, Ib, XX },
1334 { "add", eAX, Iv, XX },
52b15da3
JH		 1335 { "(bad)", XX, XX, XX }, /* Reserved. */
1336 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1337 /* 08 */
57d91c3c
ILT		 1338 { "or", Eb, Gb, XX },
1339 { "or", Ev, Gv, XX },
1340 { "or", Gb, Eb, XX },
1341 { "or", Gv, Ev, XX },
1342 { "or", AL, Ib, XX },
1343 { "or", eAX, Iv, XX },
52b15da3 1344 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c 1345 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
252b5132 1346 /* 10 */
57d91c3c
ILT		 1347 { "adc", Eb, Gb, XX },
1348 { "adc", Ev, Gv, XX },
1349 { "adc", Gb, Eb, XX },
1350 { "adc", Gv, Ev, XX },
1351 { "adc", AL, Ib, XX },
1352 { "adc", eAX, Iv, XX },
52b15da3
JH		 1353 { "(bad)", XX, XX, XX }, /* Reserved. */
1354 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1355 /* 18 */
57d91c3c
ILT		 1356 { "sbb", Eb, Gb, XX },
1357 { "sbb", Ev, Gv, XX },
1358 { "sbb", Gb, Eb, XX },
1359 { "sbb", Gv, Ev, XX },
1360 { "sbb", AL, Ib, XX },
1361 { "sbb", eAX, Iv, XX },
52b15da3
JH		 1362 { "(bad)", XX, XX, XX }, /* Reserved. */
1363 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1364 /* 20 */
57d91c3c
ILT		 1365 { "and", Eb, Gb, XX },
1366 { "and", Ev, Gv, XX },
1367 { "and", Gb, Eb, XX },
1368 { "and", Gv, Ev, XX },
1369 { "and", AL, Ib, XX },
1370 { "and", eAX, Iv, XX },
1371 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
52b15da3 1372 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1373 /* 28 */
57d91c3c
ILT		 1374 { "sub", Eb, Gb, XX },
1375 { "sub", Ev, Gv, XX },
1376 { "sub", Gb, Eb, XX },
1377 { "sub", Gv, Ev, XX },
1378 { "sub", AL, Ib, XX },
1379 { "sub", eAX, Iv, XX },
1380 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
52b15da3 1381 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1382 /* 30 */
57d91c3c
ILT		 1383 { "xor", Eb, Gb, XX },
1384 { "xor", Ev, Gv, XX },
1385 { "xor", Gb, Eb, XX },
1386 { "xor", Gv, Ev, XX },
1387 { "xor", AL, Ib, XX },
1388 { "xor", eAX, Iv, XX },
1389 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
52b15da3 1390 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1391 /* 38 */
57d91c3c
ILT		 1392 { "cmp", Eb, Gb, XX },
1393 { "cmp", Ev, Gv, XX },
1394 { "cmp", Gb, Eb, XX },
1395 { "cmp", Gv, Ev, XX },
1396 { "cmp", AL, Ib, XX },
1397 { "cmp", eAX, Iv, XX },
1398 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
52b15da3 1399 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1400 /* 40 */
52b15da3
JH		 1401 { "(bad)", XX, XX, XX }, /* REX prefix area. */
1402 { "(bad)", XX, XX, XX },
1403 { "(bad)", XX, XX, XX },
1404 { "(bad)", XX, XX, XX },
1405 { "(bad)", XX, XX, XX },
1406 { "(bad)", XX, XX, XX },
1407 { "(bad)", XX, XX, XX },
1408 { "(bad)", XX, XX, XX },
252b5132 1409 /* 48 */
52b15da3
JH		 1410 { "(bad)", XX, XX, XX },
1411 { "(bad)", XX, XX, XX },
1412 { "(bad)", XX, XX, XX },
1413 { "(bad)", XX, XX, XX },
1414 { "(bad)", XX, XX, XX },
1415 { "(bad)", XX, XX, XX },
1416 { "(bad)", XX, XX, XX },
1417 { "(bad)", XX, XX, XX },
252b5132 1418 /* 50 */
52b15da3
JH		 1419 { "push", RMrAX, XX, XX },
1420 { "push", RMrCX, XX, XX },
1421 { "push", RMrDX, XX, XX },
1422 { "push", RMrBX, XX, XX },
1423 { "push", RMrSP, XX, XX },
1424 { "push", RMrBP, XX, XX },
1425 { "push", RMrSI, XX, XX },
1426 { "push", RMrDI, XX, XX },
252b5132 1427 /* 58 */
52b15da3
JH		 1428 { "pop", RMrAX, XX, XX },
1429 { "pop", RMrCX, XX, XX },
1430 { "pop", RMrDX, XX, XX },
1431 { "pop", RMrBX, XX, XX },
1432 { "pop", RMrSP, XX, XX },
1433 { "pop", RMrBP, XX, XX },
1434 { "pop", RMrSI, XX, XX },
1435 { "pop", RMrDI, XX, XX },
252b5132 1436 /* 60 */
52b15da3
JH		 1437 { "(bad)", XX, XX, XX }, /* Reserved. */
1438 { "(bad)", XX, XX, XX }, /* Reserved. */
1439 { "(bad)", XX, XX, XX }, /* Reserved. */
1440 { "movsx", Gv, Ed, XX },
57d91c3c
ILT		 1441 { "(bad)", XX, XX, XX }, /* seg fs */
1442 { "(bad)", XX, XX, XX }, /* seg gs */
1443 { "(bad)", XX, XX, XX }, /* op size prefix */
1444 { "(bad)", XX, XX, XX }, /* adr size prefix */
252b5132 1445 /* 68 */
52b15da3 1446 { "push", Iq, XX, XX }, /* 386 book wrong */
c608c12e 1447 { "imul", Gv, Ev, Iv },
57d91c3c 1448 { "push", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
c608c12e 1449 { "imul", Gv, Ev, sIb },
57d91c3c
ILT		 1450 { "ins", Yb, indirDX, XX },
1451 { "ins", Yv, indirDX, XX },
1452 { "outs", indirDX, Xb, XX },
1453 { "outs", indirDX, Xv, XX },
252b5132 1454 /* 70 */
57d91c3c
ILT		 1455 { "jo", Jb, XX, XX },
1456 { "jno", Jb, XX, XX },
1457 { "jb", Jb, XX, XX },
1458 { "jae", Jb, XX, XX },
1459 { "je", Jb, XX, XX },
1460 { "jne", Jb, XX, XX },
1461 { "jbe", Jb, XX, XX },
1462 { "ja", Jb, XX, XX },
252b5132 1463 /* 78 */
57d91c3c
ILT		 1464 { "js", Jb, XX, XX },
1465 { "jns", Jb, XX, XX },
1466 { "jp", Jb, XX, XX },
1467 { "jnp", Jb, XX, XX },
1468 { "jl", Jb, XX, XX },
1469 { "jge", Jb, XX, XX },
1470 { "jle", Jb, XX, XX },
1471 { "jg", Jb, XX, XX },
252b5132
RH		 1472 /* 80 */
1473 { GRP1b },
1474 { GRP1S },
57d91c3c 1475 { "(bad)", XX, XX, XX },
252b5132 1476 { GRP1Ss },
57d91c3c
ILT		 1477 { "test", Eb, Gb, XX },
1478 { "test", Ev, Gv, XX },
1479 { "xchg", Eb, Gb, XX },
1480 { "xchg", Ev, Gv, XX },
252b5132 1481 /* 88 */
57d91c3c
ILT		 1482 { "mov", Eb, Gb, XX },
1483 { "mov", Ev, Gv, XX },
1484 { "mov", Gb, Eb, XX },
1485 { "mov", Gv, Ev, XX },
1486 { "mov", Ev, Sw, XX },
1487 { "lea", Gv, M, XX },
1488 { "mov", Sw, Ev, XX },
1489 { "pop", Ev, XX, XX },
252b5132 1490 /* 90 */
57d91c3c 1491 { "nop", XX, XX, XX },
041bd2e0 1492 /* FIXME: NOP with REPz prefix is called PAUSE. */
52b15da3
JH		 1493 { "xchg", RMeCX, eAX, XX },
1494 { "xchg", RMeDX, eAX, XX },
1495 { "xchg", RMeBX, eAX, XX },
1496 { "xchg", RMeSP, eAX, XX },
1497 { "xchg", RMeBP, eAX, XX },
1498 { "xchg", RMeSI, eAX, XX },
1499 { "xchg", RMeDI, eAX, XX },
252b5132 1500 /* 98 */
57d91c3c
ILT		 1501 { "cW", XX, XX, XX }, /* cwde and cbw */
1502 { "cR", XX, XX, XX }, /* cdq and cwd */
52b15da3 1503 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c
ILT		 1504 { "(bad)", XX, XX, XX }, /* fwait */
1505 { "pushf", XX, XX, XX },
1506 { "popf", XX, XX, XX },
52b15da3
JH		 1507 { "(bad)", XX, XX, XX }, /* Reserved. */
1508 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1509 /* a0 */
57d91c3c
ILT		 1510 { "mov", AL, Ob, XX },
1511 { "mov", eAX, Ov, XX },
1512 { "mov", Ob, AL, XX },
1513 { "mov", Ov, eAX, XX },
1514 { "movs", Yb, Xb, XX },
1515 { "movs", Yv, Xv, XX },
1516 { "cmps", Xb, Yb, XX },
1517 { "cmps", Xv, Yv, XX },
252b5132 1518 /* a8 */
57d91c3c
ILT		 1519 { "test", AL, Ib, XX },
1520 { "test", eAX, Iv, XX },
1521 { "stos", Yb, AL, XX },
1522 { "stos", Yv, eAX, XX },
1523 { "lods", AL, Xb, XX },
1524 { "lods", eAX, Xv, XX },
1525 { "scas", AL, Yb, XX },
1526 { "scas", eAX, Yv, XX },
252b5132 1527 /* b0 */
52b15da3
JH		 1528 { "mov", RMAL, Ib, XX },
1529 { "mov", RMCL, Ib, XX },
1530 { "mov", RMDL, Ib, XX },
1531 { "mov", RMBL, Ib, XX },
1532 { "mov", RMAH, Ib, XX },
1533 { "mov", RMCH, Ib, XX },
1534 { "mov", RMDH, Ib, XX },
1535 { "mov", RMBH, Ib, XX },
252b5132 1536 /* b8 */
52b15da3
JH		 1537 { "mov", RMeAX, Iv, XX },
1538 { "mov", RMeCX, Iv, XX },
1539 { "mov", RMeDX, Iv, XX },
1540 { "mov", RMeBX, Iv, XX },
1541 { "mov", RMeSP, Iv, XX },
1542 { "mov", RMeBP, Iv, XX },
1543 { "mov", RMeSI, Iv, XX },
1544 { "mov", RMeDI, Iv, XX },
252b5132
RH		 1545 /* c0 */
1546 { GRP2b },
1547 { GRP2S },
57d91c3c
ILT		 1548 { "ret", Iw, XX, XX },
1549 { "ret", XX, XX, XX },
52b15da3 1550 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c
ILT		 1551 { "lds", Gv, Mp, XX },
1552 { "mov", Eb, Ib, XX },
1553 { "mov", Ev, Iv, XX },
252b5132 1554 /* c8 */
57d91c3c
ILT		 1555 { "enter", Iw, Ib, XX },
1556 { "leave", XX, XX, XX },
1557 { "lret", Iw, XX, XX },
1558 { "lret", XX, XX, XX },
1559 { "int3", XX, XX, XX },
1560 { "int", Ib, XX, XX },
52b15da3 1561 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c 1562 { "iret", XX, XX, XX },
252b5132
RH		 1563 /* d0 */
1564 { GRP2b_one },
1565 { GRP2S_one },
1566 { GRP2b_cl },
1567 { GRP2S_cl },
52b15da3
JH		 1568 { "(bad)", XX, XX, XX }, /* Reserved. */
1569 { "(bad)", XX, XX, XX }, /* Reserved. */
041bd2e0 1570 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c 1571 { "xlat", DSBX, XX, XX },
252b5132
RH		 1572 /* d8 */
1573 { FLOAT },
1574 { FLOAT },
1575 { FLOAT },
1576 { FLOAT },
1577 { FLOAT },
1578 { FLOAT },
1579 { FLOAT },
1580 { FLOAT },
1581 /* e0 */
57d91c3c
ILT		 1582 { "loopne", Jb, XX, XX },
1583 { "loope", Jb, XX, XX },
1584 { "loop", Jb, XX, XX },
1585 { "jEcxz", Jb, XX, XX },
1586 { "in", AL, Ib, XX },
1587 { "in", eAX, Ib, XX },
1588 { "out", Ib, AL, XX },
1589 { "out", Ib, eAX, XX },
252b5132 1590 /* e8 */
57d91c3c
ILT		 1591 { "call", Jv, XX, XX },
1592 { "jmp", Jv, XX, XX },
52b15da3 1593 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c
ILT		 1594 { "jmp", Jb, XX, XX },
1595 { "in", AL, indirDX, XX },
1596 { "in", eAX, indirDX, XX },
1597 { "out", indirDX, AL, XX },
1598 { "out", indirDX, eAX, XX },
252b5132 1599 /* f0 */
57d91c3c
ILT		 1600 { "(bad)", XX, XX, XX }, /* lock prefix */
1601 { "(bad)", XX, XX, XX },
1602 { "(bad)", XX, XX, XX }, /* repne */
1603 { "(bad)", XX, XX, XX }, /* repz */
1604 { "hlt", XX, XX, XX },
1605 { "cmc", XX, XX, XX },
252b5132
RH		 1606 { GRP3b },
1607 { GRP3S },
1608 /* f8 */
57d91c3c
ILT		 1609 { "clc", XX, XX, XX },
1610 { "stc", XX, XX, XX },
1611 { "cli", XX, XX, XX },
1612 { "sti", XX, XX, XX },
1613 { "cld", XX, XX, XX },
1614 { "std", XX, XX, XX },
252b5132
RH		 1615 { GRP4 },
1616 { GRP5 },
1617};
1618
2da11e11 1619static const struct dis386 dis386_twobyte_att[] = {
252b5132
RH		 1620 /* 00 */
1621 { GRP6 },
1622 { GRP7 },
57d91c3c
ILT		 1623 { "larS", Gv, Ew, XX },
1624 { "lslS", Gv, Ew, XX },
1625 { "(bad)", XX, XX, XX },
52b15da3 1626 { "syscall", XX, XX, XX },
57d91c3c 1627 { "clts", XX, XX, XX },
52b15da3 1628 { "sysretP", XX, XX, XX },
252b5132 1629 /* 08 */
57d91c3c
ILT		 1630 { "invd", XX, XX, XX },
1631 { "wbinvd", XX, XX, XX },
1632 { "(bad)", XX, XX, XX },
1633 { "ud2a", XX, XX, XX },
1634 { "(bad)", XX, XX, XX },
c608c12e 1635 { GRPAMD },
57d91c3c 1636 { "femms", XX, XX, XX },
252b5132
RH		 1637 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */
1638 /* 10 */
c608c12e
AM		 1639 { PREGRP8 },
1640 { PREGRP9 },
041bd2e0
JH		 1641 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1642 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
1643 { "unpcklpX", XM, EX, XX },
1644 { "unpckhpX", XM, EX, XX },
1645 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1646 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
252b5132 1647 /* 18 */
c608c12e 1648 { GRP14 },
57d91c3c
ILT		 1649 { "(bad)", XX, XX, XX },
1650 { "(bad)", XX, XX, XX },
1651 { "(bad)", XX, XX, XX },
1652 { "(bad)", XX, XX, XX },
1653 { "(bad)", XX, XX, XX },
1654 { "(bad)", XX, XX, XX },
1655 { "(bad)", XX, XX, XX },
252b5132
RH		 1656 /* 20 */
1657 /* these are all backward in appendix A of the intel book */
52b15da3
JH		 1658 { "movL", Rm, Cm, XX },
1659 { "movL", Rm, Dm, XX },
1660 { "movL", Cm, Rm, XX },
1661 { "movL", Dm, Rm, XX },
57d91c3c
ILT		 1662 { "movL", Rd, Td, XX },
1663 { "(bad)", XX, XX, XX },
1664 { "movL", Td, Rd, XX },
1665 { "(bad)", XX, XX, XX },
252b5132 1666 /* 28 */
041bd2e0
JH		 1667 { "movapX", XM, EX, XX },
1668 { "movapX", EX, XM, XX },
c608c12e 1669 { PREGRP2 },
041bd2e0 1670 { "movntpX", Ev, XM, XX },
2da11e11 1671 { PREGRP4 },
c608c12e 1672 { PREGRP3 },
041bd2e0
JH		 1673 { "ucomisX", XM,EX, XX },
1674 { "comisX", XM,EX, XX },
252b5132 1675 /* 30 */
57d91c3c
ILT		 1676 { "wrmsr", XX, XX, XX },
1677 { "rdtsc", XX, XX, XX },
1678 { "rdmsr", XX, XX, XX },
1679 { "rdpmc", XX, XX, XX },
1680 { "sysenter", XX, XX, XX },
1681 { "sysexit", XX, XX, XX },
1682 { "(bad)", XX, XX, XX },
1683 { "(bad)", XX, XX, XX },
252b5132 1684 /* 38 */
57d91c3c
ILT		 1685 { "(bad)", XX, XX, XX },
1686 { "(bad)", XX, XX, XX },
1687 { "(bad)", XX, XX, XX },
1688 { "(bad)", XX, XX, XX },
1689 { "(bad)", XX, XX, XX },
1690 { "(bad)", XX, XX, XX },
1691 { "(bad)", XX, XX, XX },
1692 { "(bad)", XX, XX, XX },
252b5132 1693 /* 40 */
57d91c3c
ILT		 1694 { "cmovo", Gv, Ev, XX },
1695 { "cmovno", Gv, Ev, XX },
1696 { "cmovb", Gv, Ev, XX },
1697 { "cmovae", Gv, Ev, XX },
1698 { "cmove", Gv, Ev, XX },
1699 { "cmovne", Gv, Ev, XX },
1700 { "cmovbe", Gv, Ev, XX },
1701 { "cmova", Gv, Ev, XX },
252b5132 1702 /* 48 */
57d91c3c
ILT		 1703 { "cmovs", Gv, Ev, XX },
1704 { "cmovns", Gv, Ev, XX },
1705 { "cmovp", Gv, Ev, XX },
1706 { "cmovnp", Gv, Ev, XX },
1707 { "cmovl", Gv, Ev, XX },
1708 { "cmovge", Gv, Ev, XX },
1709 { "cmovle", Gv, Ev, XX },
1710 { "cmovg", Gv, Ev, XX },
252b5132 1711 /* 50 */
992aaec9 1712 { "movmskpX", Gd, XS, XX },
c608c12e
AM		 1713 { PREGRP13 },
1714 { PREGRP12 },
1715 { PREGRP11 },
041bd2e0
JH		 1716 { "andpX", XM, EX, XX },
1717 { "andnpX", XM, EX, XX },
1718 { "orpX", XM, EX, XX },
1719 { "xorpX", XM, EX, XX },
252b5132 1720 /* 58 */
c608c12e
AM		 1721 { PREGRP0 },
1722 { PREGRP10 },
041bd2e0
JH		 1723 { PREGRP17 },
1724 { PREGRP16 },
c608c12e
AM		 1725 { PREGRP14 },
1726 { PREGRP7 },
1727 { PREGRP5 },
2da11e11 1728 { PREGRP6 },
252b5132 1729 /* 60 */
57d91c3c
ILT		 1730 { "punpcklbw", MX, EM, XX },
1731 { "punpcklwd", MX, EM, XX },
1732 { "punpckldq", MX, EM, XX },
1733 { "packsswb", MX, EM, XX },
1734 { "pcmpgtb", MX, EM, XX },
1735 { "pcmpgtw", MX, EM, XX },
1736 { "pcmpgtd", MX, EM, XX },
1737 { "packuswb", MX, EM, XX },
252b5132 1738 /* 68 */
57d91c3c
ILT		 1739 { "punpckhbw", MX, EM, XX },
1740 { "punpckhwd", MX, EM, XX },
1741 { "punpckhdq", MX, EM, XX },
1742 { "packssdw", MX, EM, XX },
0f17484f 1743 { PREGRP26 },
041bd2e0 1744 { PREGRP24 },
57d91c3c 1745 { "movd", MX, Ed, XX },
041bd2e0 1746 { PREGRP19 },
252b5132 1747 /* 70 */
041bd2e0 1748 { PREGRP22 },
252b5132
RH		 1749 { GRP10 },
1750 { GRP11 },
1751 { GRP12 },
57d91c3c
ILT		 1752 { "pcmpeqb", MX, EM, XX },
1753 { "pcmpeqw", MX, EM, XX },
1754 { "pcmpeqd", MX, EM, XX },
1755 { "emms", XX, XX, XX },
252b5132 1756 /* 78 */
57d91c3c
ILT		 1757 { "(bad)", XX, XX, XX },
1758 { "(bad)", XX, XX, XX },
1759 { "(bad)", XX, XX, XX },
1760 { "(bad)", XX, XX, XX },
1761 { "(bad)", XX, XX, XX },
1762 { "(bad)", XX, XX, XX },
041bd2e0
JH		 1763 { PREGRP23 },
1764 { PREGRP20 },
252b5132 1765 /* 80 */
57d91c3c
ILT		 1766 { "jo", Jv, XX, XX },
1767 { "jno", Jv, XX, XX },
1768 { "jb", Jv, XX, XX },
1769 { "jae", Jv, XX, XX },
1770 { "je", Jv, XX, XX },
1771 { "jne", Jv, XX, XX },
1772 { "jbe", Jv, XX, XX },
1773 { "ja", Jv, XX, XX },
252b5132 1774 /* 88 */
57d91c3c
ILT		 1775 { "js", Jv, XX, XX },
1776 { "jns", Jv, XX, XX },
1777 { "jp", Jv, XX, XX },
1778 { "jnp", Jv, XX, XX },
1779 { "jl", Jv, XX, XX },
1780 { "jge", Jv, XX, XX },
1781 { "jle", Jv, XX, XX },
1782 { "jg", Jv, XX, XX },
252b5132 1783 /* 90 */
57d91c3c
ILT		 1784 { "seto", Eb, XX, XX },
1785 { "setno", Eb, XX, XX },
1786 { "setb", Eb, XX, XX },
1787 { "setae", Eb, XX, XX },
1788 { "sete", Eb, XX, XX },
1789 { "setne", Eb, XX, XX },
1790 { "setbe", Eb, XX, XX },
1791 { "seta", Eb, XX, XX },
252b5132 1792 /* 98 */
57d91c3c
ILT		 1793 { "sets", Eb, XX, XX },
1794 { "setns", Eb, XX, XX },
1795 { "setp", Eb, XX, XX },
1796 { "setnp", Eb, XX, XX },
1797 { "setl", Eb, XX, XX },
1798 { "setge", Eb, XX, XX },
1799 { "setle", Eb, XX, XX },
1800 { "setg", Eb, XX, XX },
252b5132 1801 /* a0 */
52b15da3
JH		 1802 { "pushI", fs, XX, XX },
1803 { "popI", fs, XX, XX },
57d91c3c
ILT		 1804 { "cpuid", XX, XX, XX },
1805 { "btS", Ev, Gv, XX },
252b5132
RH		 1806 { "shldS", Ev, Gv, Ib },
1807 { "shldS", Ev, Gv, CL },
57d91c3c
ILT		 1808 { "(bad)", XX, XX, XX },
1809 { "(bad)", XX, XX, XX },
252b5132 1810 /* a8 */
52b15da3
JH		 1811 { "pushI", gs, XX, XX },
1812 { "popI", gs, XX, XX },
57d91c3c
ILT		 1813 { "rsm", XX, XX, XX },
1814 { "btsS", Ev, Gv, XX },
252b5132
RH		 1815 { "shrdS", Ev, Gv, Ib },
1816 { "shrdS", Ev, Gv, CL },
1817 { GRP13 },
57d91c3c 1818 { "imulS", Gv, Ev, XX },
252b5132 1819 /* b0 */
57d91c3c
ILT		 1820 { "cmpxchgB", Eb, Gb, XX },
1821 { "cmpxchgS", Ev, Gv, XX },
1822 { "lssS", Gv, Mp, XX },
1823 { "btrS", Ev, Gv, XX },
1824 { "lfsS", Gv, Mp, XX },
1825 { "lgsS", Gv, Mp, XX },
1826 { "movzbR", Gv, Eb, XX },
1827 { "movzwR", Gv, Ew, XX }, /* yes, there really is movzww ! */
252b5132 1828 /* b8 */
57d91c3c
ILT		 1829 { "(bad)", XX, XX, XX },
1830 { "ud2b", XX, XX, XX },
252b5132 1831 { GRP8 },
57d91c3c
ILT		 1832 { "btcS", Ev, Gv, XX },
1833 { "bsfS", Gv, Ev, XX },
1834 { "bsrS", Gv, Ev, XX },
1835 { "movsbR", Gv, Eb, XX },
1836 { "movswR", Gv, Ew, XX }, /* yes, there really is movsww ! */
252b5132 1837 /* c0 */
57d91c3c
ILT		 1838 { "xaddB", Eb, Gb, XX },
1839 { "xaddS", Ev, Gv, XX },
c608c12e 1840 { PREGRP1 },
041bd2e0 1841 { "movntiS", Ev, Gv, XX },
992aaec9
AM		 1842 { "pinsrw", MX, Ed, Ib },
1843 { "pextrw", Gd, MS, Ib },
041bd2e0 1844 { "shufpX", XM, EX, Ib },
252b5132
RH		 1845 { GRP9 },
1846 /* c8 */
52b15da3
JH		 1847 { "bswap", RMeAX, XX, XX }, /* bswap doesn't support 16 bit regs */
1848 { "bswap", RMeCX, XX, XX },
1849 { "bswap", RMeDX, XX, XX },
1850 { "bswap", RMeBX, XX, XX },
1851 { "bswap", RMeSP, XX, XX },
1852 { "bswap", RMeBP, XX, XX },
1853 { "bswap", RMeSI, XX, XX },
1854 { "bswap", RMeDI, XX, XX },
252b5132 1855 /* d0 */
57d91c3c
ILT		 1856 { "(bad)", XX, XX, XX },
1857 { "psrlw", MX, EM, XX },
1858 { "psrld", MX, EM, XX },
1859 { "psrlq", MX, EM, XX },
87890af0 1860 { "paddq", MX, EM, XX },
57d91c3c 1861 { "pmullw", MX, EM, XX },
041bd2e0 1862 { PREGRP21 },
992aaec9 1863 { "pmovmskb", Gd, MS, XX },
252b5132 1864 /* d8 */
57d91c3c
ILT		 1865 { "psubusb", MX, EM, XX },
1866 { "psubusw", MX, EM, XX },
1867 { "pminub", MX, EM, XX },
1868 { "pand", MX, EM, XX },
1869 { "paddusb", MX, EM, XX },
1870 { "paddusw", MX, EM, XX },
1871 { "pmaxub", MX, EM, XX },
1872 { "pandn", MX, EM, XX },
252b5132 1873 /* e0 */
57d91c3c
ILT		 1874 { "pavgb", MX, EM, XX },
1875 { "psraw", MX, EM, XX },
1876 { "psrad", MX, EM, XX },
1877 { "pavgw", MX, EM, XX },
1878 { "pmulhuw", MX, EM, XX },
1879 { "pmulhw", MX, EM, XX },
041bd2e0 1880 { PREGRP15 },
0f17484f 1881 { PREGRP25 },
252b5132 1882 /* e8 */
57d91c3c
ILT		 1883 { "psubsb", MX, EM, XX },
1884 { "psubsw", MX, EM, XX },
1885 { "pminsw", MX, EM, XX },
1886 { "por", MX, EM, XX },
1887 { "paddsb", MX, EM, XX },
1888 { "paddsw", MX, EM, XX },
1889 { "pmaxsw", MX, EM, XX },
1890 { "pxor", MX, EM, XX },
252b5132 1891 /* f0 */
57d91c3c
ILT		 1892 { "(bad)", XX, XX, XX },
1893 { "psllw", MX, EM, XX },
1894 { "pslld", MX, EM, XX },
1895 { "psllq", MX, EM, XX },
041bd2e0 1896 { "pmuludq", MX, EM, XX },
57d91c3c
ILT		 1897 { "pmaddwd", MX, EM, XX },
1898 { "psadbw", MX, EM, XX },
041bd2e0 1899 { PREGRP18 },
252b5132 1900 /* f8 */
57d91c3c
ILT		 1901 { "psubb", MX, EM, XX },
1902 { "psubw", MX, EM, XX },
1903 { "psubd", MX, EM, XX },
87890af0 1904 { "psubq", MX, EM, XX },
57d91c3c
ILT		 1905 { "paddb", MX, EM, XX },
1906 { "paddw", MX, EM, XX },
1907 { "paddd", MX, EM, XX },
1908 { "(bad)", XX, XX, XX }
252b5132
RH		 1909};
1910
2da11e11 1911static const struct dis386 dis386_twobyte_intel[] = {
252b5132
RH		 1912 /* 00 */
1913 { GRP6 },
1914 { GRP7 },
57d91c3c
ILT		 1915 { "lar", Gv, Ew, XX },
1916 { "lsl", Gv, Ew, XX },
1917 { "(bad)", XX, XX, XX },
52b15da3 1918 { "syscall", XX, XX, XX },
57d91c3c 1919 { "clts", XX, XX, XX },
52b15da3 1920 { "sysretP", XX, XX, XX },
252b5132 1921 /* 08 */
57d91c3c
ILT		 1922 { "invd", XX, XX, XX },
1923 { "wbinvd", XX, XX, XX },
1924 { "(bad)", XX, XX, XX },
1925 { "ud2a", XX, XX, XX },
1926 { "(bad)", XX, XX, XX },
c608c12e 1927 { GRPAMD },
57d91c3c 1928 { "femms" , XX, XX, XX},
252b5132
RH		 1929 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */
1930 /* 10 */
c2419411
AJ		 1931 { PREGRP8 },
1932 { PREGRP9 },
041bd2e0
JH		 1933 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1934 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
1935 { "unpcklpX", XM, EX, XX },
1936 { "unpckhpX", XM, EX, XX },
1937 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1938 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
252b5132 1939 /* 18 */
c608c12e 1940 { GRP14 },
57d91c3c
ILT		 1941 { "(bad)", XX, XX, XX },
1942 { "(bad)", XX, XX, XX },
1943 { "(bad)", XX, XX, XX },
1944 { "(bad)", XX, XX, XX },
1945 { "(bad)", XX, XX, XX },
1946 { "(bad)", XX, XX, XX },
1947 { "(bad)", XX, XX, XX },
252b5132
RH		 1948 /* 20 */
1949 /* these are all backward in appendix A of the intel book */
52b15da3
JH		 1950 { "mov", Rm, Cm, XX },
1951 { "mov", Rm, Dm, XX },
1952 { "mov", Cm, Rm, XX },
1953 { "mov", Dm, Rm, XX },
57d91c3c
ILT		 1954 { "mov", Rd, Td, XX },
1955 { "(bad)", XX, XX, XX },
1956 { "mov", Td, Rd, XX },
1957 { "(bad)", XX, XX, XX },
252b5132 1958 /* 28 */
041bd2e0
JH		 1959 { "movapX", XM, EX, XX },
1960 { "movapX", EX, XM, XX },
c608c12e 1961 { PREGRP2 },
041bd2e0 1962 { "movntpX", Ev, XM, XX },
2da11e11 1963 { PREGRP4 },
c608c12e 1964 { PREGRP3 },
041bd2e0
JH		 1965 { "ucomisX", XM,EX, XX },
1966 { "comisX", XM,EX, XX },
252b5132 1967 /* 30 */
57d91c3c
ILT		 1968 { "wrmsr", XX, XX, XX },
1969 { "rdtsc", XX, XX, XX },
1970 { "rdmsr", XX, XX, XX },
1971 { "rdpmc", XX, XX, XX },
1972 { "sysenter", XX, XX, XX },
1973 { "sysexit", XX, XX, XX },
1974 { "(bad)", XX, XX, XX },
1975 { "(bad)", XX, XX, XX },
252b5132 1976 /* 38 */
57d91c3c
ILT		 1977 { "(bad)", XX, XX, XX },
1978 { "(bad)", XX, XX, XX },
1979 { "(bad)", XX, XX, XX },
1980 { "(bad)", XX, XX, XX },
1981 { "(bad)", XX, XX, XX },
1982 { "(bad)", XX, XX, XX },
1983 { "(bad)", XX, XX, XX },
1984 { "(bad)", XX, XX, XX },
252b5132 1985 /* 40 */
57d91c3c
ILT		 1986 { "cmovo", Gv, Ev, XX },
1987 { "cmovno", Gv, Ev, XX },
1988 { "cmovb", Gv, Ev, XX },
1989 { "cmovae", Gv, Ev, XX },
1990 { "cmove", Gv, Ev, XX },
1991 { "cmovne", Gv, Ev, XX },
1992 { "cmovbe", Gv, Ev, XX },
1993 { "cmova", Gv, Ev, XX },
252b5132 1994 /* 48 */
57d91c3c
ILT		 1995 { "cmovs", Gv, Ev, XX },
1996 { "cmovns", Gv, Ev, XX },
1997 { "cmovp", Gv, Ev, XX },
1998 { "cmovnp", Gv, Ev, XX },
1999 { "cmovl", Gv, Ev, XX },
2000 { "cmovge", Gv, Ev, XX },
2001 { "cmovle", Gv, Ev, XX },
2002 { "cmovg", Gv, Ev, XX },
252b5132 2003 /* 50 */
992aaec9 2004 { "movmskpX", Gd, XS, XX },
c608c12e
AM		 2005 { PREGRP13 },
2006 { PREGRP12 },
2007 { PREGRP11 },
041bd2e0
JH		 2008 { "andpX", XM, EX, XX },
2009 { "andnpX", XM, EX, XX },
2010 { "orpX", XM, EX, XX },
2011 { "xorpX", XM, EX, XX },
252b5132 2012 /* 58 */
c608c12e
AM		 2013 { PREGRP0 },
2014 { PREGRP10 },
041bd2e0
JH		 2015 { PREGRP17 },
2016 { PREGRP16 },
c608c12e
AM		 2017 { PREGRP14 },
2018 { PREGRP7 },
2019 { PREGRP5 },
2da11e11 2020 { PREGRP6 },
252b5132 2021 /* 60 */
57d91c3c
ILT		 2022 { "punpcklbw", MX, EM, XX },
2023 { "punpcklwd", MX, EM, XX },
2024 { "punpckldq", MX, EM, XX },
2025 { "packsswb", MX, EM, XX },
2026 { "pcmpgtb", MX, EM, XX },
2027 { "pcmpgtw", MX, EM, XX },
2028 { "pcmpgtd", MX, EM, XX },
2029 { "packuswb", MX, EM, XX },
252b5132 2030 /* 68 */
57d91c3c
ILT		 2031 { "punpckhbw", MX, EM, XX },
2032 { "punpckhwd", MX, EM, XX },
2033 { "punpckhdq", MX, EM, XX },
2034 { "packssdw", MX, EM, XX },
0f17484f 2035 { PREGRP26 },
041bd2e0 2036 { PREGRP24 },
57d91c3c 2037 { "movd", MX, Ed, XX },
041bd2e0 2038 { PREGRP19 },
252b5132 2039 /* 70 */
041bd2e0 2040 { PREGRP22 },
252b5132
RH		 2041 { GRP10 },
2042 { GRP11 },
2043 { GRP12 },
57d91c3c
ILT		 2044 { "pcmpeqb", MX, EM, XX },
2045 { "pcmpeqw", MX, EM, XX },
2046 { "pcmpeqd", MX, EM, XX },
2047 { "emms", XX, XX, XX },
252b5132 2048 /* 78 */
57d91c3c
ILT		 2049 { "(bad)", XX, XX, XX },
2050 { "(bad)", XX, XX, XX },
2051 { "(bad)", XX, XX, XX },
2052 { "(bad)", XX, XX, XX },
2053 { "(bad)", XX, XX, XX },
2054 { "(bad)", XX, XX, XX },
041bd2e0
JH		 2055 { PREGRP23 },
2056 { PREGRP20 },
252b5132 2057 /* 80 */
57d91c3c
ILT		 2058 { "jo", Jv, XX, XX },
2059 { "jno", Jv, XX, XX },
2060 { "jb", Jv, XX, XX },
2061 { "jae", Jv, XX, XX },
2062 { "je", Jv, XX, XX },
2063 { "jne", Jv, XX, XX },
2064 { "jbe", Jv, XX, XX },
2065 { "ja", Jv, XX, XX },
252b5132 2066 /* 88 */
57d91c3c
ILT		 2067 { "js", Jv, XX, XX },
2068 { "jns", Jv, XX, XX },
2069 { "jp", Jv, XX, XX },
2070 { "jnp", Jv, XX, XX },
2071 { "jl", Jv, XX, XX },
2072 { "jge", Jv, XX, XX },
2073 { "jle", Jv, XX, XX },
2074 { "jg", Jv, XX, XX },
252b5132 2075 /* 90 */
57d91c3c
ILT		 2076 { "seto", Eb, XX, XX },
2077 { "setno", Eb, XX, XX },
2078 { "setb", Eb, XX, XX },
2079 { "setae", Eb, XX, XX },
2080 { "sete", Eb, XX, XX },
2081 { "setne", Eb, XX, XX },
2082 { "setbe", Eb, XX, XX },
2083 { "seta", Eb, XX, XX },
252b5132 2084 /* 98 */
57d91c3c
ILT		 2085 { "sets", Eb, XX, XX },
2086 { "setns", Eb, XX, XX },
2087 { "setp", Eb, XX, XX },
2088 { "setnp", Eb, XX, XX },
2089 { "setl", Eb, XX, XX },
2090 { "setge", Eb, XX, XX },
2091 { "setle", Eb, XX, XX },
2092 { "setg", Eb, XX, XX },
252b5132 2093 /* a0 */
57d91c3c
ILT		 2094 { "push", fs, XX, XX },
2095 { "pop", fs, XX, XX },
2096 { "cpuid", XX, XX, XX },
2097 { "bt", Ev, Gv, XX },
c608c12e
AM		 2098 { "shld", Ev, Gv, Ib },
2099 { "shld", Ev, Gv, CL },
57d91c3c
ILT		 2100 { "(bad)", XX, XX, XX },
2101 { "(bad)", XX, XX, XX },
252b5132 2102 /* a8 */
57d91c3c
ILT		 2103 { "push", gs, XX, XX },
2104 { "pop", gs, XX, XX },
2105 { "rsm" , XX, XX, XX},
2106 { "bts", Ev, Gv, XX },
c608c12e
AM		 2107 { "shrd", Ev, Gv, Ib },
2108 { "shrd", Ev, Gv, CL },
252b5132 2109 { GRP13 },
57d91c3c 2110 { "imul", Gv, Ev, XX },
252b5132 2111 /* b0 */
57d91c3c
ILT		 2112 { "cmpxchg", Eb, Gb, XX },
2113 { "cmpxchg", Ev, Gv, XX },
2114 { "lss", Gv, Mp, XX },
2115 { "btr", Ev, Gv, XX },
2116 { "lfs", Gv, Mp, XX },
2117 { "lgs", Gv, Mp, XX },
2118 { "movzx", Gv, Eb, XX },
2119 { "movzx", Gv, Ew, XX },
252b5132 2120 /* b8 */
57d91c3c
ILT		 2121 { "(bad)", XX, XX, XX },
2122 { "ud2b", XX, XX, XX },
252b5132 2123 { GRP8 },
57d91c3c
ILT		 2124 { "btc", Ev, Gv, XX },
2125 { "bsf", Gv, Ev, XX },
2126 { "bsr", Gv, Ev, XX },
2127 { "movsx", Gv, Eb, XX },
2128 { "movsx", Gv, Ew, XX },
252b5132 2129 /* c0 */
57d91c3c
ILT		 2130 { "xadd", Eb, Gb, XX },
2131 { "xadd", Ev, Gv, XX },
c608c12e 2132 { PREGRP1 },
041bd2e0 2133 { "movnti", Ev, Gv, XX },
992aaec9
AM		 2134 { "pinsrw", MX, Ed, Ib },
2135 { "pextrw", Gd, MS, Ib },
041bd2e0 2136 { "shufpX", XM, EX, Ib },
252b5132
RH		 2137 { GRP9 },
2138 /* c8 */
52b15da3
JH		 2139 { "bswap", RMeAX, XX, XX }, /* bswap doesn't support 16 bit regs */
2140 { "bswap", RMeCX, XX, XX },
2141 { "bswap", RMeDX, XX, XX },
2142 { "bswap", RMeBX, XX, XX },
2143 { "bswap", RMeSP, XX, XX },
2144 { "bswap", RMeBP, XX, XX },
2145 { "bswap", RMeSI, XX, XX },
2146 { "bswap", RMeDI, XX, XX },
252b5132 2147 /* d0 */
57d91c3c
ILT		 2148 { "(bad)", XX, XX, XX },
2149 { "psrlw", MX, EM, XX },
2150 { "psrld", MX, EM, XX },
2151 { "psrlq", MX, EM, XX },
87890af0 2152 { "paddq", MX, EM, XX },
57d91c3c 2153 { "pmullw", MX, EM, XX },
041bd2e0 2154 { PREGRP21 },
992aaec9 2155 { "pmovmskb", Gd, MS, XX },
252b5132 2156 /* d8 */
57d91c3c
ILT		 2157 { "psubusb", MX, EM, XX },
2158 { "psubusw", MX, EM, XX },
2159 { "pminub", MX, EM, XX },
2160 { "pand", MX, EM, XX },
2161 { "paddusb", MX, EM, XX },
2162 { "paddusw", MX, EM, XX },
2163 { "pmaxub", MX, EM, XX },
2164 { "pandn", MX, EM, XX },
252b5132 2165 /* e0 */
57d91c3c
ILT		 2166 { "pavgb", MX, EM, XX },
2167 { "psraw", MX, EM, XX },
2168 { "psrad", MX, EM, XX },
2169 { "pavgw", MX, EM, XX },
2170 { "pmulhuw", MX, EM, XX },
2171 { "pmulhw", MX, EM, XX },
041bd2e0 2172 { PREGRP15 },
0f17484f 2173 { PREGRP25 },
252b5132 2174 /* e8 */
57d91c3c
ILT		 2175 { "psubsb", MX, EM, XX },
2176 { "psubsw", MX, EM, XX },
2177 { "pminsw", MX, EM, XX },
2178 { "por", MX, EM, XX },
2179 { "paddsb", MX, EM, XX },
2180 { "paddsw", MX, EM, XX },
2181 { "pmaxsw", MX, EM, XX },
2182 { "pxor", MX, EM, XX },
252b5132 2183 /* f0 */
57d91c3c
ILT		 2184 { "(bad)", XX, XX, XX },
2185 { "psllw", MX, EM, XX },
2186 { "pslld", MX, EM, XX },
2187 { "psllq", MX, EM, XX },
041bd2e0 2188 { "pmuludq", MX, EM, XX },
57d91c3c
ILT		 2189 { "pmaddwd", MX, EM, XX },
2190 { "psadbw", MX, EM, XX },
041bd2e0 2191 { PREGRP18 },
252b5132 2192 /* f8 */
57d91c3c
ILT		 2193 { "psubb", MX, EM, XX },
2194 { "psubw", MX, EM, XX },
2195 { "psubd", MX, EM, XX },
87890af0 2196 { "psubq", MX, EM, XX },
57d91c3c
ILT		 2197 { "paddb", MX, EM, XX },
2198 { "paddw", MX, EM, XX },
2199 { "paddd", MX, EM, XX },
2200 { "(bad)", XX, XX, XX }
252b5132
RH		 2201};
2202
2203static const unsigned char onebyte_has_modrm[256] = {
c608c12e
AM		 2204 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2205 /* ------------------------------- */
2206 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
2207 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
2208 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
2209 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
2210 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
2211 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
2212 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
2213 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
2214 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
2215 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
2216 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
2217 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
2218 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
2219 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
2220 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
2221 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
2222 /* ------------------------------- */
2223 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 2224};
2225
2226static const unsigned char twobyte_has_modrm[256] = {
c608c12e
AM		 2227 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2228 /* ------------------------------- */
252b5132 2229 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
c608c12e 2230 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
4bba6815 2231 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
252b5132
RH		 2232 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
2233 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
4bba6815
AM		 2234 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
2235 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
c608c12e 2236 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
252b5132
RH		 2237 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
2238 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
4bba6815 2239 /* a0 */ 0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* af */
252b5132
RH		 2240 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
2241 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
4bba6815
AM		 2242 /* d0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
2243 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
2244 /* f0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
c608c12e
AM		 2245 /* ------------------------------- */
2246 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2247};
2248
041bd2e0 2249static const unsigned char twobyte_uses_SSE_prefix[256] = {
c608c12e
AM		 2250 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2251 /* ------------------------------- */
2252 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
2253 /* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
2254 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
2255 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
2256 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
041bd2e0
JH		 2257 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
2258 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
2259 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
c608c12e
AM		 2260 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
2261 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
2262 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
2263 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
2264 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
041bd2e0
JH		 2265 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
2266 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
2267 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
c608c12e
AM		 2268 /* ------------------------------- */
2269 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 2270};
2271
2272static char obuf[100];
2273static char *obufp;
2274static char scratchbuf[100];
2275static unsigned char *start_codep;
2276static unsigned char *insn_codep;
2277static unsigned char *codep;
2278static disassemble_info *the_info;
2279static int mod;
2280static int rm;
2281static int reg;
4bba6815 2282static unsigned char need_modrm;
2da11e11 2283static void oappend PARAMS ((const char *s));
252b5132 2284
4bba6815
AM		 2285/* If we are accessing mod/rm/reg without need_modrm set, then the
2286 values are stale. Hitting this abort likely indicates that you
2287 need to update onebyte_has_modrm or twobyte_has_modrm. */
2288#define MODRM_CHECK if (!need_modrm) abort ()
2289
52b15da3
JH		 2290static const char *names64[] = {
2291 "%rax","%rcx","%rdx","%rbx", "%rsp","%rbp","%rsi","%rdi",
2292 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
2293};
2294static const char *names32[] = {
252b5132 2295 "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi",
52b15da3 2296 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
252b5132 2297};
2da11e11 2298static const char *names16[] = {
252b5132 2299 "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di",
52b15da3 2300 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
252b5132 2301};
2da11e11 2302static const char *names8[] = {
252b5132
RH		 2303 "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh",
2304};
52b15da3 2305static const char *names8rex[] = {
c2419411 2306 "%al","%cl","%dl","%bl","%spl", "%bpl", "%sil", "%dil",
52b15da3
JH		 2307 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
2308};
2da11e11 2309static const char *names_seg[] = {
252b5132
RH		 2310 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
2311};
2da11e11 2312static const char *index16[] = {
252b5132
RH		 2313 "%bx,%si","%bx,%di","%bp,%si","%bp,%di","%si","%di","%bp","%bx"
2314};
2315
2da11e11 2316static const struct dis386 grps[][8] = {
252b5132
RH		 2317 /* GRP1b */
2318 {
57d91c3c
ILT		 2319 { "addA", Eb, Ib, XX },
2320 { "orA", Eb, Ib, XX },
2321 { "adcA", Eb, Ib, XX },
2322 { "sbbA", Eb, Ib, XX },
2323 { "andA", Eb, Ib, XX },
2324 { "subA", Eb, Ib, XX },
2325 { "xorA", Eb, Ib, XX },
2326 { "cmpA", Eb, Ib, XX }
252b5132
RH		 2327 },
2328 /* GRP1S */
2329 {
57d91c3c
ILT		 2330 { "addQ", Ev, Iv, XX },
2331 { "orQ", Ev, Iv, XX },
2332 { "adcQ", Ev, Iv, XX },
2333 { "sbbQ", Ev, Iv, XX },
2334 { "andQ", Ev, Iv, XX },
2335 { "subQ", Ev, Iv, XX },
2336 { "xorQ", Ev, Iv, XX },
2337 { "cmpQ", Ev, Iv, XX }
252b5132
RH		 2338 },
2339 /* GRP1Ss */
2340 {
57d91c3c
ILT		 2341 { "addQ", Ev, sIb, XX },
2342 { "orQ", Ev, sIb, XX },
2343 { "adcQ", Ev, sIb, XX },
2344 { "sbbQ", Ev, sIb, XX },
2345 { "andQ", Ev, sIb, XX },
2346 { "subQ", Ev, sIb, XX },
2347 { "xorQ", Ev, sIb, XX },
2348 { "cmpQ", Ev, sIb, XX }
252b5132
RH		 2349 },
2350 /* GRP2b */
2351 {
57d91c3c
ILT		 2352 { "rolA", Eb, Ib, XX },
2353 { "rorA", Eb, Ib, XX },
2354 { "rclA", Eb, Ib, XX },
2355 { "rcrA", Eb, Ib, XX },
2356 { "shlA", Eb, Ib, XX },
2357 { "shrA", Eb, Ib, XX },
2358 { "(bad)", XX, XX, XX },
2359 { "sarA", Eb, Ib, XX },
252b5132
RH		 2360 },
2361 /* GRP2S */
2362 {
57d91c3c
ILT		 2363 { "rolQ", Ev, Ib, XX },
2364 { "rorQ", Ev, Ib, XX },
2365 { "rclQ", Ev, Ib, XX },
2366 { "rcrQ", Ev, Ib, XX },
2367 { "shlQ", Ev, Ib, XX },
2368 { "shrQ", Ev, Ib, XX },
2369 { "(bad)", XX, XX, XX },
2370 { "sarQ", Ev, Ib, XX },
252b5132
RH		 2371 },
2372 /* GRP2b_one */
2373 {
57d91c3c
ILT		 2374 { "rolA", Eb, XX, XX },
2375 { "rorA", Eb, XX, XX },
2376 { "rclA", Eb, XX, XX },
2377 { "rcrA", Eb, XX, XX },
2378 { "shlA", Eb, XX, XX },
2379 { "shrA", Eb, XX, XX },
2380 { "(bad)", XX, XX, XX },
2381 { "sarA", Eb, XX, XX },
252b5132
RH		 2382 },
2383 /* GRP2S_one */
2384 {
57d91c3c
ILT		 2385 { "rolQ", Ev, XX, XX },
2386 { "rorQ", Ev, XX, XX },
2387 { "rclQ", Ev, XX, XX },
2388 { "rcrQ", Ev, XX, XX },
2389 { "shlQ", Ev, XX, XX },
2390 { "shrQ", Ev, XX, XX },
2391 { "(bad)", XX, XX, XX},
2392 { "sarQ", Ev, XX, XX },
252b5132
RH		 2393 },
2394 /* GRP2b_cl */
2395 {
57d91c3c
ILT		 2396 { "rolA", Eb, CL, XX },
2397 { "rorA", Eb, CL, XX },
2398 { "rclA", Eb, CL, XX },
2399 { "rcrA", Eb, CL, XX },
2400 { "shlA", Eb, CL, XX },
2401 { "shrA", Eb, CL, XX },
2402 { "(bad)", XX, XX, XX },
2403 { "sarA", Eb, CL, XX },
252b5132
RH		 2404 },
2405 /* GRP2S_cl */
2406 {
57d91c3c
ILT		 2407 { "rolQ", Ev, CL, XX },
2408 { "rorQ", Ev, CL, XX },
2409 { "rclQ", Ev, CL, XX },
2410 { "rcrQ", Ev, CL, XX },
2411 { "shlQ", Ev, CL, XX },
2412 { "shrQ", Ev, CL, XX },
2413 { "(bad)", XX, XX, XX },
2414 { "sarQ", Ev, CL, XX }
252b5132
RH		 2415 },
2416 /* GRP3b */
2417 {
57d91c3c
ILT		 2418 { "testA", Eb, Ib, XX },
2419 { "(bad)", Eb, XX, XX },
2420 { "notA", Eb, XX, XX },
2421 { "negA", Eb, XX, XX },
2422 { "mulB", AL, Eb, XX },
2423 { "imulB", AL, Eb, XX },
2424 { "divB", AL, Eb, XX },
2425 { "idivB", AL, Eb, XX }
252b5132
RH		 2426 },
2427 /* GRP3S */
2428 {
57d91c3c
ILT		 2429 { "testQ", Ev, Iv, XX },
2430 { "(bad)", XX, XX, XX },
2431 { "notQ", Ev, XX, XX },
2432 { "negQ", Ev, XX, XX },
2433 { "mulS", eAX, Ev, XX },
2434 { "imulS", eAX, Ev, XX },
2435 { "divS", eAX, Ev, XX },
2436 { "idivS", eAX, Ev, XX },
252b5132
RH		 2437 },
2438 /* GRP4 */
2439 {
57d91c3c
ILT		 2440 { "incA", Eb, XX, XX },
2441 { "decA", Eb, XX, XX },
2442 { "(bad)", XX, XX, XX },
2443 { "(bad)", XX, XX, XX },
2444 { "(bad)", XX, XX, XX },
2445 { "(bad)", XX, XX, XX },
2446 { "(bad)", XX, XX, XX },
2447 { "(bad)", XX, XX, XX },
252b5132
RH		 2448 },
2449 /* GRP5 */
2450 {
57d91c3c
ILT		 2451 { "incQ", Ev, XX, XX },
2452 { "decQ", Ev, XX, XX },
52b15da3
JH		 2453 { "callI", indirEv, XX, XX },
2454 { "lcallI", indirEv, XX, XX },
2455 { "jmpI", indirEv, XX, XX },
2456 { "ljmpI", indirEv, XX, XX },
90530880 2457 { "pushT", Ev, XX, XX },
57d91c3c 2458 { "(bad)", XX, XX, XX },
252b5132
RH		 2459 },
2460 /* GRP6 */
2461 {
57d91c3c
ILT		 2462 { "sldt", Ew, XX, XX },
2463 { "str", Ew, XX, XX },
2464 { "lldt", Ew, XX, XX },
2465 { "ltr", Ew, XX, XX },
2466 { "verr", Ew, XX, XX },
2467 { "verw", Ew, XX, XX },
2468 { "(bad)", XX, XX, XX },
2469 { "(bad)", XX, XX, XX }
252b5132
RH		 2470 },
2471 /* GRP7 */
2472 {
57d91c3c
ILT		 2473 { "sgdt", Ew, XX, XX },
2474 { "sidt", Ew, XX, XX },
2475 { "lgdt", Ew, XX, XX },
2476 { "lidt", Ew, XX, XX },
2477 { "smsw", Ew, XX, XX },
2478 { "(bad)", XX, XX, XX },
2479 { "lmsw", Ew, XX, XX },
2480 { "invlpg", Ew, XX, XX },
252b5132
RH		 2481 },
2482 /* GRP8 */
2483 {
57d91c3c
ILT		 2484 { "(bad)", XX, XX, XX },
2485 { "(bad)", XX, XX, XX },
2486 { "(bad)", XX, XX, XX },
2487 { "(bad)", XX, XX, XX },
2488 { "btQ", Ev, Ib, XX },
2489 { "btsQ", Ev, Ib, XX },
2490 { "btrQ", Ev, Ib, XX },
2491 { "btcQ", Ev, Ib, XX },
252b5132
RH		 2492 },
2493 /* GRP9 */
2494 {
57d91c3c
ILT		 2495 { "(bad)", XX, XX, XX },
2496 { "cmpxchg8b", Ev, XX, XX },
2497 { "(bad)", XX, XX, XX },
2498 { "(bad)", XX, XX, XX },
2499 { "(bad)", XX, XX, XX },
2500 { "(bad)", XX, XX, XX },
2501 { "(bad)", XX, XX, XX },
2502 { "(bad)", XX, XX, XX },
252b5132
RH		 2503 },
2504 /* GRP10 */
2505 {
57d91c3c
ILT		 2506 { "(bad)", XX, XX, XX },
2507 { "(bad)", XX, XX, XX },
2508 { "psrlw", MS, Ib, XX },
2509 { "(bad)", XX, XX, XX },
2510 { "psraw", MS, Ib, XX },
2511 { "(bad)", XX, XX, XX },
2512 { "psllw", MS, Ib, XX },
2513 { "(bad)", XX, XX, XX },
252b5132
RH		 2514 },
2515 /* GRP11 */
2516 {
57d91c3c
ILT		 2517 { "(bad)", XX, XX, XX },
2518 { "(bad)", XX, XX, XX },
2519 { "psrld", MS, Ib, XX },
2520 { "(bad)", XX, XX, XX },
2521 { "psrad", MS, Ib, XX },
2522 { "(bad)", XX, XX, XX },
2523 { "pslld", MS, Ib, XX },
2524 { "(bad)", XX, XX, XX },
252b5132
RH		 2525 },
2526 /* GRP12 */
2527 {
57d91c3c
ILT		 2528 { "(bad)", XX, XX, XX },
2529 { "(bad)", XX, XX, XX },
2530 { "psrlq", MS, Ib, XX },
041bd2e0 2531 { "psrldq", MS, Ib, XX },
57d91c3c
ILT		 2532 { "(bad)", XX, XX, XX },
2533 { "(bad)", XX, XX, XX },
2534 { "psllq", MS, Ib, XX },
041bd2e0 2535 { "pslldq", MS, Ib, XX },
252b5132
RH		 2536 },
2537 /* GRP13 */
2538 {
57d91c3c
ILT		 2539 { "fxsave", Ev, XX, XX },
2540 { "fxrstor", Ev, XX, XX },
2541 { "ldmxcsr", Ev, XX, XX },
2542 { "stmxcsr", Ev, XX, XX },
2543 { "(bad)", XX, XX, XX },
041bd2e0
JH		 2544 { "lfence", None, XX, XX },
2545 { "mfence", None, XX, XX },
57d91c3c 2546 { "sfence", None, XX, XX },
041bd2e0 2547 /* FIXME: the sfence with memory operand is clflush! */
c608c12e
AM		 2548 },
2549 /* GRP14 */
2550 {
57d91c3c
ILT		 2551 { "prefetchnta", Ev, XX, XX },
2552 { "prefetcht0", Ev, XX, XX },
2553 { "prefetcht1", Ev, XX, XX },
2554 { "prefetcht2", Ev, XX, XX },
2555 { "(bad)", XX, XX, XX },
2556 { "(bad)", XX, XX, XX },
2557 { "(bad)", XX, XX, XX },
2558 { "(bad)", XX, XX, XX },
252b5132 2559 },
c608c12e 2560 /* GRPAMD */
252b5132 2561 {
57d91c3c
ILT		 2562 { "prefetch", Eb, XX, XX },
2563 { "prefetchw", Eb, XX, XX },
2564 { "(bad)", XX, XX, XX },
2565 { "(bad)", XX, XX, XX },
2566 { "(bad)", XX, XX, XX },
2567 { "(bad)", XX, XX, XX },
2568 { "(bad)", XX, XX, XX },
2569 { "(bad)", XX, XX, XX },
252b5132
RH		 2570 }
2571
2572};
2573
041bd2e0 2574static const struct dis386 prefix_user_table[][4] = {
c608c12e
AM		 2575 /* PREGRP0 */
2576 {
57d91c3c
ILT		 2577 { "addps", XM, EX, XX },
2578 { "addss", XM, EX, XX },
041bd2e0
JH		 2579 { "addpd", XM, EX, XX },
2580 { "addsd", XM, EX, XX },
c608c12e
AM		 2581 },
2582 /* PREGRP1 */
2583 {
2584 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX */
2585 { "", XM, EX, OPSIMD },
041bd2e0
JH		 2586 { "", XM, EX, OPSIMD },
2587 { "", XM, EX, OPSIMD },
c608c12e
AM		 2588 },
2589 /* PREGRP2 */
2590 {
57d91c3c 2591 { "cvtpi2ps", XM, EM, XX },
76f227a5 2592 { "cvtsi2ssY", XM, Ev, XX },
041bd2e0 2593 { "cvtpi2pd", XM, EM, XX },
76f227a5 2594 { "cvtsi2sdY", XM, Ev, XX },
c608c12e
AM		 2595 },
2596 /* PREGRP3 */
2597 {
57d91c3c 2598 { "cvtps2pi", MX, EX, XX },
76f227a5 2599 { "cvtss2siY", Gv, EX, XX },
041bd2e0 2600 { "cvtpd2pi", MX, EX, XX },
76f227a5 2601 { "cvtsd2siY", Gv, EX, XX },
c608c12e
AM		 2602 },
2603 /* PREGRP4 */
2604 {
57d91c3c 2605 { "cvttps2pi", MX, EX, XX },
76f227a5 2606 { "cvttss2siY", Gv, EX, XX },
041bd2e0 2607 { "cvttpd2pi", MX, EX, XX },
76f227a5 2608 { "cvttsd2siY", Gv, EX, XX },
c608c12e
AM		 2609 },
2610 /* PREGRP5 */
2611 {
57d91c3c
ILT		 2612 { "divps", XM, EX, XX },
2613 { "divss", XM, EX, XX },
041bd2e0
JH		 2614 { "divpd", XM, EX, XX },
2615 { "divsd", XM, EX, XX },
c608c12e
AM		 2616 },
2617 /* PREGRP6 */
2618 {
57d91c3c
ILT		 2619 { "maxps", XM, EX, XX },
2620 { "maxss", XM, EX, XX },
041bd2e0
JH		 2621 { "maxpd", XM, EX, XX },
2622 { "maxsd", XM, EX, XX },
c608c12e
AM		 2623 },
2624 /* PREGRP7 */
2625 {
57d91c3c
ILT		 2626 { "minps", XM, EX, XX },
2627 { "minss", XM, EX, XX },
041bd2e0
JH		 2628 { "minpd", XM, EX, XX },
2629 { "minsd", XM, EX, XX },
c608c12e
AM		 2630 },
2631 /* PREGRP8 */
2632 {
57d91c3c
ILT		 2633 { "movups", XM, EX, XX },
2634 { "movss", XM, EX, XX },
041bd2e0
JH		 2635 { "movupd", XM, EX, XX },
2636 { "movsd", XM, EX, XX },
c608c12e
AM		 2637 },
2638 /* PREGRP9 */
2639 {
57d91c3c
ILT		 2640 { "movups", EX, XM, XX },
2641 { "movss", EX, XM, XX },
041bd2e0
JH		 2642 { "movupd", EX, XM, XX },
2643 { "movsd", EX, XM, XX },
c608c12e
AM		 2644 },
2645 /* PREGRP10 */
2646 {
57d91c3c
ILT		 2647 { "mulps", XM, EX, XX },
2648 { "mulss", XM, EX, XX },
041bd2e0
JH		 2649 { "mulpd", XM, EX, XX },
2650 { "mulsd", XM, EX, XX },
c608c12e
AM		 2651 },
2652 /* PREGRP11 */
2653 {
57d91c3c
ILT		 2654 { "rcpps", XM, EX, XX },
2655 { "rcpss", XM, EX, XX },
041bd2e0
JH		 2656 { "(bad)", XM, EX, XX },
2657 { "(bad)", XM, EX, XX },
c608c12e
AM		 2658 },
2659 /* PREGRP12 */
2660 {
57d91c3c
ILT		 2661 { "rsqrtps", XM, EX, XX },
2662 { "rsqrtss", XM, EX, XX },
041bd2e0
JH		 2663 { "(bad)", XM, EX, XX },
2664 { "(bad)", XM, EX, XX },
c608c12e
AM		 2665 },
2666 /* PREGRP13 */
2667 {
57d91c3c
ILT		 2668 { "sqrtps", XM, EX, XX },
2669 { "sqrtss", XM, EX, XX },
041bd2e0
JH		 2670 { "sqrtpd", XM, EX, XX },
2671 { "sqrtsd", XM, EX, XX },
c608c12e
AM		 2672 },
2673 /* PREGRP14 */
2674 {
57d91c3c
ILT		 2675 { "subps", XM, EX, XX },
2676 { "subss", XM, EX, XX },
041bd2e0
JH		 2677 { "subpd", XM, EX, XX },
2678 { "subsd", XM, EX, XX },
2679 },
2680 /* PREGRP15 */
2681 {
2682 { "(bad)", XM, EX, XX },
2683 { "cvtdq2pd", XM, EX, XX },
2684 { "cvttpd2dq", XM, EX, XX },
2685 { "cvtpd2dq", XM, EX, XX },
2686 },
2687 /* PREGRP16 */
2688 {
2689 { "cvtdq2ps", XM, EX, XX },
2690 { "cvttps2dq",XM, EX, XX },
2691 { "cvtps2dq",XM, EX, XX },
2692 { "(bad)", XM, EX, XX },
2693 },
2694 /* PREGRP17 */
2695 {
2696 { "cvtps2pd", XM, EX, XX },
2697 { "cvtss2sd", XM, EX, XX },
2698 { "cvtpd2ps", XM, EX, XX },
2699 { "cvtsd2ss", XM, EX, XX },
2700 },
2701 /* PREGRP18 */
2702 {
992aaec9 2703 { "maskmovq", MX, MS, XX },
041bd2e0 2704 { "(bad)", XM, EX, XX },
0f17484f 2705 { "maskmovdqu", XM, EX, XX },
041bd2e0
JH		 2706 { "(bad)", XM, EX, XX },
2707 },
2708 /* PREGRP19 */
2709 {
2710 { "movq", MX, EM, XX },
2711 { "movdqu", XM, EX, XX },
2712 { "movdqa", XM, EX, XX },
2713 { "(bad)", XM, EX, XX },
2714 },
2715 /* PREGRP20 */
2716 {
2717 { "movq", EM, MX, XX },
2718 { "movdqu", EX, XM, XX },
2719 { "movdqa", EX, XM, XX },
2720 { "(bad)", EX, XM, XX },
2721 },
2722 /* PREGRP21 */
2723 {
2724 { "(bad)", EX, XM, XX },
67d6227d 2725 { "movq2dq", XM, MS, XX },
041bd2e0 2726 { "movq", EX, XM, XX },
67d6227d 2727 { "movdq2q", MX, XS, XX },
041bd2e0
JH		 2728 },
2729 /* PREGRP22 */
2730 {
2731 { "pshufw", MX, EM, Ib },
2732 { "pshufhw", XM, EX, Ib },
2733 { "pshufd", XM, EX, Ib },
2734 { "pshuflw", XM, EX, Ib },
2735 },
2736 /* PREGRP23 */
2737 {
2738 { "movd", Ed, MX, XX },
67d6227d 2739 { "movq", XM, EX, XX },
041bd2e0 2740 { "movd", Ed, XM, XX },
0f17484f 2741 { "(bad)", Ed, XM, XX },
041bd2e0
JH		 2742 },
2743 /* PREGRP24 */
2744 {
0f17484f
AM		 2745 { "(bad)", MX, EX, XX },
2746 { "(bad)", XM, EX, XX },
041bd2e0 2747 { "punpckhqdq", XM, EX, XX },
0f17484f
AM		 2748 { "(bad)", XM, EX, XX },
2749 },
2750 /* PREGRP25 */
2751 {
2752 { "movntq", Ev, MX, XX },
2753 { "(bad)", Ev, XM, XX },
2754 { "movntdq", Ev, XM, XX },
2755 { "(bad)", Ev, XM, XX },
2756 },
2757 /* PREGRP26 */
2758 {
2759 { "(bad)", MX, EX, XX },
2760 { "(bad)", XM, EX, XX },
2761 { "punpcklqdq", XM, EX, XX },
2762 { "(bad)", XM, EX, XX },
041bd2e0 2763 },
c608c12e
AM		 2764};
2765
2766#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
2767
252b5132
RH		 2768static void
2769ckprefix ()
2770{
52b15da3
JH		 2771 int newrex;
2772 rex = 0;
252b5132 2773 prefixes = 0;
7d421014 2774 used_prefixes = 0;
52b15da3 2775 rex_used = 0;
252b5132
RH		 2776 while (1)
2777 {
2778 FETCH_DATA (the_info, codep + 1);
52b15da3 2779 newrex = 0;
252b5132
RH		 2780 switch (*codep)
2781 {
52b15da3
JH		 2782 /* REX prefixes family. */
2783 case 0x40:
2784 case 0x41:
2785 case 0x42:
2786 case 0x43:
2787 case 0x44:
2788 case 0x45:
2789 case 0x46:
2790 case 0x47:
2791 case 0x48:
2792 case 0x49:
2793 case 0x4a:
2794 case 0x4b:
2795 case 0x4c:
2796 case 0x4d:
2797 case 0x4e:
2798 case 0x4f:
2799 if (mode_64bit)
2800 newrex = *codep;
2801 else
2802 return;
2803 break;
252b5132
RH		 2804 case 0xf3:
2805 prefixes |= PREFIX_REPZ;
2806 break;
2807 case 0xf2:
2808 prefixes |= PREFIX_REPNZ;
2809 break;
2810 case 0xf0:
2811 prefixes |= PREFIX_LOCK;
2812 break;
2813 case 0x2e:
2814 prefixes |= PREFIX_CS;
2815 break;
2816 case 0x36:
2817 prefixes |= PREFIX_SS;
2818 break;
2819 case 0x3e:
2820 prefixes |= PREFIX_DS;
2821 break;
2822 case 0x26:
2823 prefixes |= PREFIX_ES;
2824 break;
2825 case 0x64:
2826 prefixes |= PREFIX_FS;
2827 break;
2828 case 0x65:
2829 prefixes |= PREFIX_GS;
2830 break;
2831 case 0x66:
2832 prefixes |= PREFIX_DATA;
2833 break;
2834 case 0x67:
2835 prefixes |= PREFIX_ADDR;
2836 break;
5076851f 2837 case FWAIT_OPCODE:
252b5132
RH		 2838 /* fwait is really an instruction. If there are prefixes
2839 before the fwait, they belong to the fwait, *not* to the
2840 following instruction. */
2841 if (prefixes)
2842 {
2843 prefixes |= PREFIX_FWAIT;
2844 codep++;
2845 return;
2846 }
2847 prefixes = PREFIX_FWAIT;
2848 break;
2849 default:
2850 return;
2851 }
52b15da3
JH		 2852 /* Rex is ignored when followed by another prefix. */
2853 if (rex)
2854 {
2855 oappend (prefix_name (rex, 0));
2856 oappend (" ");
2857 }
2858 rex = newrex;
252b5132
RH		 2859 codep++;
2860 }
2861}
2862
7d421014
ILT		 2863/* Return the name of the prefix byte PREF, or NULL if PREF is not a
2864 prefix byte. */
2865
2866static const char *
2867prefix_name (pref, sizeflag)
2868 int pref;
2869 int sizeflag;
2870{
2871 switch (pref)
2872 {
52b15da3
JH		 2873 /* REX prefixes family. */
2874 case 0x40:
2875 return "rex";
2876 case 0x41:
2877 return "rexZ";
2878 case 0x42:
2879 return "rexY";
2880 case 0x43:
2881 return "rexYZ";
2882 case 0x44:
2883 return "rexX";
2884 case 0x45:
2885 return "rexXZ";
2886 case 0x46:
2887 return "rexXY";
2888 case 0x47:
2889 return "rexXYZ";
2890 case 0x48:
2891 return "rex64";
2892 case 0x49:
2893 return "rex64Z";
2894 case 0x4a:
2895 return "rex64Y";
2896 case 0x4b:
2897 return "rex64YZ";
2898 case 0x4c:
2899 return "rex64X";
2900 case 0x4d:
2901 return "rex64XZ";
2902 case 0x4e:
2903 return "rex64XY";
2904 case 0x4f:
2905 return "rex64XYZ";
7d421014
ILT		 2906 case 0xf3:
2907 return "repz";
2908 case 0xf2:
2909 return "repnz";
2910 case 0xf0:
2911 return "lock";
2912 case 0x2e:
2913 return "cs";
2914 case 0x36:
2915 return "ss";
2916 case 0x3e:
2917 return "ds";
2918 case 0x26:
2919 return "es";
2920 case 0x64:
2921 return "fs";
2922 case 0x65:
2923 return "gs";
2924 case 0x66:
2925 return (sizeflag & DFLAG) ? "data16" : "data32";
2926 case 0x67:
2927 return (sizeflag & AFLAG) ? "addr16" : "addr32";
2928 case FWAIT_OPCODE:
2929 return "fwait";
2930 default:
2931 return NULL;
2932 }
2933}
2934
252b5132
RH		 2935static char op1out[100], op2out[100], op3out[100];
2936static int op_ad, op_index[3];
2937static unsigned int op_address[3];
52b15da3
JH		 2938static unsigned int op_riprel[3];
2939static bfd_vma start_pc;
252b5132
RH		 2940
2941\f
2942/*
2943 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
2944 * (see topic "Redundant prefixes" in the "Differences from 8086"
2945 * section of the "Virtual 8086 Mode" chapter.)
2946 * 'pc' should be the address of this instruction, it will
2947 * be used to print the target address if this is a relative jump or call
2948 * The function returns the length of this instruction in bytes.
2949 */
2950
252b5132
RH		 2951static int print_insn_i386
2952 PARAMS ((bfd_vma pc, disassemble_info *info));
2953
2954static char intel_syntax;
2955static char open_char;
2956static char close_char;
2957static char separator_char;
2958static char scale_char;
2959
2960int
2961print_insn_i386_att (pc, info)
2962 bfd_vma pc;
2963 disassemble_info *info;
2964{
2965 intel_syntax = 0;
2966 open_char = '(';
2967 close_char = ')';
2968 separator_char = ',';
2969 scale_char = ',';
2970
2971 return print_insn_i386 (pc, info);
2972}
2973
2974int
2975print_insn_i386_intel (pc, info)
2976 bfd_vma pc;
2977 disassemble_info *info;
2978{
2979 intel_syntax = 1;
2980 open_char = '[';
2981 close_char = ']';
2982 separator_char = '+';
2983 scale_char = '*';
2984
2985 return print_insn_i386 (pc, info);
2986}
2987
2988static int
2989print_insn_i386 (pc, info)
2990 bfd_vma pc;
2991 disassemble_info *info;
2992{
2da11e11 2993 const struct dis386 *dp;
252b5132
RH		 2994 int i;
2995 int two_source_ops;
2996 char *first, *second, *third;
2997 int needcomma;
041bd2e0 2998 unsigned char uses_SSE_prefix;
57d91c3c
ILT		 2999 VOLATILE int sizeflag;
3000 VOLATILE int orig_sizeflag;
252b5132
RH		 3001
3002 struct dis_private priv;
3003 bfd_byte *inbuf = priv.the_buffer;
3004
52b15da3
JH		 3005 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
3006 || info->mach == bfd_mach_x86_64);
3007
2da11e11 3008 if (info->mach == bfd_mach_i386_i386
52b15da3
JH		 3009 || info->mach == bfd_mach_x86_64
3010 || info->mach == bfd_mach_i386_i386_intel_syntax
3011 || info->mach == bfd_mach_x86_64_intel_syntax)
2da11e11
AM		 3012 sizeflag = AFLAG|DFLAG;
3013 else if (info->mach == bfd_mach_i386_i8086)
3014 sizeflag = 0;
3015 else
3016 abort ();
7d421014 3017 orig_sizeflag = sizeflag;
2da11e11 3018
4fe53c98 3019 /* The output looks better if we put 7 bytes on a line, since that
c608c12e 3020 puts most long word instructions on a single line. */
4fe53c98 3021 info->bytes_per_line = 7;
252b5132
RH		 3022
3023 info->private_data = (PTR) &priv;
3024 priv.max_fetched = priv.the_buffer;
3025 priv.insn_start = pc;
252b5132
RH		 3026
3027 obuf[0] = 0;
3028 op1out[0] = 0;
3029 op2out[0] = 0;
3030 op3out[0] = 0;
3031
3032 op_index[0] = op_index[1] = op_index[2] = -1;
3033
3034 the_info = info;
3035 start_pc = pc;
3036 start_codep = inbuf;
3037 codep = inbuf;
3038
5076851f
ILT		 3039 if (setjmp (priv.bailout) != 0)
3040 {
7d421014
ILT		 3041 const char *name;
3042
5076851f 3043 /* Getting here means we tried for data but didn't get it. That
7d421014
ILT		 3044 means we have an incomplete instruction of some sort. Just
3045 print the first byte as a prefix or a .byte pseudo-op. */
3046 if (codep > inbuf)
5076851f 3047 {
7d421014
ILT		 3048 name = prefix_name (inbuf[0], orig_sizeflag);
3049 if (name != NULL)
3050 (*info->fprintf_func) (info->stream, "%s", name);
3051 else
5076851f 3052 {
7d421014
ILT		 3053 /* Just print the first byte as a .byte instruction. */
3054 (*info->fprintf_func) (info->stream, ".byte 0x%x",
3055 (unsigned int) inbuf[0]);
5076851f 3056 }
5076851f 3057
7d421014 3058 return 1;
5076851f
ILT		 3059 }
3060
3061 return -1;
3062 }
3063
52b15da3 3064 obufp = obuf;
252b5132
RH		 3065 ckprefix ();
3066
3067 insn_codep = codep;
3068
3069 FETCH_DATA (info, codep + 1);
3070 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3071
252b5132
RH		 3072 if ((prefixes & PREFIX_FWAIT)
3073 && ((*codep < 0xd8) || (*codep > 0xdf)))
3074 {
7d421014
ILT		 3075 const char *name;
3076
3077 /* fwait not followed by floating point instruction. Print the
3078 first prefix, which is probably fwait itself. */
3079 name = prefix_name (inbuf[0], orig_sizeflag);
3080 if (name == NULL)
3081 name = INTERNAL_DISASSEMBLER_ERROR;
3082 (*info->fprintf_func) (info->stream, "%s", name);
3083 return 1;
252b5132
RH		 3084 }
3085
252b5132
RH		 3086 if (*codep == 0x0f)
3087 {
3088 FETCH_DATA (info, codep + 2);
3089 if (intel_syntax)
3090 dp = &dis386_twobyte_intel[*++codep];
3091 else
3092 dp = &dis386_twobyte_att[*++codep];
3093 need_modrm = twobyte_has_modrm[*codep];
041bd2e0 3094 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
252b5132
RH		 3095 }
3096 else
3097 {
3098 if (intel_syntax)
52b15da3
JH		 3099 if (mode_64bit)
3100 dp = &dis386_64_intel[*codep];
3101 else
3102 dp = &dis386_intel[*codep];
252b5132 3103 else
52b15da3
JH		 3104 if (mode_64bit)
3105 dp = &disx86_64_att[*codep];
3106 else
3107 dp = &dis386_att[*codep];
252b5132 3108 need_modrm = onebyte_has_modrm[*codep];
041bd2e0 3109 uses_SSE_prefix = 0;
252b5132
RH		 3110 }
3111 codep++;
3112
041bd2e0 3113 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
7d421014
ILT		 3114 {
3115 oappend ("repz ");
3116 used_prefixes |= PREFIX_REPZ;
3117 }
041bd2e0 3118 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
7d421014
ILT		 3119 {
3120 oappend ("repnz ");
3121 used_prefixes |= PREFIX_REPNZ;
3122 }
c608c12e 3123 if (prefixes & PREFIX_LOCK)
7d421014
ILT		 3124 {
3125 oappend ("lock ");
3126 used_prefixes |= PREFIX_LOCK;
3127 }
c608c12e 3128
041bd2e0 3129 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
c608c12e
AM		 3130 sizeflag ^= DFLAG;
3131
3132 if (prefixes & PREFIX_ADDR)
3133 {
3134 sizeflag ^= AFLAG;
3135 if (sizeflag & AFLAG)
3136 oappend ("addr32 ");
3137 else
3138 oappend ("addr16 ");
7d421014 3139 used_prefixes |= PREFIX_ADDR;
c608c12e
AM		 3140 }
3141
252b5132
RH		 3142 if (need_modrm)
3143 {
3144 FETCH_DATA (info, codep + 1);
3145 mod = (*codep >> 6) & 3;
3146 reg = (*codep >> 3) & 7;
3147 rm = *codep & 7;
3148 }
8d5ec599
L		 3149 else
3150 {
3151 mod = 0;
3152 reg = 0;
3153 rm = 0;
3154 }
252b5132
RH		 3155
3156 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
3157 {
3158 dofloat (sizeflag);
3159 }
3160 else
3161 {
041bd2e0 3162 int index;
252b5132 3163 if (dp->name == NULL)
c608c12e
AM		 3164 {
3165 switch(dp->bytemode2)
3166 {
3167 case USE_GROUPS:
3168 dp = &grps[dp->bytemode1][reg];
3169 break;
3170 case USE_PREFIX_USER_TABLE:
041bd2e0 3171 index = 0;
7d421014 3172 used_prefixes |= (prefixes & PREFIX_REPZ);
041bd2e0
JH		 3173 if (prefixes & PREFIX_REPZ)
3174 index = 1;
3175 else
3176 {
3177 used_prefixes |= (prefixes & PREFIX_DATA);
3178 if (prefixes & PREFIX_DATA)
3179 index = 2;
3180 else
3181 {
3182 used_prefixes |= (prefixes & PREFIX_REPNZ);
3183 if (prefixes & PREFIX_REPNZ)
3184 index = 3;
041bd2e0
JH		 3185 }
3186 }
3187 dp = &prefix_user_table[dp->bytemode1][index];
c608c12e
AM		 3188 break;
3189 default:
3190 oappend (INTERNAL_DISASSEMBLER_ERROR);
3191 break;
3192 }
3193 }
252b5132
RH		 3194
3195 putop (dp->name, sizeflag);
3196
3197 obufp = op1out;
3198 op_ad = 2;
3199 if (dp->op1)
3200 (*dp->op1)(dp->bytemode1, sizeflag);
3201
3202 obufp = op2out;
3203 op_ad = 1;
3204 if (dp->op2)
3205 (*dp->op2)(dp->bytemode2, sizeflag);
3206
3207 obufp = op3out;
3208 op_ad = 0;
3209 if (dp->op3)
3210 (*dp->op3)(dp->bytemode3, sizeflag);
3211 }
3212
7d421014
ILT		 3213 /* See if any prefixes were not used. If so, print the first one
3214 separately. If we don't do this, we'll wind up printing an
3215 instruction stream which does not precisely correspond to the
3216 bytes we are disassembling. */
3217 if ((prefixes & ~used_prefixes) != 0)
3218 {
3219 const char *name;
3220
3221 name = prefix_name (inbuf[0], orig_sizeflag);
3222 if (name == NULL)
3223 name = INTERNAL_DISASSEMBLER_ERROR;
3224 (*info->fprintf_func) (info->stream, "%s", name);
3225 return 1;
3226 }
52b15da3
JH		 3227 if (rex & ~rex_used)
3228 {
3229 const char *name;
3230 name = prefix_name (rex | 0x40, orig_sizeflag);
3231 if (name == NULL)
3232 name = INTERNAL_DISASSEMBLER_ERROR;
3233 (*info->fprintf_func) (info->stream, "%s ", name);
3234 }
7d421014 3235
252b5132
RH		 3236 obufp = obuf + strlen (obuf);
3237 for (i = strlen (obuf); i < 6; i++)
3238 oappend (" ");
3239 oappend (" ");
3240 (*info->fprintf_func) (info->stream, "%s", obuf);
3241
3242 /* The enter and bound instructions are printed with operands in the same
3243 order as the intel book; everything else is printed in reverse order. */
2da11e11 3244 if (intel_syntax || two_source_ops)
252b5132
RH		 3245 {
3246 first = op1out;
3247 second = op2out;
3248 third = op3out;
3249 op_ad = op_index[0];
3250 op_index[0] = op_index[2];
3251 op_index[2] = op_ad;
3252 }
3253 else
3254 {
3255 first = op3out;
3256 second = op2out;
3257 third = op1out;
3258 }
3259 needcomma = 0;
3260 if (*first)
3261 {
52b15da3 3262 if (op_index[0] != -1 && !op_riprel[0])
252b5132
RH		 3263 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
3264 else
3265 (*info->fprintf_func) (info->stream, "%s", first);
3266 needcomma = 1;
3267 }
3268 if (*second)
3269 {
3270 if (needcomma)
3271 (*info->fprintf_func) (info->stream, ",");
52b15da3 3272 if (op_index[1] != -1 && !op_riprel[1])
252b5132
RH		 3273 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
3274 else
3275 (*info->fprintf_func) (info->stream, "%s", second);
3276 needcomma = 1;
3277 }
3278 if (*third)
3279 {
3280 if (needcomma)
3281 (*info->fprintf_func) (info->stream, ",");
52b15da3 3282 if (op_index[2] != -1 && !op_riprel[2])
252b5132
RH		 3283 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
3284 else
3285 (*info->fprintf_func) (info->stream, "%s", third);
3286 }
52b15da3
JH		 3287 for (i = 0; i < 3; i++)
3288 if (op_index[i] != -1 && op_riprel[i])
3289 {
3290 (*info->fprintf_func) (info->stream, " # ");
3291 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
3292 + op_address[op_index[i]]), info);
3293 }
252b5132
RH		 3294 return codep - inbuf;
3295}
3296
2da11e11 3297static const char *float_mem_att[] = {
252b5132
RH		 3298 /* d8 */
3299 "fadds",
3300 "fmuls",
3301 "fcoms",
3302 "fcomps",
3303 "fsubs",
3304 "fsubrs",
3305 "fdivs",
3306 "fdivrs",
3307 /* d9 */
3308 "flds",
3309 "(bad)",
3310 "fsts",
3311 "fstps",
3312 "fldenv",
3313 "fldcw",
3314 "fNstenv",
3315 "fNstcw",
3316 /* da */
3317 "fiaddl",
3318 "fimull",
3319 "ficoml",
3320 "ficompl",
3321 "fisubl",
3322 "fisubrl",
3323 "fidivl",
3324 "fidivrl",
3325 /* db */
3326 "fildl",
3327 "(bad)",
3328 "fistl",
3329 "fistpl",
3330 "(bad)",
3331 "fldt",
3332 "(bad)",
3333 "fstpt",
3334 /* dc */
3335 "faddl",
3336 "fmull",
3337 "fcoml",
3338 "fcompl",
3339 "fsubl",
3340 "fsubrl",
3341 "fdivl",
3342 "fdivrl",
3343 /* dd */
3344 "fldl",
3345 "(bad)",
3346 "fstl",
3347 "fstpl",
3348 "frstor",
3349 "(bad)",
3350 "fNsave",
3351 "fNstsw",
3352 /* de */
3353 "fiadd",
3354 "fimul",
3355 "ficom",
3356 "ficomp",
3357 "fisub",
3358 "fisubr",
3359 "fidiv",
3360 "fidivr",
3361 /* df */
3362 "fild",
3363 "(bad)",
3364 "fist",
3365 "fistp",
3366 "fbld",
3367 "fildll",
3368 "fbstp",
3369 "fistpll",
3370};
3371
2da11e11 3372static const char *float_mem_intel[] = {
252b5132
RH		 3373 /* d8 */
3374 "fadd",
3375 "fmul",
3376 "fcom",
3377 "fcomp",
3378 "fsub",
3379 "fsubr",
3380 "fdiv",
3381 "fdivr",
3382 /* d9 */
3383 "fld",
3384 "(bad)",
3385 "fst",
3386 "fstp",
3387 "fldenv",
3388 "fldcw",
3389 "fNstenv",
3390 "fNstcw",
3391 /* da */
3392 "fiadd",
3393 "fimul",
3394 "ficom",
3395 "ficomp",
3396 "fisub",
3397 "fisubr",
3398 "fidiv",
3399 "fidivr",
3400 /* db */
3401 "fild",
3402 "(bad)",
3403 "fist",
3404 "fistp",
3405 "(bad)",
3406 "fld",
3407 "(bad)",
3408 "fstp",
3409 /* dc */
3410 "fadd",
3411 "fmul",
3412 "fcom",
3413 "fcomp",
3414 "fsub",
3415 "fsubr",
3416 "fdiv",
3417 "fdivr",
3418 /* dd */
3419 "fld",
3420 "(bad)",
3421 "fst",
3422 "fstp",
3423 "frstor",
3424 "(bad)",
3425 "fNsave",
3426 "fNstsw",
3427 /* de */
3428 "fiadd",
3429 "fimul",
3430 "ficom",
3431 "ficomp",
3432 "fisub",
3433 "fisubr",
3434 "fidiv",
3435 "fidivr",
3436 /* df */
3437 "fild",
3438 "(bad)",
3439 "fist",
3440 "fistp",
3441 "fbld",
3442 "fild",
3443 "fbstp",
3444 "fistpll",
3445};
3446
3447#define ST OP_ST, 0
3448#define STi OP_STi, 0
3449
57d91c3c
ILT		 3450#define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
3451#define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
3452#define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
3453#define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
3454#define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
3455#define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
3456#define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
3457#define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
3458#define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
252b5132 3459
2da11e11 3460static const struct dis386 float_reg[][8] = {
252b5132
RH		 3461 /* d8 */
3462 {
57d91c3c
ILT		 3463 { "fadd", ST, STi, XX },
3464 { "fmul", ST, STi, XX },
3465 { "fcom", STi, XX, XX },
3466 { "fcomp", STi, XX, XX },
3467 { "fsub", ST, STi, XX },
3468 { "fsubr", ST, STi, XX },
3469 { "fdiv", ST, STi, XX },
3470 { "fdivr", ST, STi, XX },
252b5132
RH		 3471 },
3472 /* d9 */
3473 {
57d91c3c
ILT		 3474 { "fld", STi, XX, XX },
3475 { "fxch", STi, XX, XX },
252b5132 3476 { FGRPd9_2 },
57d91c3c 3477 { "(bad)", XX, XX, XX },
252b5132
RH		 3478 { FGRPd9_4 },
3479 { FGRPd9_5 },
3480 { FGRPd9_6 },
3481 { FGRPd9_7 },
3482 },
3483 /* da */
3484 {
57d91c3c
ILT		 3485 { "fcmovb", ST, STi, XX },
3486 { "fcmove", ST, STi, XX },
3487 { "fcmovbe",ST, STi, XX },
3488 { "fcmovu", ST, STi, XX },
3489 { "(bad)", XX, XX, XX },
252b5132 3490 { FGRPda_5 },
57d91c3c
ILT		 3491 { "(bad)", XX, XX, XX },
3492 { "(bad)", XX, XX, XX },
252b5132
RH		 3493 },
3494 /* db */
3495 {
57d91c3c
ILT		 3496 { "fcmovnb",ST, STi, XX },
3497 { "fcmovne",ST, STi, XX },
3498 { "fcmovnbe",ST, STi, XX },
3499 { "fcmovnu",ST, STi, XX },
252b5132 3500 { FGRPdb_4 },
57d91c3c
ILT		 3501 { "fucomi", ST, STi, XX },
3502 { "fcomi", ST, STi, XX },
3503 { "(bad)", XX, XX, XX },
252b5132
RH		 3504 },
3505 /* dc */
3506 {
57d91c3c
ILT		 3507 { "fadd", STi, ST, XX },
3508 { "fmul", STi, ST, XX },
3509 { "(bad)", XX, XX, XX },
3510 { "(bad)", XX, XX, XX },
252b5132 3511#if UNIXWARE_COMPAT
57d91c3c
ILT		 3512 { "fsub", STi, ST, XX },
3513 { "fsubr", STi, ST, XX },
3514 { "fdiv", STi, ST, XX },
3515 { "fdivr", STi, ST, XX },
252b5132 3516#else
57d91c3c
ILT		 3517 { "fsubr", STi, ST, XX },
3518 { "fsub", STi, ST, XX },
3519 { "fdivr", STi, ST, XX },
3520 { "fdiv", STi, ST, XX },
252b5132
RH		 3521#endif
3522 },
3523 /* dd */
3524 {
57d91c3c
ILT		 3525 { "ffree", STi, XX, XX },
3526 { "(bad)", XX, XX, XX },
3527 { "fst", STi, XX, XX },
3528 { "fstp", STi, XX, XX },
3529 { "fucom", STi, XX, XX },
3530 { "fucomp", STi, XX, XX },
3531 { "(bad)", XX, XX, XX },
3532 { "(bad)", XX, XX, XX },
252b5132
RH		 3533 },
3534 /* de */
3535 {
57d91c3c
ILT		 3536 { "faddp", STi, ST, XX },
3537 { "fmulp", STi, ST, XX },
3538 { "(bad)", XX, XX, XX },
252b5132
RH		 3539 { FGRPde_3 },
3540#if UNIXWARE_COMPAT
57d91c3c
ILT		 3541 { "fsubp", STi, ST, XX },
3542 { "fsubrp", STi, ST, XX },
3543 { "fdivp", STi, ST, XX },
3544 { "fdivrp", STi, ST, XX },
252b5132 3545#else
57d91c3c
ILT		 3546 { "fsubrp", STi, ST, XX },
3547 { "fsubp", STi, ST, XX },
3548 { "fdivrp", STi, ST, XX },
3549 { "fdivp", STi, ST, XX },
252b5132
RH		 3550#endif
3551 },
3552 /* df */
3553 {
c2419411 3554 { "ffreep", STi, XX, XX },
57d91c3c
ILT		 3555 { "(bad)", XX, XX, XX },
3556 { "(bad)", XX, XX, XX },
3557 { "(bad)", XX, XX, XX },
252b5132 3558 { FGRPdf_4 },
57d91c3c
ILT		 3559 { "fucomip",ST, STi, XX },
3560 { "fcomip", ST, STi, XX },
3561 { "(bad)", XX, XX, XX },
252b5132
RH		 3562 },
3563};
3564
3565
3566static char *fgrps[][8] = {
3567 /* d9_2 0 */
3568 {
3569 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3570 },
3571
3572 /* d9_4 1 */
3573 {
3574 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
3575 },
3576
3577 /* d9_5 2 */
3578 {
3579 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
3580 },
3581
3582 /* d9_6 3 */
3583 {
3584 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
3585 },
3586
3587 /* d9_7 4 */
3588 {
3589 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
3590 },
3591
3592 /* da_5 5 */
3593 {
3594 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3595 },
3596
3597 /* db_4 6 */
3598 {
3599 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
3600 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
3601 },
3602
3603 /* de_3 7 */
3604 {
3605 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3606 },
3607
3608 /* df_4 8 */
3609 {
3610 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3611 },
3612};
3613
3614static void
3615dofloat (sizeflag)
3616 int sizeflag;
3617{
2da11e11 3618 const struct dis386 *dp;
252b5132
RH		 3619 unsigned char floatop;
3620
3621 floatop = codep[-1];
3622
3623 if (mod != 3)
3624 {
3625 if (intel_syntax)
3626 putop (float_mem_intel[(floatop - 0xd8 ) * 8 + reg], sizeflag);
3627 else
3628 putop (float_mem_att[(floatop - 0xd8 ) * 8 + reg], sizeflag);
3629 obufp = op1out;
3630 if (floatop == 0xdb)
3631 OP_E (x_mode, sizeflag);
3632 else if (floatop == 0xdd)
3633 OP_E (d_mode, sizeflag);
2da11e11 3634 else
252b5132
RH		 3635 OP_E (v_mode, sizeflag);
3636 return;
3637 }
4bba6815
AM		 3638 /* skip mod/rm byte */
3639 MODRM_CHECK;
252b5132
RH		 3640 codep++;
3641
3642 dp = &float_reg[floatop - 0xd8][reg];
3643 if (dp->name == NULL)
3644 {
3645 putop (fgrps[dp->bytemode1][rm], sizeflag);
3646
3647 /* instruction fnstsw is only one with strange arg */
3648 if (floatop == 0xdf && codep[-1] == 0xe0)
3649 strcpy (op1out, names16[0]);
3650 }
3651 else
3652 {
3653 putop (dp->name, sizeflag);
3654
3655 obufp = op1out;
3656 if (dp->op1)
3657 (*dp->op1)(dp->bytemode1, sizeflag);
3658 obufp = op2out;
3659 if (dp->op2)
3660 (*dp->op2)(dp->bytemode2, sizeflag);
3661 }
3662}
3663
3664/* ARGSUSED */
3665static void
3666OP_ST (ignore, sizeflag)
57d91c3c
ILT		 3667 int ignore ATTRIBUTE_UNUSED;
3668 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 3669{
3670 oappend ("%st");
3671}
3672
3673/* ARGSUSED */
3674static void
3675OP_STi (ignore, sizeflag)
57d91c3c
ILT		 3676 int ignore ATTRIBUTE_UNUSED;
3677 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 3678{
3679 sprintf (scratchbuf, "%%st(%d)", rm);
3680 oappend (scratchbuf);
3681}
3682
3683
3684/* capital letters in template are macros */
3685static void
3686putop (template, sizeflag)
2da11e11 3687 const char *template;
252b5132
RH		 3688 int sizeflag;
3689{
2da11e11 3690 const char *p;
252b5132
RH		 3691
3692 for (p = template; *p; p++)
3693 {
3694 switch (*p)
3695 {
3696 default:
3697 *obufp++ = *p;
3698 break;
3699 case 'A':
3700 if (intel_syntax)
3701 break;
3702 if (mod != 3
3703#ifdef SUFFIX_ALWAYS
3704 || (sizeflag & SUFFIX_ALWAYS)
3705#endif
3706 )
3707 *obufp++ = 'b';
3708 break;
3709 case 'B':
3710 if (intel_syntax)
3711 break;
3712#ifdef SUFFIX_ALWAYS
3713 if (sizeflag & SUFFIX_ALWAYS)
3714 *obufp++ = 'b';
3715#endif
3716 break;
3717 case 'E': /* For jcxz/jecxz */
3718 if (sizeflag & AFLAG)
3719 *obufp++ = 'e';
3720 break;
90530880
JH		 3721 case 'I':
3722 if (intel_syntax)
3723 break;
3724 if (mode_64bit)
3725 *obufp++ = 'q';
3726 else
3727 {
3728 if ((prefixes & PREFIX_DATA)
3729#ifdef SUFFIX_ALWAYS
3730 || (sizeflag & SUFFIX_ALWAYS)
3731#endif
3732 )
3733 {
3734 if (sizeflag & DFLAG)
3735 *obufp++ = 'l';
3736 else
3737 *obufp++ = 'w';
3738 used_prefixes |= (prefixes & PREFIX_DATA);
3739 }
3740 }
3741 break;
252b5132
RH		 3742 case 'L':
3743 if (intel_syntax)
3744 break;
3745#ifdef SUFFIX_ALWAYS
3746 if (sizeflag & SUFFIX_ALWAYS)
3747 *obufp++ = 'l';
3748#endif
3749 break;
3750 case 'N':
3751 if ((prefixes & PREFIX_FWAIT) == 0)
3752 *obufp++ = 'n';
7d421014
ILT		 3753 else
3754 used_prefixes |= PREFIX_FWAIT;
252b5132 3755 break;
52b15da3
JH		 3756 case 'O':
3757 USED_REX (REX_MODE64);
3758 if (rex & REX_MODE64)
3759 *obufp++ = 'o';
3760 else
3761 *obufp++ = 'd';
3762 break;
252b5132
RH		 3763 case 'P':
3764 if (intel_syntax)
3765 break;
3766 if ((prefixes & PREFIX_DATA)
52b15da3 3767 || (rex & REX_MODE64)
252b5132
RH		 3768#ifdef SUFFIX_ALWAYS
3769 || (sizeflag & SUFFIX_ALWAYS)
3770#endif
3771 )
3772 {
52b15da3
JH		 3773 USED_REX (REX_MODE64);
3774 if (rex & REX_MODE64)
3775 *obufp++ = 'q';
c2419411 3776 else
52b15da3
JH		 3777 {
3778 if (sizeflag & DFLAG)
3779 *obufp++ = 'l';
3780 else
3781 *obufp++ = 'w';
3782 used_prefixes |= (prefixes & PREFIX_DATA);
3783 }
252b5132
RH		 3784 }
3785 break;
3786 case 'Q':
3787 if (intel_syntax)
3788 break;
90530880 3789 USED_REX (REX_MODE64);
252b5132
RH		 3790 if (mod != 3
3791#ifdef SUFFIX_ALWAYS
3792 || (sizeflag & SUFFIX_ALWAYS)
3793#endif
3794 )
3795 {
52b15da3
JH		 3796 if (rex & REX_MODE64)
3797 *obufp++ = 'q';
252b5132 3798 else
52b15da3
JH		 3799 {
3800 if (sizeflag & DFLAG)
3801 *obufp++ = 'l';
3802 else
3803 *obufp++ = 'w';
3804 used_prefixes |= (prefixes & PREFIX_DATA);
3805 }
252b5132
RH		 3806 }
3807 break;
3808 case 'R':
52b15da3 3809 USED_REX (REX_MODE64);
252b5132 3810 if (intel_syntax)
c608c12e 3811 {
52b15da3
JH		 3812 if (rex & REX_MODE64)
3813 {
3814 *obufp++ = 'q';
3815 *obufp++ = 't';
3816 }
3817 else if (sizeflag & DFLAG)
c608c12e
AM		 3818 {
3819 *obufp++ = 'd';
3820 *obufp++ = 'q';
3821 }
3822 else
3823 {
3824 *obufp++ = 'w';
3825 *obufp++ = 'd';
3826 }
3827 }
252b5132 3828 else
c608c12e 3829 {
52b15da3
JH		 3830 if (rex & REX_MODE64)
3831 *obufp++ = 'q';
3832 else if (sizeflag & DFLAG)
c608c12e
AM		 3833 *obufp++ = 'l';
3834 else
3835 *obufp++ = 'w';
3836 }
52b15da3
JH		 3837 if (!(rex & REX_MODE64))
3838 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3839 break;
3840 case 'S':
3841 if (intel_syntax)
3842 break;
3843#ifdef SUFFIX_ALWAYS
3844 if (sizeflag & SUFFIX_ALWAYS)
3845 {
52b15da3
JH		 3846 if (rex & REX_MODE64)
3847 *obufp++ = 'q';
252b5132 3848 else
52b15da3
JH		 3849 {
3850 if (sizeflag & DFLAG)
3851 *obufp++ = 'l';
3852 else
3853 *obufp++ = 'w';
3854 used_prefixes |= (prefixes & PREFIX_DATA);
3855 }
252b5132
RH		 3856 }
3857#endif
3858 break;
90530880
JH		 3859 case 'T':
3860 if (intel_syntax)
3861 break;
3862 if (mode_64bit)
3863 *obufp++ = 'q';
3864 else if (mod != 3
3865#ifdef SUFFIX_ALWAYS
3866 || (sizeflag & SUFFIX_ALWAYS)
3867#endif
3868 )
3869 {
3870 if (sizeflag & DFLAG)
3871 *obufp++ = 'l';
3872 else
3873 *obufp++ = 'w';
3874 used_prefixes |= (prefixes & PREFIX_DATA);
3875 }
3876 break;
041bd2e0
JH		 3877 case 'X':
3878 if (prefixes & PREFIX_DATA)
3879 *obufp++ = 'd';
3880 else
3881 *obufp++ = 's';
3882 used_prefixes |= (prefixes & PREFIX_DATA);
3883 break;
76f227a5
JH		 3884 case 'Y':
3885 if (intel_syntax)
3886 break;
3887 if (rex & REX_MODE64)
3888 {
3889 USED_REX (REX_MODE64);
3890 *obufp++ = 'q';
3891 }
3892 break;
52b15da3 3893 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
252b5132 3894 case 'W':
252b5132 3895 /* operand size flag for cwtl, cbtw */
52b15da3
JH		 3896 USED_REX (0);
3897 if (rex)
3898 *obufp++ = 'l';
3899 else if (sizeflag & DFLAG)
252b5132
RH		 3900 *obufp++ = 'w';
3901 else
3902 *obufp++ = 'b';
c608c12e
AM		 3903 if (intel_syntax)
3904 {
52b15da3
JH		 3905 if (rex)
3906 {
3907 *obufp++ = 'q';
3908 *obufp++ = 'e';
3909 }
c608c12e
AM		 3910 if (sizeflag & DFLAG)
3911 {
3912 *obufp++ = 'd';
3913 *obufp++ = 'e';
3914 }
3915 else
3916 {
3917 *obufp++ = 'w';
3918 }
3919 }
52b15da3
JH		 3920 if (!rex)
3921 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3922 break;
3923 }
3924 }
3925 *obufp = 0;
3926}
3927
3928static void
3929oappend (s)
2da11e11 3930 const char *s;
252b5132
RH		 3931{
3932 strcpy (obufp, s);
3933 obufp += strlen (s);
3934}
3935
3936static void
3937append_seg ()
3938{
3939 if (prefixes & PREFIX_CS)
7d421014
ILT		 3940 {
3941 oappend ("%cs:");
3942 used_prefixes |= PREFIX_CS;
3943 }
252b5132 3944 if (prefixes & PREFIX_DS)
7d421014
ILT		 3945 {
3946 oappend ("%ds:");
3947 used_prefixes |= PREFIX_DS;
3948 }
252b5132 3949 if (prefixes & PREFIX_SS)
7d421014
ILT		 3950 {
3951 oappend ("%ss:");
3952 used_prefixes |= PREFIX_SS;
3953 }
252b5132 3954 if (prefixes & PREFIX_ES)
7d421014
ILT		 3955 {
3956 oappend ("%es:");
3957 used_prefixes |= PREFIX_ES;
3958 }
252b5132 3959 if (prefixes & PREFIX_FS)
7d421014
ILT		 3960 {
3961 oappend ("%fs:");
3962 used_prefixes |= PREFIX_FS;
3963 }
252b5132 3964 if (prefixes & PREFIX_GS)
7d421014
ILT		 3965 {
3966 oappend ("%gs:");
3967 used_prefixes |= PREFIX_GS;
3968 }
252b5132
RH		 3969}
3970
3971static void
3972OP_indirE (bytemode, sizeflag)
3973 int bytemode;
3974 int sizeflag;
3975{
3976 if (!intel_syntax)
3977 oappend ("*");
3978 OP_E (bytemode, sizeflag);
3979}
3980
52b15da3
JH		 3981static void
3982print_operand_value (buf, hex, disp)
3983 char *buf;
3984 int hex;
3985 bfd_vma disp;
3986{
3987 if (mode_64bit)
3988 {
3989 if (hex)
3990 {
3991 char tmp[30];
3992 int i;
3993 buf[0] = '0';
3994 buf[1] = 'x';
3995 sprintf_vma (tmp, disp);
3996 for (i = 0; tmp[i] == '0' && tmp[i+1]; i++);
3997 strcpy (buf + 2, tmp + i);
3998 }
3999 else
4000 {
4001 bfd_signed_vma v = disp;
4002 char tmp[30];
4003 int i;
4004 if (v < 0)
4005 {
4006 *(buf++) = '-';
4007 v = -disp;
4008 /* Check for possible overflow on 0x8000000000000000 */
4009 if (v < 0)
4010 {
4011 strcpy (buf, "9223372036854775808");
4012 return;
4013 }
4014 }
4015 if (!v)
4016 {
4017 strcpy (buf, "0");
4018 return;
4019 }
4020
4021 i = 0;
4022 tmp[29] = 0;
4023 while (v)
4024 {
4025 tmp[28-i] = (v % 10) + '0';
4026 v /= 10;
4027 i++;
4028 }
4029 strcpy (buf, tmp + 29 - i);
4030 }
4031 }
4032 else
4033 {
4034 if (hex)
4035 sprintf (buf, "0x%x", (unsigned int) disp);
4036 else
4037 sprintf (buf, "%d", (int) disp);
4038 }
4039}
4040
252b5132
RH		 4041static void
4042OP_E (bytemode, sizeflag)
4043 int bytemode;
4044 int sizeflag;
4045{
52b15da3
JH		 4046 bfd_vma disp;
4047 int add = 0;
4048 int riprel = 0;
4049 USED_REX (REX_EXTZ);
4050 if (rex & REX_EXTZ)
4051 add += 8;
252b5132
RH		 4052
4053 /* skip mod/rm byte */
4bba6815 4054 MODRM_CHECK;
252b5132
RH		 4055 codep++;
4056
4057 if (mod == 3)
4058 {
4059 switch (bytemode)
4060 {
4061 case b_mode:
52b15da3
JH		 4062 USED_REX (0);
4063 if (rex)
4064 oappend (names8rex[rm + add]);
4065 else
4066 oappend (names8[rm + add]);
252b5132
RH		 4067 break;
4068 case w_mode:
52b15da3 4069 oappend (names16[rm + add]);
252b5132 4070 break;
2da11e11 4071 case d_mode:
52b15da3
JH		 4072 oappend (names32[rm + add]);
4073 break;
4074 case q_mode:
4075 oappend (names64[rm + add]);
4076 break;
4077 case m_mode:
4078 if (mode_64bit)
4079 oappend (names64[rm + add]);
4080 else
4081 oappend (names32[rm + add]);
2da11e11 4082 break;
252b5132 4083 case v_mode:
52b15da3
JH		 4084 USED_REX (REX_MODE64);
4085 if (rex & REX_MODE64)
4086 oappend (names64[rm + add]);
4087 else if (sizeflag & DFLAG)
4088 oappend (names32[rm + add]);
252b5132 4089 else
52b15da3 4090 oappend (names16[rm + add]);
7d421014 4091 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4092 break;
2da11e11 4093 case 0:
041bd2e0
JH		 4094 if ( !(codep[-2] == 0xAE && codep[-1] == 0xF8 /* sfence */)
4095 && !(codep[-2] == 0xAE && codep[-1] == 0xF0 /* mfence */)
4096 && !(codep[-2] == 0xAE && codep[-1] == 0xe8 /* lfence */))
2da11e11 4097 BadOp(); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */
c608c12e 4098 break;
252b5132 4099 default:
c608c12e 4100 oappend (INTERNAL_DISASSEMBLER_ERROR);
252b5132
RH		 4101 break;
4102 }
4103 return;
4104 }
4105
4106 disp = 0;
4107 append_seg ();
4108
4109 if (sizeflag & AFLAG) /* 32 bit address mode */
4110 {
4111 int havesib;
4112 int havebase;
4113 int base;
4114 int index = 0;
4115 int scale = 0;
4116
4117 havesib = 0;
4118 havebase = 1;
4119 base = rm;
4120
4121 if (base == 4)
4122 {
4123 havesib = 1;
4124 FETCH_DATA (the_info, codep + 1);
4125 scale = (*codep >> 6) & 3;
4126 index = (*codep >> 3) & 7;
4127 base = *codep & 7;
52b15da3
JH		 4128 USED_REX (REX_EXTY);
4129 USED_REX (REX_EXTZ);
4130 if (rex & REX_EXTY)
4131 index += 8;
4132 if (rex & REX_EXTZ)
4133 base += 8;
252b5132
RH		 4134 codep++;
4135 }
4136
4137 switch (mod)
4138 {
4139 case 0:
52b15da3 4140 if ((base & 7) == 5)
252b5132
RH		 4141 {
4142 havebase = 0;
52b15da3
JH		 4143 if (mode_64bit && !havesib)
4144 riprel = 1;
4145 disp = get32s ();
252b5132
RH		 4146 }
4147 break;
4148 case 1:
4149 FETCH_DATA (the_info, codep + 1);
4150 disp = *codep++;
4151 if ((disp & 0x80) != 0)
4152 disp -= 0x100;
4153 break;
4154 case 2:
52b15da3 4155 disp = get32s ();
252b5132
RH		 4156 break;
4157 }
4158
4159 if (!intel_syntax)
52b15da3 4160 if (mod != 0 || (base & 7) == 5)
252b5132 4161 {
52b15da3 4162 print_operand_value (scratchbuf, !riprel, disp);
252b5132 4163 oappend (scratchbuf);
52b15da3
JH		 4164 if (riprel)
4165 {
4166 set_op (disp, 1);
4167 oappend ("(%rip)");
4168 }
252b5132 4169 }
2da11e11 4170
252b5132
RH		 4171 if (havebase || (havesib && (index != 4 || scale != 0)))
4172 {
4173 if (intel_syntax)
4174 {
4175 switch (bytemode)
4176 {
4177 case b_mode:
52b15da3 4178 oappend ("BYTE PTR ");
252b5132
RH		 4179 break;
4180 case w_mode:
52b15da3 4181 oappend ("WORD PTR ");
252b5132
RH		 4182 break;
4183 case v_mode:
52b15da3 4184 oappend ("DWORD PTR ");
252b5132
RH		 4185 break;
4186 case d_mode:
52b15da3 4187 oappend ("QWORD PTR ");
252b5132 4188 break;
52b15da3
JH		 4189 case m_mode:
4190 if (mode_64bit)
4191 oappend ("DWORD PTR ");
4192 else
4193 oappend ("QWORD PTR ");
4194 break;
252b5132 4195 case x_mode:
52b15da3 4196 oappend ("XWORD PTR ");
252b5132
RH		 4197 break;
4198 default:
4199 break;
4200 }
4201 }
4202 *obufp++ = open_char;
52b15da3
JH		 4203 if (intel_syntax && riprel)
4204 oappend ("rip + ");
252b5132 4205 *obufp = '\0';
52b15da3
JH		 4206 USED_REX (REX_EXTZ);
4207 if (!havesib && (rex & REX_EXTZ))
4208 base += 8;
252b5132 4209 if (havebase)
52b15da3 4210 oappend (mode_64bit ? names64[base] : names32[base]);
252b5132
RH		 4211 if (havesib)
4212 {
4213 if (index != 4)
4214 {
4215 if (intel_syntax)
4216 {
4217 if (havebase)
4218 {
4219 *obufp++ = separator_char;
4220 *obufp = '\0';
4221 }
52b15da3 4222 sprintf (scratchbuf, "%s", mode_64bit ? names64[index] : names32[index]);
252b5132
RH		 4223 }
4224 else
52b15da3 4225 sprintf (scratchbuf, ",%s", mode_64bit ? names64[index] : names32[index]);
252b5132
RH		 4226 oappend (scratchbuf);
4227 }
4228 if (!intel_syntax
2da11e11 4229 || (intel_syntax
252b5132
RH		 4230 && bytemode != b_mode
4231 && bytemode != w_mode
4232 && bytemode != v_mode))
4233 {
4234 *obufp++ = scale_char;
4235 *obufp = '\0';
4236 sprintf (scratchbuf, "%d", 1 << scale);
4237 oappend (scratchbuf);
4238 }
4239 }
4240 if (intel_syntax)
52b15da3 4241 if (mod != 0 || (base & 7) == 5)
252b5132
RH		 4242 {
4243 /* Don't print zero displacements */
52b15da3 4244 if (disp != 0)
252b5132 4245 {
52b15da3 4246 print_operand_value (scratchbuf, 0, disp);
252b5132
RH		 4247 oappend (scratchbuf);
4248 }
4249 }
4250
4251 *obufp++ = close_char;
4252 *obufp = '\0';
4253 }
4254 else if (intel_syntax)
4255 {
52b15da3 4256 if (mod != 0 || (base & 7) == 5)
252b5132
RH		 4257 {
4258 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4259 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
4260 ;
4261 else
4262 {
4263 oappend (names_seg[3]);
4264 oappend (":");
4265 }
52b15da3 4266 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 4267 oappend (scratchbuf);
4268 }
4269 }
4270 }
4271 else
4272 { /* 16 bit address mode */
4273 switch (mod)
4274 {
4275 case 0:
52b15da3 4276 if ((rm & 7) == 6)
252b5132
RH		 4277 {
4278 disp = get16 ();
4279 if ((disp & 0x8000) != 0)
4280 disp -= 0x10000;
4281 }
4282 break;
4283 case 1:
4284 FETCH_DATA (the_info, codep + 1);
4285 disp = *codep++;
4286 if ((disp & 0x80) != 0)
4287 disp -= 0x100;
4288 break;
4289 case 2:
4290 disp = get16 ();
4291 if ((disp & 0x8000) != 0)
4292 disp -= 0x10000;
4293 break;
4294 }
4295
4296 if (!intel_syntax)
52b15da3 4297 if (mod != 0 || (rm & 7) == 6)
252b5132 4298 {
52b15da3 4299 print_operand_value (scratchbuf, 0, disp);
252b5132
RH		 4300 oappend (scratchbuf);
4301 }
4302
52b15da3 4303 if (mod != 0 || (rm & 7) != 6)
252b5132
RH		 4304 {
4305 *obufp++ = open_char;
4306 *obufp = '\0';
52b15da3 4307 oappend (index16[rm + add]);
252b5132
RH		 4308 *obufp++ = close_char;
4309 *obufp = '\0';
4310 }
4311 }
4312}
4313
252b5132
RH		 4314static void
4315OP_G (bytemode, sizeflag)
4316 int bytemode;
4317 int sizeflag;
4318{
52b15da3
JH		 4319 int add = 0;
4320 USED_REX (REX_EXTX);
4321 if (rex & REX_EXTX)
4322 add += 8;
252b5132
RH		 4323 switch (bytemode)
4324 {
4325 case b_mode:
52b15da3
JH		 4326 USED_REX (0);
4327 if (rex)
4328 oappend (names8rex[reg + add]);
4329 else
4330 oappend (names8[reg + add]);
252b5132
RH		 4331 break;
4332 case w_mode:
52b15da3 4333 oappend (names16[reg + add]);
252b5132
RH		 4334 break;
4335 case d_mode:
52b15da3
JH		 4336 oappend (names32[reg + add]);
4337 break;
4338 case q_mode:
4339 oappend (names64[reg + add]);
252b5132
RH		 4340 break;
4341 case v_mode:
52b15da3
JH		 4342 USED_REX (REX_MODE64);
4343 if (rex & REX_MODE64)
4344 oappend (names64[reg + add]);
4345 else if (sizeflag & DFLAG)
4346 oappend (names32[reg + add]);
252b5132 4347 else
52b15da3 4348 oappend (names16[reg + add]);
7d421014 4349 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4350 break;
4351 default:
4352 oappend (INTERNAL_DISASSEMBLER_ERROR);
4353 break;
4354 }
4355}
4356
52b15da3
JH		 4357static bfd_vma
4358get64 ()
4359{
4360 unsigned int a = 0;
4361 unsigned int b = 0;
4362 bfd_vma x = 0;
4363
4364#ifdef BFD64
4365 FETCH_DATA (the_info, codep + 8);
4366 a = *codep++ & 0xff;
4367 a |= (*codep++ & 0xff) << 8;
4368 a |= (*codep++ & 0xff) << 16;
4369 a |= (*codep++ & 0xff) << 24;
4370 b |= (*codep++ & 0xff);
4371 b |= (*codep++ & 0xff) << 8;
4372 b |= (*codep++ & 0xff) << 16;
4373 b |= (*codep++ & 0xff) << 24;
4374 x = a + ((bfd_vma) b << 32);
4375#else
4376 abort();
4377#endif
4378 return x;
4379}
4380
4381static bfd_signed_vma
252b5132
RH		 4382get32 ()
4383{
52b15da3 4384 bfd_signed_vma x = 0;
252b5132
RH		 4385
4386 FETCH_DATA (the_info, codep + 4);
52b15da3
JH		 4387 x = *codep++ & (bfd_signed_vma) 0xff;
4388 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4389 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4390 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4391 return x;
4392}
4393
4394static bfd_signed_vma
4395get32s ()
4396{
4397 bfd_signed_vma x = 0;
4398
4399 FETCH_DATA (the_info, codep + 4);
4400 x = *codep++ & (bfd_signed_vma) 0xff;
4401 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4402 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4403 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4404
4405 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
4406
252b5132
RH		 4407 return x;
4408}
4409
4410static int
4411get16 ()
4412{
4413 int x = 0;
4414
4415 FETCH_DATA (the_info, codep + 2);
4416 x = *codep++ & 0xff;
4417 x |= (*codep++ & 0xff) << 8;
4418 return x;
4419}
4420
4421static void
52b15da3 4422set_op (op, riprel)
252b5132 4423 unsigned int op;
52b15da3 4424 int riprel;
252b5132
RH		 4425{
4426 op_index[op_ad] = op_ad;
4427 op_address[op_ad] = op;
52b15da3 4428 op_riprel[op_ad] = riprel;
252b5132
RH		 4429}
4430
4431static void
4432OP_REG (code, sizeflag)
4433 int code;
4434 int sizeflag;
4435{
2da11e11 4436 const char *s;
52b15da3
JH		 4437 int add = 0;
4438 USED_REX (REX_EXTZ);
4439 if (rex & REX_EXTZ)
4440 add = 8;
4441
4442 switch (code)
4443 {
4444 case indir_dx_reg:
4445 s = "(%dx)";
4446 break;
4447 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4448 case sp_reg: case bp_reg: case si_reg: case di_reg:
4449 s = names16[code - ax_reg + add];
4450 break;
4451 case es_reg: case ss_reg: case cs_reg:
4452 case ds_reg: case fs_reg: case gs_reg:
4453 s = names_seg[code - es_reg + add];
4454 break;
4455 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4456 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
4457 USED_REX (0);
4458 if (rex)
4459 s = names8rex[code - al_reg + add];
4460 else
4461 s = names8[code - al_reg];
4462 break;
4463 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4464 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
4465 USED_REX (REX_MODE64);
4466 if (rex & REX_MODE64)
4467 s = names64[code - eAX_reg + add];
4468 else if (sizeflag & DFLAG)
4469 s = names32[code - eAX_reg + add];
4470 else
4471 s = names16[code - eAX_reg + add];
4472 used_prefixes |= (prefixes & PREFIX_DATA);
4473 break;
4474 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
4475 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
4476 s = names64[code - rAX_reg + add];
4477 break;
4478 default:
4479 s = INTERNAL_DISASSEMBLER_ERROR;
4480 break;
4481 }
4482 oappend (s);
4483}
4484
4485static void
4486OP_IMREG (code, sizeflag)
4487 int code;
4488 int sizeflag;
4489{
4490 const char *s;
252b5132
RH		 4491
4492 switch (code)
4493 {
4494 case indir_dx_reg:
4495 s = "(%dx)";
4496 break;
4497 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4498 case sp_reg: case bp_reg: case si_reg: case di_reg:
4499 s = names16[code - ax_reg];
4500 break;
4501 case es_reg: case ss_reg: case cs_reg:
4502 case ds_reg: case fs_reg: case gs_reg:
4503 s = names_seg[code - es_reg];
4504 break;
4505 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4506 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
52b15da3
JH		 4507 USED_REX (0);
4508 if (rex)
4509 s = names8rex[code - al_reg];
4510 else
4511 s = names8[code - al_reg];
252b5132
RH		 4512 break;
4513 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4514 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
52b15da3
JH		 4515 USED_REX (REX_MODE64);
4516 if (rex & REX_MODE64)
4517 s = names64[code - eAX_reg];
4518 else if (sizeflag & DFLAG)
252b5132
RH		 4519 s = names32[code - eAX_reg];
4520 else
4521 s = names16[code - eAX_reg];
7d421014 4522 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4523 break;
4524 default:
4525 s = INTERNAL_DISASSEMBLER_ERROR;
4526 break;
4527 }
4528 oappend (s);
4529}
4530
4531static void
4532OP_I (bytemode, sizeflag)
4533 int bytemode;
4534 int sizeflag;
4535{
52b15da3
JH		 4536 bfd_signed_vma op;
4537 bfd_signed_vma mask = -1;
252b5132
RH		 4538
4539 switch (bytemode)
4540 {
4541 case b_mode:
4542 FETCH_DATA (the_info, codep + 1);
52b15da3
JH		 4543 op = *codep++;
4544 mask = 0xff;
4545 break;
4546 case q_mode:
4547 op = get32s ();
252b5132
RH		 4548 break;
4549 case v_mode:
52b15da3
JH		 4550 USED_REX (REX_MODE64);
4551 if (rex & REX_MODE64)
4552 op = get32s ();
4553 else if (sizeflag & DFLAG)
4554 {
4555 op = get32 ();
4556 mask = 0xffffffff;
4557 }
252b5132 4558 else
52b15da3
JH		 4559 {
4560 op = get16 ();
4561 mask = 0xfffff;
4562 }
7d421014 4563 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4564 break;
4565 case w_mode:
52b15da3 4566 mask = 0xfffff;
252b5132
RH		 4567 op = get16 ();
4568 break;
4569 default:
4570 oappend (INTERNAL_DISASSEMBLER_ERROR);
4571 return;
4572 }
4573
52b15da3
JH		 4574 op &= mask;
4575 scratchbuf[0] = '$';
4576 print_operand_value (scratchbuf + !intel_syntax, 1, op);
4577 oappend (scratchbuf);
4578 scratchbuf[0] = '\0';
4579}
4580
4581static void
4582OP_I64 (bytemode, sizeflag)
4583 int bytemode;
4584 int sizeflag;
4585{
4586 bfd_signed_vma op;
4587 bfd_signed_vma mask = -1;
4588
4589 switch (bytemode)
4590 {
4591 case b_mode:
4592 FETCH_DATA (the_info, codep + 1);
4593 op = *codep++;
4594 mask = 0xff;
4595 break;
4596 case v_mode:
4597 USED_REX (REX_MODE64);
4598 if (rex & REX_MODE64)
4599 op = get64 ();
4600 else if (sizeflag & DFLAG)
4601 {
4602 op = get32 ();
4603 mask = 0xffffffff;
4604 }
4605 else
4606 {
4607 op = get16 ();
4608 mask = 0xfffff;
4609 }
4610 used_prefixes |= (prefixes & PREFIX_DATA);
4611 break;
4612 case w_mode:
4613 mask = 0xfffff;
4614 op = get16 ();
4615 break;
4616 default:
4617 oappend (INTERNAL_DISASSEMBLER_ERROR);
4618 return;
4619 }
4620
4621 op &= mask;
4622 scratchbuf[0] = '$';
4623 print_operand_value (scratchbuf + !intel_syntax, 1, op);
252b5132
RH		 4624 oappend (scratchbuf);
4625 scratchbuf[0] = '\0';
4626}
4627
4628static void
4629OP_sI (bytemode, sizeflag)
4630 int bytemode;
4631 int sizeflag;
4632{
52b15da3
JH		 4633 bfd_signed_vma op;
4634 bfd_signed_vma mask = -1;
252b5132
RH		 4635
4636 switch (bytemode)
4637 {
4638 case b_mode:
4639 FETCH_DATA (the_info, codep + 1);
4640 op = *codep++;
4641 if ((op & 0x80) != 0)
4642 op -= 0x100;
52b15da3 4643 mask = 0xffffffff;
252b5132
RH		 4644 break;
4645 case v_mode:
52b15da3
JH		 4646 USED_REX (REX_MODE64);
4647 if (rex & REX_MODE64)
4648 op = get32s ();
4649 else if (sizeflag & DFLAG)
4650 {
4651 op = get32s ();
4652 mask = 0xffffffff;
4653 }
252b5132
RH		 4654 else
4655 {
52b15da3 4656 mask = 0xffffffff;
252b5132
RH		 4657 op = get16();
4658 if ((op & 0x8000) != 0)
4659 op -= 0x10000;
4660 }
7d421014 4661 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4662 break;
4663 case w_mode:
4664 op = get16 ();
52b15da3 4665 mask = 0xffffffff;
252b5132
RH		 4666 if ((op & 0x8000) != 0)
4667 op -= 0x10000;
4668 break;
4669 default:
4670 oappend (INTERNAL_DISASSEMBLER_ERROR);
4671 return;
4672 }
52b15da3
JH		 4673
4674 scratchbuf[0] = '$';
4675 print_operand_value (scratchbuf + 1, 1, op);
252b5132
RH		 4676 oappend (scratchbuf);
4677}
4678
4679static void
4680OP_J (bytemode, sizeflag)
4681 int bytemode;
4682 int sizeflag;
4683{
52b15da3 4684 bfd_vma disp;
252b5132
RH		 4685 int mask = -1;
4686
4687 switch (bytemode)
4688 {
4689 case b_mode:
4690 FETCH_DATA (the_info, codep + 1);
4691 disp = *codep++;
4692 if ((disp & 0x80) != 0)
4693 disp -= 0x100;
4694 break;
4695 case v_mode:
4696 if (sizeflag & DFLAG)
52b15da3 4697 disp = get32s ();
252b5132
RH		 4698 else
4699 {
4700 disp = get16 ();
4701 /* for some reason, a data16 prefix on a jump instruction
4702 means that the pc is masked to 16 bits after the
4703 displacement is added! */
4704 mask = 0xffff;
4705 }
7d421014 4706 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4707 break;
4708 default:
4709 oappend (INTERNAL_DISASSEMBLER_ERROR);
4710 return;
4711 }
4712 disp = (start_pc + codep - start_codep + disp) & mask;
52b15da3
JH		 4713 set_op (disp, 0);
4714 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 4715 oappend (scratchbuf);
4716}
4717
4718/* ARGSUSED */
4719static void
4720OP_SEG (dummy, sizeflag)
57d91c3c
ILT		 4721 int dummy ATTRIBUTE_UNUSED;
4722 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 4723{
4724 static char *sreg[] = {
4725 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
4726 };
4727
4728 oappend (sreg[reg]);
4729}
4730
c608c12e 4731/* ARGSUSED */
252b5132 4732static void
c608c12e 4733OP_DIR (dummy, sizeflag)
57d91c3c 4734 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 4735 int sizeflag;
4736{
4737 int seg, offset;
4738
c608c12e 4739 if (sizeflag & DFLAG)
252b5132 4740 {
c608c12e
AM		 4741 offset = get32 ();
4742 seg = get16 ();
252b5132 4743 }
c608c12e
AM		 4744 else
4745 {
4746 offset = get16 ();
4747 seg = get16 ();
4748 }
7d421014 4749 used_prefixes |= (prefixes & PREFIX_DATA);
c608c12e
AM		 4750 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
4751 oappend (scratchbuf);
252b5132
RH		 4752}
4753
4754/* ARGSUSED */
4755static void
52b15da3
JH		 4756OP_OFF (ignored, sizeflag)
4757 int ignored ATTRIBUTE_UNUSED;
252b5132
RH		 4758 int sizeflag;
4759{
52b15da3 4760 bfd_vma off;
252b5132
RH		 4761
4762 append_seg ();
4763
4764 if (sizeflag & AFLAG)
4765 off = get32 ();
4766 else
4767 off = get16 ();
4768
4769 if (intel_syntax)
4770 {
4771 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4772 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
4773 {
4774 oappend (names_seg[3]);
4775 oappend (":");
4776 }
4777 }
52b15da3
JH		 4778 print_operand_value (scratchbuf, 1, off);
4779 oappend (scratchbuf);
4780}
4781/* ARGSUSED */
4782static void
4783OP_OFF64 (ignored, sizeflag)
4784 int ignored ATTRIBUTE_UNUSED;
4785 int sizeflag ATTRIBUTE_UNUSED;
4786{
4787 bfd_vma off;
4788
4789 append_seg ();
4790
4791 off = get64();
4792
4793 if (intel_syntax)
4794 {
4795 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4796 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
4797 {
4798 oappend (names_seg[3]);
4799 oappend (":");
4800 }
4801 }
4802 print_operand_value (scratchbuf, 1, off);
252b5132
RH		 4803 oappend (scratchbuf);
4804}
4805
4806static void
4807ptr_reg (code, sizeflag)
4808 int code;
4809 int sizeflag;
4810{
2da11e11 4811 const char *s;
252b5132 4812 oappend ("(");
52b15da3
JH		 4813 USED_REX (REX_MODE64);
4814 if (rex & REX_MODE64)
4815 s = names64[code - eAX_reg];
4816 else if (sizeflag & AFLAG)
252b5132
RH		 4817 s = names32[code - eAX_reg];
4818 else
4819 s = names16[code - eAX_reg];
4820 oappend (s);
4821 oappend (")");
4822}
4823
4824static void
4825OP_ESreg (code, sizeflag)
4826 int code;
4827 int sizeflag;
4828{
4829 oappend ("%es:");
4830 ptr_reg (code, sizeflag);
4831}
4832
4833static void
4834OP_DSreg (code, sizeflag)
4835 int code;
4836 int sizeflag;
4837{
4838 if ((prefixes
4839 & (PREFIX_CS
4840 | PREFIX_DS
4841 | PREFIX_SS
4842 | PREFIX_ES
4843 | PREFIX_FS
4844 | PREFIX_GS)) == 0)
4845 prefixes |= PREFIX_DS;
4846 append_seg();
4847 ptr_reg (code, sizeflag);
4848}
4849
252b5132
RH		 4850/* ARGSUSED */
4851static void
4852OP_C (dummy, sizeflag)
57d91c3c
ILT		 4853 int dummy ATTRIBUTE_UNUSED;
4854 int sizeflag ATTRIBUTE_UNUSED;
252b5132 4855{
52b15da3
JH		 4856 int add = 0;
4857 USED_REX (REX_EXTX);
4858 if (rex & REX_EXTX)
4859 add = 8;
4860 sprintf (scratchbuf, "%%cr%d", reg+add);
252b5132
RH		 4861 oappend (scratchbuf);
4862}
4863
4864/* ARGSUSED */
4865static void
4866OP_D (dummy, sizeflag)
57d91c3c
ILT		 4867 int dummy ATTRIBUTE_UNUSED;
4868 int sizeflag ATTRIBUTE_UNUSED;
252b5132 4869{
52b15da3
JH		 4870 int add = 0;
4871 USED_REX (REX_EXTX);
4872 if (rex & REX_EXTX)
4873 add = 8;
4874 sprintf (scratchbuf, "%%db%d", reg+add);
252b5132
RH		 4875 oappend (scratchbuf);
4876}
4877
4878/* ARGSUSED */
4879static void
4880OP_T (dummy, sizeflag)
57d91c3c
ILT		 4881 int dummy ATTRIBUTE_UNUSED;
4882 int sizeflag ATTRIBUTE_UNUSED;
252b5132 4883{
252b5132
RH		 4884 sprintf (scratchbuf, "%%tr%d", reg);
4885 oappend (scratchbuf);
4886}
4887
4888static void
2da11e11 4889OP_Rd (bytemode, sizeflag)
252b5132
RH		 4890 int bytemode;
4891 int sizeflag;
4892{
2da11e11
AM		 4893 if (mod == 3)
4894 OP_E (bytemode, sizeflag);
4895 else
4896 BadOp();
252b5132
RH		 4897}
4898
4899static void
4900OP_MMX (ignore, sizeflag)
57d91c3c
ILT		 4901 int ignore ATTRIBUTE_UNUSED;
4902 int sizeflag ATTRIBUTE_UNUSED;
252b5132 4903{
041bd2e0
JH		 4904 int add = 0;
4905 USED_REX (REX_EXTX);
4906 if (rex & REX_EXTX)
4907 add = 8;
4908 used_prefixes |= (prefixes & PREFIX_DATA);
4909 if (prefixes & PREFIX_DATA)
4910 sprintf (scratchbuf, "%%xmm%d", reg + add);
4911 else
4912 sprintf (scratchbuf, "%%mm%d", reg + add);
252b5132
RH		 4913 oappend (scratchbuf);
4914}
4915
c608c12e
AM		 4916static void
4917OP_XMM (bytemode, sizeflag)
57d91c3c
ILT		 4918 int bytemode ATTRIBUTE_UNUSED;
4919 int sizeflag ATTRIBUTE_UNUSED;
c608c12e 4920{
041bd2e0
JH		 4921 int add = 0;
4922 USED_REX (REX_EXTX);
4923 if (rex & REX_EXTX)
4924 add = 8;
4925 sprintf (scratchbuf, "%%xmm%d", reg + add);
c608c12e
AM		 4926 oappend (scratchbuf);
4927}
4928
252b5132
RH		 4929static void
4930OP_EM (bytemode, sizeflag)
4931 int bytemode;
4932 int sizeflag;
4933{
041bd2e0 4934 int add = 0;
252b5132
RH		 4935 if (mod != 3)
4936 {
4937 OP_E (bytemode, sizeflag);
4938 return;
4939 }
041bd2e0
JH		 4940 USED_REX (REX_EXTZ);
4941 if (rex & REX_EXTZ)
4942 add = 8;
252b5132 4943
4bba6815
AM		 4944 /* skip mod/rm byte */
4945 MODRM_CHECK;
252b5132 4946 codep++;
041bd2e0
JH		 4947 used_prefixes |= (prefixes & PREFIX_DATA);
4948 if (prefixes & PREFIX_DATA)
4949 sprintf (scratchbuf, "%%xmm%d", rm + add);
4950 else
4951 sprintf (scratchbuf, "%%mm%d", rm + add);
252b5132
RH		 4952 oappend (scratchbuf);
4953}
4954
c608c12e
AM		 4955static void
4956OP_EX (bytemode, sizeflag)
4957 int bytemode;
4958 int sizeflag;
4959{
041bd2e0 4960 int add = 0;
c608c12e
AM		 4961 if (mod != 3)
4962 {
4963 OP_E (bytemode, sizeflag);
4964 return;
4965 }
041bd2e0
JH		 4966 USED_REX (REX_EXTZ);
4967 if (rex & REX_EXTZ)
4968 add = 8;
c608c12e 4969
4bba6815
AM		 4970 /* skip mod/rm byte */
4971 MODRM_CHECK;
c608c12e 4972 codep++;
041bd2e0 4973 sprintf (scratchbuf, "%%xmm%d", rm + add);
c608c12e
AM		 4974 oappend (scratchbuf);
4975}
4976
252b5132 4977static void
2da11e11
AM		 4978OP_MS (bytemode, sizeflag)
4979 int bytemode;
252b5132
RH		 4980 int sizeflag;
4981{
2da11e11
AM		 4982 if (mod == 3)
4983 OP_EM (bytemode, sizeflag);
4984 else
4985 BadOp();
252b5132
RH		 4986}
4987
992aaec9
AM		 4988static void
4989OP_XS (bytemode, sizeflag)
4990 int bytemode;
4991 int sizeflag;
4992{
4993 if (mod == 3)
4994 OP_EX (bytemode, sizeflag);
4995 else
4996 BadOp();
4997}
4998
252b5132
RH		 4999static const char *Suffix3DNow[] = {
5000/* 00 */ NULL, NULL, NULL, NULL,
5001/* 04 */ NULL, NULL, NULL, NULL,
5002/* 08 */ NULL, NULL, NULL, NULL,
9e525108 5003/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
252b5132
RH		 5004/* 10 */ NULL, NULL, NULL, NULL,
5005/* 14 */ NULL, NULL, NULL, NULL,
5006/* 18 */ NULL, NULL, NULL, NULL,
9e525108 5007/* 1C */ "pf2iw", "pf2id", NULL, NULL,
252b5132
RH		 5008/* 20 */ NULL, NULL, NULL, NULL,
5009/* 24 */ NULL, NULL, NULL, NULL,
5010/* 28 */ NULL, NULL, NULL, NULL,
5011/* 2C */ NULL, NULL, NULL, NULL,
5012/* 30 */ NULL, NULL, NULL, NULL,
5013/* 34 */ NULL, NULL, NULL, NULL,
5014/* 38 */ NULL, NULL, NULL, NULL,
5015/* 3C */ NULL, NULL, NULL, NULL,
5016/* 40 */ NULL, NULL, NULL, NULL,
5017/* 44 */ NULL, NULL, NULL, NULL,
5018/* 48 */ NULL, NULL, NULL, NULL,
5019/* 4C */ NULL, NULL, NULL, NULL,
5020/* 50 */ NULL, NULL, NULL, NULL,
5021/* 54 */ NULL, NULL, NULL, NULL,
5022/* 58 */ NULL, NULL, NULL, NULL,
5023/* 5C */ NULL, NULL, NULL, NULL,
5024/* 60 */ NULL, NULL, NULL, NULL,
5025/* 64 */ NULL, NULL, NULL, NULL,
5026/* 68 */ NULL, NULL, NULL, NULL,
5027/* 6C */ NULL, NULL, NULL, NULL,
5028/* 70 */ NULL, NULL, NULL, NULL,
5029/* 74 */ NULL, NULL, NULL, NULL,
5030/* 78 */ NULL, NULL, NULL, NULL,
5031/* 7C */ NULL, NULL, NULL, NULL,
5032/* 80 */ NULL, NULL, NULL, NULL,
5033/* 84 */ NULL, NULL, NULL, NULL,
9e525108
AM		 5034/* 88 */ NULL, NULL, "pfnacc", NULL,
5035/* 8C */ NULL, NULL, "pfpnacc", NULL,
252b5132
RH		 5036/* 90 */ "pfcmpge", NULL, NULL, NULL,
5037/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
5038/* 98 */ NULL, NULL, "pfsub", NULL,
5039/* 9C */ NULL, NULL, "pfadd", NULL,
5040/* A0 */ "pfcmpgt", NULL, NULL, NULL,
5041/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
5042/* A8 */ NULL, NULL, "pfsubr", NULL,
5043/* AC */ NULL, NULL, "pfacc", NULL,
5044/* B0 */ "pfcmpeq", NULL, NULL, NULL,
5045/* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
9e525108 5046/* B8 */ NULL, NULL, NULL, "pswapd",
252b5132
RH		 5047/* BC */ NULL, NULL, NULL, "pavgusb",
5048/* C0 */ NULL, NULL, NULL, NULL,
5049/* C4 */ NULL, NULL, NULL, NULL,
5050/* C8 */ NULL, NULL, NULL, NULL,
5051/* CC */ NULL, NULL, NULL, NULL,
5052/* D0 */ NULL, NULL, NULL, NULL,
5053/* D4 */ NULL, NULL, NULL, NULL,
5054/* D8 */ NULL, NULL, NULL, NULL,
5055/* DC */ NULL, NULL, NULL, NULL,
5056/* E0 */ NULL, NULL, NULL, NULL,
5057/* E4 */ NULL, NULL, NULL, NULL,
5058/* E8 */ NULL, NULL, NULL, NULL,
5059/* EC */ NULL, NULL, NULL, NULL,
5060/* F0 */ NULL, NULL, NULL, NULL,
5061/* F4 */ NULL, NULL, NULL, NULL,
5062/* F8 */ NULL, NULL, NULL, NULL,
5063/* FC */ NULL, NULL, NULL, NULL,
5064};
5065
5066static void
5067OP_3DNowSuffix (bytemode, sizeflag)
57d91c3c
ILT		 5068 int bytemode ATTRIBUTE_UNUSED;
5069 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 5070{
5071 const char *mnemonic;
5072
5073 FETCH_DATA (the_info, codep + 1);
5074 /* AMD 3DNow! instructions are specified by an opcode suffix in the
5075 place where an 8-bit immediate would normally go. ie. the last
5076 byte of the instruction. */
2da11e11 5077 obufp = obuf + strlen(obuf);
c608c12e 5078 mnemonic = Suffix3DNow[*codep++ & 0xff];
252b5132 5079 if (mnemonic)
2da11e11 5080 oappend (mnemonic);
252b5132
RH		 5081 else
5082 {
5083 /* Since a variable sized modrm/sib chunk is between the start
5084 of the opcode (0x0f0f) and the opcode suffix, we need to do
5085 all the modrm processing first, and don't know until now that
5086 we have a bad opcode. This necessitates some cleaning up. */
2da11e11
AM		 5087 op1out[0] = '\0';
5088 op2out[0] = '\0';
5089 BadOp();
252b5132
RH		 5090 }
5091}
c608c12e
AM		 5092
5093
5094static const char *simd_cmp_op [] = {
5095 "eq",
5096 "lt",
5097 "le",
5098 "unord",
5099 "neq",
5100 "nlt",
5101 "nle",
5102 "ord"
5103};
5104
5105static void
5106OP_SIMD_Suffix (bytemode, sizeflag)
57d91c3c
ILT		 5107 int bytemode ATTRIBUTE_UNUSED;
5108 int sizeflag ATTRIBUTE_UNUSED;
c608c12e
AM		 5109{
5110 unsigned int cmp_type;
5111
5112 FETCH_DATA (the_info, codep + 1);
2da11e11 5113 obufp = obuf + strlen(obuf);
c608c12e
AM		 5114 cmp_type = *codep++ & 0xff;
5115 if (cmp_type < 8)
5116 {
041bd2e0
JH		 5117 char suffix1 = 'p', suffix2 = 's';
5118 used_prefixes |= (prefixes & PREFIX_REPZ);
5119 if (prefixes & PREFIX_REPZ)
5120 suffix1 = 's';
5121 else
5122 {
5123 used_prefixes |= (prefixes & PREFIX_DATA);
5124 if (prefixes & PREFIX_DATA)
5125 suffix2 = 'd';
5126 else
5127 {
5128 used_prefixes |= (prefixes & PREFIX_REPNZ);
5129 if (prefixes & PREFIX_REPNZ)
5130 suffix1 = 's', suffix2 = 'd';
5131 }
5132 }
5133 sprintf (scratchbuf, "cmp%s%c%c",
5134 simd_cmp_op[cmp_type], suffix1, suffix2);
7d421014 5135 used_prefixes |= (prefixes & PREFIX_REPZ);
2da11e11 5136 oappend (scratchbuf);
c608c12e
AM		 5137 }
5138 else
5139 {
5140 /* We have a bad extension byte. Clean up. */
2da11e11
AM		 5141 op1out[0] = '\0';
5142 op2out[0] = '\0';
5143 BadOp();
c608c12e
AM		 5144 }
5145}
5146
5147static void
5148SIMD_Fixup (extrachar, sizeflag)
5149 int extrachar;
57d91c3c 5150 int sizeflag ATTRIBUTE_UNUSED;
c608c12e
AM		 5151{
5152 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
5153 forms of these instructions. */
5154 if (mod == 3)
5155 {
5156 char *p = obuf + strlen(obuf);
5157 *(p+1) = '\0';
5158 *p = *(p-1);
5159 *(p-1) = *(p-2);
5160 *(p-2) = *(p-3);
5161 *(p-3) = extrachar;
5162 }
5163}
2da11e11
AM		 5164
5165static void BadOp (void)
5166{
5167 codep = insn_codep + 1; /* throw away prefixes and 1st. opcode byte */
5168 oappend ("(bad)");
5169}
GDB Binutils - Deliverables
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