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* s390.h (s390_opcode_cpu_val): Add enum for cpu type z9-109.
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
CommitLineData
252b5132 1/* Print i386 instructions for GDB, the GNU debugger.
060d22b0 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
aef6203b 3 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
252b5132 4
20f0a1fc
NC		 5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
f4321104 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20f0a1fc
NC		 20
21/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
26
27/* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
252b5132
RH		 33
34#include "dis-asm.h"
35#include "sysdep.h"
36#include "opintl.h"
37
38#define MAXLEN 20
39
40#include <setjmp.h>
41
42#ifndef UNIXWARE_COMPAT
43/* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45#define UNIXWARE_COMPAT 1
46#endif
47
26ca5450
AJ		 48static int fetch_data (struct disassemble_info *, bfd_byte *);
49static void ckprefix (void);
50static const char *prefix_name (int, int);
51static int print_insn (bfd_vma, disassemble_info *);
52static void dofloat (int);
53static void OP_ST (int, int);
54static void OP_STi (int, int);
55static int putop (const char *, int);
56static void oappend (const char *);
57static void append_seg (void);
58static void OP_indirE (int, int);
59static void print_operand_value (char *, int, bfd_vma);
60static void OP_E (int, int);
61static void OP_G (int, int);
62static bfd_vma get64 (void);
63static bfd_signed_vma get32 (void);
64static bfd_signed_vma get32s (void);
65static int get16 (void);
66static void set_op (bfd_vma, int);
67static void OP_REG (int, int);
68static void OP_IMREG (int, int);
69static void OP_I (int, int);
70static void OP_I64 (int, int);
71static void OP_sI (int, int);
72static void OP_J (int, int);
73static void OP_SEG (int, int);
74static void OP_DIR (int, int);
75static void OP_OFF (int, int);
76static void OP_OFF64 (int, int);
77static void ptr_reg (int, int);
78static void OP_ESreg (int, int);
79static void OP_DSreg (int, int);
80static void OP_C (int, int);
81static void OP_D (int, int);
82static void OP_T (int, int);
83static void OP_Rd (int, int);
84static void OP_MMX (int, int);
85static void OP_XMM (int, int);
86static void OP_EM (int, int);
87static void OP_EX (int, int);
88static void OP_MS (int, int);
89static void OP_XS (int, int);
cc0ec051 90static void OP_M (int, int);
90700ea2 91static void OP_VMX (int, int);
cc0ec051
AM		 92static void OP_0fae (int, int);
93static void OP_0f07 (int, int);
94static void NOP_Fixup (int, int);
26ca5450
AJ		 95static void OP_3DNowSuffix (int, int);
96static void OP_SIMD_Suffix (int, int);
97static void SIMD_Fixup (int, int);
98static void PNI_Fixup (int, int);
30123838 99static void SVME_Fixup (int, int);
4fd61dcb 100static void INVLPG_Fixup (int, int);
26ca5450 101static void BadOp (void);
4cc91dba 102static void SEG_Fixup (int, int);
90700ea2 103static void VMX_Fixup (int, int);
252b5132 104
6608db57 105struct dis_private {
252b5132
RH		 106 /* Points to first byte not fetched. */
107 bfd_byte *max_fetched;
108 bfd_byte the_buffer[MAXLEN];
109 bfd_vma insn_start;
e396998b 110 int orig_sizeflag;
252b5132
RH		 111 jmp_buf bailout;
112};
113
5076851f
ILT		 114/* The opcode for the fwait instruction, which we treat as a prefix
115 when we can. */
116#define FWAIT_OPCODE (0x9b)
117
52b15da3
JH		 118/* Set to 1 for 64bit mode disassembly. */
119static int mode_64bit;
120
5076851f
ILT		 121/* Flags for the prefixes for the current instruction. See below. */
122static int prefixes;
123
52b15da3
JH		 124/* REX prefix the current instruction. See below. */
125static int rex;
126/* Bits of REX we've already used. */
127static int rex_used;
128#define REX_MODE64 8
129#define REX_EXTX 4
130#define REX_EXTY 2
131#define REX_EXTZ 1
132/* Mark parts used in the REX prefix. When we are testing for
133 empty prefix (for 8bit register REX extension), just mask it
134 out. Otherwise test for REX bit is excuse for existence of REX
135 only in case value is nonzero. */
136#define USED_REX(value) \
137 { \
138 if (value) \
139 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
140 else \
141 rex_used |= 0x40; \
142 }
143
7d421014
ILT		 144/* Flags for prefixes which we somehow handled when printing the
145 current instruction. */
146static int used_prefixes;
147
5076851f
ILT		 148/* Flags stored in PREFIXES. */
149#define PREFIX_REPZ 1
150#define PREFIX_REPNZ 2
151#define PREFIX_LOCK 4
152#define PREFIX_CS 8
153#define PREFIX_SS 0x10
154#define PREFIX_DS 0x20
155#define PREFIX_ES 0x40
156#define PREFIX_FS 0x80
157#define PREFIX_GS 0x100
158#define PREFIX_DATA 0x200
159#define PREFIX_ADDR 0x400
160#define PREFIX_FWAIT 0x800
161
252b5132
RH		 162/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
163 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
164 on error. */
165#define FETCH_DATA(info, addr) \
6608db57 166 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
252b5132
RH		 167 ? 1 : fetch_data ((info), (addr)))
168
169static int
26ca5450 170fetch_data (struct disassemble_info *info, bfd_byte *addr)
252b5132
RH		 171{
172 int status;
6608db57 173 struct dis_private *priv = (struct dis_private *) info->private_data;
252b5132
RH		 174 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
175
176 status = (*info->read_memory_func) (start,
177 priv->max_fetched,
178 addr - priv->max_fetched,
179 info);
180 if (status != 0)
181 {
7d421014 182 /* If we did manage to read at least one byte, then
db6eb5be
AM		 183 print_insn_i386 will do something sensible. Otherwise, print
184 an error. We do that here because this is where we know
185 STATUS. */
7d421014 186 if (priv->max_fetched == priv->the_buffer)
5076851f 187 (*info->memory_error_func) (status, start, info);
252b5132
RH		 188 longjmp (priv->bailout, 1);
189 }
190 else
191 priv->max_fetched = addr;
192 return 1;
193}
194
57d91c3c
ILT		 195#define XX NULL, 0
196
252b5132 197#define Eb OP_E, b_mode
52b15da3
JH		 198#define Ev OP_E, v_mode
199#define Ed OP_E, d_mode
9306ca4a 200#define Eq OP_E, q_mode
db6eb5be 201#define Edq OP_E, dq_mode
9306ca4a 202#define Edqw OP_E, dqw_mode
003519a7 203#define indirEv OP_indirE, branch_v_mode
9306ca4a 204#define indirEp OP_indirE, f_mode
90700ea2 205#define Em OP_E, m_mode
252b5132
RH		 206#define Ew OP_E, w_mode
207#define Ma OP_E, v_mode
cc0ec051 208#define M OP_M, 0 /* lea, lgdt, etc. */
9306ca4a 209#define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
992aaec9 210#define Gb OP_G, b_mode
252b5132 211#define Gv OP_G, v_mode
992aaec9 212#define Gd OP_G, d_mode
9306ca4a 213#define Gdq OP_G, dq_mode
90700ea2 214#define Gm OP_G, m_mode
252b5132 215#define Gw OP_G, w_mode
2da11e11 216#define Rd OP_Rd, d_mode
52b15da3 217#define Rm OP_Rd, m_mode
252b5132
RH		 218#define Ib OP_I, b_mode
219#define sIb OP_sI, b_mode /* sign extened byte */
220#define Iv OP_I, v_mode
52b15da3
JH		 221#define Iq OP_I, q_mode
222#define Iv64 OP_I64, v_mode
252b5132 223#define Iw OP_I, w_mode
9306ca4a 224#define I1 OP_I, const_1_mode
252b5132
RH		 225#define Jb OP_J, b_mode
226#define Jv OP_J, v_mode
52b15da3
JH		 227#define Cm OP_C, m_mode
228#define Dm OP_D, m_mode
252b5132 229#define Td OP_T, d_mode
4cc91dba 230#define Sv SEG_Fixup, v_mode
252b5132 231
52b15da3
JH		 232#define RMeAX OP_REG, eAX_reg
233#define RMeBX OP_REG, eBX_reg
234#define RMeCX OP_REG, eCX_reg
235#define RMeDX OP_REG, eDX_reg
236#define RMeSP OP_REG, eSP_reg
237#define RMeBP OP_REG, eBP_reg
238#define RMeSI OP_REG, eSI_reg
239#define RMeDI OP_REG, eDI_reg
240#define RMrAX OP_REG, rAX_reg
241#define RMrBX OP_REG, rBX_reg
242#define RMrCX OP_REG, rCX_reg
243#define RMrDX OP_REG, rDX_reg
244#define RMrSP OP_REG, rSP_reg
245#define RMrBP OP_REG, rBP_reg
246#define RMrSI OP_REG, rSI_reg
247#define RMrDI OP_REG, rDI_reg
248#define RMAL OP_REG, al_reg
249#define RMAL OP_REG, al_reg
250#define RMCL OP_REG, cl_reg
251#define RMDL OP_REG, dl_reg
252#define RMBL OP_REG, bl_reg
253#define RMAH OP_REG, ah_reg
254#define RMCH OP_REG, ch_reg
255#define RMDH OP_REG, dh_reg
256#define RMBH OP_REG, bh_reg
257#define RMAX OP_REG, ax_reg
258#define RMDX OP_REG, dx_reg
259
260#define eAX OP_IMREG, eAX_reg
261#define eBX OP_IMREG, eBX_reg
262#define eCX OP_IMREG, eCX_reg
263#define eDX OP_IMREG, eDX_reg
264#define eSP OP_IMREG, eSP_reg
265#define eBP OP_IMREG, eBP_reg
266#define eSI OP_IMREG, eSI_reg
267#define eDI OP_IMREG, eDI_reg
268#define AL OP_IMREG, al_reg
269#define AL OP_IMREG, al_reg
270#define CL OP_IMREG, cl_reg
271#define DL OP_IMREG, dl_reg
272#define BL OP_IMREG, bl_reg
273#define AH OP_IMREG, ah_reg
274#define CH OP_IMREG, ch_reg
275#define DH OP_IMREG, dh_reg
276#define BH OP_IMREG, bh_reg
277#define AX OP_IMREG, ax_reg
278#define DX OP_IMREG, dx_reg
279#define indirDX OP_IMREG, indir_dx_reg
252b5132
RH		 280
281#define Sw OP_SEG, w_mode
c608c12e 282#define Ap OP_DIR, 0
252b5132 283#define Ob OP_OFF, b_mode
52b15da3 284#define Ob64 OP_OFF64, b_mode
252b5132 285#define Ov OP_OFF, v_mode
52b15da3 286#define Ov64 OP_OFF64, v_mode
252b5132
RH		 287#define Xb OP_DSreg, eSI_reg
288#define Xv OP_DSreg, eSI_reg
289#define Yb OP_ESreg, eDI_reg
290#define Yv OP_ESreg, eDI_reg
291#define DSBX OP_DSreg, eBX_reg
292
293#define es OP_REG, es_reg
294#define ss OP_REG, ss_reg
295#define cs OP_REG, cs_reg
296#define ds OP_REG, ds_reg
297#define fs OP_REG, fs_reg
298#define gs OP_REG, gs_reg
299
300#define MX OP_MMX, 0
c608c12e 301#define XM OP_XMM, 0
252b5132 302#define EM OP_EM, v_mode
c608c12e 303#define EX OP_EX, v_mode
2da11e11 304#define MS OP_MS, v_mode
992aaec9 305#define XS OP_XS, v_mode
90700ea2 306#define VM OP_VMX, q_mode
252b5132 307#define OPSUF OP_3DNowSuffix, 0
c608c12e 308#define OPSIMD OP_SIMD_Suffix, 0
252b5132 309
3ffd33cf
AM		 310#define cond_jump_flag NULL, cond_jump_mode
311#define loop_jcxz_flag NULL, loop_jcxz_mode
312
252b5132 313/* bits in sizeflag */
252b5132 314#define SUFFIX_ALWAYS 4
252b5132
RH		 315#define AFLAG 2
316#define DFLAG 1
317
52b15da3
JH		 318#define b_mode 1 /* byte operand */
319#define v_mode 2 /* operand size depends on prefixes */
320#define w_mode 3 /* word operand */
321#define d_mode 4 /* double word operand */
322#define q_mode 5 /* quad word operand */
9306ca4a
JB		 323#define t_mode 6 /* ten-byte operand */
324#define x_mode 7 /* 16-byte XMM operand */
325#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
326#define cond_jump_mode 9
327#define loop_jcxz_mode 10
328#define dq_mode 11 /* operand size depends on REX prefixes. */
329#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
330#define f_mode 13 /* 4- or 6-byte pointer operand */
331#define const_1_mode 14
003519a7 332#define branch_v_mode 15 /* v_mode for branch. */
252b5132
RH		 333
334#define es_reg 100
335#define cs_reg 101
336#define ss_reg 102
337#define ds_reg 103
338#define fs_reg 104
339#define gs_reg 105
252b5132 340
c608c12e
AM		 341#define eAX_reg 108
342#define eCX_reg 109
343#define eDX_reg 110
344#define eBX_reg 111
345#define eSP_reg 112
346#define eBP_reg 113
347#define eSI_reg 114
348#define eDI_reg 115
252b5132
RH		 349
350#define al_reg 116
351#define cl_reg 117
352#define dl_reg 118
353#define bl_reg 119
354#define ah_reg 120
355#define ch_reg 121
356#define dh_reg 122
357#define bh_reg 123
358
359#define ax_reg 124
360#define cx_reg 125
361#define dx_reg 126
362#define bx_reg 127
363#define sp_reg 128
364#define bp_reg 129
365#define si_reg 130
366#define di_reg 131
367
52b15da3
JH		 368#define rAX_reg 132
369#define rCX_reg 133
370#define rDX_reg 134
371#define rBX_reg 135
372#define rSP_reg 136
373#define rBP_reg 137
374#define rSI_reg 138
375#define rDI_reg 139
376
252b5132
RH		 377#define indir_dx_reg 150
378
6439fc28
AM		 379#define FLOATCODE 1
380#define USE_GROUPS 2
381#define USE_PREFIX_USER_TABLE 3
382#define X86_64_SPECIAL 4
383
384#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
385
386#define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
387#define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
388#define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
389#define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
390#define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
391#define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
392#define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
393#define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
394#define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
395#define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
396#define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
397#define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
398#define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
399#define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
400#define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
401#define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
402#define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
403#define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
404#define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
405#define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
406#define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
407#define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
408#define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
30d1c836
ML		 409#define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
410#define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0
6439fc28
AM		 411
412#define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
413#define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
414#define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
415#define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
416#define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
417#define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
418#define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
419#define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
420#define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
421#define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
422#define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
423#define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
424#define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
425#define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
426#define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
427#define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
428#define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
429#define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
430#define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
431#define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
432#define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
433#define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
434#define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
435#define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
436#define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
437#define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
438#define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
ca164297
L		 439#define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
440#define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
441#define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
442#define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
443#define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
444#define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
6439fc28
AM		 445
446#define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
447
26ca5450 448typedef void (*op_rtn) (int bytemode, int sizeflag);
252b5132
RH		 449
450struct dis386 {
2da11e11 451 const char *name;
252b5132
RH		 452 op_rtn op1;
453 int bytemode1;
454 op_rtn op2;
455 int bytemode2;
456 op_rtn op3;
457 int bytemode3;
458};
459
460/* Upper case letters in the instruction names here are macros.
461 'A' => print 'b' if no register operands or suffix_always is true
462 'B' => print 'b' if suffix_always is true
9306ca4a
JB		 463 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
464 . size prefix
252b5132 465 'E' => print 'e' if 32-bit form of jcxz
3ffd33cf 466 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
5dd0794d 467 'H' => print ",pt" or ",pn" branch hint
9306ca4a
JB		 468 'I' => honor following macro letter even in Intel mode (implemented only
469 . for some of the macro letters)
470 'J' => print 'l'
252b5132
RH		 471 'L' => print 'l' if suffix_always is true
472 'N' => print 'n' if instruction has no wait "prefix"
52b15da3
JH		 473 'O' => print 'd', or 'o'
474 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
e396998b
AM		 475 . or suffix_always is true. print 'q' if rex prefix is present.
476 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
477 . is true
52b15da3
JH		 478 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
479 'S' => print 'w', 'l' or 'q' if suffix_always is true
6439fc28
AM		 480 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
481 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
10084519 482 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
9306ca4a 483 'X' => print 's', 'd' depending on data16 prefix (for XMM)
76f227a5 484 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
52b15da3 485
6439fc28
AM		 486 Many of the above letters print nothing in Intel mode. See "putop"
487 for the details.
52b15da3 488
6439fc28
AM		 489 Braces '{' and '}', and vertical bars '|', indicate alternative
490 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
491 modes. In cases where there are only two alternatives, the X86_64
492 instruction is reserved, and "(bad)" is printed.
493*/
252b5132 494
6439fc28 495static const struct dis386 dis386[] = {
252b5132 496 /* 00 */
6439fc28
AM		 497 { "addB", Eb, Gb, XX },
498 { "addS", Ev, Gv, XX },
499 { "addB", Gb, Eb, XX },
500 { "addS", Gv, Ev, XX },
501 { "addB", AL, Ib, XX },
502 { "addS", eAX, Iv, XX },
503 { "push{T|}", es, XX, XX },
504 { "pop{T|}", es, XX, XX },
252b5132 505 /* 08 */
6439fc28
AM		 506 { "orB", Eb, Gb, XX },
507 { "orS", Ev, Gv, XX },
508 { "orB", Gb, Eb, XX },
509 { "orS", Gv, Ev, XX },
510 { "orB", AL, Ib, XX },
511 { "orS", eAX, Iv, XX },
512 { "push{T|}", cs, XX, XX },
513 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
252b5132 514 /* 10 */
6439fc28
AM		 515 { "adcB", Eb, Gb, XX },
516 { "adcS", Ev, Gv, XX },
517 { "adcB", Gb, Eb, XX },
518 { "adcS", Gv, Ev, XX },
519 { "adcB", AL, Ib, XX },
520 { "adcS", eAX, Iv, XX },
521 { "push{T|}", ss, XX, XX },
522 { "popT|}", ss, XX, XX },
252b5132 523 /* 18 */
6439fc28
AM		 524 { "sbbB", Eb, Gb, XX },
525 { "sbbS", Ev, Gv, XX },
526 { "sbbB", Gb, Eb, XX },
527 { "sbbS", Gv, Ev, XX },
528 { "sbbB", AL, Ib, XX },
529 { "sbbS", eAX, Iv, XX },
530 { "push{T|}", ds, XX, XX },
531 { "pop{T|}", ds, XX, XX },
252b5132 532 /* 20 */
6439fc28
AM		 533 { "andB", Eb, Gb, XX },
534 { "andS", Ev, Gv, XX },
535 { "andB", Gb, Eb, XX },
536 { "andS", Gv, Ev, XX },
537 { "andB", AL, Ib, XX },
538 { "andS", eAX, Iv, XX },
539 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
540 { "daa{|}", XX, XX, XX },
252b5132 541 /* 28 */
6439fc28
AM		 542 { "subB", Eb, Gb, XX },
543 { "subS", Ev, Gv, XX },
544 { "subB", Gb, Eb, XX },
545 { "subS", Gv, Ev, XX },
546 { "subB", AL, Ib, XX },
547 { "subS", eAX, Iv, XX },
548 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
549 { "das{|}", XX, XX, XX },
252b5132 550 /* 30 */
6439fc28
AM		 551 { "xorB", Eb, Gb, XX },
552 { "xorS", Ev, Gv, XX },
553 { "xorB", Gb, Eb, XX },
554 { "xorS", Gv, Ev, XX },
555 { "xorB", AL, Ib, XX },
556 { "xorS", eAX, Iv, XX },
557 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
558 { "aaa{|}", XX, XX, XX },
252b5132 559 /* 38 */
6439fc28
AM		 560 { "cmpB", Eb, Gb, XX },
561 { "cmpS", Ev, Gv, XX },
562 { "cmpB", Gb, Eb, XX },
563 { "cmpS", Gv, Ev, XX },
564 { "cmpB", AL, Ib, XX },
565 { "cmpS", eAX, Iv, XX },
566 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
567 { "aas{|}", XX, XX, XX },
252b5132 568 /* 40 */
6439fc28
AM		 569 { "inc{S|}", RMeAX, XX, XX },
570 { "inc{S|}", RMeCX, XX, XX },
571 { "inc{S|}", RMeDX, XX, XX },
572 { "inc{S|}", RMeBX, XX, XX },
573 { "inc{S|}", RMeSP, XX, XX },
574 { "inc{S|}", RMeBP, XX, XX },
575 { "inc{S|}", RMeSI, XX, XX },
576 { "inc{S|}", RMeDI, XX, XX },
252b5132 577 /* 48 */
6439fc28
AM		 578 { "dec{S|}", RMeAX, XX, XX },
579 { "dec{S|}", RMeCX, XX, XX },
580 { "dec{S|}", RMeDX, XX, XX },
581 { "dec{S|}", RMeBX, XX, XX },
582 { "dec{S|}", RMeSP, XX, XX },
583 { "dec{S|}", RMeBP, XX, XX },
584 { "dec{S|}", RMeSI, XX, XX },
585 { "dec{S|}", RMeDI, XX, XX },
252b5132 586 /* 50 */
6439fc28
AM		 587 { "pushS", RMrAX, XX, XX },
588 { "pushS", RMrCX, XX, XX },
589 { "pushS", RMrDX, XX, XX },
590 { "pushS", RMrBX, XX, XX },
591 { "pushS", RMrSP, XX, XX },
592 { "pushS", RMrBP, XX, XX },
593 { "pushS", RMrSI, XX, XX },
594 { "pushS", RMrDI, XX, XX },
252b5132 595 /* 58 */
6439fc28
AM		 596 { "popS", RMrAX, XX, XX },
597 { "popS", RMrCX, XX, XX },
598 { "popS", RMrDX, XX, XX },
599 { "popS", RMrBX, XX, XX },
600 { "popS", RMrSP, XX, XX },
601 { "popS", RMrBP, XX, XX },
602 { "popS", RMrSI, XX, XX },
603 { "popS", RMrDI, XX, XX },
252b5132 604 /* 60 */
6439fc28
AM		 605 { "pusha{P|}", XX, XX, XX },
606 { "popa{P|}", XX, XX, XX },
607 { "bound{S|}", Gv, Ma, XX },
608 { X86_64_0 },
609 { "(bad)", XX, XX, XX }, /* seg fs */
610 { "(bad)", XX, XX, XX }, /* seg gs */
611 { "(bad)", XX, XX, XX }, /* op size prefix */
612 { "(bad)", XX, XX, XX }, /* adr size prefix */
252b5132 613 /* 68 */
6439fc28
AM		 614 { "pushT", Iq, XX, XX },
615 { "imulS", Gv, Ev, Iv },
616 { "pushT", sIb, XX, XX },
617 { "imulS", Gv, Ev, sIb },
618 { "ins{b||b|}", Yb, indirDX, XX },
619 { "ins{R||R|}", Yv, indirDX, XX },
620 { "outs{b||b|}", indirDX, Xb, XX },
621 { "outs{R||R|}", indirDX, Xv, XX },
252b5132 622 /* 70 */
6439fc28
AM		 623 { "joH", Jb, XX, cond_jump_flag },
624 { "jnoH", Jb, XX, cond_jump_flag },
625 { "jbH", Jb, XX, cond_jump_flag },
626 { "jaeH", Jb, XX, cond_jump_flag },
627 { "jeH", Jb, XX, cond_jump_flag },
628 { "jneH", Jb, XX, cond_jump_flag },
629 { "jbeH", Jb, XX, cond_jump_flag },
630 { "jaH", Jb, XX, cond_jump_flag },
252b5132 631 /* 78 */
6439fc28
AM		 632 { "jsH", Jb, XX, cond_jump_flag },
633 { "jnsH", Jb, XX, cond_jump_flag },
634 { "jpH", Jb, XX, cond_jump_flag },
635 { "jnpH", Jb, XX, cond_jump_flag },
636 { "jlH", Jb, XX, cond_jump_flag },
637 { "jgeH", Jb, XX, cond_jump_flag },
638 { "jleH", Jb, XX, cond_jump_flag },
639 { "jgH", Jb, XX, cond_jump_flag },
252b5132
RH		 640 /* 80 */
641 { GRP1b },
642 { GRP1S },
6439fc28 643 { "(bad)", XX, XX, XX },
252b5132 644 { GRP1Ss },
6439fc28
AM		 645 { "testB", Eb, Gb, XX },
646 { "testS", Ev, Gv, XX },
647 { "xchgB", Eb, Gb, XX },
648 { "xchgS", Ev, Gv, XX },
252b5132 649 /* 88 */
6439fc28
AM		 650 { "movB", Eb, Gb, XX },
651 { "movS", Ev, Gv, XX },
652 { "movB", Gb, Eb, XX },
653 { "movS", Gv, Ev, XX },
4cc91dba 654 { "movQ", Sv, Sw, XX },
6439fc28 655 { "leaS", Gv, M, XX },
4cc91dba 656 { "movQ", Sw, Sv, XX },
6439fc28 657 { "popU", Ev, XX, XX },
252b5132 658 /* 90 */
cc0ec051 659 { "nop", NOP_Fixup, 0, XX, XX },
6439fc28
AM		 660 { "xchgS", RMeCX, eAX, XX },
661 { "xchgS", RMeDX, eAX, XX },
662 { "xchgS", RMeBX, eAX, XX },
663 { "xchgS", RMeSP, eAX, XX },
664 { "xchgS", RMeBP, eAX, XX },
665 { "xchgS", RMeSI, eAX, XX },
666 { "xchgS", RMeDI, eAX, XX },
252b5132 667 /* 98 */
6439fc28
AM		 668 { "cW{tR||tR|}", XX, XX, XX },
669 { "cR{tO||tO|}", XX, XX, XX },
9306ca4a 670 { "Jcall{T|}", Ap, XX, XX },
6439fc28
AM		 671 { "(bad)", XX, XX, XX }, /* fwait */
672 { "pushfT", XX, XX, XX },
673 { "popfT", XX, XX, XX },
674 { "sahf{|}", XX, XX, XX },
675 { "lahf{|}", XX, XX, XX },
252b5132 676 /* a0 */
6439fc28
AM		 677 { "movB", AL, Ob64, XX },
678 { "movS", eAX, Ov64, XX },
679 { "movB", Ob64, AL, XX },
680 { "movS", Ov64, eAX, XX },
681 { "movs{b||b|}", Yb, Xb, XX },
682 { "movs{R||R|}", Yv, Xv, XX },
683 { "cmps{b||b|}", Xb, Yb, XX },
684 { "cmps{R||R|}", Xv, Yv, XX },
252b5132 685 /* a8 */
6439fc28
AM		 686 { "testB", AL, Ib, XX },
687 { "testS", eAX, Iv, XX },
688 { "stosB", Yb, AL, XX },
689 { "stosS", Yv, eAX, XX },
690 { "lodsB", AL, Xb, XX },
691 { "lodsS", eAX, Xv, XX },
692 { "scasB", AL, Yb, XX },
693 { "scasS", eAX, Yv, XX },
252b5132 694 /* b0 */
6439fc28
AM		 695 { "movB", RMAL, Ib, XX },
696 { "movB", RMCL, Ib, XX },
697 { "movB", RMDL, Ib, XX },
698 { "movB", RMBL, Ib, XX },
699 { "movB", RMAH, Ib, XX },
700 { "movB", RMCH, Ib, XX },
701 { "movB", RMDH, Ib, XX },
702 { "movB", RMBH, Ib, XX },
252b5132 703 /* b8 */
6439fc28
AM		 704 { "movS", RMeAX, Iv64, XX },
705 { "movS", RMeCX, Iv64, XX },
706 { "movS", RMeDX, Iv64, XX },
707 { "movS", RMeBX, Iv64, XX },
708 { "movS", RMeSP, Iv64, XX },
709 { "movS", RMeBP, Iv64, XX },
710 { "movS", RMeSI, Iv64, XX },
711 { "movS", RMeDI, Iv64, XX },
252b5132
RH		 712 /* c0 */
713 { GRP2b },
714 { GRP2S },
6439fc28
AM		 715 { "retT", Iw, XX, XX },
716 { "retT", XX, XX, XX },
717 { "les{S|}", Gv, Mp, XX },
718 { "ldsS", Gv, Mp, XX },
719 { "movA", Eb, Ib, XX },
720 { "movQ", Ev, Iv, XX },
252b5132 721 /* c8 */
6439fc28
AM		 722 { "enterT", Iw, Ib, XX },
723 { "leaveT", XX, XX, XX },
724 { "lretP", Iw, XX, XX },
725 { "lretP", XX, XX, XX },
726 { "int3", XX, XX, XX },
727 { "int", Ib, XX, XX },
728 { "into{|}", XX, XX, XX },
729 { "iretP", XX, XX, XX },
252b5132
RH		 730 /* d0 */
731 { GRP2b_one },
732 { GRP2S_one },
733 { GRP2b_cl },
734 { GRP2S_cl },
6439fc28
AM		 735 { "aam{|}", sIb, XX, XX },
736 { "aad{|}", sIb, XX, XX },
737 { "(bad)", XX, XX, XX },
738 { "xlat", DSBX, XX, XX },
252b5132
RH		 739 /* d8 */
740 { FLOAT },
741 { FLOAT },
742 { FLOAT },
743 { FLOAT },
744 { FLOAT },
745 { FLOAT },
746 { FLOAT },
747 { FLOAT },
748 /* e0 */
6439fc28
AM		 749 { "loopneFH", Jb, XX, loop_jcxz_flag },
750 { "loopeFH", Jb, XX, loop_jcxz_flag },
751 { "loopFH", Jb, XX, loop_jcxz_flag },
752 { "jEcxzH", Jb, XX, loop_jcxz_flag },
753 { "inB", AL, Ib, XX },
754 { "inS", eAX, Ib, XX },
755 { "outB", Ib, AL, XX },
756 { "outS", Ib, eAX, XX },
252b5132 757 /* e8 */
6439fc28
AM		 758 { "callT", Jv, XX, XX },
759 { "jmpT", Jv, XX, XX },
9306ca4a 760 { "Jjmp{T|}", Ap, XX, XX },
6439fc28
AM		 761 { "jmp", Jb, XX, XX },
762 { "inB", AL, indirDX, XX },
763 { "inS", eAX, indirDX, XX },
764 { "outB", indirDX, AL, XX },
765 { "outS", indirDX, eAX, XX },
252b5132 766 /* f0 */
6439fc28 767 { "(bad)", XX, XX, XX }, /* lock prefix */
067186e4 768 { "icebp", XX, XX, XX },
6439fc28
AM		 769 { "(bad)", XX, XX, XX }, /* repne */
770 { "(bad)", XX, XX, XX }, /* repz */
771 { "hlt", XX, XX, XX },
772 { "cmc", XX, XX, XX },
252b5132
RH		 773 { GRP3b },
774 { GRP3S },
775 /* f8 */
6439fc28
AM		 776 { "clc", XX, XX, XX },
777 { "stc", XX, XX, XX },
778 { "cli", XX, XX, XX },
779 { "sti", XX, XX, XX },
780 { "cld", XX, XX, XX },
781 { "std", XX, XX, XX },
252b5132
RH		 782 { GRP4 },
783 { GRP5 },
784};
785
6439fc28 786static const struct dis386 dis386_twobyte[] = {
252b5132
RH		 787 /* 00 */
788 { GRP6 },
789 { GRP7 },
6439fc28
AM		 790 { "larS", Gv, Ew, XX },
791 { "lslS", Gv, Ew, XX },
792 { "(bad)", XX, XX, XX },
793 { "syscall", XX, XX, XX },
794 { "clts", XX, XX, XX },
795 { "sysretP", XX, XX, XX },
252b5132 796 /* 08 */
6439fc28
AM		 797 { "invd", XX, XX, XX },
798 { "wbinvd", XX, XX, XX },
799 { "(bad)", XX, XX, XX },
800 { "ud2a", XX, XX, XX },
801 { "(bad)", XX, XX, XX },
c608c12e 802 { GRPAMD },
6439fc28 803 { "femms", XX, XX, XX },
6608db57 804 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
252b5132 805 /* 10 */
c608c12e
AM		 806 { PREGRP8 },
807 { PREGRP9 },
ca164297 808 { PREGRP30 },
6439fc28
AM		 809 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
810 { "unpcklpX", XM, EX, XX },
811 { "unpckhpX", XM, EX, XX },
ca164297 812 { PREGRP31 },
6439fc28 813 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
252b5132 814 /* 18 */
c608c12e 815 { GRP14 },
6439fc28
AM		 816 { "(bad)", XX, XX, XX },
817 { "(bad)", XX, XX, XX },
818 { "(bad)", XX, XX, XX },
819 { "(bad)", XX, XX, XX },
820 { "(bad)", XX, XX, XX },
821 { "(bad)", XX, XX, XX },
822 { "(bad)", XX, XX, XX },
252b5132 823 /* 20 */
6439fc28
AM		 824 { "movL", Rm, Cm, XX },
825 { "movL", Rm, Dm, XX },
826 { "movL", Cm, Rm, XX },
827 { "movL", Dm, Rm, XX },
828 { "movL", Rd, Td, XX },
829 { "(bad)", XX, XX, XX },
830 { "movL", Td, Rd, XX },
831 { "(bad)", XX, XX, XX },
252b5132 832 /* 28 */
6439fc28
AM		 833 { "movapX", XM, EX, XX },
834 { "movapX", EX, XM, XX },
c608c12e 835 { PREGRP2 },
6439fc28 836 { "movntpX", Ev, XM, XX },
2da11e11 837 { PREGRP4 },
c608c12e 838 { PREGRP3 },
6439fc28
AM		 839 { "ucomisX", XM,EX, XX },
840 { "comisX", XM,EX, XX },
252b5132 841 /* 30 */
6439fc28
AM		 842 { "wrmsr", XX, XX, XX },
843 { "rdtsc", XX, XX, XX },
844 { "rdmsr", XX, XX, XX },
845 { "rdpmc", XX, XX, XX },
846 { "sysenter", XX, XX, XX },
847 { "sysexit", XX, XX, XX },
848 { "(bad)", XX, XX, XX },
849 { "(bad)", XX, XX, XX },
252b5132 850 /* 38 */
6439fc28
AM		 851 { "(bad)", XX, XX, XX },
852 { "(bad)", XX, XX, XX },
853 { "(bad)", XX, XX, XX },
854 { "(bad)", XX, XX, XX },
855 { "(bad)", XX, XX, XX },
856 { "(bad)", XX, XX, XX },
857 { "(bad)", XX, XX, XX },
858 { "(bad)", XX, XX, XX },
252b5132 859 /* 40 */
6439fc28
AM		 860 { "cmovo", Gv, Ev, XX },
861 { "cmovno", Gv, Ev, XX },
862 { "cmovb", Gv, Ev, XX },
863 { "cmovae", Gv, Ev, XX },
864 { "cmove", Gv, Ev, XX },
865 { "cmovne", Gv, Ev, XX },
866 { "cmovbe", Gv, Ev, XX },
867 { "cmova", Gv, Ev, XX },
252b5132 868 /* 48 */
6439fc28
AM		 869 { "cmovs", Gv, Ev, XX },
870 { "cmovns", Gv, Ev, XX },
871 { "cmovp", Gv, Ev, XX },
872 { "cmovnp", Gv, Ev, XX },
873 { "cmovl", Gv, Ev, XX },
874 { "cmovge", Gv, Ev, XX },
875 { "cmovle", Gv, Ev, XX },
876 { "cmovg", Gv, Ev, XX },
252b5132 877 /* 50 */
9306ca4a 878 { "movmskpX", Gdq, XS, XX },
c608c12e
AM		 879 { PREGRP13 },
880 { PREGRP12 },
881 { PREGRP11 },
6439fc28
AM		 882 { "andpX", XM, EX, XX },
883 { "andnpX", XM, EX, XX },
884 { "orpX", XM, EX, XX },
885 { "xorpX", XM, EX, XX },
252b5132 886 /* 58 */
c608c12e
AM		 887 { PREGRP0 },
888 { PREGRP10 },
041bd2e0
JH		 889 { PREGRP17 },
890 { PREGRP16 },
c608c12e
AM		 891 { PREGRP14 },
892 { PREGRP7 },
893 { PREGRP5 },
2da11e11 894 { PREGRP6 },
252b5132 895 /* 60 */
6439fc28
AM		 896 { "punpcklbw", MX, EM, XX },
897 { "punpcklwd", MX, EM, XX },
898 { "punpckldq", MX, EM, XX },
899 { "packsswb", MX, EM, XX },
900 { "pcmpgtb", MX, EM, XX },
901 { "pcmpgtw", MX, EM, XX },
902 { "pcmpgtd", MX, EM, XX },
903 { "packuswb", MX, EM, XX },
252b5132 904 /* 68 */
6439fc28
AM		 905 { "punpckhbw", MX, EM, XX },
906 { "punpckhwd", MX, EM, XX },
907 { "punpckhdq", MX, EM, XX },
908 { "packssdw", MX, EM, XX },
0f17484f 909 { PREGRP26 },
041bd2e0 910 { PREGRP24 },
db6eb5be 911 { "movd", MX, Edq, XX },
041bd2e0 912 { PREGRP19 },
252b5132 913 /* 70 */
041bd2e0 914 { PREGRP22 },
252b5132
RH		 915 { GRP10 },
916 { GRP11 },
917 { GRP12 },
6439fc28
AM		 918 { "pcmpeqb", MX, EM, XX },
919 { "pcmpeqw", MX, EM, XX },
920 { "pcmpeqd", MX, EM, XX },
921 { "emms", XX, XX, XX },
252b5132 922 /* 78 */
90700ea2
L		 923 { "vmread", Em, Gm, XX },
924 { "vmwrite", Gm, Em, XX },
6439fc28
AM		 925 { "(bad)", XX, XX, XX },
926 { "(bad)", XX, XX, XX },
ca164297
L		 927 { PREGRP28 },
928 { PREGRP29 },
041bd2e0
JH		 929 { PREGRP23 },
930 { PREGRP20 },
252b5132 931 /* 80 */
6439fc28
AM		 932 { "joH", Jv, XX, cond_jump_flag },
933 { "jnoH", Jv, XX, cond_jump_flag },
934 { "jbH", Jv, XX, cond_jump_flag },
935 { "jaeH", Jv, XX, cond_jump_flag },
936 { "jeH", Jv, XX, cond_jump_flag },
937 { "jneH", Jv, XX, cond_jump_flag },
938 { "jbeH", Jv, XX, cond_jump_flag },
939 { "jaH", Jv, XX, cond_jump_flag },
252b5132 940 /* 88 */
6439fc28
AM		 941 { "jsH", Jv, XX, cond_jump_flag },
942 { "jnsH", Jv, XX, cond_jump_flag },
943 { "jpH", Jv, XX, cond_jump_flag },
944 { "jnpH", Jv, XX, cond_jump_flag },
945 { "jlH", Jv, XX, cond_jump_flag },
946 { "jgeH", Jv, XX, cond_jump_flag },
947 { "jleH", Jv, XX, cond_jump_flag },
948 { "jgH", Jv, XX, cond_jump_flag },
252b5132 949 /* 90 */
6439fc28
AM		 950 { "seto", Eb, XX, XX },
951 { "setno", Eb, XX, XX },
952 { "setb", Eb, XX, XX },
953 { "setae", Eb, XX, XX },
954 { "sete", Eb, XX, XX },
955 { "setne", Eb, XX, XX },
956 { "setbe", Eb, XX, XX },
957 { "seta", Eb, XX, XX },
252b5132 958 /* 98 */
6439fc28
AM		 959 { "sets", Eb, XX, XX },
960 { "setns", Eb, XX, XX },
961 { "setp", Eb, XX, XX },
962 { "setnp", Eb, XX, XX },
963 { "setl", Eb, XX, XX },
964 { "setge", Eb, XX, XX },
965 { "setle", Eb, XX, XX },
966 { "setg", Eb, XX, XX },
252b5132 967 /* a0 */
6439fc28
AM		 968 { "pushT", fs, XX, XX },
969 { "popT", fs, XX, XX },
970 { "cpuid", XX, XX, XX },
971 { "btS", Ev, Gv, XX },
972 { "shldS", Ev, Gv, Ib },
973 { "shldS", Ev, Gv, CL },
30d1c836
ML		 974 { GRPPADLCK2 },
975 { GRPPADLCK1 },
252b5132 976 /* a8 */
6439fc28
AM		 977 { "pushT", gs, XX, XX },
978 { "popT", gs, XX, XX },
979 { "rsm", XX, XX, XX },
980 { "btsS", Ev, Gv, XX },
981 { "shrdS", Ev, Gv, Ib },
982 { "shrdS", Ev, Gv, CL },
252b5132 983 { GRP13 },
6439fc28 984 { "imulS", Gv, Ev, XX },
252b5132 985 /* b0 */
6439fc28
AM		 986 { "cmpxchgB", Eb, Gb, XX },
987 { "cmpxchgS", Ev, Gv, XX },
988 { "lssS", Gv, Mp, XX },
989 { "btrS", Ev, Gv, XX },
990 { "lfsS", Gv, Mp, XX },
991 { "lgsS", Gv, Mp, XX },
992 { "movz{bR|x|bR|x}", Gv, Eb, XX },
993 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
252b5132 994 /* b8 */
6439fc28
AM		 995 { "(bad)", XX, XX, XX },
996 { "ud2b", XX, XX, XX },
252b5132 997 { GRP8 },
6439fc28
AM		 998 { "btcS", Ev, Gv, XX },
999 { "bsfS", Gv, Ev, XX },
1000 { "bsrS", Gv, Ev, XX },
1001 { "movs{bR|x|bR|x}", Gv, Eb, XX },
1002 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
252b5132 1003 /* c0 */
6439fc28
AM		 1004 { "xaddB", Eb, Gb, XX },
1005 { "xaddS", Ev, Gv, XX },
c608c12e 1006 { PREGRP1 },
6439fc28 1007 { "movntiS", Ev, Gv, XX },
9306ca4a
JB		 1008 { "pinsrw", MX, Edqw, Ib },
1009 { "pextrw", Gdq, MS, Ib },
6439fc28 1010 { "shufpX", XM, EX, Ib },
252b5132
RH		 1011 { GRP9 },
1012 /* c8 */
6439fc28
AM		 1013 { "bswap", RMeAX, XX, XX },
1014 { "bswap", RMeCX, XX, XX },
1015 { "bswap", RMeDX, XX, XX },
1016 { "bswap", RMeBX, XX, XX },
1017 { "bswap", RMeSP, XX, XX },
1018 { "bswap", RMeBP, XX, XX },
1019 { "bswap", RMeSI, XX, XX },
1020 { "bswap", RMeDI, XX, XX },
252b5132 1021 /* d0 */
ca164297 1022 { PREGRP27 },
6439fc28
AM		 1023 { "psrlw", MX, EM, XX },
1024 { "psrld", MX, EM, XX },
1025 { "psrlq", MX, EM, XX },
1026 { "paddq", MX, EM, XX },
1027 { "pmullw", MX, EM, XX },
041bd2e0 1028 { PREGRP21 },
9306ca4a 1029 { "pmovmskb", Gdq, MS, XX },
252b5132 1030 /* d8 */
6439fc28
AM		 1031 { "psubusb", MX, EM, XX },
1032 { "psubusw", MX, EM, XX },
1033 { "pminub", MX, EM, XX },
1034 { "pand", MX, EM, XX },
1035 { "paddusb", MX, EM, XX },
1036 { "paddusw", MX, EM, XX },
1037 { "pmaxub", MX, EM, XX },
1038 { "pandn", MX, EM, XX },
252b5132 1039 /* e0 */
6439fc28
AM		 1040 { "pavgb", MX, EM, XX },
1041 { "psraw", MX, EM, XX },
1042 { "psrad", MX, EM, XX },
1043 { "pavgw", MX, EM, XX },
1044 { "pmulhuw", MX, EM, XX },
1045 { "pmulhw", MX, EM, XX },
041bd2e0 1046 { PREGRP15 },
0f17484f 1047 { PREGRP25 },
252b5132 1048 /* e8 */
6439fc28
AM		 1049 { "psubsb", MX, EM, XX },
1050 { "psubsw", MX, EM, XX },
1051 { "pminsw", MX, EM, XX },
1052 { "por", MX, EM, XX },
1053 { "paddsb", MX, EM, XX },
1054 { "paddsw", MX, EM, XX },
1055 { "pmaxsw", MX, EM, XX },
1056 { "pxor", MX, EM, XX },
252b5132 1057 /* f0 */
ca164297 1058 { PREGRP32 },
6439fc28
AM		 1059 { "psllw", MX, EM, XX },
1060 { "pslld", MX, EM, XX },
1061 { "psllq", MX, EM, XX },
1062 { "pmuludq", MX, EM, XX },
1063 { "pmaddwd", MX, EM, XX },
1064 { "psadbw", MX, EM, XX },
041bd2e0 1065 { PREGRP18 },
252b5132 1066 /* f8 */
6439fc28
AM		 1067 { "psubb", MX, EM, XX },
1068 { "psubw", MX, EM, XX },
1069 { "psubd", MX, EM, XX },
1070 { "psubq", MX, EM, XX },
1071 { "paddb", MX, EM, XX },
1072 { "paddw", MX, EM, XX },
1073 { "paddd", MX, EM, XX },
1074 { "(bad)", XX, XX, XX }
252b5132
RH		 1075};
1076
1077static const unsigned char onebyte_has_modrm[256] = {
c608c12e
AM		 1078 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1079 /* ------------------------------- */
1080 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1081 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1082 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1083 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1084 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1085 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1086 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1087 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1088 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1089 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1090 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1091 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1092 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1093 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1094 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1095 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1096 /* ------------------------------- */
1097 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1098};
1099
1100static const unsigned char twobyte_has_modrm[256] = {
c608c12e
AM		 1101 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1102 /* ------------------------------- */
252b5132 1103 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
c608c12e 1104 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
4bba6815 1105 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
252b5132
RH		 1106 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1107 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
4bba6815
AM		 1108 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1109 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
90700ea2 1110 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
252b5132
RH		 1111 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1112 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
30d1c836 1113 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
252b5132
RH		 1114 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1115 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
ca164297 1116 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
4bba6815 1117 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
ca164297 1118 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
c608c12e
AM		 1119 /* ------------------------------- */
1120 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1121};
1122
041bd2e0 1123static const unsigned char twobyte_uses_SSE_prefix[256] = {
c608c12e
AM		 1124 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1125 /* ------------------------------- */
1126 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
ca164297 1127 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
c608c12e
AM		 1128 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1129 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1130 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
041bd2e0
JH		 1131 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1132 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
ca164297 1133 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
c608c12e
AM		 1134 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1135 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1136 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1137 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1138 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
ca164297 1139 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
041bd2e0 1140 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
ca164297 1141 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
c608c12e
AM		 1142 /* ------------------------------- */
1143 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1144};
1145
1146static char obuf[100];
1147static char *obufp;
1148static char scratchbuf[100];
1149static unsigned char *start_codep;
1150static unsigned char *insn_codep;
1151static unsigned char *codep;
1152static disassemble_info *the_info;
1153static int mod;
1154static int rm;
1155static int reg;
4bba6815 1156static unsigned char need_modrm;
252b5132 1157
4bba6815
AM		 1158/* If we are accessing mod/rm/reg without need_modrm set, then the
1159 values are stale. Hitting this abort likely indicates that you
1160 need to update onebyte_has_modrm or twobyte_has_modrm. */
1161#define MODRM_CHECK if (!need_modrm) abort ()
1162
d708bcba
AM		 1163static const char **names64;
1164static const char **names32;
1165static const char **names16;
1166static const char **names8;
1167static const char **names8rex;
1168static const char **names_seg;
1169static const char **index16;
1170
1171static const char *intel_names64[] = {
1172 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1173 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1174};
1175static const char *intel_names32[] = {
1176 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1177 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1178};
1179static const char *intel_names16[] = {
1180 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1181 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1182};
1183static const char *intel_names8[] = {
1184 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1185};
1186static const char *intel_names8rex[] = {
1187 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1188 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1189};
1190static const char *intel_names_seg[] = {
1191 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1192};
1193static const char *intel_index16[] = {
1194 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1195};
1196
1197static const char *att_names64[] = {
1198 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
52b15da3
JH		 1199 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1200};
d708bcba
AM		 1201static const char *att_names32[] = {
1202 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
52b15da3 1203 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
252b5132 1204};
d708bcba
AM		 1205static const char *att_names16[] = {
1206 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
52b15da3 1207 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
252b5132 1208};
d708bcba
AM		 1209static const char *att_names8[] = {
1210 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
252b5132 1211};
d708bcba
AM		 1212static const char *att_names8rex[] = {
1213 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
52b15da3
JH		 1214 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1215};
d708bcba
AM		 1216static const char *att_names_seg[] = {
1217 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
252b5132 1218};
d708bcba
AM		 1219static const char *att_index16[] = {
1220 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
252b5132
RH		 1221};
1222
2da11e11 1223static const struct dis386 grps[][8] = {
252b5132
RH		 1224 /* GRP1b */
1225 {
57d91c3c
ILT		 1226 { "addA", Eb, Ib, XX },
1227 { "orA", Eb, Ib, XX },
1228 { "adcA", Eb, Ib, XX },
1229 { "sbbA", Eb, Ib, XX },
1230 { "andA", Eb, Ib, XX },
1231 { "subA", Eb, Ib, XX },
1232 { "xorA", Eb, Ib, XX },
1233 { "cmpA", Eb, Ib, XX }
252b5132
RH		 1234 },
1235 /* GRP1S */
1236 {
57d91c3c
ILT		 1237 { "addQ", Ev, Iv, XX },
1238 { "orQ", Ev, Iv, XX },
1239 { "adcQ", Ev, Iv, XX },
1240 { "sbbQ", Ev, Iv, XX },
1241 { "andQ", Ev, Iv, XX },
1242 { "subQ", Ev, Iv, XX },
1243 { "xorQ", Ev, Iv, XX },
1244 { "cmpQ", Ev, Iv, XX }
252b5132
RH		 1245 },
1246 /* GRP1Ss */
1247 {
57d91c3c
ILT		 1248 { "addQ", Ev, sIb, XX },
1249 { "orQ", Ev, sIb, XX },
1250 { "adcQ", Ev, sIb, XX },
1251 { "sbbQ", Ev, sIb, XX },
1252 { "andQ", Ev, sIb, XX },
1253 { "subQ", Ev, sIb, XX },
1254 { "xorQ", Ev, sIb, XX },
1255 { "cmpQ", Ev, sIb, XX }
252b5132
RH		 1256 },
1257 /* GRP2b */
1258 {
57d91c3c
ILT		 1259 { "rolA", Eb, Ib, XX },
1260 { "rorA", Eb, Ib, XX },
1261 { "rclA", Eb, Ib, XX },
1262 { "rcrA", Eb, Ib, XX },
1263 { "shlA", Eb, Ib, XX },
1264 { "shrA", Eb, Ib, XX },
1265 { "(bad)", XX, XX, XX },
1266 { "sarA", Eb, Ib, XX },
252b5132
RH		 1267 },
1268 /* GRP2S */
1269 {
57d91c3c
ILT		 1270 { "rolQ", Ev, Ib, XX },
1271 { "rorQ", Ev, Ib, XX },
1272 { "rclQ", Ev, Ib, XX },
1273 { "rcrQ", Ev, Ib, XX },
1274 { "shlQ", Ev, Ib, XX },
1275 { "shrQ", Ev, Ib, XX },
1276 { "(bad)", XX, XX, XX },
1277 { "sarQ", Ev, Ib, XX },
252b5132
RH		 1278 },
1279 /* GRP2b_one */
1280 {
9306ca4a
JB		 1281 { "rolA", Eb, I1, XX },
1282 { "rorA", Eb, I1, XX },
1283 { "rclA", Eb, I1, XX },
1284 { "rcrA", Eb, I1, XX },
1285 { "shlA", Eb, I1, XX },
1286 { "shrA", Eb, I1, XX },
57d91c3c 1287 { "(bad)", XX, XX, XX },
9306ca4a 1288 { "sarA", Eb, I1, XX },
252b5132
RH		 1289 },
1290 /* GRP2S_one */
1291 {
9306ca4a
JB		 1292 { "rolQ", Ev, I1, XX },
1293 { "rorQ", Ev, I1, XX },
1294 { "rclQ", Ev, I1, XX },
1295 { "rcrQ", Ev, I1, XX },
1296 { "shlQ", Ev, I1, XX },
1297 { "shrQ", Ev, I1, XX },
57d91c3c 1298 { "(bad)", XX, XX, XX},
9306ca4a 1299 { "sarQ", Ev, I1, XX },
252b5132
RH		 1300 },
1301 /* GRP2b_cl */
1302 {
57d91c3c
ILT		 1303 { "rolA", Eb, CL, XX },
1304 { "rorA", Eb, CL, XX },
1305 { "rclA", Eb, CL, XX },
1306 { "rcrA", Eb, CL, XX },
1307 { "shlA", Eb, CL, XX },
1308 { "shrA", Eb, CL, XX },
1309 { "(bad)", XX, XX, XX },
1310 { "sarA", Eb, CL, XX },
252b5132
RH		 1311 },
1312 /* GRP2S_cl */
1313 {
57d91c3c
ILT		 1314 { "rolQ", Ev, CL, XX },
1315 { "rorQ", Ev, CL, XX },
1316 { "rclQ", Ev, CL, XX },
1317 { "rcrQ", Ev, CL, XX },
1318 { "shlQ", Ev, CL, XX },
1319 { "shrQ", Ev, CL, XX },
1320 { "(bad)", XX, XX, XX },
1321 { "sarQ", Ev, CL, XX }
252b5132
RH		 1322 },
1323 /* GRP3b */
1324 {
57d91c3c
ILT		 1325 { "testA", Eb, Ib, XX },
1326 { "(bad)", Eb, XX, XX },
1327 { "notA", Eb, XX, XX },
1328 { "negA", Eb, XX, XX },
8227b51f
AM		 1329 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1330 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1331 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1332 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
252b5132
RH		 1333 },
1334 /* GRP3S */
1335 {
57d91c3c
ILT		 1336 { "testQ", Ev, Iv, XX },
1337 { "(bad)", XX, XX, XX },
1338 { "notQ", Ev, XX, XX },
1339 { "negQ", Ev, XX, XX },
8227b51f
AM		 1340 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1341 { "imulQ", Ev, XX, XX },
1342 { "divQ", Ev, XX, XX },
1343 { "idivQ", Ev, XX, XX },
252b5132
RH		 1344 },
1345 /* GRP4 */
1346 {
57d91c3c
ILT		 1347 { "incA", Eb, XX, XX },
1348 { "decA", Eb, XX, XX },
1349 { "(bad)", XX, XX, XX },
1350 { "(bad)", XX, XX, XX },
1351 { "(bad)", XX, XX, XX },
1352 { "(bad)", XX, XX, XX },
1353 { "(bad)", XX, XX, XX },
1354 { "(bad)", XX, XX, XX },
252b5132
RH		 1355 },
1356 /* GRP5 */
1357 {
57d91c3c
ILT		 1358 { "incQ", Ev, XX, XX },
1359 { "decQ", Ev, XX, XX },
6439fc28 1360 { "callT", indirEv, XX, XX },
9306ca4a 1361 { "JcallT", indirEp, XX, XX },
6439fc28 1362 { "jmpT", indirEv, XX, XX },
9306ca4a 1363 { "JjmpT", indirEp, XX, XX },
6439fc28 1364 { "pushU", Ev, XX, XX },
57d91c3c 1365 { "(bad)", XX, XX, XX },
252b5132
RH		 1366 },
1367 /* GRP6 */
1368 {
e5470cdc
AM		 1369 { "sldtQ", Ev, XX, XX },
1370 { "strQ", Ev, XX, XX },
57d91c3c
ILT		 1371 { "lldt", Ew, XX, XX },
1372 { "ltr", Ew, XX, XX },
1373 { "verr", Ew, XX, XX },
1374 { "verw", Ew, XX, XX },
1375 { "(bad)", XX, XX, XX },
1376 { "(bad)", XX, XX, XX }
252b5132
RH		 1377 },
1378 /* GRP7 */
1379 {
90700ea2 1380 { "sgdtIQ", VMX_Fixup, 0, XX, XX },
9306ca4a
JB		 1381 { "sidtIQ", PNI_Fixup, 0, XX, XX },
1382 { "lgdt{Q|Q||}", M, XX, XX },
30123838 1383 { "lidt{Q|Q||}", SVME_Fixup, 0, XX, XX },
e5470cdc 1384 { "smswQ", Ev, XX, XX },
bcb5558b
AM		 1385 { "(bad)", XX, XX, XX },
1386 { "lmsw", Ew, XX, XX },
4fd61dcb 1387 { "invlpg", INVLPG_Fixup, w_mode, XX, XX },
252b5132
RH		 1388 },
1389 /* GRP8 */
1390 {
57d91c3c
ILT		 1391 { "(bad)", XX, XX, XX },
1392 { "(bad)", XX, XX, XX },
1393 { "(bad)", XX, XX, XX },
1394 { "(bad)", XX, XX, XX },
1395 { "btQ", Ev, Ib, XX },
1396 { "btsQ", Ev, Ib, XX },
1397 { "btrQ", Ev, Ib, XX },
1398 { "btcQ", Ev, Ib, XX },
252b5132
RH		 1399 },
1400 /* GRP9 */
1401 {
57d91c3c 1402 { "(bad)", XX, XX, XX },
9306ca4a 1403 { "cmpxchg8b", Eq, XX, XX },
57d91c3c
ILT		 1404 { "(bad)", XX, XX, XX },
1405 { "(bad)", XX, XX, XX },
1406 { "(bad)", XX, XX, XX },
1407 { "(bad)", XX, XX, XX },
90700ea2
L		 1408 { "", VM, XX, XX }, /* See OP_VMX. */
1409 { "vmptrst", Eq, XX, XX },
252b5132
RH		 1410 },
1411 /* GRP10 */
1412 {
57d91c3c
ILT		 1413 { "(bad)", XX, XX, XX },
1414 { "(bad)", XX, XX, XX },
1415 { "psrlw", MS, Ib, XX },
1416 { "(bad)", XX, XX, XX },
1417 { "psraw", MS, Ib, XX },
1418 { "(bad)", XX, XX, XX },
1419 { "psllw", MS, Ib, XX },
1420 { "(bad)", XX, XX, XX },
252b5132
RH		 1421 },
1422 /* GRP11 */
1423 {
57d91c3c
ILT		 1424 { "(bad)", XX, XX, XX },
1425 { "(bad)", XX, XX, XX },
1426 { "psrld", MS, Ib, XX },
1427 { "(bad)", XX, XX, XX },
1428 { "psrad", MS, Ib, XX },
1429 { "(bad)", XX, XX, XX },
1430 { "pslld", MS, Ib, XX },
1431 { "(bad)", XX, XX, XX },
252b5132
RH		 1432 },
1433 /* GRP12 */
1434 {
57d91c3c
ILT		 1435 { "(bad)", XX, XX, XX },
1436 { "(bad)", XX, XX, XX },
1437 { "psrlq", MS, Ib, XX },
041bd2e0 1438 { "psrldq", MS, Ib, XX },
57d91c3c
ILT		 1439 { "(bad)", XX, XX, XX },
1440 { "(bad)", XX, XX, XX },
1441 { "psllq", MS, Ib, XX },
041bd2e0 1442 { "pslldq", MS, Ib, XX },
252b5132
RH		 1443 },
1444 /* GRP13 */
1445 {
57d91c3c
ILT		 1446 { "fxsave", Ev, XX, XX },
1447 { "fxrstor", Ev, XX, XX },
1448 { "ldmxcsr", Ev, XX, XX },
1449 { "stmxcsr", Ev, XX, XX },
1450 { "(bad)", XX, XX, XX },
cc0ec051
AM		 1451 { "lfence", OP_0fae, 0, XX, XX },
1452 { "mfence", OP_0fae, 0, XX, XX },
1453 { "clflush", OP_0fae, 0, XX, XX },
c608c12e
AM		 1454 },
1455 /* GRP14 */
1456 {
57d91c3c
ILT		 1457 { "prefetchnta", Ev, XX, XX },
1458 { "prefetcht0", Ev, XX, XX },
1459 { "prefetcht1", Ev, XX, XX },
1460 { "prefetcht2", Ev, XX, XX },
1461 { "(bad)", XX, XX, XX },
1462 { "(bad)", XX, XX, XX },
1463 { "(bad)", XX, XX, XX },
1464 { "(bad)", XX, XX, XX },
252b5132 1465 },
c608c12e 1466 /* GRPAMD */
252b5132 1467 {
57d91c3c
ILT		 1468 { "prefetch", Eb, XX, XX },
1469 { "prefetchw", Eb, XX, XX },
1470 { "(bad)", XX, XX, XX },
1471 { "(bad)", XX, XX, XX },
1472 { "(bad)", XX, XX, XX },
1473 { "(bad)", XX, XX, XX },
1474 { "(bad)", XX, XX, XX },
1475 { "(bad)", XX, XX, XX },
0f10071e 1476 },
30d1c836 1477 /* GRPPADLCK1 */
cc0ec051 1478 {
791fe849
MK		 1479 { "xstore-rng", OP_0f07, 0, XX, XX },
1480 { "xcrypt-ecb", OP_0f07, 0, XX, XX },
1481 { "xcrypt-cbc", OP_0f07, 0, XX, XX },
1482 { "xcrypt-ctr", OP_0f07, 0, XX, XX },
1483 { "xcrypt-cfb", OP_0f07, 0, XX, XX },
1484 { "xcrypt-ofb", OP_0f07, 0, XX, XX },
1485 { "(bad)", OP_0f07, 0, XX, XX },
1486 { "(bad)", OP_0f07, 0, XX, XX },
30d1c836
ML		 1487 },
1488 /* GRPPADLCK2 */
1489 {
1490 { "montmul", OP_0f07, 0, XX, XX },
1491 { "xsha1", OP_0f07, 0, XX, XX },
1492 { "xsha256", OP_0f07, 0, XX, XX },
1493 { "(bad)", OP_0f07, 0, XX, XX },
1494 { "(bad)", OP_0f07, 0, XX, XX },
1495 { "(bad)", OP_0f07, 0, XX, XX },
1496 { "(bad)", OP_0f07, 0, XX, XX },
1497 { "(bad)", OP_0f07, 0, XX, XX },
252b5132 1498 }
252b5132
RH		 1499};
1500
041bd2e0 1501static const struct dis386 prefix_user_table[][4] = {
c608c12e
AM		 1502 /* PREGRP0 */
1503 {
57d91c3c
ILT		 1504 { "addps", XM, EX, XX },
1505 { "addss", XM, EX, XX },
041bd2e0
JH		 1506 { "addpd", XM, EX, XX },
1507 { "addsd", XM, EX, XX },
c608c12e
AM		 1508 },
1509 /* PREGRP1 */
1510 {
6608db57 1511 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
c608c12e 1512 { "", XM, EX, OPSIMD },
041bd2e0
JH		 1513 { "", XM, EX, OPSIMD },
1514 { "", XM, EX, OPSIMD },
c608c12e
AM		 1515 },
1516 /* PREGRP2 */
1517 {
57d91c3c 1518 { "cvtpi2ps", XM, EM, XX },
76f227a5 1519 { "cvtsi2ssY", XM, Ev, XX },
041bd2e0 1520 { "cvtpi2pd", XM, EM, XX },
76f227a5 1521 { "cvtsi2sdY", XM, Ev, XX },
c608c12e
AM		 1522 },
1523 /* PREGRP3 */
1524 {
57d91c3c 1525 { "cvtps2pi", MX, EX, XX },
76f227a5 1526 { "cvtss2siY", Gv, EX, XX },
041bd2e0 1527 { "cvtpd2pi", MX, EX, XX },
76f227a5 1528 { "cvtsd2siY", Gv, EX, XX },
c608c12e
AM		 1529 },
1530 /* PREGRP4 */
1531 {
57d91c3c 1532 { "cvttps2pi", MX, EX, XX },
76f227a5 1533 { "cvttss2siY", Gv, EX, XX },
041bd2e0 1534 { "cvttpd2pi", MX, EX, XX },
76f227a5 1535 { "cvttsd2siY", Gv, EX, XX },
c608c12e
AM		 1536 },
1537 /* PREGRP5 */
1538 {
57d91c3c
ILT		 1539 { "divps", XM, EX, XX },
1540 { "divss", XM, EX, XX },
041bd2e0
JH		 1541 { "divpd", XM, EX, XX },
1542 { "divsd", XM, EX, XX },
c608c12e
AM		 1543 },
1544 /* PREGRP6 */
1545 {
57d91c3c
ILT		 1546 { "maxps", XM, EX, XX },
1547 { "maxss", XM, EX, XX },
041bd2e0
JH		 1548 { "maxpd", XM, EX, XX },
1549 { "maxsd", XM, EX, XX },
c608c12e
AM		 1550 },
1551 /* PREGRP7 */
1552 {
57d91c3c
ILT		 1553 { "minps", XM, EX, XX },
1554 { "minss", XM, EX, XX },
041bd2e0
JH		 1555 { "minpd", XM, EX, XX },
1556 { "minsd", XM, EX, XX },
c608c12e
AM		 1557 },
1558 /* PREGRP8 */
1559 {
57d91c3c
ILT		 1560 { "movups", XM, EX, XX },
1561 { "movss", XM, EX, XX },
041bd2e0
JH		 1562 { "movupd", XM, EX, XX },
1563 { "movsd", XM, EX, XX },
c608c12e
AM		 1564 },
1565 /* PREGRP9 */
1566 {
57d91c3c
ILT		 1567 { "movups", EX, XM, XX },
1568 { "movss", EX, XM, XX },
041bd2e0
JH		 1569 { "movupd", EX, XM, XX },
1570 { "movsd", EX, XM, XX },
c608c12e
AM		 1571 },
1572 /* PREGRP10 */
1573 {
57d91c3c
ILT		 1574 { "mulps", XM, EX, XX },
1575 { "mulss", XM, EX, XX },
041bd2e0
JH		 1576 { "mulpd", XM, EX, XX },
1577 { "mulsd", XM, EX, XX },
c608c12e
AM		 1578 },
1579 /* PREGRP11 */
1580 {
57d91c3c
ILT		 1581 { "rcpps", XM, EX, XX },
1582 { "rcpss", XM, EX, XX },
041bd2e0
JH		 1583 { "(bad)", XM, EX, XX },
1584 { "(bad)", XM, EX, XX },
c608c12e
AM		 1585 },
1586 /* PREGRP12 */
1587 {
57d91c3c
ILT		 1588 { "rsqrtps", XM, EX, XX },
1589 { "rsqrtss", XM, EX, XX },
041bd2e0
JH		 1590 { "(bad)", XM, EX, XX },
1591 { "(bad)", XM, EX, XX },
c608c12e
AM		 1592 },
1593 /* PREGRP13 */
1594 {
57d91c3c
ILT		 1595 { "sqrtps", XM, EX, XX },
1596 { "sqrtss", XM, EX, XX },
041bd2e0
JH		 1597 { "sqrtpd", XM, EX, XX },
1598 { "sqrtsd", XM, EX, XX },
c608c12e
AM		 1599 },
1600 /* PREGRP14 */
1601 {
57d91c3c
ILT		 1602 { "subps", XM, EX, XX },
1603 { "subss", XM, EX, XX },
041bd2e0
JH		 1604 { "subpd", XM, EX, XX },
1605 { "subsd", XM, EX, XX },
1606 },
1607 /* PREGRP15 */
1608 {
1609 { "(bad)", XM, EX, XX },
1610 { "cvtdq2pd", XM, EX, XX },
1611 { "cvttpd2dq", XM, EX, XX },
1612 { "cvtpd2dq", XM, EX, XX },
1613 },
1614 /* PREGRP16 */
1615 {
1616 { "cvtdq2ps", XM, EX, XX },
1617 { "cvttps2dq",XM, EX, XX },
1618 { "cvtps2dq",XM, EX, XX },
1619 { "(bad)", XM, EX, XX },
1620 },
1621 /* PREGRP17 */
1622 {
1623 { "cvtps2pd", XM, EX, XX },
1624 { "cvtss2sd", XM, EX, XX },
1625 { "cvtpd2ps", XM, EX, XX },
1626 { "cvtsd2ss", XM, EX, XX },
1627 },
1628 /* PREGRP18 */
1629 {
992aaec9 1630 { "maskmovq", MX, MS, XX },
041bd2e0 1631 { "(bad)", XM, EX, XX },
0f17484f 1632 { "maskmovdqu", XM, EX, XX },
041bd2e0
JH		 1633 { "(bad)", XM, EX, XX },
1634 },
1635 /* PREGRP19 */
1636 {
1637 { "movq", MX, EM, XX },
1638 { "movdqu", XM, EX, XX },
1639 { "movdqa", XM, EX, XX },
1640 { "(bad)", XM, EX, XX },
1641 },
1642 /* PREGRP20 */
1643 {
1644 { "movq", EM, MX, XX },
1645 { "movdqu", EX, XM, XX },
1646 { "movdqa", EX, XM, XX },
1647 { "(bad)", EX, XM, XX },
1648 },
1649 /* PREGRP21 */
1650 {
1651 { "(bad)", EX, XM, XX },
67d6227d 1652 { "movq2dq", XM, MS, XX },
041bd2e0 1653 { "movq", EX, XM, XX },
67d6227d 1654 { "movdq2q", MX, XS, XX },
041bd2e0
JH		 1655 },
1656 /* PREGRP22 */
1657 {
1658 { "pshufw", MX, EM, Ib },
1659 { "pshufhw", XM, EX, Ib },
1660 { "pshufd", XM, EX, Ib },
1661 { "pshuflw", XM, EX, Ib },
1662 },
1663 /* PREGRP23 */
1664 {
db6eb5be 1665 { "movd", Edq, MX, XX },
67d6227d 1666 { "movq", XM, EX, XX },
db6eb5be 1667 { "movd", Edq, XM, XX },
0f17484f 1668 { "(bad)", Ed, XM, XX },
041bd2e0
JH		 1669 },
1670 /* PREGRP24 */
1671 {
0f17484f
AM		 1672 { "(bad)", MX, EX, XX },
1673 { "(bad)", XM, EX, XX },
041bd2e0 1674 { "punpckhqdq", XM, EX, XX },
0f17484f
AM		 1675 { "(bad)", XM, EX, XX },
1676 },
1677 /* PREGRP25 */
1678 {
9306ca4a
JB		 1679 { "movntq", EM, MX, XX },
1680 { "(bad)", EM, XM, XX },
1681 { "movntdq", EM, XM, XX },
1682 { "(bad)", EM, XM, XX },
0f17484f
AM		 1683 },
1684 /* PREGRP26 */
1685 {
1686 { "(bad)", MX, EX, XX },
1687 { "(bad)", XM, EX, XX },
1688 { "punpcklqdq", XM, EX, XX },
1689 { "(bad)", XM, EX, XX },
041bd2e0 1690 },
ca164297
L		 1691 /* PREGRP27 */
1692 {
1693 { "(bad)", MX, EX, XX },
1694 { "(bad)", XM, EX, XX },
1695 { "addsubpd", XM, EX, XX },
1696 { "addsubps", XM, EX, XX },
1697 },
1698 /* PREGRP28 */
1699 {
1700 { "(bad)", MX, EX, XX },
1701 { "(bad)", XM, EX, XX },
1702 { "haddpd", XM, EX, XX },
1703 { "haddps", XM, EX, XX },
1704 },
1705 /* PREGRP29 */
1706 {
1707 { "(bad)", MX, EX, XX },
1708 { "(bad)", XM, EX, XX },
1709 { "hsubpd", XM, EX, XX },
1710 { "hsubps", XM, EX, XX },
1711 },
1712 /* PREGRP30 */
1713 {
1714 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1715 { "movsldup", XM, EX, XX },
1716 { "movlpd", XM, EX, XX },
1717 { "movddup", XM, EX, XX },
1718 },
1719 /* PREGRP31 */
1720 {
1721 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1722 { "movshdup", XM, EX, XX },
1723 { "movhpd", XM, EX, XX },
1724 { "(bad)", XM, EX, XX },
1725 },
1726 /* PREGRP32 */
1727 {
1728 { "(bad)", XM, EX, XX },
1729 { "(bad)", XM, EX, XX },
1730 { "(bad)", XM, EX, XX },
1731 { "lddqu", XM, M, XX },
1732 },
c608c12e
AM		 1733};
1734
6439fc28
AM		 1735static const struct dis386 x86_64_table[][2] = {
1736 {
1737 { "arpl", Ew, Gw, XX },
1738 { "movs{||lq|xd}", Gv, Ed, XX },
1739 },
1740};
1741
c608c12e
AM		 1742#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1743
252b5132 1744static void
26ca5450 1745ckprefix (void)
252b5132 1746{
52b15da3
JH		 1747 int newrex;
1748 rex = 0;
252b5132 1749 prefixes = 0;
7d421014 1750 used_prefixes = 0;
52b15da3 1751 rex_used = 0;
252b5132
RH		 1752 while (1)
1753 {
1754 FETCH_DATA (the_info, codep + 1);
52b15da3 1755 newrex = 0;
252b5132
RH		 1756 switch (*codep)
1757 {
52b15da3
JH		 1758 /* REX prefixes family. */
1759 case 0x40:
1760 case 0x41:
1761 case 0x42:
1762 case 0x43:
1763 case 0x44:
1764 case 0x45:
1765 case 0x46:
1766 case 0x47:
1767 case 0x48:
1768 case 0x49:
1769 case 0x4a:
1770 case 0x4b:
1771 case 0x4c:
1772 case 0x4d:
1773 case 0x4e:
1774 case 0x4f:
1775 if (mode_64bit)
1776 newrex = *codep;
1777 else
1778 return;
1779 break;
252b5132
RH		 1780 case 0xf3:
1781 prefixes |= PREFIX_REPZ;
1782 break;
1783 case 0xf2:
1784 prefixes |= PREFIX_REPNZ;
1785 break;
1786 case 0xf0:
1787 prefixes |= PREFIX_LOCK;
1788 break;
1789 case 0x2e:
1790 prefixes |= PREFIX_CS;
1791 break;
1792 case 0x36:
1793 prefixes |= PREFIX_SS;
1794 break;
1795 case 0x3e:
1796 prefixes |= PREFIX_DS;
1797 break;
1798 case 0x26:
1799 prefixes |= PREFIX_ES;
1800 break;
1801 case 0x64:
1802 prefixes |= PREFIX_FS;
1803 break;
1804 case 0x65:
1805 prefixes |= PREFIX_GS;
1806 break;
1807 case 0x66:
1808 prefixes |= PREFIX_DATA;
1809 break;
1810 case 0x67:
1811 prefixes |= PREFIX_ADDR;
1812 break;
5076851f 1813 case FWAIT_OPCODE:
252b5132
RH		 1814 /* fwait is really an instruction. If there are prefixes
1815 before the fwait, they belong to the fwait, *not* to the
1816 following instruction. */
1817 if (prefixes)
1818 {
1819 prefixes |= PREFIX_FWAIT;
1820 codep++;
1821 return;
1822 }
1823 prefixes = PREFIX_FWAIT;
1824 break;
1825 default:
1826 return;
1827 }
52b15da3
JH		 1828 /* Rex is ignored when followed by another prefix. */
1829 if (rex)
1830 {
1831 oappend (prefix_name (rex, 0));
1832 oappend (" ");
1833 }
1834 rex = newrex;
252b5132
RH		 1835 codep++;
1836 }
1837}
1838
7d421014
ILT		 1839/* Return the name of the prefix byte PREF, or NULL if PREF is not a
1840 prefix byte. */
1841
1842static const char *
26ca5450 1843prefix_name (int pref, int sizeflag)
7d421014
ILT		 1844{
1845 switch (pref)
1846 {
52b15da3
JH		 1847 /* REX prefixes family. */
1848 case 0x40:
1849 return "rex";
1850 case 0x41:
1851 return "rexZ";
1852 case 0x42:
1853 return "rexY";
1854 case 0x43:
1855 return "rexYZ";
1856 case 0x44:
1857 return "rexX";
1858 case 0x45:
1859 return "rexXZ";
1860 case 0x46:
1861 return "rexXY";
1862 case 0x47:
1863 return "rexXYZ";
1864 case 0x48:
1865 return "rex64";
1866 case 0x49:
1867 return "rex64Z";
1868 case 0x4a:
1869 return "rex64Y";
1870 case 0x4b:
1871 return "rex64YZ";
1872 case 0x4c:
1873 return "rex64X";
1874 case 0x4d:
1875 return "rex64XZ";
1876 case 0x4e:
1877 return "rex64XY";
1878 case 0x4f:
1879 return "rex64XYZ";
7d421014
ILT		 1880 case 0xf3:
1881 return "repz";
1882 case 0xf2:
1883 return "repnz";
1884 case 0xf0:
1885 return "lock";
1886 case 0x2e:
1887 return "cs";
1888 case 0x36:
1889 return "ss";
1890 case 0x3e:
1891 return "ds";
1892 case 0x26:
1893 return "es";
1894 case 0x64:
1895 return "fs";
1896 case 0x65:
1897 return "gs";
1898 case 0x66:
1899 return (sizeflag & DFLAG) ? "data16" : "data32";
1900 case 0x67:
c1a64871 1901 if (mode_64bit)
db6eb5be 1902 return (sizeflag & AFLAG) ? "addr32" : "addr64";
c1a64871 1903 else
2888cb7a 1904 return (sizeflag & AFLAG) ? "addr16" : "addr32";
7d421014
ILT		 1905 case FWAIT_OPCODE:
1906 return "fwait";
1907 default:
1908 return NULL;
1909 }
1910}
1911
252b5132
RH		 1912static char op1out[100], op2out[100], op3out[100];
1913static int op_ad, op_index[3];
1d9f512f 1914static int two_source_ops;
7081ff04
AJ		 1915static bfd_vma op_address[3];
1916static bfd_vma op_riprel[3];
52b15da3 1917static bfd_vma start_pc;
252b5132
RH		 1918\f
1919/*
1920 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1921 * (see topic "Redundant prefixes" in the "Differences from 8086"
1922 * section of the "Virtual 8086 Mode" chapter.)
1923 * 'pc' should be the address of this instruction, it will
1924 * be used to print the target address if this is a relative jump or call
1925 * The function returns the length of this instruction in bytes.
1926 */
1927
252b5132
RH		 1928static char intel_syntax;
1929static char open_char;
1930static char close_char;
1931static char separator_char;
1932static char scale_char;
1933
e396998b
AM		 1934/* Here for backwards compatibility. When gdb stops using
1935 print_insn_i386_att and print_insn_i386_intel these functions can
1936 disappear, and print_insn_i386 be merged into print_insn. */
252b5132 1937int
26ca5450 1938print_insn_i386_att (bfd_vma pc, disassemble_info *info)
252b5132
RH		 1939{
1940 intel_syntax = 0;
e396998b
AM		 1941
1942 return print_insn (pc, info);
252b5132
RH		 1943}
1944
1945int
26ca5450 1946print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
252b5132
RH		 1947{
1948 intel_syntax = 1;
e396998b
AM		 1949
1950 return print_insn (pc, info);
252b5132
RH		 1951}
1952
e396998b 1953int
26ca5450 1954print_insn_i386 (bfd_vma pc, disassemble_info *info)
e396998b
AM		 1955{
1956 intel_syntax = -1;
1957
1958 return print_insn (pc, info);
1959}
1960
1961static int
26ca5450 1962print_insn (bfd_vma pc, disassemble_info *info)
252b5132 1963{
2da11e11 1964 const struct dis386 *dp;
252b5132 1965 int i;
252b5132
RH		 1966 char *first, *second, *third;
1967 int needcomma;
c4a530c5 1968 unsigned char uses_SSE_prefix, uses_LOCK_prefix;
e396998b
AM		 1969 int sizeflag;
1970 const char *p;
252b5132 1971 struct dis_private priv;
252b5132 1972
52b15da3
JH		 1973 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
1974 || info->mach == bfd_mach_x86_64);
1975
8373f971 1976 if (intel_syntax == (char) -1)
e396998b
AM		 1977 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
1978 || info->mach == bfd_mach_x86_64_intel_syntax);
1979
2da11e11 1980 if (info->mach == bfd_mach_i386_i386
52b15da3
JH		 1981 || info->mach == bfd_mach_x86_64
1982 || info->mach == bfd_mach_i386_i386_intel_syntax
1983 || info->mach == bfd_mach_x86_64_intel_syntax)
e396998b 1984 priv.orig_sizeflag = AFLAG | DFLAG;
2da11e11 1985 else if (info->mach == bfd_mach_i386_i8086)
e396998b 1986 priv.orig_sizeflag = 0;
2da11e11
AM		 1987 else
1988 abort ();
e396998b
AM		 1989
1990 for (p = info->disassembler_options; p != NULL; )
1991 {
fa405d97 1992 if (strncmp (p, "x86-64", 6) == 0)
e396998b
AM		 1993 {
1994 mode_64bit = 1;
1995 priv.orig_sizeflag = AFLAG | DFLAG;
1996 }
1997 else if (strncmp (p, "i386", 4) == 0)
1998 {
1999 mode_64bit = 0;
2000 priv.orig_sizeflag = AFLAG | DFLAG;
2001 }
2002 else if (strncmp (p, "i8086", 5) == 0)
2003 {
2004 mode_64bit = 0;
2005 priv.orig_sizeflag = 0;
2006 }
2007 else if (strncmp (p, "intel", 5) == 0)
2008 {
2009 intel_syntax = 1;
2010 }
2011 else if (strncmp (p, "att", 3) == 0)
2012 {
2013 intel_syntax = 0;
2014 }
2015 else if (strncmp (p, "addr", 4) == 0)
2016 {
2017 if (p[4] == '1' && p[5] == '6')
2018 priv.orig_sizeflag &= ~AFLAG;
2019 else if (p[4] == '3' && p[5] == '2')
2020 priv.orig_sizeflag |= AFLAG;
2021 }
2022 else if (strncmp (p, "data", 4) == 0)
2023 {
2024 if (p[4] == '1' && p[5] == '6')
2025 priv.orig_sizeflag &= ~DFLAG;
2026 else if (p[4] == '3' && p[5] == '2')
2027 priv.orig_sizeflag |= DFLAG;
2028 }
2029 else if (strncmp (p, "suffix", 6) == 0)
2030 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2031
2032 p = strchr (p, ',');
2033 if (p != NULL)
2034 p++;
2035 }
2036
2037 if (intel_syntax)
2038 {
2039 names64 = intel_names64;
2040 names32 = intel_names32;
2041 names16 = intel_names16;
2042 names8 = intel_names8;
2043 names8rex = intel_names8rex;
2044 names_seg = intel_names_seg;
2045 index16 = intel_index16;
2046 open_char = '[';
2047 close_char = ']';
2048 separator_char = '+';
2049 scale_char = '*';
2050 }
2051 else
2052 {
2053 names64 = att_names64;
2054 names32 = att_names32;
2055 names16 = att_names16;
2056 names8 = att_names8;
2057 names8rex = att_names8rex;
2058 names_seg = att_names_seg;
2059 index16 = att_index16;
2060 open_char = '(';
2061 close_char = ')';
2062 separator_char = ',';
2063 scale_char = ',';
2064 }
2da11e11 2065
4fe53c98 2066 /* The output looks better if we put 7 bytes on a line, since that
c608c12e 2067 puts most long word instructions on a single line. */
4fe53c98 2068 info->bytes_per_line = 7;
252b5132 2069
26ca5450 2070 info->private_data = &priv;
252b5132
RH		 2071 priv.max_fetched = priv.the_buffer;
2072 priv.insn_start = pc;
252b5132
RH		 2073
2074 obuf[0] = 0;
2075 op1out[0] = 0;
2076 op2out[0] = 0;
2077 op3out[0] = 0;
2078
2079 op_index[0] = op_index[1] = op_index[2] = -1;
2080
2081 the_info = info;
2082 start_pc = pc;
e396998b
AM		 2083 start_codep = priv.the_buffer;
2084 codep = priv.the_buffer;
252b5132 2085
5076851f
ILT		 2086 if (setjmp (priv.bailout) != 0)
2087 {
7d421014
ILT		 2088 const char *name;
2089
5076851f 2090 /* Getting here means we tried for data but didn't get it. That
e396998b
AM		 2091 means we have an incomplete instruction of some sort. Just
2092 print the first byte as a prefix or a .byte pseudo-op. */
2093 if (codep > priv.the_buffer)
5076851f 2094 {
e396998b 2095 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2096 if (name != NULL)
2097 (*info->fprintf_func) (info->stream, "%s", name);
2098 else
5076851f 2099 {
7d421014
ILT		 2100 /* Just print the first byte as a .byte instruction. */
2101 (*info->fprintf_func) (info->stream, ".byte 0x%x",
e396998b 2102 (unsigned int) priv.the_buffer[0]);
5076851f 2103 }
5076851f 2104
7d421014 2105 return 1;
5076851f
ILT		 2106 }
2107
2108 return -1;
2109 }
2110
52b15da3 2111 obufp = obuf;
252b5132
RH		 2112 ckprefix ();
2113
2114 insn_codep = codep;
e396998b 2115 sizeflag = priv.orig_sizeflag;
252b5132
RH		 2116
2117 FETCH_DATA (info, codep + 1);
2118 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2119
252b5132
RH		 2120 if ((prefixes & PREFIX_FWAIT)
2121 && ((*codep < 0xd8) || (*codep > 0xdf)))
2122 {
7d421014
ILT		 2123 const char *name;
2124
2125 /* fwait not followed by floating point instruction. Print the
db6eb5be 2126 first prefix, which is probably fwait itself. */
e396998b 2127 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2128 if (name == NULL)
2129 name = INTERNAL_DISASSEMBLER_ERROR;
2130 (*info->fprintf_func) (info->stream, "%s", name);
2131 return 1;
252b5132
RH		 2132 }
2133
252b5132
RH		 2134 if (*codep == 0x0f)
2135 {
2136 FETCH_DATA (info, codep + 2);
6439fc28 2137 dp = &dis386_twobyte[*++codep];
252b5132 2138 need_modrm = twobyte_has_modrm[*codep];
041bd2e0 2139 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
c4a530c5 2140 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
252b5132
RH		 2141 }
2142 else
2143 {
6439fc28 2144 dp = &dis386[*codep];
252b5132 2145 need_modrm = onebyte_has_modrm[*codep];
041bd2e0 2146 uses_SSE_prefix = 0;
c4a530c5 2147 uses_LOCK_prefix = 0;
252b5132
RH		 2148 }
2149 codep++;
2150
041bd2e0 2151 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
7d421014
ILT		 2152 {
2153 oappend ("repz ");
2154 used_prefixes |= PREFIX_REPZ;
2155 }
041bd2e0 2156 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
7d421014
ILT		 2157 {
2158 oappend ("repnz ");
2159 used_prefixes |= PREFIX_REPNZ;
2160 }
c4a530c5 2161 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
7d421014
ILT		 2162 {
2163 oappend ("lock ");
2164 used_prefixes |= PREFIX_LOCK;
2165 }
c608c12e 2166
c608c12e
AM		 2167 if (prefixes & PREFIX_ADDR)
2168 {
2169 sizeflag ^= AFLAG;
6439fc28 2170 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
3ffd33cf 2171 {
c1a64871 2172 if ((sizeflag & AFLAG) || mode_64bit)
3ffd33cf
AM		 2173 oappend ("addr32 ");
2174 else
2175 oappend ("addr16 ");
2176 used_prefixes |= PREFIX_ADDR;
2177 }
2178 }
2179
2180 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2181 {
2182 sizeflag ^= DFLAG;
6439fc28
AM		 2183 if (dp->bytemode3 == cond_jump_mode
2184 && dp->bytemode1 == v_mode
2185 && !intel_syntax)
3ffd33cf
AM		 2186 {
2187 if (sizeflag & DFLAG)
2188 oappend ("data32 ");
2189 else
2190 oappend ("data16 ");
2191 used_prefixes |= PREFIX_DATA;
2192 }
2193 }
2194
252b5132
RH		 2195 if (need_modrm)
2196 {
2197 FETCH_DATA (info, codep + 1);
2198 mod = (*codep >> 6) & 3;
2199 reg = (*codep >> 3) & 7;
2200 rm = *codep & 7;
2201 }
2202
2203 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2204 {
2205 dofloat (sizeflag);
2206 }
2207 else
2208 {
041bd2e0 2209 int index;
252b5132 2210 if (dp->name == NULL)
c608c12e 2211 {
6439fc28 2212 switch (dp->bytemode1)
c608c12e 2213 {
6439fc28
AM		 2214 case USE_GROUPS:
2215 dp = &grps[dp->bytemode2][reg];
2216 break;
2217
2218 case USE_PREFIX_USER_TABLE:
2219 index = 0;
2220 used_prefixes |= (prefixes & PREFIX_REPZ);
2221 if (prefixes & PREFIX_REPZ)
2222 index = 1;
2223 else
2224 {
2225 used_prefixes |= (prefixes & PREFIX_DATA);
2226 if (prefixes & PREFIX_DATA)
2227 index = 2;
2228 else
2229 {
2230 used_prefixes |= (prefixes & PREFIX_REPNZ);
2231 if (prefixes & PREFIX_REPNZ)
2232 index = 3;
2233 }
2234 }
2235 dp = &prefix_user_table[dp->bytemode2][index];
2236 break;
252b5132 2237
6439fc28
AM		 2238 case X86_64_SPECIAL:
2239 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2240 break;
252b5132 2241
6439fc28
AM		 2242 default:
2243 oappend (INTERNAL_DISASSEMBLER_ERROR);
2244 break;
2245 }
2246 }
252b5132 2247
6439fc28
AM		 2248 if (putop (dp->name, sizeflag) == 0)
2249 {
2250 obufp = op1out;
2251 op_ad = 2;
2252 if (dp->op1)
6608db57 2253 (*dp->op1) (dp->bytemode1, sizeflag);
6439fc28
AM		 2254
2255 obufp = op2out;
2256 op_ad = 1;
2257 if (dp->op2)
6608db57 2258 (*dp->op2) (dp->bytemode2, sizeflag);
6439fc28
AM		 2259
2260 obufp = op3out;
2261 op_ad = 0;
2262 if (dp->op3)
6608db57 2263 (*dp->op3) (dp->bytemode3, sizeflag);
6439fc28 2264 }
252b5132
RH		 2265 }
2266
7d421014
ILT		 2267 /* See if any prefixes were not used. If so, print the first one
2268 separately. If we don't do this, we'll wind up printing an
2269 instruction stream which does not precisely correspond to the
2270 bytes we are disassembling. */
2271 if ((prefixes & ~used_prefixes) != 0)
2272 {
2273 const char *name;
2274
e396998b 2275 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2276 if (name == NULL)
2277 name = INTERNAL_DISASSEMBLER_ERROR;
2278 (*info->fprintf_func) (info->stream, "%s", name);
2279 return 1;
2280 }
52b15da3
JH		 2281 if (rex & ~rex_used)
2282 {
2283 const char *name;
e396998b 2284 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
52b15da3
JH		 2285 if (name == NULL)
2286 name = INTERNAL_DISASSEMBLER_ERROR;
2287 (*info->fprintf_func) (info->stream, "%s ", name);
2288 }
7d421014 2289
252b5132
RH		 2290 obufp = obuf + strlen (obuf);
2291 for (i = strlen (obuf); i < 6; i++)
2292 oappend (" ");
2293 oappend (" ");
2294 (*info->fprintf_func) (info->stream, "%s", obuf);
2295
2296 /* The enter and bound instructions are printed with operands in the same
2297 order as the intel book; everything else is printed in reverse order. */
2da11e11 2298 if (intel_syntax || two_source_ops)
252b5132
RH		 2299 {
2300 first = op1out;
2301 second = op2out;
2302 third = op3out;
2303 op_ad = op_index[0];
2304 op_index[0] = op_index[2];
2305 op_index[2] = op_ad;
2306 }
2307 else
2308 {
2309 first = op3out;
2310 second = op2out;
2311 third = op1out;
2312 }
2313 needcomma = 0;
2314 if (*first)
2315 {
52b15da3 2316 if (op_index[0] != -1 && !op_riprel[0])
252b5132
RH		 2317 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2318 else
2319 (*info->fprintf_func) (info->stream, "%s", first);
2320 needcomma = 1;
2321 }
2322 if (*second)
2323 {
2324 if (needcomma)
2325 (*info->fprintf_func) (info->stream, ",");
52b15da3 2326 if (op_index[1] != -1 && !op_riprel[1])
252b5132
RH		 2327 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2328 else
2329 (*info->fprintf_func) (info->stream, "%s", second);
2330 needcomma = 1;
2331 }
2332 if (*third)
2333 {
2334 if (needcomma)
2335 (*info->fprintf_func) (info->stream, ",");
52b15da3 2336 if (op_index[2] != -1 && !op_riprel[2])
252b5132
RH		 2337 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2338 else
2339 (*info->fprintf_func) (info->stream, "%s", third);
2340 }
52b15da3
JH		 2341 for (i = 0; i < 3; i++)
2342 if (op_index[i] != -1 && op_riprel[i])
2343 {
2344 (*info->fprintf_func) (info->stream, " # ");
2345 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2346 + op_address[op_index[i]]), info);
2347 }
e396998b 2348 return codep - priv.the_buffer;
252b5132
RH		 2349}
2350
6439fc28 2351static const char *float_mem[] = {
252b5132 2352 /* d8 */
6439fc28
AM		 2353 "fadd{s||s|}",
2354 "fmul{s||s|}",
2355 "fcom{s||s|}",
2356 "fcomp{s||s|}",
2357 "fsub{s||s|}",
2358 "fsubr{s||s|}",
2359 "fdiv{s||s|}",
2360 "fdivr{s||s|}",
db6eb5be 2361 /* d9 */
6439fc28 2362 "fld{s||s|}",
252b5132 2363 "(bad)",
6439fc28
AM		 2364 "fst{s||s|}",
2365 "fstp{s||s|}",
9306ca4a 2366 "fldenvIC",
252b5132 2367 "fldcw",
9306ca4a 2368 "fNstenvIC",
252b5132
RH		 2369 "fNstcw",
2370 /* da */
6439fc28
AM		 2371 "fiadd{l||l|}",
2372 "fimul{l||l|}",
2373 "ficom{l||l|}",
2374 "ficomp{l||l|}",
2375 "fisub{l||l|}",
2376 "fisubr{l||l|}",
2377 "fidiv{l||l|}",
2378 "fidivr{l||l|}",
252b5132 2379 /* db */
6439fc28 2380 "fild{l||l|}",
ca164297 2381 "fisttp{l||l|}",
6439fc28
AM		 2382 "fist{l||l|}",
2383 "fistp{l||l|}",
252b5132 2384 "(bad)",
6439fc28 2385 "fld{t||t|}",
252b5132 2386 "(bad)",
6439fc28 2387 "fstp{t||t|}",
252b5132 2388 /* dc */
6439fc28
AM		 2389 "fadd{l||l|}",
2390 "fmul{l||l|}",
2391 "fcom{l||l|}",
2392 "fcomp{l||l|}",
2393 "fsub{l||l|}",
2394 "fsubr{l||l|}",
2395 "fdiv{l||l|}",
2396 "fdivr{l||l|}",
252b5132 2397 /* dd */
6439fc28 2398 "fld{l||l|}",
1d9f512f 2399 "fisttp{ll||ll|}",
6439fc28
AM		 2400 "fst{l||l|}",
2401 "fstp{l||l|}",
9306ca4a 2402 "frstorIC",
252b5132 2403 "(bad)",
9306ca4a 2404 "fNsaveIC",
252b5132
RH		 2405 "fNstsw",
2406 /* de */
2407 "fiadd",
2408 "fimul",
2409 "ficom",
2410 "ficomp",
2411 "fisub",
2412 "fisubr",
2413 "fidiv",
2414 "fidivr",
2415 /* df */
2416 "fild",
ca164297 2417 "fisttp",
252b5132
RH		 2418 "fist",
2419 "fistp",
2420 "fbld",
6439fc28 2421 "fild{ll||ll|}",
252b5132 2422 "fbstp",
1d9f512f
AM		 2423 "fistp{ll||ll|}",
2424};
2425
2426static const unsigned char float_mem_mode[] = {
2427 /* d8 */
2428 d_mode,
2429 d_mode,
2430 d_mode,
2431 d_mode,
2432 d_mode,
2433 d_mode,
2434 d_mode,
2435 d_mode,
2436 /* d9 */
2437 d_mode,
2438 0,
2439 d_mode,
2440 d_mode,
2441 0,
2442 w_mode,
2443 0,
2444 w_mode,
2445 /* da */
2446 d_mode,
2447 d_mode,
2448 d_mode,
2449 d_mode,
2450 d_mode,
2451 d_mode,
2452 d_mode,
2453 d_mode,
2454 /* db */
2455 d_mode,
2456 d_mode,
2457 d_mode,
2458 d_mode,
2459 0,
9306ca4a 2460 t_mode,
1d9f512f 2461 0,
9306ca4a 2462 t_mode,
1d9f512f
AM		 2463 /* dc */
2464 q_mode,
2465 q_mode,
2466 q_mode,
2467 q_mode,
2468 q_mode,
2469 q_mode,
2470 q_mode,
2471 q_mode,
2472 /* dd */
2473 q_mode,
2474 q_mode,
2475 q_mode,
2476 q_mode,
2477 0,
2478 0,
2479 0,
2480 w_mode,
2481 /* de */
2482 w_mode,
2483 w_mode,
2484 w_mode,
2485 w_mode,
2486 w_mode,
2487 w_mode,
2488 w_mode,
2489 w_mode,
2490 /* df */
2491 w_mode,
2492 w_mode,
2493 w_mode,
2494 w_mode,
9306ca4a 2495 t_mode,
1d9f512f 2496 q_mode,
9306ca4a 2497 t_mode,
1d9f512f 2498 q_mode
252b5132
RH		 2499};
2500
2501#define ST OP_ST, 0
2502#define STi OP_STi, 0
2503
57d91c3c
ILT		 2504#define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2505#define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2506#define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2507#define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2508#define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2509#define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2510#define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2511#define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2512#define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
252b5132 2513
2da11e11 2514static const struct dis386 float_reg[][8] = {
252b5132
RH		 2515 /* d8 */
2516 {
57d91c3c
ILT		 2517 { "fadd", ST, STi, XX },
2518 { "fmul", ST, STi, XX },
2519 { "fcom", STi, XX, XX },
2520 { "fcomp", STi, XX, XX },
2521 { "fsub", ST, STi, XX },
2522 { "fsubr", ST, STi, XX },
2523 { "fdiv", ST, STi, XX },
2524 { "fdivr", ST, STi, XX },
252b5132
RH		 2525 },
2526 /* d9 */
2527 {
57d91c3c
ILT		 2528 { "fld", STi, XX, XX },
2529 { "fxch", STi, XX, XX },
252b5132 2530 { FGRPd9_2 },
57d91c3c 2531 { "(bad)", XX, XX, XX },
252b5132
RH		 2532 { FGRPd9_4 },
2533 { FGRPd9_5 },
2534 { FGRPd9_6 },
2535 { FGRPd9_7 },
2536 },
2537 /* da */
2538 {
57d91c3c
ILT		 2539 { "fcmovb", ST, STi, XX },
2540 { "fcmove", ST, STi, XX },
2541 { "fcmovbe",ST, STi, XX },
2542 { "fcmovu", ST, STi, XX },
2543 { "(bad)", XX, XX, XX },
252b5132 2544 { FGRPda_5 },
57d91c3c
ILT		 2545 { "(bad)", XX, XX, XX },
2546 { "(bad)", XX, XX, XX },
252b5132
RH		 2547 },
2548 /* db */
2549 {
57d91c3c
ILT		 2550 { "fcmovnb",ST, STi, XX },
2551 { "fcmovne",ST, STi, XX },
2552 { "fcmovnbe",ST, STi, XX },
2553 { "fcmovnu",ST, STi, XX },
252b5132 2554 { FGRPdb_4 },
57d91c3c
ILT		 2555 { "fucomi", ST, STi, XX },
2556 { "fcomi", ST, STi, XX },
2557 { "(bad)", XX, XX, XX },
252b5132
RH		 2558 },
2559 /* dc */
2560 {
57d91c3c
ILT		 2561 { "fadd", STi, ST, XX },
2562 { "fmul", STi, ST, XX },
2563 { "(bad)", XX, XX, XX },
2564 { "(bad)", XX, XX, XX },
252b5132 2565#if UNIXWARE_COMPAT
57d91c3c
ILT		 2566 { "fsub", STi, ST, XX },
2567 { "fsubr", STi, ST, XX },
2568 { "fdiv", STi, ST, XX },
2569 { "fdivr", STi, ST, XX },
252b5132 2570#else
57d91c3c
ILT		 2571 { "fsubr", STi, ST, XX },
2572 { "fsub", STi, ST, XX },
2573 { "fdivr", STi, ST, XX },
2574 { "fdiv", STi, ST, XX },
252b5132
RH		 2575#endif
2576 },
2577 /* dd */
2578 {
57d91c3c
ILT		 2579 { "ffree", STi, XX, XX },
2580 { "(bad)", XX, XX, XX },
2581 { "fst", STi, XX, XX },
2582 { "fstp", STi, XX, XX },
2583 { "fucom", STi, XX, XX },
2584 { "fucomp", STi, XX, XX },
2585 { "(bad)", XX, XX, XX },
2586 { "(bad)", XX, XX, XX },
252b5132
RH		 2587 },
2588 /* de */
2589 {
57d91c3c
ILT		 2590 { "faddp", STi, ST, XX },
2591 { "fmulp", STi, ST, XX },
2592 { "(bad)", XX, XX, XX },
252b5132
RH		 2593 { FGRPde_3 },
2594#if UNIXWARE_COMPAT
57d91c3c
ILT		 2595 { "fsubp", STi, ST, XX },
2596 { "fsubrp", STi, ST, XX },
2597 { "fdivp", STi, ST, XX },
2598 { "fdivrp", STi, ST, XX },
252b5132 2599#else
57d91c3c
ILT		 2600 { "fsubrp", STi, ST, XX },
2601 { "fsubp", STi, ST, XX },
2602 { "fdivrp", STi, ST, XX },
2603 { "fdivp", STi, ST, XX },
252b5132
RH		 2604#endif
2605 },
2606 /* df */
2607 {
c2419411 2608 { "ffreep", STi, XX, XX },
57d91c3c
ILT		 2609 { "(bad)", XX, XX, XX },
2610 { "(bad)", XX, XX, XX },
2611 { "(bad)", XX, XX, XX },
252b5132 2612 { FGRPdf_4 },
57d91c3c
ILT		 2613 { "fucomip",ST, STi, XX },
2614 { "fcomip", ST, STi, XX },
2615 { "(bad)", XX, XX, XX },
252b5132
RH		 2616 },
2617};
2618
252b5132
RH		 2619static char *fgrps[][8] = {
2620 /* d9_2 0 */
2621 {
2622 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2623 },
2624
2625 /* d9_4 1 */
2626 {
2627 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2628 },
2629
2630 /* d9_5 2 */
2631 {
2632 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2633 },
2634
2635 /* d9_6 3 */
2636 {
2637 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2638 },
2639
2640 /* d9_7 4 */
2641 {
2642 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2643 },
2644
2645 /* da_5 5 */
2646 {
2647 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2648 },
2649
2650 /* db_4 6 */
2651 {
2652 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2653 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2654 },
2655
2656 /* de_3 7 */
2657 {
2658 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2659 },
2660
2661 /* df_4 8 */
2662 {
2663 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2664 },
2665};
2666
2667static void
26ca5450 2668dofloat (int sizeflag)
252b5132 2669{
2da11e11 2670 const struct dis386 *dp;
252b5132
RH		 2671 unsigned char floatop;
2672
2673 floatop = codep[-1];
2674
2675 if (mod != 3)
2676 {
1d9f512f
AM		 2677 int fp_indx = (floatop - 0xd8) * 8 + reg;
2678
2679 putop (float_mem[fp_indx], sizeflag);
252b5132 2680 obufp = op1out;
1d9f512f 2681 OP_E (float_mem_mode[fp_indx], sizeflag);
252b5132
RH		 2682 return;
2683 }
6608db57 2684 /* Skip mod/rm byte. */
4bba6815 2685 MODRM_CHECK;
252b5132
RH		 2686 codep++;
2687
2688 dp = &float_reg[floatop - 0xd8][reg];
2689 if (dp->name == NULL)
2690 {
2691 putop (fgrps[dp->bytemode1][rm], sizeflag);
2692
6608db57 2693 /* Instruction fnstsw is only one with strange arg. */
252b5132
RH		 2694 if (floatop == 0xdf && codep[-1] == 0xe0)
2695 strcpy (op1out, names16[0]);
2696 }
2697 else
2698 {
2699 putop (dp->name, sizeflag);
2700
2701 obufp = op1out;
2702 if (dp->op1)
6608db57 2703 (*dp->op1) (dp->bytemode1, sizeflag);
252b5132
RH		 2704 obufp = op2out;
2705 if (dp->op2)
6608db57 2706 (*dp->op2) (dp->bytemode2, sizeflag);
252b5132
RH		 2707 }
2708}
2709
252b5132 2710static void
26ca5450 2711OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 2712{
2713 oappend ("%st");
2714}
2715
252b5132 2716static void
26ca5450 2717OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 2718{
2719 sprintf (scratchbuf, "%%st(%d)", rm);
d708bcba 2720 oappend (scratchbuf + intel_syntax);
252b5132
RH		 2721}
2722
6608db57 2723/* Capital letters in template are macros. */
6439fc28 2724static int
26ca5450 2725putop (const char *template, int sizeflag)
252b5132 2726{
2da11e11 2727 const char *p;
9306ca4a 2728 int alt = 0;
252b5132
RH		 2729
2730 for (p = template; *p; p++)
2731 {
2732 switch (*p)
2733 {
2734 default:
2735 *obufp++ = *p;
2736 break;
6439fc28
AM		 2737 case '{':
2738 alt = 0;
2739 if (intel_syntax)
2740 alt += 1;
2741 if (mode_64bit)
2742 alt += 2;
2743 while (alt != 0)
2744 {
2745 while (*++p != '|')
2746 {
2747 if (*p == '}')
2748 {
2749 /* Alternative not valid. */
2750 strcpy (obuf, "(bad)");
2751 obufp = obuf + 5;
2752 return 1;
2753 }
2754 else if (*p == '\0')
2755 abort ();
2756 }
2757 alt--;
2758 }
9306ca4a
JB		 2759 /* Fall through. */
2760 case 'I':
2761 alt = 1;
2762 continue;
6439fc28
AM		 2763 case '|':
2764 while (*++p != '}')
2765 {
2766 if (*p == '\0')
2767 abort ();
2768 }
2769 break;
2770 case '}':
2771 break;
252b5132 2772 case 'A':
db6eb5be
AM		 2773 if (intel_syntax)
2774 break;
e396998b 2775 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132
RH		 2776 *obufp++ = 'b';
2777 break;
2778 case 'B':
db6eb5be
AM		 2779 if (intel_syntax)
2780 break;
252b5132
RH		 2781 if (sizeflag & SUFFIX_ALWAYS)
2782 *obufp++ = 'b';
252b5132 2783 break;
9306ca4a
JB		 2784 case 'C':
2785 if (intel_syntax && !alt)
2786 break;
2787 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
2788 {
2789 if (sizeflag & DFLAG)
2790 *obufp++ = intel_syntax ? 'd' : 'l';
2791 else
2792 *obufp++ = intel_syntax ? 'w' : 's';
2793 used_prefixes |= (prefixes & PREFIX_DATA);
2794 }
2795 break;
252b5132 2796 case 'E': /* For jcxz/jecxz */
c1a64871
JH		 2797 if (mode_64bit)
2798 {
2799 if (sizeflag & AFLAG)
2800 *obufp++ = 'r';
2801 else
2802 *obufp++ = 'e';
2803 }
2804 else
2805 if (sizeflag & AFLAG)
2806 *obufp++ = 'e';
3ffd33cf
AM		 2807 used_prefixes |= (prefixes & PREFIX_ADDR);
2808 break;
2809 case 'F':
db6eb5be
AM		 2810 if (intel_syntax)
2811 break;
e396998b 2812 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
3ffd33cf
AM		 2813 {
2814 if (sizeflag & AFLAG)
c1a64871 2815 *obufp++ = mode_64bit ? 'q' : 'l';
3ffd33cf 2816 else
c1a64871 2817 *obufp++ = mode_64bit ? 'l' : 'w';
3ffd33cf
AM		 2818 used_prefixes |= (prefixes & PREFIX_ADDR);
2819 }
252b5132 2820 break;
5dd0794d 2821 case 'H':
db6eb5be
AM		 2822 if (intel_syntax)
2823 break;
5dd0794d
AM		 2824 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2825 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2826 {
2827 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2828 *obufp++ = ',';
2829 *obufp++ = 'p';
2830 if (prefixes & PREFIX_DS)
2831 *obufp++ = 't';
2832 else
2833 *obufp++ = 'n';
2834 }
2835 break;
9306ca4a
JB		 2836 case 'J':
2837 if (intel_syntax)
2838 break;
2839 *obufp++ = 'l';
2840 break;
252b5132 2841 case 'L':
db6eb5be
AM		 2842 if (intel_syntax)
2843 break;
252b5132
RH		 2844 if (sizeflag & SUFFIX_ALWAYS)
2845 *obufp++ = 'l';
252b5132
RH		 2846 break;
2847 case 'N':
2848 if ((prefixes & PREFIX_FWAIT) == 0)
2849 *obufp++ = 'n';
7d421014
ILT		 2850 else
2851 used_prefixes |= PREFIX_FWAIT;
252b5132 2852 break;
52b15da3
JH		 2853 case 'O':
2854 USED_REX (REX_MODE64);
2855 if (rex & REX_MODE64)
6439fc28 2856 *obufp++ = 'o';
52b15da3
JH		 2857 else
2858 *obufp++ = 'd';
2859 break;
6439fc28 2860 case 'T':
db6eb5be
AM		 2861 if (intel_syntax)
2862 break;
6439fc28
AM		 2863 if (mode_64bit)
2864 {
2865 *obufp++ = 'q';
2866 break;
2867 }
6608db57 2868 /* Fall through. */
252b5132 2869 case 'P':
db6eb5be
AM		 2870 if (intel_syntax)
2871 break;
252b5132 2872 if ((prefixes & PREFIX_DATA)
52b15da3 2873 || (rex & REX_MODE64)
e396998b 2874 || (sizeflag & SUFFIX_ALWAYS))
252b5132 2875 {
52b15da3
JH		 2876 USED_REX (REX_MODE64);
2877 if (rex & REX_MODE64)
2878 *obufp++ = 'q';
c2419411 2879 else
52b15da3
JH		 2880 {
2881 if (sizeflag & DFLAG)
2882 *obufp++ = 'l';
2883 else
2884 *obufp++ = 'w';
2885 used_prefixes |= (prefixes & PREFIX_DATA);
2886 }
252b5132
RH		 2887 }
2888 break;
6439fc28 2889 case 'U':
db6eb5be
AM		 2890 if (intel_syntax)
2891 break;
6439fc28
AM		 2892 if (mode_64bit)
2893 {
2894 *obufp++ = 'q';
2895 break;
2896 }
6608db57 2897 /* Fall through. */
252b5132 2898 case 'Q':
9306ca4a 2899 if (intel_syntax && !alt)
db6eb5be 2900 break;
90530880 2901 USED_REX (REX_MODE64);
e396998b 2902 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132 2903 {
52b15da3
JH		 2904 if (rex & REX_MODE64)
2905 *obufp++ = 'q';
252b5132 2906 else
52b15da3
JH		 2907 {
2908 if (sizeflag & DFLAG)
9306ca4a 2909 *obufp++ = intel_syntax ? 'd' : 'l';
52b15da3
JH		 2910 else
2911 *obufp++ = 'w';
2912 used_prefixes |= (prefixes & PREFIX_DATA);
2913 }
252b5132
RH		 2914 }
2915 break;
2916 case 'R':
52b15da3 2917 USED_REX (REX_MODE64);
db6eb5be 2918 if (intel_syntax)
c608c12e 2919 {
52b15da3
JH		 2920 if (rex & REX_MODE64)
2921 {
2922 *obufp++ = 'q';
2923 *obufp++ = 't';
2924 }
2925 else if (sizeflag & DFLAG)
c608c12e
AM		 2926 {
2927 *obufp++ = 'd';
2928 *obufp++ = 'q';
2929 }
2930 else
2931 {
2932 *obufp++ = 'w';
2933 *obufp++ = 'd';
2934 }
2935 }
252b5132 2936 else
c608c12e 2937 {
52b15da3
JH		 2938 if (rex & REX_MODE64)
2939 *obufp++ = 'q';
2940 else if (sizeflag & DFLAG)
c608c12e
AM		 2941 *obufp++ = 'l';
2942 else
2943 *obufp++ = 'w';
2944 }
52b15da3
JH		 2945 if (!(rex & REX_MODE64))
2946 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 2947 break;
2948 case 'S':
db6eb5be
AM		 2949 if (intel_syntax)
2950 break;
252b5132
RH		 2951 if (sizeflag & SUFFIX_ALWAYS)
2952 {
52b15da3
JH		 2953 if (rex & REX_MODE64)
2954 *obufp++ = 'q';
252b5132 2955 else
52b15da3
JH		 2956 {
2957 if (sizeflag & DFLAG)
2958 *obufp++ = 'l';
2959 else
2960 *obufp++ = 'w';
2961 used_prefixes |= (prefixes & PREFIX_DATA);
2962 }
252b5132 2963 }
252b5132 2964 break;
041bd2e0
JH		 2965 case 'X':
2966 if (prefixes & PREFIX_DATA)
2967 *obufp++ = 'd';
2968 else
2969 *obufp++ = 's';
db6eb5be 2970 used_prefixes |= (prefixes & PREFIX_DATA);
041bd2e0 2971 break;
76f227a5 2972 case 'Y':
db6eb5be
AM		 2973 if (intel_syntax)
2974 break;
76f227a5
JH		 2975 if (rex & REX_MODE64)
2976 {
2977 USED_REX (REX_MODE64);
2978 *obufp++ = 'q';
2979 }
2980 break;
52b15da3 2981 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
252b5132 2982 case 'W':
252b5132 2983 /* operand size flag for cwtl, cbtw */
52b15da3
JH		 2984 USED_REX (0);
2985 if (rex)
2986 *obufp++ = 'l';
2987 else if (sizeflag & DFLAG)
252b5132
RH		 2988 *obufp++ = 'w';
2989 else
2990 *obufp++ = 'b';
db6eb5be 2991 if (intel_syntax)
c608c12e 2992 {
52b15da3
JH		 2993 if (rex)
2994 {
2995 *obufp++ = 'q';
2996 *obufp++ = 'e';
2997 }
c608c12e
AM		 2998 if (sizeflag & DFLAG)
2999 {
3000 *obufp++ = 'd';
3001 *obufp++ = 'e';
3002 }
3003 else
3004 {
3005 *obufp++ = 'w';
3006 }
3007 }
52b15da3
JH		 3008 if (!rex)
3009 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3010 break;
3011 }
9306ca4a 3012 alt = 0;
252b5132
RH		 3013 }
3014 *obufp = 0;
6439fc28 3015 return 0;
252b5132
RH		 3016}
3017
3018static void
26ca5450 3019oappend (const char *s)
252b5132
RH		 3020{
3021 strcpy (obufp, s);
3022 obufp += strlen (s);
3023}
3024
3025static void
26ca5450 3026append_seg (void)
252b5132
RH		 3027{
3028 if (prefixes & PREFIX_CS)
7d421014 3029 {
7d421014 3030 used_prefixes |= PREFIX_CS;
d708bcba 3031 oappend ("%cs:" + intel_syntax);
7d421014 3032 }
252b5132 3033 if (prefixes & PREFIX_DS)
7d421014 3034 {
7d421014 3035 used_prefixes |= PREFIX_DS;
d708bcba 3036 oappend ("%ds:" + intel_syntax);
7d421014 3037 }
252b5132 3038 if (prefixes & PREFIX_SS)
7d421014 3039 {
7d421014 3040 used_prefixes |= PREFIX_SS;
d708bcba 3041 oappend ("%ss:" + intel_syntax);
7d421014 3042 }
252b5132 3043 if (prefixes & PREFIX_ES)
7d421014 3044 {
7d421014 3045 used_prefixes |= PREFIX_ES;
d708bcba 3046 oappend ("%es:" + intel_syntax);
7d421014 3047 }
252b5132 3048 if (prefixes & PREFIX_FS)
7d421014 3049 {
7d421014 3050 used_prefixes |= PREFIX_FS;
d708bcba 3051 oappend ("%fs:" + intel_syntax);
7d421014 3052 }
252b5132 3053 if (prefixes & PREFIX_GS)
7d421014 3054 {
7d421014 3055 used_prefixes |= PREFIX_GS;
d708bcba 3056 oappend ("%gs:" + intel_syntax);
7d421014 3057 }
252b5132
RH		 3058}
3059
3060static void
26ca5450 3061OP_indirE (int bytemode, int sizeflag)
252b5132
RH		 3062{
3063 if (!intel_syntax)
3064 oappend ("*");
3065 OP_E (bytemode, sizeflag);
3066}
3067
52b15da3 3068static void
26ca5450 3069print_operand_value (char *buf, int hex, bfd_vma disp)
52b15da3
JH		 3070{
3071 if (mode_64bit)
3072 {
3073 if (hex)
3074 {
3075 char tmp[30];
3076 int i;
3077 buf[0] = '0';
3078 buf[1] = 'x';
3079 sprintf_vma (tmp, disp);
6608db57 3080 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
52b15da3
JH		 3081 strcpy (buf + 2, tmp + i);
3082 }
3083 else
3084 {
3085 bfd_signed_vma v = disp;
3086 char tmp[30];
3087 int i;
3088 if (v < 0)
3089 {
3090 *(buf++) = '-';
3091 v = -disp;
6608db57 3092 /* Check for possible overflow on 0x8000000000000000. */
52b15da3
JH		 3093 if (v < 0)
3094 {
3095 strcpy (buf, "9223372036854775808");
3096 return;
3097 }
3098 }
3099 if (!v)
3100 {
3101 strcpy (buf, "0");
3102 return;
3103 }
3104
3105 i = 0;
3106 tmp[29] = 0;
3107 while (v)
3108 {
6608db57 3109 tmp[28 - i] = (v % 10) + '0';
52b15da3
JH		 3110 v /= 10;
3111 i++;
3112 }
3113 strcpy (buf, tmp + 29 - i);
3114 }
3115 }
3116 else
3117 {
3118 if (hex)
3119 sprintf (buf, "0x%x", (unsigned int) disp);
3120 else
3121 sprintf (buf, "%d", (int) disp);
3122 }
3123}
3124
252b5132 3125static void
26ca5450 3126OP_E (int bytemode, int sizeflag)
252b5132 3127{
52b15da3
JH		 3128 bfd_vma disp;
3129 int add = 0;
3130 int riprel = 0;
3131 USED_REX (REX_EXTZ);
3132 if (rex & REX_EXTZ)
3133 add += 8;
252b5132 3134
6608db57 3135 /* Skip mod/rm byte. */
4bba6815 3136 MODRM_CHECK;
252b5132
RH		 3137 codep++;
3138
3139 if (mod == 3)
3140 {
3141 switch (bytemode)
3142 {
3143 case b_mode:
52b15da3
JH		 3144 USED_REX (0);
3145 if (rex)
3146 oappend (names8rex[rm + add]);
3147 else
3148 oappend (names8[rm + add]);
252b5132
RH		 3149 break;
3150 case w_mode:
52b15da3 3151 oappend (names16[rm + add]);
252b5132 3152 break;
2da11e11 3153 case d_mode:
52b15da3
JH		 3154 oappend (names32[rm + add]);
3155 break;
3156 case q_mode:
3157 oappend (names64[rm + add]);
3158 break;
3159 case m_mode:
3160 if (mode_64bit)
3161 oappend (names64[rm + add]);
3162 else
3163 oappend (names32[rm + add]);
2da11e11 3164 break;
003519a7
L		 3165 case branch_v_mode:
3166 if (mode_64bit)
3167 oappend (names64[rm + add]);
3168 else
3169 {
3170 if ((sizeflag & DFLAG) || bytemode != branch_v_mode)
3171 oappend (names32[rm + add]);
3172 else
3173 oappend (names16[rm + add]);
3174 used_prefixes |= (prefixes & PREFIX_DATA);
3175 }
3176 break;
252b5132 3177 case v_mode:
db6eb5be 3178 case dq_mode:
9306ca4a 3179 case dqw_mode:
52b15da3
JH		 3180 USED_REX (REX_MODE64);
3181 if (rex & REX_MODE64)
3182 oappend (names64[rm + add]);
9306ca4a 3183 else if ((sizeflag & DFLAG) || bytemode != v_mode)
52b15da3 3184 oappend (names32[rm + add]);
252b5132 3185 else
52b15da3 3186 oappend (names16[rm + add]);
7d421014 3187 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 3188 break;
2da11e11 3189 case 0:
c608c12e 3190 break;
252b5132 3191 default:
c608c12e 3192 oappend (INTERNAL_DISASSEMBLER_ERROR);
252b5132
RH		 3193 break;
3194 }
3195 return;
3196 }
3197
3198 disp = 0;
3199 append_seg ();
3200
c1a64871 3201 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
252b5132
RH		 3202 {
3203 int havesib;
3204 int havebase;
3205 int base;
3206 int index = 0;
3207 int scale = 0;
3208
3209 havesib = 0;
3210 havebase = 1;
3211 base = rm;
3212
3213 if (base == 4)
3214 {
3215 havesib = 1;
3216 FETCH_DATA (the_info, codep + 1);
252b5132 3217 index = (*codep >> 3) & 7;
9df48ba9
L		 3218 if (mode_64bit || index != 0x4)
3219 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
2033b4b9 3220 scale = (*codep >> 6) & 3;
252b5132 3221 base = *codep & 7;
52b15da3 3222 USED_REX (REX_EXTY);
52b15da3
JH		 3223 if (rex & REX_EXTY)
3224 index += 8;
252b5132
RH		 3225 codep++;
3226 }
2888cb7a 3227 base += add;
252b5132
RH		 3228
3229 switch (mod)
3230 {
3231 case 0:
52b15da3 3232 if ((base & 7) == 5)
252b5132
RH		 3233 {
3234 havebase = 0;
20f0a1fc 3235 if (mode_64bit && !havesib)
52b15da3
JH		 3236 riprel = 1;
3237 disp = get32s ();
252b5132
RH		 3238 }
3239 break;
3240 case 1:
3241 FETCH_DATA (the_info, codep + 1);
3242 disp = *codep++;
3243 if ((disp & 0x80) != 0)
3244 disp -= 0x100;
3245 break;
3246 case 2:
52b15da3 3247 disp = get32s ();
252b5132
RH		 3248 break;
3249 }
3250
3251 if (!intel_syntax)
db6eb5be
AM		 3252 if (mod != 0 || (base & 7) == 5)
3253 {
52b15da3 3254 print_operand_value (scratchbuf, !riprel, disp);
db6eb5be 3255 oappend (scratchbuf);
52b15da3
JH		 3256 if (riprel)
3257 {
3258 set_op (disp, 1);
3259 oappend ("(%rip)");
3260 }
db6eb5be 3261 }
2da11e11 3262
252b5132
RH		 3263 if (havebase || (havesib && (index != 4 || scale != 0)))
3264 {
db6eb5be
AM		 3265 if (intel_syntax)
3266 {
3267 switch (bytemode)
3268 {
3269 case b_mode:
3270 oappend ("BYTE PTR ");
3271 break;
3272 case w_mode:
9306ca4a 3273 case dqw_mode:
db6eb5be
AM		 3274 oappend ("WORD PTR ");
3275 break;
003519a7 3276 case branch_v_mode:
db6eb5be 3277 case v_mode:
9306ca4a
JB		 3278 case dq_mode:
3279 USED_REX (REX_MODE64);
3280 if (rex & REX_MODE64)
3281 oappend ("QWORD PTR ");
3282 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
1d9f512f
AM		 3283 oappend ("DWORD PTR ");
3284 else
3285 oappend ("WORD PTR ");
9306ca4a 3286 used_prefixes |= (prefixes & PREFIX_DATA);
db6eb5be
AM		 3287 break;
3288 case d_mode:
1d9f512f
AM		 3289 oappend ("DWORD PTR ");
3290 break;
3291 case q_mode:
db6eb5be
AM		 3292 oappend ("QWORD PTR ");
3293 break;
3294 case m_mode:
52b15da3 3295 if (mode_64bit)
9306ca4a
JB		 3296 oappend ("QWORD PTR ");
3297 else
52b15da3 3298 oappend ("DWORD PTR ");
9306ca4a
JB		 3299 break;
3300 case f_mode:
3301 if (sizeflag & DFLAG)
3302 {
3303 used_prefixes |= (prefixes & PREFIX_DATA);
3304 oappend ("FWORD PTR ");
3305 }
52b15da3 3306 else
9306ca4a
JB		 3307 oappend ("DWORD PTR ");
3308 break;
3309 case t_mode:
3310 oappend ("TBYTE PTR ");
52b15da3 3311 break;
db6eb5be 3312 case x_mode:
9306ca4a 3313 oappend ("XMMWORD PTR ");
db6eb5be
AM		 3314 break;
3315 default:
3316 break;
3317 }
9306ca4a 3318 }
252b5132 3319 *obufp++ = open_char;
52b15da3
JH		 3320 if (intel_syntax && riprel)
3321 oappend ("rip + ");
db6eb5be 3322 *obufp = '\0';
252b5132 3323 if (havebase)
c1a64871
JH		 3324 oappend (mode_64bit && (sizeflag & AFLAG)
3325 ? names64[base] : names32[base]);
252b5132
RH		 3326 if (havesib)
3327 {
3328 if (index != 4)
3329 {
9306ca4a 3330 if (!intel_syntax || havebase)
db6eb5be 3331 {
9306ca4a
JB		 3332 *obufp++ = separator_char;
3333 *obufp = '\0';
db6eb5be 3334 }
9306ca4a
JB		 3335 oappend (mode_64bit && (sizeflag & AFLAG)
3336 ? names64[index] : names32[index]);
252b5132 3337 }
a02a862a 3338 if (scale != 0 || (!intel_syntax && index != 4))
db6eb5be
AM		 3339 {
3340 *obufp++ = scale_char;
3341 *obufp = '\0';
3342 sprintf (scratchbuf, "%d", 1 << scale);
3343 oappend (scratchbuf);
3344 }
252b5132 3345 }
3d456fa1
JB		 3346 if (intel_syntax && disp)
3347 {
3348 if ((bfd_signed_vma) disp > 0)
3349 {
3350 *obufp++ = '+';
3351 *obufp = '\0';
3352 }
3353 else if (mod != 1)
3354 {
3355 *obufp++ = '-';
3356 *obufp = '\0';
3357 disp = - (bfd_signed_vma) disp;
3358 }
3359
3360 print_operand_value (scratchbuf, mod != 1, disp);
3361 oappend (scratchbuf);
3362 }
252b5132
RH		 3363
3364 *obufp++ = close_char;
db6eb5be 3365 *obufp = '\0';
252b5132
RH		 3366 }
3367 else if (intel_syntax)
db6eb5be
AM		 3368 {
3369 if (mod != 0 || (base & 7) == 5)
3370 {
252b5132
RH		 3371 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3372 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3373 ;
3374 else
3375 {
d708bcba 3376 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 3377 oappend (":");
3378 }
52b15da3 3379 print_operand_value (scratchbuf, 1, disp);
db6eb5be
AM		 3380 oappend (scratchbuf);
3381 }
3382 }
252b5132
RH		 3383 }
3384 else
3385 { /* 16 bit address mode */
3386 switch (mod)
3387 {
3388 case 0:
2888cb7a 3389 if (rm == 6)
252b5132
RH		 3390 {
3391 disp = get16 ();
3392 if ((disp & 0x8000) != 0)
3393 disp -= 0x10000;
3394 }
3395 break;
3396 case 1:
3397 FETCH_DATA (the_info, codep + 1);
3398 disp = *codep++;
3399 if ((disp & 0x80) != 0)
3400 disp -= 0x100;
3401 break;
3402 case 2:
3403 disp = get16 ();
3404 if ((disp & 0x8000) != 0)
3405 disp -= 0x10000;
3406 break;
3407 }
3408
3409 if (!intel_syntax)
2888cb7a 3410 if (mod != 0 || rm == 6)
db6eb5be 3411 {
52b15da3 3412 print_operand_value (scratchbuf, 0, disp);
db6eb5be
AM		 3413 oappend (scratchbuf);
3414 }
252b5132 3415
2888cb7a 3416 if (mod != 0 || rm != 6)
252b5132
RH		 3417 {
3418 *obufp++ = open_char;
db6eb5be 3419 *obufp = '\0';
3d456fa1
JB		 3420 oappend (index16[rm]);
3421 if (intel_syntax && disp)
3422 {
3423 if ((bfd_signed_vma) disp > 0)
3424 {
3425 *obufp++ = '+';
3426 *obufp = '\0';
3427 }
3428 else if (mod != 1)
3429 {
3430 *obufp++ = '-';
3431 *obufp = '\0';
3432 disp = - (bfd_signed_vma) disp;
3433 }
3434
3435 print_operand_value (scratchbuf, mod != 1, disp);
3436 oappend (scratchbuf);
3437 }
3438
db6eb5be
AM		 3439 *obufp++ = close_char;
3440 *obufp = '\0';
252b5132 3441 }
3d456fa1
JB		 3442 else if (intel_syntax)
3443 {
3444 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3445 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3446 ;
3447 else
3448 {
3449 oappend (names_seg[ds_reg - es_reg]);
3450 oappend (":");
3451 }
3452 print_operand_value (scratchbuf, 1, disp & 0xffff);
3453 oappend (scratchbuf);
3454 }
252b5132
RH		 3455 }
3456}
3457
252b5132 3458static void
26ca5450 3459OP_G (int bytemode, int sizeflag)
252b5132 3460{
52b15da3
JH		 3461 int add = 0;
3462 USED_REX (REX_EXTX);
3463 if (rex & REX_EXTX)
3464 add += 8;
252b5132
RH		 3465 switch (bytemode)
3466 {
3467 case b_mode:
52b15da3
JH		 3468 USED_REX (0);
3469 if (rex)
3470 oappend (names8rex[reg + add]);
3471 else
3472 oappend (names8[reg + add]);
252b5132
RH		 3473 break;
3474 case w_mode:
52b15da3 3475 oappend (names16[reg + add]);
252b5132
RH		 3476 break;
3477 case d_mode:
52b15da3
JH		 3478 oappend (names32[reg + add]);
3479 break;
3480 case q_mode:
3481 oappend (names64[reg + add]);
252b5132
RH		 3482 break;
3483 case v_mode:
9306ca4a
JB		 3484 case dq_mode:
3485 case dqw_mode:
52b15da3
JH		 3486 USED_REX (REX_MODE64);
3487 if (rex & REX_MODE64)
3488 oappend (names64[reg + add]);
9306ca4a 3489 else if ((sizeflag & DFLAG) || bytemode != v_mode)
52b15da3 3490 oappend (names32[reg + add]);
252b5132 3491 else
52b15da3 3492 oappend (names16[reg + add]);
7d421014 3493 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 3494 break;
90700ea2
L		 3495 case m_mode:
3496 if (mode_64bit)
3497 oappend (names64[reg + add]);
3498 else
3499 oappend (names32[reg + add]);
3500 break;
252b5132
RH		 3501 default:
3502 oappend (INTERNAL_DISASSEMBLER_ERROR);
3503 break;
3504 }
3505}
3506
52b15da3 3507static bfd_vma
26ca5450 3508get64 (void)
52b15da3 3509{
5dd0794d 3510 bfd_vma x;
52b15da3 3511#ifdef BFD64
5dd0794d
AM		 3512 unsigned int a;
3513 unsigned int b;
3514
52b15da3
JH		 3515 FETCH_DATA (the_info, codep + 8);
3516 a = *codep++ & 0xff;
3517 a |= (*codep++ & 0xff) << 8;
3518 a |= (*codep++ & 0xff) << 16;
3519 a |= (*codep++ & 0xff) << 24;
5dd0794d 3520 b = *codep++ & 0xff;
52b15da3
JH		 3521 b |= (*codep++ & 0xff) << 8;
3522 b |= (*codep++ & 0xff) << 16;
3523 b |= (*codep++ & 0xff) << 24;
3524 x = a + ((bfd_vma) b << 32);
3525#else
6608db57 3526 abort ();
5dd0794d 3527 x = 0;
52b15da3
JH		 3528#endif
3529 return x;
3530}
3531
3532static bfd_signed_vma
26ca5450 3533get32 (void)
252b5132 3534{
52b15da3 3535 bfd_signed_vma x = 0;
252b5132
RH		 3536
3537 FETCH_DATA (the_info, codep + 4);
52b15da3
JH		 3538 x = *codep++ & (bfd_signed_vma) 0xff;
3539 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3540 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3541 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3542 return x;
3543}
3544
3545static bfd_signed_vma
26ca5450 3546get32s (void)
52b15da3
JH		 3547{
3548 bfd_signed_vma x = 0;
3549
3550 FETCH_DATA (the_info, codep + 4);
3551 x = *codep++ & (bfd_signed_vma) 0xff;
3552 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3553 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3554 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3555
3556 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3557
252b5132
RH		 3558 return x;
3559}
3560
3561static int
26ca5450 3562get16 (void)
252b5132
RH		 3563{
3564 int x = 0;
3565
3566 FETCH_DATA (the_info, codep + 2);
3567 x = *codep++ & 0xff;
3568 x |= (*codep++ & 0xff) << 8;
3569 return x;
3570}
3571
3572static void
26ca5450 3573set_op (bfd_vma op, int riprel)
252b5132
RH		 3574{
3575 op_index[op_ad] = op_ad;
7081ff04
AJ		 3576 if (mode_64bit)
3577 {
3578 op_address[op_ad] = op;
3579 op_riprel[op_ad] = riprel;
3580 }
3581 else
3582 {
3583 /* Mask to get a 32-bit address. */
3584 op_address[op_ad] = op & 0xffffffff;
3585 op_riprel[op_ad] = riprel & 0xffffffff;
3586 }
252b5132
RH		 3587}
3588
3589static void
26ca5450 3590OP_REG (int code, int sizeflag)
252b5132 3591{
2da11e11 3592 const char *s;
52b15da3
JH		 3593 int add = 0;
3594 USED_REX (REX_EXTZ);
3595 if (rex & REX_EXTZ)
3596 add = 8;
3597
3598 switch (code)
3599 {
3600 case indir_dx_reg:
d708bcba 3601 if (intel_syntax)
db6eb5be 3602 s = "[dx]";
d708bcba 3603 else
db6eb5be 3604 s = "(%dx)";
52b15da3
JH		 3605 break;
3606 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3607 case sp_reg: case bp_reg: case si_reg: case di_reg:
3608 s = names16[code - ax_reg + add];
3609 break;
3610 case es_reg: case ss_reg: case cs_reg:
3611 case ds_reg: case fs_reg: case gs_reg:
3612 s = names_seg[code - es_reg + add];
3613 break;
3614 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3615 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3616 USED_REX (0);
3617 if (rex)
3618 s = names8rex[code - al_reg + add];
3619 else
3620 s = names8[code - al_reg];
3621 break;
6439fc28
AM		 3622 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3623 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3624 if (mode_64bit)
3625 {
3626 s = names64[code - rAX_reg + add];
3627 break;
3628 }
3629 code += eAX_reg - rAX_reg;
6608db57 3630 /* Fall through. */
52b15da3
JH		 3631 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3632 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3633 USED_REX (REX_MODE64);
3634 if (rex & REX_MODE64)
3635 s = names64[code - eAX_reg + add];
3636 else if (sizeflag & DFLAG)
3637 s = names32[code - eAX_reg + add];
3638 else
3639 s = names16[code - eAX_reg + add];
3640 used_prefixes |= (prefixes & PREFIX_DATA);
3641 break;
52b15da3
JH		 3642 default:
3643 s = INTERNAL_DISASSEMBLER_ERROR;
3644 break;
3645 }
3646 oappend (s);
3647}
3648
3649static void
26ca5450 3650OP_IMREG (int code, int sizeflag)
52b15da3
JH		 3651{
3652 const char *s;
252b5132
RH		 3653
3654 switch (code)
3655 {
3656 case indir_dx_reg:
d708bcba 3657 if (intel_syntax)
db6eb5be 3658 s = "[dx]";
d708bcba 3659 else
db6eb5be 3660 s = "(%dx)";
252b5132
RH		 3661 break;
3662 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3663 case sp_reg: case bp_reg: case si_reg: case di_reg:
3664 s = names16[code - ax_reg];
3665 break;
3666 case es_reg: case ss_reg: case cs_reg:
3667 case ds_reg: case fs_reg: case gs_reg:
3668 s = names_seg[code - es_reg];
3669 break;
3670 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3671 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
52b15da3
JH		 3672 USED_REX (0);
3673 if (rex)
3674 s = names8rex[code - al_reg];
3675 else
3676 s = names8[code - al_reg];
252b5132
RH		 3677 break;
3678 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3679 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
52b15da3
JH		 3680 USED_REX (REX_MODE64);
3681 if (rex & REX_MODE64)
3682 s = names64[code - eAX_reg];
3683 else if (sizeflag & DFLAG)
252b5132
RH		 3684 s = names32[code - eAX_reg];
3685 else
3686 s = names16[code - eAX_reg];
7d421014 3687 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3688 break;
3689 default:
3690 s = INTERNAL_DISASSEMBLER_ERROR;
3691 break;
3692 }
3693 oappend (s);
3694}
3695
3696static void
26ca5450 3697OP_I (int bytemode, int sizeflag)
252b5132 3698{
52b15da3
JH		 3699 bfd_signed_vma op;
3700 bfd_signed_vma mask = -1;
252b5132
RH		 3701
3702 switch (bytemode)
3703 {
3704 case b_mode:
3705 FETCH_DATA (the_info, codep + 1);
52b15da3
JH		 3706 op = *codep++;
3707 mask = 0xff;
3708 break;
3709 case q_mode:
6439fc28
AM		 3710 if (mode_64bit)
3711 {
3712 op = get32s ();
3713 break;
3714 }
6608db57 3715 /* Fall through. */
252b5132 3716 case v_mode:
52b15da3
JH		 3717 USED_REX (REX_MODE64);
3718 if (rex & REX_MODE64)
3719 op = get32s ();
3720 else if (sizeflag & DFLAG)
3721 {
3722 op = get32 ();
3723 mask = 0xffffffff;
3724 }
252b5132 3725 else
52b15da3
JH		 3726 {
3727 op = get16 ();
3728 mask = 0xfffff;
3729 }
7d421014 3730 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3731 break;
3732 case w_mode:
52b15da3 3733 mask = 0xfffff;
252b5132
RH		 3734 op = get16 ();
3735 break;
9306ca4a
JB		 3736 case const_1_mode:
3737 if (intel_syntax)
3738 oappend ("1");
3739 return;
252b5132
RH		 3740 default:
3741 oappend (INTERNAL_DISASSEMBLER_ERROR);
3742 return;
3743 }
3744
52b15da3
JH		 3745 op &= mask;
3746 scratchbuf[0] = '$';
d708bcba
AM		 3747 print_operand_value (scratchbuf + 1, 1, op);
3748 oappend (scratchbuf + intel_syntax);
52b15da3
JH		 3749 scratchbuf[0] = '\0';
3750}
3751
3752static void
26ca5450 3753OP_I64 (int bytemode, int sizeflag)
52b15da3
JH		 3754{
3755 bfd_signed_vma op;
3756 bfd_signed_vma mask = -1;
3757
6439fc28
AM		 3758 if (!mode_64bit)
3759 {
3760 OP_I (bytemode, sizeflag);
3761 return;
3762 }
3763
52b15da3
JH		 3764 switch (bytemode)
3765 {
3766 case b_mode:
3767 FETCH_DATA (the_info, codep + 1);
3768 op = *codep++;
3769 mask = 0xff;
3770 break;
3771 case v_mode:
3772 USED_REX (REX_MODE64);
3773 if (rex & REX_MODE64)
3774 op = get64 ();
3775 else if (sizeflag & DFLAG)
3776 {
3777 op = get32 ();
3778 mask = 0xffffffff;
3779 }
3780 else
3781 {
3782 op = get16 ();
3783 mask = 0xfffff;
3784 }
3785 used_prefixes |= (prefixes & PREFIX_DATA);
3786 break;
3787 case w_mode:
3788 mask = 0xfffff;
3789 op = get16 ();
3790 break;
3791 default:
3792 oappend (INTERNAL_DISASSEMBLER_ERROR);
3793 return;
3794 }
3795
3796 op &= mask;
3797 scratchbuf[0] = '$';
d708bcba
AM		 3798 print_operand_value (scratchbuf + 1, 1, op);
3799 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3800 scratchbuf[0] = '\0';
3801}
3802
3803static void
26ca5450 3804OP_sI (int bytemode, int sizeflag)
252b5132 3805{
52b15da3
JH		 3806 bfd_signed_vma op;
3807 bfd_signed_vma mask = -1;
252b5132
RH		 3808
3809 switch (bytemode)
3810 {
3811 case b_mode:
3812 FETCH_DATA (the_info, codep + 1);
3813 op = *codep++;
3814 if ((op & 0x80) != 0)
3815 op -= 0x100;
52b15da3 3816 mask = 0xffffffff;
252b5132
RH		 3817 break;
3818 case v_mode:
52b15da3
JH		 3819 USED_REX (REX_MODE64);
3820 if (rex & REX_MODE64)
3821 op = get32s ();
3822 else if (sizeflag & DFLAG)
3823 {
3824 op = get32s ();
3825 mask = 0xffffffff;
3826 }
252b5132
RH		 3827 else
3828 {
52b15da3 3829 mask = 0xffffffff;
6608db57 3830 op = get16 ();
252b5132
RH		 3831 if ((op & 0x8000) != 0)
3832 op -= 0x10000;
3833 }
7d421014 3834 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3835 break;
3836 case w_mode:
3837 op = get16 ();
52b15da3 3838 mask = 0xffffffff;
252b5132
RH		 3839 if ((op & 0x8000) != 0)
3840 op -= 0x10000;
3841 break;
3842 default:
3843 oappend (INTERNAL_DISASSEMBLER_ERROR);
3844 return;
3845 }
52b15da3
JH		 3846
3847 scratchbuf[0] = '$';
3848 print_operand_value (scratchbuf + 1, 1, op);
d708bcba 3849 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3850}
3851
3852static void
26ca5450 3853OP_J (int bytemode, int sizeflag)
252b5132 3854{
52b15da3 3855 bfd_vma disp;
7081ff04 3856 bfd_vma mask = -1;
252b5132
RH		 3857
3858 switch (bytemode)
3859 {
3860 case b_mode:
3861 FETCH_DATA (the_info, codep + 1);
3862 disp = *codep++;
3863 if ((disp & 0x80) != 0)
3864 disp -= 0x100;
3865 break;
3866 case v_mode:
3867 if (sizeflag & DFLAG)
52b15da3 3868 disp = get32s ();
252b5132
RH		 3869 else
3870 {
3871 disp = get16 ();
6608db57 3872 /* For some reason, a data16 prefix on a jump instruction
252b5132
RH		 3873 means that the pc is masked to 16 bits after the
3874 displacement is added! */
3875 mask = 0xffff;
3876 }
3877 break;
3878 default:
3879 oappend (INTERNAL_DISASSEMBLER_ERROR);
3880 return;
3881 }
3882 disp = (start_pc + codep - start_codep + disp) & mask;
52b15da3
JH		 3883 set_op (disp, 0);
3884 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 3885 oappend (scratchbuf);
3886}
3887
252b5132 3888static void
26ca5450 3889OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 3890{
d708bcba 3891 oappend (names_seg[reg]);
252b5132
RH		 3892}
3893
3894static void
26ca5450 3895OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
252b5132
RH		 3896{
3897 int seg, offset;
3898
c608c12e 3899 if (sizeflag & DFLAG)
252b5132 3900 {
c608c12e
AM		 3901 offset = get32 ();
3902 seg = get16 ();
252b5132 3903 }
c608c12e
AM		 3904 else
3905 {
3906 offset = get16 ();
3907 seg = get16 ();
3908 }
7d421014 3909 used_prefixes |= (prefixes & PREFIX_DATA);
d708bcba
AM		 3910 if (intel_syntax)
3911 sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
3912 else
3913 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
c608c12e 3914 oappend (scratchbuf);
252b5132
RH		 3915}
3916
252b5132 3917static void
26ca5450 3918OP_OFF (int bytemode ATTRIBUTE_UNUSED, int sizeflag)
252b5132 3919{
52b15da3 3920 bfd_vma off;
252b5132
RH		 3921
3922 append_seg ();
3923
c1a64871 3924 if ((sizeflag & AFLAG) || mode_64bit)
252b5132
RH		 3925 off = get32 ();
3926 else
3927 off = get16 ();
3928
3929 if (intel_syntax)
3930 {
3931 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 3932 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
252b5132 3933 {
d708bcba 3934 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 3935 oappend (":");
3936 }
3937 }
52b15da3
JH		 3938 print_operand_value (scratchbuf, 1, off);
3939 oappend (scratchbuf);
3940}
6439fc28 3941
52b15da3 3942static void
26ca5450 3943OP_OFF64 (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
52b15da3
JH		 3944{
3945 bfd_vma off;
3946
6439fc28
AM		 3947 if (!mode_64bit)
3948 {
3949 OP_OFF (bytemode, sizeflag);
3950 return;
3951 }
3952
52b15da3
JH		 3953 append_seg ();
3954
6608db57 3955 off = get64 ();
52b15da3
JH		 3956
3957 if (intel_syntax)
3958 {
3959 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 3960 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
52b15da3 3961 {
d708bcba 3962 oappend (names_seg[ds_reg - es_reg]);
52b15da3
JH		 3963 oappend (":");
3964 }
3965 }
3966 print_operand_value (scratchbuf, 1, off);
252b5132
RH		 3967 oappend (scratchbuf);
3968}
3969
3970static void
26ca5450 3971ptr_reg (int code, int sizeflag)
252b5132 3972{
2da11e11 3973 const char *s;
d708bcba 3974
1d9f512f 3975 *obufp++ = open_char;
20f0a1fc
NC		 3976 used_prefixes |= (prefixes & PREFIX_ADDR);
3977 if (mode_64bit)
c1a64871
JH		 3978 {
3979 if (!(sizeflag & AFLAG))
db6eb5be 3980 s = names32[code - eAX_reg];
c1a64871 3981 else
db6eb5be 3982 s = names64[code - eAX_reg];
c1a64871 3983 }
52b15da3 3984 else if (sizeflag & AFLAG)
252b5132
RH		 3985 s = names32[code - eAX_reg];
3986 else
3987 s = names16[code - eAX_reg];
3988 oappend (s);
1d9f512f
AM		 3989 *obufp++ = close_char;
3990 *obufp = 0;
252b5132
RH		 3991}
3992
3993static void
26ca5450 3994OP_ESreg (int code, int sizeflag)
252b5132 3995{
9306ca4a
JB		 3996 if (intel_syntax)
3997 {
3998 if (codep[-1] & 1)
3999 {
4000 USED_REX (REX_MODE64);
4001 used_prefixes |= (prefixes & PREFIX_DATA);
4002 if (rex & REX_MODE64)
4003 oappend ("QWORD PTR ");
4004 else if ((sizeflag & DFLAG))
4005 oappend ("DWORD PTR ");
4006 else
4007 oappend ("WORD PTR ");
4008 }
4009 else
4010 oappend ("BYTE PTR ");
4011 }
4012
d708bcba 4013 oappend ("%es:" + intel_syntax);
252b5132
RH		 4014 ptr_reg (code, sizeflag);
4015}
4016
4017static void
26ca5450 4018OP_DSreg (int code, int sizeflag)
252b5132 4019{
9306ca4a
JB		 4020 if (intel_syntax)
4021 {
4022 if (codep[-1] != 0xd7 && (codep[-1] & 1))
4023 {
4024 USED_REX (REX_MODE64);
4025 used_prefixes |= (prefixes & PREFIX_DATA);
4026 if (rex & REX_MODE64)
4027 oappend ("QWORD PTR ");
4028 else if ((sizeflag & DFLAG))
4029 oappend ("DWORD PTR ");
4030 else
4031 oappend ("WORD PTR ");
4032 }
4033 else
4034 oappend ("BYTE PTR ");
4035 }
4036
252b5132
RH		 4037 if ((prefixes
4038 & (PREFIX_CS
4039 | PREFIX_DS
4040 | PREFIX_SS
4041 | PREFIX_ES
4042 | PREFIX_FS
4043 | PREFIX_GS)) == 0)
4044 prefixes |= PREFIX_DS;
6608db57 4045 append_seg ();
252b5132
RH		 4046 ptr_reg (code, sizeflag);
4047}
4048
252b5132 4049static void
26ca5450 4050OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4051{
52b15da3 4052 int add = 0;
52b15da3 4053 if (rex & REX_EXTX)
c4a530c5
JB		 4054 {
4055 USED_REX (REX_EXTX);
4056 add = 8;
4057 }
4058 else if (!mode_64bit && (prefixes & PREFIX_LOCK))
4059 {
4060 used_prefixes |= PREFIX_LOCK;
4061 add = 8;
4062 }
d708bcba
AM		 4063 sprintf (scratchbuf, "%%cr%d", reg + add);
4064 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4065}
4066
252b5132 4067static void
26ca5450 4068OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4069{
52b15da3
JH		 4070 int add = 0;
4071 USED_REX (REX_EXTX);
4072 if (rex & REX_EXTX)
4073 add = 8;
d708bcba 4074 if (intel_syntax)
6608db57 4075 sprintf (scratchbuf, "db%d", reg + add);
d708bcba 4076 else
6608db57 4077 sprintf (scratchbuf, "%%db%d", reg + add);
252b5132
RH		 4078 oappend (scratchbuf);
4079}
4080
252b5132 4081static void
26ca5450 4082OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4083{
252b5132 4084 sprintf (scratchbuf, "%%tr%d", reg);
d708bcba 4085 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4086}
4087
4088static void
26ca5450 4089OP_Rd (int bytemode, int sizeflag)
252b5132 4090{
2da11e11
AM		 4091 if (mod == 3)
4092 OP_E (bytemode, sizeflag);
4093 else
6608db57 4094 BadOp ();
252b5132
RH		 4095}
4096
4097static void
26ca5450 4098OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4099{
041bd2e0
JH		 4100 used_prefixes |= (prefixes & PREFIX_DATA);
4101 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 4102 {
4103 int add = 0;
4104 USED_REX (REX_EXTX);
4105 if (rex & REX_EXTX)
4106 add = 8;
4107 sprintf (scratchbuf, "%%xmm%d", reg + add);
4108 }
041bd2e0 4109 else
20f0a1fc 4110 sprintf (scratchbuf, "%%mm%d", reg);
d708bcba 4111 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4112}
4113
c608c12e 4114static void
26ca5450 4115OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e 4116{
041bd2e0
JH		 4117 int add = 0;
4118 USED_REX (REX_EXTX);
4119 if (rex & REX_EXTX)
4120 add = 8;
4121 sprintf (scratchbuf, "%%xmm%d", reg + add);
d708bcba 4122 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 4123}
4124
252b5132 4125static void
26ca5450 4126OP_EM (int bytemode, int sizeflag)
252b5132
RH		 4127{
4128 if (mod != 3)
4129 {
9306ca4a
JB		 4130 if (intel_syntax && bytemode == v_mode)
4131 {
4132 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4133 used_prefixes |= (prefixes & PREFIX_DATA);
4134 }
252b5132
RH		 4135 OP_E (bytemode, sizeflag);
4136 return;
4137 }
4138
6608db57 4139 /* Skip mod/rm byte. */
4bba6815 4140 MODRM_CHECK;
252b5132 4141 codep++;
041bd2e0
JH		 4142 used_prefixes |= (prefixes & PREFIX_DATA);
4143 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 4144 {
4145 int add = 0;
4146
4147 USED_REX (REX_EXTZ);
4148 if (rex & REX_EXTZ)
4149 add = 8;
4150 sprintf (scratchbuf, "%%xmm%d", rm + add);
4151 }
041bd2e0 4152 else
20f0a1fc 4153 sprintf (scratchbuf, "%%mm%d", rm);
d708bcba 4154 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4155}
4156
c608c12e 4157static void
26ca5450 4158OP_EX (int bytemode, int sizeflag)
c608c12e 4159{
041bd2e0 4160 int add = 0;
c608c12e
AM		 4161 if (mod != 3)
4162 {
9306ca4a
JB		 4163 if (intel_syntax && bytemode == v_mode)
4164 {
4165 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
4166 {
4167 case 0: bytemode = x_mode; break;
4168 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
4169 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
4170 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
4171 default: bytemode = 0; break;
4172 }
4173 }
c608c12e
AM		 4174 OP_E (bytemode, sizeflag);
4175 return;
4176 }
041bd2e0
JH		 4177 USED_REX (REX_EXTZ);
4178 if (rex & REX_EXTZ)
4179 add = 8;
c608c12e 4180
6608db57 4181 /* Skip mod/rm byte. */
4bba6815 4182 MODRM_CHECK;
c608c12e 4183 codep++;
041bd2e0 4184 sprintf (scratchbuf, "%%xmm%d", rm + add);
d708bcba 4185 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 4186}
4187
252b5132 4188static void
26ca5450 4189OP_MS (int bytemode, int sizeflag)
252b5132 4190{
2da11e11
AM		 4191 if (mod == 3)
4192 OP_EM (bytemode, sizeflag);
4193 else
6608db57 4194 BadOp ();
252b5132
RH		 4195}
4196
992aaec9 4197static void
26ca5450 4198OP_XS (int bytemode, int sizeflag)
992aaec9
AM		 4199{
4200 if (mod == 3)
4201 OP_EX (bytemode, sizeflag);
4202 else
6608db57 4203 BadOp ();
992aaec9
AM		 4204}
4205
cc0ec051
AM		 4206static void
4207OP_M (int bytemode, int sizeflag)
4208{
4209 if (mod == 3)
4210 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4211 else
4212 OP_E (bytemode, sizeflag);
4213}
4214
4215static void
4216OP_0f07 (int bytemode, int sizeflag)
4217{
4218 if (mod != 3 || rm != 0)
4219 BadOp ();
4220 else
4221 OP_E (bytemode, sizeflag);
4222}
4223
4224static void
4225OP_0fae (int bytemode, int sizeflag)
4226{
4227 if (mod == 3)
4228 {
4229 if (reg == 7)
4230 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
4231
4232 if (reg < 5 || rm != 0)
4233 {
4234 BadOp (); /* bad sfence, mfence, or lfence */
4235 return;
4236 }
4237 }
4238 else if (reg != 7)
4239 {
4240 BadOp (); /* bad clflush */
4241 return;
4242 }
4243
4244 OP_E (bytemode, sizeflag);
4245}
4246
4247static void
4248NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4249{
4250 /* NOP with REPZ prefix is called PAUSE. */
4251 if (prefixes == PREFIX_REPZ)
4252 strcpy (obuf, "pause");
4253}
4254
84037f8c 4255static const char *const Suffix3DNow[] = {
252b5132
RH		 4256/* 00 */ NULL, NULL, NULL, NULL,
4257/* 04 */ NULL, NULL, NULL, NULL,
4258/* 08 */ NULL, NULL, NULL, NULL,
9e525108 4259/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
252b5132
RH		 4260/* 10 */ NULL, NULL, NULL, NULL,
4261/* 14 */ NULL, NULL, NULL, NULL,
4262/* 18 */ NULL, NULL, NULL, NULL,
9e525108 4263/* 1C */ "pf2iw", "pf2id", NULL, NULL,
252b5132
RH		 4264/* 20 */ NULL, NULL, NULL, NULL,
4265/* 24 */ NULL, NULL, NULL, NULL,
4266/* 28 */ NULL, NULL, NULL, NULL,
4267/* 2C */ NULL, NULL, NULL, NULL,
4268/* 30 */ NULL, NULL, NULL, NULL,
4269/* 34 */ NULL, NULL, NULL, NULL,
4270/* 38 */ NULL, NULL, NULL, NULL,
4271/* 3C */ NULL, NULL, NULL, NULL,
4272/* 40 */ NULL, NULL, NULL, NULL,
4273/* 44 */ NULL, NULL, NULL, NULL,
4274/* 48 */ NULL, NULL, NULL, NULL,
4275/* 4C */ NULL, NULL, NULL, NULL,
4276/* 50 */ NULL, NULL, NULL, NULL,
4277/* 54 */ NULL, NULL, NULL, NULL,
4278/* 58 */ NULL, NULL, NULL, NULL,
4279/* 5C */ NULL, NULL, NULL, NULL,
4280/* 60 */ NULL, NULL, NULL, NULL,
4281/* 64 */ NULL, NULL, NULL, NULL,
4282/* 68 */ NULL, NULL, NULL, NULL,
4283/* 6C */ NULL, NULL, NULL, NULL,
4284/* 70 */ NULL, NULL, NULL, NULL,
4285/* 74 */ NULL, NULL, NULL, NULL,
4286/* 78 */ NULL, NULL, NULL, NULL,
4287/* 7C */ NULL, NULL, NULL, NULL,
4288/* 80 */ NULL, NULL, NULL, NULL,
4289/* 84 */ NULL, NULL, NULL, NULL,
9e525108
AM		 4290/* 88 */ NULL, NULL, "pfnacc", NULL,
4291/* 8C */ NULL, NULL, "pfpnacc", NULL,
252b5132
RH		 4292/* 90 */ "pfcmpge", NULL, NULL, NULL,
4293/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4294/* 98 */ NULL, NULL, "pfsub", NULL,
4295/* 9C */ NULL, NULL, "pfadd", NULL,
4296/* A0 */ "pfcmpgt", NULL, NULL, NULL,
4297/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4298/* A8 */ NULL, NULL, "pfsubr", NULL,
4299/* AC */ NULL, NULL, "pfacc", NULL,
4300/* B0 */ "pfcmpeq", NULL, NULL, NULL,
4301/* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
9e525108 4302/* B8 */ NULL, NULL, NULL, "pswapd",
252b5132
RH		 4303/* BC */ NULL, NULL, NULL, "pavgusb",
4304/* C0 */ NULL, NULL, NULL, NULL,
4305/* C4 */ NULL, NULL, NULL, NULL,
4306/* C8 */ NULL, NULL, NULL, NULL,
4307/* CC */ NULL, NULL, NULL, NULL,
4308/* D0 */ NULL, NULL, NULL, NULL,
4309/* D4 */ NULL, NULL, NULL, NULL,
4310/* D8 */ NULL, NULL, NULL, NULL,
4311/* DC */ NULL, NULL, NULL, NULL,
4312/* E0 */ NULL, NULL, NULL, NULL,
4313/* E4 */ NULL, NULL, NULL, NULL,
4314/* E8 */ NULL, NULL, NULL, NULL,
4315/* EC */ NULL, NULL, NULL, NULL,
4316/* F0 */ NULL, NULL, NULL, NULL,
4317/* F4 */ NULL, NULL, NULL, NULL,
4318/* F8 */ NULL, NULL, NULL, NULL,
4319/* FC */ NULL, NULL, NULL, NULL,
4320};
4321
4322static void
26ca5450 4323OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 4324{
4325 const char *mnemonic;
4326
4327 FETCH_DATA (the_info, codep + 1);
4328 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4329 place where an 8-bit immediate would normally go. ie. the last
4330 byte of the instruction. */
6608db57 4331 obufp = obuf + strlen (obuf);
c608c12e 4332 mnemonic = Suffix3DNow[*codep++ & 0xff];
252b5132 4333 if (mnemonic)
2da11e11 4334 oappend (mnemonic);
252b5132
RH		 4335 else
4336 {
4337 /* Since a variable sized modrm/sib chunk is between the start
4338 of the opcode (0x0f0f) and the opcode suffix, we need to do
4339 all the modrm processing first, and don't know until now that
4340 we have a bad opcode. This necessitates some cleaning up. */
2da11e11
AM		 4341 op1out[0] = '\0';
4342 op2out[0] = '\0';
6608db57 4343 BadOp ();
252b5132
RH		 4344 }
4345}
c608c12e 4346
6608db57 4347static const char *simd_cmp_op[] = {
c608c12e
AM		 4348 "eq",
4349 "lt",
4350 "le",
4351 "unord",
4352 "neq",
4353 "nlt",
4354 "nle",
4355 "ord"
4356};
4357
4358static void
26ca5450 4359OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 4360{
4361 unsigned int cmp_type;
4362
4363 FETCH_DATA (the_info, codep + 1);
6608db57 4364 obufp = obuf + strlen (obuf);
c608c12e
AM		 4365 cmp_type = *codep++ & 0xff;
4366 if (cmp_type < 8)
4367 {
041bd2e0
JH		 4368 char suffix1 = 'p', suffix2 = 's';
4369 used_prefixes |= (prefixes & PREFIX_REPZ);
4370 if (prefixes & PREFIX_REPZ)
4371 suffix1 = 's';
4372 else
4373 {
4374 used_prefixes |= (prefixes & PREFIX_DATA);
4375 if (prefixes & PREFIX_DATA)
4376 suffix2 = 'd';
4377 else
4378 {
4379 used_prefixes |= (prefixes & PREFIX_REPNZ);
4380 if (prefixes & PREFIX_REPNZ)
4381 suffix1 = 's', suffix2 = 'd';
4382 }
4383 }
4384 sprintf (scratchbuf, "cmp%s%c%c",
4385 simd_cmp_op[cmp_type], suffix1, suffix2);
7d421014 4386 used_prefixes |= (prefixes & PREFIX_REPZ);
2da11e11 4387 oappend (scratchbuf);
c608c12e
AM		 4388 }
4389 else
4390 {
4391 /* We have a bad extension byte. Clean up. */
2da11e11
AM		 4392 op1out[0] = '\0';
4393 op2out[0] = '\0';
6608db57 4394 BadOp ();
c608c12e
AM		 4395 }
4396}
4397
4398static void
26ca5450 4399SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 4400{
4401 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4402 forms of these instructions. */
4403 if (mod == 3)
4404 {
6608db57
KH		 4405 char *p = obuf + strlen (obuf);
4406 *(p + 1) = '\0';
4407 *p = *(p - 1);
4408 *(p - 1) = *(p - 2);
4409 *(p - 2) = *(p - 3);
4410 *(p - 3) = extrachar;
c608c12e
AM		 4411 }
4412}
2da11e11 4413
ca164297 4414static void
4fd61dcb 4415PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
ca164297 4416{
1d9f512f 4417 if (mod == 3 && reg == 1 && rm <= 1)
ca164297 4418 {
ca164297 4419 /* Override "sidt". */
1d9f512f
AM		 4420 char *p = obuf + strlen (obuf) - 4;
4421
22cbf2e7 4422 /* We might have a suffix when disassembling with -Msuffix. */
1d9f512f
AM		 4423 if (*p == 'i')
4424 --p;
4425
ca164297
L		 4426 if (rm)
4427 {
4428 /* mwait %eax,%ecx */
1d9f512f 4429 strcpy (p, "mwait");
6128c599
JB		 4430 if (!intel_syntax)
4431 strcpy (op1out, names32[0]);
ca164297
L		 4432 }
4433 else
4434 {
4435 /* monitor %eax,%ecx,%edx" */
1d9f512f 4436 strcpy (p, "monitor");
6128c599
JB		 4437 if (!intel_syntax)
4438 {
4439 if (!mode_64bit)
4440 strcpy (op1out, names32[0]);
4441 else if (!(prefixes & PREFIX_ADDR))
4442 strcpy (op1out, names64[0]);
4443 else
4444 {
4445 strcpy (op1out, names32[0]);
4446 used_prefixes |= PREFIX_ADDR;
4447 }
4448 strcpy (op3out, names32[2]);
4449 }
4450 }
4451 if (!intel_syntax)
4452 {
4453 strcpy (op2out, names32[1]);
4454 two_source_ops = 1;
ca164297
L		 4455 }
4456
4457 codep++;
4458 }
4459 else
30123838
JB		 4460 OP_M (0, sizeflag);
4461}
4462
4463static void
4464SVME_Fixup (int bytemode, int sizeflag)
4465{
4466 const char *alt;
4467 char *p;
4468
4469 switch (*codep)
4470 {
4471 case 0xd8:
4472 alt = "vmrun";
4473 break;
4474 case 0xd9:
4475 alt = "vmmcall";
4476 break;
4477 case 0xda:
4478 alt = "vmload";
4479 break;
4480 case 0xdb:
4481 alt = "vmsave";
4482 break;
4483 case 0xdc:
4484 alt = "stgi";
4485 break;
4486 case 0xdd:
4487 alt = "clgi";
4488 break;
4489 case 0xde:
4490 alt = "skinit";
4491 break;
4492 case 0xdf:
4493 alt = "invlpga";
4494 break;
4495 default:
4496 OP_M (bytemode, sizeflag);
4497 return;
4498 }
4499 /* Override "lidt". */
4500 p = obuf + strlen (obuf) - 4;
4501 /* We might have a suffix. */
4502 if (*p == 'i')
4503 --p;
4504 strcpy (p, alt);
4505 if (!(prefixes & PREFIX_ADDR))
4506 {
4507 ++codep;
4508 return;
4509 }
4510 used_prefixes |= PREFIX_ADDR;
4511 switch (*codep++)
4512 {
4513 case 0xdf:
4514 strcpy (op2out, names32[1]);
4515 two_source_ops = 1;
4516 /* Fall through. */
4517 case 0xd8:
4518 case 0xda:
4519 case 0xdb:
4520 *obufp++ = open_char;
4521 if (mode_64bit || (sizeflag & AFLAG))
4522 alt = names32[0];
4523 else
4524 alt = names16[0];
4525 strcpy (obufp, alt);
4526 obufp += strlen (alt);
4527 *obufp++ = close_char;
4528 *obufp = '\0';
4529 break;
4530 }
ca164297
L		 4531}
4532
4fd61dcb
JJ		 4533static void
4534INVLPG_Fixup (int bytemode, int sizeflag)
4535{
373ff435 4536 const char *alt;
4fd61dcb 4537
373ff435
JB		 4538 switch (*codep)
4539 {
4540 case 0xf8:
4541 alt = "swapgs";
4542 break;
4543 case 0xf9:
4544 alt = "rdtscp";
4545 break;
4546 default:
30123838 4547 OP_M (bytemode, sizeflag);
373ff435 4548 return;
4fd61dcb 4549 }
373ff435
JB		 4550 /* Override "invlpg". */
4551 strcpy (obuf + strlen (obuf) - 6, alt);
4552 codep++;
4fd61dcb
JJ		 4553}
4554
6608db57
KH		 4555static void
4556BadOp (void)
2da11e11 4557{
6608db57
KH		 4558 /* Throw away prefixes and 1st. opcode byte. */
4559 codep = insn_codep + 1;
2da11e11
AM		 4560 oappend ("(bad)");
4561}
4cc91dba
L		 4562
4563static void
4564SEG_Fixup (int extrachar, int sizeflag)
4565{
4566 if (mod == 3)
4567 {
4568 /* We need to add a proper suffix with
4569
4570 movw %ds,%ax
4571 movl %ds,%eax
4572 movq %ds,%rax
4573 movw %ax,%ds
4574 movl %eax,%ds
4575 movq %rax,%ds
4576 */
4577 const char *suffix;
4578
4579 if (prefixes & PREFIX_DATA)
4580 suffix = "w";
4581 else
4582 {
4583 USED_REX (REX_MODE64);
4584 if (rex & REX_MODE64)
4585 suffix = "q";
4586 else
4587 suffix = "l";
4588 }
4589 strcat (obuf, suffix);
4590 }
4591 else
4592 {
4593 /* We need to fix the suffix for
4594
4595 movw %ds,(%eax)
4596 movw %ds,(%rax)
4597 movw (%eax),%ds
4598 movw (%rax),%ds
4599
4600 Override "mov[l|q]". */
4601 char *p = obuf + strlen (obuf) - 1;
4602
4603 /* We might not have a suffix. */
4604 if (*p == 'v')
4605 ++p;
4606 *p = 'w';
4607 }
4608
4609 OP_E (extrachar, sizeflag);
4610}
90700ea2
L		 4611
4612static void
4613VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4614{
4615 if (mod == 3 && reg == 0 && rm >=1 && rm <= 4)
4616 {
4617 /* Override "sgdt". */
4618 char *p = obuf + strlen (obuf) - 4;
4619
22cbf2e7
L		 4620 /* We might have a suffix when disassembling with -Msuffix. */
4621 if (*p == 'g')
90700ea2
L		 4622 --p;
4623
4624 switch (rm)
4625 {
4626 case 1:
4627 strcpy (p, "vmcall");
4628 break;
4629 case 2:
4630 strcpy (p, "vmlaunch");
4631 break;
4632 case 3:
4633 strcpy (p, "vmresume");
4634 break;
4635 case 4:
4636 strcpy (p, "vmxoff");
4637 break;
4638 }
4639
4640 codep++;
4641 }
4642 else
4643 OP_E (0, sizeflag);
4644}
4645
4646static void
4647OP_VMX (int bytemode, int sizeflag)
4648{
4649 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
4650 if (prefixes & PREFIX_DATA)
4651 strcpy (obuf, "vmclear");
4652 else if (prefixes & PREFIX_REPZ)
4653 strcpy (obuf, "vmxon");
4654 else
4655 strcpy (obuf, "vmptrld");
4656 OP_E (bytemode, sizeflag);
4657}
GDB Binutils - Deliverables
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