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2004-03-12 Michal Ludvig <mludvig@suse.cz>
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
CommitLineData
252b5132 1/* Print i386 instructions for GDB, the GNU debugger.
060d22b0 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
0f10071e 3 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
252b5132
RH		 4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21/*
22 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 * July 1988
24 * modified by John Hassey (hassey@dg-rtp.dg.com)
52b15da3 25 * x86-64 support added by Jan Hubicka (jh@suse.cz)
0f10071e 26 * VIA PadLock support by Michal Ludvig (mludvig@suse.cz)
252b5132
RH		 27 */
28
29/*
30 * The main tables describing the instructions is essentially a copy
31 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
32 * Programmers Manual. Usually, there is a capital letter, followed
33 * by a small letter. The capital letter tell the addressing mode,
34 * and the small letter tells about the operand size. Refer to
35 * the Intel manual for details.
36 */
37
38#include "dis-asm.h"
39#include "sysdep.h"
40#include "opintl.h"
41
42#define MAXLEN 20
43
44#include <setjmp.h>
45
46#ifndef UNIXWARE_COMPAT
47/* Set non-zero for broken, compatible instructions. Set to zero for
48 non-broken opcodes. */
49#define UNIXWARE_COMPAT 1
50#endif
51
26ca5450
AJ		 52static int fetch_data (struct disassemble_info *, bfd_byte *);
53static void ckprefix (void);
54static const char *prefix_name (int, int);
55static int print_insn (bfd_vma, disassemble_info *);
56static void dofloat (int);
57static void OP_ST (int, int);
58static void OP_STi (int, int);
59static int putop (const char *, int);
60static void oappend (const char *);
61static void append_seg (void);
62static void OP_indirE (int, int);
63static void print_operand_value (char *, int, bfd_vma);
64static void OP_E (int, int);
65static void OP_G (int, int);
66static bfd_vma get64 (void);
67static bfd_signed_vma get32 (void);
68static bfd_signed_vma get32s (void);
69static int get16 (void);
70static void set_op (bfd_vma, int);
71static void OP_REG (int, int);
72static void OP_IMREG (int, int);
73static void OP_I (int, int);
74static void OP_I64 (int, int);
75static void OP_sI (int, int);
76static void OP_J (int, int);
77static void OP_SEG (int, int);
78static void OP_DIR (int, int);
79static void OP_OFF (int, int);
80static void OP_OFF64 (int, int);
81static void ptr_reg (int, int);
82static void OP_ESreg (int, int);
83static void OP_DSreg (int, int);
84static void OP_C (int, int);
85static void OP_D (int, int);
86static void OP_T (int, int);
87static void OP_Rd (int, int);
88static void OP_MMX (int, int);
89static void OP_XMM (int, int);
90static void OP_EM (int, int);
91static void OP_EX (int, int);
92static void OP_MS (int, int);
93static void OP_XS (int, int);
94static void OP_3DNowSuffix (int, int);
95static void OP_SIMD_Suffix (int, int);
96static void SIMD_Fixup (int, int);
97static void PNI_Fixup (int, int);
98static void BadOp (void);
252b5132 99
6608db57 100struct dis_private {
252b5132
RH		 101 /* Points to first byte not fetched. */
102 bfd_byte *max_fetched;
103 bfd_byte the_buffer[MAXLEN];
104 bfd_vma insn_start;
e396998b 105 int orig_sizeflag;
252b5132
RH		 106 jmp_buf bailout;
107};
108
5076851f
ILT		 109/* The opcode for the fwait instruction, which we treat as a prefix
110 when we can. */
111#define FWAIT_OPCODE (0x9b)
112
52b15da3
JH		 113/* Set to 1 for 64bit mode disassembly. */
114static int mode_64bit;
115
5076851f
ILT		 116/* Flags for the prefixes for the current instruction. See below. */
117static int prefixes;
118
52b15da3
JH		 119/* REX prefix the current instruction. See below. */
120static int rex;
121/* Bits of REX we've already used. */
122static int rex_used;
123#define REX_MODE64 8
124#define REX_EXTX 4
125#define REX_EXTY 2
126#define REX_EXTZ 1
127/* Mark parts used in the REX prefix. When we are testing for
128 empty prefix (for 8bit register REX extension), just mask it
129 out. Otherwise test for REX bit is excuse for existence of REX
130 only in case value is nonzero. */
131#define USED_REX(value) \
132 { \
133 if (value) \
134 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
135 else \
136 rex_used |= 0x40; \
137 }
138
7d421014
ILT		 139/* Flags for prefixes which we somehow handled when printing the
140 current instruction. */
141static int used_prefixes;
142
5076851f
ILT		 143/* Flags stored in PREFIXES. */
144#define PREFIX_REPZ 1
145#define PREFIX_REPNZ 2
146#define PREFIX_LOCK 4
147#define PREFIX_CS 8
148#define PREFIX_SS 0x10
149#define PREFIX_DS 0x20
150#define PREFIX_ES 0x40
151#define PREFIX_FS 0x80
152#define PREFIX_GS 0x100
153#define PREFIX_DATA 0x200
154#define PREFIX_ADDR 0x400
155#define PREFIX_FWAIT 0x800
156
252b5132
RH		 157/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
158 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
159 on error. */
160#define FETCH_DATA(info, addr) \
6608db57 161 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
252b5132
RH		 162 ? 1 : fetch_data ((info), (addr)))
163
164static int
26ca5450 165fetch_data (struct disassemble_info *info, bfd_byte *addr)
252b5132
RH		 166{
167 int status;
6608db57 168 struct dis_private *priv = (struct dis_private *) info->private_data;
252b5132
RH		 169 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
170
171 status = (*info->read_memory_func) (start,
172 priv->max_fetched,
173 addr - priv->max_fetched,
174 info);
175 if (status != 0)
176 {
7d421014 177 /* If we did manage to read at least one byte, then
db6eb5be
AM		 178 print_insn_i386 will do something sensible. Otherwise, print
179 an error. We do that here because this is where we know
180 STATUS. */
7d421014 181 if (priv->max_fetched == priv->the_buffer)
5076851f 182 (*info->memory_error_func) (status, start, info);
252b5132
RH		 183 longjmp (priv->bailout, 1);
184 }
185 else
186 priv->max_fetched = addr;
187 return 1;
188}
189
57d91c3c
ILT		 190#define XX NULL, 0
191
252b5132 192#define Eb OP_E, b_mode
52b15da3
JH		 193#define Ev OP_E, v_mode
194#define Ed OP_E, d_mode
db6eb5be 195#define Edq OP_E, dq_mode
252b5132 196#define indirEb OP_indirE, b_mode
252b5132
RH		 197#define indirEv OP_indirE, v_mode
198#define Ew OP_E, w_mode
199#define Ma OP_E, v_mode
bcb5558b 200#define M OP_E, 0 /* lea, lgdt, etc. */
2da11e11 201#define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
992aaec9 202#define Gb OP_G, b_mode
252b5132 203#define Gv OP_G, v_mode
992aaec9 204#define Gd OP_G, d_mode
252b5132 205#define Gw OP_G, w_mode
2da11e11 206#define Rd OP_Rd, d_mode
52b15da3 207#define Rm OP_Rd, m_mode
252b5132
RH		 208#define Ib OP_I, b_mode
209#define sIb OP_sI, b_mode /* sign extened byte */
210#define Iv OP_I, v_mode
52b15da3
JH		 211#define Iq OP_I, q_mode
212#define Iv64 OP_I64, v_mode
252b5132
RH		 213#define Iw OP_I, w_mode
214#define Jb OP_J, b_mode
215#define Jv OP_J, v_mode
52b15da3
JH		 216#define Cm OP_C, m_mode
217#define Dm OP_D, m_mode
252b5132
RH		 218#define Td OP_T, d_mode
219
52b15da3
JH		 220#define RMeAX OP_REG, eAX_reg
221#define RMeBX OP_REG, eBX_reg
222#define RMeCX OP_REG, eCX_reg
223#define RMeDX OP_REG, eDX_reg
224#define RMeSP OP_REG, eSP_reg
225#define RMeBP OP_REG, eBP_reg
226#define RMeSI OP_REG, eSI_reg
227#define RMeDI OP_REG, eDI_reg
228#define RMrAX OP_REG, rAX_reg
229#define RMrBX OP_REG, rBX_reg
230#define RMrCX OP_REG, rCX_reg
231#define RMrDX OP_REG, rDX_reg
232#define RMrSP OP_REG, rSP_reg
233#define RMrBP OP_REG, rBP_reg
234#define RMrSI OP_REG, rSI_reg
235#define RMrDI OP_REG, rDI_reg
236#define RMAL OP_REG, al_reg
237#define RMAL OP_REG, al_reg
238#define RMCL OP_REG, cl_reg
239#define RMDL OP_REG, dl_reg
240#define RMBL OP_REG, bl_reg
241#define RMAH OP_REG, ah_reg
242#define RMCH OP_REG, ch_reg
243#define RMDH OP_REG, dh_reg
244#define RMBH OP_REG, bh_reg
245#define RMAX OP_REG, ax_reg
246#define RMDX OP_REG, dx_reg
247
248#define eAX OP_IMREG, eAX_reg
249#define eBX OP_IMREG, eBX_reg
250#define eCX OP_IMREG, eCX_reg
251#define eDX OP_IMREG, eDX_reg
252#define eSP OP_IMREG, eSP_reg
253#define eBP OP_IMREG, eBP_reg
254#define eSI OP_IMREG, eSI_reg
255#define eDI OP_IMREG, eDI_reg
256#define AL OP_IMREG, al_reg
257#define AL OP_IMREG, al_reg
258#define CL OP_IMREG, cl_reg
259#define DL OP_IMREG, dl_reg
260#define BL OP_IMREG, bl_reg
261#define AH OP_IMREG, ah_reg
262#define CH OP_IMREG, ch_reg
263#define DH OP_IMREG, dh_reg
264#define BH OP_IMREG, bh_reg
265#define AX OP_IMREG, ax_reg
266#define DX OP_IMREG, dx_reg
267#define indirDX OP_IMREG, indir_dx_reg
252b5132
RH		 268
269#define Sw OP_SEG, w_mode
c608c12e 270#define Ap OP_DIR, 0
252b5132 271#define Ob OP_OFF, b_mode
52b15da3 272#define Ob64 OP_OFF64, b_mode
252b5132 273#define Ov OP_OFF, v_mode
52b15da3 274#define Ov64 OP_OFF64, v_mode
252b5132
RH		 275#define Xb OP_DSreg, eSI_reg
276#define Xv OP_DSreg, eSI_reg
277#define Yb OP_ESreg, eDI_reg
278#define Yv OP_ESreg, eDI_reg
279#define DSBX OP_DSreg, eBX_reg
280
281#define es OP_REG, es_reg
282#define ss OP_REG, ss_reg
283#define cs OP_REG, cs_reg
284#define ds OP_REG, ds_reg
285#define fs OP_REG, fs_reg
286#define gs OP_REG, gs_reg
287
288#define MX OP_MMX, 0
c608c12e 289#define XM OP_XMM, 0
252b5132 290#define EM OP_EM, v_mode
c608c12e 291#define EX OP_EX, v_mode
2da11e11 292#define MS OP_MS, v_mode
992aaec9 293#define XS OP_XS, v_mode
c608c12e 294#define None OP_E, 0
252b5132 295#define OPSUF OP_3DNowSuffix, 0
c608c12e 296#define OPSIMD OP_SIMD_Suffix, 0
252b5132 297
3ffd33cf
AM		 298#define cond_jump_flag NULL, cond_jump_mode
299#define loop_jcxz_flag NULL, loop_jcxz_mode
300
252b5132 301/* bits in sizeflag */
252b5132 302#define SUFFIX_ALWAYS 4
252b5132
RH		 303#define AFLAG 2
304#define DFLAG 1
305
52b15da3
JH		 306#define b_mode 1 /* byte operand */
307#define v_mode 2 /* operand size depends on prefixes */
308#define w_mode 3 /* word operand */
309#define d_mode 4 /* double word operand */
310#define q_mode 5 /* quad word operand */
311#define x_mode 6
312#define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
3ffd33cf
AM		 313#define cond_jump_mode 8
314#define loop_jcxz_mode 9
db6eb5be 315#define dq_mode 10 /* operand size depends on REX prefixes. */
252b5132
RH		 316
317#define es_reg 100
318#define cs_reg 101
319#define ss_reg 102
320#define ds_reg 103
321#define fs_reg 104
322#define gs_reg 105
252b5132 323
c608c12e
AM		 324#define eAX_reg 108
325#define eCX_reg 109
326#define eDX_reg 110
327#define eBX_reg 111
328#define eSP_reg 112
329#define eBP_reg 113
330#define eSI_reg 114
331#define eDI_reg 115
252b5132
RH		 332
333#define al_reg 116
334#define cl_reg 117
335#define dl_reg 118
336#define bl_reg 119
337#define ah_reg 120
338#define ch_reg 121
339#define dh_reg 122
340#define bh_reg 123
341
342#define ax_reg 124
343#define cx_reg 125
344#define dx_reg 126
345#define bx_reg 127
346#define sp_reg 128
347#define bp_reg 129
348#define si_reg 130
349#define di_reg 131
350
52b15da3
JH		 351#define rAX_reg 132
352#define rCX_reg 133
353#define rDX_reg 134
354#define rBX_reg 135
355#define rSP_reg 136
356#define rBP_reg 137
357#define rSI_reg 138
358#define rDI_reg 139
359
252b5132
RH		 360#define indir_dx_reg 150
361
6439fc28
AM		 362#define FLOATCODE 1
363#define USE_GROUPS 2
364#define USE_PREFIX_USER_TABLE 3
365#define X86_64_SPECIAL 4
0f10071e 366#define PADLOCK_SPECIAL 5
6439fc28
AM		 367
368#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
369
370#define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
371#define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
372#define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
373#define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
374#define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
375#define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
376#define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
377#define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
378#define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
379#define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
380#define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
381#define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
382#define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
383#define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
384#define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
385#define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
386#define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
387#define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
388#define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
389#define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
390#define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
391#define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
392#define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
0f10071e 393#define GRPPLOCK NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
6439fc28
AM		 394
395#define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
396#define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
397#define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
398#define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
399#define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
400#define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
401#define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
402#define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
403#define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
404#define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
405#define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
406#define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
407#define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
408#define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
409#define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
410#define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
411#define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
412#define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
413#define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
414#define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
415#define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
416#define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
417#define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
418#define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
419#define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
420#define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
421#define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
ca164297
L		 422#define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
423#define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
424#define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
425#define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
426#define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
427#define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
6439fc28
AM		 428
429#define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
430
0f10071e
ML		 431#define PADLOCK_0 NULL, NULL, PADLOCK_SPECIAL, NULL, 0, NULL, 0
432
26ca5450 433typedef void (*op_rtn) (int bytemode, int sizeflag);
252b5132
RH		 434
435struct dis386 {
2da11e11 436 const char *name;
252b5132
RH		 437 op_rtn op1;
438 int bytemode1;
439 op_rtn op2;
440 int bytemode2;
441 op_rtn op3;
442 int bytemode3;
443};
444
445/* Upper case letters in the instruction names here are macros.
446 'A' => print 'b' if no register operands or suffix_always is true
447 'B' => print 'b' if suffix_always is true
448 'E' => print 'e' if 32-bit form of jcxz
3ffd33cf 449 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
5dd0794d 450 'H' => print ",pt" or ",pn" branch hint
252b5132
RH		 451 'L' => print 'l' if suffix_always is true
452 'N' => print 'n' if instruction has no wait "prefix"
52b15da3
JH		 453 'O' => print 'd', or 'o'
454 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
e396998b
AM		 455 . or suffix_always is true. print 'q' if rex prefix is present.
456 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
457 . is true
52b15da3
JH		 458 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
459 'S' => print 'w', 'l' or 'q' if suffix_always is true
6439fc28
AM		 460 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
461 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
041bd2e0 462 'X' => print 's', 'd' depending on data16 prefix (for XMM)
10084519 463 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
76f227a5 464 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
52b15da3 465
6439fc28
AM		 466 Many of the above letters print nothing in Intel mode. See "putop"
467 for the details.
52b15da3 468
6439fc28
AM		 469 Braces '{' and '}', and vertical bars '|', indicate alternative
470 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
471 modes. In cases where there are only two alternatives, the X86_64
472 instruction is reserved, and "(bad)" is printed.
473*/
252b5132 474
6439fc28 475static const struct dis386 dis386[] = {
252b5132 476 /* 00 */
6439fc28
AM		 477 { "addB", Eb, Gb, XX },
478 { "addS", Ev, Gv, XX },
479 { "addB", Gb, Eb, XX },
480 { "addS", Gv, Ev, XX },
481 { "addB", AL, Ib, XX },
482 { "addS", eAX, Iv, XX },
483 { "push{T|}", es, XX, XX },
484 { "pop{T|}", es, XX, XX },
252b5132 485 /* 08 */
6439fc28
AM		 486 { "orB", Eb, Gb, XX },
487 { "orS", Ev, Gv, XX },
488 { "orB", Gb, Eb, XX },
489 { "orS", Gv, Ev, XX },
490 { "orB", AL, Ib, XX },
491 { "orS", eAX, Iv, XX },
492 { "push{T|}", cs, XX, XX },
493 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
252b5132 494 /* 10 */
6439fc28
AM		 495 { "adcB", Eb, Gb, XX },
496 { "adcS", Ev, Gv, XX },
497 { "adcB", Gb, Eb, XX },
498 { "adcS", Gv, Ev, XX },
499 { "adcB", AL, Ib, XX },
500 { "adcS", eAX, Iv, XX },
501 { "push{T|}", ss, XX, XX },
502 { "popT|}", ss, XX, XX },
252b5132 503 /* 18 */
6439fc28
AM		 504 { "sbbB", Eb, Gb, XX },
505 { "sbbS", Ev, Gv, XX },
506 { "sbbB", Gb, Eb, XX },
507 { "sbbS", Gv, Ev, XX },
508 { "sbbB", AL, Ib, XX },
509 { "sbbS", eAX, Iv, XX },
510 { "push{T|}", ds, XX, XX },
511 { "pop{T|}", ds, XX, XX },
252b5132 512 /* 20 */
6439fc28
AM		 513 { "andB", Eb, Gb, XX },
514 { "andS", Ev, Gv, XX },
515 { "andB", Gb, Eb, XX },
516 { "andS", Gv, Ev, XX },
517 { "andB", AL, Ib, XX },
518 { "andS", eAX, Iv, XX },
519 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
520 { "daa{|}", XX, XX, XX },
252b5132 521 /* 28 */
6439fc28
AM		 522 { "subB", Eb, Gb, XX },
523 { "subS", Ev, Gv, XX },
524 { "subB", Gb, Eb, XX },
525 { "subS", Gv, Ev, XX },
526 { "subB", AL, Ib, XX },
527 { "subS", eAX, Iv, XX },
528 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
529 { "das{|}", XX, XX, XX },
252b5132 530 /* 30 */
6439fc28
AM		 531 { "xorB", Eb, Gb, XX },
532 { "xorS", Ev, Gv, XX },
533 { "xorB", Gb, Eb, XX },
534 { "xorS", Gv, Ev, XX },
535 { "xorB", AL, Ib, XX },
536 { "xorS", eAX, Iv, XX },
537 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
538 { "aaa{|}", XX, XX, XX },
252b5132 539 /* 38 */
6439fc28
AM		 540 { "cmpB", Eb, Gb, XX },
541 { "cmpS", Ev, Gv, XX },
542 { "cmpB", Gb, Eb, XX },
543 { "cmpS", Gv, Ev, XX },
544 { "cmpB", AL, Ib, XX },
545 { "cmpS", eAX, Iv, XX },
546 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
547 { "aas{|}", XX, XX, XX },
252b5132 548 /* 40 */
6439fc28
AM		 549 { "inc{S|}", RMeAX, XX, XX },
550 { "inc{S|}", RMeCX, XX, XX },
551 { "inc{S|}", RMeDX, XX, XX },
552 { "inc{S|}", RMeBX, XX, XX },
553 { "inc{S|}", RMeSP, XX, XX },
554 { "inc{S|}", RMeBP, XX, XX },
555 { "inc{S|}", RMeSI, XX, XX },
556 { "inc{S|}", RMeDI, XX, XX },
252b5132 557 /* 48 */
6439fc28
AM		 558 { "dec{S|}", RMeAX, XX, XX },
559 { "dec{S|}", RMeCX, XX, XX },
560 { "dec{S|}", RMeDX, XX, XX },
561 { "dec{S|}", RMeBX, XX, XX },
562 { "dec{S|}", RMeSP, XX, XX },
563 { "dec{S|}", RMeBP, XX, XX },
564 { "dec{S|}", RMeSI, XX, XX },
565 { "dec{S|}", RMeDI, XX, XX },
252b5132 566 /* 50 */
6439fc28
AM		 567 { "pushS", RMrAX, XX, XX },
568 { "pushS", RMrCX, XX, XX },
569 { "pushS", RMrDX, XX, XX },
570 { "pushS", RMrBX, XX, XX },
571 { "pushS", RMrSP, XX, XX },
572 { "pushS", RMrBP, XX, XX },
573 { "pushS", RMrSI, XX, XX },
574 { "pushS", RMrDI, XX, XX },
252b5132 575 /* 58 */
6439fc28
AM		 576 { "popS", RMrAX, XX, XX },
577 { "popS", RMrCX, XX, XX },
578 { "popS", RMrDX, XX, XX },
579 { "popS", RMrBX, XX, XX },
580 { "popS", RMrSP, XX, XX },
581 { "popS", RMrBP, XX, XX },
582 { "popS", RMrSI, XX, XX },
583 { "popS", RMrDI, XX, XX },
252b5132 584 /* 60 */
6439fc28
AM		 585 { "pusha{P|}", XX, XX, XX },
586 { "popa{P|}", XX, XX, XX },
587 { "bound{S|}", Gv, Ma, XX },
588 { X86_64_0 },
589 { "(bad)", XX, XX, XX }, /* seg fs */
590 { "(bad)", XX, XX, XX }, /* seg gs */
591 { "(bad)", XX, XX, XX }, /* op size prefix */
592 { "(bad)", XX, XX, XX }, /* adr size prefix */
252b5132 593 /* 68 */
6439fc28
AM		 594 { "pushT", Iq, XX, XX },
595 { "imulS", Gv, Ev, Iv },
596 { "pushT", sIb, XX, XX },
597 { "imulS", Gv, Ev, sIb },
598 { "ins{b||b|}", Yb, indirDX, XX },
599 { "ins{R||R|}", Yv, indirDX, XX },
600 { "outs{b||b|}", indirDX, Xb, XX },
601 { "outs{R||R|}", indirDX, Xv, XX },
252b5132 602 /* 70 */
6439fc28
AM		 603 { "joH", Jb, XX, cond_jump_flag },
604 { "jnoH", Jb, XX, cond_jump_flag },
605 { "jbH", Jb, XX, cond_jump_flag },
606 { "jaeH", Jb, XX, cond_jump_flag },
607 { "jeH", Jb, XX, cond_jump_flag },
608 { "jneH", Jb, XX, cond_jump_flag },
609 { "jbeH", Jb, XX, cond_jump_flag },
610 { "jaH", Jb, XX, cond_jump_flag },
252b5132 611 /* 78 */
6439fc28
AM		 612 { "jsH", Jb, XX, cond_jump_flag },
613 { "jnsH", Jb, XX, cond_jump_flag },
614 { "jpH", Jb, XX, cond_jump_flag },
615 { "jnpH", Jb, XX, cond_jump_flag },
616 { "jlH", Jb, XX, cond_jump_flag },
617 { "jgeH", Jb, XX, cond_jump_flag },
618 { "jleH", Jb, XX, cond_jump_flag },
619 { "jgH", Jb, XX, cond_jump_flag },
252b5132
RH		 620 /* 80 */
621 { GRP1b },
622 { GRP1S },
6439fc28 623 { "(bad)", XX, XX, XX },
252b5132 624 { GRP1Ss },
6439fc28
AM		 625 { "testB", Eb, Gb, XX },
626 { "testS", Ev, Gv, XX },
627 { "xchgB", Eb, Gb, XX },
628 { "xchgS", Ev, Gv, XX },
252b5132 629 /* 88 */
6439fc28
AM		 630 { "movB", Eb, Gb, XX },
631 { "movS", Ev, Gv, XX },
632 { "movB", Gb, Eb, XX },
633 { "movS", Gv, Ev, XX },
634 { "movQ", Ev, Sw, XX },
635 { "leaS", Gv, M, XX },
636 { "movQ", Sw, Ev, XX },
637 { "popU", Ev, XX, XX },
252b5132 638 /* 90 */
6439fc28 639 { "nop", XX, XX, XX },
041bd2e0 640 /* FIXME: NOP with REPz prefix is called PAUSE. */
6439fc28
AM		 641 { "xchgS", RMeCX, eAX, XX },
642 { "xchgS", RMeDX, eAX, XX },
643 { "xchgS", RMeBX, eAX, XX },
644 { "xchgS", RMeSP, eAX, XX },
645 { "xchgS", RMeBP, eAX, XX },
646 { "xchgS", RMeSI, eAX, XX },
647 { "xchgS", RMeDI, eAX, XX },
252b5132 648 /* 98 */
6439fc28
AM		 649 { "cW{tR||tR|}", XX, XX, XX },
650 { "cR{tO||tO|}", XX, XX, XX },
651 { "lcall{T|}", Ap, XX, XX },
652 { "(bad)", XX, XX, XX }, /* fwait */
653 { "pushfT", XX, XX, XX },
654 { "popfT", XX, XX, XX },
655 { "sahf{|}", XX, XX, XX },
656 { "lahf{|}", XX, XX, XX },
252b5132 657 /* a0 */
6439fc28
AM		 658 { "movB", AL, Ob64, XX },
659 { "movS", eAX, Ov64, XX },
660 { "movB", Ob64, AL, XX },
661 { "movS", Ov64, eAX, XX },
662 { "movs{b||b|}", Yb, Xb, XX },
663 { "movs{R||R|}", Yv, Xv, XX },
664 { "cmps{b||b|}", Xb, Yb, XX },
665 { "cmps{R||R|}", Xv, Yv, XX },
252b5132 666 /* a8 */
6439fc28
AM		 667 { "testB", AL, Ib, XX },
668 { "testS", eAX, Iv, XX },
669 { "stosB", Yb, AL, XX },
670 { "stosS", Yv, eAX, XX },
671 { "lodsB", AL, Xb, XX },
672 { "lodsS", eAX, Xv, XX },
673 { "scasB", AL, Yb, XX },
674 { "scasS", eAX, Yv, XX },
252b5132 675 /* b0 */
6439fc28
AM		 676 { "movB", RMAL, Ib, XX },
677 { "movB", RMCL, Ib, XX },
678 { "movB", RMDL, Ib, XX },
679 { "movB", RMBL, Ib, XX },
680 { "movB", RMAH, Ib, XX },
681 { "movB", RMCH, Ib, XX },
682 { "movB", RMDH, Ib, XX },
683 { "movB", RMBH, Ib, XX },
252b5132 684 /* b8 */
6439fc28
AM		 685 { "movS", RMeAX, Iv64, XX },
686 { "movS", RMeCX, Iv64, XX },
687 { "movS", RMeDX, Iv64, XX },
688 { "movS", RMeBX, Iv64, XX },
689 { "movS", RMeSP, Iv64, XX },
690 { "movS", RMeBP, Iv64, XX },
691 { "movS", RMeSI, Iv64, XX },
692 { "movS", RMeDI, Iv64, XX },
252b5132
RH		 693 /* c0 */
694 { GRP2b },
695 { GRP2S },
6439fc28
AM		 696 { "retT", Iw, XX, XX },
697 { "retT", XX, XX, XX },
698 { "les{S|}", Gv, Mp, XX },
699 { "ldsS", Gv, Mp, XX },
700 { "movA", Eb, Ib, XX },
701 { "movQ", Ev, Iv, XX },
252b5132 702 /* c8 */
6439fc28
AM		 703 { "enterT", Iw, Ib, XX },
704 { "leaveT", XX, XX, XX },
705 { "lretP", Iw, XX, XX },
706 { "lretP", XX, XX, XX },
707 { "int3", XX, XX, XX },
708 { "int", Ib, XX, XX },
709 { "into{|}", XX, XX, XX },
710 { "iretP", XX, XX, XX },
252b5132
RH		 711 /* d0 */
712 { GRP2b_one },
713 { GRP2S_one },
714 { GRP2b_cl },
715 { GRP2S_cl },
6439fc28
AM		 716 { "aam{|}", sIb, XX, XX },
717 { "aad{|}", sIb, XX, XX },
718 { "(bad)", XX, XX, XX },
719 { "xlat", DSBX, XX, XX },
252b5132
RH		 720 /* d8 */
721 { FLOAT },
722 { FLOAT },
723 { FLOAT },
724 { FLOAT },
725 { FLOAT },
726 { FLOAT },
727 { FLOAT },
728 { FLOAT },
729 /* e0 */
6439fc28
AM		 730 { "loopneFH", Jb, XX, loop_jcxz_flag },
731 { "loopeFH", Jb, XX, loop_jcxz_flag },
732 { "loopFH", Jb, XX, loop_jcxz_flag },
733 { "jEcxzH", Jb, XX, loop_jcxz_flag },
734 { "inB", AL, Ib, XX },
735 { "inS", eAX, Ib, XX },
736 { "outB", Ib, AL, XX },
737 { "outS", Ib, eAX, XX },
252b5132 738 /* e8 */
6439fc28
AM		 739 { "callT", Jv, XX, XX },
740 { "jmpT", Jv, XX, XX },
741 { "ljmp{T|}", Ap, XX, XX },
742 { "jmp", Jb, XX, XX },
743 { "inB", AL, indirDX, XX },
744 { "inS", eAX, indirDX, XX },
745 { "outB", indirDX, AL, XX },
746 { "outS", indirDX, eAX, XX },
252b5132 747 /* f0 */
6439fc28 748 { "(bad)", XX, XX, XX }, /* lock prefix */
067186e4 749 { "icebp", XX, XX, XX },
6439fc28
AM		 750 { "(bad)", XX, XX, XX }, /* repne */
751 { "(bad)", XX, XX, XX }, /* repz */
752 { "hlt", XX, XX, XX },
753 { "cmc", XX, XX, XX },
252b5132
RH		 754 { GRP3b },
755 { GRP3S },
756 /* f8 */
6439fc28
AM		 757 { "clc", XX, XX, XX },
758 { "stc", XX, XX, XX },
759 { "cli", XX, XX, XX },
760 { "sti", XX, XX, XX },
761 { "cld", XX, XX, XX },
762 { "std", XX, XX, XX },
252b5132
RH		 763 { GRP4 },
764 { GRP5 },
765};
766
6439fc28 767static const struct dis386 dis386_twobyte[] = {
252b5132
RH		 768 /* 00 */
769 { GRP6 },
770 { GRP7 },
6439fc28
AM		 771 { "larS", Gv, Ew, XX },
772 { "lslS", Gv, Ew, XX },
773 { "(bad)", XX, XX, XX },
774 { "syscall", XX, XX, XX },
775 { "clts", XX, XX, XX },
776 { "sysretP", XX, XX, XX },
252b5132 777 /* 08 */
6439fc28
AM		 778 { "invd", XX, XX, XX },
779 { "wbinvd", XX, XX, XX },
780 { "(bad)", XX, XX, XX },
781 { "ud2a", XX, XX, XX },
782 { "(bad)", XX, XX, XX },
c608c12e 783 { GRPAMD },
6439fc28 784 { "femms", XX, XX, XX },
6608db57 785 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
252b5132 786 /* 10 */
c608c12e
AM		 787 { PREGRP8 },
788 { PREGRP9 },
ca164297 789 { PREGRP30 },
6439fc28
AM		 790 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
791 { "unpcklpX", XM, EX, XX },
792 { "unpckhpX", XM, EX, XX },
ca164297 793 { PREGRP31 },
6439fc28 794 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
252b5132 795 /* 18 */
c608c12e 796 { GRP14 },
6439fc28
AM		 797 { "(bad)", XX, XX, XX },
798 { "(bad)", XX, XX, XX },
799 { "(bad)", XX, XX, XX },
800 { "(bad)", XX, XX, XX },
801 { "(bad)", XX, XX, XX },
802 { "(bad)", XX, XX, XX },
803 { "(bad)", XX, XX, XX },
252b5132 804 /* 20 */
6439fc28
AM		 805 { "movL", Rm, Cm, XX },
806 { "movL", Rm, Dm, XX },
807 { "movL", Cm, Rm, XX },
808 { "movL", Dm, Rm, XX },
809 { "movL", Rd, Td, XX },
810 { "(bad)", XX, XX, XX },
811 { "movL", Td, Rd, XX },
812 { "(bad)", XX, XX, XX },
252b5132 813 /* 28 */
6439fc28
AM		 814 { "movapX", XM, EX, XX },
815 { "movapX", EX, XM, XX },
c608c12e 816 { PREGRP2 },
6439fc28 817 { "movntpX", Ev, XM, XX },
2da11e11 818 { PREGRP4 },
c608c12e 819 { PREGRP3 },
6439fc28
AM		 820 { "ucomisX", XM,EX, XX },
821 { "comisX", XM,EX, XX },
252b5132 822 /* 30 */
6439fc28
AM		 823 { "wrmsr", XX, XX, XX },
824 { "rdtsc", XX, XX, XX },
825 { "rdmsr", XX, XX, XX },
826 { "rdpmc", XX, XX, XX },
827 { "sysenter", XX, XX, XX },
828 { "sysexit", XX, XX, XX },
829 { "(bad)", XX, XX, XX },
830 { "(bad)", XX, XX, XX },
252b5132 831 /* 38 */
6439fc28
AM		 832 { "(bad)", XX, XX, XX },
833 { "(bad)", XX, XX, XX },
834 { "(bad)", XX, XX, XX },
835 { "(bad)", XX, XX, XX },
836 { "(bad)", XX, XX, XX },
837 { "(bad)", XX, XX, XX },
838 { "(bad)", XX, XX, XX },
839 { "(bad)", XX, XX, XX },
252b5132 840 /* 40 */
6439fc28
AM		 841 { "cmovo", Gv, Ev, XX },
842 { "cmovno", Gv, Ev, XX },
843 { "cmovb", Gv, Ev, XX },
844 { "cmovae", Gv, Ev, XX },
845 { "cmove", Gv, Ev, XX },
846 { "cmovne", Gv, Ev, XX },
847 { "cmovbe", Gv, Ev, XX },
848 { "cmova", Gv, Ev, XX },
252b5132 849 /* 48 */
6439fc28
AM		 850 { "cmovs", Gv, Ev, XX },
851 { "cmovns", Gv, Ev, XX },
852 { "cmovp", Gv, Ev, XX },
853 { "cmovnp", Gv, Ev, XX },
854 { "cmovl", Gv, Ev, XX },
855 { "cmovge", Gv, Ev, XX },
856 { "cmovle", Gv, Ev, XX },
857 { "cmovg", Gv, Ev, XX },
252b5132 858 /* 50 */
6439fc28 859 { "movmskpX", Gd, XS, XX },
c608c12e
AM		 860 { PREGRP13 },
861 { PREGRP12 },
862 { PREGRP11 },
6439fc28
AM		 863 { "andpX", XM, EX, XX },
864 { "andnpX", XM, EX, XX },
865 { "orpX", XM, EX, XX },
866 { "xorpX", XM, EX, XX },
252b5132 867 /* 58 */
c608c12e
AM		 868 { PREGRP0 },
869 { PREGRP10 },
041bd2e0
JH		 870 { PREGRP17 },
871 { PREGRP16 },
c608c12e
AM		 872 { PREGRP14 },
873 { PREGRP7 },
874 { PREGRP5 },
2da11e11 875 { PREGRP6 },
252b5132 876 /* 60 */
6439fc28
AM		 877 { "punpcklbw", MX, EM, XX },
878 { "punpcklwd", MX, EM, XX },
879 { "punpckldq", MX, EM, XX },
880 { "packsswb", MX, EM, XX },
881 { "pcmpgtb", MX, EM, XX },
882 { "pcmpgtw", MX, EM, XX },
883 { "pcmpgtd", MX, EM, XX },
884 { "packuswb", MX, EM, XX },
252b5132 885 /* 68 */
6439fc28
AM		 886 { "punpckhbw", MX, EM, XX },
887 { "punpckhwd", MX, EM, XX },
888 { "punpckhdq", MX, EM, XX },
889 { "packssdw", MX, EM, XX },
0f17484f 890 { PREGRP26 },
041bd2e0 891 { PREGRP24 },
db6eb5be 892 { "movd", MX, Edq, XX },
041bd2e0 893 { PREGRP19 },
252b5132 894 /* 70 */
041bd2e0 895 { PREGRP22 },
252b5132
RH		 896 { GRP10 },
897 { GRP11 },
898 { GRP12 },
6439fc28
AM		 899 { "pcmpeqb", MX, EM, XX },
900 { "pcmpeqw", MX, EM, XX },
901 { "pcmpeqd", MX, EM, XX },
902 { "emms", XX, XX, XX },
252b5132 903 /* 78 */
6439fc28
AM		 904 { "(bad)", XX, XX, XX },
905 { "(bad)", XX, XX, XX },
906 { "(bad)", XX, XX, XX },
907 { "(bad)", XX, XX, XX },
ca164297
L		 908 { PREGRP28 },
909 { PREGRP29 },
041bd2e0
JH		 910 { PREGRP23 },
911 { PREGRP20 },
252b5132 912 /* 80 */
6439fc28
AM		 913 { "joH", Jv, XX, cond_jump_flag },
914 { "jnoH", Jv, XX, cond_jump_flag },
915 { "jbH", Jv, XX, cond_jump_flag },
916 { "jaeH", Jv, XX, cond_jump_flag },
917 { "jeH", Jv, XX, cond_jump_flag },
918 { "jneH", Jv, XX, cond_jump_flag },
919 { "jbeH", Jv, XX, cond_jump_flag },
920 { "jaH", Jv, XX, cond_jump_flag },
252b5132 921 /* 88 */
6439fc28
AM		 922 { "jsH", Jv, XX, cond_jump_flag },
923 { "jnsH", Jv, XX, cond_jump_flag },
924 { "jpH", Jv, XX, cond_jump_flag },
925 { "jnpH", Jv, XX, cond_jump_flag },
926 { "jlH", Jv, XX, cond_jump_flag },
927 { "jgeH", Jv, XX, cond_jump_flag },
928 { "jleH", Jv, XX, cond_jump_flag },
929 { "jgH", Jv, XX, cond_jump_flag },
252b5132 930 /* 90 */
6439fc28
AM		 931 { "seto", Eb, XX, XX },
932 { "setno", Eb, XX, XX },
933 { "setb", Eb, XX, XX },
934 { "setae", Eb, XX, XX },
935 { "sete", Eb, XX, XX },
936 { "setne", Eb, XX, XX },
937 { "setbe", Eb, XX, XX },
938 { "seta", Eb, XX, XX },
252b5132 939 /* 98 */
6439fc28
AM		 940 { "sets", Eb, XX, XX },
941 { "setns", Eb, XX, XX },
942 { "setp", Eb, XX, XX },
943 { "setnp", Eb, XX, XX },
944 { "setl", Eb, XX, XX },
945 { "setge", Eb, XX, XX },
946 { "setle", Eb, XX, XX },
947 { "setg", Eb, XX, XX },
252b5132 948 /* a0 */
6439fc28
AM		 949 { "pushT", fs, XX, XX },
950 { "popT", fs, XX, XX },
951 { "cpuid", XX, XX, XX },
952 { "btS", Ev, Gv, XX },
953 { "shldS", Ev, Gv, Ib },
954 { "shldS", Ev, Gv, CL },
955 { "(bad)", XX, XX, XX },
0f10071e 956 { PADLOCK_0 },
252b5132 957 /* a8 */
6439fc28
AM		 958 { "pushT", gs, XX, XX },
959 { "popT", gs, XX, XX },
960 { "rsm", XX, XX, XX },
961 { "btsS", Ev, Gv, XX },
962 { "shrdS", Ev, Gv, Ib },
963 { "shrdS", Ev, Gv, CL },
252b5132 964 { GRP13 },
6439fc28 965 { "imulS", Gv, Ev, XX },
252b5132 966 /* b0 */
6439fc28
AM		 967 { "cmpxchgB", Eb, Gb, XX },
968 { "cmpxchgS", Ev, Gv, XX },
969 { "lssS", Gv, Mp, XX },
970 { "btrS", Ev, Gv, XX },
971 { "lfsS", Gv, Mp, XX },
972 { "lgsS", Gv, Mp, XX },
973 { "movz{bR|x|bR|x}", Gv, Eb, XX },
974 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
252b5132 975 /* b8 */
6439fc28
AM		 976 { "(bad)", XX, XX, XX },
977 { "ud2b", XX, XX, XX },
252b5132 978 { GRP8 },
6439fc28
AM		 979 { "btcS", Ev, Gv, XX },
980 { "bsfS", Gv, Ev, XX },
981 { "bsrS", Gv, Ev, XX },
982 { "movs{bR|x|bR|x}", Gv, Eb, XX },
983 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
252b5132 984 /* c0 */
6439fc28
AM		 985 { "xaddB", Eb, Gb, XX },
986 { "xaddS", Ev, Gv, XX },
c608c12e 987 { PREGRP1 },
6439fc28
AM		 988 { "movntiS", Ev, Gv, XX },
989 { "pinsrw", MX, Ed, Ib },
990 { "pextrw", Gd, MS, Ib },
991 { "shufpX", XM, EX, Ib },
252b5132
RH		 992 { GRP9 },
993 /* c8 */
6439fc28
AM		 994 { "bswap", RMeAX, XX, XX },
995 { "bswap", RMeCX, XX, XX },
996 { "bswap", RMeDX, XX, XX },
997 { "bswap", RMeBX, XX, XX },
998 { "bswap", RMeSP, XX, XX },
999 { "bswap", RMeBP, XX, XX },
1000 { "bswap", RMeSI, XX, XX },
1001 { "bswap", RMeDI, XX, XX },
252b5132 1002 /* d0 */
ca164297 1003 { PREGRP27 },
6439fc28
AM		 1004 { "psrlw", MX, EM, XX },
1005 { "psrld", MX, EM, XX },
1006 { "psrlq", MX, EM, XX },
1007 { "paddq", MX, EM, XX },
1008 { "pmullw", MX, EM, XX },
041bd2e0 1009 { PREGRP21 },
6439fc28 1010 { "pmovmskb", Gd, MS, XX },
252b5132 1011 /* d8 */
6439fc28
AM		 1012 { "psubusb", MX, EM, XX },
1013 { "psubusw", MX, EM, XX },
1014 { "pminub", MX, EM, XX },
1015 { "pand", MX, EM, XX },
1016 { "paddusb", MX, EM, XX },
1017 { "paddusw", MX, EM, XX },
1018 { "pmaxub", MX, EM, XX },
1019 { "pandn", MX, EM, XX },
252b5132 1020 /* e0 */
6439fc28
AM		 1021 { "pavgb", MX, EM, XX },
1022 { "psraw", MX, EM, XX },
1023 { "psrad", MX, EM, XX },
1024 { "pavgw", MX, EM, XX },
1025 { "pmulhuw", MX, EM, XX },
1026 { "pmulhw", MX, EM, XX },
041bd2e0 1027 { PREGRP15 },
0f17484f 1028 { PREGRP25 },
252b5132 1029 /* e8 */
6439fc28
AM		 1030 { "psubsb", MX, EM, XX },
1031 { "psubsw", MX, EM, XX },
1032 { "pminsw", MX, EM, XX },
1033 { "por", MX, EM, XX },
1034 { "paddsb", MX, EM, XX },
1035 { "paddsw", MX, EM, XX },
1036 { "pmaxsw", MX, EM, XX },
1037 { "pxor", MX, EM, XX },
252b5132 1038 /* f0 */
ca164297 1039 { PREGRP32 },
6439fc28
AM		 1040 { "psllw", MX, EM, XX },
1041 { "pslld", MX, EM, XX },
1042 { "psllq", MX, EM, XX },
1043 { "pmuludq", MX, EM, XX },
1044 { "pmaddwd", MX, EM, XX },
1045 { "psadbw", MX, EM, XX },
041bd2e0 1046 { PREGRP18 },
252b5132 1047 /* f8 */
6439fc28
AM		 1048 { "psubb", MX, EM, XX },
1049 { "psubw", MX, EM, XX },
1050 { "psubd", MX, EM, XX },
1051 { "psubq", MX, EM, XX },
1052 { "paddb", MX, EM, XX },
1053 { "paddw", MX, EM, XX },
1054 { "paddd", MX, EM, XX },
1055 { "(bad)", XX, XX, XX }
252b5132
RH		 1056};
1057
1058static const unsigned char onebyte_has_modrm[256] = {
c608c12e
AM		 1059 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1060 /* ------------------------------- */
1061 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1062 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1063 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1064 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1065 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1066 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1067 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1068 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1069 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1070 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1071 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1072 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1073 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1074 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1075 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1076 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1077 /* ------------------------------- */
1078 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1079};
1080
1081static const unsigned char twobyte_has_modrm[256] = {
c608c12e
AM		 1082 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1083 /* ------------------------------- */
252b5132 1084 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
c608c12e 1085 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
4bba6815 1086 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
252b5132
RH		 1087 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1088 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
4bba6815
AM		 1089 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1090 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
ca164297 1091 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,1,1,1,1, /* 7f */
252b5132
RH		 1092 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1093 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
4bba6815 1094 /* a0 */ 0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* af */
252b5132
RH		 1095 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1096 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
ca164297 1097 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
4bba6815 1098 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
ca164297 1099 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
c608c12e
AM		 1100 /* ------------------------------- */
1101 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1102};
1103
041bd2e0 1104static const unsigned char twobyte_uses_SSE_prefix[256] = {
c608c12e
AM		 1105 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1106 /* ------------------------------- */
1107 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
ca164297 1108 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
c608c12e
AM		 1109 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1110 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1111 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
041bd2e0
JH		 1112 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1113 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
ca164297 1114 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
c608c12e
AM		 1115 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1116 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1117 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1118 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1119 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
ca164297 1120 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
041bd2e0 1121 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
ca164297 1122 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
c608c12e
AM		 1123 /* ------------------------------- */
1124 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1125};
1126
1127static char obuf[100];
1128static char *obufp;
1129static char scratchbuf[100];
1130static unsigned char *start_codep;
1131static unsigned char *insn_codep;
1132static unsigned char *codep;
1133static disassemble_info *the_info;
1134static int mod;
1135static int rm;
1136static int reg;
4bba6815 1137static unsigned char need_modrm;
252b5132 1138
4bba6815
AM		 1139/* If we are accessing mod/rm/reg without need_modrm set, then the
1140 values are stale. Hitting this abort likely indicates that you
1141 need to update onebyte_has_modrm or twobyte_has_modrm. */
1142#define MODRM_CHECK if (!need_modrm) abort ()
1143
d708bcba
AM		 1144static const char **names64;
1145static const char **names32;
1146static const char **names16;
1147static const char **names8;
1148static const char **names8rex;
1149static const char **names_seg;
1150static const char **index16;
1151
1152static const char *intel_names64[] = {
1153 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1154 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1155};
1156static const char *intel_names32[] = {
1157 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1158 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1159};
1160static const char *intel_names16[] = {
1161 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1162 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1163};
1164static const char *intel_names8[] = {
1165 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1166};
1167static const char *intel_names8rex[] = {
1168 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1169 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1170};
1171static const char *intel_names_seg[] = {
1172 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1173};
1174static const char *intel_index16[] = {
1175 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1176};
1177
1178static const char *att_names64[] = {
1179 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
52b15da3
JH		 1180 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1181};
d708bcba
AM		 1182static const char *att_names32[] = {
1183 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
52b15da3 1184 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
252b5132 1185};
d708bcba
AM		 1186static const char *att_names16[] = {
1187 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
52b15da3 1188 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
252b5132 1189};
d708bcba
AM		 1190static const char *att_names8[] = {
1191 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
252b5132 1192};
d708bcba
AM		 1193static const char *att_names8rex[] = {
1194 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
52b15da3
JH		 1195 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1196};
d708bcba
AM		 1197static const char *att_names_seg[] = {
1198 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
252b5132 1199};
d708bcba
AM		 1200static const char *att_index16[] = {
1201 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
252b5132
RH		 1202};
1203
2da11e11 1204static const struct dis386 grps[][8] = {
252b5132
RH		 1205 /* GRP1b */
1206 {
57d91c3c
ILT		 1207 { "addA", Eb, Ib, XX },
1208 { "orA", Eb, Ib, XX },
1209 { "adcA", Eb, Ib, XX },
1210 { "sbbA", Eb, Ib, XX },
1211 { "andA", Eb, Ib, XX },
1212 { "subA", Eb, Ib, XX },
1213 { "xorA", Eb, Ib, XX },
1214 { "cmpA", Eb, Ib, XX }
252b5132
RH		 1215 },
1216 /* GRP1S */
1217 {
57d91c3c
ILT		 1218 { "addQ", Ev, Iv, XX },
1219 { "orQ", Ev, Iv, XX },
1220 { "adcQ", Ev, Iv, XX },
1221 { "sbbQ", Ev, Iv, XX },
1222 { "andQ", Ev, Iv, XX },
1223 { "subQ", Ev, Iv, XX },
1224 { "xorQ", Ev, Iv, XX },
1225 { "cmpQ", Ev, Iv, XX }
252b5132
RH		 1226 },
1227 /* GRP1Ss */
1228 {
57d91c3c
ILT		 1229 { "addQ", Ev, sIb, XX },
1230 { "orQ", Ev, sIb, XX },
1231 { "adcQ", Ev, sIb, XX },
1232 { "sbbQ", Ev, sIb, XX },
1233 { "andQ", Ev, sIb, XX },
1234 { "subQ", Ev, sIb, XX },
1235 { "xorQ", Ev, sIb, XX },
1236 { "cmpQ", Ev, sIb, XX }
252b5132
RH		 1237 },
1238 /* GRP2b */
1239 {
57d91c3c
ILT		 1240 { "rolA", Eb, Ib, XX },
1241 { "rorA", Eb, Ib, XX },
1242 { "rclA", Eb, Ib, XX },
1243 { "rcrA", Eb, Ib, XX },
1244 { "shlA", Eb, Ib, XX },
1245 { "shrA", Eb, Ib, XX },
1246 { "(bad)", XX, XX, XX },
1247 { "sarA", Eb, Ib, XX },
252b5132
RH		 1248 },
1249 /* GRP2S */
1250 {
57d91c3c
ILT		 1251 { "rolQ", Ev, Ib, XX },
1252 { "rorQ", Ev, Ib, XX },
1253 { "rclQ", Ev, Ib, XX },
1254 { "rcrQ", Ev, Ib, XX },
1255 { "shlQ", Ev, Ib, XX },
1256 { "shrQ", Ev, Ib, XX },
1257 { "(bad)", XX, XX, XX },
1258 { "sarQ", Ev, Ib, XX },
252b5132
RH		 1259 },
1260 /* GRP2b_one */
1261 {
57d91c3c
ILT		 1262 { "rolA", Eb, XX, XX },
1263 { "rorA", Eb, XX, XX },
1264 { "rclA", Eb, XX, XX },
1265 { "rcrA", Eb, XX, XX },
1266 { "shlA", Eb, XX, XX },
1267 { "shrA", Eb, XX, XX },
1268 { "(bad)", XX, XX, XX },
1269 { "sarA", Eb, XX, XX },
252b5132
RH		 1270 },
1271 /* GRP2S_one */
1272 {
57d91c3c
ILT		 1273 { "rolQ", Ev, XX, XX },
1274 { "rorQ", Ev, XX, XX },
1275 { "rclQ", Ev, XX, XX },
1276 { "rcrQ", Ev, XX, XX },
1277 { "shlQ", Ev, XX, XX },
1278 { "shrQ", Ev, XX, XX },
1279 { "(bad)", XX, XX, XX},
1280 { "sarQ", Ev, XX, XX },
252b5132
RH		 1281 },
1282 /* GRP2b_cl */
1283 {
57d91c3c
ILT		 1284 { "rolA", Eb, CL, XX },
1285 { "rorA", Eb, CL, XX },
1286 { "rclA", Eb, CL, XX },
1287 { "rcrA", Eb, CL, XX },
1288 { "shlA", Eb, CL, XX },
1289 { "shrA", Eb, CL, XX },
1290 { "(bad)", XX, XX, XX },
1291 { "sarA", Eb, CL, XX },
252b5132
RH		 1292 },
1293 /* GRP2S_cl */
1294 {
57d91c3c
ILT		 1295 { "rolQ", Ev, CL, XX },
1296 { "rorQ", Ev, CL, XX },
1297 { "rclQ", Ev, CL, XX },
1298 { "rcrQ", Ev, CL, XX },
1299 { "shlQ", Ev, CL, XX },
1300 { "shrQ", Ev, CL, XX },
1301 { "(bad)", XX, XX, XX },
1302 { "sarQ", Ev, CL, XX }
252b5132
RH		 1303 },
1304 /* GRP3b */
1305 {
57d91c3c
ILT		 1306 { "testA", Eb, Ib, XX },
1307 { "(bad)", Eb, XX, XX },
1308 { "notA", Eb, XX, XX },
1309 { "negA", Eb, XX, XX },
8227b51f
AM		 1310 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1311 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1312 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1313 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
252b5132
RH		 1314 },
1315 /* GRP3S */
1316 {
57d91c3c
ILT		 1317 { "testQ", Ev, Iv, XX },
1318 { "(bad)", XX, XX, XX },
1319 { "notQ", Ev, XX, XX },
1320 { "negQ", Ev, XX, XX },
8227b51f
AM		 1321 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1322 { "imulQ", Ev, XX, XX },
1323 { "divQ", Ev, XX, XX },
1324 { "idivQ", Ev, XX, XX },
252b5132
RH		 1325 },
1326 /* GRP4 */
1327 {
57d91c3c
ILT		 1328 { "incA", Eb, XX, XX },
1329 { "decA", Eb, XX, XX },
1330 { "(bad)", XX, XX, XX },
1331 { "(bad)", XX, XX, XX },
1332 { "(bad)", XX, XX, XX },
1333 { "(bad)", XX, XX, XX },
1334 { "(bad)", XX, XX, XX },
1335 { "(bad)", XX, XX, XX },
252b5132
RH		 1336 },
1337 /* GRP5 */
1338 {
57d91c3c
ILT		 1339 { "incQ", Ev, XX, XX },
1340 { "decQ", Ev, XX, XX },
6439fc28
AM		 1341 { "callT", indirEv, XX, XX },
1342 { "lcallT", indirEv, XX, XX },
1343 { "jmpT", indirEv, XX, XX },
1344 { "ljmpT", indirEv, XX, XX },
1345 { "pushU", Ev, XX, XX },
57d91c3c 1346 { "(bad)", XX, XX, XX },
252b5132
RH		 1347 },
1348 /* GRP6 */
1349 {
e5470cdc
AM		 1350 { "sldtQ", Ev, XX, XX },
1351 { "strQ", Ev, XX, XX },
57d91c3c
ILT		 1352 { "lldt", Ew, XX, XX },
1353 { "ltr", Ew, XX, XX },
1354 { "verr", Ew, XX, XX },
1355 { "verw", Ew, XX, XX },
1356 { "(bad)", XX, XX, XX },
1357 { "(bad)", XX, XX, XX }
252b5132
RH		 1358 },
1359 /* GRP7 */
1360 {
bcb5558b 1361 { "sgdtQ", M, XX, XX },
ca164297 1362 { "sidtQ", PNI_Fixup, 0, XX, XX },
bcb5558b
AM		 1363 { "lgdtQ", M, XX, XX },
1364 { "lidtQ", M, XX, XX },
e5470cdc 1365 { "smswQ", Ev, XX, XX },
bcb5558b
AM		 1366 { "(bad)", XX, XX, XX },
1367 { "lmsw", Ew, XX, XX },
1368 { "invlpg", Ew, XX, XX },
252b5132
RH		 1369 },
1370 /* GRP8 */
1371 {
57d91c3c
ILT		 1372 { "(bad)", XX, XX, XX },
1373 { "(bad)", XX, XX, XX },
1374 { "(bad)", XX, XX, XX },
1375 { "(bad)", XX, XX, XX },
1376 { "btQ", Ev, Ib, XX },
1377 { "btsQ", Ev, Ib, XX },
1378 { "btrQ", Ev, Ib, XX },
1379 { "btcQ", Ev, Ib, XX },
252b5132
RH		 1380 },
1381 /* GRP9 */
1382 {
57d91c3c
ILT		 1383 { "(bad)", XX, XX, XX },
1384 { "cmpxchg8b", Ev, XX, XX },
1385 { "(bad)", XX, XX, XX },
1386 { "(bad)", XX, XX, XX },
1387 { "(bad)", XX, XX, XX },
1388 { "(bad)", XX, XX, XX },
1389 { "(bad)", XX, XX, XX },
1390 { "(bad)", XX, XX, XX },
252b5132
RH		 1391 },
1392 /* GRP10 */
1393 {
57d91c3c
ILT		 1394 { "(bad)", XX, XX, XX },
1395 { "(bad)", XX, XX, XX },
1396 { "psrlw", MS, Ib, XX },
1397 { "(bad)", XX, XX, XX },
1398 { "psraw", MS, Ib, XX },
1399 { "(bad)", XX, XX, XX },
1400 { "psllw", MS, Ib, XX },
1401 { "(bad)", XX, XX, XX },
252b5132
RH		 1402 },
1403 /* GRP11 */
1404 {
57d91c3c
ILT		 1405 { "(bad)", XX, XX, XX },
1406 { "(bad)", XX, XX, XX },
1407 { "psrld", MS, Ib, XX },
1408 { "(bad)", XX, XX, XX },
1409 { "psrad", MS, Ib, XX },
1410 { "(bad)", XX, XX, XX },
1411 { "pslld", MS, Ib, XX },
1412 { "(bad)", XX, XX, XX },
252b5132
RH		 1413 },
1414 /* GRP12 */
1415 {
57d91c3c
ILT		 1416 { "(bad)", XX, XX, XX },
1417 { "(bad)", XX, XX, XX },
1418 { "psrlq", MS, Ib, XX },
041bd2e0 1419 { "psrldq", MS, Ib, XX },
57d91c3c
ILT		 1420 { "(bad)", XX, XX, XX },
1421 { "(bad)", XX, XX, XX },
1422 { "psllq", MS, Ib, XX },
041bd2e0 1423 { "pslldq", MS, Ib, XX },
252b5132
RH		 1424 },
1425 /* GRP13 */
1426 {
57d91c3c
ILT		 1427 { "fxsave", Ev, XX, XX },
1428 { "fxrstor", Ev, XX, XX },
1429 { "ldmxcsr", Ev, XX, XX },
1430 { "stmxcsr", Ev, XX, XX },
1431 { "(bad)", XX, XX, XX },
041bd2e0
JH		 1432 { "lfence", None, XX, XX },
1433 { "mfence", None, XX, XX },
c02908d2 1434 { "clflush", None, XX, XX },
c608c12e
AM		 1435 },
1436 /* GRP14 */
1437 {
57d91c3c
ILT		 1438 { "prefetchnta", Ev, XX, XX },
1439 { "prefetcht0", Ev, XX, XX },
1440 { "prefetcht1", Ev, XX, XX },
1441 { "prefetcht2", Ev, XX, XX },
1442 { "(bad)", XX, XX, XX },
1443 { "(bad)", XX, XX, XX },
1444 { "(bad)", XX, XX, XX },
1445 { "(bad)", XX, XX, XX },
252b5132 1446 },
c608c12e 1447 /* GRPAMD */
252b5132 1448 {
57d91c3c
ILT		 1449 { "prefetch", Eb, XX, XX },
1450 { "prefetchw", Eb, XX, XX },
1451 { "(bad)", XX, XX, XX },
1452 { "(bad)", XX, XX, XX },
1453 { "(bad)", XX, XX, XX },
1454 { "(bad)", XX, XX, XX },
1455 { "(bad)", XX, XX, XX },
1456 { "(bad)", XX, XX, XX },
0f10071e
ML		 1457 },
1458 /* GRPPLOCK */
1459 {
1460 { "xstore", XX, XX, XX },
1461 { "xcryptecb", XX, XX, XX },
1462 { "xcryptcbc", XX, XX, XX },
1463 { "(bad)", XX, XX, XX },
1464 { "xcryptcfb", XX, XX, XX },
1465 { "xcryptofb", XX, XX, XX },
1466 { "(bad)", XX, XX, XX },
1467 { "(bad)", XX, XX, XX },
252b5132 1468 }
252b5132
RH		 1469};
1470
041bd2e0 1471static const struct dis386 prefix_user_table[][4] = {
c608c12e
AM		 1472 /* PREGRP0 */
1473 {
57d91c3c
ILT		 1474 { "addps", XM, EX, XX },
1475 { "addss", XM, EX, XX },
041bd2e0
JH		 1476 { "addpd", XM, EX, XX },
1477 { "addsd", XM, EX, XX },
c608c12e
AM		 1478 },
1479 /* PREGRP1 */
1480 {
6608db57 1481 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
c608c12e 1482 { "", XM, EX, OPSIMD },
041bd2e0
JH		 1483 { "", XM, EX, OPSIMD },
1484 { "", XM, EX, OPSIMD },
c608c12e
AM		 1485 },
1486 /* PREGRP2 */
1487 {
57d91c3c 1488 { "cvtpi2ps", XM, EM, XX },
76f227a5 1489 { "cvtsi2ssY", XM, Ev, XX },
041bd2e0 1490 { "cvtpi2pd", XM, EM, XX },
76f227a5 1491 { "cvtsi2sdY", XM, Ev, XX },
c608c12e
AM		 1492 },
1493 /* PREGRP3 */
1494 {
57d91c3c 1495 { "cvtps2pi", MX, EX, XX },
76f227a5 1496 { "cvtss2siY", Gv, EX, XX },
041bd2e0 1497 { "cvtpd2pi", MX, EX, XX },
76f227a5 1498 { "cvtsd2siY", Gv, EX, XX },
c608c12e
AM		 1499 },
1500 /* PREGRP4 */
1501 {
57d91c3c 1502 { "cvttps2pi", MX, EX, XX },
76f227a5 1503 { "cvttss2siY", Gv, EX, XX },
041bd2e0 1504 { "cvttpd2pi", MX, EX, XX },
76f227a5 1505 { "cvttsd2siY", Gv, EX, XX },
c608c12e
AM		 1506 },
1507 /* PREGRP5 */
1508 {
57d91c3c
ILT		 1509 { "divps", XM, EX, XX },
1510 { "divss", XM, EX, XX },
041bd2e0
JH		 1511 { "divpd", XM, EX, XX },
1512 { "divsd", XM, EX, XX },
c608c12e
AM		 1513 },
1514 /* PREGRP6 */
1515 {
57d91c3c
ILT		 1516 { "maxps", XM, EX, XX },
1517 { "maxss", XM, EX, XX },
041bd2e0
JH		 1518 { "maxpd", XM, EX, XX },
1519 { "maxsd", XM, EX, XX },
c608c12e
AM		 1520 },
1521 /* PREGRP7 */
1522 {
57d91c3c
ILT		 1523 { "minps", XM, EX, XX },
1524 { "minss", XM, EX, XX },
041bd2e0
JH		 1525 { "minpd", XM, EX, XX },
1526 { "minsd", XM, EX, XX },
c608c12e
AM		 1527 },
1528 /* PREGRP8 */
1529 {
57d91c3c
ILT		 1530 { "movups", XM, EX, XX },
1531 { "movss", XM, EX, XX },
041bd2e0
JH		 1532 { "movupd", XM, EX, XX },
1533 { "movsd", XM, EX, XX },
c608c12e
AM		 1534 },
1535 /* PREGRP9 */
1536 {
57d91c3c
ILT		 1537 { "movups", EX, XM, XX },
1538 { "movss", EX, XM, XX },
041bd2e0
JH		 1539 { "movupd", EX, XM, XX },
1540 { "movsd", EX, XM, XX },
c608c12e
AM		 1541 },
1542 /* PREGRP10 */
1543 {
57d91c3c
ILT		 1544 { "mulps", XM, EX, XX },
1545 { "mulss", XM, EX, XX },
041bd2e0
JH		 1546 { "mulpd", XM, EX, XX },
1547 { "mulsd", XM, EX, XX },
c608c12e
AM		 1548 },
1549 /* PREGRP11 */
1550 {
57d91c3c
ILT		 1551 { "rcpps", XM, EX, XX },
1552 { "rcpss", XM, EX, XX },
041bd2e0
JH		 1553 { "(bad)", XM, EX, XX },
1554 { "(bad)", XM, EX, XX },
c608c12e
AM		 1555 },
1556 /* PREGRP12 */
1557 {
57d91c3c
ILT		 1558 { "rsqrtps", XM, EX, XX },
1559 { "rsqrtss", XM, EX, XX },
041bd2e0
JH		 1560 { "(bad)", XM, EX, XX },
1561 { "(bad)", XM, EX, XX },
c608c12e
AM		 1562 },
1563 /* PREGRP13 */
1564 {
57d91c3c
ILT		 1565 { "sqrtps", XM, EX, XX },
1566 { "sqrtss", XM, EX, XX },
041bd2e0
JH		 1567 { "sqrtpd", XM, EX, XX },
1568 { "sqrtsd", XM, EX, XX },
c608c12e
AM		 1569 },
1570 /* PREGRP14 */
1571 {
57d91c3c
ILT		 1572 { "subps", XM, EX, XX },
1573 { "subss", XM, EX, XX },
041bd2e0
JH		 1574 { "subpd", XM, EX, XX },
1575 { "subsd", XM, EX, XX },
1576 },
1577 /* PREGRP15 */
1578 {
1579 { "(bad)", XM, EX, XX },
1580 { "cvtdq2pd", XM, EX, XX },
1581 { "cvttpd2dq", XM, EX, XX },
1582 { "cvtpd2dq", XM, EX, XX },
1583 },
1584 /* PREGRP16 */
1585 {
1586 { "cvtdq2ps", XM, EX, XX },
1587 { "cvttps2dq",XM, EX, XX },
1588 { "cvtps2dq",XM, EX, XX },
1589 { "(bad)", XM, EX, XX },
1590 },
1591 /* PREGRP17 */
1592 {
1593 { "cvtps2pd", XM, EX, XX },
1594 { "cvtss2sd", XM, EX, XX },
1595 { "cvtpd2ps", XM, EX, XX },
1596 { "cvtsd2ss", XM, EX, XX },
1597 },
1598 /* PREGRP18 */
1599 {
992aaec9 1600 { "maskmovq", MX, MS, XX },
041bd2e0 1601 { "(bad)", XM, EX, XX },
0f17484f 1602 { "maskmovdqu", XM, EX, XX },
041bd2e0
JH		 1603 { "(bad)", XM, EX, XX },
1604 },
1605 /* PREGRP19 */
1606 {
1607 { "movq", MX, EM, XX },
1608 { "movdqu", XM, EX, XX },
1609 { "movdqa", XM, EX, XX },
1610 { "(bad)", XM, EX, XX },
1611 },
1612 /* PREGRP20 */
1613 {
1614 { "movq", EM, MX, XX },
1615 { "movdqu", EX, XM, XX },
1616 { "movdqa", EX, XM, XX },
1617 { "(bad)", EX, XM, XX },
1618 },
1619 /* PREGRP21 */
1620 {
1621 { "(bad)", EX, XM, XX },
67d6227d 1622 { "movq2dq", XM, MS, XX },
041bd2e0 1623 { "movq", EX, XM, XX },
67d6227d 1624 { "movdq2q", MX, XS, XX },
041bd2e0
JH		 1625 },
1626 /* PREGRP22 */
1627 {
1628 { "pshufw", MX, EM, Ib },
1629 { "pshufhw", XM, EX, Ib },
1630 { "pshufd", XM, EX, Ib },
1631 { "pshuflw", XM, EX, Ib },
1632 },
1633 /* PREGRP23 */
1634 {
db6eb5be 1635 { "movd", Edq, MX, XX },
67d6227d 1636 { "movq", XM, EX, XX },
db6eb5be 1637 { "movd", Edq, XM, XX },
0f17484f 1638 { "(bad)", Ed, XM, XX },
041bd2e0
JH		 1639 },
1640 /* PREGRP24 */
1641 {
0f17484f
AM		 1642 { "(bad)", MX, EX, XX },
1643 { "(bad)", XM, EX, XX },
041bd2e0 1644 { "punpckhqdq", XM, EX, XX },
0f17484f
AM		 1645 { "(bad)", XM, EX, XX },
1646 },
1647 /* PREGRP25 */
1648 {
1649 { "movntq", Ev, MX, XX },
1650 { "(bad)", Ev, XM, XX },
1651 { "movntdq", Ev, XM, XX },
1652 { "(bad)", Ev, XM, XX },
1653 },
1654 /* PREGRP26 */
1655 {
1656 { "(bad)", MX, EX, XX },
1657 { "(bad)", XM, EX, XX },
1658 { "punpcklqdq", XM, EX, XX },
1659 { "(bad)", XM, EX, XX },
041bd2e0 1660 },
ca164297
L		 1661 /* PREGRP27 */
1662 {
1663 { "(bad)", MX, EX, XX },
1664 { "(bad)", XM, EX, XX },
1665 { "addsubpd", XM, EX, XX },
1666 { "addsubps", XM, EX, XX },
1667 },
1668 /* PREGRP28 */
1669 {
1670 { "(bad)", MX, EX, XX },
1671 { "(bad)", XM, EX, XX },
1672 { "haddpd", XM, EX, XX },
1673 { "haddps", XM, EX, XX },
1674 },
1675 /* PREGRP29 */
1676 {
1677 { "(bad)", MX, EX, XX },
1678 { "(bad)", XM, EX, XX },
1679 { "hsubpd", XM, EX, XX },
1680 { "hsubps", XM, EX, XX },
1681 },
1682 /* PREGRP30 */
1683 {
1684 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1685 { "movsldup", XM, EX, XX },
1686 { "movlpd", XM, EX, XX },
1687 { "movddup", XM, EX, XX },
1688 },
1689 /* PREGRP31 */
1690 {
1691 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1692 { "movshdup", XM, EX, XX },
1693 { "movhpd", XM, EX, XX },
1694 { "(bad)", XM, EX, XX },
1695 },
1696 /* PREGRP32 */
1697 {
1698 { "(bad)", XM, EX, XX },
1699 { "(bad)", XM, EX, XX },
1700 { "(bad)", XM, EX, XX },
1701 { "lddqu", XM, M, XX },
1702 },
c608c12e
AM		 1703};
1704
6439fc28
AM		 1705static const struct dis386 x86_64_table[][2] = {
1706 {
1707 { "arpl", Ew, Gw, XX },
1708 { "movs{||lq|xd}", Gv, Ed, XX },
1709 },
1710};
1711
0f10071e
ML		 1712static const struct dis386 padlock_table[][8] = {
1713 {
1714 { "xstorerng", XX, XX, XX },
1715 { "xcryptecb", XX, XX, XX },
1716 { "xcryptcbc", XX, XX, XX },
1717 { "(bad)", XX, XX, XX },
1718 { "xcryptcfb", XX, XX, XX },
1719 { "xcryptofb", XX, XX, XX },
1720 { "(bad)", XX, XX, XX },
1721 { "(bad)", XX, XX, XX },
1722 },
1723};
1724
c608c12e
AM		 1725#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1726
252b5132 1727static void
26ca5450 1728ckprefix (void)
252b5132 1729{
52b15da3
JH		 1730 int newrex;
1731 rex = 0;
252b5132 1732 prefixes = 0;
7d421014 1733 used_prefixes = 0;
52b15da3 1734 rex_used = 0;
252b5132
RH		 1735 while (1)
1736 {
1737 FETCH_DATA (the_info, codep + 1);
52b15da3 1738 newrex = 0;
252b5132
RH		 1739 switch (*codep)
1740 {
52b15da3
JH		 1741 /* REX prefixes family. */
1742 case 0x40:
1743 case 0x41:
1744 case 0x42:
1745 case 0x43:
1746 case 0x44:
1747 case 0x45:
1748 case 0x46:
1749 case 0x47:
1750 case 0x48:
1751 case 0x49:
1752 case 0x4a:
1753 case 0x4b:
1754 case 0x4c:
1755 case 0x4d:
1756 case 0x4e:
1757 case 0x4f:
1758 if (mode_64bit)
1759 newrex = *codep;
1760 else
1761 return;
1762 break;
252b5132
RH		 1763 case 0xf3:
1764 prefixes |= PREFIX_REPZ;
1765 break;
1766 case 0xf2:
1767 prefixes |= PREFIX_REPNZ;
1768 break;
1769 case 0xf0:
1770 prefixes |= PREFIX_LOCK;
1771 break;
1772 case 0x2e:
1773 prefixes |= PREFIX_CS;
1774 break;
1775 case 0x36:
1776 prefixes |= PREFIX_SS;
1777 break;
1778 case 0x3e:
1779 prefixes |= PREFIX_DS;
1780 break;
1781 case 0x26:
1782 prefixes |= PREFIX_ES;
1783 break;
1784 case 0x64:
1785 prefixes |= PREFIX_FS;
1786 break;
1787 case 0x65:
1788 prefixes |= PREFIX_GS;
1789 break;
1790 case 0x66:
1791 prefixes |= PREFIX_DATA;
1792 break;
1793 case 0x67:
1794 prefixes |= PREFIX_ADDR;
1795 break;
5076851f 1796 case FWAIT_OPCODE:
252b5132
RH		 1797 /* fwait is really an instruction. If there are prefixes
1798 before the fwait, they belong to the fwait, *not* to the
1799 following instruction. */
1800 if (prefixes)
1801 {
1802 prefixes |= PREFIX_FWAIT;
1803 codep++;
1804 return;
1805 }
1806 prefixes = PREFIX_FWAIT;
1807 break;
1808 default:
1809 return;
1810 }
52b15da3
JH		 1811 /* Rex is ignored when followed by another prefix. */
1812 if (rex)
1813 {
1814 oappend (prefix_name (rex, 0));
1815 oappend (" ");
1816 }
1817 rex = newrex;
252b5132
RH		 1818 codep++;
1819 }
1820}
1821
7d421014
ILT		 1822/* Return the name of the prefix byte PREF, or NULL if PREF is not a
1823 prefix byte. */
1824
1825static const char *
26ca5450 1826prefix_name (int pref, int sizeflag)
7d421014
ILT		 1827{
1828 switch (pref)
1829 {
52b15da3
JH		 1830 /* REX prefixes family. */
1831 case 0x40:
1832 return "rex";
1833 case 0x41:
1834 return "rexZ";
1835 case 0x42:
1836 return "rexY";
1837 case 0x43:
1838 return "rexYZ";
1839 case 0x44:
1840 return "rexX";
1841 case 0x45:
1842 return "rexXZ";
1843 case 0x46:
1844 return "rexXY";
1845 case 0x47:
1846 return "rexXYZ";
1847 case 0x48:
1848 return "rex64";
1849 case 0x49:
1850 return "rex64Z";
1851 case 0x4a:
1852 return "rex64Y";
1853 case 0x4b:
1854 return "rex64YZ";
1855 case 0x4c:
1856 return "rex64X";
1857 case 0x4d:
1858 return "rex64XZ";
1859 case 0x4e:
1860 return "rex64XY";
1861 case 0x4f:
1862 return "rex64XYZ";
7d421014
ILT		 1863 case 0xf3:
1864 return "repz";
1865 case 0xf2:
1866 return "repnz";
1867 case 0xf0:
1868 return "lock";
1869 case 0x2e:
1870 return "cs";
1871 case 0x36:
1872 return "ss";
1873 case 0x3e:
1874 return "ds";
1875 case 0x26:
1876 return "es";
1877 case 0x64:
1878 return "fs";
1879 case 0x65:
1880 return "gs";
1881 case 0x66:
1882 return (sizeflag & DFLAG) ? "data16" : "data32";
1883 case 0x67:
c1a64871 1884 if (mode_64bit)
db6eb5be 1885 return (sizeflag & AFLAG) ? "addr32" : "addr64";
c1a64871 1886 else
db6eb5be 1887 return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32";
7d421014
ILT		 1888 case FWAIT_OPCODE:
1889 return "fwait";
1890 default:
1891 return NULL;
1892 }
1893}
1894
252b5132
RH		 1895static char op1out[100], op2out[100], op3out[100];
1896static int op_ad, op_index[3];
7081ff04
AJ		 1897static bfd_vma op_address[3];
1898static bfd_vma op_riprel[3];
52b15da3 1899static bfd_vma start_pc;
252b5132
RH		 1900\f
1901/*
1902 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1903 * (see topic "Redundant prefixes" in the "Differences from 8086"
1904 * section of the "Virtual 8086 Mode" chapter.)
1905 * 'pc' should be the address of this instruction, it will
1906 * be used to print the target address if this is a relative jump or call
1907 * The function returns the length of this instruction in bytes.
1908 */
1909
252b5132
RH		 1910static char intel_syntax;
1911static char open_char;
1912static char close_char;
1913static char separator_char;
1914static char scale_char;
1915
e396998b
AM		 1916/* Here for backwards compatibility. When gdb stops using
1917 print_insn_i386_att and print_insn_i386_intel these functions can
1918 disappear, and print_insn_i386 be merged into print_insn. */
252b5132 1919int
26ca5450 1920print_insn_i386_att (bfd_vma pc, disassemble_info *info)
252b5132
RH		 1921{
1922 intel_syntax = 0;
e396998b
AM		 1923
1924 return print_insn (pc, info);
252b5132
RH		 1925}
1926
1927int
26ca5450 1928print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
252b5132
RH		 1929{
1930 intel_syntax = 1;
e396998b
AM		 1931
1932 return print_insn (pc, info);
252b5132
RH		 1933}
1934
e396998b 1935int
26ca5450 1936print_insn_i386 (bfd_vma pc, disassemble_info *info)
e396998b
AM		 1937{
1938 intel_syntax = -1;
1939
1940 return print_insn (pc, info);
1941}
1942
1943static int
26ca5450 1944print_insn (bfd_vma pc, disassemble_info *info)
252b5132 1945{
2da11e11 1946 const struct dis386 *dp;
252b5132
RH		 1947 int i;
1948 int two_source_ops;
1949 char *first, *second, *third;
1950 int needcomma;
041bd2e0 1951 unsigned char uses_SSE_prefix;
e396998b
AM		 1952 int sizeflag;
1953 const char *p;
252b5132 1954 struct dis_private priv;
252b5132 1955
52b15da3
JH		 1956 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
1957 || info->mach == bfd_mach_x86_64);
1958
8373f971 1959 if (intel_syntax == (char) -1)
e396998b
AM		 1960 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
1961 || info->mach == bfd_mach_x86_64_intel_syntax);
1962
2da11e11 1963 if (info->mach == bfd_mach_i386_i386
52b15da3
JH		 1964 || info->mach == bfd_mach_x86_64
1965 || info->mach == bfd_mach_i386_i386_intel_syntax
1966 || info->mach == bfd_mach_x86_64_intel_syntax)
e396998b 1967 priv.orig_sizeflag = AFLAG | DFLAG;
2da11e11 1968 else if (info->mach == bfd_mach_i386_i8086)
e396998b 1969 priv.orig_sizeflag = 0;
2da11e11
AM		 1970 else
1971 abort ();
e396998b
AM		 1972
1973 for (p = info->disassembler_options; p != NULL; )
1974 {
fa405d97 1975 if (strncmp (p, "x86-64", 6) == 0)
e396998b
AM		 1976 {
1977 mode_64bit = 1;
1978 priv.orig_sizeflag = AFLAG | DFLAG;
1979 }
1980 else if (strncmp (p, "i386", 4) == 0)
1981 {
1982 mode_64bit = 0;
1983 priv.orig_sizeflag = AFLAG | DFLAG;
1984 }
1985 else if (strncmp (p, "i8086", 5) == 0)
1986 {
1987 mode_64bit = 0;
1988 priv.orig_sizeflag = 0;
1989 }
1990 else if (strncmp (p, "intel", 5) == 0)
1991 {
1992 intel_syntax = 1;
1993 }
1994 else if (strncmp (p, "att", 3) == 0)
1995 {
1996 intel_syntax = 0;
1997 }
1998 else if (strncmp (p, "addr", 4) == 0)
1999 {
2000 if (p[4] == '1' && p[5] == '6')
2001 priv.orig_sizeflag &= ~AFLAG;
2002 else if (p[4] == '3' && p[5] == '2')
2003 priv.orig_sizeflag |= AFLAG;
2004 }
2005 else if (strncmp (p, "data", 4) == 0)
2006 {
2007 if (p[4] == '1' && p[5] == '6')
2008 priv.orig_sizeflag &= ~DFLAG;
2009 else if (p[4] == '3' && p[5] == '2')
2010 priv.orig_sizeflag |= DFLAG;
2011 }
2012 else if (strncmp (p, "suffix", 6) == 0)
2013 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2014
2015 p = strchr (p, ',');
2016 if (p != NULL)
2017 p++;
2018 }
2019
2020 if (intel_syntax)
2021 {
2022 names64 = intel_names64;
2023 names32 = intel_names32;
2024 names16 = intel_names16;
2025 names8 = intel_names8;
2026 names8rex = intel_names8rex;
2027 names_seg = intel_names_seg;
2028 index16 = intel_index16;
2029 open_char = '[';
2030 close_char = ']';
2031 separator_char = '+';
2032 scale_char = '*';
2033 }
2034 else
2035 {
2036 names64 = att_names64;
2037 names32 = att_names32;
2038 names16 = att_names16;
2039 names8 = att_names8;
2040 names8rex = att_names8rex;
2041 names_seg = att_names_seg;
2042 index16 = att_index16;
2043 open_char = '(';
2044 close_char = ')';
2045 separator_char = ',';
2046 scale_char = ',';
2047 }
2da11e11 2048
4fe53c98 2049 /* The output looks better if we put 7 bytes on a line, since that
c608c12e 2050 puts most long word instructions on a single line. */
4fe53c98 2051 info->bytes_per_line = 7;
252b5132 2052
26ca5450 2053 info->private_data = &priv;
252b5132
RH		 2054 priv.max_fetched = priv.the_buffer;
2055 priv.insn_start = pc;
252b5132
RH		 2056
2057 obuf[0] = 0;
2058 op1out[0] = 0;
2059 op2out[0] = 0;
2060 op3out[0] = 0;
2061
2062 op_index[0] = op_index[1] = op_index[2] = -1;
2063
2064 the_info = info;
2065 start_pc = pc;
e396998b
AM		 2066 start_codep = priv.the_buffer;
2067 codep = priv.the_buffer;
252b5132 2068
5076851f
ILT		 2069 if (setjmp (priv.bailout) != 0)
2070 {
7d421014
ILT		 2071 const char *name;
2072
5076851f 2073 /* Getting here means we tried for data but didn't get it. That
e396998b
AM		 2074 means we have an incomplete instruction of some sort. Just
2075 print the first byte as a prefix or a .byte pseudo-op. */
2076 if (codep > priv.the_buffer)
5076851f 2077 {
e396998b 2078 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2079 if (name != NULL)
2080 (*info->fprintf_func) (info->stream, "%s", name);
2081 else
5076851f 2082 {
7d421014
ILT		 2083 /* Just print the first byte as a .byte instruction. */
2084 (*info->fprintf_func) (info->stream, ".byte 0x%x",
e396998b 2085 (unsigned int) priv.the_buffer[0]);
5076851f 2086 }
5076851f 2087
7d421014 2088 return 1;
5076851f
ILT		 2089 }
2090
2091 return -1;
2092 }
2093
52b15da3 2094 obufp = obuf;
252b5132
RH		 2095 ckprefix ();
2096
2097 insn_codep = codep;
e396998b 2098 sizeflag = priv.orig_sizeflag;
252b5132
RH		 2099
2100 FETCH_DATA (info, codep + 1);
2101 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2102
252b5132
RH		 2103 if ((prefixes & PREFIX_FWAIT)
2104 && ((*codep < 0xd8) || (*codep > 0xdf)))
2105 {
7d421014
ILT		 2106 const char *name;
2107
2108 /* fwait not followed by floating point instruction. Print the
db6eb5be 2109 first prefix, which is probably fwait itself. */
e396998b 2110 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2111 if (name == NULL)
2112 name = INTERNAL_DISASSEMBLER_ERROR;
2113 (*info->fprintf_func) (info->stream, "%s", name);
2114 return 1;
252b5132
RH		 2115 }
2116
252b5132
RH		 2117 if (*codep == 0x0f)
2118 {
2119 FETCH_DATA (info, codep + 2);
6439fc28 2120 dp = &dis386_twobyte[*++codep];
252b5132 2121 need_modrm = twobyte_has_modrm[*codep];
041bd2e0 2122 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
252b5132
RH		 2123 }
2124 else
2125 {
6439fc28 2126 dp = &dis386[*codep];
252b5132 2127 need_modrm = onebyte_has_modrm[*codep];
041bd2e0 2128 uses_SSE_prefix = 0;
252b5132
RH		 2129 }
2130 codep++;
2131
041bd2e0 2132 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
7d421014
ILT		 2133 {
2134 oappend ("repz ");
2135 used_prefixes |= PREFIX_REPZ;
2136 }
041bd2e0 2137 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
7d421014
ILT		 2138 {
2139 oappend ("repnz ");
2140 used_prefixes |= PREFIX_REPNZ;
2141 }
c608c12e 2142 if (prefixes & PREFIX_LOCK)
7d421014
ILT		 2143 {
2144 oappend ("lock ");
2145 used_prefixes |= PREFIX_LOCK;
2146 }
c608c12e 2147
c608c12e
AM		 2148 if (prefixes & PREFIX_ADDR)
2149 {
2150 sizeflag ^= AFLAG;
6439fc28 2151 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
3ffd33cf 2152 {
c1a64871 2153 if ((sizeflag & AFLAG) || mode_64bit)
3ffd33cf
AM		 2154 oappend ("addr32 ");
2155 else
2156 oappend ("addr16 ");
2157 used_prefixes |= PREFIX_ADDR;
2158 }
2159 }
2160
2161 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2162 {
2163 sizeflag ^= DFLAG;
6439fc28
AM		 2164 if (dp->bytemode3 == cond_jump_mode
2165 && dp->bytemode1 == v_mode
2166 && !intel_syntax)
3ffd33cf
AM		 2167 {
2168 if (sizeflag & DFLAG)
2169 oappend ("data32 ");
2170 else
2171 oappend ("data16 ");
2172 used_prefixes |= PREFIX_DATA;
2173 }
2174 }
2175
252b5132
RH		 2176 if (need_modrm)
2177 {
2178 FETCH_DATA (info, codep + 1);
2179 mod = (*codep >> 6) & 3;
2180 reg = (*codep >> 3) & 7;
2181 rm = *codep & 7;
2182 }
2183
2184 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2185 {
2186 dofloat (sizeflag);
2187 }
2188 else
2189 {
041bd2e0 2190 int index;
252b5132 2191 if (dp->name == NULL)
c608c12e 2192 {
6439fc28 2193 switch (dp->bytemode1)
c608c12e 2194 {
6439fc28
AM		 2195 case USE_GROUPS:
2196 dp = &grps[dp->bytemode2][reg];
2197 break;
2198
2199 case USE_PREFIX_USER_TABLE:
2200 index = 0;
2201 used_prefixes |= (prefixes & PREFIX_REPZ);
2202 if (prefixes & PREFIX_REPZ)
2203 index = 1;
2204 else
2205 {
2206 used_prefixes |= (prefixes & PREFIX_DATA);
2207 if (prefixes & PREFIX_DATA)
2208 index = 2;
2209 else
2210 {
2211 used_prefixes |= (prefixes & PREFIX_REPNZ);
2212 if (prefixes & PREFIX_REPNZ)
2213 index = 3;
2214 }
2215 }
2216 dp = &prefix_user_table[dp->bytemode2][index];
2217 break;
252b5132 2218
6439fc28
AM		 2219 case X86_64_SPECIAL:
2220 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2221 break;
252b5132 2222
0f10071e
ML		 2223 case PADLOCK_SPECIAL:
2224 FETCH_DATA (info, codep + 1);
2225 index = (*codep++ >> 3) & 0x07;
2226 dp = &padlock_table[dp->bytemode2][index];
2227 break;
2228
6439fc28
AM		 2229 default:
2230 oappend (INTERNAL_DISASSEMBLER_ERROR);
2231 break;
2232 }
2233 }
252b5132 2234
6439fc28
AM		 2235 if (putop (dp->name, sizeflag) == 0)
2236 {
2237 obufp = op1out;
2238 op_ad = 2;
2239 if (dp->op1)
6608db57 2240 (*dp->op1) (dp->bytemode1, sizeflag);
6439fc28
AM		 2241
2242 obufp = op2out;
2243 op_ad = 1;
2244 if (dp->op2)
6608db57 2245 (*dp->op2) (dp->bytemode2, sizeflag);
6439fc28
AM		 2246
2247 obufp = op3out;
2248 op_ad = 0;
2249 if (dp->op3)
6608db57 2250 (*dp->op3) (dp->bytemode3, sizeflag);
6439fc28 2251 }
252b5132
RH		 2252 }
2253
7d421014
ILT		 2254 /* See if any prefixes were not used. If so, print the first one
2255 separately. If we don't do this, we'll wind up printing an
2256 instruction stream which does not precisely correspond to the
2257 bytes we are disassembling. */
2258 if ((prefixes & ~used_prefixes) != 0)
2259 {
2260 const char *name;
2261
e396998b 2262 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2263 if (name == NULL)
2264 name = INTERNAL_DISASSEMBLER_ERROR;
2265 (*info->fprintf_func) (info->stream, "%s", name);
2266 return 1;
2267 }
52b15da3
JH		 2268 if (rex & ~rex_used)
2269 {
2270 const char *name;
e396998b 2271 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
52b15da3
JH		 2272 if (name == NULL)
2273 name = INTERNAL_DISASSEMBLER_ERROR;
2274 (*info->fprintf_func) (info->stream, "%s ", name);
2275 }
7d421014 2276
252b5132
RH		 2277 obufp = obuf + strlen (obuf);
2278 for (i = strlen (obuf); i < 6; i++)
2279 oappend (" ");
2280 oappend (" ");
2281 (*info->fprintf_func) (info->stream, "%s", obuf);
2282
2283 /* The enter and bound instructions are printed with operands in the same
2284 order as the intel book; everything else is printed in reverse order. */
2da11e11 2285 if (intel_syntax || two_source_ops)
252b5132
RH		 2286 {
2287 first = op1out;
2288 second = op2out;
2289 third = op3out;
2290 op_ad = op_index[0];
2291 op_index[0] = op_index[2];
2292 op_index[2] = op_ad;
2293 }
2294 else
2295 {
2296 first = op3out;
2297 second = op2out;
2298 third = op1out;
2299 }
2300 needcomma = 0;
2301 if (*first)
2302 {
52b15da3 2303 if (op_index[0] != -1 && !op_riprel[0])
252b5132
RH		 2304 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2305 else
2306 (*info->fprintf_func) (info->stream, "%s", first);
2307 needcomma = 1;
2308 }
2309 if (*second)
2310 {
2311 if (needcomma)
2312 (*info->fprintf_func) (info->stream, ",");
52b15da3 2313 if (op_index[1] != -1 && !op_riprel[1])
252b5132
RH		 2314 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2315 else
2316 (*info->fprintf_func) (info->stream, "%s", second);
2317 needcomma = 1;
2318 }
2319 if (*third)
2320 {
2321 if (needcomma)
2322 (*info->fprintf_func) (info->stream, ",");
52b15da3 2323 if (op_index[2] != -1 && !op_riprel[2])
252b5132
RH		 2324 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2325 else
2326 (*info->fprintf_func) (info->stream, "%s", third);
2327 }
52b15da3
JH		 2328 for (i = 0; i < 3; i++)
2329 if (op_index[i] != -1 && op_riprel[i])
2330 {
2331 (*info->fprintf_func) (info->stream, " # ");
2332 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2333 + op_address[op_index[i]]), info);
2334 }
e396998b 2335 return codep - priv.the_buffer;
252b5132
RH		 2336}
2337
6439fc28 2338static const char *float_mem[] = {
252b5132 2339 /* d8 */
6439fc28
AM		 2340 "fadd{s||s|}",
2341 "fmul{s||s|}",
2342 "fcom{s||s|}",
2343 "fcomp{s||s|}",
2344 "fsub{s||s|}",
2345 "fsubr{s||s|}",
2346 "fdiv{s||s|}",
2347 "fdivr{s||s|}",
db6eb5be 2348 /* d9 */
6439fc28 2349 "fld{s||s|}",
252b5132 2350 "(bad)",
6439fc28
AM		 2351 "fst{s||s|}",
2352 "fstp{s||s|}",
252b5132
RH		 2353 "fldenv",
2354 "fldcw",
2355 "fNstenv",
2356 "fNstcw",
2357 /* da */
6439fc28
AM		 2358 "fiadd{l||l|}",
2359 "fimul{l||l|}",
2360 "ficom{l||l|}",
2361 "ficomp{l||l|}",
2362 "fisub{l||l|}",
2363 "fisubr{l||l|}",
2364 "fidiv{l||l|}",
2365 "fidivr{l||l|}",
252b5132 2366 /* db */
6439fc28 2367 "fild{l||l|}",
ca164297 2368 "fisttp{l||l|}",
6439fc28
AM		 2369 "fist{l||l|}",
2370 "fistp{l||l|}",
252b5132 2371 "(bad)",
6439fc28 2372 "fld{t||t|}",
252b5132 2373 "(bad)",
6439fc28 2374 "fstp{t||t|}",
252b5132 2375 /* dc */
6439fc28
AM		 2376 "fadd{l||l|}",
2377 "fmul{l||l|}",
2378 "fcom{l||l|}",
2379 "fcomp{l||l|}",
2380 "fsub{l||l|}",
2381 "fsubr{l||l|}",
2382 "fdiv{l||l|}",
2383 "fdivr{l||l|}",
252b5132 2384 /* dd */
6439fc28 2385 "fld{l||l|}",
ca164297 2386 "fisttpll",
6439fc28
AM		 2387 "fst{l||l|}",
2388 "fstp{l||l|}",
252b5132
RH		 2389 "frstor",
2390 "(bad)",
2391 "fNsave",
2392 "fNstsw",
2393 /* de */
2394 "fiadd",
2395 "fimul",
2396 "ficom",
2397 "ficomp",
2398 "fisub",
2399 "fisubr",
2400 "fidiv",
2401 "fidivr",
2402 /* df */
2403 "fild",
ca164297 2404 "fisttp",
252b5132
RH		 2405 "fist",
2406 "fistp",
2407 "fbld",
6439fc28 2408 "fild{ll||ll|}",
252b5132
RH		 2409 "fbstp",
2410 "fistpll",
2411};
2412
2413#define ST OP_ST, 0
2414#define STi OP_STi, 0
2415
57d91c3c
ILT		 2416#define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2417#define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2418#define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2419#define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2420#define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2421#define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2422#define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2423#define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2424#define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
252b5132 2425
2da11e11 2426static const struct dis386 float_reg[][8] = {
252b5132
RH		 2427 /* d8 */
2428 {
57d91c3c
ILT		 2429 { "fadd", ST, STi, XX },
2430 { "fmul", ST, STi, XX },
2431 { "fcom", STi, XX, XX },
2432 { "fcomp", STi, XX, XX },
2433 { "fsub", ST, STi, XX },
2434 { "fsubr", ST, STi, XX },
2435 { "fdiv", ST, STi, XX },
2436 { "fdivr", ST, STi, XX },
252b5132
RH		 2437 },
2438 /* d9 */
2439 {
57d91c3c
ILT		 2440 { "fld", STi, XX, XX },
2441 { "fxch", STi, XX, XX },
252b5132 2442 { FGRPd9_2 },
57d91c3c 2443 { "(bad)", XX, XX, XX },
252b5132
RH		 2444 { FGRPd9_4 },
2445 { FGRPd9_5 },
2446 { FGRPd9_6 },
2447 { FGRPd9_7 },
2448 },
2449 /* da */
2450 {
57d91c3c
ILT		 2451 { "fcmovb", ST, STi, XX },
2452 { "fcmove", ST, STi, XX },
2453 { "fcmovbe",ST, STi, XX },
2454 { "fcmovu", ST, STi, XX },
2455 { "(bad)", XX, XX, XX },
252b5132 2456 { FGRPda_5 },
57d91c3c
ILT		 2457 { "(bad)", XX, XX, XX },
2458 { "(bad)", XX, XX, XX },
252b5132
RH		 2459 },
2460 /* db */
2461 {
57d91c3c
ILT		 2462 { "fcmovnb",ST, STi, XX },
2463 { "fcmovne",ST, STi, XX },
2464 { "fcmovnbe",ST, STi, XX },
2465 { "fcmovnu",ST, STi, XX },
252b5132 2466 { FGRPdb_4 },
57d91c3c
ILT		 2467 { "fucomi", ST, STi, XX },
2468 { "fcomi", ST, STi, XX },
2469 { "(bad)", XX, XX, XX },
252b5132
RH		 2470 },
2471 /* dc */
2472 {
57d91c3c
ILT		 2473 { "fadd", STi, ST, XX },
2474 { "fmul", STi, ST, XX },
2475 { "(bad)", XX, XX, XX },
2476 { "(bad)", XX, XX, XX },
252b5132 2477#if UNIXWARE_COMPAT
57d91c3c
ILT		 2478 { "fsub", STi, ST, XX },
2479 { "fsubr", STi, ST, XX },
2480 { "fdiv", STi, ST, XX },
2481 { "fdivr", STi, ST, XX },
252b5132 2482#else
57d91c3c
ILT		 2483 { "fsubr", STi, ST, XX },
2484 { "fsub", STi, ST, XX },
2485 { "fdivr", STi, ST, XX },
2486 { "fdiv", STi, ST, XX },
252b5132
RH		 2487#endif
2488 },
2489 /* dd */
2490 {
57d91c3c
ILT		 2491 { "ffree", STi, XX, XX },
2492 { "(bad)", XX, XX, XX },
2493 { "fst", STi, XX, XX },
2494 { "fstp", STi, XX, XX },
2495 { "fucom", STi, XX, XX },
2496 { "fucomp", STi, XX, XX },
2497 { "(bad)", XX, XX, XX },
2498 { "(bad)", XX, XX, XX },
252b5132
RH		 2499 },
2500 /* de */
2501 {
57d91c3c
ILT		 2502 { "faddp", STi, ST, XX },
2503 { "fmulp", STi, ST, XX },
2504 { "(bad)", XX, XX, XX },
252b5132
RH		 2505 { FGRPde_3 },
2506#if UNIXWARE_COMPAT
57d91c3c
ILT		 2507 { "fsubp", STi, ST, XX },
2508 { "fsubrp", STi, ST, XX },
2509 { "fdivp", STi, ST, XX },
2510 { "fdivrp", STi, ST, XX },
252b5132 2511#else
57d91c3c
ILT		 2512 { "fsubrp", STi, ST, XX },
2513 { "fsubp", STi, ST, XX },
2514 { "fdivrp", STi, ST, XX },
2515 { "fdivp", STi, ST, XX },
252b5132
RH		 2516#endif
2517 },
2518 /* df */
2519 {
c2419411 2520 { "ffreep", STi, XX, XX },
57d91c3c
ILT		 2521 { "(bad)", XX, XX, XX },
2522 { "(bad)", XX, XX, XX },
2523 { "(bad)", XX, XX, XX },
252b5132 2524 { FGRPdf_4 },
57d91c3c
ILT		 2525 { "fucomip",ST, STi, XX },
2526 { "fcomip", ST, STi, XX },
2527 { "(bad)", XX, XX, XX },
252b5132
RH		 2528 },
2529};
2530
252b5132
RH		 2531static char *fgrps[][8] = {
2532 /* d9_2 0 */
2533 {
2534 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2535 },
2536
2537 /* d9_4 1 */
2538 {
2539 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2540 },
2541
2542 /* d9_5 2 */
2543 {
2544 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2545 },
2546
2547 /* d9_6 3 */
2548 {
2549 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2550 },
2551
2552 /* d9_7 4 */
2553 {
2554 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2555 },
2556
2557 /* da_5 5 */
2558 {
2559 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2560 },
2561
2562 /* db_4 6 */
2563 {
2564 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2565 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2566 },
2567
2568 /* de_3 7 */
2569 {
2570 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2571 },
2572
2573 /* df_4 8 */
2574 {
2575 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2576 },
2577};
2578
2579static void
26ca5450 2580dofloat (int sizeflag)
252b5132 2581{
2da11e11 2582 const struct dis386 *dp;
252b5132
RH		 2583 unsigned char floatop;
2584
2585 floatop = codep[-1];
2586
2587 if (mod != 3)
2588 {
6608db57 2589 putop (float_mem[(floatop - 0xd8) * 8 + reg], sizeflag);
252b5132
RH		 2590 obufp = op1out;
2591 if (floatop == 0xdb)
db6eb5be 2592 OP_E (x_mode, sizeflag);
252b5132 2593 else if (floatop == 0xdd)
db6eb5be 2594 OP_E (d_mode, sizeflag);
2da11e11 2595 else
db6eb5be 2596 OP_E (v_mode, sizeflag);
252b5132
RH		 2597 return;
2598 }
6608db57 2599 /* Skip mod/rm byte. */
4bba6815 2600 MODRM_CHECK;
252b5132
RH		 2601 codep++;
2602
2603 dp = &float_reg[floatop - 0xd8][reg];
2604 if (dp->name == NULL)
2605 {
2606 putop (fgrps[dp->bytemode1][rm], sizeflag);
2607
6608db57 2608 /* Instruction fnstsw is only one with strange arg. */
252b5132
RH		 2609 if (floatop == 0xdf && codep[-1] == 0xe0)
2610 strcpy (op1out, names16[0]);
2611 }
2612 else
2613 {
2614 putop (dp->name, sizeflag);
2615
2616 obufp = op1out;
2617 if (dp->op1)
6608db57 2618 (*dp->op1) (dp->bytemode1, sizeflag);
252b5132
RH		 2619 obufp = op2out;
2620 if (dp->op2)
6608db57 2621 (*dp->op2) (dp->bytemode2, sizeflag);
252b5132
RH		 2622 }
2623}
2624
252b5132 2625static void
26ca5450 2626OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 2627{
2628 oappend ("%st");
2629}
2630
252b5132 2631static void
26ca5450 2632OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 2633{
2634 sprintf (scratchbuf, "%%st(%d)", rm);
d708bcba 2635 oappend (scratchbuf + intel_syntax);
252b5132
RH		 2636}
2637
6608db57 2638/* Capital letters in template are macros. */
6439fc28 2639static int
26ca5450 2640putop (const char *template, int sizeflag)
252b5132 2641{
2da11e11 2642 const char *p;
6439fc28 2643 int alt;
252b5132
RH		 2644
2645 for (p = template; *p; p++)
2646 {
2647 switch (*p)
2648 {
2649 default:
2650 *obufp++ = *p;
2651 break;
6439fc28
AM		 2652 case '{':
2653 alt = 0;
2654 if (intel_syntax)
2655 alt += 1;
2656 if (mode_64bit)
2657 alt += 2;
2658 while (alt != 0)
2659 {
2660 while (*++p != '|')
2661 {
2662 if (*p == '}')
2663 {
2664 /* Alternative not valid. */
2665 strcpy (obuf, "(bad)");
2666 obufp = obuf + 5;
2667 return 1;
2668 }
2669 else if (*p == '\0')
2670 abort ();
2671 }
2672 alt--;
2673 }
2674 break;
2675 case '|':
2676 while (*++p != '}')
2677 {
2678 if (*p == '\0')
2679 abort ();
2680 }
2681 break;
2682 case '}':
2683 break;
252b5132 2684 case 'A':
db6eb5be
AM		 2685 if (intel_syntax)
2686 break;
e396998b 2687 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132
RH		 2688 *obufp++ = 'b';
2689 break;
2690 case 'B':
db6eb5be
AM		 2691 if (intel_syntax)
2692 break;
252b5132
RH		 2693 if (sizeflag & SUFFIX_ALWAYS)
2694 *obufp++ = 'b';
252b5132
RH		 2695 break;
2696 case 'E': /* For jcxz/jecxz */
c1a64871
JH		 2697 if (mode_64bit)
2698 {
2699 if (sizeflag & AFLAG)
2700 *obufp++ = 'r';
2701 else
2702 *obufp++ = 'e';
2703 }
2704 else
2705 if (sizeflag & AFLAG)
2706 *obufp++ = 'e';
3ffd33cf
AM		 2707 used_prefixes |= (prefixes & PREFIX_ADDR);
2708 break;
2709 case 'F':
db6eb5be
AM		 2710 if (intel_syntax)
2711 break;
e396998b 2712 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
3ffd33cf
AM		 2713 {
2714 if (sizeflag & AFLAG)
c1a64871 2715 *obufp++ = mode_64bit ? 'q' : 'l';
3ffd33cf 2716 else
c1a64871 2717 *obufp++ = mode_64bit ? 'l' : 'w';
3ffd33cf
AM		 2718 used_prefixes |= (prefixes & PREFIX_ADDR);
2719 }
252b5132 2720 break;
5dd0794d 2721 case 'H':
db6eb5be
AM		 2722 if (intel_syntax)
2723 break;
5dd0794d
AM		 2724 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2725 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2726 {
2727 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2728 *obufp++ = ',';
2729 *obufp++ = 'p';
2730 if (prefixes & PREFIX_DS)
2731 *obufp++ = 't';
2732 else
2733 *obufp++ = 'n';
2734 }
2735 break;
252b5132 2736 case 'L':
db6eb5be
AM		 2737 if (intel_syntax)
2738 break;
252b5132
RH		 2739 if (sizeflag & SUFFIX_ALWAYS)
2740 *obufp++ = 'l';
252b5132
RH		 2741 break;
2742 case 'N':
2743 if ((prefixes & PREFIX_FWAIT) == 0)
2744 *obufp++ = 'n';
7d421014
ILT		 2745 else
2746 used_prefixes |= PREFIX_FWAIT;
252b5132 2747 break;
52b15da3
JH		 2748 case 'O':
2749 USED_REX (REX_MODE64);
2750 if (rex & REX_MODE64)
6439fc28 2751 *obufp++ = 'o';
52b15da3
JH		 2752 else
2753 *obufp++ = 'd';
2754 break;
6439fc28 2755 case 'T':
db6eb5be
AM		 2756 if (intel_syntax)
2757 break;
6439fc28
AM		 2758 if (mode_64bit)
2759 {
2760 *obufp++ = 'q';
2761 break;
2762 }
6608db57 2763 /* Fall through. */
252b5132 2764 case 'P':
db6eb5be
AM		 2765 if (intel_syntax)
2766 break;
252b5132 2767 if ((prefixes & PREFIX_DATA)
52b15da3 2768 || (rex & REX_MODE64)
e396998b 2769 || (sizeflag & SUFFIX_ALWAYS))
252b5132 2770 {
52b15da3
JH		 2771 USED_REX (REX_MODE64);
2772 if (rex & REX_MODE64)
2773 *obufp++ = 'q';
c2419411 2774 else
52b15da3
JH		 2775 {
2776 if (sizeflag & DFLAG)
2777 *obufp++ = 'l';
2778 else
2779 *obufp++ = 'w';
2780 used_prefixes |= (prefixes & PREFIX_DATA);
2781 }
252b5132
RH		 2782 }
2783 break;
6439fc28 2784 case 'U':
db6eb5be
AM		 2785 if (intel_syntax)
2786 break;
6439fc28
AM		 2787 if (mode_64bit)
2788 {
2789 *obufp++ = 'q';
2790 break;
2791 }
6608db57 2792 /* Fall through. */
252b5132 2793 case 'Q':
db6eb5be
AM		 2794 if (intel_syntax)
2795 break;
90530880 2796 USED_REX (REX_MODE64);
e396998b 2797 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132 2798 {
52b15da3
JH		 2799 if (rex & REX_MODE64)
2800 *obufp++ = 'q';
252b5132 2801 else
52b15da3
JH		 2802 {
2803 if (sizeflag & DFLAG)
2804 *obufp++ = 'l';
2805 else
2806 *obufp++ = 'w';
2807 used_prefixes |= (prefixes & PREFIX_DATA);
2808 }
252b5132
RH		 2809 }
2810 break;
2811 case 'R':
52b15da3 2812 USED_REX (REX_MODE64);
db6eb5be 2813 if (intel_syntax)
c608c12e 2814 {
52b15da3
JH		 2815 if (rex & REX_MODE64)
2816 {
2817 *obufp++ = 'q';
2818 *obufp++ = 't';
2819 }
2820 else if (sizeflag & DFLAG)
c608c12e
AM		 2821 {
2822 *obufp++ = 'd';
2823 *obufp++ = 'q';
2824 }
2825 else
2826 {
2827 *obufp++ = 'w';
2828 *obufp++ = 'd';
2829 }
2830 }
252b5132 2831 else
c608c12e 2832 {
52b15da3
JH		 2833 if (rex & REX_MODE64)
2834 *obufp++ = 'q';
2835 else if (sizeflag & DFLAG)
c608c12e
AM		 2836 *obufp++ = 'l';
2837 else
2838 *obufp++ = 'w';
2839 }
52b15da3
JH		 2840 if (!(rex & REX_MODE64))
2841 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 2842 break;
2843 case 'S':
db6eb5be
AM		 2844 if (intel_syntax)
2845 break;
252b5132
RH		 2846 if (sizeflag & SUFFIX_ALWAYS)
2847 {
52b15da3
JH		 2848 if (rex & REX_MODE64)
2849 *obufp++ = 'q';
252b5132 2850 else
52b15da3
JH		 2851 {
2852 if (sizeflag & DFLAG)
2853 *obufp++ = 'l';
2854 else
2855 *obufp++ = 'w';
2856 used_prefixes |= (prefixes & PREFIX_DATA);
2857 }
252b5132 2858 }
252b5132 2859 break;
041bd2e0
JH		 2860 case 'X':
2861 if (prefixes & PREFIX_DATA)
2862 *obufp++ = 'd';
2863 else
2864 *obufp++ = 's';
db6eb5be 2865 used_prefixes |= (prefixes & PREFIX_DATA);
041bd2e0 2866 break;
76f227a5 2867 case 'Y':
db6eb5be
AM		 2868 if (intel_syntax)
2869 break;
76f227a5
JH		 2870 if (rex & REX_MODE64)
2871 {
2872 USED_REX (REX_MODE64);
2873 *obufp++ = 'q';
2874 }
2875 break;
52b15da3 2876 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
252b5132 2877 case 'W':
252b5132 2878 /* operand size flag for cwtl, cbtw */
52b15da3
JH		 2879 USED_REX (0);
2880 if (rex)
2881 *obufp++ = 'l';
2882 else if (sizeflag & DFLAG)
252b5132
RH		 2883 *obufp++ = 'w';
2884 else
2885 *obufp++ = 'b';
db6eb5be 2886 if (intel_syntax)
c608c12e 2887 {
52b15da3
JH		 2888 if (rex)
2889 {
2890 *obufp++ = 'q';
2891 *obufp++ = 'e';
2892 }
c608c12e
AM		 2893 if (sizeflag & DFLAG)
2894 {
2895 *obufp++ = 'd';
2896 *obufp++ = 'e';
2897 }
2898 else
2899 {
2900 *obufp++ = 'w';
2901 }
2902 }
52b15da3
JH		 2903 if (!rex)
2904 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 2905 break;
2906 }
2907 }
2908 *obufp = 0;
6439fc28 2909 return 0;
252b5132
RH		 2910}
2911
2912static void
26ca5450 2913oappend (const char *s)
252b5132
RH		 2914{
2915 strcpy (obufp, s);
2916 obufp += strlen (s);
2917}
2918
2919static void
26ca5450 2920append_seg (void)
252b5132
RH		 2921{
2922 if (prefixes & PREFIX_CS)
7d421014 2923 {
7d421014 2924 used_prefixes |= PREFIX_CS;
d708bcba 2925 oappend ("%cs:" + intel_syntax);
7d421014 2926 }
252b5132 2927 if (prefixes & PREFIX_DS)
7d421014 2928 {
7d421014 2929 used_prefixes |= PREFIX_DS;
d708bcba 2930 oappend ("%ds:" + intel_syntax);
7d421014 2931 }
252b5132 2932 if (prefixes & PREFIX_SS)
7d421014 2933 {
7d421014 2934 used_prefixes |= PREFIX_SS;
d708bcba 2935 oappend ("%ss:" + intel_syntax);
7d421014 2936 }
252b5132 2937 if (prefixes & PREFIX_ES)
7d421014 2938 {
7d421014 2939 used_prefixes |= PREFIX_ES;
d708bcba 2940 oappend ("%es:" + intel_syntax);
7d421014 2941 }
252b5132 2942 if (prefixes & PREFIX_FS)
7d421014 2943 {
7d421014 2944 used_prefixes |= PREFIX_FS;
d708bcba 2945 oappend ("%fs:" + intel_syntax);
7d421014 2946 }
252b5132 2947 if (prefixes & PREFIX_GS)
7d421014 2948 {
7d421014 2949 used_prefixes |= PREFIX_GS;
d708bcba 2950 oappend ("%gs:" + intel_syntax);
7d421014 2951 }
252b5132
RH		 2952}
2953
2954static void
26ca5450 2955OP_indirE (int bytemode, int sizeflag)
252b5132
RH		 2956{
2957 if (!intel_syntax)
2958 oappend ("*");
2959 OP_E (bytemode, sizeflag);
2960}
2961
52b15da3 2962static void
26ca5450 2963print_operand_value (char *buf, int hex, bfd_vma disp)
52b15da3
JH		 2964{
2965 if (mode_64bit)
2966 {
2967 if (hex)
2968 {
2969 char tmp[30];
2970 int i;
2971 buf[0] = '0';
2972 buf[1] = 'x';
2973 sprintf_vma (tmp, disp);
6608db57 2974 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
52b15da3
JH		 2975 strcpy (buf + 2, tmp + i);
2976 }
2977 else
2978 {
2979 bfd_signed_vma v = disp;
2980 char tmp[30];
2981 int i;
2982 if (v < 0)
2983 {
2984 *(buf++) = '-';
2985 v = -disp;
6608db57 2986 /* Check for possible overflow on 0x8000000000000000. */
52b15da3
JH		 2987 if (v < 0)
2988 {
2989 strcpy (buf, "9223372036854775808");
2990 return;
2991 }
2992 }
2993 if (!v)
2994 {
2995 strcpy (buf, "0");
2996 return;
2997 }
2998
2999 i = 0;
3000 tmp[29] = 0;
3001 while (v)
3002 {
6608db57 3003 tmp[28 - i] = (v % 10) + '0';
52b15da3
JH		 3004 v /= 10;
3005 i++;
3006 }
3007 strcpy (buf, tmp + 29 - i);
3008 }
3009 }
3010 else
3011 {
3012 if (hex)
3013 sprintf (buf, "0x%x", (unsigned int) disp);
3014 else
3015 sprintf (buf, "%d", (int) disp);
3016 }
3017}
3018
252b5132 3019static void
26ca5450 3020OP_E (int bytemode, int sizeflag)
252b5132 3021{
52b15da3
JH		 3022 bfd_vma disp;
3023 int add = 0;
3024 int riprel = 0;
3025 USED_REX (REX_EXTZ);
3026 if (rex & REX_EXTZ)
3027 add += 8;
252b5132 3028
6608db57 3029 /* Skip mod/rm byte. */
4bba6815 3030 MODRM_CHECK;
252b5132
RH		 3031 codep++;
3032
3033 if (mod == 3)
3034 {
3035 switch (bytemode)
3036 {
3037 case b_mode:
52b15da3
JH		 3038 USED_REX (0);
3039 if (rex)
3040 oappend (names8rex[rm + add]);
3041 else
3042 oappend (names8[rm + add]);
252b5132
RH		 3043 break;
3044 case w_mode:
52b15da3 3045 oappend (names16[rm + add]);
252b5132 3046 break;
2da11e11 3047 case d_mode:
52b15da3
JH		 3048 oappend (names32[rm + add]);
3049 break;
3050 case q_mode:
3051 oappend (names64[rm + add]);
3052 break;
3053 case m_mode:
3054 if (mode_64bit)
3055 oappend (names64[rm + add]);
3056 else
3057 oappend (names32[rm + add]);
2da11e11 3058 break;
252b5132 3059 case v_mode:
db6eb5be 3060 case dq_mode:
52b15da3
JH		 3061 USED_REX (REX_MODE64);
3062 if (rex & REX_MODE64)
3063 oappend (names64[rm + add]);
db6eb5be 3064 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
52b15da3 3065 oappend (names32[rm + add]);
252b5132 3066 else
52b15da3 3067 oappend (names16[rm + add]);
7d421014 3068 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 3069 break;
2da11e11 3070 case 0:
c02908d2
AM		 3071 if (codep[-2] == 0xAE && codep[-1] == 0xF8)
3072 /* sfence */
3073 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
3074 else if (codep[-2] == 0xAE && codep[-1] == 0xF0)
3075 /* mfence */
3076 ;
3077 else if (codep[-2] == 0xAE && codep[-1] == 0xe8)
3078 /* lfence */
3079 ;
3080 else
6608db57 3081 BadOp (); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */
c608c12e 3082 break;
252b5132 3083 default:
c608c12e 3084 oappend (INTERNAL_DISASSEMBLER_ERROR);
252b5132
RH		 3085 break;
3086 }
3087 return;
3088 }
3089
3090 disp = 0;
3091 append_seg ();
3092
c1a64871 3093 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
252b5132
RH		 3094 {
3095 int havesib;
3096 int havebase;
3097 int base;
3098 int index = 0;
3099 int scale = 0;
3100
3101 havesib = 0;
3102 havebase = 1;
3103 base = rm;
3104
3105 if (base == 4)
3106 {
3107 havesib = 1;
3108 FETCH_DATA (the_info, codep + 1);
3109 scale = (*codep >> 6) & 3;
3110 index = (*codep >> 3) & 7;
3111 base = *codep & 7;
52b15da3
JH		 3112 USED_REX (REX_EXTY);
3113 USED_REX (REX_EXTZ);
3114 if (rex & REX_EXTY)
3115 index += 8;
3116 if (rex & REX_EXTZ)
3117 base += 8;
252b5132
RH		 3118 codep++;
3119 }
3120
3121 switch (mod)
3122 {
3123 case 0:
52b15da3 3124 if ((base & 7) == 5)
252b5132
RH		 3125 {
3126 havebase = 0;
c1a64871 3127 if (mode_64bit && !havesib && (sizeflag & AFLAG))
52b15da3
JH		 3128 riprel = 1;
3129 disp = get32s ();
252b5132
RH		 3130 }
3131 break;
3132 case 1:
3133 FETCH_DATA (the_info, codep + 1);
3134 disp = *codep++;
3135 if ((disp & 0x80) != 0)
3136 disp -= 0x100;
3137 break;
3138 case 2:
52b15da3 3139 disp = get32s ();
252b5132
RH		 3140 break;
3141 }
3142
3143 if (!intel_syntax)
db6eb5be
AM		 3144 if (mod != 0 || (base & 7) == 5)
3145 {
52b15da3 3146 print_operand_value (scratchbuf, !riprel, disp);
db6eb5be 3147 oappend (scratchbuf);
52b15da3
JH		 3148 if (riprel)
3149 {
3150 set_op (disp, 1);
3151 oappend ("(%rip)");
3152 }
db6eb5be 3153 }
2da11e11 3154
252b5132
RH		 3155 if (havebase || (havesib && (index != 4 || scale != 0)))
3156 {
db6eb5be
AM		 3157 if (intel_syntax)
3158 {
3159 switch (bytemode)
3160 {
3161 case b_mode:
3162 oappend ("BYTE PTR ");
3163 break;
3164 case w_mode:
3165 oappend ("WORD PTR ");
3166 break;
3167 case v_mode:
3168 oappend ("DWORD PTR ");
3169 break;
3170 case d_mode:
3171 oappend ("QWORD PTR ");
3172 break;
3173 case m_mode:
52b15da3
JH		 3174 if (mode_64bit)
3175 oappend ("DWORD PTR ");
3176 else
3177 oappend ("QWORD PTR ");
3178 break;
db6eb5be
AM		 3179 case x_mode:
3180 oappend ("XWORD PTR ");
3181 break;
3182 default:
3183 break;
3184 }
3185 }
252b5132 3186 *obufp++ = open_char;
52b15da3
JH		 3187 if (intel_syntax && riprel)
3188 oappend ("rip + ");
db6eb5be 3189 *obufp = '\0';
52b15da3
JH		 3190 USED_REX (REX_EXTZ);
3191 if (!havesib && (rex & REX_EXTZ))
3192 base += 8;
252b5132 3193 if (havebase)
c1a64871
JH		 3194 oappend (mode_64bit && (sizeflag & AFLAG)
3195 ? names64[base] : names32[base]);
252b5132
RH		 3196 if (havesib)
3197 {
3198 if (index != 4)
3199 {
db6eb5be
AM		 3200 if (intel_syntax)
3201 {
3202 if (havebase)
3203 {
3204 *obufp++ = separator_char;
3205 *obufp = '\0';
3206 }
3207 sprintf (scratchbuf, "%s",
c1a64871
JH		 3208 mode_64bit && (sizeflag & AFLAG)
3209 ? names64[index] : names32[index]);
db6eb5be
AM		 3210 }
3211 else
d708bcba 3212 sprintf (scratchbuf, ",%s",
c1a64871
JH		 3213 mode_64bit && (sizeflag & AFLAG)
3214 ? names64[index] : names32[index]);
252b5132
RH		 3215 oappend (scratchbuf);
3216 }
a02a862a 3217 if (scale != 0 || (!intel_syntax && index != 4))
db6eb5be
AM		 3218 {
3219 *obufp++ = scale_char;
3220 *obufp = '\0';
3221 sprintf (scratchbuf, "%d", 1 << scale);
3222 oappend (scratchbuf);
3223 }
252b5132 3224 }
db6eb5be
AM		 3225 if (intel_syntax)
3226 if (mod != 0 || (base & 7) == 5)
3227 {
6608db57 3228 /* Don't print zero displacements. */
db6eb5be
AM		 3229 if (disp != 0)
3230 {
d708bcba
AM		 3231 if ((bfd_signed_vma) disp > 0)
3232 {
3233 *obufp++ = '+';
3234 *obufp = '\0';
3235 }
3236
52b15da3 3237 print_operand_value (scratchbuf, 0, disp);
db6eb5be
AM		 3238 oappend (scratchbuf);
3239 }
3240 }
252b5132
RH		 3241
3242 *obufp++ = close_char;
db6eb5be 3243 *obufp = '\0';
252b5132
RH		 3244 }
3245 else if (intel_syntax)
db6eb5be
AM		 3246 {
3247 if (mod != 0 || (base & 7) == 5)
3248 {
252b5132
RH		 3249 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3250 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3251 ;
3252 else
3253 {
d708bcba 3254 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 3255 oappend (":");
3256 }
52b15da3 3257 print_operand_value (scratchbuf, 1, disp);
db6eb5be
AM		 3258 oappend (scratchbuf);
3259 }
3260 }
252b5132
RH		 3261 }
3262 else
3263 { /* 16 bit address mode */
3264 switch (mod)
3265 {
3266 case 0:
52b15da3 3267 if ((rm & 7) == 6)
252b5132
RH		 3268 {
3269 disp = get16 ();
3270 if ((disp & 0x8000) != 0)
3271 disp -= 0x10000;
3272 }
3273 break;
3274 case 1:
3275 FETCH_DATA (the_info, codep + 1);
3276 disp = *codep++;
3277 if ((disp & 0x80) != 0)
3278 disp -= 0x100;
3279 break;
3280 case 2:
3281 disp = get16 ();
3282 if ((disp & 0x8000) != 0)
3283 disp -= 0x10000;
3284 break;
3285 }
3286
3287 if (!intel_syntax)
db6eb5be
AM		 3288 if (mod != 0 || (rm & 7) == 6)
3289 {
52b15da3 3290 print_operand_value (scratchbuf, 0, disp);
db6eb5be
AM		 3291 oappend (scratchbuf);
3292 }
252b5132 3293
52b15da3 3294 if (mod != 0 || (rm & 7) != 6)
252b5132
RH		 3295 {
3296 *obufp++ = open_char;
db6eb5be 3297 *obufp = '\0';
52b15da3 3298 oappend (index16[rm + add]);
db6eb5be
AM		 3299 *obufp++ = close_char;
3300 *obufp = '\0';
252b5132
RH		 3301 }
3302 }
3303}
3304
252b5132 3305static void
26ca5450 3306OP_G (int bytemode, int sizeflag)
252b5132 3307{
52b15da3
JH		 3308 int add = 0;
3309 USED_REX (REX_EXTX);
3310 if (rex & REX_EXTX)
3311 add += 8;
252b5132
RH		 3312 switch (bytemode)
3313 {
3314 case b_mode:
52b15da3
JH		 3315 USED_REX (0);
3316 if (rex)
3317 oappend (names8rex[reg + add]);
3318 else
3319 oappend (names8[reg + add]);
252b5132
RH		 3320 break;
3321 case w_mode:
52b15da3 3322 oappend (names16[reg + add]);
252b5132
RH		 3323 break;
3324 case d_mode:
52b15da3
JH		 3325 oappend (names32[reg + add]);
3326 break;
3327 case q_mode:
3328 oappend (names64[reg + add]);
252b5132
RH		 3329 break;
3330 case v_mode:
52b15da3
JH		 3331 USED_REX (REX_MODE64);
3332 if (rex & REX_MODE64)
3333 oappend (names64[reg + add]);
3334 else if (sizeflag & DFLAG)
3335 oappend (names32[reg + add]);
252b5132 3336 else
52b15da3 3337 oappend (names16[reg + add]);
7d421014 3338 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3339 break;
3340 default:
3341 oappend (INTERNAL_DISASSEMBLER_ERROR);
3342 break;
3343 }
3344}
3345
52b15da3 3346static bfd_vma
26ca5450 3347get64 (void)
52b15da3 3348{
5dd0794d 3349 bfd_vma x;
52b15da3 3350#ifdef BFD64
5dd0794d
AM		 3351 unsigned int a;
3352 unsigned int b;
3353
52b15da3
JH		 3354 FETCH_DATA (the_info, codep + 8);
3355 a = *codep++ & 0xff;
3356 a |= (*codep++ & 0xff) << 8;
3357 a |= (*codep++ & 0xff) << 16;
3358 a |= (*codep++ & 0xff) << 24;
5dd0794d 3359 b = *codep++ & 0xff;
52b15da3
JH		 3360 b |= (*codep++ & 0xff) << 8;
3361 b |= (*codep++ & 0xff) << 16;
3362 b |= (*codep++ & 0xff) << 24;
3363 x = a + ((bfd_vma) b << 32);
3364#else
6608db57 3365 abort ();
5dd0794d 3366 x = 0;
52b15da3
JH		 3367#endif
3368 return x;
3369}
3370
3371static bfd_signed_vma
26ca5450 3372get32 (void)
252b5132 3373{
52b15da3 3374 bfd_signed_vma x = 0;
252b5132
RH		 3375
3376 FETCH_DATA (the_info, codep + 4);
52b15da3
JH		 3377 x = *codep++ & (bfd_signed_vma) 0xff;
3378 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3379 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3380 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3381 return x;
3382}
3383
3384static bfd_signed_vma
26ca5450 3385get32s (void)
52b15da3
JH		 3386{
3387 bfd_signed_vma x = 0;
3388
3389 FETCH_DATA (the_info, codep + 4);
3390 x = *codep++ & (bfd_signed_vma) 0xff;
3391 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3392 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3393 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3394
3395 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3396
252b5132
RH		 3397 return x;
3398}
3399
3400static int
26ca5450 3401get16 (void)
252b5132
RH		 3402{
3403 int x = 0;
3404
3405 FETCH_DATA (the_info, codep + 2);
3406 x = *codep++ & 0xff;
3407 x |= (*codep++ & 0xff) << 8;
3408 return x;
3409}
3410
3411static void
26ca5450 3412set_op (bfd_vma op, int riprel)
252b5132
RH		 3413{
3414 op_index[op_ad] = op_ad;
7081ff04
AJ		 3415 if (mode_64bit)
3416 {
3417 op_address[op_ad] = op;
3418 op_riprel[op_ad] = riprel;
3419 }
3420 else
3421 {
3422 /* Mask to get a 32-bit address. */
3423 op_address[op_ad] = op & 0xffffffff;
3424 op_riprel[op_ad] = riprel & 0xffffffff;
3425 }
252b5132
RH		 3426}
3427
3428static void
26ca5450 3429OP_REG (int code, int sizeflag)
252b5132 3430{
2da11e11 3431 const char *s;
52b15da3
JH		 3432 int add = 0;
3433 USED_REX (REX_EXTZ);
3434 if (rex & REX_EXTZ)
3435 add = 8;
3436
3437 switch (code)
3438 {
3439 case indir_dx_reg:
d708bcba 3440 if (intel_syntax)
db6eb5be 3441 s = "[dx]";
d708bcba 3442 else
db6eb5be 3443 s = "(%dx)";
52b15da3
JH		 3444 break;
3445 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3446 case sp_reg: case bp_reg: case si_reg: case di_reg:
3447 s = names16[code - ax_reg + add];
3448 break;
3449 case es_reg: case ss_reg: case cs_reg:
3450 case ds_reg: case fs_reg: case gs_reg:
3451 s = names_seg[code - es_reg + add];
3452 break;
3453 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3454 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3455 USED_REX (0);
3456 if (rex)
3457 s = names8rex[code - al_reg + add];
3458 else
3459 s = names8[code - al_reg];
3460 break;
6439fc28
AM		 3461 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3462 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3463 if (mode_64bit)
3464 {
3465 s = names64[code - rAX_reg + add];
3466 break;
3467 }
3468 code += eAX_reg - rAX_reg;
6608db57 3469 /* Fall through. */
52b15da3
JH		 3470 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3471 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3472 USED_REX (REX_MODE64);
3473 if (rex & REX_MODE64)
3474 s = names64[code - eAX_reg + add];
3475 else if (sizeflag & DFLAG)
3476 s = names32[code - eAX_reg + add];
3477 else
3478 s = names16[code - eAX_reg + add];
3479 used_prefixes |= (prefixes & PREFIX_DATA);
3480 break;
52b15da3
JH		 3481 default:
3482 s = INTERNAL_DISASSEMBLER_ERROR;
3483 break;
3484 }
3485 oappend (s);
3486}
3487
3488static void
26ca5450 3489OP_IMREG (int code, int sizeflag)
52b15da3
JH		 3490{
3491 const char *s;
252b5132
RH		 3492
3493 switch (code)
3494 {
3495 case indir_dx_reg:
d708bcba 3496 if (intel_syntax)
db6eb5be 3497 s = "[dx]";
d708bcba 3498 else
db6eb5be 3499 s = "(%dx)";
252b5132
RH		 3500 break;
3501 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3502 case sp_reg: case bp_reg: case si_reg: case di_reg:
3503 s = names16[code - ax_reg];
3504 break;
3505 case es_reg: case ss_reg: case cs_reg:
3506 case ds_reg: case fs_reg: case gs_reg:
3507 s = names_seg[code - es_reg];
3508 break;
3509 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3510 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
52b15da3
JH		 3511 USED_REX (0);
3512 if (rex)
3513 s = names8rex[code - al_reg];
3514 else
3515 s = names8[code - al_reg];
252b5132
RH		 3516 break;
3517 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3518 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
52b15da3
JH		 3519 USED_REX (REX_MODE64);
3520 if (rex & REX_MODE64)
3521 s = names64[code - eAX_reg];
3522 else if (sizeflag & DFLAG)
252b5132
RH		 3523 s = names32[code - eAX_reg];
3524 else
3525 s = names16[code - eAX_reg];
7d421014 3526 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3527 break;
3528 default:
3529 s = INTERNAL_DISASSEMBLER_ERROR;
3530 break;
3531 }
3532 oappend (s);
3533}
3534
3535static void
26ca5450 3536OP_I (int bytemode, int sizeflag)
252b5132 3537{
52b15da3
JH		 3538 bfd_signed_vma op;
3539 bfd_signed_vma mask = -1;
252b5132
RH		 3540
3541 switch (bytemode)
3542 {
3543 case b_mode:
3544 FETCH_DATA (the_info, codep + 1);
52b15da3
JH		 3545 op = *codep++;
3546 mask = 0xff;
3547 break;
3548 case q_mode:
6439fc28
AM		 3549 if (mode_64bit)
3550 {
3551 op = get32s ();
3552 break;
3553 }
6608db57 3554 /* Fall through. */
252b5132 3555 case v_mode:
52b15da3
JH		 3556 USED_REX (REX_MODE64);
3557 if (rex & REX_MODE64)
3558 op = get32s ();
3559 else if (sizeflag & DFLAG)
3560 {
3561 op = get32 ();
3562 mask = 0xffffffff;
3563 }
252b5132 3564 else
52b15da3
JH		 3565 {
3566 op = get16 ();
3567 mask = 0xfffff;
3568 }
7d421014 3569 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3570 break;
3571 case w_mode:
52b15da3 3572 mask = 0xfffff;
252b5132
RH		 3573 op = get16 ();
3574 break;
3575 default:
3576 oappend (INTERNAL_DISASSEMBLER_ERROR);
3577 return;
3578 }
3579
52b15da3
JH		 3580 op &= mask;
3581 scratchbuf[0] = '$';
d708bcba
AM		 3582 print_operand_value (scratchbuf + 1, 1, op);
3583 oappend (scratchbuf + intel_syntax);
52b15da3
JH		 3584 scratchbuf[0] = '\0';
3585}
3586
3587static void
26ca5450 3588OP_I64 (int bytemode, int sizeflag)
52b15da3
JH		 3589{
3590 bfd_signed_vma op;
3591 bfd_signed_vma mask = -1;
3592
6439fc28
AM		 3593 if (!mode_64bit)
3594 {
3595 OP_I (bytemode, sizeflag);
3596 return;
3597 }
3598
52b15da3
JH		 3599 switch (bytemode)
3600 {
3601 case b_mode:
3602 FETCH_DATA (the_info, codep + 1);
3603 op = *codep++;
3604 mask = 0xff;
3605 break;
3606 case v_mode:
3607 USED_REX (REX_MODE64);
3608 if (rex & REX_MODE64)
3609 op = get64 ();
3610 else if (sizeflag & DFLAG)
3611 {
3612 op = get32 ();
3613 mask = 0xffffffff;
3614 }
3615 else
3616 {
3617 op = get16 ();
3618 mask = 0xfffff;
3619 }
3620 used_prefixes |= (prefixes & PREFIX_DATA);
3621 break;
3622 case w_mode:
3623 mask = 0xfffff;
3624 op = get16 ();
3625 break;
3626 default:
3627 oappend (INTERNAL_DISASSEMBLER_ERROR);
3628 return;
3629 }
3630
3631 op &= mask;
3632 scratchbuf[0] = '$';
d708bcba
AM		 3633 print_operand_value (scratchbuf + 1, 1, op);
3634 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3635 scratchbuf[0] = '\0';
3636}
3637
3638static void
26ca5450 3639OP_sI (int bytemode, int sizeflag)
252b5132 3640{
52b15da3
JH		 3641 bfd_signed_vma op;
3642 bfd_signed_vma mask = -1;
252b5132
RH		 3643
3644 switch (bytemode)
3645 {
3646 case b_mode:
3647 FETCH_DATA (the_info, codep + 1);
3648 op = *codep++;
3649 if ((op & 0x80) != 0)
3650 op -= 0x100;
52b15da3 3651 mask = 0xffffffff;
252b5132
RH		 3652 break;
3653 case v_mode:
52b15da3
JH		 3654 USED_REX (REX_MODE64);
3655 if (rex & REX_MODE64)
3656 op = get32s ();
3657 else if (sizeflag & DFLAG)
3658 {
3659 op = get32s ();
3660 mask = 0xffffffff;
3661 }
252b5132
RH		 3662 else
3663 {
52b15da3 3664 mask = 0xffffffff;
6608db57 3665 op = get16 ();
252b5132
RH		 3666 if ((op & 0x8000) != 0)
3667 op -= 0x10000;
3668 }
7d421014 3669 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3670 break;
3671 case w_mode:
3672 op = get16 ();
52b15da3 3673 mask = 0xffffffff;
252b5132
RH		 3674 if ((op & 0x8000) != 0)
3675 op -= 0x10000;
3676 break;
3677 default:
3678 oappend (INTERNAL_DISASSEMBLER_ERROR);
3679 return;
3680 }
52b15da3
JH		 3681
3682 scratchbuf[0] = '$';
3683 print_operand_value (scratchbuf + 1, 1, op);
d708bcba 3684 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3685}
3686
3687static void
26ca5450 3688OP_J (int bytemode, int sizeflag)
252b5132 3689{
52b15da3 3690 bfd_vma disp;
7081ff04 3691 bfd_vma mask = -1;
252b5132
RH		 3692
3693 switch (bytemode)
3694 {
3695 case b_mode:
3696 FETCH_DATA (the_info, codep + 1);
3697 disp = *codep++;
3698 if ((disp & 0x80) != 0)
3699 disp -= 0x100;
3700 break;
3701 case v_mode:
3702 if (sizeflag & DFLAG)
52b15da3 3703 disp = get32s ();
252b5132
RH		 3704 else
3705 {
3706 disp = get16 ();
6608db57 3707 /* For some reason, a data16 prefix on a jump instruction
252b5132
RH		 3708 means that the pc is masked to 16 bits after the
3709 displacement is added! */
3710 mask = 0xffff;
3711 }
3712 break;
3713 default:
3714 oappend (INTERNAL_DISASSEMBLER_ERROR);
3715 return;
3716 }
3717 disp = (start_pc + codep - start_codep + disp) & mask;
52b15da3
JH		 3718 set_op (disp, 0);
3719 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 3720 oappend (scratchbuf);
3721}
3722
252b5132 3723static void
26ca5450 3724OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 3725{
d708bcba 3726 oappend (names_seg[reg]);
252b5132
RH		 3727}
3728
3729static void
26ca5450 3730OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
252b5132
RH		 3731{
3732 int seg, offset;
3733
c608c12e 3734 if (sizeflag & DFLAG)
252b5132 3735 {
c608c12e
AM		 3736 offset = get32 ();
3737 seg = get16 ();
252b5132 3738 }
c608c12e
AM		 3739 else
3740 {
3741 offset = get16 ();
3742 seg = get16 ();
3743 }
7d421014 3744 used_prefixes |= (prefixes & PREFIX_DATA);
d708bcba
AM		 3745 if (intel_syntax)
3746 sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
3747 else
3748 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
c608c12e 3749 oappend (scratchbuf);
252b5132
RH		 3750}
3751
252b5132 3752static void
26ca5450 3753OP_OFF (int bytemode ATTRIBUTE_UNUSED, int sizeflag)
252b5132 3754{
52b15da3 3755 bfd_vma off;
252b5132
RH		 3756
3757 append_seg ();
3758
c1a64871 3759 if ((sizeflag & AFLAG) || mode_64bit)
252b5132
RH		 3760 off = get32 ();
3761 else
3762 off = get16 ();
3763
3764 if (intel_syntax)
3765 {
3766 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 3767 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
252b5132 3768 {
d708bcba 3769 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 3770 oappend (":");
3771 }
3772 }
52b15da3
JH		 3773 print_operand_value (scratchbuf, 1, off);
3774 oappend (scratchbuf);
3775}
6439fc28 3776
52b15da3 3777static void
26ca5450 3778OP_OFF64 (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
52b15da3
JH		 3779{
3780 bfd_vma off;
3781
6439fc28
AM		 3782 if (!mode_64bit)
3783 {
3784 OP_OFF (bytemode, sizeflag);
3785 return;
3786 }
3787
52b15da3
JH		 3788 append_seg ();
3789
6608db57 3790 off = get64 ();
52b15da3
JH		 3791
3792 if (intel_syntax)
3793 {
3794 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 3795 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
52b15da3 3796 {
d708bcba 3797 oappend (names_seg[ds_reg - es_reg]);
52b15da3
JH		 3798 oappend (":");
3799 }
3800 }
3801 print_operand_value (scratchbuf, 1, off);
252b5132
RH		 3802 oappend (scratchbuf);
3803}
3804
3805static void
26ca5450 3806ptr_reg (int code, int sizeflag)
252b5132 3807{
2da11e11 3808 const char *s;
6608db57 3809 if (intel_syntax)
d708bcba
AM		 3810 oappend ("[");
3811 else
3812 oappend ("(");
3813
52b15da3
JH		 3814 USED_REX (REX_MODE64);
3815 if (rex & REX_MODE64)
c1a64871
JH		 3816 {
3817 if (!(sizeflag & AFLAG))
db6eb5be 3818 s = names32[code - eAX_reg];
c1a64871 3819 else
db6eb5be 3820 s = names64[code - eAX_reg];
c1a64871 3821 }
52b15da3 3822 else if (sizeflag & AFLAG)
252b5132
RH		 3823 s = names32[code - eAX_reg];
3824 else
3825 s = names16[code - eAX_reg];
3826 oappend (s);
6608db57 3827 if (intel_syntax)
d708bcba
AM		 3828 oappend ("]");
3829 else
3830 oappend (")");
252b5132
RH		 3831}
3832
3833static void
26ca5450 3834OP_ESreg (int code, int sizeflag)
252b5132 3835{
d708bcba 3836 oappend ("%es:" + intel_syntax);
252b5132
RH		 3837 ptr_reg (code, sizeflag);
3838}
3839
3840static void
26ca5450 3841OP_DSreg (int code, int sizeflag)
252b5132
RH		 3842{
3843 if ((prefixes
3844 & (PREFIX_CS
3845 | PREFIX_DS
3846 | PREFIX_SS
3847 | PREFIX_ES
3848 | PREFIX_FS
3849 | PREFIX_GS)) == 0)
3850 prefixes |= PREFIX_DS;
6608db57 3851 append_seg ();
252b5132
RH		 3852 ptr_reg (code, sizeflag);
3853}
3854
252b5132 3855static void
26ca5450 3856OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 3857{
52b15da3
JH		 3858 int add = 0;
3859 USED_REX (REX_EXTX);
3860 if (rex & REX_EXTX)
3861 add = 8;
d708bcba
AM		 3862 sprintf (scratchbuf, "%%cr%d", reg + add);
3863 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3864}
3865
252b5132 3866static void
26ca5450 3867OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 3868{
52b15da3
JH		 3869 int add = 0;
3870 USED_REX (REX_EXTX);
3871 if (rex & REX_EXTX)
3872 add = 8;
d708bcba 3873 if (intel_syntax)
6608db57 3874 sprintf (scratchbuf, "db%d", reg + add);
d708bcba 3875 else
6608db57 3876 sprintf (scratchbuf, "%%db%d", reg + add);
252b5132
RH		 3877 oappend (scratchbuf);
3878}
3879
252b5132 3880static void
26ca5450 3881OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 3882{
252b5132 3883 sprintf (scratchbuf, "%%tr%d", reg);
d708bcba 3884 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3885}
3886
3887static void
26ca5450 3888OP_Rd (int bytemode, int sizeflag)
252b5132 3889{
2da11e11
AM		 3890 if (mod == 3)
3891 OP_E (bytemode, sizeflag);
3892 else
6608db57 3893 BadOp ();
252b5132
RH		 3894}
3895
3896static void
26ca5450 3897OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 3898{
041bd2e0
JH		 3899 int add = 0;
3900 USED_REX (REX_EXTX);
3901 if (rex & REX_EXTX)
3902 add = 8;
3903 used_prefixes |= (prefixes & PREFIX_DATA);
3904 if (prefixes & PREFIX_DATA)
3905 sprintf (scratchbuf, "%%xmm%d", reg + add);
3906 else
3907 sprintf (scratchbuf, "%%mm%d", reg + add);
d708bcba 3908 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3909}
3910
c608c12e 3911static void
26ca5450 3912OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e 3913{
041bd2e0
JH		 3914 int add = 0;
3915 USED_REX (REX_EXTX);
3916 if (rex & REX_EXTX)
3917 add = 8;
3918 sprintf (scratchbuf, "%%xmm%d", reg + add);
d708bcba 3919 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 3920}
3921
252b5132 3922static void
26ca5450 3923OP_EM (int bytemode, int sizeflag)
252b5132 3924{
041bd2e0 3925 int add = 0;
252b5132
RH		 3926 if (mod != 3)
3927 {
3928 OP_E (bytemode, sizeflag);
3929 return;
3930 }
041bd2e0
JH		 3931 USED_REX (REX_EXTZ);
3932 if (rex & REX_EXTZ)
3933 add = 8;
252b5132 3934
6608db57 3935 /* Skip mod/rm byte. */
4bba6815 3936 MODRM_CHECK;
252b5132 3937 codep++;
041bd2e0
JH		 3938 used_prefixes |= (prefixes & PREFIX_DATA);
3939 if (prefixes & PREFIX_DATA)
3940 sprintf (scratchbuf, "%%xmm%d", rm + add);
3941 else
3942 sprintf (scratchbuf, "%%mm%d", rm + add);
d708bcba 3943 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3944}
3945
c608c12e 3946static void
26ca5450 3947OP_EX (int bytemode, int sizeflag)
c608c12e 3948{
041bd2e0 3949 int add = 0;
c608c12e
AM		 3950 if (mod != 3)
3951 {
3952 OP_E (bytemode, sizeflag);
3953 return;
3954 }
041bd2e0
JH		 3955 USED_REX (REX_EXTZ);
3956 if (rex & REX_EXTZ)
3957 add = 8;
c608c12e 3958
6608db57 3959 /* Skip mod/rm byte. */
4bba6815 3960 MODRM_CHECK;
c608c12e 3961 codep++;
041bd2e0 3962 sprintf (scratchbuf, "%%xmm%d", rm + add);
d708bcba 3963 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 3964}
3965
252b5132 3966static void
26ca5450 3967OP_MS (int bytemode, int sizeflag)
252b5132 3968{
2da11e11
AM		 3969 if (mod == 3)
3970 OP_EM (bytemode, sizeflag);
3971 else
6608db57 3972 BadOp ();
252b5132
RH		 3973}
3974
992aaec9 3975static void
26ca5450 3976OP_XS (int bytemode, int sizeflag)
992aaec9
AM		 3977{
3978 if (mod == 3)
3979 OP_EX (bytemode, sizeflag);
3980 else
6608db57 3981 BadOp ();
992aaec9
AM		 3982}
3983
84037f8c 3984static const char *const Suffix3DNow[] = {
252b5132
RH		 3985/* 00 */ NULL, NULL, NULL, NULL,
3986/* 04 */ NULL, NULL, NULL, NULL,
3987/* 08 */ NULL, NULL, NULL, NULL,
9e525108 3988/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
252b5132
RH		 3989/* 10 */ NULL, NULL, NULL, NULL,
3990/* 14 */ NULL, NULL, NULL, NULL,
3991/* 18 */ NULL, NULL, NULL, NULL,
9e525108 3992/* 1C */ "pf2iw", "pf2id", NULL, NULL,
252b5132
RH		 3993/* 20 */ NULL, NULL, NULL, NULL,
3994/* 24 */ NULL, NULL, NULL, NULL,
3995/* 28 */ NULL, NULL, NULL, NULL,
3996/* 2C */ NULL, NULL, NULL, NULL,
3997/* 30 */ NULL, NULL, NULL, NULL,
3998/* 34 */ NULL, NULL, NULL, NULL,
3999/* 38 */ NULL, NULL, NULL, NULL,
4000/* 3C */ NULL, NULL, NULL, NULL,
4001/* 40 */ NULL, NULL, NULL, NULL,
4002/* 44 */ NULL, NULL, NULL, NULL,
4003/* 48 */ NULL, NULL, NULL, NULL,
4004/* 4C */ NULL, NULL, NULL, NULL,
4005/* 50 */ NULL, NULL, NULL, NULL,
4006/* 54 */ NULL, NULL, NULL, NULL,
4007/* 58 */ NULL, NULL, NULL, NULL,
4008/* 5C */ NULL, NULL, NULL, NULL,
4009/* 60 */ NULL, NULL, NULL, NULL,
4010/* 64 */ NULL, NULL, NULL, NULL,
4011/* 68 */ NULL, NULL, NULL, NULL,
4012/* 6C */ NULL, NULL, NULL, NULL,
4013/* 70 */ NULL, NULL, NULL, NULL,
4014/* 74 */ NULL, NULL, NULL, NULL,
4015/* 78 */ NULL, NULL, NULL, NULL,
4016/* 7C */ NULL, NULL, NULL, NULL,
4017/* 80 */ NULL, NULL, NULL, NULL,
4018/* 84 */ NULL, NULL, NULL, NULL,
9e525108
AM		 4019/* 88 */ NULL, NULL, "pfnacc", NULL,
4020/* 8C */ NULL, NULL, "pfpnacc", NULL,
252b5132
RH		 4021/* 90 */ "pfcmpge", NULL, NULL, NULL,
4022/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4023/* 98 */ NULL, NULL, "pfsub", NULL,
4024/* 9C */ NULL, NULL, "pfadd", NULL,
4025/* A0 */ "pfcmpgt", NULL, NULL, NULL,
4026/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4027/* A8 */ NULL, NULL, "pfsubr", NULL,
4028/* AC */ NULL, NULL, "pfacc", NULL,
4029/* B0 */ "pfcmpeq", NULL, NULL, NULL,
4030/* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
9e525108 4031/* B8 */ NULL, NULL, NULL, "pswapd",
252b5132
RH		 4032/* BC */ NULL, NULL, NULL, "pavgusb",
4033/* C0 */ NULL, NULL, NULL, NULL,
4034/* C4 */ NULL, NULL, NULL, NULL,
4035/* C8 */ NULL, NULL, NULL, NULL,
4036/* CC */ NULL, NULL, NULL, NULL,
4037/* D0 */ NULL, NULL, NULL, NULL,
4038/* D4 */ NULL, NULL, NULL, NULL,
4039/* D8 */ NULL, NULL, NULL, NULL,
4040/* DC */ NULL, NULL, NULL, NULL,
4041/* E0 */ NULL, NULL, NULL, NULL,
4042/* E4 */ NULL, NULL, NULL, NULL,
4043/* E8 */ NULL, NULL, NULL, NULL,
4044/* EC */ NULL, NULL, NULL, NULL,
4045/* F0 */ NULL, NULL, NULL, NULL,
4046/* F4 */ NULL, NULL, NULL, NULL,
4047/* F8 */ NULL, NULL, NULL, NULL,
4048/* FC */ NULL, NULL, NULL, NULL,
4049};
4050
4051static void
26ca5450 4052OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 4053{
4054 const char *mnemonic;
4055
4056 FETCH_DATA (the_info, codep + 1);
4057 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4058 place where an 8-bit immediate would normally go. ie. the last
4059 byte of the instruction. */
6608db57 4060 obufp = obuf + strlen (obuf);
c608c12e 4061 mnemonic = Suffix3DNow[*codep++ & 0xff];
252b5132 4062 if (mnemonic)
2da11e11 4063 oappend (mnemonic);
252b5132
RH		 4064 else
4065 {
4066 /* Since a variable sized modrm/sib chunk is between the start
4067 of the opcode (0x0f0f) and the opcode suffix, we need to do
4068 all the modrm processing first, and don't know until now that
4069 we have a bad opcode. This necessitates some cleaning up. */
2da11e11
AM		 4070 op1out[0] = '\0';
4071 op2out[0] = '\0';
6608db57 4072 BadOp ();
252b5132
RH		 4073 }
4074}
c608c12e 4075
6608db57 4076static const char *simd_cmp_op[] = {
c608c12e
AM		 4077 "eq",
4078 "lt",
4079 "le",
4080 "unord",
4081 "neq",
4082 "nlt",
4083 "nle",
4084 "ord"
4085};
4086
4087static void
26ca5450 4088OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 4089{
4090 unsigned int cmp_type;
4091
4092 FETCH_DATA (the_info, codep + 1);
6608db57 4093 obufp = obuf + strlen (obuf);
c608c12e
AM		 4094 cmp_type = *codep++ & 0xff;
4095 if (cmp_type < 8)
4096 {
041bd2e0
JH		 4097 char suffix1 = 'p', suffix2 = 's';
4098 used_prefixes |= (prefixes & PREFIX_REPZ);
4099 if (prefixes & PREFIX_REPZ)
4100 suffix1 = 's';
4101 else
4102 {
4103 used_prefixes |= (prefixes & PREFIX_DATA);
4104 if (prefixes & PREFIX_DATA)
4105 suffix2 = 'd';
4106 else
4107 {
4108 used_prefixes |= (prefixes & PREFIX_REPNZ);
4109 if (prefixes & PREFIX_REPNZ)
4110 suffix1 = 's', suffix2 = 'd';
4111 }
4112 }
4113 sprintf (scratchbuf, "cmp%s%c%c",
4114 simd_cmp_op[cmp_type], suffix1, suffix2);
7d421014 4115 used_prefixes |= (prefixes & PREFIX_REPZ);
2da11e11 4116 oappend (scratchbuf);
c608c12e
AM		 4117 }
4118 else
4119 {
4120 /* We have a bad extension byte. Clean up. */
2da11e11
AM		 4121 op1out[0] = '\0';
4122 op2out[0] = '\0';
6608db57 4123 BadOp ();
c608c12e
AM		 4124 }
4125}
4126
4127static void
26ca5450 4128SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 4129{
4130 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4131 forms of these instructions. */
4132 if (mod == 3)
4133 {
6608db57
KH		 4134 char *p = obuf + strlen (obuf);
4135 *(p + 1) = '\0';
4136 *p = *(p - 1);
4137 *(p - 1) = *(p - 2);
4138 *(p - 2) = *(p - 3);
4139 *(p - 3) = extrachar;
c608c12e
AM		 4140 }
4141}
2da11e11 4142
ca164297 4143static void
26ca5450 4144PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
ca164297
L		 4145{
4146 if (mod == 3 && reg == 1)
4147 {
4148 char *p = obuf + strlen (obuf);
4149
4150 /* Override "sidt". */
4151 if (rm)
4152 {
4153 /* mwait %eax,%ecx */
4154 strcpy (p - 4, "mwait %eax,%ecx");
4155 }
4156 else
4157 {
4158 /* monitor %eax,%ecx,%edx" */
4159 strcpy (p - 4, "monitor %eax,%ecx,%edx");
4160 }
4161
4162 codep++;
4163 }
4164 else
4165 OP_E (0, sizeflag);
4166}
4167
6608db57
KH		 4168static void
4169BadOp (void)
2da11e11 4170{
6608db57
KH		 4171 /* Throw away prefixes and 1st. opcode byte. */
4172 codep = insn_codep + 1;
2da11e11
AM		 4173 oappend ("(bad)");
4174}
GDB Binutils - Deliverables
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