Commit | Line | Data |
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252b5132 | 1 | /* Print i386 instructions for GDB, the GNU debugger. |
060d22b0 NC |
2 | Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, |
3 | 2001 | |
252b5132 RH |
4 | Free Software Foundation, Inc. |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | /* | |
23 | * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu) | |
24 | * July 1988 | |
25 | * modified by John Hassey (hassey@dg-rtp.dg.com) | |
52b15da3 | 26 | * x86-64 support added by Jan Hubicka (jh@suse.cz) |
252b5132 RH |
27 | */ |
28 | ||
29 | /* | |
30 | * The main tables describing the instructions is essentially a copy | |
31 | * of the "Opcode Map" chapter (Appendix A) of the Intel 80386 | |
32 | * Programmers Manual. Usually, there is a capital letter, followed | |
33 | * by a small letter. The capital letter tell the addressing mode, | |
34 | * and the small letter tells about the operand size. Refer to | |
35 | * the Intel manual for details. | |
36 | */ | |
37 | ||
38 | #include "dis-asm.h" | |
39 | #include "sysdep.h" | |
40 | #include "opintl.h" | |
41 | ||
42 | #define MAXLEN 20 | |
43 | ||
44 | #include <setjmp.h> | |
45 | ||
46 | #ifndef UNIXWARE_COMPAT | |
47 | /* Set non-zero for broken, compatible instructions. Set to zero for | |
48 | non-broken opcodes. */ | |
49 | #define UNIXWARE_COMPAT 1 | |
50 | #endif | |
51 | ||
252b5132 RH |
52 | static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *)); |
53 | ||
54 | struct dis_private | |
55 | { | |
56 | /* Points to first byte not fetched. */ | |
57 | bfd_byte *max_fetched; | |
58 | bfd_byte the_buffer[MAXLEN]; | |
59 | bfd_vma insn_start; | |
60 | jmp_buf bailout; | |
61 | }; | |
62 | ||
5076851f ILT |
63 | /* The opcode for the fwait instruction, which we treat as a prefix |
64 | when we can. */ | |
65 | #define FWAIT_OPCODE (0x9b) | |
66 | ||
52b15da3 JH |
67 | /* Set to 1 for 64bit mode disassembly. */ |
68 | static int mode_64bit; | |
69 | ||
5076851f ILT |
70 | /* Flags for the prefixes for the current instruction. See below. */ |
71 | static int prefixes; | |
72 | ||
52b15da3 JH |
73 | /* REX prefix the current instruction. See below. */ |
74 | static int rex; | |
75 | /* Bits of REX we've already used. */ | |
76 | static int rex_used; | |
77 | #define REX_MODE64 8 | |
78 | #define REX_EXTX 4 | |
79 | #define REX_EXTY 2 | |
80 | #define REX_EXTZ 1 | |
81 | /* Mark parts used in the REX prefix. When we are testing for | |
82 | empty prefix (for 8bit register REX extension), just mask it | |
83 | out. Otherwise test for REX bit is excuse for existence of REX | |
84 | only in case value is nonzero. */ | |
85 | #define USED_REX(value) \ | |
86 | { \ | |
87 | if (value) \ | |
88 | rex_used |= (rex & value) ? (value) | 0x40 : 0; \ | |
89 | else \ | |
90 | rex_used |= 0x40; \ | |
91 | } | |
92 | ||
7d421014 ILT |
93 | /* Flags for prefixes which we somehow handled when printing the |
94 | current instruction. */ | |
95 | static int used_prefixes; | |
96 | ||
5076851f ILT |
97 | /* Flags stored in PREFIXES. */ |
98 | #define PREFIX_REPZ 1 | |
99 | #define PREFIX_REPNZ 2 | |
100 | #define PREFIX_LOCK 4 | |
101 | #define PREFIX_CS 8 | |
102 | #define PREFIX_SS 0x10 | |
103 | #define PREFIX_DS 0x20 | |
104 | #define PREFIX_ES 0x40 | |
105 | #define PREFIX_FS 0x80 | |
106 | #define PREFIX_GS 0x100 | |
107 | #define PREFIX_DATA 0x200 | |
108 | #define PREFIX_ADDR 0x400 | |
109 | #define PREFIX_FWAIT 0x800 | |
110 | ||
252b5132 RH |
111 | /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive) |
112 | to ADDR (exclusive) are valid. Returns 1 for success, longjmps | |
113 | on error. */ | |
114 | #define FETCH_DATA(info, addr) \ | |
115 | ((addr) <= ((struct dis_private *)(info->private_data))->max_fetched \ | |
116 | ? 1 : fetch_data ((info), (addr))) | |
117 | ||
118 | static int | |
119 | fetch_data (info, addr) | |
120 | struct disassemble_info *info; | |
121 | bfd_byte *addr; | |
122 | { | |
123 | int status; | |
124 | struct dis_private *priv = (struct dis_private *)info->private_data; | |
125 | bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer); | |
126 | ||
127 | status = (*info->read_memory_func) (start, | |
128 | priv->max_fetched, | |
129 | addr - priv->max_fetched, | |
130 | info); | |
131 | if (status != 0) | |
132 | { | |
7d421014 ILT |
133 | /* If we did manage to read at least one byte, then |
134 | print_insn_i386 will do something sensible. Otherwise, print | |
135 | an error. We do that here because this is where we know | |
136 | STATUS. */ | |
137 | if (priv->max_fetched == priv->the_buffer) | |
5076851f | 138 | (*info->memory_error_func) (status, start, info); |
252b5132 RH |
139 | longjmp (priv->bailout, 1); |
140 | } | |
141 | else | |
142 | priv->max_fetched = addr; | |
143 | return 1; | |
144 | } | |
145 | ||
57d91c3c ILT |
146 | #define XX NULL, 0 |
147 | ||
252b5132 | 148 | #define Eb OP_E, b_mode |
52b15da3 JH |
149 | #define Ev OP_E, v_mode |
150 | #define Ed OP_E, d_mode | |
252b5132 RH |
151 | #define indirEb OP_indirE, b_mode |
152 | #define Gb OP_G, b_mode | |
153 | #define Ev OP_E, v_mode | |
2da11e11 | 154 | #define Ed OP_E, d_mode |
252b5132 RH |
155 | #define indirEv OP_indirE, v_mode |
156 | #define Ew OP_E, w_mode | |
157 | #define Ma OP_E, v_mode | |
2da11e11 AM |
158 | #define M OP_E, 0 /* lea */ |
159 | #define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */ | |
252b5132 RH |
160 | #define Gv OP_G, v_mode |
161 | #define Gw OP_G, w_mode | |
2da11e11 | 162 | #define Rd OP_Rd, d_mode |
52b15da3 | 163 | #define Rm OP_Rd, m_mode |
252b5132 RH |
164 | #define Ib OP_I, b_mode |
165 | #define sIb OP_sI, b_mode /* sign extened byte */ | |
166 | #define Iv OP_I, v_mode | |
52b15da3 JH |
167 | #define Iq OP_I, q_mode |
168 | #define Iv64 OP_I64, v_mode | |
252b5132 RH |
169 | #define Iw OP_I, w_mode |
170 | #define Jb OP_J, b_mode | |
171 | #define Jv OP_J, v_mode | |
52b15da3 JH |
172 | #define Cm OP_C, m_mode |
173 | #define Dm OP_D, m_mode | |
252b5132 RH |
174 | #define Td OP_T, d_mode |
175 | ||
52b15da3 JH |
176 | #define RMeAX OP_REG, eAX_reg |
177 | #define RMeBX OP_REG, eBX_reg | |
178 | #define RMeCX OP_REG, eCX_reg | |
179 | #define RMeDX OP_REG, eDX_reg | |
180 | #define RMeSP OP_REG, eSP_reg | |
181 | #define RMeBP OP_REG, eBP_reg | |
182 | #define RMeSI OP_REG, eSI_reg | |
183 | #define RMeDI OP_REG, eDI_reg | |
184 | #define RMrAX OP_REG, rAX_reg | |
185 | #define RMrBX OP_REG, rBX_reg | |
186 | #define RMrCX OP_REG, rCX_reg | |
187 | #define RMrDX OP_REG, rDX_reg | |
188 | #define RMrSP OP_REG, rSP_reg | |
189 | #define RMrBP OP_REG, rBP_reg | |
190 | #define RMrSI OP_REG, rSI_reg | |
191 | #define RMrDI OP_REG, rDI_reg | |
192 | #define RMAL OP_REG, al_reg | |
193 | #define RMAL OP_REG, al_reg | |
194 | #define RMCL OP_REG, cl_reg | |
195 | #define RMDL OP_REG, dl_reg | |
196 | #define RMBL OP_REG, bl_reg | |
197 | #define RMAH OP_REG, ah_reg | |
198 | #define RMCH OP_REG, ch_reg | |
199 | #define RMDH OP_REG, dh_reg | |
200 | #define RMBH OP_REG, bh_reg | |
201 | #define RMAX OP_REG, ax_reg | |
202 | #define RMDX OP_REG, dx_reg | |
203 | ||
204 | #define eAX OP_IMREG, eAX_reg | |
205 | #define eBX OP_IMREG, eBX_reg | |
206 | #define eCX OP_IMREG, eCX_reg | |
207 | #define eDX OP_IMREG, eDX_reg | |
208 | #define eSP OP_IMREG, eSP_reg | |
209 | #define eBP OP_IMREG, eBP_reg | |
210 | #define eSI OP_IMREG, eSI_reg | |
211 | #define eDI OP_IMREG, eDI_reg | |
212 | #define AL OP_IMREG, al_reg | |
213 | #define AL OP_IMREG, al_reg | |
214 | #define CL OP_IMREG, cl_reg | |
215 | #define DL OP_IMREG, dl_reg | |
216 | #define BL OP_IMREG, bl_reg | |
217 | #define AH OP_IMREG, ah_reg | |
218 | #define CH OP_IMREG, ch_reg | |
219 | #define DH OP_IMREG, dh_reg | |
220 | #define BH OP_IMREG, bh_reg | |
221 | #define AX OP_IMREG, ax_reg | |
222 | #define DX OP_IMREG, dx_reg | |
223 | #define indirDX OP_IMREG, indir_dx_reg | |
252b5132 RH |
224 | |
225 | #define Sw OP_SEG, w_mode | |
c608c12e | 226 | #define Ap OP_DIR, 0 |
252b5132 | 227 | #define Ob OP_OFF, b_mode |
52b15da3 | 228 | #define Ob64 OP_OFF64, b_mode |
252b5132 | 229 | #define Ov OP_OFF, v_mode |
52b15da3 | 230 | #define Ov64 OP_OFF64, v_mode |
252b5132 RH |
231 | #define Xb OP_DSreg, eSI_reg |
232 | #define Xv OP_DSreg, eSI_reg | |
233 | #define Yb OP_ESreg, eDI_reg | |
234 | #define Yv OP_ESreg, eDI_reg | |
235 | #define DSBX OP_DSreg, eBX_reg | |
236 | ||
237 | #define es OP_REG, es_reg | |
238 | #define ss OP_REG, ss_reg | |
239 | #define cs OP_REG, cs_reg | |
240 | #define ds OP_REG, ds_reg | |
241 | #define fs OP_REG, fs_reg | |
242 | #define gs OP_REG, gs_reg | |
243 | ||
244 | #define MX OP_MMX, 0 | |
c608c12e | 245 | #define XM OP_XMM, 0 |
252b5132 | 246 | #define EM OP_EM, v_mode |
c608c12e | 247 | #define EX OP_EX, v_mode |
2da11e11 | 248 | #define MS OP_MS, v_mode |
c608c12e | 249 | #define None OP_E, 0 |
252b5132 | 250 | #define OPSUF OP_3DNowSuffix, 0 |
c608c12e | 251 | #define OPSIMD OP_SIMD_Suffix, 0 |
252b5132 RH |
252 | |
253 | /* bits in sizeflag */ | |
254 | #if 0 /* leave undefined until someone adds the extra flag to objdump */ | |
255 | #define SUFFIX_ALWAYS 4 | |
256 | #endif | |
257 | #define AFLAG 2 | |
258 | #define DFLAG 1 | |
259 | ||
2da11e11 | 260 | typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag)); |
252b5132 RH |
261 | |
262 | static void OP_E PARAMS ((int, int)); | |
263 | static void OP_G PARAMS ((int, int)); | |
264 | static void OP_I PARAMS ((int, int)); | |
52b15da3 JH |
265 | static void OP_I64 PARAMS ((int, int)); |
266 | static void OP_OFF PARAMS ((int, int)); | |
267 | static void OP_REG PARAMS ((int, int)); | |
268 | static void OP_IMREG PARAMS ((int, int)); | |
269 | static void OP_OFF64 PARAMS ((int, int)); | |
252b5132 RH |
270 | static void OP_indirE PARAMS ((int, int)); |
271 | static void OP_sI PARAMS ((int, int)); | |
272 | static void OP_REG PARAMS ((int, int)); | |
273 | static void OP_J PARAMS ((int, int)); | |
274 | static void OP_DIR PARAMS ((int, int)); | |
275 | static void OP_OFF PARAMS ((int, int)); | |
276 | static void OP_ESreg PARAMS ((int, int)); | |
277 | static void OP_DSreg PARAMS ((int, int)); | |
278 | static void OP_SEG PARAMS ((int, int)); | |
279 | static void OP_C PARAMS ((int, int)); | |
280 | static void OP_D PARAMS ((int, int)); | |
281 | static void OP_T PARAMS ((int, int)); | |
2da11e11 | 282 | static void OP_Rd PARAMS ((int, int)); |
252b5132 RH |
283 | static void OP_ST PARAMS ((int, int)); |
284 | static void OP_STi PARAMS ((int, int)); | |
252b5132 | 285 | static void OP_MMX PARAMS ((int, int)); |
c608c12e | 286 | static void OP_XMM PARAMS ((int, int)); |
252b5132 | 287 | static void OP_EM PARAMS ((int, int)); |
c608c12e | 288 | static void OP_EX PARAMS ((int, int)); |
252b5132 RH |
289 | static void OP_MS PARAMS ((int, int)); |
290 | static void OP_3DNowSuffix PARAMS ((int, int)); | |
c608c12e AM |
291 | static void OP_SIMD_Suffix PARAMS ((int, int)); |
292 | static void SIMD_Fixup PARAMS ((int, int)); | |
252b5132 RH |
293 | |
294 | static void append_seg PARAMS ((void)); | |
52b15da3 | 295 | static void set_op PARAMS ((unsigned int op, int)); |
2da11e11 | 296 | static void putop PARAMS ((const char *template, int sizeflag)); |
252b5132 RH |
297 | static void dofloat PARAMS ((int sizeflag)); |
298 | static int get16 PARAMS ((void)); | |
52b15da3 JH |
299 | static bfd_vma get64 PARAMS ((void)); |
300 | static bfd_signed_vma get32 PARAMS ((void)); | |
301 | static bfd_signed_vma get32s PARAMS ((void)); | |
252b5132 | 302 | static void ckprefix PARAMS ((void)); |
7d421014 | 303 | static const char *prefix_name PARAMS ((int, int)); |
252b5132 | 304 | static void ptr_reg PARAMS ((int, int)); |
2da11e11 | 305 | static void BadOp PARAMS ((void)); |
252b5132 | 306 | |
52b15da3 JH |
307 | #define b_mode 1 /* byte operand */ |
308 | #define v_mode 2 /* operand size depends on prefixes */ | |
309 | #define w_mode 3 /* word operand */ | |
310 | #define d_mode 4 /* double word operand */ | |
311 | #define q_mode 5 /* quad word operand */ | |
312 | #define x_mode 6 | |
313 | #define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */ | |
252b5132 RH |
314 | |
315 | #define es_reg 100 | |
316 | #define cs_reg 101 | |
317 | #define ss_reg 102 | |
318 | #define ds_reg 103 | |
319 | #define fs_reg 104 | |
320 | #define gs_reg 105 | |
252b5132 | 321 | |
c608c12e AM |
322 | #define eAX_reg 108 |
323 | #define eCX_reg 109 | |
324 | #define eDX_reg 110 | |
325 | #define eBX_reg 111 | |
326 | #define eSP_reg 112 | |
327 | #define eBP_reg 113 | |
328 | #define eSI_reg 114 | |
329 | #define eDI_reg 115 | |
252b5132 RH |
330 | |
331 | #define al_reg 116 | |
332 | #define cl_reg 117 | |
333 | #define dl_reg 118 | |
334 | #define bl_reg 119 | |
335 | #define ah_reg 120 | |
336 | #define ch_reg 121 | |
337 | #define dh_reg 122 | |
338 | #define bh_reg 123 | |
339 | ||
340 | #define ax_reg 124 | |
341 | #define cx_reg 125 | |
342 | #define dx_reg 126 | |
343 | #define bx_reg 127 | |
344 | #define sp_reg 128 | |
345 | #define bp_reg 129 | |
346 | #define si_reg 130 | |
347 | #define di_reg 131 | |
348 | ||
52b15da3 JH |
349 | #define rAX_reg 132 |
350 | #define rCX_reg 133 | |
351 | #define rDX_reg 134 | |
352 | #define rBX_reg 135 | |
353 | #define rSP_reg 136 | |
354 | #define rBP_reg 137 | |
355 | #define rSI_reg 138 | |
356 | #define rDI_reg 139 | |
357 | ||
252b5132 RH |
358 | #define indir_dx_reg 150 |
359 | ||
c608c12e AM |
360 | #define USE_GROUPS 1 |
361 | #define USE_PREFIX_USER_TABLE 2 | |
362 | ||
57d91c3c ILT |
363 | #define GRP1b NULL, NULL, 0, NULL, USE_GROUPS, NULL, 0 |
364 | #define GRP1S NULL, NULL, 1, NULL, USE_GROUPS, NULL, 0 | |
365 | #define GRP1Ss NULL, NULL, 2, NULL, USE_GROUPS, NULL, 0 | |
366 | #define GRP2b NULL, NULL, 3, NULL, USE_GROUPS, NULL, 0 | |
367 | #define GRP2S NULL, NULL, 4, NULL, USE_GROUPS, NULL, 0 | |
368 | #define GRP2b_one NULL, NULL, 5, NULL, USE_GROUPS, NULL, 0 | |
369 | #define GRP2S_one NULL, NULL, 6, NULL, USE_GROUPS, NULL, 0 | |
370 | #define GRP2b_cl NULL, NULL, 7, NULL, USE_GROUPS, NULL, 0 | |
371 | #define GRP2S_cl NULL, NULL, 8, NULL, USE_GROUPS, NULL, 0 | |
372 | #define GRP3b NULL, NULL, 9, NULL, USE_GROUPS, NULL, 0 | |
373 | #define GRP3S NULL, NULL, 10, NULL, USE_GROUPS, NULL, 0 | |
374 | #define GRP4 NULL, NULL, 11, NULL, USE_GROUPS, NULL, 0 | |
375 | #define GRP5 NULL, NULL, 12, NULL, USE_GROUPS, NULL, 0 | |
376 | #define GRP6 NULL, NULL, 13, NULL, USE_GROUPS, NULL, 0 | |
377 | #define GRP7 NULL, NULL, 14, NULL, USE_GROUPS, NULL, 0 | |
378 | #define GRP8 NULL, NULL, 15, NULL, USE_GROUPS, NULL, 0 | |
379 | #define GRP9 NULL, NULL, 16, NULL, USE_GROUPS, NULL, 0 | |
380 | #define GRP10 NULL, NULL, 17, NULL, USE_GROUPS, NULL, 0 | |
381 | #define GRP11 NULL, NULL, 18, NULL, USE_GROUPS, NULL, 0 | |
382 | #define GRP12 NULL, NULL, 19, NULL, USE_GROUPS, NULL, 0 | |
383 | #define GRP13 NULL, NULL, 20, NULL, USE_GROUPS, NULL, 0 | |
384 | #define GRP14 NULL, NULL, 21, NULL, USE_GROUPS, NULL, 0 | |
385 | #define GRPAMD NULL, NULL, 22, NULL, USE_GROUPS, NULL, 0 | |
386 | ||
387 | #define PREGRP0 NULL, NULL, 0, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
388 | #define PREGRP1 NULL, NULL, 1, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
389 | #define PREGRP2 NULL, NULL, 2, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
390 | #define PREGRP3 NULL, NULL, 3, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
391 | #define PREGRP4 NULL, NULL, 4, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
392 | #define PREGRP5 NULL, NULL, 5, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
393 | #define PREGRP6 NULL, NULL, 6, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
394 | #define PREGRP7 NULL, NULL, 7, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
395 | #define PREGRP8 NULL, NULL, 8, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
396 | #define PREGRP9 NULL, NULL, 9, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
397 | #define PREGRP10 NULL, NULL, 10, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
398 | #define PREGRP11 NULL, NULL, 11, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
399 | #define PREGRP12 NULL, NULL, 12, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
400 | #define PREGRP13 NULL, NULL, 13, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
401 | #define PREGRP14 NULL, NULL, 14, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
041bd2e0 JH |
402 | #define PREGRP15 NULL, NULL, 15, NULL, USE_PREFIX_USER_TABLE, NULL, 0 |
403 | #define PREGRP16 NULL, NULL, 16, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
404 | #define PREGRP17 NULL, NULL, 17, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
405 | #define PREGRP18 NULL, NULL, 18, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
406 | #define PREGRP19 NULL, NULL, 19, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
407 | #define PREGRP20 NULL, NULL, 20, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
408 | #define PREGRP21 NULL, NULL, 21, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
409 | #define PREGRP22 NULL, NULL, 22, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
410 | #define PREGRP23 NULL, NULL, 23, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
411 | #define PREGRP24 NULL, NULL, 24, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
0f17484f AM |
412 | #define PREGRP25 NULL, NULL, 25, NULL, USE_PREFIX_USER_TABLE, NULL, 0 |
413 | #define PREGRP26 NULL, NULL, 26, NULL, USE_PREFIX_USER_TABLE, NULL, 0 | |
252b5132 RH |
414 | |
415 | #define FLOATCODE 50 | |
57d91c3c | 416 | #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0 |
252b5132 RH |
417 | |
418 | struct dis386 { | |
2da11e11 | 419 | const char *name; |
252b5132 RH |
420 | op_rtn op1; |
421 | int bytemode1; | |
422 | op_rtn op2; | |
423 | int bytemode2; | |
424 | op_rtn op3; | |
425 | int bytemode3; | |
426 | }; | |
427 | ||
428 | /* Upper case letters in the instruction names here are macros. | |
429 | 'A' => print 'b' if no register operands or suffix_always is true | |
430 | 'B' => print 'b' if suffix_always is true | |
431 | 'E' => print 'e' if 32-bit form of jcxz | |
432 | 'L' => print 'l' if suffix_always is true | |
433 | 'N' => print 'n' if instruction has no wait "prefix" | |
52b15da3 JH |
434 | 'O' => print 'd', or 'o' |
435 | 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix, | |
252b5132 | 436 | or suffix_always is true |
52b15da3 JH |
437 | print 'q' if rex prefix is present. |
438 | 'I' => print 'q' in 64bit mode and behave as 'P' otherwise | |
439 | 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always is true | |
440 | 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode) | |
441 | 'S' => print 'w', 'l' or 'q' if suffix_always is true | |
90530880 | 442 | 'T' => print 'q' in 64bit mode and behave as 'I' otherwise |
041bd2e0 | 443 | 'X' => print 's', 'd' depending on data16 prefix (for XMM) |
10084519 | 444 | 'W' => print 'b' or 'w' ("w" or "de" in intel mode) |
76f227a5 | 445 | 'Y' => 'q' if instruction has an REX 64bit overwrite prefix |
252b5132 RH |
446 | */ |
447 | ||
2da11e11 | 448 | static const struct dis386 dis386_att[] = { |
252b5132 | 449 | /* 00 */ |
57d91c3c ILT |
450 | { "addB", Eb, Gb, XX }, |
451 | { "addS", Ev, Gv, XX }, | |
452 | { "addB", Gb, Eb, XX }, | |
453 | { "addS", Gv, Ev, XX }, | |
454 | { "addB", AL, Ib, XX }, | |
455 | { "addS", eAX, Iv, XX }, | |
52b15da3 JH |
456 | { "pushI", es, XX, XX }, |
457 | { "popI", es, XX, XX }, | |
252b5132 | 458 | /* 08 */ |
57d91c3c ILT |
459 | { "orB", Eb, Gb, XX }, |
460 | { "orS", Ev, Gv, XX }, | |
461 | { "orB", Gb, Eb, XX }, | |
462 | { "orS", Gv, Ev, XX }, | |
463 | { "orB", AL, Ib, XX }, | |
464 | { "orS", eAX, Iv, XX }, | |
52b15da3 | 465 | { "pushI", cs, XX, XX }, |
57d91c3c | 466 | { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */ |
252b5132 | 467 | /* 10 */ |
57d91c3c ILT |
468 | { "adcB", Eb, Gb, XX }, |
469 | { "adcS", Ev, Gv, XX }, | |
470 | { "adcB", Gb, Eb, XX }, | |
471 | { "adcS", Gv, Ev, XX }, | |
472 | { "adcB", AL, Ib, XX }, | |
473 | { "adcS", eAX, Iv, XX }, | |
52b15da3 JH |
474 | { "pushI", ss, XX, XX }, |
475 | { "popI", ss, XX, XX }, | |
252b5132 | 476 | /* 18 */ |
57d91c3c ILT |
477 | { "sbbB", Eb, Gb, XX }, |
478 | { "sbbS", Ev, Gv, XX }, | |
479 | { "sbbB", Gb, Eb, XX }, | |
480 | { "sbbS", Gv, Ev, XX }, | |
481 | { "sbbB", AL, Ib, XX }, | |
482 | { "sbbS", eAX, Iv, XX }, | |
52b15da3 JH |
483 | { "pushI", ds, XX, XX }, |
484 | { "popI", ds, XX, XX }, | |
252b5132 | 485 | /* 20 */ |
57d91c3c ILT |
486 | { "andB", Eb, Gb, XX }, |
487 | { "andS", Ev, Gv, XX }, | |
488 | { "andB", Gb, Eb, XX }, | |
489 | { "andS", Gv, Ev, XX }, | |
490 | { "andB", AL, Ib, XX }, | |
491 | { "andS", eAX, Iv, XX }, | |
492 | { "(bad)", XX, XX, XX }, /* SEG ES prefix */ | |
493 | { "daa", XX, XX, XX }, | |
252b5132 | 494 | /* 28 */ |
57d91c3c ILT |
495 | { "subB", Eb, Gb, XX }, |
496 | { "subS", Ev, Gv, XX }, | |
497 | { "subB", Gb, Eb, XX }, | |
498 | { "subS", Gv, Ev, XX }, | |
499 | { "subB", AL, Ib, XX }, | |
500 | { "subS", eAX, Iv, XX }, | |
501 | { "(bad)", XX, XX, XX }, /* SEG CS prefix */ | |
502 | { "das", XX, XX, XX }, | |
252b5132 | 503 | /* 30 */ |
57d91c3c ILT |
504 | { "xorB", Eb, Gb, XX }, |
505 | { "xorS", Ev, Gv, XX }, | |
506 | { "xorB", Gb, Eb, XX }, | |
507 | { "xorS", Gv, Ev, XX }, | |
508 | { "xorB", AL, Ib, XX }, | |
509 | { "xorS", eAX, Iv, XX }, | |
510 | { "(bad)", XX, XX, XX }, /* SEG SS prefix */ | |
511 | { "aaa", XX, XX, XX }, | |
252b5132 | 512 | /* 38 */ |
57d91c3c ILT |
513 | { "cmpB", Eb, Gb, XX }, |
514 | { "cmpS", Ev, Gv, XX }, | |
515 | { "cmpB", Gb, Eb, XX }, | |
516 | { "cmpS", Gv, Ev, XX }, | |
517 | { "cmpB", AL, Ib, XX }, | |
518 | { "cmpS", eAX, Iv, XX }, | |
519 | { "(bad)", XX, XX, XX }, /* SEG DS prefix */ | |
520 | { "aas", XX, XX, XX }, | |
252b5132 | 521 | /* 40 */ |
52b15da3 JH |
522 | { "incS", RMeAX, XX, XX }, |
523 | { "incS", RMeCX, XX, XX }, | |
524 | { "incS", RMeDX, XX, XX }, | |
525 | { "incS", RMeBX, XX, XX }, | |
526 | { "incS", RMeSP, XX, XX }, | |
527 | { "incS", RMeBP, XX, XX }, | |
528 | { "incS", RMeSI, XX, XX }, | |
529 | { "incS", RMeDI, XX, XX }, | |
252b5132 | 530 | /* 48 */ |
52b15da3 JH |
531 | { "decS", RMeAX, XX, XX }, |
532 | { "decS", RMeCX, XX, XX }, | |
533 | { "decS", RMeDX, XX, XX }, | |
534 | { "decS", RMeBX, XX, XX }, | |
535 | { "decS", RMeSP, XX, XX }, | |
536 | { "decS", RMeBP, XX, XX }, | |
537 | { "decS", RMeSI, XX, XX }, | |
538 | { "decS", RMeDI, XX, XX }, | |
252b5132 | 539 | /* 50 */ |
52b15da3 JH |
540 | { "pushS", RMeAX, XX, XX }, |
541 | { "pushS", RMeCX, XX, XX }, | |
542 | { "pushS", RMeDX, XX, XX }, | |
543 | { "pushS", RMeBX, XX, XX }, | |
544 | { "pushS", RMeSP, XX, XX }, | |
545 | { "pushS", RMeBP, XX, XX }, | |
546 | { "pushS", RMeSI, XX, XX }, | |
547 | { "pushS", RMeDI, XX, XX }, | |
252b5132 | 548 | /* 58 */ |
52b15da3 JH |
549 | { "popS", RMeAX, XX, XX }, |
550 | { "popS", RMeCX, XX, XX }, | |
551 | { "popS", RMeDX, XX, XX }, | |
552 | { "popS", RMeBX, XX, XX }, | |
553 | { "popS", RMeSP, XX, XX }, | |
554 | { "popS", RMeBP, XX, XX }, | |
555 | { "popS", RMeSI, XX, XX }, | |
556 | { "popS", RMeDI, XX, XX }, | |
252b5132 | 557 | /* 60 */ |
57d91c3c ILT |
558 | { "pushaP", XX, XX, XX }, |
559 | { "popaP", XX, XX, XX }, | |
560 | { "boundS", Gv, Ma, XX }, | |
561 | { "arpl", Ew, Gw, XX }, | |
562 | { "(bad)", XX, XX, XX }, /* seg fs */ | |
563 | { "(bad)", XX, XX, XX }, /* seg gs */ | |
564 | { "(bad)", XX, XX, XX }, /* op size prefix */ | |
565 | { "(bad)", XX, XX, XX }, /* adr size prefix */ | |
252b5132 | 566 | /* 68 */ |
52b15da3 | 567 | { "pushI", Iv, XX, XX }, /* 386 book wrong */ |
252b5132 | 568 | { "imulS", Gv, Ev, Iv }, |
52b15da3 | 569 | { "pushI", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */ |
252b5132 | 570 | { "imulS", Gv, Ev, sIb }, |
57d91c3c ILT |
571 | { "insb", Yb, indirDX, XX }, |
572 | { "insR", Yv, indirDX, XX }, | |
573 | { "outsb", indirDX, Xb, XX }, | |
574 | { "outsR", indirDX, Xv, XX }, | |
252b5132 | 575 | /* 70 */ |
57d91c3c ILT |
576 | { "jo", Jb, XX, XX }, |
577 | { "jno", Jb, XX, XX }, | |
578 | { "jb", Jb, XX, XX }, | |
579 | { "jae", Jb, XX, XX }, | |
580 | { "je", Jb, XX, XX }, | |
581 | { "jne", Jb, XX, XX }, | |
582 | { "jbe", Jb, XX, XX }, | |
583 | { "ja", Jb, XX, XX }, | |
252b5132 | 584 | /* 78 */ |
57d91c3c ILT |
585 | { "js", Jb, XX, XX }, |
586 | { "jns", Jb, XX, XX }, | |
587 | { "jp", Jb, XX, XX }, | |
588 | { "jnp", Jb, XX, XX }, | |
589 | { "jl", Jb, XX, XX }, | |
590 | { "jge", Jb, XX, XX }, | |
591 | { "jle", Jb, XX, XX }, | |
592 | { "jg", Jb, XX, XX }, | |
252b5132 RH |
593 | /* 80 */ |
594 | { GRP1b }, | |
595 | { GRP1S }, | |
57d91c3c | 596 | { "(bad)", XX, XX, XX }, |
252b5132 | 597 | { GRP1Ss }, |
57d91c3c ILT |
598 | { "testB", Eb, Gb, XX }, |
599 | { "testS", Ev, Gv, XX }, | |
600 | { "xchgB", Eb, Gb, XX }, | |
601 | { "xchgS", Ev, Gv, XX }, | |
252b5132 | 602 | /* 88 */ |
57d91c3c ILT |
603 | { "movB", Eb, Gb, XX }, |
604 | { "movS", Ev, Gv, XX }, | |
605 | { "movB", Gb, Eb, XX }, | |
606 | { "movS", Gv, Ev, XX }, | |
607 | { "movQ", Ev, Sw, XX }, | |
608 | { "leaS", Gv, M, XX }, | |
609 | { "movQ", Sw, Ev, XX }, | |
90530880 | 610 | { "popT", Ev, XX, XX }, |
252b5132 | 611 | /* 90 */ |
57d91c3c | 612 | { "nop", XX, XX, XX }, |
041bd2e0 | 613 | /* FIXME: NOP with REPz prefix is called PAUSE. */ |
52b15da3 JH |
614 | { "xchgS", RMeCX, eAX, XX }, |
615 | { "xchgS", RMeDX, eAX, XX }, | |
616 | { "xchgS", RMeBX, eAX, XX }, | |
617 | { "xchgS", RMeSP, eAX, XX }, | |
618 | { "xchgS", RMeBP, eAX, XX }, | |
619 | { "xchgS", RMeSI, eAX, XX }, | |
620 | { "xchgS", RMeDI, eAX, XX }, | |
252b5132 | 621 | /* 98 */ |
57d91c3c | 622 | { "cWtR", XX, XX, XX }, |
52b15da3 JH |
623 | { "cRtO", XX, XX, XX }, |
624 | { "lcallI", Ap, XX, XX }, | |
57d91c3c | 625 | { "(bad)", XX, XX, XX }, /* fwait */ |
52b15da3 JH |
626 | { "pushfI", XX, XX, XX }, |
627 | { "popfI", XX, XX, XX }, | |
57d91c3c ILT |
628 | { "sahf", XX, XX, XX }, |
629 | { "lahf", XX, XX, XX }, | |
252b5132 | 630 | /* a0 */ |
57d91c3c ILT |
631 | { "movB", AL, Ob, XX }, |
632 | { "movS", eAX, Ov, XX }, | |
633 | { "movB", Ob, AL, XX }, | |
634 | { "movS", Ov, eAX, XX }, | |
635 | { "movsb", Yb, Xb, XX }, | |
636 | { "movsR", Yv, Xv, XX }, | |
637 | { "cmpsb", Xb, Yb, XX }, | |
638 | { "cmpsR", Xv, Yv, XX }, | |
252b5132 | 639 | /* a8 */ |
57d91c3c ILT |
640 | { "testB", AL, Ib, XX }, |
641 | { "testS", eAX, Iv, XX }, | |
642 | { "stosB", Yb, AL, XX }, | |
643 | { "stosS", Yv, eAX, XX }, | |
644 | { "lodsB", AL, Xb, XX }, | |
645 | { "lodsS", eAX, Xv, XX }, | |
646 | { "scasB", AL, Yb, XX }, | |
647 | { "scasS", eAX, Yv, XX }, | |
252b5132 | 648 | /* b0 */ |
52b15da3 JH |
649 | { "movB", RMAL, Ib, XX }, |
650 | { "movB", RMCL, Ib, XX }, | |
651 | { "movB", RMDL, Ib, XX }, | |
652 | { "movB", RMBL, Ib, XX }, | |
653 | { "movB", RMAH, Ib, XX }, | |
654 | { "movB", RMCH, Ib, XX }, | |
655 | { "movB", RMDH, Ib, XX }, | |
656 | { "movB", RMBH, Ib, XX }, | |
252b5132 | 657 | /* b8 */ |
52b15da3 JH |
658 | { "movS", RMeAX, Iv, XX }, |
659 | { "movS", RMeCX, Iv, XX }, | |
660 | { "movS", RMeDX, Iv, XX }, | |
661 | { "movS", RMeBX, Iv, XX }, | |
662 | { "movS", RMeSP, Iv, XX }, | |
663 | { "movS", RMeBP, Iv, XX }, | |
664 | { "movS", RMeSI, Iv, XX }, | |
665 | { "movS", RMeDI, Iv, XX }, | |
252b5132 RH |
666 | /* c0 */ |
667 | { GRP2b }, | |
668 | { GRP2S }, | |
e2914f48 JH |
669 | { "retI", Iw, XX, XX }, |
670 | { "retI", XX, XX, XX }, | |
57d91c3c ILT |
671 | { "lesS", Gv, Mp, XX }, |
672 | { "ldsS", Gv, Mp, XX }, | |
673 | { "movA", Eb, Ib, XX }, | |
674 | { "movQ", Ev, Iv, XX }, | |
252b5132 | 675 | /* c8 */ |
52b15da3 JH |
676 | { "enterI", Iw, Ib, XX }, |
677 | { "leaveI", XX, XX, XX }, | |
e2914f48 JH |
678 | { "lretP", Iw, XX, XX }, |
679 | { "lretP", XX, XX, XX }, | |
52b15da3 JH |
680 | { "int3", XX, XX, XX }, |
681 | { "int", Ib, XX, XX }, | |
682 | { "into", XX, XX, XX}, | |
e2914f48 | 683 | { "iretP", XX, XX, XX }, |
52b15da3 JH |
684 | /* d0 */ |
685 | { GRP2b_one }, | |
686 | { GRP2S_one }, | |
687 | { GRP2b_cl }, | |
688 | { GRP2S_cl }, | |
689 | { "aam", sIb, XX, XX }, | |
690 | { "aad", sIb, XX, XX }, | |
691 | { "(bad)", XX, XX, XX }, | |
692 | { "xlat", DSBX, XX, XX }, | |
693 | /* d8 */ | |
694 | { FLOAT }, | |
695 | { FLOAT }, | |
696 | { FLOAT }, | |
697 | { FLOAT }, | |
698 | { FLOAT }, | |
699 | { FLOAT }, | |
700 | { FLOAT }, | |
701 | { FLOAT }, | |
702 | /* e0 */ | |
703 | { "loopne", Jb, XX, XX }, | |
704 | { "loope", Jb, XX, XX }, | |
705 | { "loop", Jb, XX, XX }, | |
706 | { "jEcxz", Jb, XX, XX }, | |
707 | { "inB", AL, Ib, XX }, | |
708 | { "inS", eAX, Ib, XX }, | |
709 | { "outB", Ib, AL, XX }, | |
710 | { "outS", Ib, eAX, XX }, | |
711 | /* e8 */ | |
712 | { "callI", Jv, XX, XX }, | |
713 | { "jmpI", Jv, XX, XX }, | |
714 | { "ljmpI", Ap, XX, XX }, | |
715 | { "jmp", Jb, XX, XX }, | |
716 | { "inB", AL, indirDX, XX }, | |
717 | { "inS", eAX, indirDX, XX }, | |
718 | { "outB", indirDX, AL, XX }, | |
719 | { "outS", indirDX, eAX, XX }, | |
720 | /* f0 */ | |
721 | { "(bad)", XX, XX, XX }, /* lock prefix */ | |
722 | { "(bad)", XX, XX, XX }, | |
723 | { "(bad)", XX, XX, XX }, /* repne */ | |
724 | { "(bad)", XX, XX, XX }, /* repz */ | |
725 | { "hlt", XX, XX, XX }, | |
726 | { "cmc", XX, XX, XX }, | |
727 | { GRP3b }, | |
728 | { GRP3S }, | |
729 | /* f8 */ | |
730 | { "clc", XX, XX, XX }, | |
731 | { "stc", XX, XX, XX }, | |
732 | { "cli", XX, XX, XX }, | |
733 | { "sti", XX, XX, XX }, | |
734 | { "cld", XX, XX, XX }, | |
735 | { "std", XX, XX, XX }, | |
736 | { GRP4 }, | |
737 | { GRP5 }, | |
738 | }; | |
739 | ||
740 | static const struct dis386 dis386_intel[] = { | |
741 | /* 00 */ | |
742 | { "add", Eb, Gb, XX }, | |
743 | { "add", Ev, Gv, XX }, | |
744 | { "add", Gb, Eb, XX }, | |
745 | { "add", Gv, Ev, XX }, | |
746 | { "add", AL, Ib, XX }, | |
747 | { "add", eAX, Iv, XX }, | |
748 | { "push", es, XX, XX }, | |
749 | { "pop", es, XX, XX }, | |
750 | /* 08 */ | |
751 | { "or", Eb, Gb, XX }, | |
752 | { "or", Ev, Gv, XX }, | |
753 | { "or", Gb, Eb, XX }, | |
754 | { "or", Gv, Ev, XX }, | |
755 | { "or", AL, Ib, XX }, | |
756 | { "or", eAX, Iv, XX }, | |
757 | { "push", cs, XX, XX }, | |
758 | { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */ | |
759 | /* 10 */ | |
760 | { "adc", Eb, Gb, XX }, | |
761 | { "adc", Ev, Gv, XX }, | |
762 | { "adc", Gb, Eb, XX }, | |
763 | { "adc", Gv, Ev, XX }, | |
764 | { "adc", AL, Ib, XX }, | |
765 | { "adc", eAX, Iv, XX }, | |
766 | { "push", ss, XX, XX }, | |
767 | { "pop", ss, XX, XX }, | |
768 | /* 18 */ | |
769 | { "sbb", Eb, Gb, XX }, | |
770 | { "sbb", Ev, Gv, XX }, | |
771 | { "sbb", Gb, Eb, XX }, | |
772 | { "sbb", Gv, Ev, XX }, | |
773 | { "sbb", AL, Ib, XX }, | |
774 | { "sbb", eAX, Iv, XX }, | |
775 | { "push", ds, XX, XX }, | |
776 | { "pop", ds, XX, XX }, | |
777 | /* 20 */ | |
778 | { "and", Eb, Gb, XX }, | |
779 | { "and", Ev, Gv, XX }, | |
780 | { "and", Gb, Eb, XX }, | |
781 | { "and", Gv, Ev, XX }, | |
782 | { "and", AL, Ib, XX }, | |
783 | { "and", eAX, Iv, XX }, | |
784 | { "(bad)", XX, XX, XX }, /* SEG ES prefix */ | |
785 | { "daa", XX, XX, XX }, | |
786 | /* 28 */ | |
787 | { "sub", Eb, Gb, XX }, | |
788 | { "sub", Ev, Gv, XX }, | |
789 | { "sub", Gb, Eb, XX }, | |
790 | { "sub", Gv, Ev, XX }, | |
791 | { "sub", AL, Ib, XX }, | |
792 | { "sub", eAX, Iv, XX }, | |
793 | { "(bad)", XX, XX, XX }, /* SEG CS prefix */ | |
794 | { "das", XX, XX, XX }, | |
795 | /* 30 */ | |
796 | { "xor", Eb, Gb, XX }, | |
797 | { "xor", Ev, Gv, XX }, | |
798 | { "xor", Gb, Eb, XX }, | |
799 | { "xor", Gv, Ev, XX }, | |
800 | { "xor", AL, Ib, XX }, | |
801 | { "xor", eAX, Iv, XX }, | |
802 | { "(bad)", XX, XX, XX }, /* SEG SS prefix */ | |
803 | { "aaa", XX, XX, XX }, | |
804 | /* 38 */ | |
805 | { "cmp", Eb, Gb, XX }, | |
806 | { "cmp", Ev, Gv, XX }, | |
807 | { "cmp", Gb, Eb, XX }, | |
808 | { "cmp", Gv, Ev, XX }, | |
809 | { "cmp", AL, Ib, XX }, | |
810 | { "cmp", eAX, Iv, XX }, | |
811 | { "(bad)", XX, XX, XX }, /* SEG DS prefix */ | |
812 | { "aas", XX, XX, XX }, | |
813 | /* 40 */ | |
814 | { "inc", RMeAX, XX, XX }, | |
815 | { "inc", RMeCX, XX, XX }, | |
816 | { "inc", RMeDX, XX, XX }, | |
817 | { "inc", RMeBX, XX, XX }, | |
818 | { "inc", RMeSP, XX, XX }, | |
819 | { "inc", RMeBP, XX, XX }, | |
820 | { "inc", RMeSI, XX, XX }, | |
821 | { "inc", RMeDI, XX, XX }, | |
822 | /* 48 */ | |
823 | { "dec", RMeAX, XX, XX }, | |
824 | { "dec", RMeCX, XX, XX }, | |
825 | { "dec", RMeDX, XX, XX }, | |
826 | { "dec", RMeBX, XX, XX }, | |
827 | { "dec", RMeSP, XX, XX }, | |
828 | { "dec", RMeBP, XX, XX }, | |
829 | { "dec", RMeSI, XX, XX }, | |
830 | { "dec", RMeDI, XX, XX }, | |
831 | /* 50 */ | |
832 | { "push", RMeAX, XX, XX }, | |
833 | { "push", RMeCX, XX, XX }, | |
834 | { "push", RMeDX, XX, XX }, | |
835 | { "push", RMeBX, XX, XX }, | |
836 | { "push", RMeSP, XX, XX }, | |
837 | { "push", RMeBP, XX, XX }, | |
838 | { "push", RMeSI, XX, XX }, | |
839 | { "push", RMeDI, XX, XX }, | |
840 | /* 58 */ | |
841 | { "pop", RMeAX, XX, XX }, | |
842 | { "pop", RMeCX, XX, XX }, | |
843 | { "pop", RMeDX, XX, XX }, | |
844 | { "pop", RMeBX, XX, XX }, | |
845 | { "pop", RMeSP, XX, XX }, | |
846 | { "pop", RMeBP, XX, XX }, | |
847 | { "pop", RMeSI, XX, XX }, | |
848 | { "pop", RMeDI, XX, XX }, | |
849 | /* 60 */ | |
850 | { "pusha", XX, XX, XX }, | |
851 | { "popa", XX, XX, XX }, | |
852 | { "bound", Gv, Ma, XX }, | |
853 | { "arpl", Ew, Gw, XX }, | |
854 | { "(bad)", XX, XX, XX }, /* seg fs */ | |
855 | { "(bad)", XX, XX, XX }, /* seg gs */ | |
856 | { "(bad)", XX, XX, XX }, /* op size prefix */ | |
857 | { "(bad)", XX, XX, XX }, /* adr size prefix */ | |
858 | /* 68 */ | |
859 | { "push", Iv, XX, XX }, /* 386 book wrong */ | |
860 | { "imul", Gv, Ev, Iv }, | |
861 | { "push", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */ | |
862 | { "imul", Gv, Ev, sIb }, | |
863 | { "ins", Yb, indirDX, XX }, | |
864 | { "ins", Yv, indirDX, XX }, | |
865 | { "outs", indirDX, Xb, XX }, | |
866 | { "outs", indirDX, Xv, XX }, | |
867 | /* 70 */ | |
868 | { "jo", Jb, XX, XX }, | |
869 | { "jno", Jb, XX, XX }, | |
870 | { "jb", Jb, XX, XX }, | |
871 | { "jae", Jb, XX, XX }, | |
872 | { "je", Jb, XX, XX }, | |
873 | { "jne", Jb, XX, XX }, | |
874 | { "jbe", Jb, XX, XX }, | |
875 | { "ja", Jb, XX, XX }, | |
876 | /* 78 */ | |
877 | { "js", Jb, XX, XX }, | |
878 | { "jns", Jb, XX, XX }, | |
879 | { "jp", Jb, XX, XX }, | |
880 | { "jnp", Jb, XX, XX }, | |
881 | { "jl", Jb, XX, XX }, | |
882 | { "jge", Jb, XX, XX }, | |
883 | { "jle", Jb, XX, XX }, | |
884 | { "jg", Jb, XX, XX }, | |
885 | /* 80 */ | |
886 | { GRP1b }, | |
887 | { GRP1S }, | |
888 | { "(bad)", XX, XX, XX }, | |
889 | { GRP1Ss }, | |
890 | { "test", Eb, Gb, XX }, | |
891 | { "test", Ev, Gv, XX }, | |
892 | { "xchg", Eb, Gb, XX }, | |
893 | { "xchg", Ev, Gv, XX }, | |
894 | /* 88 */ | |
895 | { "mov", Eb, Gb, XX }, | |
896 | { "mov", Ev, Gv, XX }, | |
897 | { "mov", Gb, Eb, XX }, | |
898 | { "mov", Gv, Ev, XX }, | |
899 | { "mov", Ev, Sw, XX }, | |
900 | { "lea", Gv, M, XX }, | |
901 | { "mov", Sw, Ev, XX }, | |
902 | { "pop", Ev, XX, XX }, | |
903 | /* 90 */ | |
904 | { "nop", XX, XX, XX }, | |
041bd2e0 | 905 | /* FIXME: NOP with REPz prefix is called PAUSE. */ |
52b15da3 JH |
906 | { "xchg", RMeCX, eAX, XX }, |
907 | { "xchg", RMeDX, eAX, XX }, | |
908 | { "xchg", RMeBX, eAX, XX }, | |
909 | { "xchg", RMeSP, eAX, XX }, | |
910 | { "xchg", RMeBP, eAX, XX }, | |
911 | { "xchg", RMeSI, eAX, XX }, | |
912 | { "xchg", RMeDI, eAX, XX }, | |
913 | /* 98 */ | |
914 | { "cW", XX, XX, XX }, /* cwde and cbw */ | |
915 | { "cR", XX, XX, XX }, /* cdq and cwd */ | |
916 | { "lcall", Ap, XX, XX }, | |
917 | { "(bad)", XX, XX, XX }, /* fwait */ | |
918 | { "pushf", XX, XX, XX }, | |
919 | { "popf", XX, XX, XX }, | |
920 | { "sahf", XX, XX, XX }, | |
921 | { "lahf", XX, XX, XX }, | |
922 | /* a0 */ | |
923 | { "mov", AL, Ob, XX }, | |
924 | { "mov", eAX, Ov, XX }, | |
925 | { "mov", Ob, AL, XX }, | |
926 | { "mov", Ov, eAX, XX }, | |
927 | { "movs", Yb, Xb, XX }, | |
928 | { "movs", Yv, Xv, XX }, | |
929 | { "cmps", Xb, Yb, XX }, | |
930 | { "cmps", Xv, Yv, XX }, | |
931 | /* a8 */ | |
932 | { "test", AL, Ib, XX }, | |
933 | { "test", eAX, Iv, XX }, | |
934 | { "stos", Yb, AL, XX }, | |
935 | { "stos", Yv, eAX, XX }, | |
936 | { "lods", AL, Xb, XX }, | |
937 | { "lods", eAX, Xv, XX }, | |
938 | { "scas", AL, Yb, XX }, | |
939 | { "scas", eAX, Yv, XX }, | |
940 | /* b0 */ | |
941 | { "mov", RMAL, Ib, XX }, | |
942 | { "mov", RMCL, Ib, XX }, | |
943 | { "mov", RMDL, Ib, XX }, | |
944 | { "mov", RMBL, Ib, XX }, | |
945 | { "mov", RMAH, Ib, XX }, | |
946 | { "mov", RMCH, Ib, XX }, | |
947 | { "mov", RMDH, Ib, XX }, | |
948 | { "mov", RMBH, Ib, XX }, | |
949 | /* b8 */ | |
950 | { "mov", RMeAX, Iv, XX }, | |
951 | { "mov", RMeCX, Iv, XX }, | |
952 | { "mov", RMeDX, Iv, XX }, | |
953 | { "mov", RMeBX, Iv, XX }, | |
954 | { "mov", RMeSP, Iv, XX }, | |
955 | { "mov", RMeBP, Iv, XX }, | |
956 | { "mov", RMeSI, Iv, XX }, | |
957 | { "mov", RMeDI, Iv, XX }, | |
958 | /* c0 */ | |
959 | { GRP2b }, | |
960 | { GRP2S }, | |
961 | { "ret", Iw, XX, XX }, | |
962 | { "ret", XX, XX, XX }, | |
963 | { "les", Gv, Mp, XX }, | |
964 | { "lds", Gv, Mp, XX }, | |
965 | { "mov", Eb, Ib, XX }, | |
966 | { "mov", Ev, Iv, XX }, | |
967 | /* c8 */ | |
968 | { "enter", Iw, Ib, XX }, | |
969 | { "leave", XX, XX, XX }, | |
970 | { "lret", Iw, XX, XX }, | |
971 | { "lret", XX, XX, XX }, | |
972 | { "int3", XX, XX, XX }, | |
973 | { "int", Ib, XX, XX }, | |
974 | { "into", XX, XX, XX }, | |
975 | { "iret", XX, XX, XX }, | |
976 | /* d0 */ | |
977 | { GRP2b_one }, | |
978 | { GRP2S_one }, | |
979 | { GRP2b_cl }, | |
980 | { GRP2S_cl }, | |
981 | { "aam", sIb, XX, XX }, | |
982 | { "aad", sIb, XX, XX }, | |
983 | { "(bad)", XX, XX, XX }, | |
984 | { "xlat", DSBX, XX, XX }, | |
985 | /* d8 */ | |
986 | { FLOAT }, | |
987 | { FLOAT }, | |
988 | { FLOAT }, | |
989 | { FLOAT }, | |
990 | { FLOAT }, | |
991 | { FLOAT }, | |
992 | { FLOAT }, | |
993 | { FLOAT }, | |
994 | /* e0 */ | |
995 | { "loopne", Jb, XX, XX }, | |
996 | { "loope", Jb, XX, XX }, | |
997 | { "loop", Jb, XX, XX }, | |
998 | { "jEcxz", Jb, XX, XX }, | |
999 | { "in", AL, Ib, XX }, | |
1000 | { "in", eAX, Ib, XX }, | |
1001 | { "out", Ib, AL, XX }, | |
1002 | { "out", Ib, eAX, XX }, | |
1003 | /* e8 */ | |
1004 | { "call", Jv, XX, XX }, | |
1005 | { "jmp", Jv, XX, XX }, | |
1006 | { "ljmp", Ap, XX, XX }, | |
1007 | { "jmp", Jb, XX, XX }, | |
1008 | { "in", AL, indirDX, XX }, | |
1009 | { "in", eAX, indirDX, XX }, | |
1010 | { "out", indirDX, AL, XX }, | |
1011 | { "out", indirDX, eAX, XX }, | |
1012 | /* f0 */ | |
1013 | { "(bad)", XX, XX, XX }, /* lock prefix */ | |
1014 | { "(bad)", XX, XX, XX }, | |
1015 | { "(bad)", XX, XX, XX }, /* repne */ | |
1016 | { "(bad)", XX, XX, XX }, /* repz */ | |
1017 | { "hlt", XX, XX, XX }, | |
1018 | { "cmc", XX, XX, XX }, | |
1019 | { GRP3b }, | |
1020 | { GRP3S }, | |
1021 | /* f8 */ | |
1022 | { "clc", XX, XX, XX }, | |
1023 | { "stc", XX, XX, XX }, | |
1024 | { "cli", XX, XX, XX }, | |
1025 | { "sti", XX, XX, XX }, | |
1026 | { "cld", XX, XX, XX }, | |
1027 | { "std", XX, XX, XX }, | |
1028 | { GRP4 }, | |
1029 | { GRP5 }, | |
1030 | }; | |
1031 | ||
1032 | /* 64bit mode is having some instruction set differences, so separate table is | |
1033 | needed. */ | |
1034 | static const struct dis386 disx86_64_att[] = { | |
1035 | /* 00 */ | |
1036 | { "addB", Eb, Gb, XX }, | |
1037 | { "addS", Ev, Gv, XX }, | |
1038 | { "addB", Gb, Eb, XX }, | |
1039 | { "addS", Gv, Ev, XX }, | |
1040 | { "addB", AL, Ib, XX }, | |
1041 | { "addS", eAX, Iv, XX }, | |
1042 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
1043 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
1044 | /* 08 */ | |
1045 | { "orB", Eb, Gb, XX }, | |
1046 | { "orS", Ev, Gv, XX }, | |
1047 | { "orB", Gb, Eb, XX }, | |
1048 | { "orS", Gv, Ev, XX }, | |
1049 | { "orB", AL, Ib, XX }, | |
1050 | { "orS", eAX, Iv, XX }, | |
1051 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
1052 | { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */ | |
1053 | /* 10 */ | |
1054 | { "adcB", Eb, Gb, XX }, | |
1055 | { "adcS", Ev, Gv, XX }, | |
1056 | { "adcB", Gb, Eb, XX }, | |
1057 | { "adcS", Gv, Ev, XX }, | |
1058 | { "adcB", AL, Ib, XX }, | |
1059 | { "adcS", eAX, Iv, XX }, | |
1060 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
1061 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
1062 | /* 18 */ | |
1063 | { "sbbB", Eb, Gb, XX }, | |
1064 | { "sbbS", Ev, Gv, XX }, | |
1065 | { "sbbB", Gb, Eb, XX }, | |
1066 | { "sbbS", Gv, Ev, XX }, | |
1067 | { "sbbB", AL, Ib, XX }, | |
1068 | { "sbbS", eAX, Iv, XX }, | |
1069 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
1070 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
1071 | /* 20 */ | |
1072 | { "andB", Eb, Gb, XX }, | |
1073 | { "andS", Ev, Gv, XX }, | |
1074 | { "andB", Gb, Eb, XX }, | |
1075 | { "andS", Gv, Ev, XX }, | |
1076 | { "andB", AL, Ib, XX }, | |
1077 | { "andS", eAX, Iv, XX }, | |
1078 | { "(bad)", XX, XX, XX }, /* SEG ES prefix */ | |
1079 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
1080 | /* 28 */ | |
1081 | { "subB", Eb, Gb, XX }, | |
1082 | { "subS", Ev, Gv, XX }, | |
1083 | { "subB", Gb, Eb, XX }, | |
1084 | { "subS", Gv, Ev, XX }, | |
1085 | { "subB", AL, Ib, XX }, | |
1086 | { "subS", eAX, Iv, XX }, | |
1087 | { "(bad)", XX, XX, XX }, /* SEG CS prefix */ | |
1088 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
1089 | /* 30 */ | |
1090 | { "xorB", Eb, Gb, XX }, | |
1091 | { "xorS", Ev, Gv, XX }, | |
1092 | { "xorB", Gb, Eb, XX }, | |
1093 | { "xorS", Gv, Ev, XX }, | |
1094 | { "xorB", AL, Ib, XX }, | |
1095 | { "xorS", eAX, Iv, XX }, | |
1096 | { "(bad)", XX, XX, XX }, /* SEG SS prefix */ | |
1097 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
1098 | /* 38 */ | |
1099 | { "cmpB", Eb, Gb, XX }, | |
1100 | { "cmpS", Ev, Gv, XX }, | |
1101 | { "cmpB", Gb, Eb, XX }, | |
1102 | { "cmpS", Gv, Ev, XX }, | |
1103 | { "cmpB", AL, Ib, XX }, | |
1104 | { "cmpS", eAX, Iv, XX }, | |
1105 | { "(bad)", XX, XX, XX }, /* SEG DS prefix */ | |
1106 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
1107 | /* 40 */ | |
1108 | { "(bad)", XX, XX, XX }, /* REX prefix area. */ | |
1109 | { "(bad)", XX, XX, XX }, | |
1110 | { "(bad)", XX, XX, XX }, | |
1111 | { "(bad)", XX, XX, XX }, | |
1112 | { "(bad)", XX, XX, XX }, | |
1113 | { "(bad)", XX, XX, XX }, | |
1114 | { "(bad)", XX, XX, XX }, | |
1115 | { "(bad)", XX, XX, XX }, | |
1116 | /* 48 */ | |
1117 | { "(bad)", XX, XX, XX }, | |
1118 | { "(bad)", XX, XX, XX }, | |
1119 | { "(bad)", XX, XX, XX }, | |
1120 | { "(bad)", XX, XX, XX }, | |
1121 | { "(bad)", XX, XX, XX }, | |
1122 | { "(bad)", XX, XX, XX }, | |
1123 | { "(bad)", XX, XX, XX }, | |
1124 | { "(bad)", XX, XX, XX }, | |
1125 | /* 50 */ | |
1126 | { "pushI", RMrAX, XX, XX }, | |
1127 | { "pushI", RMrCX, XX, XX }, | |
1128 | { "pushI", RMrDX, XX, XX }, | |
1129 | { "pushI", RMrBX, XX, XX }, | |
1130 | { "pushI", RMrSP, XX, XX }, | |
1131 | { "pushI", RMrBP, XX, XX }, | |
1132 | { "pushI", RMrSI, XX, XX }, | |
1133 | { "pushI", RMrDI, XX, XX }, | |
1134 | /* 58 */ | |
1135 | { "popI", RMrAX, XX, XX }, | |
1136 | { "popI", RMrCX, XX, XX }, | |
1137 | { "popI", RMrDX, XX, XX }, | |
1138 | { "popI", RMrBX, XX, XX }, | |
1139 | { "popI", RMrSP, XX, XX }, | |
1140 | { "popI", RMrBP, XX, XX }, | |
1141 | { "popI", RMrSI, XX, XX }, | |
1142 | { "popI", RMrDI, XX, XX }, | |
1143 | /* 60 */ | |
1144 | { "(bad)", XX, XX, XX }, /* reserved. */ | |
1145 | { "(bad)", XX, XX, XX }, /* reserved. */ | |
1146 | { "(bad)", XX, XX, XX }, /* reserved. */ | |
1147 | { "movslR", Gv, Ed, XX }, | |
1148 | { "(bad)", XX, XX, XX }, /* seg fs */ | |
1149 | { "(bad)", XX, XX, XX }, /* seg gs */ | |
1150 | { "(bad)", XX, XX, XX }, /* op size prefix */ | |
1151 | { "(bad)", XX, XX, XX }, /* adr size prefix */ | |
1152 | /* 68 */ | |
1153 | { "pushI", Iq, XX, XX }, /* 386 book wrong */ | |
1154 | { "imulS", Gv, Ev, Iv }, | |
1155 | { "pushI", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */ | |
1156 | { "imulS", Gv, Ev, sIb }, | |
1157 | { "insb", Yb, indirDX, XX }, | |
1158 | { "insR", Yv, indirDX, XX }, | |
1159 | { "outsb", indirDX, Xb, XX }, | |
1160 | { "outsR", indirDX, Xv, XX }, | |
1161 | /* 70 */ | |
1162 | { "jo", Jb, XX, XX }, | |
1163 | { "jno", Jb, XX, XX }, | |
1164 | { "jb", Jb, XX, XX }, | |
1165 | { "jae", Jb, XX, XX }, | |
1166 | { "je", Jb, XX, XX }, | |
1167 | { "jne", Jb, XX, XX }, | |
1168 | { "jbe", Jb, XX, XX }, | |
1169 | { "ja", Jb, XX, XX }, | |
1170 | /* 78 */ | |
1171 | { "js", Jb, XX, XX }, | |
1172 | { "jns", Jb, XX, XX }, | |
1173 | { "jp", Jb, XX, XX }, | |
1174 | { "jnp", Jb, XX, XX }, | |
1175 | { "jl", Jb, XX, XX }, | |
1176 | { "jge", Jb, XX, XX }, | |
1177 | { "jle", Jb, XX, XX }, | |
1178 | { "jg", Jb, XX, XX }, | |
1179 | /* 80 */ | |
1180 | { GRP1b }, | |
1181 | { GRP1S }, | |
1182 | { "(bad)", XX, XX, XX }, | |
1183 | { GRP1Ss }, | |
1184 | { "testB", Eb, Gb, XX }, | |
1185 | { "testS", Ev, Gv, XX }, | |
1186 | { "xchgB", Eb, Gb, XX }, | |
1187 | { "xchgS", Ev, Gv, XX }, | |
1188 | /* 88 */ | |
1189 | { "movB", Eb, Gb, XX }, | |
1190 | { "movS", Ev, Gv, XX }, | |
1191 | { "movB", Gb, Eb, XX }, | |
1192 | { "movS", Gv, Ev, XX }, | |
1193 | { "movQ", Ev, Sw, XX }, | |
1194 | { "leaS", Gv, M, XX }, | |
1195 | { "movQ", Sw, Ev, XX }, | |
1196 | { "popI", Ev, XX, XX }, | |
1197 | /* 90 */ | |
1198 | { "nop", XX, XX, XX }, | |
041bd2e0 | 1199 | /* FIXME: NOP with REPz prefix is called PAUSE. */ |
52b15da3 JH |
1200 | { "xchgS", RMeCX, eAX, XX }, |
1201 | { "xchgS", RMeDX, eAX, XX }, | |
1202 | { "xchgS", RMeBX, eAX, XX }, | |
1203 | { "xchgS", RMeSP, eAX, XX }, | |
1204 | { "xchgS", RMeBP, eAX, XX }, | |
1205 | { "xchgS", RMeSI, eAX, XX }, | |
1206 | { "xchgS", RMeDI, eAX, XX }, | |
1207 | /* 98 */ | |
1208 | { "cWtR", XX, XX, XX }, | |
1209 | { "cRtO", XX, XX, XX }, | |
1210 | { "(bad)", XX, XX, XX }, /* reserved. */ | |
1211 | { "(bad)", XX, XX, XX }, /* fwait */ | |
1212 | { "pushfI", XX, XX, XX }, | |
1213 | { "popfI", XX, XX, XX }, | |
1214 | { "(bad)", XX, XX, XX }, /* reserved. */ | |
1215 | { "(bad)", XX, XX, XX }, /* reserved. */ | |
1216 | /* a0 */ | |
1217 | { "movB", AL, Ob64, XX }, | |
1218 | { "movS", eAX, Ov64, XX }, | |
1219 | { "movB", Ob64, AL, XX }, | |
1220 | { "movS", Ov64, eAX, XX }, | |
1221 | { "movsb", Yb, Xb, XX }, | |
1222 | { "movsR", Yv, Xv, XX }, | |
1223 | { "cmpsb", Xb, Yb, XX }, | |
1224 | { "cmpsR", Xv, Yv, XX }, | |
1225 | /* a8 */ | |
1226 | { "testB", AL, Ib, XX }, | |
1227 | { "testS", eAX, Iv, XX }, | |
1228 | { "stosB", Yb, AL, XX }, | |
1229 | { "stosS", Yv, eAX, XX }, | |
1230 | { "lodsB", AL, Xb, XX }, | |
1231 | { "lodsS", eAX, Xv, XX }, | |
1232 | { "scasB", AL, Yb, XX }, | |
1233 | { "scasS", eAX, Yv, XX }, | |
1234 | /* b0 */ | |
1235 | { "movB", RMAL, Ib, XX }, | |
1236 | { "movB", RMCL, Ib, XX }, | |
1237 | { "movB", RMDL, Ib, XX }, | |
1238 | { "movB", RMBL, Ib, XX }, | |
1239 | { "movB", RMAH, Ib, XX }, | |
1240 | { "movB", RMCH, Ib, XX }, | |
1241 | { "movB", RMDH, Ib, XX }, | |
1242 | { "movB", RMBH, Ib, XX }, | |
1243 | /* b8 */ | |
1244 | { "movS", RMeAX, Iv64, XX }, | |
1245 | { "movS", RMeCX, Iv64, XX }, | |
1246 | { "movS", RMeDX, Iv64, XX }, | |
1247 | { "movS", RMeBX, Iv64, XX }, | |
1248 | { "movS", RMeSP, Iv64, XX }, | |
1249 | { "movS", RMeBP, Iv64, XX }, | |
1250 | { "movS", RMeSI, Iv64, XX }, | |
1251 | { "movS", RMeDI, Iv64, XX }, | |
1252 | /* c0 */ | |
1253 | { GRP2b }, | |
1254 | { GRP2S }, | |
1255 | { "retI", Iw, XX, XX }, | |
1256 | { "retI", XX, XX, XX }, | |
1257 | { "(bad)", XX, XX, XX }, /* reserved. */ | |
1258 | { "ldsS", Gv, Mp, XX }, | |
1259 | { "movA", Eb, Ib, XX }, | |
1260 | { "movQ", Ev, Iv, XX }, | |
1261 | /* c8 */ | |
1262 | { "enterI", Iw, Ib, XX }, | |
1263 | { "leaveI", XX, XX, XX }, | |
e2914f48 JH |
1264 | { "lretP", Iw, XX, XX }, |
1265 | { "lretP", XX, XX, XX }, | |
57d91c3c ILT |
1266 | { "int3", XX, XX, XX }, |
1267 | { "int", Ib, XX, XX }, | |
52b15da3 | 1268 | { "(bad)", XX, XX, XX }, /* reserved. */ |
e2914f48 | 1269 | { "iretP", XX, XX, XX }, |
252b5132 RH |
1270 | /* d0 */ |
1271 | { GRP2b_one }, | |
1272 | { GRP2S_one }, | |
1273 | { GRP2b_cl }, | |
1274 | { GRP2S_cl }, | |
52b15da3 JH |
1275 | { "(bad)", XX, XX, XX }, /* reserved. */ |
1276 | { "(bad)", XX, XX, XX }, /* reserved. */ | |
041bd2e0 | 1277 | { "(bad)", XX, XX, XX }, /* reserved. */ |
57d91c3c | 1278 | { "xlat", DSBX, XX, XX }, |
252b5132 RH |
1279 | /* d8 */ |
1280 | { FLOAT }, | |
1281 | { FLOAT }, | |
1282 | { FLOAT }, | |
1283 | { FLOAT }, | |
1284 | { FLOAT }, | |
1285 | { FLOAT }, | |
1286 | { FLOAT }, | |
1287 | { FLOAT }, | |
1288 | /* e0 */ | |
57d91c3c ILT |
1289 | { "loopne", Jb, XX, XX }, |
1290 | { "loope", Jb, XX, XX }, | |
1291 | { "loop", Jb, XX, XX }, | |
1292 | { "jEcxz", Jb, XX, XX }, | |
1293 | { "inB", AL, Ib, XX }, | |
1294 | { "inS", eAX, Ib, XX }, | |
1295 | { "outB", Ib, AL, XX }, | |
1296 | { "outS", Ib, eAX, XX }, | |
252b5132 | 1297 | /* e8 */ |
52b15da3 JH |
1298 | { "callI", Jv, XX, XX }, |
1299 | { "jmpI", Jv, XX, XX }, | |
1300 | { "(bad)", XX, XX, XX }, /* reserved. */ | |
57d91c3c ILT |
1301 | { "jmp", Jb, XX, XX }, |
1302 | { "inB", AL, indirDX, XX }, | |
1303 | { "inS", eAX, indirDX, XX }, | |
1304 | { "outB", indirDX, AL, XX }, | |
1305 | { "outS", indirDX, eAX, XX }, | |
252b5132 | 1306 | /* f0 */ |
57d91c3c ILT |
1307 | { "(bad)", XX, XX, XX }, /* lock prefix */ |
1308 | { "(bad)", XX, XX, XX }, | |
1309 | { "(bad)", XX, XX, XX }, /* repne */ | |
1310 | { "(bad)", XX, XX, XX }, /* repz */ | |
1311 | { "hlt", XX, XX, XX }, | |
1312 | { "cmc", XX, XX, XX }, | |
252b5132 RH |
1313 | { GRP3b }, |
1314 | { GRP3S }, | |
1315 | /* f8 */ | |
57d91c3c ILT |
1316 | { "clc", XX, XX, XX }, |
1317 | { "stc", XX, XX, XX }, | |
1318 | { "cli", XX, XX, XX }, | |
1319 | { "sti", XX, XX, XX }, | |
1320 | { "cld", XX, XX, XX }, | |
1321 | { "std", XX, XX, XX }, | |
252b5132 RH |
1322 | { GRP4 }, |
1323 | { GRP5 }, | |
1324 | }; | |
1325 | ||
52b15da3 | 1326 | static const struct dis386 dis386_64_intel[] = { |
252b5132 | 1327 | /* 00 */ |
57d91c3c ILT |
1328 | { "add", Eb, Gb, XX }, |
1329 | { "add", Ev, Gv, XX }, | |
1330 | { "add", Gb, Eb, XX }, | |
1331 | { "add", Gv, Ev, XX }, | |
1332 | { "add", AL, Ib, XX }, | |
1333 | { "add", eAX, Iv, XX }, | |
52b15da3 JH |
1334 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
1335 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
252b5132 | 1336 | /* 08 */ |
57d91c3c ILT |
1337 | { "or", Eb, Gb, XX }, |
1338 | { "or", Ev, Gv, XX }, | |
1339 | { "or", Gb, Eb, XX }, | |
1340 | { "or", Gv, Ev, XX }, | |
1341 | { "or", AL, Ib, XX }, | |
1342 | { "or", eAX, Iv, XX }, | |
52b15da3 | 1343 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
57d91c3c | 1344 | { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */ |
252b5132 | 1345 | /* 10 */ |
57d91c3c ILT |
1346 | { "adc", Eb, Gb, XX }, |
1347 | { "adc", Ev, Gv, XX }, | |
1348 | { "adc", Gb, Eb, XX }, | |
1349 | { "adc", Gv, Ev, XX }, | |
1350 | { "adc", AL, Ib, XX }, | |
1351 | { "adc", eAX, Iv, XX }, | |
52b15da3 JH |
1352 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
1353 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
252b5132 | 1354 | /* 18 */ |
57d91c3c ILT |
1355 | { "sbb", Eb, Gb, XX }, |
1356 | { "sbb", Ev, Gv, XX }, | |
1357 | { "sbb", Gb, Eb, XX }, | |
1358 | { "sbb", Gv, Ev, XX }, | |
1359 | { "sbb", AL, Ib, XX }, | |
1360 | { "sbb", eAX, Iv, XX }, | |
52b15da3 JH |
1361 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
1362 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
252b5132 | 1363 | /* 20 */ |
57d91c3c ILT |
1364 | { "and", Eb, Gb, XX }, |
1365 | { "and", Ev, Gv, XX }, | |
1366 | { "and", Gb, Eb, XX }, | |
1367 | { "and", Gv, Ev, XX }, | |
1368 | { "and", AL, Ib, XX }, | |
1369 | { "and", eAX, Iv, XX }, | |
1370 | { "(bad)", XX, XX, XX }, /* SEG ES prefix */ | |
52b15da3 | 1371 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
252b5132 | 1372 | /* 28 */ |
57d91c3c ILT |
1373 | { "sub", Eb, Gb, XX }, |
1374 | { "sub", Ev, Gv, XX }, | |
1375 | { "sub", Gb, Eb, XX }, | |
1376 | { "sub", Gv, Ev, XX }, | |
1377 | { "sub", AL, Ib, XX }, | |
1378 | { "sub", eAX, Iv, XX }, | |
1379 | { "(bad)", XX, XX, XX }, /* SEG CS prefix */ | |
52b15da3 | 1380 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
252b5132 | 1381 | /* 30 */ |
57d91c3c ILT |
1382 | { "xor", Eb, Gb, XX }, |
1383 | { "xor", Ev, Gv, XX }, | |
1384 | { "xor", Gb, Eb, XX }, | |
1385 | { "xor", Gv, Ev, XX }, | |
1386 | { "xor", AL, Ib, XX }, | |
1387 | { "xor", eAX, Iv, XX }, | |
1388 | { "(bad)", XX, XX, XX }, /* SEG SS prefix */ | |
52b15da3 | 1389 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
252b5132 | 1390 | /* 38 */ |
57d91c3c ILT |
1391 | { "cmp", Eb, Gb, XX }, |
1392 | { "cmp", Ev, Gv, XX }, | |
1393 | { "cmp", Gb, Eb, XX }, | |
1394 | { "cmp", Gv, Ev, XX }, | |
1395 | { "cmp", AL, Ib, XX }, | |
1396 | { "cmp", eAX, Iv, XX }, | |
1397 | { "(bad)", XX, XX, XX }, /* SEG DS prefix */ | |
52b15da3 | 1398 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
252b5132 | 1399 | /* 40 */ |
52b15da3 JH |
1400 | { "(bad)", XX, XX, XX }, /* REX prefix area. */ |
1401 | { "(bad)", XX, XX, XX }, | |
1402 | { "(bad)", XX, XX, XX }, | |
1403 | { "(bad)", XX, XX, XX }, | |
1404 | { "(bad)", XX, XX, XX }, | |
1405 | { "(bad)", XX, XX, XX }, | |
1406 | { "(bad)", XX, XX, XX }, | |
1407 | { "(bad)", XX, XX, XX }, | |
252b5132 | 1408 | /* 48 */ |
52b15da3 JH |
1409 | { "(bad)", XX, XX, XX }, |
1410 | { "(bad)", XX, XX, XX }, | |
1411 | { "(bad)", XX, XX, XX }, | |
1412 | { "(bad)", XX, XX, XX }, | |
1413 | { "(bad)", XX, XX, XX }, | |
1414 | { "(bad)", XX, XX, XX }, | |
1415 | { "(bad)", XX, XX, XX }, | |
1416 | { "(bad)", XX, XX, XX }, | |
252b5132 | 1417 | /* 50 */ |
52b15da3 JH |
1418 | { "push", RMrAX, XX, XX }, |
1419 | { "push", RMrCX, XX, XX }, | |
1420 | { "push", RMrDX, XX, XX }, | |
1421 | { "push", RMrBX, XX, XX }, | |
1422 | { "push", RMrSP, XX, XX }, | |
1423 | { "push", RMrBP, XX, XX }, | |
1424 | { "push", RMrSI, XX, XX }, | |
1425 | { "push", RMrDI, XX, XX }, | |
252b5132 | 1426 | /* 58 */ |
52b15da3 JH |
1427 | { "pop", RMrAX, XX, XX }, |
1428 | { "pop", RMrCX, XX, XX }, | |
1429 | { "pop", RMrDX, XX, XX }, | |
1430 | { "pop", RMrBX, XX, XX }, | |
1431 | { "pop", RMrSP, XX, XX }, | |
1432 | { "pop", RMrBP, XX, XX }, | |
1433 | { "pop", RMrSI, XX, XX }, | |
1434 | { "pop", RMrDI, XX, XX }, | |
252b5132 | 1435 | /* 60 */ |
52b15da3 JH |
1436 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
1437 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
1438 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
1439 | { "movsx", Gv, Ed, XX }, | |
57d91c3c ILT |
1440 | { "(bad)", XX, XX, XX }, /* seg fs */ |
1441 | { "(bad)", XX, XX, XX }, /* seg gs */ | |
1442 | { "(bad)", XX, XX, XX }, /* op size prefix */ | |
1443 | { "(bad)", XX, XX, XX }, /* adr size prefix */ | |
252b5132 | 1444 | /* 68 */ |
52b15da3 | 1445 | { "push", Iq, XX, XX }, /* 386 book wrong */ |
c608c12e | 1446 | { "imul", Gv, Ev, Iv }, |
57d91c3c | 1447 | { "push", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */ |
c608c12e | 1448 | { "imul", Gv, Ev, sIb }, |
57d91c3c ILT |
1449 | { "ins", Yb, indirDX, XX }, |
1450 | { "ins", Yv, indirDX, XX }, | |
1451 | { "outs", indirDX, Xb, XX }, | |
1452 | { "outs", indirDX, Xv, XX }, | |
252b5132 | 1453 | /* 70 */ |
57d91c3c ILT |
1454 | { "jo", Jb, XX, XX }, |
1455 | { "jno", Jb, XX, XX }, | |
1456 | { "jb", Jb, XX, XX }, | |
1457 | { "jae", Jb, XX, XX }, | |
1458 | { "je", Jb, XX, XX }, | |
1459 | { "jne", Jb, XX, XX }, | |
1460 | { "jbe", Jb, XX, XX }, | |
1461 | { "ja", Jb, XX, XX }, | |
252b5132 | 1462 | /* 78 */ |
57d91c3c ILT |
1463 | { "js", Jb, XX, XX }, |
1464 | { "jns", Jb, XX, XX }, | |
1465 | { "jp", Jb, XX, XX }, | |
1466 | { "jnp", Jb, XX, XX }, | |
1467 | { "jl", Jb, XX, XX }, | |
1468 | { "jge", Jb, XX, XX }, | |
1469 | { "jle", Jb, XX, XX }, | |
1470 | { "jg", Jb, XX, XX }, | |
252b5132 RH |
1471 | /* 80 */ |
1472 | { GRP1b }, | |
1473 | { GRP1S }, | |
57d91c3c | 1474 | { "(bad)", XX, XX, XX }, |
252b5132 | 1475 | { GRP1Ss }, |
57d91c3c ILT |
1476 | { "test", Eb, Gb, XX }, |
1477 | { "test", Ev, Gv, XX }, | |
1478 | { "xchg", Eb, Gb, XX }, | |
1479 | { "xchg", Ev, Gv, XX }, | |
252b5132 | 1480 | /* 88 */ |
57d91c3c ILT |
1481 | { "mov", Eb, Gb, XX }, |
1482 | { "mov", Ev, Gv, XX }, | |
1483 | { "mov", Gb, Eb, XX }, | |
1484 | { "mov", Gv, Ev, XX }, | |
1485 | { "mov", Ev, Sw, XX }, | |
1486 | { "lea", Gv, M, XX }, | |
1487 | { "mov", Sw, Ev, XX }, | |
1488 | { "pop", Ev, XX, XX }, | |
252b5132 | 1489 | /* 90 */ |
57d91c3c | 1490 | { "nop", XX, XX, XX }, |
041bd2e0 | 1491 | /* FIXME: NOP with REPz prefix is called PAUSE. */ |
52b15da3 JH |
1492 | { "xchg", RMeCX, eAX, XX }, |
1493 | { "xchg", RMeDX, eAX, XX }, | |
1494 | { "xchg", RMeBX, eAX, XX }, | |
1495 | { "xchg", RMeSP, eAX, XX }, | |
1496 | { "xchg", RMeBP, eAX, XX }, | |
1497 | { "xchg", RMeSI, eAX, XX }, | |
1498 | { "xchg", RMeDI, eAX, XX }, | |
252b5132 | 1499 | /* 98 */ |
57d91c3c ILT |
1500 | { "cW", XX, XX, XX }, /* cwde and cbw */ |
1501 | { "cR", XX, XX, XX }, /* cdq and cwd */ | |
52b15da3 | 1502 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
57d91c3c ILT |
1503 | { "(bad)", XX, XX, XX }, /* fwait */ |
1504 | { "pushf", XX, XX, XX }, | |
1505 | { "popf", XX, XX, XX }, | |
52b15da3 JH |
1506 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
1507 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
252b5132 | 1508 | /* a0 */ |
57d91c3c ILT |
1509 | { "mov", AL, Ob, XX }, |
1510 | { "mov", eAX, Ov, XX }, | |
1511 | { "mov", Ob, AL, XX }, | |
1512 | { "mov", Ov, eAX, XX }, | |
1513 | { "movs", Yb, Xb, XX }, | |
1514 | { "movs", Yv, Xv, XX }, | |
1515 | { "cmps", Xb, Yb, XX }, | |
1516 | { "cmps", Xv, Yv, XX }, | |
252b5132 | 1517 | /* a8 */ |
57d91c3c ILT |
1518 | { "test", AL, Ib, XX }, |
1519 | { "test", eAX, Iv, XX }, | |
1520 | { "stos", Yb, AL, XX }, | |
1521 | { "stos", Yv, eAX, XX }, | |
1522 | { "lods", AL, Xb, XX }, | |
1523 | { "lods", eAX, Xv, XX }, | |
1524 | { "scas", AL, Yb, XX }, | |
1525 | { "scas", eAX, Yv, XX }, | |
252b5132 | 1526 | /* b0 */ |
52b15da3 JH |
1527 | { "mov", RMAL, Ib, XX }, |
1528 | { "mov", RMCL, Ib, XX }, | |
1529 | { "mov", RMDL, Ib, XX }, | |
1530 | { "mov", RMBL, Ib, XX }, | |
1531 | { "mov", RMAH, Ib, XX }, | |
1532 | { "mov", RMCH, Ib, XX }, | |
1533 | { "mov", RMDH, Ib, XX }, | |
1534 | { "mov", RMBH, Ib, XX }, | |
252b5132 | 1535 | /* b8 */ |
52b15da3 JH |
1536 | { "mov", RMeAX, Iv, XX }, |
1537 | { "mov", RMeCX, Iv, XX }, | |
1538 | { "mov", RMeDX, Iv, XX }, | |
1539 | { "mov", RMeBX, Iv, XX }, | |
1540 | { "mov", RMeSP, Iv, XX }, | |
1541 | { "mov", RMeBP, Iv, XX }, | |
1542 | { "mov", RMeSI, Iv, XX }, | |
1543 | { "mov", RMeDI, Iv, XX }, | |
252b5132 RH |
1544 | /* c0 */ |
1545 | { GRP2b }, | |
1546 | { GRP2S }, | |
57d91c3c ILT |
1547 | { "ret", Iw, XX, XX }, |
1548 | { "ret", XX, XX, XX }, | |
52b15da3 | 1549 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
57d91c3c ILT |
1550 | { "lds", Gv, Mp, XX }, |
1551 | { "mov", Eb, Ib, XX }, | |
1552 | { "mov", Ev, Iv, XX }, | |
252b5132 | 1553 | /* c8 */ |
57d91c3c ILT |
1554 | { "enter", Iw, Ib, XX }, |
1555 | { "leave", XX, XX, XX }, | |
1556 | { "lret", Iw, XX, XX }, | |
1557 | { "lret", XX, XX, XX }, | |
1558 | { "int3", XX, XX, XX }, | |
1559 | { "int", Ib, XX, XX }, | |
52b15da3 | 1560 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
57d91c3c | 1561 | { "iret", XX, XX, XX }, |
252b5132 RH |
1562 | /* d0 */ |
1563 | { GRP2b_one }, | |
1564 | { GRP2S_one }, | |
1565 | { GRP2b_cl }, | |
1566 | { GRP2S_cl }, | |
52b15da3 JH |
1567 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
1568 | { "(bad)", XX, XX, XX }, /* Reserved. */ | |
041bd2e0 | 1569 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
57d91c3c | 1570 | { "xlat", DSBX, XX, XX }, |
252b5132 RH |
1571 | /* d8 */ |
1572 | { FLOAT }, | |
1573 | { FLOAT }, | |
1574 | { FLOAT }, | |
1575 | { FLOAT }, | |
1576 | { FLOAT }, | |
1577 | { FLOAT }, | |
1578 | { FLOAT }, | |
1579 | { FLOAT }, | |
1580 | /* e0 */ | |
57d91c3c ILT |
1581 | { "loopne", Jb, XX, XX }, |
1582 | { "loope", Jb, XX, XX }, | |
1583 | { "loop", Jb, XX, XX }, | |
1584 | { "jEcxz", Jb, XX, XX }, | |
1585 | { "in", AL, Ib, XX }, | |
1586 | { "in", eAX, Ib, XX }, | |
1587 | { "out", Ib, AL, XX }, | |
1588 | { "out", Ib, eAX, XX }, | |
252b5132 | 1589 | /* e8 */ |
57d91c3c ILT |
1590 | { "call", Jv, XX, XX }, |
1591 | { "jmp", Jv, XX, XX }, | |
52b15da3 | 1592 | { "(bad)", XX, XX, XX }, /* Reserved. */ |
57d91c3c ILT |
1593 | { "jmp", Jb, XX, XX }, |
1594 | { "in", AL, indirDX, XX }, | |
1595 | { "in", eAX, indirDX, XX }, | |
1596 | { "out", indirDX, AL, XX }, | |
1597 | { "out", indirDX, eAX, XX }, | |
252b5132 | 1598 | /* f0 */ |
57d91c3c ILT |
1599 | { "(bad)", XX, XX, XX }, /* lock prefix */ |
1600 | { "(bad)", XX, XX, XX }, | |
1601 | { "(bad)", XX, XX, XX }, /* repne */ | |
1602 | { "(bad)", XX, XX, XX }, /* repz */ | |
1603 | { "hlt", XX, XX, XX }, | |
1604 | { "cmc", XX, XX, XX }, | |
252b5132 RH |
1605 | { GRP3b }, |
1606 | { GRP3S }, | |
1607 | /* f8 */ | |
57d91c3c ILT |
1608 | { "clc", XX, XX, XX }, |
1609 | { "stc", XX, XX, XX }, | |
1610 | { "cli", XX, XX, XX }, | |
1611 | { "sti", XX, XX, XX }, | |
1612 | { "cld", XX, XX, XX }, | |
1613 | { "std", XX, XX, XX }, | |
252b5132 RH |
1614 | { GRP4 }, |
1615 | { GRP5 }, | |
1616 | }; | |
1617 | ||
2da11e11 | 1618 | static const struct dis386 dis386_twobyte_att[] = { |
252b5132 RH |
1619 | /* 00 */ |
1620 | { GRP6 }, | |
1621 | { GRP7 }, | |
57d91c3c ILT |
1622 | { "larS", Gv, Ew, XX }, |
1623 | { "lslS", Gv, Ew, XX }, | |
1624 | { "(bad)", XX, XX, XX }, | |
52b15da3 | 1625 | { "syscall", XX, XX, XX }, |
57d91c3c | 1626 | { "clts", XX, XX, XX }, |
52b15da3 | 1627 | { "sysretP", XX, XX, XX }, |
252b5132 | 1628 | /* 08 */ |
57d91c3c ILT |
1629 | { "invd", XX, XX, XX }, |
1630 | { "wbinvd", XX, XX, XX }, | |
1631 | { "(bad)", XX, XX, XX }, | |
1632 | { "ud2a", XX, XX, XX }, | |
1633 | { "(bad)", XX, XX, XX }, | |
c608c12e | 1634 | { GRPAMD }, |
57d91c3c | 1635 | { "femms", XX, XX, XX }, |
252b5132 RH |
1636 | { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */ |
1637 | /* 10 */ | |
c608c12e AM |
1638 | { PREGRP8 }, |
1639 | { PREGRP9 }, | |
041bd2e0 JH |
1640 | { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */ |
1641 | { "movlpX", EX, XM, SIMD_Fixup, 'h' }, | |
1642 | { "unpcklpX", XM, EX, XX }, | |
1643 | { "unpckhpX", XM, EX, XX }, | |
1644 | { "movhpX", XM, EX, SIMD_Fixup, 'l' }, | |
1645 | { "movhpX", EX, XM, SIMD_Fixup, 'l' }, | |
252b5132 | 1646 | /* 18 */ |
c608c12e | 1647 | { GRP14 }, |
57d91c3c ILT |
1648 | { "(bad)", XX, XX, XX }, |
1649 | { "(bad)", XX, XX, XX }, | |
1650 | { "(bad)", XX, XX, XX }, | |
1651 | { "(bad)", XX, XX, XX }, | |
1652 | { "(bad)", XX, XX, XX }, | |
1653 | { "(bad)", XX, XX, XX }, | |
1654 | { "(bad)", XX, XX, XX }, | |
252b5132 RH |
1655 | /* 20 */ |
1656 | /* these are all backward in appendix A of the intel book */ | |
52b15da3 JH |
1657 | { "movL", Rm, Cm, XX }, |
1658 | { "movL", Rm, Dm, XX }, | |
1659 | { "movL", Cm, Rm, XX }, | |
1660 | { "movL", Dm, Rm, XX }, | |
57d91c3c ILT |
1661 | { "movL", Rd, Td, XX }, |
1662 | { "(bad)", XX, XX, XX }, | |
1663 | { "movL", Td, Rd, XX }, | |
1664 | { "(bad)", XX, XX, XX }, | |
252b5132 | 1665 | /* 28 */ |
041bd2e0 JH |
1666 | { "movapX", XM, EX, XX }, |
1667 | { "movapX", EX, XM, XX }, | |
c608c12e | 1668 | { PREGRP2 }, |
041bd2e0 | 1669 | { "movntpX", Ev, XM, XX }, |
2da11e11 | 1670 | { PREGRP4 }, |
c608c12e | 1671 | { PREGRP3 }, |
041bd2e0 JH |
1672 | { "ucomisX", XM,EX, XX }, |
1673 | { "comisX", XM,EX, XX }, | |
252b5132 | 1674 | /* 30 */ |
57d91c3c ILT |
1675 | { "wrmsr", XX, XX, XX }, |
1676 | { "rdtsc", XX, XX, XX }, | |
1677 | { "rdmsr", XX, XX, XX }, | |
1678 | { "rdpmc", XX, XX, XX }, | |
1679 | { "sysenter", XX, XX, XX }, | |
1680 | { "sysexit", XX, XX, XX }, | |
1681 | { "(bad)", XX, XX, XX }, | |
1682 | { "(bad)", XX, XX, XX }, | |
252b5132 | 1683 | /* 38 */ |
57d91c3c ILT |
1684 | { "(bad)", XX, XX, XX }, |
1685 | { "(bad)", XX, XX, XX }, | |
1686 | { "(bad)", XX, XX, XX }, | |
1687 | { "(bad)", XX, XX, XX }, | |
1688 | { "(bad)", XX, XX, XX }, | |
1689 | { "(bad)", XX, XX, XX }, | |
1690 | { "(bad)", XX, XX, XX }, | |
1691 | { "(bad)", XX, XX, XX }, | |
252b5132 | 1692 | /* 40 */ |
57d91c3c ILT |
1693 | { "cmovo", Gv, Ev, XX }, |
1694 | { "cmovno", Gv, Ev, XX }, | |
1695 | { "cmovb", Gv, Ev, XX }, | |
1696 | { "cmovae", Gv, Ev, XX }, | |
1697 | { "cmove", Gv, Ev, XX }, | |
1698 | { "cmovne", Gv, Ev, XX }, | |
1699 | { "cmovbe", Gv, Ev, XX }, | |
1700 | { "cmova", Gv, Ev, XX }, | |
252b5132 | 1701 | /* 48 */ |
57d91c3c ILT |
1702 | { "cmovs", Gv, Ev, XX }, |
1703 | { "cmovns", Gv, Ev, XX }, | |
1704 | { "cmovp", Gv, Ev, XX }, | |
1705 | { "cmovnp", Gv, Ev, XX }, | |
1706 | { "cmovl", Gv, Ev, XX }, | |
1707 | { "cmovge", Gv, Ev, XX }, | |
1708 | { "cmovle", Gv, Ev, XX }, | |
1709 | { "cmovg", Gv, Ev, XX }, | |
252b5132 | 1710 | /* 50 */ |
041bd2e0 | 1711 | { "movmskpX", Gv, EX, XX }, |
c608c12e AM |
1712 | { PREGRP13 }, |
1713 | { PREGRP12 }, | |
1714 | { PREGRP11 }, | |
041bd2e0 JH |
1715 | { "andpX", XM, EX, XX }, |
1716 | { "andnpX", XM, EX, XX }, | |
1717 | { "orpX", XM, EX, XX }, | |
1718 | { "xorpX", XM, EX, XX }, | |
252b5132 | 1719 | /* 58 */ |
c608c12e AM |
1720 | { PREGRP0 }, |
1721 | { PREGRP10 }, | |
041bd2e0 JH |
1722 | { PREGRP17 }, |
1723 | { PREGRP16 }, | |
c608c12e AM |
1724 | { PREGRP14 }, |
1725 | { PREGRP7 }, | |
1726 | { PREGRP5 }, | |
2da11e11 | 1727 | { PREGRP6 }, |
252b5132 | 1728 | /* 60 */ |
57d91c3c ILT |
1729 | { "punpcklbw", MX, EM, XX }, |
1730 | { "punpcklwd", MX, EM, XX }, | |
1731 | { "punpckldq", MX, EM, XX }, | |
1732 | { "packsswb", MX, EM, XX }, | |
1733 | { "pcmpgtb", MX, EM, XX }, | |
1734 | { "pcmpgtw", MX, EM, XX }, | |
1735 | { "pcmpgtd", MX, EM, XX }, | |
1736 | { "packuswb", MX, EM, XX }, | |
252b5132 | 1737 | /* 68 */ |
57d91c3c ILT |
1738 | { "punpckhbw", MX, EM, XX }, |
1739 | { "punpckhwd", MX, EM, XX }, | |
1740 | { "punpckhdq", MX, EM, XX }, | |
1741 | { "packssdw", MX, EM, XX }, | |
0f17484f | 1742 | { PREGRP26 }, |
041bd2e0 | 1743 | { PREGRP24 }, |
57d91c3c | 1744 | { "movd", MX, Ed, XX }, |
041bd2e0 | 1745 | { PREGRP19 }, |
252b5132 | 1746 | /* 70 */ |
041bd2e0 | 1747 | { PREGRP22 }, |
252b5132 RH |
1748 | { GRP10 }, |
1749 | { GRP11 }, | |
1750 | { GRP12 }, | |
57d91c3c ILT |
1751 | { "pcmpeqb", MX, EM, XX }, |
1752 | { "pcmpeqw", MX, EM, XX }, | |
1753 | { "pcmpeqd", MX, EM, XX }, | |
1754 | { "emms", XX, XX, XX }, | |
252b5132 | 1755 | /* 78 */ |
57d91c3c ILT |
1756 | { "(bad)", XX, XX, XX }, |
1757 | { "(bad)", XX, XX, XX }, | |
1758 | { "(bad)", XX, XX, XX }, | |
1759 | { "(bad)", XX, XX, XX }, | |
1760 | { "(bad)", XX, XX, XX }, | |
1761 | { "(bad)", XX, XX, XX }, | |
041bd2e0 JH |
1762 | { PREGRP23 }, |
1763 | { PREGRP20 }, | |
252b5132 | 1764 | /* 80 */ |
57d91c3c ILT |
1765 | { "jo", Jv, XX, XX }, |
1766 | { "jno", Jv, XX, XX }, | |
1767 | { "jb", Jv, XX, XX }, | |
1768 | { "jae", Jv, XX, XX }, | |
1769 | { "je", Jv, XX, XX }, | |
1770 | { "jne", Jv, XX, XX }, | |
1771 | { "jbe", Jv, XX, XX }, | |
1772 | { "ja", Jv, XX, XX }, | |
252b5132 | 1773 | /* 88 */ |
57d91c3c ILT |
1774 | { "js", Jv, XX, XX }, |
1775 | { "jns", Jv, XX, XX }, | |
1776 | { "jp", Jv, XX, XX }, | |
1777 | { "jnp", Jv, XX, XX }, | |
1778 | { "jl", Jv, XX, XX }, | |
1779 | { "jge", Jv, XX, XX }, | |
1780 | { "jle", Jv, XX, XX }, | |
1781 | { "jg", Jv, XX, XX }, | |
252b5132 | 1782 | /* 90 */ |
57d91c3c ILT |
1783 | { "seto", Eb, XX, XX }, |
1784 | { "setno", Eb, XX, XX }, | |
1785 | { "setb", Eb, XX, XX }, | |
1786 | { "setae", Eb, XX, XX }, | |
1787 | { "sete", Eb, XX, XX }, | |
1788 | { "setne", Eb, XX, XX }, | |
1789 | { "setbe", Eb, XX, XX }, | |
1790 | { "seta", Eb, XX, XX }, | |
252b5132 | 1791 | /* 98 */ |
57d91c3c ILT |
1792 | { "sets", Eb, XX, XX }, |
1793 | { "setns", Eb, XX, XX }, | |
1794 | { "setp", Eb, XX, XX }, | |
1795 | { "setnp", Eb, XX, XX }, | |
1796 | { "setl", Eb, XX, XX }, | |
1797 | { "setge", Eb, XX, XX }, | |
1798 | { "setle", Eb, XX, XX }, | |
1799 | { "setg", Eb, XX, XX }, | |
252b5132 | 1800 | /* a0 */ |
52b15da3 JH |
1801 | { "pushI", fs, XX, XX }, |
1802 | { "popI", fs, XX, XX }, | |
57d91c3c ILT |
1803 | { "cpuid", XX, XX, XX }, |
1804 | { "btS", Ev, Gv, XX }, | |
252b5132 RH |
1805 | { "shldS", Ev, Gv, Ib }, |
1806 | { "shldS", Ev, Gv, CL }, | |
57d91c3c ILT |
1807 | { "(bad)", XX, XX, XX }, |
1808 | { "(bad)", XX, XX, XX }, | |
252b5132 | 1809 | /* a8 */ |
52b15da3 JH |
1810 | { "pushI", gs, XX, XX }, |
1811 | { "popI", gs, XX, XX }, | |
57d91c3c ILT |
1812 | { "rsm", XX, XX, XX }, |
1813 | { "btsS", Ev, Gv, XX }, | |
252b5132 RH |
1814 | { "shrdS", Ev, Gv, Ib }, |
1815 | { "shrdS", Ev, Gv, CL }, | |
1816 | { GRP13 }, | |
57d91c3c | 1817 | { "imulS", Gv, Ev, XX }, |
252b5132 | 1818 | /* b0 */ |
57d91c3c ILT |
1819 | { "cmpxchgB", Eb, Gb, XX }, |
1820 | { "cmpxchgS", Ev, Gv, XX }, | |
1821 | { "lssS", Gv, Mp, XX }, | |
1822 | { "btrS", Ev, Gv, XX }, | |
1823 | { "lfsS", Gv, Mp, XX }, | |
1824 | { "lgsS", Gv, Mp, XX }, | |
1825 | { "movzbR", Gv, Eb, XX }, | |
1826 | { "movzwR", Gv, Ew, XX }, /* yes, there really is movzww ! */ | |
252b5132 | 1827 | /* b8 */ |
57d91c3c ILT |
1828 | { "(bad)", XX, XX, XX }, |
1829 | { "ud2b", XX, XX, XX }, | |
252b5132 | 1830 | { GRP8 }, |
57d91c3c ILT |
1831 | { "btcS", Ev, Gv, XX }, |
1832 | { "bsfS", Gv, Ev, XX }, | |
1833 | { "bsrS", Gv, Ev, XX }, | |
1834 | { "movsbR", Gv, Eb, XX }, | |
1835 | { "movswR", Gv, Ew, XX }, /* yes, there really is movsww ! */ | |
252b5132 | 1836 | /* c0 */ |
57d91c3c ILT |
1837 | { "xaddB", Eb, Gb, XX }, |
1838 | { "xaddS", Ev, Gv, XX }, | |
c608c12e | 1839 | { PREGRP1 }, |
041bd2e0 | 1840 | { "movntiS", Ev, Gv, XX }, |
c608c12e AM |
1841 | { "pinsrw", MX, Ev, Ib }, |
1842 | { "pextrw", Ev, MX, Ib }, | |
041bd2e0 | 1843 | { "shufpX", XM, EX, Ib }, |
252b5132 RH |
1844 | { GRP9 }, |
1845 | /* c8 */ | |
52b15da3 JH |
1846 | { "bswap", RMeAX, XX, XX }, /* bswap doesn't support 16 bit regs */ |
1847 | { "bswap", RMeCX, XX, XX }, | |
1848 | { "bswap", RMeDX, XX, XX }, | |
1849 | { "bswap", RMeBX, XX, XX }, | |
1850 | { "bswap", RMeSP, XX, XX }, | |
1851 | { "bswap", RMeBP, XX, XX }, | |
1852 | { "bswap", RMeSI, XX, XX }, | |
1853 | { "bswap", RMeDI, XX, XX }, | |
252b5132 | 1854 | /* d0 */ |
57d91c3c ILT |
1855 | { "(bad)", XX, XX, XX }, |
1856 | { "psrlw", MX, EM, XX }, | |
1857 | { "psrld", MX, EM, XX }, | |
1858 | { "psrlq", MX, EM, XX }, | |
87890af0 | 1859 | { "paddq", MX, EM, XX }, |
57d91c3c | 1860 | { "pmullw", MX, EM, XX }, |
041bd2e0 | 1861 | { PREGRP21 }, |
57d91c3c | 1862 | { "pmovmskb", Ev, MX, XX }, |
252b5132 | 1863 | /* d8 */ |
57d91c3c ILT |
1864 | { "psubusb", MX, EM, XX }, |
1865 | { "psubusw", MX, EM, XX }, | |
1866 | { "pminub", MX, EM, XX }, | |
1867 | { "pand", MX, EM, XX }, | |
1868 | { "paddusb", MX, EM, XX }, | |
1869 | { "paddusw", MX, EM, XX }, | |
1870 | { "pmaxub", MX, EM, XX }, | |
1871 | { "pandn", MX, EM, XX }, | |
252b5132 | 1872 | /* e0 */ |
57d91c3c ILT |
1873 | { "pavgb", MX, EM, XX }, |
1874 | { "psraw", MX, EM, XX }, | |
1875 | { "psrad", MX, EM, XX }, | |
1876 | { "pavgw", MX, EM, XX }, | |
1877 | { "pmulhuw", MX, EM, XX }, | |
1878 | { "pmulhw", MX, EM, XX }, | |
041bd2e0 | 1879 | { PREGRP15 }, |
0f17484f | 1880 | { PREGRP25 }, |
252b5132 | 1881 | /* e8 */ |
57d91c3c ILT |
1882 | { "psubsb", MX, EM, XX }, |
1883 | { "psubsw", MX, EM, XX }, | |
1884 | { "pminsw", MX, EM, XX }, | |
1885 | { "por", MX, EM, XX }, | |
1886 | { "paddsb", MX, EM, XX }, | |
1887 | { "paddsw", MX, EM, XX }, | |
1888 | { "pmaxsw", MX, EM, XX }, | |
1889 | { "pxor", MX, EM, XX }, | |
252b5132 | 1890 | /* f0 */ |
57d91c3c ILT |
1891 | { "(bad)", XX, XX, XX }, |
1892 | { "psllw", MX, EM, XX }, | |
1893 | { "pslld", MX, EM, XX }, | |
1894 | { "psllq", MX, EM, XX }, | |
041bd2e0 | 1895 | { "pmuludq", MX, EM, XX }, |
57d91c3c ILT |
1896 | { "pmaddwd", MX, EM, XX }, |
1897 | { "psadbw", MX, EM, XX }, | |
041bd2e0 | 1898 | { PREGRP18 }, |
252b5132 | 1899 | /* f8 */ |
57d91c3c ILT |
1900 | { "psubb", MX, EM, XX }, |
1901 | { "psubw", MX, EM, XX }, | |
1902 | { "psubd", MX, EM, XX }, | |
87890af0 | 1903 | { "psubq", MX, EM, XX }, |
57d91c3c ILT |
1904 | { "paddb", MX, EM, XX }, |
1905 | { "paddw", MX, EM, XX }, | |
1906 | { "paddd", MX, EM, XX }, | |
1907 | { "(bad)", XX, XX, XX } | |
252b5132 RH |
1908 | }; |
1909 | ||
2da11e11 | 1910 | static const struct dis386 dis386_twobyte_intel[] = { |
252b5132 RH |
1911 | /* 00 */ |
1912 | { GRP6 }, | |
1913 | { GRP7 }, | |
57d91c3c ILT |
1914 | { "lar", Gv, Ew, XX }, |
1915 | { "lsl", Gv, Ew, XX }, | |
1916 | { "(bad)", XX, XX, XX }, | |
52b15da3 | 1917 | { "syscall", XX, XX, XX }, |
57d91c3c | 1918 | { "clts", XX, XX, XX }, |
52b15da3 | 1919 | { "sysretP", XX, XX, XX }, |
252b5132 | 1920 | /* 08 */ |
57d91c3c ILT |
1921 | { "invd", XX, XX, XX }, |
1922 | { "wbinvd", XX, XX, XX }, | |
1923 | { "(bad)", XX, XX, XX }, | |
1924 | { "ud2a", XX, XX, XX }, | |
1925 | { "(bad)", XX, XX, XX }, | |
c608c12e | 1926 | { GRPAMD }, |
57d91c3c | 1927 | { "femms" , XX, XX, XX}, |
252b5132 RH |
1928 | { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */ |
1929 | /* 10 */ | |
041bd2e0 JH |
1930 | { PREGRP8 }, |
1931 | { PREGRP9 }, | |
1932 | { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */ | |
1933 | { "movlpX", EX, XM, SIMD_Fixup, 'h' }, | |
1934 | { "unpcklpX", XM, EX, XX }, | |
1935 | { "unpckhpX", XM, EX, XX }, | |
1936 | { "movhpX", XM, EX, SIMD_Fixup, 'l' }, | |
1937 | { "movhpX", EX, XM, SIMD_Fixup, 'l' }, | |
252b5132 | 1938 | /* 18 */ |
c608c12e | 1939 | { GRP14 }, |
57d91c3c ILT |
1940 | { "(bad)", XX, XX, XX }, |
1941 | { "(bad)", XX, XX, XX }, | |
1942 | { "(bad)", XX, XX, XX }, | |
1943 | { "(bad)", XX, XX, XX }, | |
1944 | { "(bad)", XX, XX, XX }, | |
1945 | { "(bad)", XX, XX, XX }, | |
1946 | { "(bad)", XX, XX, XX }, | |
252b5132 RH |
1947 | /* 20 */ |
1948 | /* these are all backward in appendix A of the intel book */ | |
52b15da3 JH |
1949 | { "mov", Rm, Cm, XX }, |
1950 | { "mov", Rm, Dm, XX }, | |
1951 | { "mov", Cm, Rm, XX }, | |
1952 | { "mov", Dm, Rm, XX }, | |
57d91c3c ILT |
1953 | { "mov", Rd, Td, XX }, |
1954 | { "(bad)", XX, XX, XX }, | |
1955 | { "mov", Td, Rd, XX }, | |
1956 | { "(bad)", XX, XX, XX }, | |
252b5132 | 1957 | /* 28 */ |
041bd2e0 JH |
1958 | { "movapX", XM, EX, XX }, |
1959 | { "movapX", EX, XM, XX }, | |
c608c12e | 1960 | { PREGRP2 }, |
041bd2e0 | 1961 | { "movntpX", Ev, XM, XX }, |
2da11e11 | 1962 | { PREGRP4 }, |
c608c12e | 1963 | { PREGRP3 }, |
041bd2e0 JH |
1964 | { "ucomisX", XM,EX, XX }, |
1965 | { "comisX", XM,EX, XX }, | |
252b5132 | 1966 | /* 30 */ |
57d91c3c ILT |
1967 | { "wrmsr", XX, XX, XX }, |
1968 | { "rdtsc", XX, XX, XX }, | |
1969 | { "rdmsr", XX, XX, XX }, | |
1970 | { "rdpmc", XX, XX, XX }, | |
1971 | { "sysenter", XX, XX, XX }, | |
1972 | { "sysexit", XX, XX, XX }, | |
1973 | { "(bad)", XX, XX, XX }, | |
1974 | { "(bad)", XX, XX, XX }, | |
252b5132 | 1975 | /* 38 */ |
57d91c3c ILT |
1976 | { "(bad)", XX, XX, XX }, |
1977 | { "(bad)", XX, XX, XX }, | |
1978 | { "(bad)", XX, XX, XX }, | |
1979 | { "(bad)", XX, XX, XX }, | |
1980 | { "(bad)", XX, XX, XX }, | |
1981 | { "(bad)", XX, XX, XX }, | |
1982 | { "(bad)", XX, XX, XX }, | |
1983 | { "(bad)", XX, XX, XX }, | |
252b5132 | 1984 | /* 40 */ |
57d91c3c ILT |
1985 | { "cmovo", Gv, Ev, XX }, |
1986 | { "cmovno", Gv, Ev, XX }, | |
1987 | { "cmovb", Gv, Ev, XX }, | |
1988 | { "cmovae", Gv, Ev, XX }, | |
1989 | { "cmove", Gv, Ev, XX }, | |
1990 | { "cmovne", Gv, Ev, XX }, | |
1991 | { "cmovbe", Gv, Ev, XX }, | |
1992 | { "cmova", Gv, Ev, XX }, | |
252b5132 | 1993 | /* 48 */ |
57d91c3c ILT |
1994 | { "cmovs", Gv, Ev, XX }, |
1995 | { "cmovns", Gv, Ev, XX }, | |
1996 | { "cmovp", Gv, Ev, XX }, | |
1997 | { "cmovnp", Gv, Ev, XX }, | |
1998 | { "cmovl", Gv, Ev, XX }, | |
1999 | { "cmovge", Gv, Ev, XX }, | |
2000 | { "cmovle", Gv, Ev, XX }, | |
2001 | { "cmovg", Gv, Ev, XX }, | |
252b5132 | 2002 | /* 50 */ |
041bd2e0 | 2003 | { "movmskpX", Gv, EX, XX }, |
c608c12e AM |
2004 | { PREGRP13 }, |
2005 | { PREGRP12 }, | |
2006 | { PREGRP11 }, | |
041bd2e0 JH |
2007 | { "andpX", XM, EX, XX }, |
2008 | { "andnpX", XM, EX, XX }, | |
2009 | { "orpX", XM, EX, XX }, | |
2010 | { "xorpX", XM, EX, XX }, | |
252b5132 | 2011 | /* 58 */ |
c608c12e AM |
2012 | { PREGRP0 }, |
2013 | { PREGRP10 }, | |
041bd2e0 JH |
2014 | { PREGRP17 }, |
2015 | { PREGRP16 }, | |
c608c12e AM |
2016 | { PREGRP14 }, |
2017 | { PREGRP7 }, | |
2018 | { PREGRP5 }, | |
2da11e11 | 2019 | { PREGRP6 }, |
252b5132 | 2020 | /* 60 */ |
57d91c3c ILT |
2021 | { "punpcklbw", MX, EM, XX }, |
2022 | { "punpcklwd", MX, EM, XX }, | |
2023 | { "punpckldq", MX, EM, XX }, | |
2024 | { "packsswb", MX, EM, XX }, | |
2025 | { "pcmpgtb", MX, EM, XX }, | |
2026 | { "pcmpgtw", MX, EM, XX }, | |
2027 | { "pcmpgtd", MX, EM, XX }, | |
2028 | { "packuswb", MX, EM, XX }, | |
252b5132 | 2029 | /* 68 */ |
57d91c3c ILT |
2030 | { "punpckhbw", MX, EM, XX }, |
2031 | { "punpckhwd", MX, EM, XX }, | |
2032 | { "punpckhdq", MX, EM, XX }, | |
2033 | { "packssdw", MX, EM, XX }, | |
0f17484f | 2034 | { PREGRP26 }, |
041bd2e0 | 2035 | { PREGRP24 }, |
57d91c3c | 2036 | { "movd", MX, Ed, XX }, |
041bd2e0 | 2037 | { PREGRP19 }, |
252b5132 | 2038 | /* 70 */ |
041bd2e0 | 2039 | { PREGRP22 }, |
252b5132 RH |
2040 | { GRP10 }, |
2041 | { GRP11 }, | |
2042 | { GRP12 }, | |
57d91c3c ILT |
2043 | { "pcmpeqb", MX, EM, XX }, |
2044 | { "pcmpeqw", MX, EM, XX }, | |
2045 | { "pcmpeqd", MX, EM, XX }, | |
2046 | { "emms", XX, XX, XX }, | |
252b5132 | 2047 | /* 78 */ |
57d91c3c ILT |
2048 | { "(bad)", XX, XX, XX }, |
2049 | { "(bad)", XX, XX, XX }, | |
2050 | { "(bad)", XX, XX, XX }, | |
2051 | { "(bad)", XX, XX, XX }, | |
2052 | { "(bad)", XX, XX, XX }, | |
2053 | { "(bad)", XX, XX, XX }, | |
041bd2e0 JH |
2054 | { PREGRP23 }, |
2055 | { PREGRP20 }, | |
252b5132 | 2056 | /* 80 */ |
57d91c3c ILT |
2057 | { "jo", Jv, XX, XX }, |
2058 | { "jno", Jv, XX, XX }, | |
2059 | { "jb", Jv, XX, XX }, | |
2060 | { "jae", Jv, XX, XX }, | |
2061 | { "je", Jv, XX, XX }, | |
2062 | { "jne", Jv, XX, XX }, | |
2063 | { "jbe", Jv, XX, XX }, | |
2064 | { "ja", Jv, XX, XX }, | |
252b5132 | 2065 | /* 88 */ |
57d91c3c ILT |
2066 | { "js", Jv, XX, XX }, |
2067 | { "jns", Jv, XX, XX }, | |
2068 | { "jp", Jv, XX, XX }, | |
2069 | { "jnp", Jv, XX, XX }, | |
2070 | { "jl", Jv, XX, XX }, | |
2071 | { "jge", Jv, XX, XX }, | |
2072 | { "jle", Jv, XX, XX }, | |
2073 | { "jg", Jv, XX, XX }, | |
252b5132 | 2074 | /* 90 */ |
57d91c3c ILT |
2075 | { "seto", Eb, XX, XX }, |
2076 | { "setno", Eb, XX, XX }, | |
2077 | { "setb", Eb, XX, XX }, | |
2078 | { "setae", Eb, XX, XX }, | |
2079 | { "sete", Eb, XX, XX }, | |
2080 | { "setne", Eb, XX, XX }, | |
2081 | { "setbe", Eb, XX, XX }, | |
2082 | { "seta", Eb, XX, XX }, | |
252b5132 | 2083 | /* 98 */ |
57d91c3c ILT |
2084 | { "sets", Eb, XX, XX }, |
2085 | { "setns", Eb, XX, XX }, | |
2086 | { "setp", Eb, XX, XX }, | |
2087 | { "setnp", Eb, XX, XX }, | |
2088 | { "setl", Eb, XX, XX }, | |
2089 | { "setge", Eb, XX, XX }, | |
2090 | { "setle", Eb, XX, XX }, | |
2091 | { "setg", Eb, XX, XX }, | |
252b5132 | 2092 | /* a0 */ |
57d91c3c ILT |
2093 | { "push", fs, XX, XX }, |
2094 | { "pop", fs, XX, XX }, | |
2095 | { "cpuid", XX, XX, XX }, | |
2096 | { "bt", Ev, Gv, XX }, | |
c608c12e AM |
2097 | { "shld", Ev, Gv, Ib }, |
2098 | { "shld", Ev, Gv, CL }, | |
57d91c3c ILT |
2099 | { "(bad)", XX, XX, XX }, |
2100 | { "(bad)", XX, XX, XX }, | |
252b5132 | 2101 | /* a8 */ |
57d91c3c ILT |
2102 | { "push", gs, XX, XX }, |
2103 | { "pop", gs, XX, XX }, | |
2104 | { "rsm" , XX, XX, XX}, | |
2105 | { "bts", Ev, Gv, XX }, | |
c608c12e AM |
2106 | { "shrd", Ev, Gv, Ib }, |
2107 | { "shrd", Ev, Gv, CL }, | |
252b5132 | 2108 | { GRP13 }, |
57d91c3c | 2109 | { "imul", Gv, Ev, XX }, |
252b5132 | 2110 | /* b0 */ |
57d91c3c ILT |
2111 | { "cmpxchg", Eb, Gb, XX }, |
2112 | { "cmpxchg", Ev, Gv, XX }, | |
2113 | { "lss", Gv, Mp, XX }, | |
2114 | { "btr", Ev, Gv, XX }, | |
2115 | { "lfs", Gv, Mp, XX }, | |
2116 | { "lgs", Gv, Mp, XX }, | |
2117 | { "movzx", Gv, Eb, XX }, | |
2118 | { "movzx", Gv, Ew, XX }, | |
252b5132 | 2119 | /* b8 */ |
57d91c3c ILT |
2120 | { "(bad)", XX, XX, XX }, |
2121 | { "ud2b", XX, XX, XX }, | |
252b5132 | 2122 | { GRP8 }, |
57d91c3c ILT |
2123 | { "btc", Ev, Gv, XX }, |
2124 | { "bsf", Gv, Ev, XX }, | |
2125 | { "bsr", Gv, Ev, XX }, | |
2126 | { "movsx", Gv, Eb, XX }, | |
2127 | { "movsx", Gv, Ew, XX }, | |
252b5132 | 2128 | /* c0 */ |
57d91c3c ILT |
2129 | { "xadd", Eb, Gb, XX }, |
2130 | { "xadd", Ev, Gv, XX }, | |
c608c12e | 2131 | { PREGRP1 }, |
041bd2e0 | 2132 | { "movnti", Ev, Gv, XX }, |
c608c12e AM |
2133 | { "pinsrw", MX, Ev, Ib }, |
2134 | { "pextrw", Ev, MX, Ib }, | |
041bd2e0 | 2135 | { "shufpX", XM, EX, Ib }, |
252b5132 RH |
2136 | { GRP9 }, |
2137 | /* c8 */ | |
52b15da3 JH |
2138 | { "bswap", RMeAX, XX, XX }, /* bswap doesn't support 16 bit regs */ |
2139 | { "bswap", RMeCX, XX, XX }, | |
2140 | { "bswap", RMeDX, XX, XX }, | |
2141 | { "bswap", RMeBX, XX, XX }, | |
2142 | { "bswap", RMeSP, XX, XX }, | |
2143 | { "bswap", RMeBP, XX, XX }, | |
2144 | { "bswap", RMeSI, XX, XX }, | |
2145 | { "bswap", RMeDI, XX, XX }, | |
252b5132 | 2146 | /* d0 */ |
57d91c3c ILT |
2147 | { "(bad)", XX, XX, XX }, |
2148 | { "psrlw", MX, EM, XX }, | |
2149 | { "psrld", MX, EM, XX }, | |
2150 | { "psrlq", MX, EM, XX }, | |
87890af0 | 2151 | { "paddq", MX, EM, XX }, |
57d91c3c | 2152 | { "pmullw", MX, EM, XX }, |
041bd2e0 | 2153 | { PREGRP21 }, |
57d91c3c | 2154 | { "pmovmskb", Ev, MX, XX }, |
252b5132 | 2155 | /* d8 */ |
57d91c3c ILT |
2156 | { "psubusb", MX, EM, XX }, |
2157 | { "psubusw", MX, EM, XX }, | |
2158 | { "pminub", MX, EM, XX }, | |
2159 | { "pand", MX, EM, XX }, | |
2160 | { "paddusb", MX, EM, XX }, | |
2161 | { "paddusw", MX, EM, XX }, | |
2162 | { "pmaxub", MX, EM, XX }, | |
2163 | { "pandn", MX, EM, XX }, | |
252b5132 | 2164 | /* e0 */ |
57d91c3c ILT |
2165 | { "pavgb", MX, EM, XX }, |
2166 | { "psraw", MX, EM, XX }, | |
2167 | { "psrad", MX, EM, XX }, | |
2168 | { "pavgw", MX, EM, XX }, | |
2169 | { "pmulhuw", MX, EM, XX }, | |
2170 | { "pmulhw", MX, EM, XX }, | |
041bd2e0 | 2171 | { PREGRP15 }, |
0f17484f | 2172 | { PREGRP25 }, |
252b5132 | 2173 | /* e8 */ |
57d91c3c ILT |
2174 | { "psubsb", MX, EM, XX }, |
2175 | { "psubsw", MX, EM, XX }, | |
2176 | { "pminsw", MX, EM, XX }, | |
2177 | { "por", MX, EM, XX }, | |
2178 | { "paddsb", MX, EM, XX }, | |
2179 | { "paddsw", MX, EM, XX }, | |
2180 | { "pmaxsw", MX, EM, XX }, | |
2181 | { "pxor", MX, EM, XX }, | |
252b5132 | 2182 | /* f0 */ |
57d91c3c ILT |
2183 | { "(bad)", XX, XX, XX }, |
2184 | { "psllw", MX, EM, XX }, | |
2185 | { "pslld", MX, EM, XX }, | |
2186 | { "psllq", MX, EM, XX }, | |
041bd2e0 | 2187 | { "pmuludq", MX, EM, XX }, |
57d91c3c ILT |
2188 | { "pmaddwd", MX, EM, XX }, |
2189 | { "psadbw", MX, EM, XX }, | |
041bd2e0 | 2190 | { PREGRP18 }, |
252b5132 | 2191 | /* f8 */ |
57d91c3c ILT |
2192 | { "psubb", MX, EM, XX }, |
2193 | { "psubw", MX, EM, XX }, | |
2194 | { "psubd", MX, EM, XX }, | |
87890af0 | 2195 | { "psubq", MX, EM, XX }, |
57d91c3c ILT |
2196 | { "paddb", MX, EM, XX }, |
2197 | { "paddw", MX, EM, XX }, | |
2198 | { "paddd", MX, EM, XX }, | |
2199 | { "(bad)", XX, XX, XX } | |
252b5132 RH |
2200 | }; |
2201 | ||
2202 | static const unsigned char onebyte_has_modrm[256] = { | |
c608c12e AM |
2203 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ |
2204 | /* ------------------------------- */ | |
2205 | /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */ | |
2206 | /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */ | |
2207 | /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */ | |
2208 | /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */ | |
2209 | /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */ | |
2210 | /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */ | |
2211 | /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */ | |
2212 | /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */ | |
2213 | /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */ | |
2214 | /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */ | |
2215 | /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */ | |
2216 | /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */ | |
2217 | /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */ | |
2218 | /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */ | |
2219 | /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */ | |
2220 | /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */ | |
2221 | /* ------------------------------- */ | |
2222 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ | |
252b5132 RH |
2223 | }; |
2224 | ||
2225 | static const unsigned char twobyte_has_modrm[256] = { | |
c608c12e AM |
2226 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ |
2227 | /* ------------------------------- */ | |
252b5132 | 2228 | /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */ |
c608c12e AM |
2229 | /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */ |
2230 | /* 20 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 2f */ | |
252b5132 RH |
2231 | /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ |
2232 | /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */ | |
c608c12e | 2233 | /* 50 */ 1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1, /* 5f */ |
252b5132 | 2234 | /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1, /* 6f */ |
c608c12e | 2235 | /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */ |
252b5132 RH |
2236 | /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
2237 | /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */ | |
2238 | /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */ | |
2239 | /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */ | |
2240 | /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */ | |
87890af0 | 2241 | /* d0 */ 0,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* df */ |
c608c12e | 2242 | /* e0 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* ef */ |
87890af0 | 2243 | /* f0 */ 0,1,1,1,0,1,1,1,1,1,1,1,1,1,1,0 /* ff */ |
c608c12e AM |
2244 | /* ------------------------------- */ |
2245 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ | |
2246 | }; | |
2247 | ||
041bd2e0 | 2248 | static const unsigned char twobyte_uses_SSE_prefix[256] = { |
c608c12e AM |
2249 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ |
2250 | /* ------------------------------- */ | |
2251 | /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ | |
2252 | /* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ | |
2253 | /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */ | |
2254 | /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ | |
2255 | /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ | |
041bd2e0 JH |
2256 | /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ |
2257 | /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */ | |
2258 | /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */ | |
c608c12e AM |
2259 | /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
2260 | /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ | |
2261 | /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ | |
2262 | /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ | |
2263 | /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ | |
041bd2e0 JH |
2264 | /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ |
2265 | /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ | |
2266 | /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */ | |
c608c12e AM |
2267 | /* ------------------------------- */ |
2268 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ | |
252b5132 RH |
2269 | }; |
2270 | ||
2271 | static char obuf[100]; | |
2272 | static char *obufp; | |
2273 | static char scratchbuf[100]; | |
2274 | static unsigned char *start_codep; | |
2275 | static unsigned char *insn_codep; | |
2276 | static unsigned char *codep; | |
2277 | static disassemble_info *the_info; | |
2278 | static int mod; | |
2279 | static int rm; | |
2280 | static int reg; | |
2da11e11 | 2281 | static void oappend PARAMS ((const char *s)); |
252b5132 | 2282 | |
52b15da3 JH |
2283 | static const char *names64[] = { |
2284 | "%rax","%rcx","%rdx","%rbx", "%rsp","%rbp","%rsi","%rdi", | |
2285 | "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" | |
2286 | }; | |
2287 | static const char *names32[] = { | |
252b5132 | 2288 | "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi", |
52b15da3 | 2289 | "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d" |
252b5132 | 2290 | }; |
2da11e11 | 2291 | static const char *names16[] = { |
252b5132 | 2292 | "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di", |
52b15da3 | 2293 | "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w" |
252b5132 | 2294 | }; |
2da11e11 | 2295 | static const char *names8[] = { |
252b5132 RH |
2296 | "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh", |
2297 | }; | |
52b15da3 JH |
2298 | static const char *names8rex[] = { |
2299 | "%al","%cl","%dl","%bl","%spl", "%bpl", "%sil", "%dil", | |
2300 | "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b" | |
2301 | }; | |
2da11e11 | 2302 | static const char *names_seg[] = { |
252b5132 RH |
2303 | "%es","%cs","%ss","%ds","%fs","%gs","%?","%?", |
2304 | }; | |
2da11e11 | 2305 | static const char *index16[] = { |
252b5132 RH |
2306 | "%bx,%si","%bx,%di","%bp,%si","%bp,%di","%si","%di","%bp","%bx" |
2307 | }; | |
2308 | ||
2da11e11 | 2309 | static const struct dis386 grps[][8] = { |
252b5132 RH |
2310 | /* GRP1b */ |
2311 | { | |
57d91c3c ILT |
2312 | { "addA", Eb, Ib, XX }, |
2313 | { "orA", Eb, Ib, XX }, | |
2314 | { "adcA", Eb, Ib, XX }, | |
2315 | { "sbbA", Eb, Ib, XX }, | |
2316 | { "andA", Eb, Ib, XX }, | |
2317 | { "subA", Eb, Ib, XX }, | |
2318 | { "xorA", Eb, Ib, XX }, | |
2319 | { "cmpA", Eb, Ib, XX } | |
252b5132 RH |
2320 | }, |
2321 | /* GRP1S */ | |
2322 | { | |
57d91c3c ILT |
2323 | { "addQ", Ev, Iv, XX }, |
2324 | { "orQ", Ev, Iv, XX }, | |
2325 | { "adcQ", Ev, Iv, XX }, | |
2326 | { "sbbQ", Ev, Iv, XX }, | |
2327 | { "andQ", Ev, Iv, XX }, | |
2328 | { "subQ", Ev, Iv, XX }, | |
2329 | { "xorQ", Ev, Iv, XX }, | |
2330 | { "cmpQ", Ev, Iv, XX } | |
252b5132 RH |
2331 | }, |
2332 | /* GRP1Ss */ | |
2333 | { | |
57d91c3c ILT |
2334 | { "addQ", Ev, sIb, XX }, |
2335 | { "orQ", Ev, sIb, XX }, | |
2336 | { "adcQ", Ev, sIb, XX }, | |
2337 | { "sbbQ", Ev, sIb, XX }, | |
2338 | { "andQ", Ev, sIb, XX }, | |
2339 | { "subQ", Ev, sIb, XX }, | |
2340 | { "xorQ", Ev, sIb, XX }, | |
2341 | { "cmpQ", Ev, sIb, XX } | |
252b5132 RH |
2342 | }, |
2343 | /* GRP2b */ | |
2344 | { | |
57d91c3c ILT |
2345 | { "rolA", Eb, Ib, XX }, |
2346 | { "rorA", Eb, Ib, XX }, | |
2347 | { "rclA", Eb, Ib, XX }, | |
2348 | { "rcrA", Eb, Ib, XX }, | |
2349 | { "shlA", Eb, Ib, XX }, | |
2350 | { "shrA", Eb, Ib, XX }, | |
2351 | { "(bad)", XX, XX, XX }, | |
2352 | { "sarA", Eb, Ib, XX }, | |
252b5132 RH |
2353 | }, |
2354 | /* GRP2S */ | |
2355 | { | |
57d91c3c ILT |
2356 | { "rolQ", Ev, Ib, XX }, |
2357 | { "rorQ", Ev, Ib, XX }, | |
2358 | { "rclQ", Ev, Ib, XX }, | |
2359 | { "rcrQ", Ev, Ib, XX }, | |
2360 | { "shlQ", Ev, Ib, XX }, | |
2361 | { "shrQ", Ev, Ib, XX }, | |
2362 | { "(bad)", XX, XX, XX }, | |
2363 | { "sarQ", Ev, Ib, XX }, | |
252b5132 RH |
2364 | }, |
2365 | /* GRP2b_one */ | |
2366 | { | |
57d91c3c ILT |
2367 | { "rolA", Eb, XX, XX }, |
2368 | { "rorA", Eb, XX, XX }, | |
2369 | { "rclA", Eb, XX, XX }, | |
2370 | { "rcrA", Eb, XX, XX }, | |
2371 | { "shlA", Eb, XX, XX }, | |
2372 | { "shrA", Eb, XX, XX }, | |
2373 | { "(bad)", XX, XX, XX }, | |
2374 | { "sarA", Eb, XX, XX }, | |
252b5132 RH |
2375 | }, |
2376 | /* GRP2S_one */ | |
2377 | { | |
57d91c3c ILT |
2378 | { "rolQ", Ev, XX, XX }, |
2379 | { "rorQ", Ev, XX, XX }, | |
2380 | { "rclQ", Ev, XX, XX }, | |
2381 | { "rcrQ", Ev, XX, XX }, | |
2382 | { "shlQ", Ev, XX, XX }, | |
2383 | { "shrQ", Ev, XX, XX }, | |
2384 | { "(bad)", XX, XX, XX}, | |
2385 | { "sarQ", Ev, XX, XX }, | |
252b5132 RH |
2386 | }, |
2387 | /* GRP2b_cl */ | |
2388 | { | |
57d91c3c ILT |
2389 | { "rolA", Eb, CL, XX }, |
2390 | { "rorA", Eb, CL, XX }, | |
2391 | { "rclA", Eb, CL, XX }, | |
2392 | { "rcrA", Eb, CL, XX }, | |
2393 | { "shlA", Eb, CL, XX }, | |
2394 | { "shrA", Eb, CL, XX }, | |
2395 | { "(bad)", XX, XX, XX }, | |
2396 | { "sarA", Eb, CL, XX }, | |
252b5132 RH |
2397 | }, |
2398 | /* GRP2S_cl */ | |
2399 | { | |
57d91c3c ILT |
2400 | { "rolQ", Ev, CL, XX }, |
2401 | { "rorQ", Ev, CL, XX }, | |
2402 | { "rclQ", Ev, CL, XX }, | |
2403 | { "rcrQ", Ev, CL, XX }, | |
2404 | { "shlQ", Ev, CL, XX }, | |
2405 | { "shrQ", Ev, CL, XX }, | |
2406 | { "(bad)", XX, XX, XX }, | |
2407 | { "sarQ", Ev, CL, XX } | |
252b5132 RH |
2408 | }, |
2409 | /* GRP3b */ | |
2410 | { | |
57d91c3c ILT |
2411 | { "testA", Eb, Ib, XX }, |
2412 | { "(bad)", Eb, XX, XX }, | |
2413 | { "notA", Eb, XX, XX }, | |
2414 | { "negA", Eb, XX, XX }, | |
2415 | { "mulB", AL, Eb, XX }, | |
2416 | { "imulB", AL, Eb, XX }, | |
2417 | { "divB", AL, Eb, XX }, | |
2418 | { "idivB", AL, Eb, XX } | |
252b5132 RH |
2419 | }, |
2420 | /* GRP3S */ | |
2421 | { | |
57d91c3c ILT |
2422 | { "testQ", Ev, Iv, XX }, |
2423 | { "(bad)", XX, XX, XX }, | |
2424 | { "notQ", Ev, XX, XX }, | |
2425 | { "negQ", Ev, XX, XX }, | |
2426 | { "mulS", eAX, Ev, XX }, | |
2427 | { "imulS", eAX, Ev, XX }, | |
2428 | { "divS", eAX, Ev, XX }, | |
2429 | { "idivS", eAX, Ev, XX }, | |
252b5132 RH |
2430 | }, |
2431 | /* GRP4 */ | |
2432 | { | |
57d91c3c ILT |
2433 | { "incA", Eb, XX, XX }, |
2434 | { "decA", Eb, XX, XX }, | |
2435 | { "(bad)", XX, XX, XX }, | |
2436 | { "(bad)", XX, XX, XX }, | |
2437 | { "(bad)", XX, XX, XX }, | |
2438 | { "(bad)", XX, XX, XX }, | |
2439 | { "(bad)", XX, XX, XX }, | |
2440 | { "(bad)", XX, XX, XX }, | |
252b5132 RH |
2441 | }, |
2442 | /* GRP5 */ | |
2443 | { | |
57d91c3c ILT |
2444 | { "incQ", Ev, XX, XX }, |
2445 | { "decQ", Ev, XX, XX }, | |
52b15da3 JH |
2446 | { "callI", indirEv, XX, XX }, |
2447 | { "lcallI", indirEv, XX, XX }, | |
2448 | { "jmpI", indirEv, XX, XX }, | |
2449 | { "ljmpI", indirEv, XX, XX }, | |
90530880 | 2450 | { "pushT", Ev, XX, XX }, |
57d91c3c | 2451 | { "(bad)", XX, XX, XX }, |
252b5132 RH |
2452 | }, |
2453 | /* GRP6 */ | |
2454 | { | |
57d91c3c ILT |
2455 | { "sldt", Ew, XX, XX }, |
2456 | { "str", Ew, XX, XX }, | |
2457 | { "lldt", Ew, XX, XX }, | |
2458 | { "ltr", Ew, XX, XX }, | |
2459 | { "verr", Ew, XX, XX }, | |
2460 | { "verw", Ew, XX, XX }, | |
2461 | { "(bad)", XX, XX, XX }, | |
2462 | { "(bad)", XX, XX, XX } | |
252b5132 RH |
2463 | }, |
2464 | /* GRP7 */ | |
2465 | { | |
57d91c3c ILT |
2466 | { "sgdt", Ew, XX, XX }, |
2467 | { "sidt", Ew, XX, XX }, | |
2468 | { "lgdt", Ew, XX, XX }, | |
2469 | { "lidt", Ew, XX, XX }, | |
2470 | { "smsw", Ew, XX, XX }, | |
2471 | { "(bad)", XX, XX, XX }, | |
2472 | { "lmsw", Ew, XX, XX }, | |
2473 | { "invlpg", Ew, XX, XX }, | |
252b5132 RH |
2474 | }, |
2475 | /* GRP8 */ | |
2476 | { | |
57d91c3c ILT |
2477 | { "(bad)", XX, XX, XX }, |
2478 | { "(bad)", XX, XX, XX }, | |
2479 | { "(bad)", XX, XX, XX }, | |
2480 | { "(bad)", XX, XX, XX }, | |
2481 | { "btQ", Ev, Ib, XX }, | |
2482 | { "btsQ", Ev, Ib, XX }, | |
2483 | { "btrQ", Ev, Ib, XX }, | |
2484 | { "btcQ", Ev, Ib, XX }, | |
252b5132 RH |
2485 | }, |
2486 | /* GRP9 */ | |
2487 | { | |
57d91c3c ILT |
2488 | { "(bad)", XX, XX, XX }, |
2489 | { "cmpxchg8b", Ev, XX, XX }, | |
2490 | { "(bad)", XX, XX, XX }, | |
2491 | { "(bad)", XX, XX, XX }, | |
2492 | { "(bad)", XX, XX, XX }, | |
2493 | { "(bad)", XX, XX, XX }, | |
2494 | { "(bad)", XX, XX, XX }, | |
2495 | { "(bad)", XX, XX, XX }, | |
252b5132 RH |
2496 | }, |
2497 | /* GRP10 */ | |
2498 | { | |
57d91c3c ILT |
2499 | { "(bad)", XX, XX, XX }, |
2500 | { "(bad)", XX, XX, XX }, | |
2501 | { "psrlw", MS, Ib, XX }, | |
2502 | { "(bad)", XX, XX, XX }, | |
2503 | { "psraw", MS, Ib, XX }, | |
2504 | { "(bad)", XX, XX, XX }, | |
2505 | { "psllw", MS, Ib, XX }, | |
2506 | { "(bad)", XX, XX, XX }, | |
252b5132 RH |
2507 | }, |
2508 | /* GRP11 */ | |
2509 | { | |
57d91c3c ILT |
2510 | { "(bad)", XX, XX, XX }, |
2511 | { "(bad)", XX, XX, XX }, | |
2512 | { "psrld", MS, Ib, XX }, | |
2513 | { "(bad)", XX, XX, XX }, | |
2514 | { "psrad", MS, Ib, XX }, | |
2515 | { "(bad)", XX, XX, XX }, | |
2516 | { "pslld", MS, Ib, XX }, | |
2517 | { "(bad)", XX, XX, XX }, | |
252b5132 RH |
2518 | }, |
2519 | /* GRP12 */ | |
2520 | { | |
57d91c3c ILT |
2521 | { "(bad)", XX, XX, XX }, |
2522 | { "(bad)", XX, XX, XX }, | |
2523 | { "psrlq", MS, Ib, XX }, | |
041bd2e0 | 2524 | { "psrldq", MS, Ib, XX }, |
57d91c3c ILT |
2525 | { "(bad)", XX, XX, XX }, |
2526 | { "(bad)", XX, XX, XX }, | |
2527 | { "psllq", MS, Ib, XX }, | |
041bd2e0 | 2528 | { "pslldq", MS, Ib, XX }, |
252b5132 RH |
2529 | }, |
2530 | /* GRP13 */ | |
2531 | { | |
57d91c3c ILT |
2532 | { "fxsave", Ev, XX, XX }, |
2533 | { "fxrstor", Ev, XX, XX }, | |
2534 | { "ldmxcsr", Ev, XX, XX }, | |
2535 | { "stmxcsr", Ev, XX, XX }, | |
2536 | { "(bad)", XX, XX, XX }, | |
041bd2e0 JH |
2537 | { "lfence", None, XX, XX }, |
2538 | { "mfence", None, XX, XX }, | |
57d91c3c | 2539 | { "sfence", None, XX, XX }, |
041bd2e0 | 2540 | /* FIXME: the sfence with memory operand is clflush! */ |
c608c12e AM |
2541 | }, |
2542 | /* GRP14 */ | |
2543 | { | |
57d91c3c ILT |
2544 | { "prefetchnta", Ev, XX, XX }, |
2545 | { "prefetcht0", Ev, XX, XX }, | |
2546 | { "prefetcht1", Ev, XX, XX }, | |
2547 | { "prefetcht2", Ev, XX, XX }, | |
2548 | { "(bad)", XX, XX, XX }, | |
2549 | { "(bad)", XX, XX, XX }, | |
2550 | { "(bad)", XX, XX, XX }, | |
2551 | { "(bad)", XX, XX, XX }, | |
252b5132 | 2552 | }, |
c608c12e | 2553 | /* GRPAMD */ |
252b5132 | 2554 | { |
57d91c3c ILT |
2555 | { "prefetch", Eb, XX, XX }, |
2556 | { "prefetchw", Eb, XX, XX }, | |
2557 | { "(bad)", XX, XX, XX }, | |
2558 | { "(bad)", XX, XX, XX }, | |
2559 | { "(bad)", XX, XX, XX }, | |
2560 | { "(bad)", XX, XX, XX }, | |
2561 | { "(bad)", XX, XX, XX }, | |
2562 | { "(bad)", XX, XX, XX }, | |
252b5132 RH |
2563 | } |
2564 | ||
2565 | }; | |
2566 | ||
041bd2e0 | 2567 | static const struct dis386 prefix_user_table[][4] = { |
c608c12e AM |
2568 | /* PREGRP0 */ |
2569 | { | |
57d91c3c ILT |
2570 | { "addps", XM, EX, XX }, |
2571 | { "addss", XM, EX, XX }, | |
041bd2e0 JH |
2572 | { "addpd", XM, EX, XX }, |
2573 | { "addsd", XM, EX, XX }, | |
c608c12e AM |
2574 | }, |
2575 | /* PREGRP1 */ | |
2576 | { | |
2577 | { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX */ | |
2578 | { "", XM, EX, OPSIMD }, | |
041bd2e0 JH |
2579 | { "", XM, EX, OPSIMD }, |
2580 | { "", XM, EX, OPSIMD }, | |
c608c12e AM |
2581 | }, |
2582 | /* PREGRP2 */ | |
2583 | { | |
57d91c3c | 2584 | { "cvtpi2ps", XM, EM, XX }, |
76f227a5 | 2585 | { "cvtsi2ssY", XM, Ev, XX }, |
041bd2e0 | 2586 | { "cvtpi2pd", XM, EM, XX }, |
76f227a5 | 2587 | { "cvtsi2sdY", XM, Ev, XX }, |
c608c12e AM |
2588 | }, |
2589 | /* PREGRP3 */ | |
2590 | { | |
57d91c3c | 2591 | { "cvtps2pi", MX, EX, XX }, |
76f227a5 | 2592 | { "cvtss2siY", Gv, EX, XX }, |
041bd2e0 | 2593 | { "cvtpd2pi", MX, EX, XX }, |
76f227a5 | 2594 | { "cvtsd2siY", Gv, EX, XX }, |
c608c12e AM |
2595 | }, |
2596 | /* PREGRP4 */ | |
2597 | { | |
57d91c3c | 2598 | { "cvttps2pi", MX, EX, XX }, |
76f227a5 | 2599 | { "cvttss2siY", Gv, EX, XX }, |
041bd2e0 | 2600 | { "cvttpd2pi", MX, EX, XX }, |
76f227a5 | 2601 | { "cvttsd2siY", Gv, EX, XX }, |
c608c12e AM |
2602 | }, |
2603 | /* PREGRP5 */ | |
2604 | { | |
57d91c3c ILT |
2605 | { "divps", XM, EX, XX }, |
2606 | { "divss", XM, EX, XX }, | |
041bd2e0 JH |
2607 | { "divpd", XM, EX, XX }, |
2608 | { "divsd", XM, EX, XX }, | |
c608c12e AM |
2609 | }, |
2610 | /* PREGRP6 */ | |
2611 | { | |
57d91c3c ILT |
2612 | { "maxps", XM, EX, XX }, |
2613 | { "maxss", XM, EX, XX }, | |
041bd2e0 JH |
2614 | { "maxpd", XM, EX, XX }, |
2615 | { "maxsd", XM, EX, XX }, | |
c608c12e AM |
2616 | }, |
2617 | /* PREGRP7 */ | |
2618 | { | |
57d91c3c ILT |
2619 | { "minps", XM, EX, XX }, |
2620 | { "minss", XM, EX, XX }, | |
041bd2e0 JH |
2621 | { "minpd", XM, EX, XX }, |
2622 | { "minsd", XM, EX, XX }, | |
c608c12e AM |
2623 | }, |
2624 | /* PREGRP8 */ | |
2625 | { | |
57d91c3c ILT |
2626 | { "movups", XM, EX, XX }, |
2627 | { "movss", XM, EX, XX }, | |
041bd2e0 JH |
2628 | { "movupd", XM, EX, XX }, |
2629 | { "movsd", XM, EX, XX }, | |
c608c12e AM |
2630 | }, |
2631 | /* PREGRP9 */ | |
2632 | { | |
57d91c3c ILT |
2633 | { "movups", EX, XM, XX }, |
2634 | { "movss", EX, XM, XX }, | |
041bd2e0 JH |
2635 | { "movupd", EX, XM, XX }, |
2636 | { "movsd", EX, XM, XX }, | |
c608c12e AM |
2637 | }, |
2638 | /* PREGRP10 */ | |
2639 | { | |
57d91c3c ILT |
2640 | { "mulps", XM, EX, XX }, |
2641 | { "mulss", XM, EX, XX }, | |
041bd2e0 JH |
2642 | { "mulpd", XM, EX, XX }, |
2643 | { "mulsd", XM, EX, XX }, | |
c608c12e AM |
2644 | }, |
2645 | /* PREGRP11 */ | |
2646 | { | |
57d91c3c ILT |
2647 | { "rcpps", XM, EX, XX }, |
2648 | { "rcpss", XM, EX, XX }, | |
041bd2e0 JH |
2649 | { "(bad)", XM, EX, XX }, |
2650 | { "(bad)", XM, EX, XX }, | |
c608c12e AM |
2651 | }, |
2652 | /* PREGRP12 */ | |
2653 | { | |
57d91c3c ILT |
2654 | { "rsqrtps", XM, EX, XX }, |
2655 | { "rsqrtss", XM, EX, XX }, | |
041bd2e0 JH |
2656 | { "(bad)", XM, EX, XX }, |
2657 | { "(bad)", XM, EX, XX }, | |
c608c12e AM |
2658 | }, |
2659 | /* PREGRP13 */ | |
2660 | { | |
57d91c3c ILT |
2661 | { "sqrtps", XM, EX, XX }, |
2662 | { "sqrtss", XM, EX, XX }, | |
041bd2e0 JH |
2663 | { "sqrtpd", XM, EX, XX }, |
2664 | { "sqrtsd", XM, EX, XX }, | |
c608c12e AM |
2665 | }, |
2666 | /* PREGRP14 */ | |
2667 | { | |
57d91c3c ILT |
2668 | { "subps", XM, EX, XX }, |
2669 | { "subss", XM, EX, XX }, | |
041bd2e0 JH |
2670 | { "subpd", XM, EX, XX }, |
2671 | { "subsd", XM, EX, XX }, | |
2672 | }, | |
2673 | /* PREGRP15 */ | |
2674 | { | |
2675 | { "(bad)", XM, EX, XX }, | |
2676 | { "cvtdq2pd", XM, EX, XX }, | |
2677 | { "cvttpd2dq", XM, EX, XX }, | |
2678 | { "cvtpd2dq", XM, EX, XX }, | |
2679 | }, | |
2680 | /* PREGRP16 */ | |
2681 | { | |
2682 | { "cvtdq2ps", XM, EX, XX }, | |
2683 | { "cvttps2dq",XM, EX, XX }, | |
2684 | { "cvtps2dq",XM, EX, XX }, | |
2685 | { "(bad)", XM, EX, XX }, | |
2686 | }, | |
2687 | /* PREGRP17 */ | |
2688 | { | |
2689 | { "cvtps2pd", XM, EX, XX }, | |
2690 | { "cvtss2sd", XM, EX, XX }, | |
2691 | { "cvtpd2ps", XM, EX, XX }, | |
2692 | { "cvtsd2ss", XM, EX, XX }, | |
2693 | }, | |
2694 | /* PREGRP18 */ | |
2695 | { | |
2696 | { "maskmovq", MX, EM, XX }, | |
2697 | { "(bad)", XM, EX, XX }, | |
0f17484f | 2698 | { "maskmovdqu", XM, EX, XX }, |
041bd2e0 JH |
2699 | { "(bad)", XM, EX, XX }, |
2700 | }, | |
2701 | /* PREGRP19 */ | |
2702 | { | |
2703 | { "movq", MX, EM, XX }, | |
2704 | { "movdqu", XM, EX, XX }, | |
2705 | { "movdqa", XM, EX, XX }, | |
2706 | { "(bad)", XM, EX, XX }, | |
2707 | }, | |
2708 | /* PREGRP20 */ | |
2709 | { | |
2710 | { "movq", EM, MX, XX }, | |
2711 | { "movdqu", EX, XM, XX }, | |
2712 | { "movdqa", EX, XM, XX }, | |
2713 | { "(bad)", EX, XM, XX }, | |
2714 | }, | |
2715 | /* PREGRP21 */ | |
2716 | { | |
2717 | { "(bad)", EX, XM, XX }, | |
2718 | { "movq2dq", EX, EM, XX }, | |
2719 | { "movq", EX, XM, XX }, | |
2720 | { "movdq2q", EM, MX, XX }, | |
2721 | }, | |
2722 | /* PREGRP22 */ | |
2723 | { | |
2724 | { "pshufw", MX, EM, Ib }, | |
2725 | { "pshufhw", XM, EX, Ib }, | |
2726 | { "pshufd", XM, EX, Ib }, | |
2727 | { "pshuflw", XM, EX, Ib }, | |
2728 | }, | |
2729 | /* PREGRP23 */ | |
2730 | { | |
2731 | { "movd", Ed, MX, XX }, | |
2732 | { "movq", Ed, XM, XX }, | |
2733 | { "movd", Ed, XM, XX }, | |
0f17484f | 2734 | { "(bad)", Ed, XM, XX }, |
041bd2e0 JH |
2735 | }, |
2736 | /* PREGRP24 */ | |
2737 | { | |
0f17484f AM |
2738 | { "(bad)", MX, EX, XX }, |
2739 | { "(bad)", XM, EX, XX }, | |
041bd2e0 | 2740 | { "punpckhqdq", XM, EX, XX }, |
0f17484f AM |
2741 | { "(bad)", XM, EX, XX }, |
2742 | }, | |
2743 | /* PREGRP25 */ | |
2744 | { | |
2745 | { "movntq", Ev, MX, XX }, | |
2746 | { "(bad)", Ev, XM, XX }, | |
2747 | { "movntdq", Ev, XM, XX }, | |
2748 | { "(bad)", Ev, XM, XX }, | |
2749 | }, | |
2750 | /* PREGRP26 */ | |
2751 | { | |
2752 | { "(bad)", MX, EX, XX }, | |
2753 | { "(bad)", XM, EX, XX }, | |
2754 | { "punpcklqdq", XM, EX, XX }, | |
2755 | { "(bad)", XM, EX, XX }, | |
041bd2e0 | 2756 | }, |
c608c12e AM |
2757 | }; |
2758 | ||
2759 | #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>") | |
2760 | ||
252b5132 RH |
2761 | static void |
2762 | ckprefix () | |
2763 | { | |
52b15da3 JH |
2764 | int newrex; |
2765 | rex = 0; | |
252b5132 | 2766 | prefixes = 0; |
7d421014 | 2767 | used_prefixes = 0; |
52b15da3 | 2768 | rex_used = 0; |
252b5132 RH |
2769 | while (1) |
2770 | { | |
2771 | FETCH_DATA (the_info, codep + 1); | |
52b15da3 | 2772 | newrex = 0; |
252b5132 RH |
2773 | switch (*codep) |
2774 | { | |
52b15da3 JH |
2775 | /* REX prefixes family. */ |
2776 | case 0x40: | |
2777 | case 0x41: | |
2778 | case 0x42: | |
2779 | case 0x43: | |
2780 | case 0x44: | |
2781 | case 0x45: | |
2782 | case 0x46: | |
2783 | case 0x47: | |
2784 | case 0x48: | |
2785 | case 0x49: | |
2786 | case 0x4a: | |
2787 | case 0x4b: | |
2788 | case 0x4c: | |
2789 | case 0x4d: | |
2790 | case 0x4e: | |
2791 | case 0x4f: | |
2792 | if (mode_64bit) | |
2793 | newrex = *codep; | |
2794 | else | |
2795 | return; | |
2796 | break; | |
252b5132 RH |
2797 | case 0xf3: |
2798 | prefixes |= PREFIX_REPZ; | |
2799 | break; | |
2800 | case 0xf2: | |
2801 | prefixes |= PREFIX_REPNZ; | |
2802 | break; | |
2803 | case 0xf0: | |
2804 | prefixes |= PREFIX_LOCK; | |
2805 | break; | |
2806 | case 0x2e: | |
2807 | prefixes |= PREFIX_CS; | |
2808 | break; | |
2809 | case 0x36: | |
2810 | prefixes |= PREFIX_SS; | |
2811 | break; | |
2812 | case 0x3e: | |
2813 | prefixes |= PREFIX_DS; | |
2814 | break; | |
2815 | case 0x26: | |
2816 | prefixes |= PREFIX_ES; | |
2817 | break; | |
2818 | case 0x64: | |
2819 | prefixes |= PREFIX_FS; | |
2820 | break; | |
2821 | case 0x65: | |
2822 | prefixes |= PREFIX_GS; | |
2823 | break; | |
2824 | case 0x66: | |
2825 | prefixes |= PREFIX_DATA; | |
2826 | break; | |
2827 | case 0x67: | |
2828 | prefixes |= PREFIX_ADDR; | |
2829 | break; | |
5076851f | 2830 | case FWAIT_OPCODE: |
252b5132 RH |
2831 | /* fwait is really an instruction. If there are prefixes |
2832 | before the fwait, they belong to the fwait, *not* to the | |
2833 | following instruction. */ | |
2834 | if (prefixes) | |
2835 | { | |
2836 | prefixes |= PREFIX_FWAIT; | |
2837 | codep++; | |
2838 | return; | |
2839 | } | |
2840 | prefixes = PREFIX_FWAIT; | |
2841 | break; | |
2842 | default: | |
2843 | return; | |
2844 | } | |
52b15da3 JH |
2845 | /* Rex is ignored when followed by another prefix. */ |
2846 | if (rex) | |
2847 | { | |
2848 | oappend (prefix_name (rex, 0)); | |
2849 | oappend (" "); | |
2850 | } | |
2851 | rex = newrex; | |
252b5132 RH |
2852 | codep++; |
2853 | } | |
2854 | } | |
2855 | ||
7d421014 ILT |
2856 | /* Return the name of the prefix byte PREF, or NULL if PREF is not a |
2857 | prefix byte. */ | |
2858 | ||
2859 | static const char * | |
2860 | prefix_name (pref, sizeflag) | |
2861 | int pref; | |
2862 | int sizeflag; | |
2863 | { | |
2864 | switch (pref) | |
2865 | { | |
52b15da3 JH |
2866 | /* REX prefixes family. */ |
2867 | case 0x40: | |
2868 | return "rex"; | |
2869 | case 0x41: | |
2870 | return "rexZ"; | |
2871 | case 0x42: | |
2872 | return "rexY"; | |
2873 | case 0x43: | |
2874 | return "rexYZ"; | |
2875 | case 0x44: | |
2876 | return "rexX"; | |
2877 | case 0x45: | |
2878 | return "rexXZ"; | |
2879 | case 0x46: | |
2880 | return "rexXY"; | |
2881 | case 0x47: | |
2882 | return "rexXYZ"; | |
2883 | case 0x48: | |
2884 | return "rex64"; | |
2885 | case 0x49: | |
2886 | return "rex64Z"; | |
2887 | case 0x4a: | |
2888 | return "rex64Y"; | |
2889 | case 0x4b: | |
2890 | return "rex64YZ"; | |
2891 | case 0x4c: | |
2892 | return "rex64X"; | |
2893 | case 0x4d: | |
2894 | return "rex64XZ"; | |
2895 | case 0x4e: | |
2896 | return "rex64XY"; | |
2897 | case 0x4f: | |
2898 | return "rex64XYZ"; | |
7d421014 ILT |
2899 | case 0xf3: |
2900 | return "repz"; | |
2901 | case 0xf2: | |
2902 | return "repnz"; | |
2903 | case 0xf0: | |
2904 | return "lock"; | |
2905 | case 0x2e: | |
2906 | return "cs"; | |
2907 | case 0x36: | |
2908 | return "ss"; | |
2909 | case 0x3e: | |
2910 | return "ds"; | |
2911 | case 0x26: | |
2912 | return "es"; | |
2913 | case 0x64: | |
2914 | return "fs"; | |
2915 | case 0x65: | |
2916 | return "gs"; | |
2917 | case 0x66: | |
2918 | return (sizeflag & DFLAG) ? "data16" : "data32"; | |
2919 | case 0x67: | |
2920 | return (sizeflag & AFLAG) ? "addr16" : "addr32"; | |
2921 | case FWAIT_OPCODE: | |
2922 | return "fwait"; | |
2923 | default: | |
2924 | return NULL; | |
2925 | } | |
2926 | } | |
2927 | ||
252b5132 RH |
2928 | static char op1out[100], op2out[100], op3out[100]; |
2929 | static int op_ad, op_index[3]; | |
2930 | static unsigned int op_address[3]; | |
52b15da3 JH |
2931 | static unsigned int op_riprel[3]; |
2932 | static bfd_vma start_pc; | |
252b5132 RH |
2933 | |
2934 | \f | |
2935 | /* | |
2936 | * On the 386's of 1988, the maximum length of an instruction is 15 bytes. | |
2937 | * (see topic "Redundant prefixes" in the "Differences from 8086" | |
2938 | * section of the "Virtual 8086 Mode" chapter.) | |
2939 | * 'pc' should be the address of this instruction, it will | |
2940 | * be used to print the target address if this is a relative jump or call | |
2941 | * The function returns the length of this instruction in bytes. | |
2942 | */ | |
2943 | ||
252b5132 RH |
2944 | static int print_insn_i386 |
2945 | PARAMS ((bfd_vma pc, disassemble_info *info)); | |
2946 | ||
2947 | static char intel_syntax; | |
2948 | static char open_char; | |
2949 | static char close_char; | |
2950 | static char separator_char; | |
2951 | static char scale_char; | |
2952 | ||
2953 | int | |
2954 | print_insn_i386_att (pc, info) | |
2955 | bfd_vma pc; | |
2956 | disassemble_info *info; | |
2957 | { | |
2958 | intel_syntax = 0; | |
2959 | open_char = '('; | |
2960 | close_char = ')'; | |
2961 | separator_char = ','; | |
2962 | scale_char = ','; | |
2963 | ||
2964 | return print_insn_i386 (pc, info); | |
2965 | } | |
2966 | ||
2967 | int | |
2968 | print_insn_i386_intel (pc, info) | |
2969 | bfd_vma pc; | |
2970 | disassemble_info *info; | |
2971 | { | |
2972 | intel_syntax = 1; | |
2973 | open_char = '['; | |
2974 | close_char = ']'; | |
2975 | separator_char = '+'; | |
2976 | scale_char = '*'; | |
2977 | ||
2978 | return print_insn_i386 (pc, info); | |
2979 | } | |
2980 | ||
2981 | static int | |
2982 | print_insn_i386 (pc, info) | |
2983 | bfd_vma pc; | |
2984 | disassemble_info *info; | |
2985 | { | |
2da11e11 | 2986 | const struct dis386 *dp; |
252b5132 RH |
2987 | int i; |
2988 | int two_source_ops; | |
2989 | char *first, *second, *third; | |
2990 | int needcomma; | |
2991 | unsigned char need_modrm; | |
041bd2e0 | 2992 | unsigned char uses_SSE_prefix; |
57d91c3c ILT |
2993 | VOLATILE int sizeflag; |
2994 | VOLATILE int orig_sizeflag; | |
252b5132 RH |
2995 | |
2996 | struct dis_private priv; | |
2997 | bfd_byte *inbuf = priv.the_buffer; | |
2998 | ||
52b15da3 JH |
2999 | mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax |
3000 | || info->mach == bfd_mach_x86_64); | |
3001 | ||
2da11e11 | 3002 | if (info->mach == bfd_mach_i386_i386 |
52b15da3 JH |
3003 | || info->mach == bfd_mach_x86_64 |
3004 | || info->mach == bfd_mach_i386_i386_intel_syntax | |
3005 | || info->mach == bfd_mach_x86_64_intel_syntax) | |
2da11e11 AM |
3006 | sizeflag = AFLAG|DFLAG; |
3007 | else if (info->mach == bfd_mach_i386_i8086) | |
3008 | sizeflag = 0; | |
3009 | else | |
3010 | abort (); | |
7d421014 | 3011 | orig_sizeflag = sizeflag; |
2da11e11 | 3012 | |
4fe53c98 | 3013 | /* The output looks better if we put 7 bytes on a line, since that |
c608c12e | 3014 | puts most long word instructions on a single line. */ |
4fe53c98 | 3015 | info->bytes_per_line = 7; |
252b5132 RH |
3016 | |
3017 | info->private_data = (PTR) &priv; | |
3018 | priv.max_fetched = priv.the_buffer; | |
3019 | priv.insn_start = pc; | |
252b5132 RH |
3020 | |
3021 | obuf[0] = 0; | |
3022 | op1out[0] = 0; | |
3023 | op2out[0] = 0; | |
3024 | op3out[0] = 0; | |
3025 | ||
3026 | op_index[0] = op_index[1] = op_index[2] = -1; | |
3027 | ||
3028 | the_info = info; | |
3029 | start_pc = pc; | |
3030 | start_codep = inbuf; | |
3031 | codep = inbuf; | |
3032 | ||
5076851f ILT |
3033 | if (setjmp (priv.bailout) != 0) |
3034 | { | |
7d421014 ILT |
3035 | const char *name; |
3036 | ||
5076851f | 3037 | /* Getting here means we tried for data but didn't get it. That |
7d421014 ILT |
3038 | means we have an incomplete instruction of some sort. Just |
3039 | print the first byte as a prefix or a .byte pseudo-op. */ | |
3040 | if (codep > inbuf) | |
5076851f | 3041 | { |
7d421014 ILT |
3042 | name = prefix_name (inbuf[0], orig_sizeflag); |
3043 | if (name != NULL) | |
3044 | (*info->fprintf_func) (info->stream, "%s", name); | |
3045 | else | |
5076851f | 3046 | { |
7d421014 ILT |
3047 | /* Just print the first byte as a .byte instruction. */ |
3048 | (*info->fprintf_func) (info->stream, ".byte 0x%x", | |
3049 | (unsigned int) inbuf[0]); | |
5076851f | 3050 | } |
5076851f | 3051 | |
7d421014 | 3052 | return 1; |
5076851f ILT |
3053 | } |
3054 | ||
3055 | return -1; | |
3056 | } | |
3057 | ||
52b15da3 | 3058 | obufp = obuf; |
252b5132 RH |
3059 | ckprefix (); |
3060 | ||
3061 | insn_codep = codep; | |
3062 | ||
3063 | FETCH_DATA (info, codep + 1); | |
3064 | two_source_ops = (*codep == 0x62) || (*codep == 0xc8); | |
3065 | ||
252b5132 RH |
3066 | if ((prefixes & PREFIX_FWAIT) |
3067 | && ((*codep < 0xd8) || (*codep > 0xdf))) | |
3068 | { | |
7d421014 ILT |
3069 | const char *name; |
3070 | ||
3071 | /* fwait not followed by floating point instruction. Print the | |
3072 | first prefix, which is probably fwait itself. */ | |
3073 | name = prefix_name (inbuf[0], orig_sizeflag); | |
3074 | if (name == NULL) | |
3075 | name = INTERNAL_DISASSEMBLER_ERROR; | |
3076 | (*info->fprintf_func) (info->stream, "%s", name); | |
3077 | return 1; | |
252b5132 RH |
3078 | } |
3079 | ||
252b5132 RH |
3080 | if (*codep == 0x0f) |
3081 | { | |
3082 | FETCH_DATA (info, codep + 2); | |
3083 | if (intel_syntax) | |
3084 | dp = &dis386_twobyte_intel[*++codep]; | |
3085 | else | |
3086 | dp = &dis386_twobyte_att[*++codep]; | |
3087 | need_modrm = twobyte_has_modrm[*codep]; | |
041bd2e0 | 3088 | uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep]; |
252b5132 RH |
3089 | } |
3090 | else | |
3091 | { | |
3092 | if (intel_syntax) | |
52b15da3 JH |
3093 | if (mode_64bit) |
3094 | dp = &dis386_64_intel[*codep]; | |
3095 | else | |
3096 | dp = &dis386_intel[*codep]; | |
252b5132 | 3097 | else |
52b15da3 JH |
3098 | if (mode_64bit) |
3099 | dp = &disx86_64_att[*codep]; | |
3100 | else | |
3101 | dp = &dis386_att[*codep]; | |
252b5132 | 3102 | need_modrm = onebyte_has_modrm[*codep]; |
041bd2e0 | 3103 | uses_SSE_prefix = 0; |
252b5132 RH |
3104 | } |
3105 | codep++; | |
3106 | ||
041bd2e0 | 3107 | if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ)) |
7d421014 ILT |
3108 | { |
3109 | oappend ("repz "); | |
3110 | used_prefixes |= PREFIX_REPZ; | |
3111 | } | |
041bd2e0 | 3112 | if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ)) |
7d421014 ILT |
3113 | { |
3114 | oappend ("repnz "); | |
3115 | used_prefixes |= PREFIX_REPNZ; | |
3116 | } | |
c608c12e | 3117 | if (prefixes & PREFIX_LOCK) |
7d421014 ILT |
3118 | { |
3119 | oappend ("lock "); | |
3120 | used_prefixes |= PREFIX_LOCK; | |
3121 | } | |
c608c12e | 3122 | |
041bd2e0 | 3123 | if (!uses_SSE_prefix && (prefixes & PREFIX_DATA)) |
c608c12e AM |
3124 | sizeflag ^= DFLAG; |
3125 | ||
3126 | if (prefixes & PREFIX_ADDR) | |
3127 | { | |
3128 | sizeflag ^= AFLAG; | |
3129 | if (sizeflag & AFLAG) | |
3130 | oappend ("addr32 "); | |
3131 | else | |
3132 | oappend ("addr16 "); | |
7d421014 | 3133 | used_prefixes |= PREFIX_ADDR; |
c608c12e AM |
3134 | } |
3135 | ||
252b5132 RH |
3136 | if (need_modrm) |
3137 | { | |
3138 | FETCH_DATA (info, codep + 1); | |
3139 | mod = (*codep >> 6) & 3; | |
3140 | reg = (*codep >> 3) & 7; | |
3141 | rm = *codep & 7; | |
3142 | } | |
3143 | ||
3144 | if (dp->name == NULL && dp->bytemode1 == FLOATCODE) | |
3145 | { | |
3146 | dofloat (sizeflag); | |
3147 | } | |
3148 | else | |
3149 | { | |
041bd2e0 | 3150 | int index; |
252b5132 | 3151 | if (dp->name == NULL) |
c608c12e AM |
3152 | { |
3153 | switch(dp->bytemode2) | |
3154 | { | |
3155 | case USE_GROUPS: | |
3156 | dp = &grps[dp->bytemode1][reg]; | |
3157 | break; | |
3158 | case USE_PREFIX_USER_TABLE: | |
041bd2e0 | 3159 | index = 0; |
7d421014 | 3160 | used_prefixes |= (prefixes & PREFIX_REPZ); |
041bd2e0 JH |
3161 | if (prefixes & PREFIX_REPZ) |
3162 | index = 1; | |
3163 | else | |
3164 | { | |
3165 | used_prefixes |= (prefixes & PREFIX_DATA); | |
3166 | if (prefixes & PREFIX_DATA) | |
3167 | index = 2; | |
3168 | else | |
3169 | { | |
3170 | used_prefixes |= (prefixes & PREFIX_REPNZ); | |
3171 | if (prefixes & PREFIX_REPNZ) | |
3172 | index = 3; | |
3173 | ||
3174 | } | |
3175 | } | |
3176 | dp = &prefix_user_table[dp->bytemode1][index]; | |
c608c12e AM |
3177 | break; |
3178 | default: | |
3179 | oappend (INTERNAL_DISASSEMBLER_ERROR); | |
3180 | break; | |
3181 | } | |
3182 | } | |
252b5132 RH |
3183 | |
3184 | putop (dp->name, sizeflag); | |
3185 | ||
3186 | obufp = op1out; | |
3187 | op_ad = 2; | |
3188 | if (dp->op1) | |
3189 | (*dp->op1)(dp->bytemode1, sizeflag); | |
3190 | ||
3191 | obufp = op2out; | |
3192 | op_ad = 1; | |
3193 | if (dp->op2) | |
3194 | (*dp->op2)(dp->bytemode2, sizeflag); | |
3195 | ||
3196 | obufp = op3out; | |
3197 | op_ad = 0; | |
3198 | if (dp->op3) | |
3199 | (*dp->op3)(dp->bytemode3, sizeflag); | |
3200 | } | |
3201 | ||
7d421014 ILT |
3202 | /* See if any prefixes were not used. If so, print the first one |
3203 | separately. If we don't do this, we'll wind up printing an | |
3204 | instruction stream which does not precisely correspond to the | |
3205 | bytes we are disassembling. */ | |
3206 | if ((prefixes & ~used_prefixes) != 0) | |
3207 | { | |
3208 | const char *name; | |
3209 | ||
3210 | name = prefix_name (inbuf[0], orig_sizeflag); | |
3211 | if (name == NULL) | |
3212 | name = INTERNAL_DISASSEMBLER_ERROR; | |
3213 | (*info->fprintf_func) (info->stream, "%s", name); | |
3214 | return 1; | |
3215 | } | |
52b15da3 JH |
3216 | if (rex & ~rex_used) |
3217 | { | |
3218 | const char *name; | |
3219 | name = prefix_name (rex | 0x40, orig_sizeflag); | |
3220 | if (name == NULL) | |
3221 | name = INTERNAL_DISASSEMBLER_ERROR; | |
3222 | (*info->fprintf_func) (info->stream, "%s ", name); | |
3223 | } | |
7d421014 | 3224 | |
252b5132 RH |
3225 | obufp = obuf + strlen (obuf); |
3226 | for (i = strlen (obuf); i < 6; i++) | |
3227 | oappend (" "); | |
3228 | oappend (" "); | |
3229 | (*info->fprintf_func) (info->stream, "%s", obuf); | |
3230 | ||
3231 | /* The enter and bound instructions are printed with operands in the same | |
3232 | order as the intel book; everything else is printed in reverse order. */ | |
2da11e11 | 3233 | if (intel_syntax || two_source_ops) |
252b5132 RH |
3234 | { |
3235 | first = op1out; | |
3236 | second = op2out; | |
3237 | third = op3out; | |
3238 | op_ad = op_index[0]; | |
3239 | op_index[0] = op_index[2]; | |
3240 | op_index[2] = op_ad; | |
3241 | } | |
3242 | else | |
3243 | { | |
3244 | first = op3out; | |
3245 | second = op2out; | |
3246 | third = op1out; | |
3247 | } | |
3248 | needcomma = 0; | |
3249 | if (*first) | |
3250 | { | |
52b15da3 | 3251 | if (op_index[0] != -1 && !op_riprel[0]) |
252b5132 RH |
3252 | (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info); |
3253 | else | |
3254 | (*info->fprintf_func) (info->stream, "%s", first); | |
3255 | needcomma = 1; | |
3256 | } | |
3257 | if (*second) | |
3258 | { | |
3259 | if (needcomma) | |
3260 | (*info->fprintf_func) (info->stream, ","); | |
52b15da3 | 3261 | if (op_index[1] != -1 && !op_riprel[1]) |
252b5132 RH |
3262 | (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info); |
3263 | else | |
3264 | (*info->fprintf_func) (info->stream, "%s", second); | |
3265 | needcomma = 1; | |
3266 | } | |
3267 | if (*third) | |
3268 | { | |
3269 | if (needcomma) | |
3270 | (*info->fprintf_func) (info->stream, ","); | |
52b15da3 | 3271 | if (op_index[2] != -1 && !op_riprel[2]) |
252b5132 RH |
3272 | (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info); |
3273 | else | |
3274 | (*info->fprintf_func) (info->stream, "%s", third); | |
3275 | } | |
52b15da3 JH |
3276 | for (i = 0; i < 3; i++) |
3277 | if (op_index[i] != -1 && op_riprel[i]) | |
3278 | { | |
3279 | (*info->fprintf_func) (info->stream, " # "); | |
3280 | (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep | |
3281 | + op_address[op_index[i]]), info); | |
3282 | } | |
252b5132 RH |
3283 | return codep - inbuf; |
3284 | } | |
3285 | ||
2da11e11 | 3286 | static const char *float_mem_att[] = { |
252b5132 RH |
3287 | /* d8 */ |
3288 | "fadds", | |
3289 | "fmuls", | |
3290 | "fcoms", | |
3291 | "fcomps", | |
3292 | "fsubs", | |
3293 | "fsubrs", | |
3294 | "fdivs", | |
3295 | "fdivrs", | |
3296 | /* d9 */ | |
3297 | "flds", | |
3298 | "(bad)", | |
3299 | "fsts", | |
3300 | "fstps", | |
3301 | "fldenv", | |
3302 | "fldcw", | |
3303 | "fNstenv", | |
3304 | "fNstcw", | |
3305 | /* da */ | |
3306 | "fiaddl", | |
3307 | "fimull", | |
3308 | "ficoml", | |
3309 | "ficompl", | |
3310 | "fisubl", | |
3311 | "fisubrl", | |
3312 | "fidivl", | |
3313 | "fidivrl", | |
3314 | /* db */ | |
3315 | "fildl", | |
3316 | "(bad)", | |
3317 | "fistl", | |
3318 | "fistpl", | |
3319 | "(bad)", | |
3320 | "fldt", | |
3321 | "(bad)", | |
3322 | "fstpt", | |
3323 | /* dc */ | |
3324 | "faddl", | |
3325 | "fmull", | |
3326 | "fcoml", | |
3327 | "fcompl", | |
3328 | "fsubl", | |
3329 | "fsubrl", | |
3330 | "fdivl", | |
3331 | "fdivrl", | |
3332 | /* dd */ | |
3333 | "fldl", | |
3334 | "(bad)", | |
3335 | "fstl", | |
3336 | "fstpl", | |
3337 | "frstor", | |
3338 | "(bad)", | |
3339 | "fNsave", | |
3340 | "fNstsw", | |
3341 | /* de */ | |
3342 | "fiadd", | |
3343 | "fimul", | |
3344 | "ficom", | |
3345 | "ficomp", | |
3346 | "fisub", | |
3347 | "fisubr", | |
3348 | "fidiv", | |
3349 | "fidivr", | |
3350 | /* df */ | |
3351 | "fild", | |
3352 | "(bad)", | |
3353 | "fist", | |
3354 | "fistp", | |
3355 | "fbld", | |
3356 | "fildll", | |
3357 | "fbstp", | |
3358 | "fistpll", | |
3359 | }; | |
3360 | ||
2da11e11 | 3361 | static const char *float_mem_intel[] = { |
252b5132 RH |
3362 | /* d8 */ |
3363 | "fadd", | |
3364 | "fmul", | |
3365 | "fcom", | |
3366 | "fcomp", | |
3367 | "fsub", | |
3368 | "fsubr", | |
3369 | "fdiv", | |
3370 | "fdivr", | |
3371 | /* d9 */ | |
3372 | "fld", | |
3373 | "(bad)", | |
3374 | "fst", | |
3375 | "fstp", | |
3376 | "fldenv", | |
3377 | "fldcw", | |
3378 | "fNstenv", | |
3379 | "fNstcw", | |
3380 | /* da */ | |
3381 | "fiadd", | |
3382 | "fimul", | |
3383 | "ficom", | |
3384 | "ficomp", | |
3385 | "fisub", | |
3386 | "fisubr", | |
3387 | "fidiv", | |
3388 | "fidivr", | |
3389 | /* db */ | |
3390 | "fild", | |
3391 | "(bad)", | |
3392 | "fist", | |
3393 | "fistp", | |
3394 | "(bad)", | |
3395 | "fld", | |
3396 | "(bad)", | |
3397 | "fstp", | |
3398 | /* dc */ | |
3399 | "fadd", | |
3400 | "fmul", | |
3401 | "fcom", | |
3402 | "fcomp", | |
3403 | "fsub", | |
3404 | "fsubr", | |
3405 | "fdiv", | |
3406 | "fdivr", | |
3407 | /* dd */ | |
3408 | "fld", | |
3409 | "(bad)", | |
3410 | "fst", | |
3411 | "fstp", | |
3412 | "frstor", | |
3413 | "(bad)", | |
3414 | "fNsave", | |
3415 | "fNstsw", | |
3416 | /* de */ | |
3417 | "fiadd", | |
3418 | "fimul", | |
3419 | "ficom", | |
3420 | "ficomp", | |
3421 | "fisub", | |
3422 | "fisubr", | |
3423 | "fidiv", | |
3424 | "fidivr", | |
3425 | /* df */ | |
3426 | "fild", | |
3427 | "(bad)", | |
3428 | "fist", | |
3429 | "fistp", | |
3430 | "fbld", | |
3431 | "fild", | |
3432 | "fbstp", | |
3433 | "fistpll", | |
3434 | }; | |
3435 | ||
3436 | #define ST OP_ST, 0 | |
3437 | #define STi OP_STi, 0 | |
3438 | ||
57d91c3c ILT |
3439 | #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0 |
3440 | #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0 | |
3441 | #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0 | |
3442 | #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0 | |
3443 | #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0 | |
3444 | #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0 | |
3445 | #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0 | |
3446 | #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0 | |
3447 | #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0 | |
252b5132 | 3448 | |
2da11e11 | 3449 | static const struct dis386 float_reg[][8] = { |
252b5132 RH |
3450 | /* d8 */ |
3451 | { | |
57d91c3c ILT |
3452 | { "fadd", ST, STi, XX }, |
3453 | { "fmul", ST, STi, XX }, | |
3454 | { "fcom", STi, XX, XX }, | |
3455 | { "fcomp", STi, XX, XX }, | |
3456 | { "fsub", ST, STi, XX }, | |
3457 | { "fsubr", ST, STi, XX }, | |
3458 | { "fdiv", ST, STi, XX }, | |
3459 | { "fdivr", ST, STi, XX }, | |
252b5132 RH |
3460 | }, |
3461 | /* d9 */ | |
3462 | { | |
57d91c3c ILT |
3463 | { "fld", STi, XX, XX }, |
3464 | { "fxch", STi, XX, XX }, | |
252b5132 | 3465 | { FGRPd9_2 }, |
57d91c3c | 3466 | { "(bad)", XX, XX, XX }, |
252b5132 RH |
3467 | { FGRPd9_4 }, |
3468 | { FGRPd9_5 }, | |
3469 | { FGRPd9_6 }, | |
3470 | { FGRPd9_7 }, | |
3471 | }, | |
3472 | /* da */ | |
3473 | { | |
57d91c3c ILT |
3474 | { "fcmovb", ST, STi, XX }, |
3475 | { "fcmove", ST, STi, XX }, | |
3476 | { "fcmovbe",ST, STi, XX }, | |
3477 | { "fcmovu", ST, STi, XX }, | |
3478 | { "(bad)", XX, XX, XX }, | |
252b5132 | 3479 | { FGRPda_5 }, |
57d91c3c ILT |
3480 | { "(bad)", XX, XX, XX }, |
3481 | { "(bad)", XX, XX, XX }, | |
252b5132 RH |
3482 | }, |
3483 | /* db */ | |
3484 | { | |
57d91c3c ILT |
3485 | { "fcmovnb",ST, STi, XX }, |
3486 | { "fcmovne",ST, STi, XX }, | |
3487 | { "fcmovnbe",ST, STi, XX }, | |
3488 | { "fcmovnu",ST, STi, XX }, | |
252b5132 | 3489 | { FGRPdb_4 }, |
57d91c3c ILT |
3490 | { "fucomi", ST, STi, XX }, |
3491 | { "fcomi", ST, STi, XX }, | |
3492 | { "(bad)", XX, XX, XX }, | |
252b5132 RH |
3493 | }, |
3494 | /* dc */ | |
3495 | { | |
57d91c3c ILT |
3496 | { "fadd", STi, ST, XX }, |
3497 | { "fmul", STi, ST, XX }, | |
3498 | { "(bad)", XX, XX, XX }, | |
3499 | { "(bad)", XX, XX, XX }, | |
252b5132 | 3500 | #if UNIXWARE_COMPAT |
57d91c3c ILT |
3501 | { "fsub", STi, ST, XX }, |
3502 | { "fsubr", STi, ST, XX }, | |
3503 | { "fdiv", STi, ST, XX }, | |
3504 | { "fdivr", STi, ST, XX }, | |
252b5132 | 3505 | #else |
57d91c3c ILT |
3506 | { "fsubr", STi, ST, XX }, |
3507 | { "fsub", STi, ST, XX }, | |
3508 | { "fdivr", STi, ST, XX }, | |
3509 | { "fdiv", STi, ST, XX }, | |
252b5132 RH |
3510 | #endif |
3511 | }, | |
3512 | /* dd */ | |
3513 | { | |
57d91c3c ILT |
3514 | { "ffree", STi, XX, XX }, |
3515 | { "(bad)", XX, XX, XX }, | |
3516 | { "fst", STi, XX, XX }, | |
3517 | { "fstp", STi, XX, XX }, | |
3518 | { "fucom", STi, XX, XX }, | |
3519 | { "fucomp", STi, XX, XX }, | |
3520 | { "(bad)", XX, XX, XX }, | |
3521 | { "(bad)", XX, XX, XX }, | |
252b5132 RH |
3522 | }, |
3523 | /* de */ | |
3524 | { | |
57d91c3c ILT |
3525 | { "faddp", STi, ST, XX }, |
3526 | { "fmulp", STi, ST, XX }, | |
3527 | { "(bad)", XX, XX, XX }, | |
252b5132 RH |
3528 | { FGRPde_3 }, |
3529 | #if UNIXWARE_COMPAT | |
57d91c3c ILT |
3530 | { "fsubp", STi, ST, XX }, |
3531 | { "fsubrp", STi, ST, XX }, | |
3532 | { "fdivp", STi, ST, XX }, | |
3533 | { "fdivrp", STi, ST, XX }, | |
252b5132 | 3534 | #else |
57d91c3c ILT |
3535 | { "fsubrp", STi, ST, XX }, |
3536 | { "fsubp", STi, ST, XX }, | |
3537 | { "fdivrp", STi, ST, XX }, | |
3538 | { "fdivp", STi, ST, XX }, | |
252b5132 RH |
3539 | #endif |
3540 | }, | |
3541 | /* df */ | |
3542 | { | |
57d91c3c ILT |
3543 | { "(bad)", XX, XX, XX }, |
3544 | { "(bad)", XX, XX, XX }, | |
3545 | { "(bad)", XX, XX, XX }, | |
3546 | { "(bad)", XX, XX, XX }, | |
252b5132 | 3547 | { FGRPdf_4 }, |
57d91c3c ILT |
3548 | { "fucomip",ST, STi, XX }, |
3549 | { "fcomip", ST, STi, XX }, | |
3550 | { "(bad)", XX, XX, XX }, | |
252b5132 RH |
3551 | }, |
3552 | }; | |
3553 | ||
3554 | ||
3555 | static char *fgrps[][8] = { | |
3556 | /* d9_2 0 */ | |
3557 | { | |
3558 | "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", | |
3559 | }, | |
3560 | ||
3561 | /* d9_4 1 */ | |
3562 | { | |
3563 | "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)", | |
3564 | }, | |
3565 | ||
3566 | /* d9_5 2 */ | |
3567 | { | |
3568 | "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)", | |
3569 | }, | |
3570 | ||
3571 | /* d9_6 3 */ | |
3572 | { | |
3573 | "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp", | |
3574 | }, | |
3575 | ||
3576 | /* d9_7 4 */ | |
3577 | { | |
3578 | "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos", | |
3579 | }, | |
3580 | ||
3581 | /* da_5 5 */ | |
3582 | { | |
3583 | "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", | |
3584 | }, | |
3585 | ||
3586 | /* db_4 6 */ | |
3587 | { | |
3588 | "feni(287 only)","fdisi(287 only)","fNclex","fNinit", | |
3589 | "fNsetpm(287 only)","(bad)","(bad)","(bad)", | |
3590 | }, | |
3591 | ||
3592 | /* de_3 7 */ | |
3593 | { | |
3594 | "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", | |
3595 | }, | |
3596 | ||
3597 | /* df_4 8 */ | |
3598 | { | |
3599 | "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", | |
3600 | }, | |
3601 | }; | |
3602 | ||
3603 | static void | |
3604 | dofloat (sizeflag) | |
3605 | int sizeflag; | |
3606 | { | |
2da11e11 | 3607 | const struct dis386 *dp; |
252b5132 RH |
3608 | unsigned char floatop; |
3609 | ||
3610 | floatop = codep[-1]; | |
3611 | ||
3612 | if (mod != 3) | |
3613 | { | |
3614 | if (intel_syntax) | |
3615 | putop (float_mem_intel[(floatop - 0xd8 ) * 8 + reg], sizeflag); | |
3616 | else | |
3617 | putop (float_mem_att[(floatop - 0xd8 ) * 8 + reg], sizeflag); | |
3618 | obufp = op1out; | |
3619 | if (floatop == 0xdb) | |
3620 | OP_E (x_mode, sizeflag); | |
3621 | else if (floatop == 0xdd) | |
3622 | OP_E (d_mode, sizeflag); | |
2da11e11 | 3623 | else |
252b5132 RH |
3624 | OP_E (v_mode, sizeflag); |
3625 | return; | |
3626 | } | |
3627 | codep++; | |
3628 | ||
3629 | dp = &float_reg[floatop - 0xd8][reg]; | |
3630 | if (dp->name == NULL) | |
3631 | { | |
3632 | putop (fgrps[dp->bytemode1][rm], sizeflag); | |
3633 | ||
3634 | /* instruction fnstsw is only one with strange arg */ | |
3635 | if (floatop == 0xdf && codep[-1] == 0xe0) | |
3636 | strcpy (op1out, names16[0]); | |
3637 | } | |
3638 | else | |
3639 | { | |
3640 | putop (dp->name, sizeflag); | |
3641 | ||
3642 | obufp = op1out; | |
3643 | if (dp->op1) | |
3644 | (*dp->op1)(dp->bytemode1, sizeflag); | |
3645 | obufp = op2out; | |
3646 | if (dp->op2) | |
3647 | (*dp->op2)(dp->bytemode2, sizeflag); | |
3648 | } | |
3649 | } | |
3650 | ||
3651 | /* ARGSUSED */ | |
3652 | static void | |
3653 | OP_ST (ignore, sizeflag) | |
57d91c3c ILT |
3654 | int ignore ATTRIBUTE_UNUSED; |
3655 | int sizeflag ATTRIBUTE_UNUSED; | |
252b5132 RH |
3656 | { |
3657 | oappend ("%st"); | |
3658 | } | |
3659 | ||
3660 | /* ARGSUSED */ | |
3661 | static void | |
3662 | OP_STi (ignore, sizeflag) | |
57d91c3c ILT |
3663 | int ignore ATTRIBUTE_UNUSED; |
3664 | int sizeflag ATTRIBUTE_UNUSED; | |
252b5132 RH |
3665 | { |
3666 | sprintf (scratchbuf, "%%st(%d)", rm); | |
3667 | oappend (scratchbuf); | |
3668 | } | |
3669 | ||
3670 | ||
3671 | /* capital letters in template are macros */ | |
3672 | static void | |
3673 | putop (template, sizeflag) | |
2da11e11 | 3674 | const char *template; |
252b5132 RH |
3675 | int sizeflag; |
3676 | { | |
2da11e11 | 3677 | const char *p; |
252b5132 RH |
3678 | |
3679 | for (p = template; *p; p++) | |
3680 | { | |
3681 | switch (*p) | |
3682 | { | |
3683 | default: | |
3684 | *obufp++ = *p; | |
3685 | break; | |
3686 | case 'A': | |
3687 | if (intel_syntax) | |
3688 | break; | |
3689 | if (mod != 3 | |
3690 | #ifdef SUFFIX_ALWAYS | |
3691 | || (sizeflag & SUFFIX_ALWAYS) | |
3692 | #endif | |
3693 | ) | |
3694 | *obufp++ = 'b'; | |
3695 | break; | |
3696 | case 'B': | |
3697 | if (intel_syntax) | |
3698 | break; | |
3699 | #ifdef SUFFIX_ALWAYS | |
3700 | if (sizeflag & SUFFIX_ALWAYS) | |
3701 | *obufp++ = 'b'; | |
3702 | #endif | |
3703 | break; | |
3704 | case 'E': /* For jcxz/jecxz */ | |
3705 | if (sizeflag & AFLAG) | |
3706 | *obufp++ = 'e'; | |
3707 | break; | |
90530880 JH |
3708 | case 'I': |
3709 | if (intel_syntax) | |
3710 | break; | |
3711 | if (mode_64bit) | |
3712 | *obufp++ = 'q'; | |
3713 | else | |
3714 | { | |
3715 | if ((prefixes & PREFIX_DATA) | |
3716 | #ifdef SUFFIX_ALWAYS | |
3717 | || (sizeflag & SUFFIX_ALWAYS) | |
3718 | #endif | |
3719 | ) | |
3720 | { | |
3721 | if (sizeflag & DFLAG) | |
3722 | *obufp++ = 'l'; | |
3723 | else | |
3724 | *obufp++ = 'w'; | |
3725 | used_prefixes |= (prefixes & PREFIX_DATA); | |
3726 | } | |
3727 | } | |
3728 | break; | |
252b5132 RH |
3729 | case 'L': |
3730 | if (intel_syntax) | |
3731 | break; | |
3732 | #ifdef SUFFIX_ALWAYS | |
3733 | if (sizeflag & SUFFIX_ALWAYS) | |
3734 | *obufp++ = 'l'; | |
3735 | #endif | |
3736 | break; | |
3737 | case 'N': | |
3738 | if ((prefixes & PREFIX_FWAIT) == 0) | |
3739 | *obufp++ = 'n'; | |
7d421014 ILT |
3740 | else |
3741 | used_prefixes |= PREFIX_FWAIT; | |
252b5132 | 3742 | break; |
52b15da3 JH |
3743 | case 'O': |
3744 | USED_REX (REX_MODE64); | |
3745 | if (rex & REX_MODE64) | |
3746 | *obufp++ = 'o'; | |
3747 | else | |
3748 | *obufp++ = 'd'; | |
3749 | break; | |
252b5132 RH |
3750 | case 'P': |
3751 | if (intel_syntax) | |
3752 | break; | |
3753 | if ((prefixes & PREFIX_DATA) | |
52b15da3 | 3754 | || (rex & REX_MODE64) |
252b5132 RH |
3755 | #ifdef SUFFIX_ALWAYS |
3756 | || (sizeflag & SUFFIX_ALWAYS) | |
3757 | #endif | |
3758 | ) | |
3759 | { | |
52b15da3 JH |
3760 | USED_REX (REX_MODE64); |
3761 | if (rex & REX_MODE64) | |
3762 | *obufp++ = 'q'; | |
3763 | else | |
3764 | { | |
3765 | if (sizeflag & DFLAG) | |
3766 | *obufp++ = 'l'; | |
3767 | else | |
3768 | *obufp++ = 'w'; | |
3769 | used_prefixes |= (prefixes & PREFIX_DATA); | |
3770 | } | |
252b5132 RH |
3771 | } |
3772 | break; | |
3773 | case 'Q': | |
3774 | if (intel_syntax) | |
3775 | break; | |
90530880 | 3776 | USED_REX (REX_MODE64); |
252b5132 RH |
3777 | if (mod != 3 |
3778 | #ifdef SUFFIX_ALWAYS | |
3779 | || (sizeflag & SUFFIX_ALWAYS) | |
3780 | #endif | |
3781 | ) | |
3782 | { | |
52b15da3 JH |
3783 | if (rex & REX_MODE64) |
3784 | *obufp++ = 'q'; | |
252b5132 | 3785 | else |
52b15da3 JH |
3786 | { |
3787 | if (sizeflag & DFLAG) | |
3788 | *obufp++ = 'l'; | |
3789 | else | |
3790 | *obufp++ = 'w'; | |
3791 | used_prefixes |= (prefixes & PREFIX_DATA); | |
3792 | } | |
252b5132 RH |
3793 | } |
3794 | break; | |
3795 | case 'R': | |
52b15da3 | 3796 | USED_REX (REX_MODE64); |
252b5132 | 3797 | if (intel_syntax) |
c608c12e | 3798 | { |
52b15da3 JH |
3799 | if (rex & REX_MODE64) |
3800 | { | |
3801 | *obufp++ = 'q'; | |
3802 | *obufp++ = 't'; | |
3803 | } | |
3804 | else if (sizeflag & DFLAG) | |
c608c12e AM |
3805 | { |
3806 | *obufp++ = 'd'; | |
3807 | *obufp++ = 'q'; | |
3808 | } | |
3809 | else | |
3810 | { | |
3811 | *obufp++ = 'w'; | |
3812 | *obufp++ = 'd'; | |
3813 | } | |
3814 | } | |
252b5132 | 3815 | else |
c608c12e | 3816 | { |
52b15da3 JH |
3817 | if (rex & REX_MODE64) |
3818 | *obufp++ = 'q'; | |
3819 | else if (sizeflag & DFLAG) | |
c608c12e AM |
3820 | *obufp++ = 'l'; |
3821 | else | |
3822 | *obufp++ = 'w'; | |
3823 | } | |
52b15da3 JH |
3824 | if (!(rex & REX_MODE64)) |
3825 | used_prefixes |= (prefixes & PREFIX_DATA); | |
252b5132 RH |
3826 | break; |
3827 | case 'S': | |
3828 | if (intel_syntax) | |
3829 | break; | |
3830 | #ifdef SUFFIX_ALWAYS | |
3831 | if (sizeflag & SUFFIX_ALWAYS) | |
3832 | { | |
52b15da3 JH |
3833 | if (rex & REX_MODE64) |
3834 | *obufp++ = 'q'; | |
252b5132 | 3835 | else |
52b15da3 JH |
3836 | { |
3837 | if (sizeflag & DFLAG) | |
3838 | *obufp++ = 'l'; | |
3839 | else | |
3840 | *obufp++ = 'w'; | |
3841 | used_prefixes |= (prefixes & PREFIX_DATA); | |
3842 | } | |
252b5132 RH |
3843 | } |
3844 | #endif | |
3845 | break; | |
90530880 JH |
3846 | case 'T': |
3847 | if (intel_syntax) | |
3848 | break; | |
3849 | if (mode_64bit) | |
3850 | *obufp++ = 'q'; | |
3851 | else if (mod != 3 | |
3852 | #ifdef SUFFIX_ALWAYS | |
3853 | || (sizeflag & SUFFIX_ALWAYS) | |
3854 | #endif | |
3855 | ) | |
3856 | { | |
3857 | if (sizeflag & DFLAG) | |
3858 | *obufp++ = 'l'; | |
3859 | else | |
3860 | *obufp++ = 'w'; | |
3861 | used_prefixes |= (prefixes & PREFIX_DATA); | |
3862 | } | |
3863 | break; | |
041bd2e0 JH |
3864 | case 'X': |
3865 | if (prefixes & PREFIX_DATA) | |
3866 | *obufp++ = 'd'; | |
3867 | else | |
3868 | *obufp++ = 's'; | |
3869 | used_prefixes |= (prefixes & PREFIX_DATA); | |
3870 | break; | |
76f227a5 JH |
3871 | case 'Y': |
3872 | if (intel_syntax) | |
3873 | break; | |
3874 | if (rex & REX_MODE64) | |
3875 | { | |
3876 | USED_REX (REX_MODE64); | |
3877 | *obufp++ = 'q'; | |
3878 | } | |
3879 | break; | |
52b15da3 | 3880 | /* implicit operand size 'l' for i386 or 'q' for x86-64 */ |
252b5132 | 3881 | case 'W': |
252b5132 | 3882 | /* operand size flag for cwtl, cbtw */ |
52b15da3 JH |
3883 | USED_REX (0); |
3884 | if (rex) | |
3885 | *obufp++ = 'l'; | |
3886 | else if (sizeflag & DFLAG) | |
252b5132 RH |
3887 | *obufp++ = 'w'; |
3888 | else | |
3889 | *obufp++ = 'b'; | |
c608c12e AM |
3890 | if (intel_syntax) |
3891 | { | |
52b15da3 JH |
3892 | if (rex) |
3893 | { | |
3894 | *obufp++ = 'q'; | |
3895 | *obufp++ = 'e'; | |
3896 | } | |
c608c12e AM |
3897 | if (sizeflag & DFLAG) |
3898 | { | |
3899 | *obufp++ = 'd'; | |
3900 | *obufp++ = 'e'; | |
3901 | } | |
3902 | else | |
3903 | { | |
3904 | *obufp++ = 'w'; | |
3905 | } | |
3906 | } | |
52b15da3 JH |
3907 | if (!rex) |
3908 | used_prefixes |= (prefixes & PREFIX_DATA); | |
252b5132 RH |
3909 | break; |
3910 | } | |
3911 | } | |
3912 | *obufp = 0; | |
3913 | } | |
3914 | ||
3915 | static void | |
3916 | oappend (s) | |
2da11e11 | 3917 | const char *s; |
252b5132 RH |
3918 | { |
3919 | strcpy (obufp, s); | |
3920 | obufp += strlen (s); | |
3921 | } | |
3922 | ||
3923 | static void | |
3924 | append_seg () | |
3925 | { | |
3926 | if (prefixes & PREFIX_CS) | |
7d421014 ILT |
3927 | { |
3928 | oappend ("%cs:"); | |
3929 | used_prefixes |= PREFIX_CS; | |
3930 | } | |
252b5132 | 3931 | if (prefixes & PREFIX_DS) |
7d421014 ILT |
3932 | { |
3933 | oappend ("%ds:"); | |
3934 | used_prefixes |= PREFIX_DS; | |
3935 | } | |
252b5132 | 3936 | if (prefixes & PREFIX_SS) |
7d421014 ILT |
3937 | { |
3938 | oappend ("%ss:"); | |
3939 | used_prefixes |= PREFIX_SS; | |
3940 | } | |
252b5132 | 3941 | if (prefixes & PREFIX_ES) |
7d421014 ILT |
3942 | { |
3943 | oappend ("%es:"); | |
3944 | used_prefixes |= PREFIX_ES; | |
3945 | } | |
252b5132 | 3946 | if (prefixes & PREFIX_FS) |
7d421014 ILT |
3947 | { |
3948 | oappend ("%fs:"); | |
3949 | used_prefixes |= PREFIX_FS; | |
3950 | } | |
252b5132 | 3951 | if (prefixes & PREFIX_GS) |
7d421014 ILT |
3952 | { |
3953 | oappend ("%gs:"); | |
3954 | used_prefixes |= PREFIX_GS; | |
3955 | } | |
252b5132 RH |
3956 | } |
3957 | ||
3958 | static void | |
3959 | OP_indirE (bytemode, sizeflag) | |
3960 | int bytemode; | |
3961 | int sizeflag; | |
3962 | { | |
3963 | if (!intel_syntax) | |
3964 | oappend ("*"); | |
3965 | OP_E (bytemode, sizeflag); | |
3966 | } | |
3967 | ||
52b15da3 JH |
3968 | static void |
3969 | print_operand_value (buf, hex, disp) | |
3970 | char *buf; | |
3971 | int hex; | |
3972 | bfd_vma disp; | |
3973 | { | |
3974 | if (mode_64bit) | |
3975 | { | |
3976 | if (hex) | |
3977 | { | |
3978 | char tmp[30]; | |
3979 | int i; | |
3980 | buf[0] = '0'; | |
3981 | buf[1] = 'x'; | |
3982 | sprintf_vma (tmp, disp); | |
3983 | for (i = 0; tmp[i] == '0' && tmp[i+1]; i++); | |
3984 | strcpy (buf + 2, tmp + i); | |
3985 | } | |
3986 | else | |
3987 | { | |
3988 | bfd_signed_vma v = disp; | |
3989 | char tmp[30]; | |
3990 | int i; | |
3991 | if (v < 0) | |
3992 | { | |
3993 | *(buf++) = '-'; | |
3994 | v = -disp; | |
3995 | /* Check for possible overflow on 0x8000000000000000 */ | |
3996 | if (v < 0) | |
3997 | { | |
3998 | strcpy (buf, "9223372036854775808"); | |
3999 | return; | |
4000 | } | |
4001 | } | |
4002 | if (!v) | |
4003 | { | |
4004 | strcpy (buf, "0"); | |
4005 | return; | |
4006 | } | |
4007 | ||
4008 | i = 0; | |
4009 | tmp[29] = 0; | |
4010 | while (v) | |
4011 | { | |
4012 | tmp[28-i] = (v % 10) + '0'; | |
4013 | v /= 10; | |
4014 | i++; | |
4015 | } | |
4016 | strcpy (buf, tmp + 29 - i); | |
4017 | } | |
4018 | } | |
4019 | else | |
4020 | { | |
4021 | if (hex) | |
4022 | sprintf (buf, "0x%x", (unsigned int) disp); | |
4023 | else | |
4024 | sprintf (buf, "%d", (int) disp); | |
4025 | } | |
4026 | } | |
4027 | ||
252b5132 RH |
4028 | static void |
4029 | OP_E (bytemode, sizeflag) | |
4030 | int bytemode; | |
4031 | int sizeflag; | |
4032 | { | |
52b15da3 JH |
4033 | bfd_vma disp; |
4034 | int add = 0; | |
4035 | int riprel = 0; | |
4036 | USED_REX (REX_EXTZ); | |
4037 | if (rex & REX_EXTZ) | |
4038 | add += 8; | |
252b5132 RH |
4039 | |
4040 | /* skip mod/rm byte */ | |
4041 | codep++; | |
4042 | ||
4043 | if (mod == 3) | |
4044 | { | |
4045 | switch (bytemode) | |
4046 | { | |
4047 | case b_mode: | |
52b15da3 JH |
4048 | USED_REX (0); |
4049 | if (rex) | |
4050 | oappend (names8rex[rm + add]); | |
4051 | else | |
4052 | oappend (names8[rm + add]); | |
252b5132 RH |
4053 | break; |
4054 | case w_mode: | |
52b15da3 | 4055 | oappend (names16[rm + add]); |
252b5132 | 4056 | break; |
2da11e11 | 4057 | case d_mode: |
52b15da3 JH |
4058 | oappend (names32[rm + add]); |
4059 | break; | |
4060 | case q_mode: | |
4061 | oappend (names64[rm + add]); | |
4062 | break; | |
4063 | case m_mode: | |
4064 | if (mode_64bit) | |
4065 | oappend (names64[rm + add]); | |
4066 | else | |
4067 | oappend (names32[rm + add]); | |
2da11e11 | 4068 | break; |
252b5132 | 4069 | case v_mode: |
52b15da3 JH |
4070 | USED_REX (REX_MODE64); |
4071 | if (rex & REX_MODE64) | |
4072 | oappend (names64[rm + add]); | |
4073 | else if (sizeflag & DFLAG) | |
4074 | oappend (names32[rm + add]); | |
252b5132 | 4075 | else |
52b15da3 | 4076 | oappend (names16[rm + add]); |
7d421014 | 4077 | used_prefixes |= (prefixes & PREFIX_DATA); |
252b5132 | 4078 | break; |
2da11e11 | 4079 | case 0: |
041bd2e0 JH |
4080 | if ( !(codep[-2] == 0xAE && codep[-1] == 0xF8 /* sfence */) |
4081 | && !(codep[-2] == 0xAE && codep[-1] == 0xF0 /* mfence */) | |
4082 | && !(codep[-2] == 0xAE && codep[-1] == 0xe8 /* lfence */)) | |
2da11e11 | 4083 | BadOp(); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */ |
c608c12e | 4084 | break; |
252b5132 | 4085 | default: |
c608c12e | 4086 | oappend (INTERNAL_DISASSEMBLER_ERROR); |
252b5132 RH |
4087 | break; |
4088 | } | |
4089 | return; | |
4090 | } | |
4091 | ||
4092 | disp = 0; | |
4093 | append_seg (); | |
4094 | ||
4095 | if (sizeflag & AFLAG) /* 32 bit address mode */ | |
4096 | { | |
4097 | int havesib; | |
4098 | int havebase; | |
4099 | int base; | |
4100 | int index = 0; | |
4101 | int scale = 0; | |
4102 | ||
4103 | havesib = 0; | |
4104 | havebase = 1; | |
4105 | base = rm; | |
4106 | ||
4107 | if (base == 4) | |
4108 | { | |
4109 | havesib = 1; | |
4110 | FETCH_DATA (the_info, codep + 1); | |
4111 | scale = (*codep >> 6) & 3; | |
4112 | index = (*codep >> 3) & 7; | |
4113 | base = *codep & 7; | |
52b15da3 JH |
4114 | USED_REX (REX_EXTY); |
4115 | USED_REX (REX_EXTZ); | |
4116 | if (rex & REX_EXTY) | |
4117 | index += 8; | |
4118 | if (rex & REX_EXTZ) | |
4119 | base += 8; | |
252b5132 RH |
4120 | codep++; |
4121 | } | |
4122 | ||
4123 | switch (mod) | |
4124 | { | |
4125 | case 0: | |
52b15da3 | 4126 | if ((base & 7) == 5) |
252b5132 RH |
4127 | { |
4128 | havebase = 0; | |
52b15da3 JH |
4129 | if (mode_64bit && !havesib) |
4130 | riprel = 1; | |
4131 | disp = get32s (); | |
252b5132 RH |
4132 | } |
4133 | break; | |
4134 | case 1: | |
4135 | FETCH_DATA (the_info, codep + 1); | |
4136 | disp = *codep++; | |
4137 | if ((disp & 0x80) != 0) | |
4138 | disp -= 0x100; | |
4139 | break; | |
4140 | case 2: | |
52b15da3 | 4141 | disp = get32s (); |
252b5132 RH |
4142 | break; |
4143 | } | |
4144 | ||
4145 | if (!intel_syntax) | |
52b15da3 | 4146 | if (mod != 0 || (base & 7) == 5) |
252b5132 | 4147 | { |
52b15da3 | 4148 | print_operand_value (scratchbuf, !riprel, disp); |
252b5132 | 4149 | oappend (scratchbuf); |
52b15da3 JH |
4150 | if (riprel) |
4151 | { | |
4152 | set_op (disp, 1); | |
4153 | oappend ("(%rip)"); | |
4154 | } | |
252b5132 | 4155 | } |
2da11e11 | 4156 | |
252b5132 RH |
4157 | if (havebase || (havesib && (index != 4 || scale != 0))) |
4158 | { | |
4159 | if (intel_syntax) | |
4160 | { | |
4161 | switch (bytemode) | |
4162 | { | |
4163 | case b_mode: | |
52b15da3 | 4164 | oappend ("BYTE PTR "); |
252b5132 RH |
4165 | break; |
4166 | case w_mode: | |
52b15da3 | 4167 | oappend ("WORD PTR "); |
252b5132 RH |
4168 | break; |
4169 | case v_mode: | |
52b15da3 | 4170 | oappend ("DWORD PTR "); |
252b5132 RH |
4171 | break; |
4172 | case d_mode: | |
52b15da3 | 4173 | oappend ("QWORD PTR "); |
252b5132 | 4174 | break; |
52b15da3 JH |
4175 | case m_mode: |
4176 | if (mode_64bit) | |
4177 | oappend ("DWORD PTR "); | |
4178 | else | |
4179 | oappend ("QWORD PTR "); | |
4180 | break; | |
252b5132 | 4181 | case x_mode: |
52b15da3 | 4182 | oappend ("XWORD PTR "); |
252b5132 RH |
4183 | break; |
4184 | default: | |
4185 | break; | |
4186 | } | |
4187 | } | |
4188 | *obufp++ = open_char; | |
52b15da3 JH |
4189 | if (intel_syntax && riprel) |
4190 | oappend ("rip + "); | |
252b5132 | 4191 | *obufp = '\0'; |
52b15da3 JH |
4192 | USED_REX (REX_EXTZ); |
4193 | if (!havesib && (rex & REX_EXTZ)) | |
4194 | base += 8; | |
252b5132 | 4195 | if (havebase) |
52b15da3 | 4196 | oappend (mode_64bit ? names64[base] : names32[base]); |
252b5132 RH |
4197 | if (havesib) |
4198 | { | |
4199 | if (index != 4) | |
4200 | { | |
4201 | if (intel_syntax) | |
4202 | { | |
4203 | if (havebase) | |
4204 | { | |
4205 | *obufp++ = separator_char; | |
4206 | *obufp = '\0'; | |
4207 | } | |
52b15da3 | 4208 | sprintf (scratchbuf, "%s", mode_64bit ? names64[index] : names32[index]); |
252b5132 RH |
4209 | } |
4210 | else | |
52b15da3 | 4211 | sprintf (scratchbuf, ",%s", mode_64bit ? names64[index] : names32[index]); |
252b5132 RH |
4212 | oappend (scratchbuf); |
4213 | } | |
4214 | if (!intel_syntax | |
2da11e11 | 4215 | || (intel_syntax |
252b5132 RH |
4216 | && bytemode != b_mode |
4217 | && bytemode != w_mode | |
4218 | && bytemode != v_mode)) | |
4219 | { | |
4220 | *obufp++ = scale_char; | |
4221 | *obufp = '\0'; | |
4222 | sprintf (scratchbuf, "%d", 1 << scale); | |
4223 | oappend (scratchbuf); | |
4224 | } | |
4225 | } | |
4226 | if (intel_syntax) | |
52b15da3 | 4227 | if (mod != 0 || (base & 7) == 5) |
252b5132 RH |
4228 | { |
4229 | /* Don't print zero displacements */ | |
52b15da3 | 4230 | if (disp != 0) |
252b5132 | 4231 | { |
52b15da3 | 4232 | print_operand_value (scratchbuf, 0, disp); |
252b5132 RH |
4233 | oappend (scratchbuf); |
4234 | } | |
4235 | } | |
4236 | ||
4237 | *obufp++ = close_char; | |
4238 | *obufp = '\0'; | |
4239 | } | |
4240 | else if (intel_syntax) | |
4241 | { | |
52b15da3 | 4242 | if (mod != 0 || (base & 7) == 5) |
252b5132 RH |
4243 | { |
4244 | if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS | |
4245 | | PREFIX_ES | PREFIX_FS | PREFIX_GS)) | |
4246 | ; | |
4247 | else | |
4248 | { | |
4249 | oappend (names_seg[3]); | |
4250 | oappend (":"); | |
4251 | } | |
52b15da3 | 4252 | print_operand_value (scratchbuf, 1, disp); |
252b5132 RH |
4253 | oappend (scratchbuf); |
4254 | } | |
4255 | } | |
4256 | } | |
4257 | else | |
4258 | { /* 16 bit address mode */ | |
4259 | switch (mod) | |
4260 | { | |
4261 | case 0: | |
52b15da3 | 4262 | if ((rm & 7) == 6) |
252b5132 RH |
4263 | { |
4264 | disp = get16 (); | |
4265 | if ((disp & 0x8000) != 0) | |
4266 | disp -= 0x10000; | |
4267 | } | |
4268 | break; | |
4269 | case 1: | |
4270 | FETCH_DATA (the_info, codep + 1); | |
4271 | disp = *codep++; | |
4272 | if ((disp & 0x80) != 0) | |
4273 | disp -= 0x100; | |
4274 | break; | |
4275 | case 2: | |
4276 | disp = get16 (); | |
4277 | if ((disp & 0x8000) != 0) | |
4278 | disp -= 0x10000; | |
4279 | break; | |
4280 | } | |
4281 | ||
4282 | if (!intel_syntax) | |
52b15da3 | 4283 | if (mod != 0 || (rm & 7) == 6) |
252b5132 | 4284 | { |
52b15da3 | 4285 | print_operand_value (scratchbuf, 0, disp); |
252b5132 RH |
4286 | oappend (scratchbuf); |
4287 | } | |
4288 | ||
52b15da3 | 4289 | if (mod != 0 || (rm & 7) != 6) |
252b5132 RH |
4290 | { |
4291 | *obufp++ = open_char; | |
4292 | *obufp = '\0'; | |
52b15da3 | 4293 | oappend (index16[rm + add]); |
252b5132 RH |
4294 | *obufp++ = close_char; |
4295 | *obufp = '\0'; | |
4296 | } | |
4297 | } | |
4298 | } | |
4299 | ||
252b5132 RH |
4300 | static void |
4301 | OP_G (bytemode, sizeflag) | |
4302 | int bytemode; | |
4303 | int sizeflag; | |
4304 | { | |
52b15da3 JH |
4305 | int add = 0; |
4306 | USED_REX (REX_EXTX); | |
4307 | if (rex & REX_EXTX) | |
4308 | add += 8; | |
252b5132 RH |
4309 | switch (bytemode) |
4310 | { | |
4311 | case b_mode: | |
52b15da3 JH |
4312 | USED_REX (0); |
4313 | if (rex) | |
4314 | oappend (names8rex[reg + add]); | |
4315 | else | |
4316 | oappend (names8[reg + add]); | |
252b5132 RH |
4317 | break; |
4318 | case w_mode: | |
52b15da3 | 4319 | oappend (names16[reg + add]); |
252b5132 RH |
4320 | break; |
4321 | case d_mode: | |
52b15da3 JH |
4322 | oappend (names32[reg + add]); |
4323 | break; | |
4324 | case q_mode: | |
4325 | oappend (names64[reg + add]); | |
252b5132 RH |
4326 | break; |
4327 | case v_mode: | |
52b15da3 JH |
4328 | USED_REX (REX_MODE64); |
4329 | if (rex & REX_MODE64) | |
4330 | oappend (names64[reg + add]); | |
4331 | else if (sizeflag & DFLAG) | |
4332 | oappend (names32[reg + add]); | |
252b5132 | 4333 | else |
52b15da3 | 4334 | oappend (names16[reg + add]); |
7d421014 | 4335 | used_prefixes |= (prefixes & PREFIX_DATA); |
252b5132 RH |
4336 | break; |
4337 | default: | |
4338 | oappend (INTERNAL_DISASSEMBLER_ERROR); | |
4339 | break; | |
4340 | } | |
4341 | } | |
4342 | ||
52b15da3 JH |
4343 | static bfd_vma |
4344 | get64 () | |
4345 | { | |
4346 | unsigned int a = 0; | |
4347 | unsigned int b = 0; | |
4348 | bfd_vma x = 0; | |
4349 | ||
4350 | #ifdef BFD64 | |
4351 | FETCH_DATA (the_info, codep + 8); | |
4352 | a = *codep++ & 0xff; | |
4353 | a |= (*codep++ & 0xff) << 8; | |
4354 | a |= (*codep++ & 0xff) << 16; | |
4355 | a |= (*codep++ & 0xff) << 24; | |
4356 | b |= (*codep++ & 0xff); | |
4357 | b |= (*codep++ & 0xff) << 8; | |
4358 | b |= (*codep++ & 0xff) << 16; | |
4359 | b |= (*codep++ & 0xff) << 24; | |
4360 | x = a + ((bfd_vma) b << 32); | |
4361 | #else | |
4362 | abort(); | |
4363 | #endif | |
4364 | return x; | |
4365 | } | |
4366 | ||
4367 | static bfd_signed_vma | |
252b5132 RH |
4368 | get32 () |
4369 | { | |
52b15da3 | 4370 | bfd_signed_vma x = 0; |
252b5132 RH |
4371 | |
4372 | FETCH_DATA (the_info, codep + 4); | |
52b15da3 JH |
4373 | x = *codep++ & (bfd_signed_vma) 0xff; |
4374 | x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; | |
4375 | x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; | |
4376 | x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; | |
4377 | return x; | |
4378 | } | |
4379 | ||
4380 | static bfd_signed_vma | |
4381 | get32s () | |
4382 | { | |
4383 | bfd_signed_vma x = 0; | |
4384 | ||
4385 | FETCH_DATA (the_info, codep + 4); | |
4386 | x = *codep++ & (bfd_signed_vma) 0xff; | |
4387 | x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; | |
4388 | x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; | |
4389 | x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; | |
4390 | ||
4391 | x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31); | |
4392 | ||
252b5132 RH |
4393 | return x; |
4394 | } | |
4395 | ||
4396 | static int | |
4397 | get16 () | |
4398 | { | |
4399 | int x = 0; | |
4400 | ||
4401 | FETCH_DATA (the_info, codep + 2); | |
4402 | x = *codep++ & 0xff; | |
4403 | x |= (*codep++ & 0xff) << 8; | |
4404 | return x; | |
4405 | } | |
4406 | ||
4407 | static void | |
52b15da3 | 4408 | set_op (op, riprel) |
252b5132 | 4409 | unsigned int op; |
52b15da3 | 4410 | int riprel; |
252b5132 RH |
4411 | { |
4412 | op_index[op_ad] = op_ad; | |
4413 | op_address[op_ad] = op; | |
52b15da3 | 4414 | op_riprel[op_ad] = riprel; |
252b5132 RH |
4415 | } |
4416 | ||
4417 | static void | |
4418 | OP_REG (code, sizeflag) | |
4419 | int code; | |
4420 | int sizeflag; | |
4421 | { | |
2da11e11 | 4422 | const char *s; |
52b15da3 JH |
4423 | int add = 0; |
4424 | USED_REX (REX_EXTZ); | |
4425 | if (rex & REX_EXTZ) | |
4426 | add = 8; | |
4427 | ||
4428 | switch (code) | |
4429 | { | |
4430 | case indir_dx_reg: | |
4431 | s = "(%dx)"; | |
4432 | break; | |
4433 | case ax_reg: case cx_reg: case dx_reg: case bx_reg: | |
4434 | case sp_reg: case bp_reg: case si_reg: case di_reg: | |
4435 | s = names16[code - ax_reg + add]; | |
4436 | break; | |
4437 | case es_reg: case ss_reg: case cs_reg: | |
4438 | case ds_reg: case fs_reg: case gs_reg: | |
4439 | s = names_seg[code - es_reg + add]; | |
4440 | break; | |
4441 | case al_reg: case ah_reg: case cl_reg: case ch_reg: | |
4442 | case dl_reg: case dh_reg: case bl_reg: case bh_reg: | |
4443 | USED_REX (0); | |
4444 | if (rex) | |
4445 | s = names8rex[code - al_reg + add]; | |
4446 | else | |
4447 | s = names8[code - al_reg]; | |
4448 | break; | |
4449 | case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: | |
4450 | case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: | |
4451 | USED_REX (REX_MODE64); | |
4452 | if (rex & REX_MODE64) | |
4453 | s = names64[code - eAX_reg + add]; | |
4454 | else if (sizeflag & DFLAG) | |
4455 | s = names32[code - eAX_reg + add]; | |
4456 | else | |
4457 | s = names16[code - eAX_reg + add]; | |
4458 | used_prefixes |= (prefixes & PREFIX_DATA); | |
4459 | break; | |
4460 | case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg: | |
4461 | case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg: | |
4462 | s = names64[code - rAX_reg + add]; | |
4463 | break; | |
4464 | default: | |
4465 | s = INTERNAL_DISASSEMBLER_ERROR; | |
4466 | break; | |
4467 | } | |
4468 | oappend (s); | |
4469 | } | |
4470 | ||
4471 | static void | |
4472 | OP_IMREG (code, sizeflag) | |
4473 | int code; | |
4474 | int sizeflag; | |
4475 | { | |
4476 | const char *s; | |
252b5132 RH |
4477 | |
4478 | switch (code) | |
4479 | { | |
4480 | case indir_dx_reg: | |
4481 | s = "(%dx)"; | |
4482 | break; | |
4483 | case ax_reg: case cx_reg: case dx_reg: case bx_reg: | |
4484 | case sp_reg: case bp_reg: case si_reg: case di_reg: | |
4485 | s = names16[code - ax_reg]; | |
4486 | break; | |
4487 | case es_reg: case ss_reg: case cs_reg: | |
4488 | case ds_reg: case fs_reg: case gs_reg: | |
4489 | s = names_seg[code - es_reg]; | |
4490 | break; | |
4491 | case al_reg: case ah_reg: case cl_reg: case ch_reg: | |
4492 | case dl_reg: case dh_reg: case bl_reg: case bh_reg: | |
52b15da3 JH |
4493 | USED_REX (0); |
4494 | if (rex) | |
4495 | s = names8rex[code - al_reg]; | |
4496 | else | |
4497 | s = names8[code - al_reg]; | |
252b5132 RH |
4498 | break; |
4499 | case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: | |
4500 | case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: | |
52b15da3 JH |
4501 | USED_REX (REX_MODE64); |
4502 | if (rex & REX_MODE64) | |
4503 | s = names64[code - eAX_reg]; | |
4504 | else if (sizeflag & DFLAG) | |
252b5132 RH |
4505 | s = names32[code - eAX_reg]; |
4506 | else | |
4507 | s = names16[code - eAX_reg]; | |
7d421014 | 4508 | used_prefixes |= (prefixes & PREFIX_DATA); |
252b5132 RH |
4509 | break; |
4510 | default: | |
4511 | s = INTERNAL_DISASSEMBLER_ERROR; | |
4512 | break; | |
4513 | } | |
4514 | oappend (s); | |
4515 | } | |
4516 | ||
4517 | static void | |
4518 | OP_I (bytemode, sizeflag) | |
4519 | int bytemode; | |
4520 | int sizeflag; | |
4521 | { | |
52b15da3 JH |
4522 | bfd_signed_vma op; |
4523 | bfd_signed_vma mask = -1; | |
252b5132 RH |
4524 | |
4525 | switch (bytemode) | |
4526 | { | |
4527 | case b_mode: | |
4528 | FETCH_DATA (the_info, codep + 1); | |
52b15da3 JH |
4529 | op = *codep++; |
4530 | mask = 0xff; | |
4531 | break; | |
4532 | case q_mode: | |
4533 | op = get32s (); | |
252b5132 RH |
4534 | break; |
4535 | case v_mode: | |
52b15da3 JH |
4536 | USED_REX (REX_MODE64); |
4537 | if (rex & REX_MODE64) | |
4538 | op = get32s (); | |
4539 | else if (sizeflag & DFLAG) | |
4540 | { | |
4541 | op = get32 (); | |
4542 | mask = 0xffffffff; | |
4543 | } | |
252b5132 | 4544 | else |
52b15da3 JH |
4545 | { |
4546 | op = get16 (); | |
4547 | mask = 0xfffff; | |
4548 | } | |
7d421014 | 4549 | used_prefixes |= (prefixes & PREFIX_DATA); |
252b5132 RH |
4550 | break; |
4551 | case w_mode: | |
52b15da3 | 4552 | mask = 0xfffff; |
252b5132 RH |
4553 | op = get16 (); |
4554 | break; | |
4555 | default: | |
4556 | oappend (INTERNAL_DISASSEMBLER_ERROR); | |
4557 | return; | |
4558 | } | |
4559 | ||
52b15da3 JH |
4560 | op &= mask; |
4561 | scratchbuf[0] = '$'; | |
4562 | print_operand_value (scratchbuf + !intel_syntax, 1, op); | |
4563 | oappend (scratchbuf); | |
4564 | scratchbuf[0] = '\0'; | |
4565 | } | |
4566 | ||
4567 | static void | |
4568 | OP_I64 (bytemode, sizeflag) | |
4569 | int bytemode; | |
4570 | int sizeflag; | |
4571 | { | |
4572 | bfd_signed_vma op; | |
4573 | bfd_signed_vma mask = -1; | |
4574 | ||
4575 | switch (bytemode) | |
4576 | { | |
4577 | case b_mode: | |
4578 | FETCH_DATA (the_info, codep + 1); | |
4579 | op = *codep++; | |
4580 | mask = 0xff; | |
4581 | break; | |
4582 | case v_mode: | |
4583 | USED_REX (REX_MODE64); | |
4584 | if (rex & REX_MODE64) | |
4585 | op = get64 (); | |
4586 | else if (sizeflag & DFLAG) | |
4587 | { | |
4588 | op = get32 (); | |
4589 | mask = 0xffffffff; | |
4590 | } | |
4591 | else | |
4592 | { | |
4593 | op = get16 (); | |
4594 | mask = 0xfffff; | |
4595 | } | |
4596 | used_prefixes |= (prefixes & PREFIX_DATA); | |
4597 | break; | |
4598 | case w_mode: | |
4599 | mask = 0xfffff; | |
4600 | op = get16 (); | |
4601 | break; | |
4602 | default: | |
4603 | oappend (INTERNAL_DISASSEMBLER_ERROR); | |
4604 | return; | |
4605 | } | |
4606 | ||
4607 | op &= mask; | |
4608 | scratchbuf[0] = '$'; | |
4609 | print_operand_value (scratchbuf + !intel_syntax, 1, op); | |
252b5132 RH |
4610 | oappend (scratchbuf); |
4611 | scratchbuf[0] = '\0'; | |
4612 | } | |
4613 | ||
4614 | static void | |
4615 | OP_sI (bytemode, sizeflag) | |
4616 | int bytemode; | |
4617 | int sizeflag; | |
4618 | { | |
52b15da3 JH |
4619 | bfd_signed_vma op; |
4620 | bfd_signed_vma mask = -1; | |
252b5132 RH |
4621 | |
4622 | switch (bytemode) | |
4623 | { | |
4624 | case b_mode: | |
4625 | FETCH_DATA (the_info, codep + 1); | |
4626 | op = *codep++; | |
4627 | if ((op & 0x80) != 0) | |
4628 | op -= 0x100; | |
52b15da3 | 4629 | mask = 0xffffffff; |
252b5132 RH |
4630 | break; |
4631 | case v_mode: | |
52b15da3 JH |
4632 | USED_REX (REX_MODE64); |
4633 | if (rex & REX_MODE64) | |
4634 | op = get32s (); | |
4635 | else if (sizeflag & DFLAG) | |
4636 | { | |
4637 | op = get32s (); | |
4638 | mask = 0xffffffff; | |
4639 | } | |
252b5132 RH |
4640 | else |
4641 | { | |
52b15da3 | 4642 | mask = 0xffffffff; |
252b5132 RH |
4643 | op = get16(); |
4644 | if ((op & 0x8000) != 0) | |
4645 | op -= 0x10000; | |
4646 | } | |
7d421014 | 4647 | used_prefixes |= (prefixes & PREFIX_DATA); |
252b5132 RH |
4648 | break; |
4649 | case w_mode: | |
4650 | op = get16 (); | |
52b15da3 | 4651 | mask = 0xffffffff; |
252b5132 RH |
4652 | if ((op & 0x8000) != 0) |
4653 | op -= 0x10000; | |
4654 | break; | |
4655 | default: | |
4656 | oappend (INTERNAL_DISASSEMBLER_ERROR); | |
4657 | return; | |
4658 | } | |
52b15da3 JH |
4659 | |
4660 | scratchbuf[0] = '$'; | |
4661 | print_operand_value (scratchbuf + 1, 1, op); | |
252b5132 RH |
4662 | oappend (scratchbuf); |
4663 | } | |
4664 | ||
4665 | static void | |
4666 | OP_J (bytemode, sizeflag) | |
4667 | int bytemode; | |
4668 | int sizeflag; | |
4669 | { | |
52b15da3 | 4670 | bfd_vma disp; |
252b5132 RH |
4671 | int mask = -1; |
4672 | ||
4673 | switch (bytemode) | |
4674 | { | |
4675 | case b_mode: | |
4676 | FETCH_DATA (the_info, codep + 1); | |
4677 | disp = *codep++; | |
4678 | if ((disp & 0x80) != 0) | |
4679 | disp -= 0x100; | |
4680 | break; | |
4681 | case v_mode: | |
4682 | if (sizeflag & DFLAG) | |
52b15da3 | 4683 | disp = get32s (); |
252b5132 RH |
4684 | else |
4685 | { | |
4686 | disp = get16 (); | |
4687 | /* for some reason, a data16 prefix on a jump instruction | |
4688 | means that the pc is masked to 16 bits after the | |
4689 | displacement is added! */ | |
4690 | mask = 0xffff; | |
4691 | } | |
7d421014 | 4692 | used_prefixes |= (prefixes & PREFIX_DATA); |
252b5132 RH |
4693 | break; |
4694 | default: | |
4695 | oappend (INTERNAL_DISASSEMBLER_ERROR); | |
4696 | return; | |
4697 | } | |
4698 | disp = (start_pc + codep - start_codep + disp) & mask; | |
52b15da3 JH |
4699 | set_op (disp, 0); |
4700 | print_operand_value (scratchbuf, 1, disp); | |
252b5132 RH |
4701 | oappend (scratchbuf); |
4702 | } | |
4703 | ||
4704 | /* ARGSUSED */ | |
4705 | static void | |
4706 | OP_SEG (dummy, sizeflag) | |
57d91c3c ILT |
4707 | int dummy ATTRIBUTE_UNUSED; |
4708 | int sizeflag ATTRIBUTE_UNUSED; | |
252b5132 RH |
4709 | { |
4710 | static char *sreg[] = { | |
4711 | "%es","%cs","%ss","%ds","%fs","%gs","%?","%?", | |
4712 | }; | |
4713 | ||
4714 | oappend (sreg[reg]); | |
4715 | } | |
4716 | ||
c608c12e | 4717 | /* ARGSUSED */ |
252b5132 | 4718 | static void |
c608c12e | 4719 | OP_DIR (dummy, sizeflag) |
57d91c3c | 4720 | int dummy ATTRIBUTE_UNUSED; |
252b5132 RH |
4721 | int sizeflag; |
4722 | { | |
4723 | int seg, offset; | |
4724 | ||
c608c12e | 4725 | if (sizeflag & DFLAG) |
252b5132 | 4726 | { |
c608c12e AM |
4727 | offset = get32 (); |
4728 | seg = get16 (); | |
252b5132 | 4729 | } |
c608c12e AM |
4730 | else |
4731 | { | |
4732 | offset = get16 (); | |
4733 | seg = get16 (); | |
4734 | } | |
7d421014 | 4735 | used_prefixes |= (prefixes & PREFIX_DATA); |
c608c12e AM |
4736 | sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset); |
4737 | oappend (scratchbuf); | |
252b5132 RH |
4738 | } |
4739 | ||
4740 | /* ARGSUSED */ | |
4741 | static void | |
52b15da3 JH |
4742 | OP_OFF (ignored, sizeflag) |
4743 | int ignored ATTRIBUTE_UNUSED; | |
252b5132 RH |
4744 | int sizeflag; |
4745 | { | |
52b15da3 | 4746 | bfd_vma off; |
252b5132 RH |
4747 | |
4748 | append_seg (); | |
4749 | ||
4750 | if (sizeflag & AFLAG) | |
4751 | off = get32 (); | |
4752 | else | |
4753 | off = get16 (); | |
4754 | ||
4755 | if (intel_syntax) | |
4756 | { | |
4757 | if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS | |
4758 | | PREFIX_ES | PREFIX_FS | PREFIX_GS))) | |
4759 | { | |
4760 | oappend (names_seg[3]); | |
4761 | oappend (":"); | |
4762 | } | |
4763 | } | |
52b15da3 JH |
4764 | print_operand_value (scratchbuf, 1, off); |
4765 | oappend (scratchbuf); | |
4766 | } | |
4767 | /* ARGSUSED */ | |
4768 | static void | |
4769 | OP_OFF64 (ignored, sizeflag) | |
4770 | int ignored ATTRIBUTE_UNUSED; | |
4771 | int sizeflag ATTRIBUTE_UNUSED; | |
4772 | { | |
4773 | bfd_vma off; | |
4774 | ||
4775 | append_seg (); | |
4776 | ||
4777 | off = get64(); | |
4778 | ||
4779 | if (intel_syntax) | |
4780 | { | |
4781 | if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS | |
4782 | | PREFIX_ES | PREFIX_FS | PREFIX_GS))) | |
4783 | { | |
4784 | oappend (names_seg[3]); | |
4785 | oappend (":"); | |
4786 | } | |
4787 | } | |
4788 | print_operand_value (scratchbuf, 1, off); | |
252b5132 RH |
4789 | oappend (scratchbuf); |
4790 | } | |
4791 | ||
4792 | static void | |
4793 | ptr_reg (code, sizeflag) | |
4794 | int code; | |
4795 | int sizeflag; | |
4796 | { | |
2da11e11 | 4797 | const char *s; |
252b5132 | 4798 | oappend ("("); |
52b15da3 JH |
4799 | USED_REX (REX_MODE64); |
4800 | if (rex & REX_MODE64) | |
4801 | s = names64[code - eAX_reg]; | |
4802 | else if (sizeflag & AFLAG) | |
252b5132 RH |
4803 | s = names32[code - eAX_reg]; |
4804 | else | |
4805 | s = names16[code - eAX_reg]; | |
4806 | oappend (s); | |
4807 | oappend (")"); | |
4808 | } | |
4809 | ||
4810 | static void | |
4811 | OP_ESreg (code, sizeflag) | |
4812 | int code; | |
4813 | int sizeflag; | |
4814 | { | |
4815 | oappend ("%es:"); | |
4816 | ptr_reg (code, sizeflag); | |
4817 | } | |
4818 | ||
4819 | static void | |
4820 | OP_DSreg (code, sizeflag) | |
4821 | int code; | |
4822 | int sizeflag; | |
4823 | { | |
4824 | if ((prefixes | |
4825 | & (PREFIX_CS | |
4826 | | PREFIX_DS | |
4827 | | PREFIX_SS | |
4828 | | PREFIX_ES | |
4829 | | PREFIX_FS | |
4830 | | PREFIX_GS)) == 0) | |
4831 | prefixes |= PREFIX_DS; | |
4832 | append_seg(); | |
4833 | ptr_reg (code, sizeflag); | |
4834 | } | |
4835 | ||
252b5132 RH |
4836 | /* ARGSUSED */ |
4837 | static void | |
4838 | OP_C (dummy, sizeflag) | |
57d91c3c ILT |
4839 | int dummy ATTRIBUTE_UNUSED; |
4840 | int sizeflag ATTRIBUTE_UNUSED; | |
252b5132 | 4841 | { |
52b15da3 JH |
4842 | int add = 0; |
4843 | USED_REX (REX_EXTX); | |
4844 | if (rex & REX_EXTX) | |
4845 | add = 8; | |
4846 | sprintf (scratchbuf, "%%cr%d", reg+add); | |
252b5132 RH |
4847 | oappend (scratchbuf); |
4848 | } | |
4849 | ||
4850 | /* ARGSUSED */ | |
4851 | static void | |
4852 | OP_D (dummy, sizeflag) | |
57d91c3c ILT |
4853 | int dummy ATTRIBUTE_UNUSED; |
4854 | int sizeflag ATTRIBUTE_UNUSED; | |
252b5132 | 4855 | { |
52b15da3 JH |
4856 | int add = 0; |
4857 | USED_REX (REX_EXTX); | |
4858 | if (rex & REX_EXTX) | |
4859 | add = 8; | |
4860 | sprintf (scratchbuf, "%%db%d", reg+add); | |
252b5132 RH |
4861 | oappend (scratchbuf); |
4862 | } | |
4863 | ||
4864 | /* ARGSUSED */ | |
4865 | static void | |
4866 | OP_T (dummy, sizeflag) | |
57d91c3c ILT |
4867 | int dummy ATTRIBUTE_UNUSED; |
4868 | int sizeflag ATTRIBUTE_UNUSED; | |
252b5132 | 4869 | { |
252b5132 RH |
4870 | sprintf (scratchbuf, "%%tr%d", reg); |
4871 | oappend (scratchbuf); | |
4872 | } | |
4873 | ||
4874 | static void | |
2da11e11 | 4875 | OP_Rd (bytemode, sizeflag) |
252b5132 RH |
4876 | int bytemode; |
4877 | int sizeflag; | |
4878 | { | |
2da11e11 AM |
4879 | if (mod == 3) |
4880 | OP_E (bytemode, sizeflag); | |
4881 | else | |
4882 | BadOp(); | |
252b5132 RH |
4883 | } |
4884 | ||
4885 | static void | |
4886 | OP_MMX (ignore, sizeflag) | |
57d91c3c ILT |
4887 | int ignore ATTRIBUTE_UNUSED; |
4888 | int sizeflag ATTRIBUTE_UNUSED; | |
252b5132 | 4889 | { |
041bd2e0 JH |
4890 | int add = 0; |
4891 | USED_REX (REX_EXTX); | |
4892 | if (rex & REX_EXTX) | |
4893 | add = 8; | |
4894 | used_prefixes |= (prefixes & PREFIX_DATA); | |
4895 | if (prefixes & PREFIX_DATA) | |
4896 | sprintf (scratchbuf, "%%xmm%d", reg + add); | |
4897 | else | |
4898 | sprintf (scratchbuf, "%%mm%d", reg + add); | |
252b5132 RH |
4899 | oappend (scratchbuf); |
4900 | } | |
4901 | ||
c608c12e AM |
4902 | static void |
4903 | OP_XMM (bytemode, sizeflag) | |
57d91c3c ILT |
4904 | int bytemode ATTRIBUTE_UNUSED; |
4905 | int sizeflag ATTRIBUTE_UNUSED; | |
c608c12e | 4906 | { |
041bd2e0 JH |
4907 | int add = 0; |
4908 | USED_REX (REX_EXTX); | |
4909 | if (rex & REX_EXTX) | |
4910 | add = 8; | |
4911 | sprintf (scratchbuf, "%%xmm%d", reg + add); | |
c608c12e AM |
4912 | oappend (scratchbuf); |
4913 | } | |
4914 | ||
252b5132 RH |
4915 | static void |
4916 | OP_EM (bytemode, sizeflag) | |
4917 | int bytemode; | |
4918 | int sizeflag; | |
4919 | { | |
041bd2e0 | 4920 | int add = 0; |
252b5132 RH |
4921 | if (mod != 3) |
4922 | { | |
4923 | OP_E (bytemode, sizeflag); | |
4924 | return; | |
4925 | } | |
041bd2e0 JH |
4926 | USED_REX (REX_EXTZ); |
4927 | if (rex & REX_EXTZ) | |
4928 | add = 8; | |
252b5132 RH |
4929 | |
4930 | codep++; | |
041bd2e0 JH |
4931 | used_prefixes |= (prefixes & PREFIX_DATA); |
4932 | if (prefixes & PREFIX_DATA) | |
4933 | sprintf (scratchbuf, "%%xmm%d", rm + add); | |
4934 | else | |
4935 | sprintf (scratchbuf, "%%mm%d", rm + add); | |
252b5132 RH |
4936 | oappend (scratchbuf); |
4937 | } | |
4938 | ||
c608c12e AM |
4939 | static void |
4940 | OP_EX (bytemode, sizeflag) | |
4941 | int bytemode; | |
4942 | int sizeflag; | |
4943 | { | |
041bd2e0 | 4944 | int add = 0; |
c608c12e AM |
4945 | if (mod != 3) |
4946 | { | |
4947 | OP_E (bytemode, sizeflag); | |
4948 | return; | |
4949 | } | |
041bd2e0 JH |
4950 | USED_REX (REX_EXTZ); |
4951 | if (rex & REX_EXTZ) | |
4952 | add = 8; | |
c608c12e AM |
4953 | |
4954 | codep++; | |
041bd2e0 | 4955 | sprintf (scratchbuf, "%%xmm%d", rm + add); |
c608c12e AM |
4956 | oappend (scratchbuf); |
4957 | } | |
4958 | ||
252b5132 | 4959 | static void |
2da11e11 AM |
4960 | OP_MS (bytemode, sizeflag) |
4961 | int bytemode; | |
252b5132 RH |
4962 | int sizeflag; |
4963 | { | |
2da11e11 AM |
4964 | if (mod == 3) |
4965 | OP_EM (bytemode, sizeflag); | |
4966 | else | |
4967 | BadOp(); | |
252b5132 RH |
4968 | } |
4969 | ||
4970 | static const char *Suffix3DNow[] = { | |
4971 | /* 00 */ NULL, NULL, NULL, NULL, | |
4972 | /* 04 */ NULL, NULL, NULL, NULL, | |
4973 | /* 08 */ NULL, NULL, NULL, NULL, | |
9e525108 | 4974 | /* 0C */ "pi2fw", "pi2fd", NULL, NULL, |
252b5132 RH |
4975 | /* 10 */ NULL, NULL, NULL, NULL, |
4976 | /* 14 */ NULL, NULL, NULL, NULL, | |
4977 | /* 18 */ NULL, NULL, NULL, NULL, | |
9e525108 | 4978 | /* 1C */ "pf2iw", "pf2id", NULL, NULL, |
252b5132 RH |
4979 | /* 20 */ NULL, NULL, NULL, NULL, |
4980 | /* 24 */ NULL, NULL, NULL, NULL, | |
4981 | /* 28 */ NULL, NULL, NULL, NULL, | |
4982 | /* 2C */ NULL, NULL, NULL, NULL, | |
4983 | /* 30 */ NULL, NULL, NULL, NULL, | |
4984 | /* 34 */ NULL, NULL, NULL, NULL, | |
4985 | /* 38 */ NULL, NULL, NULL, NULL, | |
4986 | /* 3C */ NULL, NULL, NULL, NULL, | |
4987 | /* 40 */ NULL, NULL, NULL, NULL, | |
4988 | /* 44 */ NULL, NULL, NULL, NULL, | |
4989 | /* 48 */ NULL, NULL, NULL, NULL, | |
4990 | /* 4C */ NULL, NULL, NULL, NULL, | |
4991 | /* 50 */ NULL, NULL, NULL, NULL, | |
4992 | /* 54 */ NULL, NULL, NULL, NULL, | |
4993 | /* 58 */ NULL, NULL, NULL, NULL, | |
4994 | /* 5C */ NULL, NULL, NULL, NULL, | |
4995 | /* 60 */ NULL, NULL, NULL, NULL, | |
4996 | /* 64 */ NULL, NULL, NULL, NULL, | |
4997 | /* 68 */ NULL, NULL, NULL, NULL, | |
4998 | /* 6C */ NULL, NULL, NULL, NULL, | |
4999 | /* 70 */ NULL, NULL, NULL, NULL, | |
5000 | /* 74 */ NULL, NULL, NULL, NULL, | |
5001 | /* 78 */ NULL, NULL, NULL, NULL, | |
5002 | /* 7C */ NULL, NULL, NULL, NULL, | |
5003 | /* 80 */ NULL, NULL, NULL, NULL, | |
5004 | /* 84 */ NULL, NULL, NULL, NULL, | |
9e525108 AM |
5005 | /* 88 */ NULL, NULL, "pfnacc", NULL, |
5006 | /* 8C */ NULL, NULL, "pfpnacc", NULL, | |
252b5132 RH |
5007 | /* 90 */ "pfcmpge", NULL, NULL, NULL, |
5008 | /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt", | |
5009 | /* 98 */ NULL, NULL, "pfsub", NULL, | |
5010 | /* 9C */ NULL, NULL, "pfadd", NULL, | |
5011 | /* A0 */ "pfcmpgt", NULL, NULL, NULL, | |
5012 | /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1", | |
5013 | /* A8 */ NULL, NULL, "pfsubr", NULL, | |
5014 | /* AC */ NULL, NULL, "pfacc", NULL, | |
5015 | /* B0 */ "pfcmpeq", NULL, NULL, NULL, | |
5016 | /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw", | |
9e525108 | 5017 | /* B8 */ NULL, NULL, NULL, "pswapd", |
252b5132 RH |
5018 | /* BC */ NULL, NULL, NULL, "pavgusb", |
5019 | /* C0 */ NULL, NULL, NULL, NULL, | |
5020 | /* C4 */ NULL, NULL, NULL, NULL, | |
5021 | /* C8 */ NULL, NULL, NULL, NULL, | |
5022 | /* CC */ NULL, NULL, NULL, NULL, | |
5023 | /* D0 */ NULL, NULL, NULL, NULL, | |
5024 | /* D4 */ NULL, NULL, NULL, NULL, | |
5025 | /* D8 */ NULL, NULL, NULL, NULL, | |
5026 | /* DC */ NULL, NULL, NULL, NULL, | |
5027 | /* E0 */ NULL, NULL, NULL, NULL, | |
5028 | /* E4 */ NULL, NULL, NULL, NULL, | |
5029 | /* E8 */ NULL, NULL, NULL, NULL, | |
5030 | /* EC */ NULL, NULL, NULL, NULL, | |
5031 | /* F0 */ NULL, NULL, NULL, NULL, | |
5032 | /* F4 */ NULL, NULL, NULL, NULL, | |
5033 | /* F8 */ NULL, NULL, NULL, NULL, | |
5034 | /* FC */ NULL, NULL, NULL, NULL, | |
5035 | }; | |
5036 | ||
5037 | static void | |
5038 | OP_3DNowSuffix (bytemode, sizeflag) | |
57d91c3c ILT |
5039 | int bytemode ATTRIBUTE_UNUSED; |
5040 | int sizeflag ATTRIBUTE_UNUSED; | |
252b5132 RH |
5041 | { |
5042 | const char *mnemonic; | |
5043 | ||
5044 | FETCH_DATA (the_info, codep + 1); | |
5045 | /* AMD 3DNow! instructions are specified by an opcode suffix in the | |
5046 | place where an 8-bit immediate would normally go. ie. the last | |
5047 | byte of the instruction. */ | |
2da11e11 | 5048 | obufp = obuf + strlen(obuf); |
c608c12e | 5049 | mnemonic = Suffix3DNow[*codep++ & 0xff]; |
252b5132 | 5050 | if (mnemonic) |
2da11e11 | 5051 | oappend (mnemonic); |
252b5132 RH |
5052 | else |
5053 | { | |
5054 | /* Since a variable sized modrm/sib chunk is between the start | |
5055 | of the opcode (0x0f0f) and the opcode suffix, we need to do | |
5056 | all the modrm processing first, and don't know until now that | |
5057 | we have a bad opcode. This necessitates some cleaning up. */ | |
2da11e11 AM |
5058 | op1out[0] = '\0'; |
5059 | op2out[0] = '\0'; | |
5060 | BadOp(); | |
252b5132 RH |
5061 | } |
5062 | } | |
c608c12e AM |
5063 | |
5064 | ||
5065 | static const char *simd_cmp_op [] = { | |
5066 | "eq", | |
5067 | "lt", | |
5068 | "le", | |
5069 | "unord", | |
5070 | "neq", | |
5071 | "nlt", | |
5072 | "nle", | |
5073 | "ord" | |
5074 | }; | |
5075 | ||
5076 | static void | |
5077 | OP_SIMD_Suffix (bytemode, sizeflag) | |
57d91c3c ILT |
5078 | int bytemode ATTRIBUTE_UNUSED; |
5079 | int sizeflag ATTRIBUTE_UNUSED; | |
c608c12e AM |
5080 | { |
5081 | unsigned int cmp_type; | |
5082 | ||
5083 | FETCH_DATA (the_info, codep + 1); | |
2da11e11 | 5084 | obufp = obuf + strlen(obuf); |
c608c12e AM |
5085 | cmp_type = *codep++ & 0xff; |
5086 | if (cmp_type < 8) | |
5087 | { | |
041bd2e0 JH |
5088 | char suffix1 = 'p', suffix2 = 's'; |
5089 | used_prefixes |= (prefixes & PREFIX_REPZ); | |
5090 | if (prefixes & PREFIX_REPZ) | |
5091 | suffix1 = 's'; | |
5092 | else | |
5093 | { | |
5094 | used_prefixes |= (prefixes & PREFIX_DATA); | |
5095 | if (prefixes & PREFIX_DATA) | |
5096 | suffix2 = 'd'; | |
5097 | else | |
5098 | { | |
5099 | used_prefixes |= (prefixes & PREFIX_REPNZ); | |
5100 | if (prefixes & PREFIX_REPNZ) | |
5101 | suffix1 = 's', suffix2 = 'd'; | |
5102 | } | |
5103 | } | |
5104 | sprintf (scratchbuf, "cmp%s%c%c", | |
5105 | simd_cmp_op[cmp_type], suffix1, suffix2); | |
7d421014 | 5106 | used_prefixes |= (prefixes & PREFIX_REPZ); |
2da11e11 | 5107 | oappend (scratchbuf); |
c608c12e AM |
5108 | } |
5109 | else | |
5110 | { | |
5111 | /* We have a bad extension byte. Clean up. */ | |
2da11e11 AM |
5112 | op1out[0] = '\0'; |
5113 | op2out[0] = '\0'; | |
5114 | BadOp(); | |
c608c12e AM |
5115 | } |
5116 | } | |
5117 | ||
5118 | static void | |
5119 | SIMD_Fixup (extrachar, sizeflag) | |
5120 | int extrachar; | |
57d91c3c | 5121 | int sizeflag ATTRIBUTE_UNUSED; |
c608c12e AM |
5122 | { |
5123 | /* Change movlps/movhps to movhlps/movlhps for 2 register operand | |
5124 | forms of these instructions. */ | |
5125 | if (mod == 3) | |
5126 | { | |
5127 | char *p = obuf + strlen(obuf); | |
5128 | *(p+1) = '\0'; | |
5129 | *p = *(p-1); | |
5130 | *(p-1) = *(p-2); | |
5131 | *(p-2) = *(p-3); | |
5132 | *(p-3) = extrachar; | |
5133 | } | |
5134 | } | |
2da11e11 AM |
5135 | |
5136 | static void BadOp (void) | |
5137 | { | |
5138 | codep = insn_codep + 1; /* throw away prefixes and 1st. opcode byte */ | |
5139 | oappend ("(bad)"); | |
5140 | } |