projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
*** empty log message ***
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
CommitLineData
252b5132 1/* Print i386 instructions for GDB, the GNU debugger.
060d22b0 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
0112cd26 3 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
252b5132 4
20f0a1fc
NC		 5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
f4321104 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20f0a1fc
NC		 20
21/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
26
27/* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
252b5132
RH		 33
34#include "dis-asm.h"
35#include "sysdep.h"
36#include "opintl.h"
37
272c9217 38#define MAXLEN 15
252b5132
RH		 39
40#include <setjmp.h>
41
42#ifndef UNIXWARE_COMPAT
43/* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45#define UNIXWARE_COMPAT 1
46#endif
47
26ca5450
AJ		 48static int fetch_data (struct disassemble_info *, bfd_byte *);
49static void ckprefix (void);
50static const char *prefix_name (int, int);
51static int print_insn (bfd_vma, disassemble_info *);
52static void dofloat (int);
53static void OP_ST (int, int);
54static void OP_STi (int, int);
55static int putop (const char *, int);
56static void oappend (const char *);
57static void append_seg (void);
58static void OP_indirE (int, int);
59static void print_operand_value (char *, int, bfd_vma);
60static void OP_E (int, int);
61static void OP_G (int, int);
62static bfd_vma get64 (void);
63static bfd_signed_vma get32 (void);
64static bfd_signed_vma get32s (void);
65static int get16 (void);
66static void set_op (bfd_vma, int);
67static void OP_REG (int, int);
68static void OP_IMREG (int, int);
69static void OP_I (int, int);
70static void OP_I64 (int, int);
71static void OP_sI (int, int);
72static void OP_J (int, int);
73static void OP_SEG (int, int);
74static void OP_DIR (int, int);
75static void OP_OFF (int, int);
76static void OP_OFF64 (int, int);
77static void ptr_reg (int, int);
78static void OP_ESreg (int, int);
79static void OP_DSreg (int, int);
80static void OP_C (int, int);
81static void OP_D (int, int);
82static void OP_T (int, int);
83static void OP_Rd (int, int);
84static void OP_MMX (int, int);
85static void OP_XMM (int, int);
86static void OP_EM (int, int);
87static void OP_EX (int, int);
4d9567e0
MM		 88static void OP_EMC (int,int);
89static void OP_MXC (int,int);
26ca5450
AJ		 90static void OP_MS (int, int);
91static void OP_XS (int, int);
cc0ec051 92static void OP_M (int, int);
90700ea2 93static void OP_VMX (int, int);
cc0ec051
AM		 94static void OP_0fae (int, int);
95static void OP_0f07 (int, int);
46e883c5
L		 96static void NOP_Fixup1 (int, int);
97static void NOP_Fixup2 (int, int);
26ca5450
AJ		 98static void OP_3DNowSuffix (int, int);
99static void OP_SIMD_Suffix (int, int);
100static void SIMD_Fixup (int, int);
101static void PNI_Fixup (int, int);
30123838 102static void SVME_Fixup (int, int);
4fd61dcb 103static void INVLPG_Fixup (int, int);
26ca5450 104static void BadOp (void);
90700ea2 105static void VMX_Fixup (int, int);
35c52694 106static void REP_Fixup (int, int);
252b5132 107
6608db57 108struct dis_private {
252b5132
RH		 109 /* Points to first byte not fetched. */
110 bfd_byte *max_fetched;
111 bfd_byte the_buffer[MAXLEN];
112 bfd_vma insn_start;
e396998b 113 int orig_sizeflag;
252b5132
RH		 114 jmp_buf bailout;
115};
116
5076851f
ILT		 117/* The opcode for the fwait instruction, which we treat as a prefix
118 when we can. */
119#define FWAIT_OPCODE (0x9b)
120
cb712a9e
L		 121enum address_mode
122{
123 mode_16bit,
124 mode_32bit,
125 mode_64bit
126};
127
128enum address_mode address_mode;
52b15da3 129
5076851f
ILT		 130/* Flags for the prefixes for the current instruction. See below. */
131static int prefixes;
132
52b15da3
JH		 133/* REX prefix the current instruction. See below. */
134static int rex;
135/* Bits of REX we've already used. */
136static int rex_used;
137#define REX_MODE64 8
138#define REX_EXTX 4
139#define REX_EXTY 2
140#define REX_EXTZ 1
141/* Mark parts used in the REX prefix. When we are testing for
142 empty prefix (for 8bit register REX extension), just mask it
143 out. Otherwise test for REX bit is excuse for existence of REX
144 only in case value is nonzero. */
145#define USED_REX(value) \
146 { \
147 if (value) \
148 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
149 else \
150 rex_used |= 0x40; \
151 }
152
7d421014
ILT		 153/* Flags for prefixes which we somehow handled when printing the
154 current instruction. */
155static int used_prefixes;
156
5076851f
ILT		 157/* Flags stored in PREFIXES. */
158#define PREFIX_REPZ 1
159#define PREFIX_REPNZ 2
160#define PREFIX_LOCK 4
161#define PREFIX_CS 8
162#define PREFIX_SS 0x10
163#define PREFIX_DS 0x20
164#define PREFIX_ES 0x40
165#define PREFIX_FS 0x80
166#define PREFIX_GS 0x100
167#define PREFIX_DATA 0x200
168#define PREFIX_ADDR 0x400
169#define PREFIX_FWAIT 0x800
170
252b5132
RH		 171/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
172 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
173 on error. */
174#define FETCH_DATA(info, addr) \
6608db57 175 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
252b5132
RH		 176 ? 1 : fetch_data ((info), (addr)))
177
178static int
26ca5450 179fetch_data (struct disassemble_info *info, bfd_byte *addr)
252b5132
RH		 180{
181 int status;
6608db57 182 struct dis_private *priv = (struct dis_private *) info->private_data;
252b5132
RH		 183 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
184
272c9217
JB		 185 if (addr <= priv->the_buffer + MAXLEN)
186 status = (*info->read_memory_func) (start,
187 priv->max_fetched,
188 addr - priv->max_fetched,
189 info);
190 else
191 status = -1;
252b5132
RH		 192 if (status != 0)
193 {
7d421014 194 /* If we did manage to read at least one byte, then
db6eb5be
AM		 195 print_insn_i386 will do something sensible. Otherwise, print
196 an error. We do that here because this is where we know
197 STATUS. */
7d421014 198 if (priv->max_fetched == priv->the_buffer)
5076851f 199 (*info->memory_error_func) (status, start, info);
252b5132
RH		 200 longjmp (priv->bailout, 1);
201 }
202 else
203 priv->max_fetched = addr;
204 return 1;
205}
206
57d91c3c
ILT		 207#define XX NULL, 0
208
252b5132 209#define Eb OP_E, b_mode
52b15da3
JH		 210#define Ev OP_E, v_mode
211#define Ed OP_E, d_mode
9306ca4a 212#define Eq OP_E, q_mode
db6eb5be 213#define Edq OP_E, dq_mode
9306ca4a 214#define Edqw OP_E, dqw_mode
1a114b12 215#define indirEv OP_indirE, stack_v_mode
9306ca4a 216#define indirEp OP_indirE, f_mode
1a114b12 217#define stackEv OP_E, stack_v_mode
90700ea2 218#define Em OP_E, m_mode
252b5132
RH		 219#define Ew OP_E, w_mode
220#define Ma OP_E, v_mode
cc0ec051 221#define M OP_M, 0 /* lea, lgdt, etc. */
9306ca4a 222#define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
992aaec9 223#define Gb OP_G, b_mode
252b5132 224#define Gv OP_G, v_mode
992aaec9 225#define Gd OP_G, d_mode
9306ca4a 226#define Gdq OP_G, dq_mode
90700ea2 227#define Gm OP_G, m_mode
252b5132 228#define Gw OP_G, w_mode
2da11e11 229#define Rd OP_Rd, d_mode
52b15da3 230#define Rm OP_Rd, m_mode
252b5132
RH		 231#define Ib OP_I, b_mode
232#define sIb OP_sI, b_mode /* sign extened byte */
233#define Iv OP_I, v_mode
52b15da3
JH		 234#define Iq OP_I, q_mode
235#define Iv64 OP_I64, v_mode
252b5132 236#define Iw OP_I, w_mode
9306ca4a 237#define I1 OP_I, const_1_mode
252b5132
RH		 238#define Jb OP_J, b_mode
239#define Jv OP_J, v_mode
52b15da3
JH		 240#define Cm OP_C, m_mode
241#define Dm OP_D, m_mode
252b5132
RH		 242#define Td OP_T, d_mode
243
52b15da3
JH		 244#define RMeAX OP_REG, eAX_reg
245#define RMeBX OP_REG, eBX_reg
246#define RMeCX OP_REG, eCX_reg
247#define RMeDX OP_REG, eDX_reg
248#define RMeSP OP_REG, eSP_reg
249#define RMeBP OP_REG, eBP_reg
250#define RMeSI OP_REG, eSI_reg
251#define RMeDI OP_REG, eDI_reg
252#define RMrAX OP_REG, rAX_reg
253#define RMrBX OP_REG, rBX_reg
254#define RMrCX OP_REG, rCX_reg
255#define RMrDX OP_REG, rDX_reg
256#define RMrSP OP_REG, rSP_reg
257#define RMrBP OP_REG, rBP_reg
258#define RMrSI OP_REG, rSI_reg
259#define RMrDI OP_REG, rDI_reg
260#define RMAL OP_REG, al_reg
261#define RMAL OP_REG, al_reg
262#define RMCL OP_REG, cl_reg
263#define RMDL OP_REG, dl_reg
264#define RMBL OP_REG, bl_reg
265#define RMAH OP_REG, ah_reg
266#define RMCH OP_REG, ch_reg
267#define RMDH OP_REG, dh_reg
268#define RMBH OP_REG, bh_reg
269#define RMAX OP_REG, ax_reg
270#define RMDX OP_REG, dx_reg
271
272#define eAX OP_IMREG, eAX_reg
273#define eBX OP_IMREG, eBX_reg
274#define eCX OP_IMREG, eCX_reg
275#define eDX OP_IMREG, eDX_reg
276#define eSP OP_IMREG, eSP_reg
277#define eBP OP_IMREG, eBP_reg
278#define eSI OP_IMREG, eSI_reg
279#define eDI OP_IMREG, eDI_reg
280#define AL OP_IMREG, al_reg
52b15da3
JH		 281#define CL OP_IMREG, cl_reg
282#define DL OP_IMREG, dl_reg
283#define BL OP_IMREG, bl_reg
284#define AH OP_IMREG, ah_reg
285#define CH OP_IMREG, ch_reg
286#define DH OP_IMREG, dh_reg
287#define BH OP_IMREG, bh_reg
288#define AX OP_IMREG, ax_reg
289#define DX OP_IMREG, dx_reg
52fd6d94 290#define zAX OP_IMREG, z_mode_ax_reg
52b15da3 291#define indirDX OP_IMREG, indir_dx_reg
252b5132
RH		 292
293#define Sw OP_SEG, w_mode
ed7841b3 294#define Sv OP_SEG, v_mode
c608c12e 295#define Ap OP_DIR, 0
1a114b12
JB		 296#define Ob OP_OFF64, b_mode
297#define Ov OP_OFF64, v_mode
252b5132
RH		 298#define Xb OP_DSreg, eSI_reg
299#define Xv OP_DSreg, eSI_reg
52fd6d94 300#define Xz OP_DSreg, eSI_reg
252b5132
RH		 301#define Yb OP_ESreg, eDI_reg
302#define Yv OP_ESreg, eDI_reg
303#define DSBX OP_DSreg, eBX_reg
304
305#define es OP_REG, es_reg
306#define ss OP_REG, ss_reg
307#define cs OP_REG, cs_reg
308#define ds OP_REG, ds_reg
309#define fs OP_REG, fs_reg
310#define gs OP_REG, gs_reg
311
312#define MX OP_MMX, 0
c608c12e 313#define XM OP_XMM, 0
252b5132 314#define EM OP_EM, v_mode
c608c12e 315#define EX OP_EX, v_mode
2da11e11 316#define MS OP_MS, v_mode
992aaec9 317#define XS OP_XS, v_mode
4d9567e0
MM		 318#define EMC OP_EMC, v_mode
319#define MXC OP_MXC, 0
90700ea2 320#define VM OP_VMX, q_mode
252b5132 321#define OPSUF OP_3DNowSuffix, 0
c608c12e 322#define OPSIMD OP_SIMD_Suffix, 0
252b5132 323
35c52694
L		 324/* Used handle "rep" prefix for string instructions. */
325#define Xbr REP_Fixup, eSI_reg
326#define Xvr REP_Fixup, eSI_reg
327#define Ybr REP_Fixup, eDI_reg
328#define Yvr REP_Fixup, eDI_reg
52fd6d94 329#define Yzr REP_Fixup, eDI_reg
35c52694
L		 330#define indirDXr REP_Fixup, indir_dx_reg
331#define ALr REP_Fixup, al_reg
332#define eAXr REP_Fixup, eAX_reg
333
3ffd33cf
AM		 334#define cond_jump_flag NULL, cond_jump_mode
335#define loop_jcxz_flag NULL, loop_jcxz_mode
336
252b5132 337/* bits in sizeflag */
252b5132 338#define SUFFIX_ALWAYS 4
252b5132
RH		 339#define AFLAG 2
340#define DFLAG 1
341
52b15da3
JH		 342#define b_mode 1 /* byte operand */
343#define v_mode 2 /* operand size depends on prefixes */
344#define w_mode 3 /* word operand */
345#define d_mode 4 /* double word operand */
346#define q_mode 5 /* quad word operand */
9306ca4a
JB		 347#define t_mode 6 /* ten-byte operand */
348#define x_mode 7 /* 16-byte XMM operand */
349#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
350#define cond_jump_mode 9
351#define loop_jcxz_mode 10
352#define dq_mode 11 /* operand size depends on REX prefixes. */
353#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
354#define f_mode 13 /* 4- or 6-byte pointer operand */
355#define const_1_mode 14
1a114b12 356#define stack_v_mode 15 /* v_mode for stack-related opcodes. */
52fd6d94 357#define z_mode 16 /* non-quad operand size depends on prefixes */
252b5132
RH		 358
359#define es_reg 100
360#define cs_reg 101
361#define ss_reg 102
362#define ds_reg 103
363#define fs_reg 104
364#define gs_reg 105
252b5132 365
c608c12e
AM		 366#define eAX_reg 108
367#define eCX_reg 109
368#define eDX_reg 110
369#define eBX_reg 111
370#define eSP_reg 112
371#define eBP_reg 113
372#define eSI_reg 114
373#define eDI_reg 115
252b5132
RH		 374
375#define al_reg 116
376#define cl_reg 117
377#define dl_reg 118
378#define bl_reg 119
379#define ah_reg 120
380#define ch_reg 121
381#define dh_reg 122
382#define bh_reg 123
383
384#define ax_reg 124
385#define cx_reg 125
386#define dx_reg 126
387#define bx_reg 127
388#define sp_reg 128
389#define bp_reg 129
390#define si_reg 130
391#define di_reg 131
392
52b15da3
JH		 393#define rAX_reg 132
394#define rCX_reg 133
395#define rDX_reg 134
396#define rBX_reg 135
397#define rSP_reg 136
398#define rBP_reg 137
399#define rSI_reg 138
400#define rDI_reg 139
401
52fd6d94 402#define z_mode_ax_reg 149
252b5132
RH		 403#define indir_dx_reg 150
404
6439fc28
AM		 405#define FLOATCODE 1
406#define USE_GROUPS 2
407#define USE_PREFIX_USER_TABLE 3
408#define X86_64_SPECIAL 4
331d2d0d 409#define IS_3BYTE_OPCODE 5
6439fc28 410
050dfa73
MM		 411#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0, NULL, 0
412
413#define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0, NULL, 0
414#define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0, NULL, 0
415#define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0, NULL, 0
416#define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0, NULL, 0
417#define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0, NULL, 0
418#define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0, NULL, 0
419#define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0, NULL, 0
420#define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0, NULL, 0
421#define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0, NULL, 0
422#define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0, NULL, 0
423#define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0, NULL, 0
424#define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0, NULL, 0
425#define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0, NULL, 0
426#define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0, NULL, 0
427#define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0, NULL, 0
428#define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0, NULL, 0
429#define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0, NULL, 0
7f4c972f
L		 430#define GRP11_C6 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0, NULL, 0
431#define GRP11_C7 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0, NULL, 0
a6bd098c
L		 432#define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0, NULL, 0
433#define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0, NULL, 0
434#define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0, NULL, 0
435#define GRP15 NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0, NULL, 0
436#define GRP16 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0, NULL, 0
437#define GRPAMD NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0, NULL, 0
438#define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 25, NULL, 0, NULL, 0
439#define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 26, NULL, 0, NULL, 0
050dfa73
MM		 440
441#define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0, NULL, 0
442#define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0, NULL, 0
443#define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0, NULL, 0
444#define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0, NULL, 0
445#define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0, NULL, 0
446#define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0, NULL, 0
447#define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0, NULL, 0
448#define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0, NULL, 0
449#define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0, NULL, 0
450#define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0, NULL, 0
451#define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0, NULL, 0
452#define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0, NULL, 0
453#define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0, NULL, 0
454#define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0, NULL, 0
455#define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0, NULL, 0
456#define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0, NULL, 0
457#define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0, NULL, 0
458#define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0, NULL, 0
459#define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0, NULL, 0
460#define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0, NULL, 0
461#define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0, NULL, 0
462#define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0, NULL, 0
463#define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0, NULL, 0
464#define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0, NULL, 0
465#define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0, NULL, 0
466#define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0, NULL, 0
467#define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0, NULL, 0
468#define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0, NULL, 0
469#define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0, NULL, 0
470#define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0, NULL, 0
471#define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0, NULL, 0
472#define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0, NULL, 0
473#define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0, NULL, 0
474#define PREGRP33 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 33, NULL, 0, NULL, 0
475#define PREGRP34 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 34, NULL, 0, NULL, 0
476#define PREGRP35 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 35, NULL, 0, NULL, 0
477#define PREGRP36 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 36, NULL, 0, NULL, 0
7918206c
MM		 478#define PREGRP37 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 37, NULL, 0, NULL, 0
479
050dfa73 480
7f4c972f 481#define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0, NULL, 0
050dfa73
MM		 482
483#define THREE_BYTE_0 NULL, NULL, IS_3BYTE_OPCODE, NULL, 0, NULL, 0, NULL, 0
484#define THREE_BYTE_1 NULL, NULL, IS_3BYTE_OPCODE, NULL, 1, NULL, 0, NULL, 0
331d2d0d 485
26ca5450 486typedef void (*op_rtn) (int bytemode, int sizeflag);
252b5132
RH		 487
488struct dis386 {
2da11e11 489 const char *name;
252b5132
RH		 490 op_rtn op1;
491 int bytemode1;
492 op_rtn op2;
493 int bytemode2;
494 op_rtn op3;
495 int bytemode3;
050dfa73
MM		 496 op_rtn op4;
497 int bytemode4;
252b5132
RH		 498};
499
500/* Upper case letters in the instruction names here are macros.
501 'A' => print 'b' if no register operands or suffix_always is true
502 'B' => print 'b' if suffix_always is true
9306ca4a
JB		 503 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
504 . size prefix
ed7841b3
JB		 505 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
506 . suffix_always is true
252b5132 507 'E' => print 'e' if 32-bit form of jcxz
3ffd33cf 508 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
52fd6d94 509 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
5dd0794d 510 'H' => print ",pt" or ",pn" branch hint
9306ca4a
JB		 511 'I' => honor following macro letter even in Intel mode (implemented only
512 . for some of the macro letters)
513 'J' => print 'l'
252b5132
RH		 514 'L' => print 'l' if suffix_always is true
515 'N' => print 'n' if instruction has no wait "prefix"
a35ca55a 516 'O' => print 'd' or 'o' (or 'q' in Intel mode)
52b15da3 517 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
e396998b
AM		 518 . or suffix_always is true. print 'q' if rex prefix is present.
519 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
520 . is true
a35ca55a 521 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
52b15da3 522 'S' => print 'w', 'l' or 'q' if suffix_always is true
6439fc28
AM		 523 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
524 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
1a114b12 525 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
a35ca55a 526 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
9306ca4a 527 'X' => print 's', 'd' depending on data16 prefix (for XMM)
76f227a5 528 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
6dd5059a 529 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
52b15da3 530
6439fc28
AM		 531 Many of the above letters print nothing in Intel mode. See "putop"
532 for the details.
52b15da3 533
6439fc28
AM		 534 Braces '{' and '}', and vertical bars '|', indicate alternative
535 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
536 modes. In cases where there are only two alternatives, the X86_64
537 instruction is reserved, and "(bad)" is printed.
538*/
252b5132 539
6439fc28 540static const struct dis386 dis386[] = {
252b5132 541 /* 00 */
050dfa73
MM		 542 { "addB", Eb, Gb, XX, XX },
543 { "addS", Ev, Gv, XX, XX },
544 { "addB", Gb, Eb, XX, XX },
545 { "addS", Gv, Ev, XX, XX },
546 { "addB", AL, Ib, XX, XX },
547 { "addS", eAX, Iv, XX, XX },
548 { "push{T|}", es, XX, XX, XX },
549 { "pop{T|}", es, XX, XX, XX },
252b5132 550 /* 08 */
050dfa73
MM		 551 { "orB", Eb, Gb, XX, XX },
552 { "orS", Ev, Gv, XX, XX },
553 { "orB", Gb, Eb, XX, XX },
7f4c972f 554 { "orS", Gv, Ev, XX, XX },
050dfa73
MM		 555 { "orB", AL, Ib, XX, XX },
556 { "orS", eAX, Iv, XX, XX },
557 { "push{T|}", cs, XX, XX, XX },
558 { "(bad)", XX, XX, XX, XX }, /* 0x0f extended opcode escape */
252b5132 559 /* 10 */
050dfa73
MM		 560 { "adcB", Eb, Gb, XX, XX },
561 { "adcS", Ev, Gv, XX, XX },
562 { "adcB", Gb, Eb, XX, XX },
563 { "adcS", Gv, Ev, XX, XX },
564 { "adcB", AL, Ib, XX, XX },
565 { "adcS", eAX, Iv, XX, XX },
566 { "push{T|}", ss, XX, XX, XX },
567 { "pop{T|}", ss, XX, XX, XX },
252b5132 568 /* 18 */
050dfa73
MM		 569 { "sbbB", Eb, Gb, XX, XX },
570 { "sbbS", Ev, Gv, XX, XX },
571 { "sbbB", Gb, Eb, XX, XX },
572 { "sbbS", Gv, Ev, XX, XX },
573 { "sbbB", AL, Ib, XX, XX },
574 { "sbbS", eAX, Iv, XX, XX },
575 { "push{T|}", ds, XX, XX, XX },
576 { "pop{T|}", ds, XX, XX, XX },
252b5132 577 /* 20 */
050dfa73
MM		 578 { "andB", Eb, Gb, XX, XX },
579 { "andS", Ev, Gv, XX, XX },
580 { "andB", Gb, Eb, XX, XX },
581 { "andS", Gv, Ev, XX, XX },
582 { "andB", AL, Ib, XX, XX },
583 { "andS", eAX, Iv, XX, XX },
584 { "(bad)", XX, XX, XX, XX }, /* SEG ES prefix */
585 { "daa{|}", XX, XX, XX, XX },
252b5132 586 /* 28 */
050dfa73 587 { "subB", Eb, Gb, XX, XX },
7f4c972f 588 { "subS", Ev, Gv, XX, XX },
050dfa73
MM		 589 { "subB", Gb, Eb, XX, XX },
590 { "subS", Gv, Ev, XX, XX },
591 { "subB", AL, Ib, XX, XX },
592 { "subS", eAX, Iv, XX, XX },
593 { "(bad)", XX, XX, XX, XX }, /* SEG CS prefix */
594 { "das{|}", XX, XX, XX, XX },
252b5132 595 /* 30 */
050dfa73
MM		 596 { "xorB", Eb, Gb, XX, XX },
597 { "xorS", Ev, Gv, XX, XX },
598 { "xorB", Gb, Eb, XX, XX },
599 { "xorS", Gv, Ev, XX, XX },
600 { "xorB", AL, Ib, XX, XX },
601 { "xorS", eAX, Iv, XX, XX },
602 { "(bad)", XX, XX, XX, XX }, /* SEG SS prefix */
603 { "aaa{|}", XX, XX, XX, XX },
252b5132 604 /* 38 */
050dfa73
MM		 605 { "cmpB", Eb, Gb, XX, XX },
606 { "cmpS", Ev, Gv, XX, XX },
607 { "cmpB", Gb, Eb, XX, XX },
608 { "cmpS", Gv, Ev, XX, XX },
609 { "cmpB", AL, Ib, XX, XX },
610 { "cmpS", eAX, Iv, XX, XX },
611 { "(bad)", XX, XX, XX, XX }, /* SEG DS prefix */
612 { "aas{|}", XX, XX, XX, XX },
252b5132 613 /* 40 */
050dfa73
MM		 614 { "inc{S|}", RMeAX, XX, XX, XX },
615 { "inc{S|}", RMeCX, XX, XX, XX },
616 { "inc{S|}", RMeDX, XX, XX, XX },
617 { "inc{S|}", RMeBX, XX, XX, XX },
618 { "inc{S|}", RMeSP, XX, XX, XX },
619 { "inc{S|}", RMeBP, XX, XX, XX },
620 { "inc{S|}", RMeSI, XX, XX, XX },
621 { "inc{S|}", RMeDI, XX, XX, XX },
252b5132 622 /* 48 */
050dfa73
MM		 623 { "dec{S|}", RMeAX, XX, XX, XX },
624 { "dec{S|}", RMeCX, XX, XX, XX },
625 { "dec{S|}", RMeDX, XX, XX, XX },
626 { "dec{S|}", RMeBX, XX, XX, XX },
627 { "dec{S|}", RMeSP, XX, XX, XX },
628 { "dec{S|}", RMeBP, XX, XX, XX },
629 { "dec{S|}", RMeSI, XX, XX, XX },
630 { "dec{S|}", RMeDI, XX, XX, XX },
252b5132 631 /* 50 */
050dfa73
MM		 632 { "pushV", RMrAX, XX, XX, XX },
633 { "pushV", RMrCX, XX, XX, XX },
634 { "pushV", RMrDX, XX, XX, XX },
635 { "pushV", RMrBX, XX, XX, XX },
636 { "pushV", RMrSP, XX, XX, XX },
637 { "pushV", RMrBP, XX, XX, XX },
638 { "pushV", RMrSI, XX, XX, XX },
639 { "pushV", RMrDI, XX, XX, XX },
252b5132 640 /* 58 */
050dfa73
MM		 641 { "popV", RMrAX, XX, XX, XX },
642 { "popV", RMrCX, XX, XX, XX },
643 { "popV", RMrDX, XX, XX, XX },
644 { "popV", RMrBX, XX, XX, XX },
645 { "popV", RMrSP, XX, XX, XX },
646 { "popV", RMrBP, XX, XX, XX },
647 { "popV", RMrSI, XX, XX, XX },
648 { "popV", RMrDI, XX, XX, XX },
252b5132 649 /* 60 */
7f4c972f 650 { "pusha{P|}", XX, XX, XX, XX },
050dfa73
MM		 651 { "popa{P|}", XX, XX, XX, XX },
652 { "bound{S|}", Gv, Ma, XX, XX },
6439fc28 653 { X86_64_0 },
050dfa73
MM		 654 { "(bad)", XX, XX, XX, XX }, /* seg fs */
655 { "(bad)", XX, XX, XX, XX }, /* seg gs */
656 { "(bad)", XX, XX, XX, XX }, /* op size prefix */
657 { "(bad)", XX, XX, XX, XX }, /* adr size prefix */
252b5132 658 /* 68 */
050dfa73
MM		 659 { "pushT", Iq, XX, XX, XX },
660 { "imulS", Gv, Ev, Iv, XX },
661 { "pushT", sIb, XX, XX, XX },
662 { "imulS", Gv, Ev, sIb, XX },
663 { "ins{b||b|}", Ybr, indirDX, XX, XX },
52fd6d94 664 { "ins{R||G|}", Yzr, indirDX, XX, XX },
050dfa73 665 { "outs{b||b|}", indirDXr, Xb, XX, XX },
52fd6d94 666 { "outs{R||G|}", indirDXr, Xz, XX, XX },
252b5132 667 /* 70 */
050dfa73
MM		 668 { "joH", Jb, XX, cond_jump_flag, XX },
669 { "jnoH", Jb, XX, cond_jump_flag, XX },
670 { "jbH", Jb, XX, cond_jump_flag, XX },
671 { "jaeH", Jb, XX, cond_jump_flag, XX },
672 { "jeH", Jb, XX, cond_jump_flag, XX },
673 { "jneH", Jb, XX, cond_jump_flag, XX },
674 { "jbeH", Jb, XX, cond_jump_flag, XX },
675 { "jaH", Jb, XX, cond_jump_flag, XX },
252b5132 676 /* 78 */
050dfa73
MM		 677 { "jsH", Jb, XX, cond_jump_flag, XX },
678 { "jnsH", Jb, XX, cond_jump_flag, XX },
679 { "jpH", Jb, XX, cond_jump_flag, XX },
680 { "jnpH", Jb, XX, cond_jump_flag, XX },
681 { "jlH", Jb, XX, cond_jump_flag, XX },
682 { "jgeH", Jb, XX, cond_jump_flag, XX },
683 { "jleH", Jb, XX, cond_jump_flag, XX },
684 { "jgH", Jb, XX, cond_jump_flag, XX },
252b5132
RH		 685 /* 80 */
686 { GRP1b },
687 { GRP1S },
050dfa73 688 { "(bad)", XX, XX, XX, XX },
252b5132 689 { GRP1Ss },
050dfa73
MM		 690 { "testB", Eb, Gb, XX, XX },
691 { "testS", Ev, Gv, XX, XX },
692 { "xchgB", Eb, Gb, XX, XX },
693 { "xchgS", Ev, Gv, XX, XX },
252b5132 694 /* 88 */
050dfa73
MM		 695 { "movB", Eb, Gb, XX, XX },
696 { "movS", Ev, Gv, XX, XX },
697 { "movB", Gb, Eb, XX, XX },
698 { "movS", Gv, Ev, XX, XX },
ed7841b3 699 { "movD", Sv, Sw, XX, XX },
050dfa73 700 { "leaS", Gv, M, XX, XX },
ed7841b3 701 { "movD", Sw, Sv, XX, XX },
050dfa73 702 { "popU", stackEv, XX, XX, XX },
252b5132 703 /* 90 */
050dfa73
MM		 704 { "xchgS", NOP_Fixup1, eAX_reg, NOP_Fixup2, eAX_reg, XX, XX },
705 { "xchgS", RMeCX, eAX, XX, XX },
706 { "xchgS", RMeDX, eAX, XX, XX },
707 { "xchgS", RMeBX, eAX, XX, XX },
708 { "xchgS", RMeSP, eAX, XX, XX },
709 { "xchgS", RMeBP, eAX, XX, XX },
710 { "xchgS", RMeSI, eAX, XX, XX },
711 { "xchgS", RMeDI, eAX, XX, XX },
252b5132 712 /* 98 */
a35ca55a
JB		 713 { "cW{t||t|}R", XX, XX, XX, XX },
714 { "cR{t||t|}O", XX, XX, XX, XX },
050dfa73
MM		 715 { "Jcall{T|}", Ap, XX, XX, XX },
716 { "(bad)", XX, XX, XX, XX }, /* fwait */
717 { "pushfT", XX, XX, XX, XX },
718 { "popfT", XX, XX, XX, XX },
719 { "sahf{|}", XX, XX, XX, XX },
720 { "lahf{|}", XX, XX, XX, XX },
252b5132 721 /* a0 */
050dfa73
MM		 722 { "movB", AL, Ob, XX, XX },
723 { "movS", eAX, Ov, XX, XX },
724 { "movB", Ob, AL, XX, XX },
725 { "movS", Ov, eAX, XX, XX },
726 { "movs{b||b|}", Ybr, Xb, XX, XX },
727 { "movs{R||R|}", Yvr, Xv, XX, XX },
728 { "cmps{b||b|}", Xb, Yb, XX, XX },
729 { "cmps{R||R|}", Xv, Yv, XX, XX },
252b5132 730 /* a8 */
050dfa73
MM		 731 { "testB", AL, Ib, XX, XX },
732 { "testS", eAX, Iv, XX, XX },
733 { "stosB", Ybr, AL, XX, XX },
734 { "stosS", Yvr, eAX, XX, XX },
735 { "lodsB", ALr, Xb, XX, XX },
736 { "lodsS", eAXr, Xv, XX, XX },
737 { "scasB", AL, Yb, XX, XX },
738 { "scasS", eAX, Yv, XX, XX },
252b5132 739 /* b0 */
050dfa73
MM		 740 { "movB", RMAL, Ib, XX, XX },
741 { "movB", RMCL, Ib, XX, XX },
742 { "movB", RMDL, Ib, XX, XX },
743 { "movB", RMBL, Ib, XX, XX },
744 { "movB", RMAH, Ib, XX, XX },
745 { "movB", RMCH, Ib, XX, XX },
746 { "movB", RMDH, Ib, XX, XX },
747 { "movB", RMBH, Ib, XX, XX },
252b5132 748 /* b8 */
050dfa73
MM		 749 { "movS", RMeAX, Iv64, XX, XX },
750 { "movS", RMeCX, Iv64, XX, XX },
751 { "movS", RMeDX, Iv64, XX, XX },
752 { "movS", RMeBX, Iv64, XX, XX },
753 { "movS", RMeSP, Iv64, XX, XX },
754 { "movS", RMeBP, Iv64, XX, XX },
755 { "movS", RMeSI, Iv64, XX, XX },
756 { "movS", RMeDI, Iv64, XX, XX },
252b5132
RH		 757 /* c0 */
758 { GRP2b },
759 { GRP2S },
050dfa73
MM		 760 { "retT", Iw, XX, XX, XX },
761 { "retT", XX, XX, XX, XX },
762 { "les{S|}", Gv, Mp, XX, XX },
763 { "ldsS", Gv, Mp, XX, XX },
a6bd098c
L		 764 { GRP11_C6 },
765 { GRP11_C7 },
252b5132 766 /* c8 */
050dfa73
MM		 767 { "enterT", Iw, Ib, XX, XX },
768 { "leaveT", XX, XX, XX, XX },
769 { "lretP", Iw, XX, XX, XX },
770 { "lretP", XX, XX, XX, XX },
771 { "int3", XX, XX, XX, XX },
772 { "int", Ib, XX, XX, XX },
773 { "into{|}", XX, XX, XX, XX },
774 { "iretP", XX, XX, XX, XX },
252b5132
RH		 775 /* d0 */
776 { GRP2b_one },
777 { GRP2S_one },
778 { GRP2b_cl },
779 { GRP2S_cl },
050dfa73
MM		 780 { "aam{|}", sIb, XX, XX, XX },
781 { "aad{|}", sIb, XX, XX, XX },
782 { "(bad)", XX, XX, XX, XX },
783 { "xlat", DSBX, XX, XX, XX },
252b5132
RH		 784 /* d8 */
785 { FLOAT },
786 { FLOAT },
787 { FLOAT },
788 { FLOAT },
789 { FLOAT },
790 { FLOAT },
791 { FLOAT },
792 { FLOAT },
793 /* e0 */
050dfa73
MM		 794 { "loopneFH", Jb, XX, loop_jcxz_flag, XX },
795 { "loopeFH", Jb, XX, loop_jcxz_flag, XX },
796 { "loopFH", Jb, XX, loop_jcxz_flag, XX },
797 { "jEcxzH", Jb, XX, loop_jcxz_flag, XX },
798 { "inB", AL, Ib, XX, XX },
52fd6d94 799 { "inG", zAX, Ib, XX, XX },
050dfa73 800 { "outB", Ib, AL, XX, XX },
52fd6d94 801 { "outG", Ib, zAX, XX, XX },
252b5132 802 /* e8 */
050dfa73
MM		 803 { "callT", Jv, XX, XX, XX },
804 { "jmpT", Jv, XX, XX, XX },
805 { "Jjmp{T|}", Ap, XX, XX, XX },
806 { "jmp", Jb, XX, XX, XX },
807 { "inB", AL, indirDX, XX, XX },
52fd6d94 808 { "inG", zAX, indirDX, XX, XX },
050dfa73 809 { "outB", indirDX, AL, XX, XX },
52fd6d94 810 { "outG", indirDX, zAX, XX, XX },
252b5132 811 /* f0 */
050dfa73
MM		 812 { "(bad)", XX, XX, XX, XX }, /* lock prefix */
813 { "icebp", XX, XX, XX, XX },
814 { "(bad)", XX, XX, XX, XX }, /* repne */
815 { "(bad)", XX, XX, XX, XX }, /* repz */
816 { "hlt", XX, XX, XX, XX },
817 { "cmc", XX, XX, XX, XX },
252b5132
RH		 818 { GRP3b },
819 { GRP3S },
820 /* f8 */
050dfa73
MM		 821 { "clc", XX, XX, XX, XX },
822 { "stc", XX, XX, XX, XX },
823 { "cli", XX, XX, XX, XX },
824 { "sti", XX, XX, XX, XX },
825 { "cld", XX, XX, XX, XX },
826 { "std", XX, XX, XX, XX },
252b5132
RH		 827 { GRP4 },
828 { GRP5 },
829};
830
6439fc28 831static const struct dis386 dis386_twobyte[] = {
252b5132
RH		 832 /* 00 */
833 { GRP6 },
834 { GRP7 },
050dfa73
MM		 835 { "larS", Gv, Ew, XX, XX },
836 { "lslS", Gv, Ew, XX, XX },
837 { "(bad)", XX, XX, XX, XX },
838 { "syscall", XX, XX, XX, XX },
839 { "clts", XX, XX, XX, XX },
840 { "sysretP", XX, XX, XX, XX },
252b5132 841 /* 08 */
7f4c972f 842 { "invd", XX, XX, XX, XX },
050dfa73
MM		 843 { "wbinvd", XX, XX, XX, XX },
844 { "(bad)", XX, XX, XX, XX },
845 { "ud2a", XX, XX, XX, XX },
846 { "(bad)", XX, XX, XX, XX },
c608c12e 847 { GRPAMD },
050dfa73
MM		 848 { "femms", XX, XX, XX, XX },
849 { "", MX, EM, OPSUF, XX }, /* See OP_3DNowSuffix. */
252b5132 850 /* 10 */
c608c12e
AM		 851 { PREGRP8 },
852 { PREGRP9 },
ca164297 853 { PREGRP30 },
050dfa73
MM		 854 { "movlpX", EX, XM, SIMD_Fixup, 'h', XX },
855 { "unpcklpX", XM, EX, XX, XX },
856 { "unpckhpX", XM, EX, XX, XX },
ca164297 857 { PREGRP31 },
050dfa73 858 { "movhpX", EX, XM, SIMD_Fixup, 'l', XX },
252b5132 859 /* 18 */
b3882df9 860 { GRP16 },
050dfa73
MM		 861 { "(bad)", XX, XX, XX, XX },
862 { "(bad)", XX, XX, XX, XX },
863 { "(bad)", XX, XX, XX, XX },
864 { "(bad)", XX, XX, XX, XX },
865 { "(bad)", XX, XX, XX, XX },
866 { "(bad)", XX, XX, XX, XX },
867 { "nopQ", Ev, XX, XX, XX },
252b5132 868 /* 20 */
050dfa73
MM		 869 { "movZ", Rm, Cm, XX, XX },
870 { "movZ", Rm, Dm, XX, XX },
871 { "movZ", Cm, Rm, XX, XX },
872 { "movZ", Dm, Rm, XX, XX },
873 { "movL", Rd, Td, XX, XX },
874 { "(bad)", XX, XX, XX, XX },
875 { "movL", Td, Rd, XX, XX },
876 { "(bad)", XX, XX, XX, XX },
252b5132 877 /* 28 */
050dfa73
MM		 878 { "movapX", XM, EX, XX, XX },
879 { "movapX", EX, XM, XX, XX },
c608c12e 880 { PREGRP2 },
050dfa73 881 { PREGRP33 },
2da11e11 882 { PREGRP4 },
c608c12e 883 { PREGRP3 },
050dfa73
MM		 884 { "ucomisX", XM,EX, XX, XX },
885 { "comisX", XM,EX, XX, XX },
252b5132 886 /* 30 */
050dfa73
MM		 887 { "wrmsr", XX, XX, XX, XX },
888 { "rdtsc", XX, XX, XX, XX },
889 { "rdmsr", XX, XX, XX, XX },
890 { "rdpmc", XX, XX, XX, XX },
891 { "sysenter", XX, XX, XX, XX },
892 { "sysexit", XX, XX, XX, XX },
893 { "(bad)", XX, XX, XX, XX },
894 { "(bad)", XX, XX, XX, XX },
252b5132 895 /* 38 */
331d2d0d 896 { THREE_BYTE_0 },
050dfa73 897 { "(bad)", XX, XX, XX, XX },
331d2d0d 898 { THREE_BYTE_1 },
050dfa73
MM		 899 { "(bad)", XX, XX, XX, XX },
900 { "(bad)", XX, XX, XX, XX },
901 { "(bad)", XX, XX, XX, XX },
902 { "(bad)", XX, XX, XX, XX },
903 { "(bad)", XX, XX, XX, XX },
252b5132 904 /* 40 */
050dfa73
MM		 905 { "cmovo", Gv, Ev, XX, XX },
906 { "cmovno", Gv, Ev, XX, XX },
907 { "cmovb", Gv, Ev, XX, XX },
908 { "cmovae", Gv, Ev, XX, XX },
909 { "cmove", Gv, Ev, XX, XX },
910 { "cmovne", Gv, Ev, XX, XX },
911 { "cmovbe", Gv, Ev, XX, XX },
912 { "cmova", Gv, Ev, XX, XX },
252b5132 913 /* 48 */
050dfa73
MM		 914 { "cmovs", Gv, Ev, XX, XX },
915 { "cmovns", Gv, Ev, XX, XX },
916 { "cmovp", Gv, Ev, XX, XX },
917 { "cmovnp", Gv, Ev, XX, XX },
918 { "cmovl", Gv, Ev, XX, XX },
919 { "cmovge", Gv, Ev, XX, XX },
920 { "cmovle", Gv, Ev, XX, XX },
921 { "cmovg", Gv, Ev, XX, XX },
252b5132 922 /* 50 */
050dfa73 923 { "movmskpX", Gdq, XS, XX, XX },
c608c12e
AM		 924 { PREGRP13 },
925 { PREGRP12 },
926 { PREGRP11 },
050dfa73
MM		 927 { "andpX", XM, EX, XX, XX },
928 { "andnpX", XM, EX, XX, XX },
929 { "orpX", XM, EX, XX, XX },
930 { "xorpX", XM, EX, XX, XX },
252b5132 931 /* 58 */
c608c12e
AM		 932 { PREGRP0 },
933 { PREGRP10 },
041bd2e0
JH		 934 { PREGRP17 },
935 { PREGRP16 },
c608c12e
AM		 936 { PREGRP14 },
937 { PREGRP7 },
938 { PREGRP5 },
2da11e11 939 { PREGRP6 },
252b5132 940 /* 60 */
050dfa73
MM		 941 { "punpcklbw", MX, EM, XX, XX },
942 { "punpcklwd", MX, EM, XX, XX },
943 { "punpckldq", MX, EM, XX, XX },
944 { "packsswb", MX, EM, XX, XX },
945 { "pcmpgtb", MX, EM, XX, XX },
946 { "pcmpgtw", MX, EM, XX, XX },
947 { "pcmpgtd", MX, EM, XX, XX },
948 { "packuswb", MX, EM, XX, XX },
252b5132 949 /* 68 */
050dfa73
MM		 950 { "punpckhbw", MX, EM, XX, XX },
951 { "punpckhwd", MX, EM, XX, XX },
952 { "punpckhdq", MX, EM, XX, XX },
953 { "packssdw", MX, EM, XX, XX },
0f17484f 954 { PREGRP26 },
041bd2e0 955 { PREGRP24 },
050dfa73 956 { "movd", MX, Edq, XX, XX },
041bd2e0 957 { PREGRP19 },
252b5132 958 /* 70 */
041bd2e0 959 { PREGRP22 },
252b5132 960 { GRP12 },
b3882df9
L		 961 { GRP13 },
962 { GRP14 },
050dfa73
MM		 963 { "pcmpeqb", MX, EM, XX, XX },
964 { "pcmpeqw", MX, EM, XX, XX },
965 { "pcmpeqd", MX, EM, XX, XX },
966 { "emms", XX, XX, XX, XX },
252b5132 967 /* 78 */
050dfa73
MM		 968 { PREGRP34 },
969 { PREGRP35 },
970 { "(bad)", XX, XX, XX, XX },
971 { "(bad)", XX, XX, XX, XX },
ca164297
L		 972 { PREGRP28 },
973 { PREGRP29 },
041bd2e0
JH		 974 { PREGRP23 },
975 { PREGRP20 },
252b5132 976 /* 80 */
050dfa73
MM		 977 { "joH", Jv, XX, cond_jump_flag, XX },
978 { "jnoH", Jv, XX, cond_jump_flag, XX },
979 { "jbH", Jv, XX, cond_jump_flag, XX },
980 { "jaeH", Jv, XX, cond_jump_flag, XX },
981 { "jeH", Jv, XX, cond_jump_flag, XX },
982 { "jneH", Jv, XX, cond_jump_flag, XX },
983 { "jbeH", Jv, XX, cond_jump_flag, XX },
984 { "jaH", Jv, XX, cond_jump_flag, XX },
252b5132 985 /* 88 */
050dfa73
MM		 986 { "jsH", Jv, XX, cond_jump_flag, XX },
987 { "jnsH", Jv, XX, cond_jump_flag, XX },
988 { "jpH", Jv, XX, cond_jump_flag, XX },
989 { "jnpH", Jv, XX, cond_jump_flag, XX },
990 { "jlH", Jv, XX, cond_jump_flag, XX },
991 { "jgeH", Jv, XX, cond_jump_flag, XX },
992 { "jleH", Jv, XX, cond_jump_flag, XX },
993 { "jgH", Jv, XX, cond_jump_flag, XX },
252b5132 994 /* 90 */
050dfa73
MM		 995 { "seto", Eb, XX, XX, XX },
996 { "setno", Eb, XX, XX, XX },
997 { "setb", Eb, XX, XX, XX },
998 { "setae", Eb, XX, XX, XX },
999 { "sete", Eb, XX, XX, XX },
1000 { "setne", Eb, XX, XX, XX },
1001 { "setbe", Eb, XX, XX, XX },
1002 { "seta", Eb, XX, XX, XX },
252b5132 1003 /* 98 */
050dfa73
MM		 1004 { "sets", Eb, XX, XX, XX },
1005 { "setns", Eb, XX, XX, XX },
1006 { "setp", Eb, XX, XX, XX },
1007 { "setnp", Eb, XX, XX, XX },
1008 { "setl", Eb, XX, XX, XX },
1009 { "setge", Eb, XX, XX, XX },
1010 { "setle", Eb, XX, XX, XX },
1011 { "setg", Eb, XX, XX, XX },
252b5132 1012 /* a0 */
050dfa73
MM		 1013 { "pushT", fs, XX, XX, XX },
1014 { "popT", fs, XX, XX, XX },
1015 { "cpuid", XX, XX, XX, XX },
1016 { "btS", Ev, Gv, XX, XX },
1017 { "shldS", Ev, Gv, Ib, XX },
1018 { "shldS", Ev, Gv, CL, XX },
30d1c836
ML		 1019 { GRPPADLCK2 },
1020 { GRPPADLCK1 },
252b5132 1021 /* a8 */
050dfa73
MM		 1022 { "pushT", gs, XX, XX, XX },
1023 { "popT", gs, XX, XX, XX },
1024 { "rsm", XX, XX, XX, XX },
1025 { "btsS", Ev, Gv, XX, XX },
1026 { "shrdS", Ev, Gv, Ib, XX },
1027 { "shrdS", Ev, Gv, CL, XX },
b3882df9 1028 { GRP15 },
050dfa73 1029 { "imulS", Gv, Ev, XX, XX },
252b5132 1030 /* b0 */
050dfa73
MM		 1031 { "cmpxchgB", Eb, Gb, XX, XX },
1032 { "cmpxchgS", Ev, Gv, XX, XX },
1033 { "lssS", Gv, Mp, XX, XX },
1034 { "btrS", Ev, Gv, XX, XX },
1035 { "lfsS", Gv, Mp, XX, XX },
1036 { "lgsS", Gv, Mp, XX, XX },
1037 { "movz{bR|x|bR|x}", Gv, Eb, XX, XX },
1038 { "movz{wR|x|wR|x}", Gv, Ew, XX, XX }, /* yes, there really is movzww ! */
252b5132 1039 /* b8 */
7918206c 1040 { PREGRP37 },
050dfa73 1041 { "ud2b", XX, XX, XX, XX },
252b5132 1042 { GRP8 },
050dfa73
MM		 1043 { "btcS", Ev, Gv, XX, XX },
1044 { "bsfS", Gv, Ev, XX, XX },
1045 { PREGRP36 },
1046 { "movs{bR|x|bR|x}", Gv, Eb, XX, XX },
1047 { "movs{wR|x|wR|x}", Gv, Ew, XX, XX }, /* yes, there really is movsww ! */
252b5132 1048 /* c0 */
050dfa73
MM		 1049 { "xaddB", Eb, Gb, XX, XX },
1050 { "xaddS", Ev, Gv, XX, XX },
c608c12e 1051 { PREGRP1 },
050dfa73
MM		 1052 { "movntiS", Ev, Gv, XX, XX },
1053 { "pinsrw", MX, Edqw, Ib, XX },
1054 { "pextrw", Gdq, MS, Ib, XX },
1055 { "shufpX", XM, EX, Ib, XX },
252b5132
RH		 1056 { GRP9 },
1057 /* c8 */
050dfa73
MM		 1058 { "bswap", RMeAX, XX, XX, XX },
1059 { "bswap", RMeCX, XX, XX, XX },
1060 { "bswap", RMeDX, XX, XX, XX },
1061 { "bswap", RMeBX, XX, XX, XX },
1062 { "bswap", RMeSP, XX, XX, XX },
1063 { "bswap", RMeBP, XX, XX, XX },
1064 { "bswap", RMeSI, XX, XX, XX },
1065 { "bswap", RMeDI, XX, XX, XX },
252b5132 1066 /* d0 */
ca164297 1067 { PREGRP27 },
050dfa73
MM		 1068 { "psrlw", MX, EM, XX, XX },
1069 { "psrld", MX, EM, XX, XX },
1070 { "psrlq", MX, EM, XX, XX },
1071 { "paddq", MX, EM, XX, XX },
1072 { "pmullw", MX, EM, XX, XX },
041bd2e0 1073 { PREGRP21 },
050dfa73 1074 { "pmovmskb", Gdq, MS, XX, XX },
252b5132 1075 /* d8 */
050dfa73
MM		 1076 { "psubusb", MX, EM, XX, XX },
1077 { "psubusw", MX, EM, XX, XX },
1078 { "pminub", MX, EM, XX, XX },
1079 { "pand", MX, EM, XX, XX },
1080 { "paddusb", MX, EM, XX, XX },
1081 { "paddusw", MX, EM, XX, XX },
1082 { "pmaxub", MX, EM, XX, XX },
1083 { "pandn", MX, EM, XX, XX },
252b5132 1084 /* e0 */
050dfa73
MM		 1085 { "pavgb", MX, EM, XX, XX },
1086 { "psraw", MX, EM, XX, XX },
1087 { "psrad", MX, EM, XX, XX },
1088 { "pavgw", MX, EM, XX, XX },
1089 { "pmulhuw", MX, EM, XX, XX },
1090 { "pmulhw", MX, EM, XX, XX },
041bd2e0 1091 { PREGRP15 },
0f17484f 1092 { PREGRP25 },
252b5132 1093 /* e8 */
050dfa73
MM		 1094 { "psubsb", MX, EM, XX, XX },
1095 { "psubsw", MX, EM, XX, XX },
1096 { "pminsw", MX, EM, XX, XX },
1097 { "por", MX, EM, XX, XX },
1098 { "paddsb", MX, EM, XX, XX },
1099 { "paddsw", MX, EM, XX, XX },
1100 { "pmaxsw", MX, EM, XX, XX },
1101 { "pxor", MX, EM, XX, XX },
252b5132 1102 /* f0 */
ca164297 1103 { PREGRP32 },
050dfa73
MM		 1104 { "psllw", MX, EM, XX, XX },
1105 { "pslld", MX, EM, XX, XX },
1106 { "psllq", MX, EM, XX, XX },
1107 { "pmuludq", MX, EM, XX, XX },
1108 { "pmaddwd", MX, EM, XX, XX },
1109 { "psadbw", MX, EM, XX, XX },
041bd2e0 1110 { PREGRP18 },
252b5132 1111 /* f8 */
050dfa73
MM		 1112 { "psubb", MX, EM, XX, XX },
1113 { "psubw", MX, EM, XX, XX },
1114 { "psubd", MX, EM, XX, XX },
1115 { "psubq", MX, EM, XX, XX },
1116 { "paddb", MX, EM, XX, XX },
1117 { "paddw", MX, EM, XX, XX },
1118 { "paddd", MX, EM, XX, XX },
1119 { "(bad)", XX, XX, XX, XX }
252b5132
RH		 1120};
1121
1122static const unsigned char onebyte_has_modrm[256] = {
c608c12e
AM		 1123 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1124 /* ------------------------------- */
1125 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1126 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1127 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1128 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1129 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1130 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1131 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1132 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1133 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1134 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1135 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1136 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1137 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1138 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1139 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1140 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1141 /* ------------------------------- */
1142 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1143};
1144
1145static const unsigned char twobyte_has_modrm[256] = {
c608c12e
AM		 1146 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1147 /* ------------------------------- */
252b5132 1148 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
15965411 1149 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
4bba6815 1150 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
331d2d0d 1151 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
252b5132 1152 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
4bba6815
AM		 1153 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1154 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
90700ea2 1155 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
252b5132
RH		 1156 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1157 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
30d1c836 1158 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
050dfa73 1159 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
252b5132 1160 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
ca164297 1161 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
4bba6815 1162 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
ca164297 1163 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
c608c12e
AM		 1164 /* ------------------------------- */
1165 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1166};
1167
eec0f4ca 1168static const unsigned char twobyte_uses_DATA_prefix[256] = {
c608c12e
AM		 1169 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1170 /* ------------------------------- */
1171 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
ca164297 1172 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
050dfa73 1173 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
331d2d0d 1174 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
c608c12e 1175 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
041bd2e0
JH		 1176 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1177 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
050dfa73 1178 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
c608c12e
AM		 1179 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1180 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1181 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1182 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1183 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
ca164297 1184 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
041bd2e0 1185 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
ca164297 1186 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
c608c12e
AM		 1187 /* ------------------------------- */
1188 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1189};
1190
eec0f4ca
L		 1191static const unsigned char twobyte_uses_REPNZ_prefix[256] = {
1192 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1193 /* ------------------------------- */
1194 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1195 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1196 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1197 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1198 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1199 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1200 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1201 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1202 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1203 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1204 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1205 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1206 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1207 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1208 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1209 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1210 /* ------------------------------- */
1211 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1212};
1213
1214static const unsigned char twobyte_uses_REPZ_prefix[256] = {
1215 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1216 /* ------------------------------- */
1217 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1218 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1219 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1220 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1221 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1222 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1223 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1224 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1225 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1226 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1227 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1228 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1229 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1230 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1231 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1232 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1233 /* ------------------------------- */
1234 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1235};
1236
1237/* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1238static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
1239 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1240 /* ------------------------------- */
1241 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1242 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,0, /* 1f */
1243 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1244 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1245 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1246 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1247 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1248 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1249 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1250 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1251 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1252 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1253 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1254 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1255 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1256 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1257 /* ------------------------------- */
1258 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1259};
1260
1261/* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1262static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = {
1263 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1264 /* ------------------------------- */
1265 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1266 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1267 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1268 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1269 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1270 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1271 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1272 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1273 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1274 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1275 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1276 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1277 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1278 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1279 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1280 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1281 /* ------------------------------- */
1282 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1283};
1284
1285/* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1286static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = {
1287 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1288 /* ------------------------------- */
1289 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1290 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1291 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1292 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1293 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1294 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1295 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1296 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1297 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1298 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1299 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1300 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1301 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1302 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1303 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1304 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1305 /* ------------------------------- */
1306 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1307};
1308
1309/* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1310static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
1311 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1312 /* ------------------------------- */
1313 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 0f */
1314 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1315 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1316 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1317 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1318 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1319 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1320 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1321 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1322 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1323 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1324 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1325 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1326 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1327 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1328 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1329 /* ------------------------------- */
1330 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1331};
1332
1333/* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1334static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = {
1335 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1336 /* ------------------------------- */
1337 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1338 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1339 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1340 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1341 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1342 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1343 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1344 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1345 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1346 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1347 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1348 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1349 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1350 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1351 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1352 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1353 /* ------------------------------- */
1354 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1355};
1356
1357/* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1358static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = {
1359 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1360 /* ------------------------------- */
1361 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1362 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1363 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1364 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1365 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1366 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1367 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1368 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1369 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1370 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1371 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1372 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1373 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1374 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1375 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1376 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1377 /* ------------------------------- */
1378 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1379};
1380
252b5132
RH		 1381static char obuf[100];
1382static char *obufp;
1383static char scratchbuf[100];
1384static unsigned char *start_codep;
1385static unsigned char *insn_codep;
1386static unsigned char *codep;
1387static disassemble_info *the_info;
1388static int mod;
1389static int rm;
1390static int reg;
4bba6815 1391static unsigned char need_modrm;
252b5132 1392
4bba6815
AM		 1393/* If we are accessing mod/rm/reg without need_modrm set, then the
1394 values are stale. Hitting this abort likely indicates that you
1395 need to update onebyte_has_modrm or twobyte_has_modrm. */
1396#define MODRM_CHECK if (!need_modrm) abort ()
1397
d708bcba
AM		 1398static const char **names64;
1399static const char **names32;
1400static const char **names16;
1401static const char **names8;
1402static const char **names8rex;
1403static const char **names_seg;
1404static const char **index16;
1405
1406static const char *intel_names64[] = {
1407 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1408 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1409};
1410static const char *intel_names32[] = {
1411 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1412 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1413};
1414static const char *intel_names16[] = {
1415 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1416 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1417};
1418static const char *intel_names8[] = {
1419 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1420};
1421static const char *intel_names8rex[] = {
1422 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1423 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1424};
1425static const char *intel_names_seg[] = {
1426 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1427};
1428static const char *intel_index16[] = {
1429 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1430};
1431
1432static const char *att_names64[] = {
1433 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
52b15da3
JH		 1434 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1435};
d708bcba
AM		 1436static const char *att_names32[] = {
1437 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
52b15da3 1438 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
252b5132 1439};
d708bcba
AM		 1440static const char *att_names16[] = {
1441 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
52b15da3 1442 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
252b5132 1443};
d708bcba
AM		 1444static const char *att_names8[] = {
1445 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
252b5132 1446};
d708bcba
AM		 1447static const char *att_names8rex[] = {
1448 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
52b15da3
JH		 1449 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1450};
d708bcba
AM		 1451static const char *att_names_seg[] = {
1452 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
252b5132 1453};
d708bcba
AM		 1454static const char *att_index16[] = {
1455 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
252b5132
RH		 1456};
1457
2da11e11 1458static const struct dis386 grps[][8] = {
252b5132
RH		 1459 /* GRP1b */
1460 {
050dfa73
MM		 1461 { "addA", Eb, Ib, XX, XX },
1462 { "orA", Eb, Ib, XX, XX },
1463 { "adcA", Eb, Ib, XX, XX },
1464 { "sbbA", Eb, Ib, XX, XX },
1465 { "andA", Eb, Ib, XX, XX },
1466 { "subA", Eb, Ib, XX, XX },
1467 { "xorA", Eb, Ib, XX, XX },
1468 { "cmpA", Eb, Ib, XX, XX }
252b5132
RH		 1469 },
1470 /* GRP1S */
1471 {
050dfa73
MM		 1472 { "addQ", Ev, Iv, XX, XX },
1473 { "orQ", Ev, Iv, XX, XX },
1474 { "adcQ", Ev, Iv, XX, XX },
1475 { "sbbQ", Ev, Iv, XX, XX },
1476 { "andQ", Ev, Iv, XX, XX },
1477 { "subQ", Ev, Iv, XX, XX },
1478 { "xorQ", Ev, Iv, XX, XX },
1479 { "cmpQ", Ev, Iv, XX, XX }
252b5132
RH		 1480 },
1481 /* GRP1Ss */
1482 {
050dfa73
MM		 1483 { "addQ", Ev, sIb, XX, XX },
1484 { "orQ", Ev, sIb, XX, XX },
1485 { "adcQ", Ev, sIb, XX, XX },
1486 { "sbbQ", Ev, sIb, XX, XX },
1487 { "andQ", Ev, sIb, XX, XX },
1488 { "subQ", Ev, sIb, XX, XX },
1489 { "xorQ", Ev, sIb, XX, XX },
1490 { "cmpQ", Ev, sIb, XX, XX }
252b5132
RH		 1491 },
1492 /* GRP2b */
1493 {
050dfa73
MM		 1494 { "rolA", Eb, Ib, XX, XX },
1495 { "rorA", Eb, Ib, XX, XX },
1496 { "rclA", Eb, Ib, XX, XX },
1497 { "rcrA", Eb, Ib, XX, XX },
1498 { "shlA", Eb, Ib, XX, XX },
1499 { "shrA", Eb, Ib, XX, XX },
1500 { "(bad)", XX, XX, XX, XX },
1501 { "sarA", Eb, Ib, XX, XX },
252b5132
RH		 1502 },
1503 /* GRP2S */
1504 {
050dfa73
MM		 1505 { "rolQ", Ev, Ib, XX, XX },
1506 { "rorQ", Ev, Ib, XX, XX },
1507 { "rclQ", Ev, Ib, XX, XX },
1508 { "rcrQ", Ev, Ib, XX, XX },
1509 { "shlQ", Ev, Ib, XX, XX },
1510 { "shrQ", Ev, Ib, XX, XX },
1511 { "(bad)", XX, XX, XX, XX },
1512 { "sarQ", Ev, Ib, XX, XX },
252b5132
RH		 1513 },
1514 /* GRP2b_one */
1515 {
050dfa73
MM		 1516 { "rolA", Eb, I1, XX, XX },
1517 { "rorA", Eb, I1, XX, XX },
1518 { "rclA", Eb, I1, XX, XX },
1519 { "rcrA", Eb, I1, XX, XX },
1520 { "shlA", Eb, I1, XX, XX },
1521 { "shrA", Eb, I1, XX, XX },
1522 { "(bad)", XX, XX, XX, XX },
1523 { "sarA", Eb, I1, XX, XX },
252b5132
RH		 1524 },
1525 /* GRP2S_one */
1526 {
050dfa73
MM		 1527 { "rolQ", Ev, I1, XX, XX },
1528 { "rorQ", Ev, I1, XX, XX },
1529 { "rclQ", Ev, I1, XX, XX },
1530 { "rcrQ", Ev, I1, XX, XX },
1531 { "shlQ", Ev, I1, XX, XX },
1532 { "shrQ", Ev, I1, XX, XX },
1533 { "(bad)", XX, XX, XX, XX },
1534 { "sarQ", Ev, I1, XX, XX },
252b5132
RH		 1535 },
1536 /* GRP2b_cl */
1537 {
050dfa73
MM		 1538 { "rolA", Eb, CL, XX, XX },
1539 { "rorA", Eb, CL, XX, XX },
1540 { "rclA", Eb, CL, XX, XX },
1541 { "rcrA", Eb, CL, XX, XX },
1542 { "shlA", Eb, CL, XX, XX },
1543 { "shrA", Eb, CL, XX, XX },
1544 { "(bad)", XX, XX, XX, XX },
1545 { "sarA", Eb, CL, XX, XX },
252b5132
RH		 1546 },
1547 /* GRP2S_cl */
1548 {
050dfa73
MM		 1549 { "rolQ", Ev, CL, XX, XX },
1550 { "rorQ", Ev, CL, XX, XX },
1551 { "rclQ", Ev, CL, XX, XX },
1552 { "rcrQ", Ev, CL, XX, XX },
1553 { "shlQ", Ev, CL, XX, XX },
1554 { "shrQ", Ev, CL, XX, XX },
1555 { "(bad)", XX, XX, XX, XX },
1556 { "sarQ", Ev, CL, XX, XX }
252b5132
RH		 1557 },
1558 /* GRP3b */
1559 {
050dfa73
MM		 1560 { "testA", Eb, Ib, XX, XX },
1561 { "(bad)", Eb, XX, XX, XX },
1562 { "notA", Eb, XX, XX, XX },
1563 { "negA", Eb, XX, XX, XX },
1564 { "mulA", Eb, XX, XX, XX }, /* Don't print the implicit %al register, */
1565 { "imulA", Eb, XX, XX, XX }, /* to distinguish these opcodes from other */
1566 { "divA", Eb, XX, XX, XX }, /* mul/imul opcodes. Do the same for div */
1567 { "idivA", Eb, XX, XX, XX } /* and idiv for consistency. */
252b5132
RH		 1568 },
1569 /* GRP3S */
1570 {
050dfa73
MM		 1571 { "testQ", Ev, Iv, XX, XX },
1572 { "(bad)", XX, XX, XX, XX },
1573 { "notQ", Ev, XX, XX, XX },
1574 { "negQ", Ev, XX, XX, XX },
1575 { "mulQ", Ev, XX, XX, XX }, /* Don't print the implicit register. */
1576 { "imulQ", Ev, XX, XX, XX },
1577 { "divQ", Ev, XX, XX, XX },
1578 { "idivQ", Ev, XX, XX, XX },
252b5132
RH		 1579 },
1580 /* GRP4 */
1581 {
050dfa73
MM		 1582 { "incA", Eb, XX, XX, XX },
1583 { "decA", Eb, XX, XX, XX },
1584 { "(bad)", XX, XX, XX, XX },
1585 { "(bad)", XX, XX, XX, XX },
1586 { "(bad)", XX, XX, XX, XX },
1587 { "(bad)", XX, XX, XX, XX },
1588 { "(bad)", XX, XX, XX, XX },
1589 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 1590 },
1591 /* GRP5 */
1592 {
050dfa73
MM		 1593 { "incQ", Ev, XX, XX, XX },
1594 { "decQ", Ev, XX, XX, XX },
1595 { "callT", indirEv, XX, XX, XX },
1596 { "JcallT", indirEp, XX, XX, XX },
1597 { "jmpT", indirEv, XX, XX, XX },
1598 { "JjmpT", indirEp, XX, XX, XX },
1599 { "pushU", stackEv, XX, XX, XX },
1600 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 1601 },
1602 /* GRP6 */
1603 {
ed7841b3
JB		 1604 { "sldtD", Sv, XX, XX, XX },
1605 { "strD", Sv, XX, XX, XX },
050dfa73
MM		 1606 { "lldt", Ew, XX, XX, XX },
1607 { "ltr", Ew, XX, XX, XX },
1608 { "verr", Ew, XX, XX, XX },
1609 { "verw", Ew, XX, XX, XX },
1610 { "(bad)", XX, XX, XX, XX },
1611 { "(bad)", XX, XX, XX, XX }
252b5132
RH		 1612 },
1613 /* GRP7 */
1614 {
050dfa73
MM		 1615 { "sgdt{Q|IQ||}", VMX_Fixup, 0, XX, XX, XX },
1616 { "sidt{Q|IQ||}", PNI_Fixup, 0, XX, XX, XX },
1617 { "lgdt{Q|Q||}", M, XX, XX, XX },
1618 { "lidt{Q|Q||}", SVME_Fixup, 0, XX, XX, XX },
ed7841b3 1619 { "smswD", Sv, XX, XX, XX },
050dfa73
MM		 1620 { "(bad)", XX, XX, XX, XX },
1621 { "lmsw", Ew, XX, XX, XX },
1622 { "invlpg", INVLPG_Fixup, w_mode, XX, XX, XX },
252b5132
RH		 1623 },
1624 /* GRP8 */
1625 {
050dfa73
MM		 1626 { "(bad)", XX, XX, XX, XX },
1627 { "(bad)", XX, XX, XX, XX },
1628 { "(bad)", XX, XX, XX, XX },
1629 { "(bad)", XX, XX, XX, XX },
1630 { "btQ", Ev, Ib, XX, XX },
1631 { "btsQ", Ev, Ib, XX, XX },
1632 { "btrQ", Ev, Ib, XX, XX },
1633 { "btcQ", Ev, Ib, XX, XX },
252b5132
RH		 1634 },
1635 /* GRP9 */
1636 {
050dfa73
MM		 1637 { "(bad)", XX, XX, XX, XX },
1638 { "cmpxchg8b", Eq, XX, XX, XX },
1639 { "(bad)", XX, XX, XX, XX },
1640 { "(bad)", XX, XX, XX, XX },
1641 { "(bad)", XX, XX, XX, XX },
1642 { "(bad)", XX, XX, XX, XX },
1643 { "", VM, XX, XX, XX }, /* See OP_VMX. */
1644 { "vmptrst", Eq, XX, XX, XX },
252b5132 1645 },
a6bd098c
L		 1646 /* GRP11_C6 */
1647 {
1648 { "movA", Eb, Ib, XX, XX },
1649 { "(bad)", XX, XX, XX, XX },
1650 { "(bad)", XX, XX, XX, XX },
1651 { "(bad)", XX, XX, XX, XX },
1652 { "(bad)", XX, XX, XX, XX },
1653 { "(bad)", XX, XX, XX, XX },
1654 { "(bad)", XX, XX, XX, XX },
1655 { "(bad)", XX, XX, XX, XX },
1656 },
1657 /* GRP11_C7 */
1658 {
1659 { "movQ", Ev, Iv, XX, XX },
1660 { "(bad)", XX, XX, XX, XX },
1661 { "(bad)", XX, XX, XX, XX },
1662 { "(bad)", XX, XX, XX, XX },
1663 { "(bad)", XX, XX, XX, XX },
1664 { "(bad)", XX, XX, XX, XX },
1665 { "(bad)", XX, XX, XX, XX },
1666 { "(bad)", XX, XX, XX, XX },
1667 },
b3882df9 1668 /* GRP12 */
252b5132 1669 {
050dfa73
MM		 1670 { "(bad)", XX, XX, XX, XX },
1671 { "(bad)", XX, XX, XX, XX },
1672 { "psrlw", MS, Ib, XX, XX },
1673 { "(bad)", XX, XX, XX, XX },
1674 { "psraw", MS, Ib, XX, XX },
1675 { "(bad)", XX, XX, XX, XX },
1676 { "psllw", MS, Ib, XX, XX },
1677 { "(bad)", XX, XX, XX, XX },
252b5132 1678 },
b3882df9 1679 /* GRP13 */
252b5132 1680 {
050dfa73
MM		 1681 { "(bad)", XX, XX, XX, XX },
1682 { "(bad)", XX, XX, XX, XX },
1683 { "psrld", MS, Ib, XX, XX },
1684 { "(bad)", XX, XX, XX, XX },
1685 { "psrad", MS, Ib, XX, XX },
1686 { "(bad)", XX, XX, XX, XX },
1687 { "pslld", MS, Ib, XX, XX },
1688 { "(bad)", XX, XX, XX, XX },
252b5132 1689 },
b3882df9 1690 /* GRP14 */
252b5132 1691 {
050dfa73
MM		 1692 { "(bad)", XX, XX, XX, XX },
1693 { "(bad)", XX, XX, XX, XX },
1694 { "psrlq", MS, Ib, XX, XX },
1695 { "psrldq", MS, Ib, XX, XX },
1696 { "(bad)", XX, XX, XX, XX },
1697 { "(bad)", XX, XX, XX, XX },
1698 { "psllq", MS, Ib, XX, XX },
1699 { "pslldq", MS, Ib, XX, XX },
252b5132 1700 },
b3882df9 1701 /* GRP15 */
252b5132 1702 {
050dfa73
MM		 1703 { "fxsave", Ev, XX, XX, XX },
1704 { "fxrstor", Ev, XX, XX, XX },
1705 { "ldmxcsr", Ev, XX, XX, XX },
1706 { "stmxcsr", Ev, XX, XX, XX },
1707 { "(bad)", XX, XX, XX, XX },
1708 { "lfence", OP_0fae, 0, XX, XX, XX },
1709 { "mfence", OP_0fae, 0, XX, XX, XX },
1710 { "clflush", OP_0fae, 0, XX, XX, XX },
c608c12e 1711 },
b3882df9 1712 /* GRP16 */
c608c12e 1713 {
050dfa73
MM		 1714 { "prefetchnta", Ev, XX, XX, XX },
1715 { "prefetcht0", Ev, XX, XX, XX },
1716 { "prefetcht1", Ev, XX, XX, XX },
1717 { "prefetcht2", Ev, XX, XX, XX },
1718 { "(bad)", XX, XX, XX, XX },
1719 { "(bad)", XX, XX, XX, XX },
1720 { "(bad)", XX, XX, XX, XX },
1721 { "(bad)", XX, XX, XX, XX },
252b5132 1722 },
c608c12e 1723 /* GRPAMD */
252b5132 1724 {
050dfa73
MM		 1725 { "prefetch", Eb, XX, XX, XX },
1726 { "prefetchw", Eb, XX, XX, XX },
1727 { "(bad)", XX, XX, XX, XX },
1728 { "(bad)", XX, XX, XX, XX },
1729 { "(bad)", XX, XX, XX, XX },
1730 { "(bad)", XX, XX, XX, XX },
1731 { "(bad)", XX, XX, XX, XX },
1732 { "(bad)", XX, XX, XX, XX },
0f10071e 1733 },
30d1c836 1734 /* GRPPADLCK1 */
cc0ec051 1735 {
050dfa73
MM		 1736 { "xstore-rng", OP_0f07, 0, XX, XX, XX },
1737 { "xcrypt-ecb", OP_0f07, 0, XX, XX, XX },
1738 { "xcrypt-cbc", OP_0f07, 0, XX, XX, XX },
1739 { "xcrypt-ctr", OP_0f07, 0, XX, XX, XX },
1740 { "xcrypt-cfb", OP_0f07, 0, XX, XX, XX },
1741 { "xcrypt-ofb", OP_0f07, 0, XX, XX, XX },
1742 { "(bad)", OP_0f07, 0, XX, XX, XX },
1743 { "(bad)", OP_0f07, 0, XX, XX, XX },
30d1c836
ML		 1744 },
1745 /* GRPPADLCK2 */
1746 {
050dfa73
MM		 1747 { "montmul", OP_0f07, 0, XX, XX, XX },
1748 { "xsha1", OP_0f07, 0, XX, XX, XX },
1749 { "xsha256", OP_0f07, 0, XX, XX, XX },
1750 { "(bad)", OP_0f07, 0, XX, XX, XX },
1751 { "(bad)", OP_0f07, 0, XX, XX, XX },
1752 { "(bad)", OP_0f07, 0, XX, XX, XX },
1753 { "(bad)", OP_0f07, 0, XX, XX, XX },
1754 { "(bad)", OP_0f07, 0, XX, XX, XX },
252b5132 1755 }
252b5132
RH		 1756};
1757
041bd2e0 1758static const struct dis386 prefix_user_table[][4] = {
c608c12e
AM		 1759 /* PREGRP0 */
1760 {
050dfa73
MM		 1761 { "addps", XM, EX, XX, XX },
1762 { "addss", XM, EX, XX, XX },
1763 { "addpd", XM, EX, XX, XX },
1764 { "addsd", XM, EX, XX, XX },
c608c12e
AM		 1765 },
1766 /* PREGRP1 */
1767 {
050dfa73
MM		 1768 { "", XM, EX, OPSIMD, XX }, /* See OP_SIMD_SUFFIX. */
1769 { "", XM, EX, OPSIMD, XX },
1770 { "", XM, EX, OPSIMD, XX },
1771 { "", XM, EX, OPSIMD, XX },
c608c12e
AM		 1772 },
1773 /* PREGRP2 */
1774 {
4d9567e0 1775 { "cvtpi2ps", XM, EMC, XX, XX },
050dfa73 1776 { "cvtsi2ssY", XM, Ev, XX, XX },
4d9567e0 1777 { "cvtpi2pd", XM, EMC, XX, XX },
050dfa73 1778 { "cvtsi2sdY", XM, Ev, XX, XX },
c608c12e
AM		 1779 },
1780 /* PREGRP3 */
1781 {
4d9567e0 1782 { "cvtps2pi", MXC, EX, XX, XX },
050dfa73 1783 { "cvtss2siY", Gv, EX, XX, XX },
4d9567e0 1784 { "cvtpd2pi", MXC, EX, XX, XX },
050dfa73 1785 { "cvtsd2siY", Gv, EX, XX, XX },
c608c12e
AM		 1786 },
1787 /* PREGRP4 */
1788 {
4d9567e0 1789 { "cvttps2pi", MXC, EX, XX, XX },
050dfa73 1790 { "cvttss2siY", Gv, EX, XX, XX },
4d9567e0 1791 { "cvttpd2pi", MXC, EX, XX, XX },
050dfa73 1792 { "cvttsd2siY", Gv, EX, XX, XX },
c608c12e
AM		 1793 },
1794 /* PREGRP5 */
1795 {
050dfa73
MM		 1796 { "divps", XM, EX, XX, XX },
1797 { "divss", XM, EX, XX, XX },
1798 { "divpd", XM, EX, XX, XX },
1799 { "divsd", XM, EX, XX, XX },
c608c12e
AM		 1800 },
1801 /* PREGRP6 */
1802 {
050dfa73
MM		 1803 { "maxps", XM, EX, XX, XX },
1804 { "maxss", XM, EX, XX, XX },
1805 { "maxpd", XM, EX, XX, XX },
1806 { "maxsd", XM, EX, XX, XX },
c608c12e
AM		 1807 },
1808 /* PREGRP7 */
1809 {
050dfa73
MM		 1810 { "minps", XM, EX, XX, XX },
1811 { "minss", XM, EX, XX, XX },
1812 { "minpd", XM, EX, XX, XX },
1813 { "minsd", XM, EX, XX, XX },
c608c12e
AM		 1814 },
1815 /* PREGRP8 */
1816 {
050dfa73
MM		 1817 { "movups", XM, EX, XX, XX },
1818 { "movss", XM, EX, XX, XX },
1819 { "movupd", XM, EX, XX, XX },
1820 { "movsd", XM, EX, XX, XX },
c608c12e
AM		 1821 },
1822 /* PREGRP9 */
1823 {
050dfa73
MM		 1824 { "movups", EX, XM, XX, XX },
1825 { "movss", EX, XM, XX, XX },
1826 { "movupd", EX, XM, XX, XX },
1827 { "movsd", EX, XM, XX, XX },
c608c12e
AM		 1828 },
1829 /* PREGRP10 */
1830 {
050dfa73
MM		 1831 { "mulps", XM, EX, XX, XX },
1832 { "mulss", XM, EX, XX, XX },
1833 { "mulpd", XM, EX, XX, XX },
1834 { "mulsd", XM, EX, XX, XX },
c608c12e
AM		 1835 },
1836 /* PREGRP11 */
1837 {
050dfa73
MM		 1838 { "rcpps", XM, EX, XX, XX },
1839 { "rcpss", XM, EX, XX, XX },
1840 { "(bad)", XM, EX, XX, XX },
1841 { "(bad)", XM, EX, XX, XX },
c608c12e
AM		 1842 },
1843 /* PREGRP12 */
1844 {
050dfa73
MM		 1845 { "rsqrtps", XM, EX, XX, XX },
1846 { "rsqrtss", XM, EX, XX, XX },
1847 { "(bad)", XM, EX, XX, XX },
1848 { "(bad)", XM, EX, XX, XX },
c608c12e
AM		 1849 },
1850 /* PREGRP13 */
1851 {
050dfa73
MM		 1852 { "sqrtps", XM, EX, XX, XX },
1853 { "sqrtss", XM, EX, XX, XX },
1854 { "sqrtpd", XM, EX, XX, XX },
1855 { "sqrtsd", XM, EX, XX, XX },
c608c12e
AM		 1856 },
1857 /* PREGRP14 */
1858 {
050dfa73
MM		 1859 { "subps", XM, EX, XX, XX },
1860 { "subss", XM, EX, XX, XX },
1861 { "subpd", XM, EX, XX, XX },
1862 { "subsd", XM, EX, XX, XX },
041bd2e0
JH		 1863 },
1864 /* PREGRP15 */
1865 {
7f4c972f 1866 { "(bad)", XM, EX, XX, XX },
050dfa73
MM		 1867 { "cvtdq2pd", XM, EX, XX, XX },
1868 { "cvttpd2dq", XM, EX, XX, XX },
1869 { "cvtpd2dq", XM, EX, XX, XX },
041bd2e0
JH		 1870 },
1871 /* PREGRP16 */
1872 {
050dfa73
MM		 1873 { "cvtdq2ps", XM, EX, XX, XX },
1874 { "cvttps2dq",XM, EX, XX, XX },
1875 { "cvtps2dq",XM, EX, XX, XX },
1876 { "(bad)", XM, EX, XX, XX },
041bd2e0
JH		 1877 },
1878 /* PREGRP17 */
1879 {
050dfa73
MM		 1880 { "cvtps2pd", XM, EX, XX, XX },
1881 { "cvtss2sd", XM, EX, XX, XX },
1882 { "cvtpd2ps", XM, EX, XX, XX },
1883 { "cvtsd2ss", XM, EX, XX, XX },
041bd2e0
JH		 1884 },
1885 /* PREGRP18 */
1886 {
050dfa73
MM		 1887 { "maskmovq", MX, MS, XX, XX },
1888 { "(bad)", XM, EX, XX, XX },
c4b5fff9 1889 { "maskmovdqu", XM, XS, XX, XX },
050dfa73 1890 { "(bad)", XM, EX, XX, XX },
041bd2e0
JH		 1891 },
1892 /* PREGRP19 */
1893 {
050dfa73
MM		 1894 { "movq", MX, EM, XX, XX },
1895 { "movdqu", XM, EX, XX, XX },
1896 { "movdqa", XM, EX, XX, XX },
1897 { "(bad)", XM, EX, XX, XX },
041bd2e0
JH		 1898 },
1899 /* PREGRP20 */
1900 {
050dfa73
MM		 1901 { "movq", EM, MX, XX, XX },
1902 { "movdqu", EX, XM, XX, XX },
1903 { "movdqa", EX, XM, XX, XX },
1904 { "(bad)", EX, XM, XX, XX },
041bd2e0
JH		 1905 },
1906 /* PREGRP21 */
1907 {
050dfa73
MM		 1908 { "(bad)", EX, XM, XX, XX },
1909 { "movq2dq", XM, MS, XX, XX },
1910 { "movq", EX, XM, XX, XX },
1911 { "movdq2q", MX, XS, XX, XX },
041bd2e0
JH		 1912 },
1913 /* PREGRP22 */
1914 {
050dfa73
MM		 1915 { "pshufw", MX, EM, Ib, XX },
1916 { "pshufhw", XM, EX, Ib, XX },
1917 { "pshufd", XM, EX, Ib, XX },
7f4c972f 1918 { "pshuflw", XM, EX, Ib, XX },
041bd2e0
JH		 1919 },
1920 /* PREGRP23 */
1921 {
050dfa73
MM		 1922 { "movd", Edq, MX, XX, XX },
1923 { "movq", XM, EX, XX, XX },
1924 { "movd", Edq, XM, XX, XX },
1925 { "(bad)", Ed, XM, XX, XX },
041bd2e0
JH		 1926 },
1927 /* PREGRP24 */
1928 {
050dfa73
MM		 1929 { "(bad)", MX, EX, XX, XX },
1930 { "(bad)", XM, EX, XX, XX },
1931 { "punpckhqdq", XM, EX, XX, XX },
1932 { "(bad)", XM, EX, XX, XX },
0f17484f
AM		 1933 },
1934 /* PREGRP25 */
1935 {
050dfa73
MM		 1936 { "movntq", EM, MX, XX, XX },
1937 { "(bad)", EM, XM, XX, XX },
1938 { "movntdq", EM, XM, XX, XX },
1939 { "(bad)", EM, XM, XX, XX },
0f17484f
AM		 1940 },
1941 /* PREGRP26 */
1942 {
050dfa73
MM		 1943 { "(bad)", MX, EX, XX, XX },
1944 { "(bad)", XM, EX, XX, XX },
1945 { "punpcklqdq", XM, EX, XX, XX },
1946 { "(bad)", XM, EX, XX, XX },
041bd2e0 1947 },
ca164297
L		 1948 /* PREGRP27 */
1949 {
050dfa73
MM		 1950 { "(bad)", MX, EX, XX, XX },
1951 { "(bad)", XM, EX, XX, XX },
1952 { "addsubpd", XM, EX, XX, XX },
1953 { "addsubps", XM, EX, XX, XX },
ca164297
L		 1954 },
1955 /* PREGRP28 */
1956 {
050dfa73
MM		 1957 { "(bad)", MX, EX, XX, XX },
1958 { "(bad)", XM, EX, XX, XX },
1959 { "haddpd", XM, EX, XX, XX },
1960 { "haddps", XM, EX, XX, XX },
ca164297
L		 1961 },
1962 /* PREGRP29 */
1963 {
050dfa73
MM		 1964 { "(bad)", MX, EX, XX, XX },
1965 { "(bad)", XM, EX, XX, XX },
1966 { "hsubpd", XM, EX, XX, XX },
1967 { "hsubps", XM, EX, XX, XX },
ca164297
L		 1968 },
1969 /* PREGRP30 */
1970 {
050dfa73
MM		 1971 { "movlpX", XM, EX, SIMD_Fixup, 'h', XX }, /* really only 2 operands */
1972 { "movsldup", XM, EX, XX, XX },
1973 { "movlpd", XM, EX, XX, XX },
1974 { "movddup", XM, EX, XX, XX },
ca164297
L		 1975 },
1976 /* PREGRP31 */
1977 {
050dfa73
MM		 1978 { "movhpX", XM, EX, SIMD_Fixup, 'l', XX },
1979 { "movshdup", XM, EX, XX, XX },
1980 { "movhpd", XM, EX, XX, XX },
1981 { "(bad)", XM, EX, XX, XX },
ca164297
L		 1982 },
1983 /* PREGRP32 */
1984 {
050dfa73
MM		 1985 { "(bad)", XM, EX, XX, XX },
1986 { "(bad)", XM, EX, XX, XX },
1987 { "(bad)", XM, EX, XX, XX },
1988 { "lddqu", XM, M, XX, XX },
ca164297 1989 },
050dfa73
MM		 1990 /* PREGRP33 */
1991 {
7f4c972f
L		 1992 {"movntps",Ev, XM, XX, XX },
1993 {"movntss",Ev, XM, XX, XX },
1994 {"movntpd",Ev, XM, XX, XX },
1995 {"movntsd",Ev, XM, XX, XX },
050dfa73
MM		 1996 },
1997
1998 /* PREGRP34 */
1999 {
7f4c972f
L		 2000 {"vmread", Em, Gm, XX, XX },
2001 {"(bad)", XX, XX, XX, XX },
2002 {"extrq", XS, Ib, Ib, XX },
2003 {"insertq",XM, XS, Ib, Ib },
050dfa73
MM		 2004 },
2005
2006 /* PREGRP35 */
2007 {
7f4c972f
L		 2008 {"vmwrite", Gm, Em, XX, XX },
2009 {"(bad)", XX, XX, XX, XX },
2010 {"extrq", XM, XS, XX, XX },
2011 {"insertq", XM, XS, XX, XX },
050dfa73
MM		 2012 },
2013
2014 /* PREGRP36 */
2015 {
2016 { "bsrS", Gv, Ev, XX, XX },
2017 { "lzcntS", Gv, Ev, XX, XX },
2018 { "bsrS", Gv, Ev, XX, XX },
2019 { "(bad)", XX, XX, XX, XX },
2020 },
2021
7918206c
MM		 2022 /* PREGRP37 */
2023 {
2024 { "(bad)", XX, XX, XX, XX },
2025 { "popcntS",Gv, Ev, XX, XX },
2026 { "(bad)", XX, XX, XX, XX },
2027 { "(bad)", XX, XX, XX, XX },
2028 },
c608c12e
AM		 2029};
2030
6439fc28
AM		 2031static const struct dis386 x86_64_table[][2] = {
2032 {
050dfa73
MM		 2033 { "arpl", Ew, Gw, XX, XX },
2034 { "movs{||lq|xd}", Gv, Ed, XX, XX },
6439fc28
AM		 2035 },
2036};
2037
96fbad73 2038static const struct dis386 three_byte_table[][256] = {
331d2d0d
L		 2039 /* THREE_BYTE_0 */
2040 {
96fbad73 2041 /* 00 */
050dfa73
MM		 2042 { "pshufb", MX, EM, XX, XX },
2043 { "phaddw", MX, EM, XX, XX },
2044 { "phaddd", MX, EM, XX, XX },
2045 { "phaddsw", MX, EM, XX, XX },
2046 { "pmaddubsw", MX, EM, XX, XX },
2047 { "phsubw", MX, EM, XX, XX },
2048 { "phsubd", MX, EM, XX, XX },
2049 { "phsubsw", MX, EM, XX, XX },
96fbad73 2050 /* 08 */
050dfa73
MM		 2051 { "psignb", MX, EM, XX, XX },
2052 { "psignw", MX, EM, XX, XX },
2053 { "psignd", MX, EM, XX, XX },
2054 { "pmulhrsw", MX, EM, XX, XX },
2055 { "(bad)", XX, XX, XX, XX },
2056 { "(bad)", XX, XX, XX, XX },
2057 { "(bad)", XX, XX, XX, XX },
2058 { "(bad)", XX, XX, XX, XX },
96fbad73 2059 /* 10 */
050dfa73
MM		 2060 { "(bad)", XX, XX, XX, XX },
2061 { "(bad)", XX, XX, XX, XX },
2062 { "(bad)", XX, XX, XX, XX },
2063 { "(bad)", XX, XX, XX, XX },
2064 { "(bad)", XX, XX, XX, XX },
2065 { "(bad)", XX, XX, XX, XX },
2066 { "(bad)", XX, XX, XX, XX },
2067 { "(bad)", XX, XX, XX, XX },
96fbad73 2068 /* 18 */
050dfa73
MM		 2069 { "(bad)", XX, XX, XX, XX },
2070 { "(bad)", XX, XX, XX, XX },
2071 { "(bad)", XX, XX, XX, XX },
2072 { "(bad)", XX, XX, XX, XX },
2073 { "pabsb", MX, EM, XX, XX },
2074 { "pabsw", MX, EM, XX, XX },
2075 { "pabsd", MX, EM, XX, XX },
96fbad73
L		 2076 { "(bad)", XX, XX, XX, XX },
2077 /* 20 */
2078 { "(bad)", XX, XX, XX, XX },
2079 { "(bad)", XX, XX, XX, XX },
2080 { "(bad)", XX, XX, XX, XX },
2081 { "(bad)", XX, XX, XX, XX },
2082 { "(bad)", XX, XX, XX, XX },
2083 { "(bad)", XX, XX, XX, XX },
2084 { "(bad)", XX, XX, XX, XX },
2085 { "(bad)", XX, XX, XX, XX },
2086 /* 28 */
2087 { "(bad)", XX, XX, XX, XX },
2088 { "(bad)", XX, XX, XX, XX },
2089 { "(bad)", XX, XX, XX, XX },
2090 { "(bad)", XX, XX, XX, XX },
2091 { "(bad)", XX, XX, XX, XX },
2092 { "(bad)", XX, XX, XX, XX },
2093 { "(bad)", XX, XX, XX, XX },
2094 { "(bad)", XX, XX, XX, XX },
2095 /* 30 */
2096 { "(bad)", XX, XX, XX, XX },
2097 { "(bad)", XX, XX, XX, XX },
2098 { "(bad)", XX, XX, XX, XX },
2099 { "(bad)", XX, XX, XX, XX },
2100 { "(bad)", XX, XX, XX, XX },
2101 { "(bad)", XX, XX, XX, XX },
2102 { "(bad)", XX, XX, XX, XX },
2103 { "(bad)", XX, XX, XX, XX },
2104 /* 38 */
2105 { "(bad)", XX, XX, XX, XX },
2106 { "(bad)", XX, XX, XX, XX },
2107 { "(bad)", XX, XX, XX, XX },
2108 { "(bad)", XX, XX, XX, XX },
2109 { "(bad)", XX, XX, XX, XX },
2110 { "(bad)", XX, XX, XX, XX },
2111 { "(bad)", XX, XX, XX, XX },
2112 { "(bad)", XX, XX, XX, XX },
2113 /* 40 */
2114 { "(bad)", XX, XX, XX, XX },
2115 { "(bad)", XX, XX, XX, XX },
2116 { "(bad)", XX, XX, XX, XX },
2117 { "(bad)", XX, XX, XX, XX },
2118 { "(bad)", XX, XX, XX, XX },
2119 { "(bad)", XX, XX, XX, XX },
2120 { "(bad)", XX, XX, XX, XX },
2121 { "(bad)", XX, XX, XX, XX },
2122 /* 48 */
2123 { "(bad)", XX, XX, XX, XX },
2124 { "(bad)", XX, XX, XX, XX },
2125 { "(bad)", XX, XX, XX, XX },
2126 { "(bad)", XX, XX, XX, XX },
2127 { "(bad)", XX, XX, XX, XX },
2128 { "(bad)", XX, XX, XX, XX },
2129 { "(bad)", XX, XX, XX, XX },
2130 { "(bad)", XX, XX, XX, XX },
2131 /* 50 */
2132 { "(bad)", XX, XX, XX, XX },
2133 { "(bad)", XX, XX, XX, XX },
2134 { "(bad)", XX, XX, XX, XX },
2135 { "(bad)", XX, XX, XX, XX },
2136 { "(bad)", XX, XX, XX, XX },
2137 { "(bad)", XX, XX, XX, XX },
2138 { "(bad)", XX, XX, XX, XX },
2139 { "(bad)", XX, XX, XX, XX },
2140 /* 58 */
2141 { "(bad)", XX, XX, XX, XX },
2142 { "(bad)", XX, XX, XX, XX },
2143 { "(bad)", XX, XX, XX, XX },
2144 { "(bad)", XX, XX, XX, XX },
2145 { "(bad)", XX, XX, XX, XX },
2146 { "(bad)", XX, XX, XX, XX },
2147 { "(bad)", XX, XX, XX, XX },
2148 { "(bad)", XX, XX, XX, XX },
2149 /* 60 */
2150 { "(bad)", XX, XX, XX, XX },
2151 { "(bad)", XX, XX, XX, XX },
2152 { "(bad)", XX, XX, XX, XX },
2153 { "(bad)", XX, XX, XX, XX },
2154 { "(bad)", XX, XX, XX, XX },
2155 { "(bad)", XX, XX, XX, XX },
2156 { "(bad)", XX, XX, XX, XX },
2157 { "(bad)", XX, XX, XX, XX },
2158 /* 68 */
2159 { "(bad)", XX, XX, XX, XX },
2160 { "(bad)", XX, XX, XX, XX },
2161 { "(bad)", XX, XX, XX, XX },
2162 { "(bad)", XX, XX, XX, XX },
2163 { "(bad)", XX, XX, XX, XX },
2164 { "(bad)", XX, XX, XX, XX },
2165 { "(bad)", XX, XX, XX, XX },
2166 { "(bad)", XX, XX, XX, XX },
2167 /* 70 */
2168 { "(bad)", XX, XX, XX, XX },
2169 { "(bad)", XX, XX, XX, XX },
2170 { "(bad)", XX, XX, XX, XX },
2171 { "(bad)", XX, XX, XX, XX },
2172 { "(bad)", XX, XX, XX, XX },
2173 { "(bad)", XX, XX, XX, XX },
2174 { "(bad)", XX, XX, XX, XX },
2175 { "(bad)", XX, XX, XX, XX },
2176 /* 78 */
2177 { "(bad)", XX, XX, XX, XX },
2178 { "(bad)", XX, XX, XX, XX },
2179 { "(bad)", XX, XX, XX, XX },
2180 { "(bad)", XX, XX, XX, XX },
2181 { "(bad)", XX, XX, XX, XX },
2182 { "(bad)", XX, XX, XX, XX },
2183 { "(bad)", XX, XX, XX, XX },
2184 { "(bad)", XX, XX, XX, XX },
2185 /* 80 */
2186 { "(bad)", XX, XX, XX, XX },
2187 { "(bad)", XX, XX, XX, XX },
2188 { "(bad)", XX, XX, XX, XX },
2189 { "(bad)", XX, XX, XX, XX },
2190 { "(bad)", XX, XX, XX, XX },
2191 { "(bad)", XX, XX, XX, XX },
2192 { "(bad)", XX, XX, XX, XX },
2193 { "(bad)", XX, XX, XX, XX },
2194 /* 88 */
2195 { "(bad)", XX, XX, XX, XX },
2196 { "(bad)", XX, XX, XX, XX },
2197 { "(bad)", XX, XX, XX, XX },
2198 { "(bad)", XX, XX, XX, XX },
2199 { "(bad)", XX, XX, XX, XX },
2200 { "(bad)", XX, XX, XX, XX },
2201 { "(bad)", XX, XX, XX, XX },
2202 { "(bad)", XX, XX, XX, XX },
2203 /* 90 */
2204 { "(bad)", XX, XX, XX, XX },
2205 { "(bad)", XX, XX, XX, XX },
2206 { "(bad)", XX, XX, XX, XX },
2207 { "(bad)", XX, XX, XX, XX },
2208 { "(bad)", XX, XX, XX, XX },
2209 { "(bad)", XX, XX, XX, XX },
2210 { "(bad)", XX, XX, XX, XX },
2211 { "(bad)", XX, XX, XX, XX },
2212 /* 98 */
2213 { "(bad)", XX, XX, XX, XX },
2214 { "(bad)", XX, XX, XX, XX },
2215 { "(bad)", XX, XX, XX, XX },
2216 { "(bad)", XX, XX, XX, XX },
2217 { "(bad)", XX, XX, XX, XX },
2218 { "(bad)", XX, XX, XX, XX },
2219 { "(bad)", XX, XX, XX, XX },
2220 { "(bad)", XX, XX, XX, XX },
2221 /* a0 */
2222 { "(bad)", XX, XX, XX, XX },
2223 { "(bad)", XX, XX, XX, XX },
2224 { "(bad)", XX, XX, XX, XX },
2225 { "(bad)", XX, XX, XX, XX },
2226 { "(bad)", XX, XX, XX, XX },
2227 { "(bad)", XX, XX, XX, XX },
2228 { "(bad)", XX, XX, XX, XX },
2229 { "(bad)", XX, XX, XX, XX },
2230 /* a8 */
2231 { "(bad)", XX, XX, XX, XX },
2232 { "(bad)", XX, XX, XX, XX },
2233 { "(bad)", XX, XX, XX, XX },
2234 { "(bad)", XX, XX, XX, XX },
2235 { "(bad)", XX, XX, XX, XX },
2236 { "(bad)", XX, XX, XX, XX },
2237 { "(bad)", XX, XX, XX, XX },
2238 { "(bad)", XX, XX, XX, XX },
2239 /* b0 */
2240 { "(bad)", XX, XX, XX, XX },
2241 { "(bad)", XX, XX, XX, XX },
2242 { "(bad)", XX, XX, XX, XX },
2243 { "(bad)", XX, XX, XX, XX },
2244 { "(bad)", XX, XX, XX, XX },
2245 { "(bad)", XX, XX, XX, XX },
2246 { "(bad)", XX, XX, XX, XX },
2247 { "(bad)", XX, XX, XX, XX },
2248 /* b8 */
2249 { "(bad)", XX, XX, XX, XX },
2250 { "(bad)", XX, XX, XX, XX },
2251 { "(bad)", XX, XX, XX, XX },
2252 { "(bad)", XX, XX, XX, XX },
2253 { "(bad)", XX, XX, XX, XX },
2254 { "(bad)", XX, XX, XX, XX },
2255 { "(bad)", XX, XX, XX, XX },
2256 { "(bad)", XX, XX, XX, XX },
2257 /* c0 */
2258 { "(bad)", XX, XX, XX, XX },
2259 { "(bad)", XX, XX, XX, XX },
2260 { "(bad)", XX, XX, XX, XX },
2261 { "(bad)", XX, XX, XX, XX },
2262 { "(bad)", XX, XX, XX, XX },
2263 { "(bad)", XX, XX, XX, XX },
2264 { "(bad)", XX, XX, XX, XX },
2265 { "(bad)", XX, XX, XX, XX },
2266 /* c8 */
2267 { "(bad)", XX, XX, XX, XX },
2268 { "(bad)", XX, XX, XX, XX },
2269 { "(bad)", XX, XX, XX, XX },
2270 { "(bad)", XX, XX, XX, XX },
2271 { "(bad)", XX, XX, XX, XX },
2272 { "(bad)", XX, XX, XX, XX },
2273 { "(bad)", XX, XX, XX, XX },
2274 { "(bad)", XX, XX, XX, XX },
2275 /* d0 */
2276 { "(bad)", XX, XX, XX, XX },
2277 { "(bad)", XX, XX, XX, XX },
2278 { "(bad)", XX, XX, XX, XX },
2279 { "(bad)", XX, XX, XX, XX },
2280 { "(bad)", XX, XX, XX, XX },
2281 { "(bad)", XX, XX, XX, XX },
2282 { "(bad)", XX, XX, XX, XX },
2283 { "(bad)", XX, XX, XX, XX },
2284 /* d8 */
2285 { "(bad)", XX, XX, XX, XX },
2286 { "(bad)", XX, XX, XX, XX },
2287 { "(bad)", XX, XX, XX, XX },
2288 { "(bad)", XX, XX, XX, XX },
2289 { "(bad)", XX, XX, XX, XX },
2290 { "(bad)", XX, XX, XX, XX },
2291 { "(bad)", XX, XX, XX, XX },
2292 { "(bad)", XX, XX, XX, XX },
2293 /* e0 */
2294 { "(bad)", XX, XX, XX, XX },
2295 { "(bad)", XX, XX, XX, XX },
2296 { "(bad)", XX, XX, XX, XX },
2297 { "(bad)", XX, XX, XX, XX },
2298 { "(bad)", XX, XX, XX, XX },
2299 { "(bad)", XX, XX, XX, XX },
2300 { "(bad)", XX, XX, XX, XX },
2301 { "(bad)", XX, XX, XX, XX },
2302 /* e8 */
2303 { "(bad)", XX, XX, XX, XX },
2304 { "(bad)", XX, XX, XX, XX },
2305 { "(bad)", XX, XX, XX, XX },
2306 { "(bad)", XX, XX, XX, XX },
2307 { "(bad)", XX, XX, XX, XX },
2308 { "(bad)", XX, XX, XX, XX },
2309 { "(bad)", XX, XX, XX, XX },
2310 { "(bad)", XX, XX, XX, XX },
2311 /* f0 */
2312 { "(bad)", XX, XX, XX, XX },
2313 { "(bad)", XX, XX, XX, XX },
2314 { "(bad)", XX, XX, XX, XX },
2315 { "(bad)", XX, XX, XX, XX },
2316 { "(bad)", XX, XX, XX, XX },
2317 { "(bad)", XX, XX, XX, XX },
2318 { "(bad)", XX, XX, XX, XX },
2319 { "(bad)", XX, XX, XX, XX },
2320 /* f8 */
2321 { "(bad)", XX, XX, XX, XX },
2322 { "(bad)", XX, XX, XX, XX },
2323 { "(bad)", XX, XX, XX, XX },
2324 { "(bad)", XX, XX, XX, XX },
2325 { "(bad)", XX, XX, XX, XX },
2326 { "(bad)", XX, XX, XX, XX },
2327 { "(bad)", XX, XX, XX, XX },
050dfa73 2328 { "(bad)", XX, XX, XX, XX }
331d2d0d
L		 2329 },
2330 /* THREE_BYTE_1 */
2331 {
96fbad73 2332 /* 00 */
050dfa73
MM		 2333 { "(bad)", XX, XX, XX, XX },
2334 { "(bad)", XX, XX, XX, XX },
2335 { "(bad)", XX, XX, XX, XX },
2336 { "(bad)", XX, XX, XX, XX },
2337 { "(bad)", XX, XX, XX, XX },
2338 { "(bad)", XX, XX, XX, XX },
2339 { "(bad)", XX, XX, XX, XX },
2340 { "(bad)", XX, XX, XX, XX },
96fbad73 2341 /* 08 */
050dfa73
MM		 2342 { "(bad)", XX, XX, XX, XX },
2343 { "(bad)", XX, XX, XX, XX },
2344 { "(bad)", XX, XX, XX, XX },
2345 { "(bad)", XX, XX, XX, XX },
2346 { "(bad)", XX, XX, XX, XX },
2347 { "(bad)", XX, XX, XX, XX },
2348 { "(bad)", XX, XX, XX, XX },
2349 { "palignr", MX, EM, Ib, XX },
96fbad73
L		 2350 /* 10 */
2351 { "(bad)", XX, XX, XX, XX },
2352 { "(bad)", XX, XX, XX, XX },
2353 { "(bad)", XX, XX, XX, XX },
2354 { "(bad)", XX, XX, XX, XX },
2355 { "(bad)", XX, XX, XX, XX },
2356 { "(bad)", XX, XX, XX, XX },
2357 { "(bad)", XX, XX, XX, XX },
2358 { "(bad)", XX, XX, XX, XX },
2359 /* 18 */
2360 { "(bad)", XX, XX, XX, XX },
2361 { "(bad)", XX, XX, XX, XX },
2362 { "(bad)", XX, XX, XX, XX },
2363 { "(bad)", XX, XX, XX, XX },
2364 { "(bad)", XX, XX, XX, XX },
2365 { "(bad)", XX, XX, XX, XX },
2366 { "(bad)", XX, XX, XX, XX },
2367 { "(bad)", XX, XX, XX, XX },
2368 /* 20 */
2369 { "(bad)", XX, XX, XX, XX },
2370 { "(bad)", XX, XX, XX, XX },
2371 { "(bad)", XX, XX, XX, XX },
2372 { "(bad)", XX, XX, XX, XX },
2373 { "(bad)", XX, XX, XX, XX },
2374 { "(bad)", XX, XX, XX, XX },
2375 { "(bad)", XX, XX, XX, XX },
2376 { "(bad)", XX, XX, XX, XX },
2377 /* 28 */
2378 { "(bad)", XX, XX, XX, XX },
2379 { "(bad)", XX, XX, XX, XX },
2380 { "(bad)", XX, XX, XX, XX },
2381 { "(bad)", XX, XX, XX, XX },
2382 { "(bad)", XX, XX, XX, XX },
2383 { "(bad)", XX, XX, XX, XX },
2384 { "(bad)", XX, XX, XX, XX },
2385 { "(bad)", XX, XX, XX, XX },
2386 /* 30 */
2387 { "(bad)", XX, XX, XX, XX },
2388 { "(bad)", XX, XX, XX, XX },
2389 { "(bad)", XX, XX, XX, XX },
2390 { "(bad)", XX, XX, XX, XX },
2391 { "(bad)", XX, XX, XX, XX },
2392 { "(bad)", XX, XX, XX, XX },
2393 { "(bad)", XX, XX, XX, XX },
2394 { "(bad)", XX, XX, XX, XX },
2395 /* 38 */
2396 { "(bad)", XX, XX, XX, XX },
2397 { "(bad)", XX, XX, XX, XX },
2398 { "(bad)", XX, XX, XX, XX },
2399 { "(bad)", XX, XX, XX, XX },
2400 { "(bad)", XX, XX, XX, XX },
2401 { "(bad)", XX, XX, XX, XX },
2402 { "(bad)", XX, XX, XX, XX },
2403 { "(bad)", XX, XX, XX, XX },
2404 /* 40 */
2405 { "(bad)", XX, XX, XX, XX },
2406 { "(bad)", XX, XX, XX, XX },
2407 { "(bad)", XX, XX, XX, XX },
2408 { "(bad)", XX, XX, XX, XX },
2409 { "(bad)", XX, XX, XX, XX },
2410 { "(bad)", XX, XX, XX, XX },
2411 { "(bad)", XX, XX, XX, XX },
2412 { "(bad)", XX, XX, XX, XX },
2413 /* 48 */
2414 { "(bad)", XX, XX, XX, XX },
2415 { "(bad)", XX, XX, XX, XX },
2416 { "(bad)", XX, XX, XX, XX },
2417 { "(bad)", XX, XX, XX, XX },
2418 { "(bad)", XX, XX, XX, XX },
2419 { "(bad)", XX, XX, XX, XX },
2420 { "(bad)", XX, XX, XX, XX },
2421 { "(bad)", XX, XX, XX, XX },
2422 /* 50 */
2423 { "(bad)", XX, XX, XX, XX },
2424 { "(bad)", XX, XX, XX, XX },
2425 { "(bad)", XX, XX, XX, XX },
2426 { "(bad)", XX, XX, XX, XX },
2427 { "(bad)", XX, XX, XX, XX },
2428 { "(bad)", XX, XX, XX, XX },
2429 { "(bad)", XX, XX, XX, XX },
2430 { "(bad)", XX, XX, XX, XX },
2431 /* 58 */
2432 { "(bad)", XX, XX, XX, XX },
2433 { "(bad)", XX, XX, XX, XX },
2434 { "(bad)", XX, XX, XX, XX },
2435 { "(bad)", XX, XX, XX, XX },
2436 { "(bad)", XX, XX, XX, XX },
2437 { "(bad)", XX, XX, XX, XX },
2438 { "(bad)", XX, XX, XX, XX },
2439 { "(bad)", XX, XX, XX, XX },
2440 /* 60 */
2441 { "(bad)", XX, XX, XX, XX },
2442 { "(bad)", XX, XX, XX, XX },
2443 { "(bad)", XX, XX, XX, XX },
2444 { "(bad)", XX, XX, XX, XX },
2445 { "(bad)", XX, XX, XX, XX },
2446 { "(bad)", XX, XX, XX, XX },
2447 { "(bad)", XX, XX, XX, XX },
2448 { "(bad)", XX, XX, XX, XX },
2449 /* 68 */
2450 { "(bad)", XX, XX, XX, XX },
2451 { "(bad)", XX, XX, XX, XX },
2452 { "(bad)", XX, XX, XX, XX },
2453 { "(bad)", XX, XX, XX, XX },
2454 { "(bad)", XX, XX, XX, XX },
2455 { "(bad)", XX, XX, XX, XX },
2456 { "(bad)", XX, XX, XX, XX },
2457 { "(bad)", XX, XX, XX, XX },
2458 /* 70 */
2459 { "(bad)", XX, XX, XX, XX },
2460 { "(bad)", XX, XX, XX, XX },
2461 { "(bad)", XX, XX, XX, XX },
2462 { "(bad)", XX, XX, XX, XX },
2463 { "(bad)", XX, XX, XX, XX },
2464 { "(bad)", XX, XX, XX, XX },
2465 { "(bad)", XX, XX, XX, XX },
2466 { "(bad)", XX, XX, XX, XX },
2467 /* 78 */
2468 { "(bad)", XX, XX, XX, XX },
2469 { "(bad)", XX, XX, XX, XX },
2470 { "(bad)", XX, XX, XX, XX },
2471 { "(bad)", XX, XX, XX, XX },
2472 { "(bad)", XX, XX, XX, XX },
2473 { "(bad)", XX, XX, XX, XX },
2474 { "(bad)", XX, XX, XX, XX },
2475 { "(bad)", XX, XX, XX, XX },
2476 /* 80 */
2477 { "(bad)", XX, XX, XX, XX },
2478 { "(bad)", XX, XX, XX, XX },
2479 { "(bad)", XX, XX, XX, XX },
2480 { "(bad)", XX, XX, XX, XX },
2481 { "(bad)", XX, XX, XX, XX },
2482 { "(bad)", XX, XX, XX, XX },
2483 { "(bad)", XX, XX, XX, XX },
2484 { "(bad)", XX, XX, XX, XX },
2485 /* 88 */
2486 { "(bad)", XX, XX, XX, XX },
2487 { "(bad)", XX, XX, XX, XX },
2488 { "(bad)", XX, XX, XX, XX },
2489 { "(bad)", XX, XX, XX, XX },
2490 { "(bad)", XX, XX, XX, XX },
2491 { "(bad)", XX, XX, XX, XX },
2492 { "(bad)", XX, XX, XX, XX },
2493 { "(bad)", XX, XX, XX, XX },
2494 /* 90 */
2495 { "(bad)", XX, XX, XX, XX },
2496 { "(bad)", XX, XX, XX, XX },
2497 { "(bad)", XX, XX, XX, XX },
2498 { "(bad)", XX, XX, XX, XX },
2499 { "(bad)", XX, XX, XX, XX },
2500 { "(bad)", XX, XX, XX, XX },
2501 { "(bad)", XX, XX, XX, XX },
2502 { "(bad)", XX, XX, XX, XX },
2503 /* 98 */
2504 { "(bad)", XX, XX, XX, XX },
2505 { "(bad)", XX, XX, XX, XX },
2506 { "(bad)", XX, XX, XX, XX },
2507 { "(bad)", XX, XX, XX, XX },
2508 { "(bad)", XX, XX, XX, XX },
2509 { "(bad)", XX, XX, XX, XX },
2510 { "(bad)", XX, XX, XX, XX },
2511 { "(bad)", XX, XX, XX, XX },
2512 /* a0 */
2513 { "(bad)", XX, XX, XX, XX },
2514 { "(bad)", XX, XX, XX, XX },
2515 { "(bad)", XX, XX, XX, XX },
2516 { "(bad)", XX, XX, XX, XX },
2517 { "(bad)", XX, XX, XX, XX },
2518 { "(bad)", XX, XX, XX, XX },
2519 { "(bad)", XX, XX, XX, XX },
2520 { "(bad)", XX, XX, XX, XX },
2521 /* a8 */
2522 { "(bad)", XX, XX, XX, XX },
2523 { "(bad)", XX, XX, XX, XX },
2524 { "(bad)", XX, XX, XX, XX },
2525 { "(bad)", XX, XX, XX, XX },
2526 { "(bad)", XX, XX, XX, XX },
2527 { "(bad)", XX, XX, XX, XX },
2528 { "(bad)", XX, XX, XX, XX },
2529 { "(bad)", XX, XX, XX, XX },
2530 /* b0 */
2531 { "(bad)", XX, XX, XX, XX },
2532 { "(bad)", XX, XX, XX, XX },
2533 { "(bad)", XX, XX, XX, XX },
2534 { "(bad)", XX, XX, XX, XX },
2535 { "(bad)", XX, XX, XX, XX },
2536 { "(bad)", XX, XX, XX, XX },
2537 { "(bad)", XX, XX, XX, XX },
2538 { "(bad)", XX, XX, XX, XX },
2539 /* b8 */
2540 { "(bad)", XX, XX, XX, XX },
2541 { "(bad)", XX, XX, XX, XX },
2542 { "(bad)", XX, XX, XX, XX },
2543 { "(bad)", XX, XX, XX, XX },
2544 { "(bad)", XX, XX, XX, XX },
2545 { "(bad)", XX, XX, XX, XX },
2546 { "(bad)", XX, XX, XX, XX },
2547 { "(bad)", XX, XX, XX, XX },
2548 /* c0 */
2549 { "(bad)", XX, XX, XX, XX },
2550 { "(bad)", XX, XX, XX, XX },
2551 { "(bad)", XX, XX, XX, XX },
2552 { "(bad)", XX, XX, XX, XX },
2553 { "(bad)", XX, XX, XX, XX },
2554 { "(bad)", XX, XX, XX, XX },
2555 { "(bad)", XX, XX, XX, XX },
2556 { "(bad)", XX, XX, XX, XX },
2557 /* c8 */
2558 { "(bad)", XX, XX, XX, XX },
2559 { "(bad)", XX, XX, XX, XX },
2560 { "(bad)", XX, XX, XX, XX },
2561 { "(bad)", XX, XX, XX, XX },
2562 { "(bad)", XX, XX, XX, XX },
2563 { "(bad)", XX, XX, XX, XX },
2564 { "(bad)", XX, XX, XX, XX },
2565 { "(bad)", XX, XX, XX, XX },
2566 /* d0 */
2567 { "(bad)", XX, XX, XX, XX },
2568 { "(bad)", XX, XX, XX, XX },
2569 { "(bad)", XX, XX, XX, XX },
2570 { "(bad)", XX, XX, XX, XX },
2571 { "(bad)", XX, XX, XX, XX },
2572 { "(bad)", XX, XX, XX, XX },
2573 { "(bad)", XX, XX, XX, XX },
2574 { "(bad)", XX, XX, XX, XX },
2575 /* d8 */
2576 { "(bad)", XX, XX, XX, XX },
2577 { "(bad)", XX, XX, XX, XX },
2578 { "(bad)", XX, XX, XX, XX },
2579 { "(bad)", XX, XX, XX, XX },
2580 { "(bad)", XX, XX, XX, XX },
2581 { "(bad)", XX, XX, XX, XX },
2582 { "(bad)", XX, XX, XX, XX },
2583 { "(bad)", XX, XX, XX, XX },
2584 /* e0 */
2585 { "(bad)", XX, XX, XX, XX },
2586 { "(bad)", XX, XX, XX, XX },
2587 { "(bad)", XX, XX, XX, XX },
2588 { "(bad)", XX, XX, XX, XX },
2589 { "(bad)", XX, XX, XX, XX },
2590 { "(bad)", XX, XX, XX, XX },
2591 { "(bad)", XX, XX, XX, XX },
2592 { "(bad)", XX, XX, XX, XX },
2593 /* e8 */
2594 { "(bad)", XX, XX, XX, XX },
2595 { "(bad)", XX, XX, XX, XX },
2596 { "(bad)", XX, XX, XX, XX },
2597 { "(bad)", XX, XX, XX, XX },
2598 { "(bad)", XX, XX, XX, XX },
2599 { "(bad)", XX, XX, XX, XX },
2600 { "(bad)", XX, XX, XX, XX },
2601 { "(bad)", XX, XX, XX, XX },
2602 /* f0 */
050dfa73
MM		 2603 { "(bad)", XX, XX, XX, XX },
2604 { "(bad)", XX, XX, XX, XX },
2605 { "(bad)", XX, XX, XX, XX },
2606 { "(bad)", XX, XX, XX, XX },
2607 { "(bad)", XX, XX, XX, XX },
2608 { "(bad)", XX, XX, XX, XX },
2609 { "(bad)", XX, XX, XX, XX },
2610 { "(bad)", XX, XX, XX, XX },
96fbad73 2611 /* f8 */
050dfa73
MM		 2612 { "(bad)", XX, XX, XX, XX },
2613 { "(bad)", XX, XX, XX, XX },
2614 { "(bad)", XX, XX, XX, XX },
2615 { "(bad)", XX, XX, XX, XX },
2616 { "(bad)", XX, XX, XX, XX },
2617 { "(bad)", XX, XX, XX, XX },
2618 { "(bad)", XX, XX, XX, XX },
2619 { "(bad)", XX, XX, XX, XX }
331d2d0d
L		 2620 },
2621};
2622
c608c12e
AM		 2623#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
2624
252b5132 2625static void
26ca5450 2626ckprefix (void)
252b5132 2627{
52b15da3
JH		 2628 int newrex;
2629 rex = 0;
252b5132 2630 prefixes = 0;
7d421014 2631 used_prefixes = 0;
52b15da3 2632 rex_used = 0;
252b5132
RH		 2633 while (1)
2634 {
2635 FETCH_DATA (the_info, codep + 1);
52b15da3 2636 newrex = 0;
252b5132
RH		 2637 switch (*codep)
2638 {
52b15da3
JH		 2639 /* REX prefixes family. */
2640 case 0x40:
2641 case 0x41:
2642 case 0x42:
2643 case 0x43:
2644 case 0x44:
2645 case 0x45:
2646 case 0x46:
2647 case 0x47:
2648 case 0x48:
2649 case 0x49:
2650 case 0x4a:
2651 case 0x4b:
2652 case 0x4c:
2653 case 0x4d:
2654 case 0x4e:
2655 case 0x4f:
cb712a9e 2656 if (address_mode == mode_64bit)
52b15da3
JH		 2657 newrex = *codep;
2658 else
2659 return;
2660 break;
252b5132
RH		 2661 case 0xf3:
2662 prefixes |= PREFIX_REPZ;
2663 break;
2664 case 0xf2:
2665 prefixes |= PREFIX_REPNZ;
2666 break;
2667 case 0xf0:
2668 prefixes |= PREFIX_LOCK;
2669 break;
2670 case 0x2e:
2671 prefixes |= PREFIX_CS;
2672 break;
2673 case 0x36:
2674 prefixes |= PREFIX_SS;
2675 break;
2676 case 0x3e:
2677 prefixes |= PREFIX_DS;
2678 break;
2679 case 0x26:
2680 prefixes |= PREFIX_ES;
2681 break;
2682 case 0x64:
2683 prefixes |= PREFIX_FS;
2684 break;
2685 case 0x65:
2686 prefixes |= PREFIX_GS;
2687 break;
2688 case 0x66:
2689 prefixes |= PREFIX_DATA;
2690 break;
2691 case 0x67:
2692 prefixes |= PREFIX_ADDR;
2693 break;
5076851f 2694 case FWAIT_OPCODE:
252b5132
RH		 2695 /* fwait is really an instruction. If there are prefixes
2696 before the fwait, they belong to the fwait, *not* to the
2697 following instruction. */
3e7d61b2 2698 if (prefixes || rex)
252b5132
RH		 2699 {
2700 prefixes |= PREFIX_FWAIT;
2701 codep++;
2702 return;
2703 }
2704 prefixes = PREFIX_FWAIT;
2705 break;
2706 default:
2707 return;
2708 }
52b15da3
JH		 2709 /* Rex is ignored when followed by another prefix. */
2710 if (rex)
2711 {
3e7d61b2
AM		 2712 rex_used = rex;
2713 return;
52b15da3
JH		 2714 }
2715 rex = newrex;
252b5132
RH		 2716 codep++;
2717 }
2718}
2719
7d421014
ILT		 2720/* Return the name of the prefix byte PREF, or NULL if PREF is not a
2721 prefix byte. */
2722
2723static const char *
26ca5450 2724prefix_name (int pref, int sizeflag)
7d421014
ILT		 2725{
2726 switch (pref)
2727 {
52b15da3
JH		 2728 /* REX prefixes family. */
2729 case 0x40:
2730 return "rex";
2731 case 0x41:
2732 return "rexZ";
2733 case 0x42:
2734 return "rexY";
2735 case 0x43:
2736 return "rexYZ";
2737 case 0x44:
2738 return "rexX";
2739 case 0x45:
2740 return "rexXZ";
2741 case 0x46:
2742 return "rexXY";
2743 case 0x47:
2744 return "rexXYZ";
2745 case 0x48:
2746 return "rex64";
2747 case 0x49:
2748 return "rex64Z";
2749 case 0x4a:
2750 return "rex64Y";
2751 case 0x4b:
2752 return "rex64YZ";
2753 case 0x4c:
2754 return "rex64X";
2755 case 0x4d:
2756 return "rex64XZ";
2757 case 0x4e:
2758 return "rex64XY";
2759 case 0x4f:
2760 return "rex64XYZ";
7d421014
ILT		 2761 case 0xf3:
2762 return "repz";
2763 case 0xf2:
2764 return "repnz";
2765 case 0xf0:
2766 return "lock";
2767 case 0x2e:
2768 return "cs";
2769 case 0x36:
2770 return "ss";
2771 case 0x3e:
2772 return "ds";
2773 case 0x26:
2774 return "es";
2775 case 0x64:
2776 return "fs";
2777 case 0x65:
2778 return "gs";
2779 case 0x66:
2780 return (sizeflag & DFLAG) ? "data16" : "data32";
2781 case 0x67:
cb712a9e 2782 if (address_mode == mode_64bit)
db6eb5be 2783 return (sizeflag & AFLAG) ? "addr32" : "addr64";
c1a64871 2784 else
2888cb7a 2785 return (sizeflag & AFLAG) ? "addr16" : "addr32";
7d421014
ILT		 2786 case FWAIT_OPCODE:
2787 return "fwait";
2788 default:
2789 return NULL;
2790 }
2791}
2792
050dfa73
MM		 2793static char op1out[100], op2out[100], op3out[100], op4out[100];
2794static int op_ad, op_index[4];
1d9f512f 2795static int two_source_ops;
050dfa73
MM		 2796static bfd_vma op_address[4];
2797static bfd_vma op_riprel[4];
52b15da3 2798static bfd_vma start_pc;
252b5132
RH		 2799\f
2800/*
2801 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
2802 * (see topic "Redundant prefixes" in the "Differences from 8086"
2803 * section of the "Virtual 8086 Mode" chapter.)
2804 * 'pc' should be the address of this instruction, it will
2805 * be used to print the target address if this is a relative jump or call
2806 * The function returns the length of this instruction in bytes.
2807 */
2808
252b5132
RH		 2809static char intel_syntax;
2810static char open_char;
2811static char close_char;
2812static char separator_char;
2813static char scale_char;
2814
e396998b
AM		 2815/* Here for backwards compatibility. When gdb stops using
2816 print_insn_i386_att and print_insn_i386_intel these functions can
2817 disappear, and print_insn_i386 be merged into print_insn. */
252b5132 2818int
26ca5450 2819print_insn_i386_att (bfd_vma pc, disassemble_info *info)
252b5132
RH		 2820{
2821 intel_syntax = 0;
e396998b
AM		 2822
2823 return print_insn (pc, info);
252b5132
RH		 2824}
2825
2826int
26ca5450 2827print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
252b5132
RH		 2828{
2829 intel_syntax = 1;
e396998b
AM		 2830
2831 return print_insn (pc, info);
252b5132
RH		 2832}
2833
e396998b 2834int
26ca5450 2835print_insn_i386 (bfd_vma pc, disassemble_info *info)
e396998b
AM		 2836{
2837 intel_syntax = -1;
2838
2839 return print_insn (pc, info);
2840}
2841
2842static int
26ca5450 2843print_insn (bfd_vma pc, disassemble_info *info)
252b5132 2844{
2da11e11 2845 const struct dis386 *dp;
252b5132 2846 int i;
050dfa73 2847 char *first, *second, *third, *fourth;
252b5132 2848 int needcomma;
eec0f4ca
L		 2849 unsigned char uses_DATA_prefix, uses_LOCK_prefix;
2850 unsigned char uses_REPNZ_prefix, uses_REPZ_prefix;
e396998b
AM		 2851 int sizeflag;
2852 const char *p;
252b5132 2853 struct dis_private priv;
eec0f4ca 2854 unsigned char op;
252b5132 2855
cb712a9e
L		 2856 if (info->mach == bfd_mach_x86_64_intel_syntax
2857 || info->mach == bfd_mach_x86_64)
2858 address_mode = mode_64bit;
2859 else
2860 address_mode = mode_32bit;
52b15da3 2861
8373f971 2862 if (intel_syntax == (char) -1)
e396998b
AM		 2863 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
2864 || info->mach == bfd_mach_x86_64_intel_syntax);
2865
2da11e11 2866 if (info->mach == bfd_mach_i386_i386
52b15da3
JH		 2867 || info->mach == bfd_mach_x86_64
2868 || info->mach == bfd_mach_i386_i386_intel_syntax
2869 || info->mach == bfd_mach_x86_64_intel_syntax)
e396998b 2870 priv.orig_sizeflag = AFLAG | DFLAG;
2da11e11 2871 else if (info->mach == bfd_mach_i386_i8086)
e396998b 2872 priv.orig_sizeflag = 0;
2da11e11
AM		 2873 else
2874 abort ();
e396998b
AM		 2875
2876 for (p = info->disassembler_options; p != NULL; )
2877 {
0112cd26 2878 if (CONST_STRNEQ (p, "x86-64"))
e396998b 2879 {
cb712a9e 2880 address_mode = mode_64bit;
e396998b
AM		 2881 priv.orig_sizeflag = AFLAG | DFLAG;
2882 }
0112cd26 2883 else if (CONST_STRNEQ (p, "i386"))
e396998b 2884 {
cb712a9e 2885 address_mode = mode_32bit;
e396998b
AM		 2886 priv.orig_sizeflag = AFLAG | DFLAG;
2887 }
0112cd26 2888 else if (CONST_STRNEQ (p, "i8086"))
e396998b 2889 {
cb712a9e 2890 address_mode = mode_16bit;
e396998b
AM		 2891 priv.orig_sizeflag = 0;
2892 }
0112cd26 2893 else if (CONST_STRNEQ (p, "intel"))
e396998b
AM		 2894 {
2895 intel_syntax = 1;
2896 }
0112cd26 2897 else if (CONST_STRNEQ (p, "att"))
e396998b
AM		 2898 {
2899 intel_syntax = 0;
2900 }
0112cd26 2901 else if (CONST_STRNEQ (p, "addr"))
e396998b
AM		 2902 {
2903 if (p[4] == '1' && p[5] == '6')
2904 priv.orig_sizeflag &= ~AFLAG;
2905 else if (p[4] == '3' && p[5] == '2')
2906 priv.orig_sizeflag |= AFLAG;
2907 }
0112cd26 2908 else if (CONST_STRNEQ (p, "data"))
e396998b
AM		 2909 {
2910 if (p[4] == '1' && p[5] == '6')
2911 priv.orig_sizeflag &= ~DFLAG;
2912 else if (p[4] == '3' && p[5] == '2')
2913 priv.orig_sizeflag |= DFLAG;
2914 }
0112cd26 2915 else if (CONST_STRNEQ (p, "suffix"))
e396998b
AM		 2916 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2917
2918 p = strchr (p, ',');
2919 if (p != NULL)
2920 p++;
2921 }
2922
2923 if (intel_syntax)
2924 {
2925 names64 = intel_names64;
2926 names32 = intel_names32;
2927 names16 = intel_names16;
2928 names8 = intel_names8;
2929 names8rex = intel_names8rex;
2930 names_seg = intel_names_seg;
2931 index16 = intel_index16;
2932 open_char = '[';
2933 close_char = ']';
2934 separator_char = '+';
2935 scale_char = '*';
2936 }
2937 else
2938 {
2939 names64 = att_names64;
2940 names32 = att_names32;
2941 names16 = att_names16;
2942 names8 = att_names8;
2943 names8rex = att_names8rex;
2944 names_seg = att_names_seg;
2945 index16 = att_index16;
2946 open_char = '(';
2947 close_char = ')';
2948 separator_char = ',';
2949 scale_char = ',';
2950 }
2da11e11 2951
4fe53c98 2952 /* The output looks better if we put 7 bytes on a line, since that
c608c12e 2953 puts most long word instructions on a single line. */
4fe53c98 2954 info->bytes_per_line = 7;
252b5132 2955
26ca5450 2956 info->private_data = &priv;
252b5132
RH		 2957 priv.max_fetched = priv.the_buffer;
2958 priv.insn_start = pc;
252b5132
RH		 2959
2960 obuf[0] = 0;
2961 op1out[0] = 0;
2962 op2out[0] = 0;
2963 op3out[0] = 0;
050dfa73 2964 op4out[0] = 0;
252b5132 2965
050dfa73 2966 op_index[0] = op_index[1] = op_index[2] = op_index[3] = -1;
252b5132
RH		 2967
2968 the_info = info;
2969 start_pc = pc;
e396998b
AM		 2970 start_codep = priv.the_buffer;
2971 codep = priv.the_buffer;
252b5132 2972
5076851f
ILT		 2973 if (setjmp (priv.bailout) != 0)
2974 {
7d421014
ILT		 2975 const char *name;
2976
5076851f 2977 /* Getting here means we tried for data but didn't get it. That
e396998b
AM		 2978 means we have an incomplete instruction of some sort. Just
2979 print the first byte as a prefix or a .byte pseudo-op. */
2980 if (codep > priv.the_buffer)
5076851f 2981 {
e396998b 2982 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2983 if (name != NULL)
2984 (*info->fprintf_func) (info->stream, "%s", name);
2985 else
5076851f 2986 {
7d421014
ILT		 2987 /* Just print the first byte as a .byte instruction. */
2988 (*info->fprintf_func) (info->stream, ".byte 0x%x",
e396998b 2989 (unsigned int) priv.the_buffer[0]);
5076851f 2990 }
5076851f 2991
7d421014 2992 return 1;
5076851f
ILT		 2993 }
2994
2995 return -1;
2996 }
2997
52b15da3 2998 obufp = obuf;
252b5132
RH		 2999 ckprefix ();
3000
3001 insn_codep = codep;
e396998b 3002 sizeflag = priv.orig_sizeflag;
252b5132
RH		 3003
3004 FETCH_DATA (info, codep + 1);
3005 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3006
3e7d61b2
AM		 3007 if (((prefixes & PREFIX_FWAIT)
3008 && ((*codep < 0xd8) || (*codep > 0xdf)))
3009 || (rex && rex_used))
252b5132 3010 {
7d421014
ILT		 3011 const char *name;
3012
3e7d61b2
AM		 3013 /* fwait not followed by floating point instruction, or rex followed
3014 by other prefixes. Print the first prefix. */
e396998b 3015 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 3016 if (name == NULL)
3017 name = INTERNAL_DISASSEMBLER_ERROR;
3018 (*info->fprintf_func) (info->stream, "%s", name);
3019 return 1;
252b5132
RH		 3020 }
3021
eec0f4ca 3022 op = 0;
252b5132
RH		 3023 if (*codep == 0x0f)
3024 {
eec0f4ca 3025 unsigned char threebyte;
252b5132 3026 FETCH_DATA (info, codep + 2);
eec0f4ca
L		 3027 threebyte = *++codep;
3028 dp = &dis386_twobyte[threebyte];
252b5132 3029 need_modrm = twobyte_has_modrm[*codep];
eec0f4ca
L		 3030 uses_DATA_prefix = twobyte_uses_DATA_prefix[*codep];
3031 uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[*codep];
3032 uses_REPZ_prefix = twobyte_uses_REPZ_prefix[*codep];
c4a530c5 3033 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
eec0f4ca
L		 3034 codep++;
3035 if (dp->name == NULL && dp->bytemode1 == IS_3BYTE_OPCODE)
3036 {
3037 FETCH_DATA (info, codep + 2);
3038 op = *codep++;
3039 switch (threebyte)
3040 {
3041 case 0x38:
3042 uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op];
3043 uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op];
3044 uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op];
3045 break;
3046 case 0x3a:
3047 uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op];
3048 uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op];
3049 uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op];
3050 break;
3051 default:
3052 break;
3053 }
3054 }
252b5132
RH		 3055 }
3056 else
3057 {
6439fc28 3058 dp = &dis386[*codep];
252b5132 3059 need_modrm = onebyte_has_modrm[*codep];
eec0f4ca
L		 3060 uses_DATA_prefix = 0;
3061 uses_REPNZ_prefix = 0;
3062 uses_REPZ_prefix = 0;
c4a530c5 3063 uses_LOCK_prefix = 0;
eec0f4ca 3064 codep++;
252b5132 3065 }
050dfa73 3066
eec0f4ca 3067 if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ))
7d421014
ILT		 3068 {
3069 oappend ("repz ");
3070 used_prefixes |= PREFIX_REPZ;
3071 }
eec0f4ca 3072 if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ))
7d421014
ILT		 3073 {
3074 oappend ("repnz ");
3075 used_prefixes |= PREFIX_REPNZ;
3076 }
050dfa73 3077
c4a530c5 3078 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
7d421014
ILT		 3079 {
3080 oappend ("lock ");
3081 used_prefixes |= PREFIX_LOCK;
3082 }
c608c12e 3083
c608c12e
AM		 3084 if (prefixes & PREFIX_ADDR)
3085 {
3086 sizeflag ^= AFLAG;
6439fc28 3087 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
3ffd33cf 3088 {
cb712a9e 3089 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3ffd33cf
AM		 3090 oappend ("addr32 ");
3091 else
3092 oappend ("addr16 ");
3093 used_prefixes |= PREFIX_ADDR;
3094 }
3095 }
3096
eec0f4ca 3097 if (!uses_DATA_prefix && (prefixes & PREFIX_DATA))
3ffd33cf
AM		 3098 {
3099 sizeflag ^= DFLAG;
6439fc28
AM		 3100 if (dp->bytemode3 == cond_jump_mode
3101 && dp->bytemode1 == v_mode
3102 && !intel_syntax)
3ffd33cf
AM		 3103 {
3104 if (sizeflag & DFLAG)
3105 oappend ("data32 ");
3106 else
3107 oappend ("data16 ");
3108 used_prefixes |= PREFIX_DATA;
3109 }
3110 }
3111
331d2d0d
L		 3112 if (dp->name == NULL && dp->bytemode1 == IS_3BYTE_OPCODE)
3113 {
eec0f4ca 3114 dp = &three_byte_table[dp->bytemode2][op];
331d2d0d
L		 3115 mod = (*codep >> 6) & 3;
3116 reg = (*codep >> 3) & 7;
3117 rm = *codep & 7;
3118 }
3119 else if (need_modrm)
252b5132
RH		 3120 {
3121 FETCH_DATA (info, codep + 1);
3122 mod = (*codep >> 6) & 3;
3123 reg = (*codep >> 3) & 7;
3124 rm = *codep & 7;
3125 }
3126
3127 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
3128 {
3129 dofloat (sizeflag);
3130 }
3131 else
3132 {
041bd2e0 3133 int index;
252b5132 3134 if (dp->name == NULL)
c608c12e 3135 {
6439fc28 3136 switch (dp->bytemode1)
c608c12e 3137 {
6439fc28
AM		 3138 case USE_GROUPS:
3139 dp = &grps[dp->bytemode2][reg];
3140 break;
3141
3142 case USE_PREFIX_USER_TABLE:
3143 index = 0;
3144 used_prefixes |= (prefixes & PREFIX_REPZ);
3145 if (prefixes & PREFIX_REPZ)
3146 index = 1;
3147 else
3148 {
d81afd0c
L		 3149 /* We should check PREFIX_REPNZ and PREFIX_REPZ
3150 before PREFIX_DATA. */
3151 used_prefixes |= (prefixes & PREFIX_REPNZ);
3152 if (prefixes & PREFIX_REPNZ)
3153 index = 3;
6439fc28
AM		 3154 else
3155 {
d81afd0c
L		 3156 used_prefixes |= (prefixes & PREFIX_DATA);
3157 if (prefixes & PREFIX_DATA)
3158 index = 2;
6439fc28
AM		 3159 }
3160 }
3161 dp = &prefix_user_table[dp->bytemode2][index];
3162 break;
252b5132 3163
6439fc28 3164 case X86_64_SPECIAL:
cb712a9e
L		 3165 index = address_mode == mode_64bit ? 1 : 0;
3166 dp = &x86_64_table[dp->bytemode2][index];
6439fc28 3167 break;
252b5132 3168
6439fc28
AM		 3169 default:
3170 oappend (INTERNAL_DISASSEMBLER_ERROR);
3171 break;
3172 }
3173 }
252b5132 3174
6439fc28
AM		 3175 if (putop (dp->name, sizeflag) == 0)
3176 {
3177 obufp = op1out;
050dfa73 3178 op_ad = 3;
6439fc28 3179 if (dp->op1)
6608db57 3180 (*dp->op1) (dp->bytemode1, sizeflag);
6439fc28
AM		 3181
3182 obufp = op2out;
050dfa73 3183 op_ad = 2;
6439fc28 3184 if (dp->op2)
6608db57 3185 (*dp->op2) (dp->bytemode2, sizeflag);
6439fc28
AM		 3186
3187 obufp = op3out;
050dfa73 3188 op_ad = 1;
6439fc28 3189 if (dp->op3)
6608db57 3190 (*dp->op3) (dp->bytemode3, sizeflag);
050dfa73
MM		 3191
3192 obufp = op4out;
3193 op_ad = 0;
3194 if (dp->op4)
3195 (*dp->op4) (dp->bytemode4, sizeflag);
6439fc28 3196 }
252b5132
RH		 3197 }
3198
7d421014
ILT		 3199 /* See if any prefixes were not used. If so, print the first one
3200 separately. If we don't do this, we'll wind up printing an
3201 instruction stream which does not precisely correspond to the
3202 bytes we are disassembling. */
3203 if ((prefixes & ~used_prefixes) != 0)
3204 {
3205 const char *name;
3206
e396998b 3207 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 3208 if (name == NULL)
3209 name = INTERNAL_DISASSEMBLER_ERROR;
3210 (*info->fprintf_func) (info->stream, "%s", name);
3211 return 1;
3212 }
52b15da3
JH		 3213 if (rex & ~rex_used)
3214 {
3215 const char *name;
e396998b 3216 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
52b15da3
JH		 3217 if (name == NULL)
3218 name = INTERNAL_DISASSEMBLER_ERROR;
3219 (*info->fprintf_func) (info->stream, "%s ", name);
3220 }
7d421014 3221
252b5132
RH		 3222 obufp = obuf + strlen (obuf);
3223 for (i = strlen (obuf); i < 6; i++)
3224 oappend (" ");
3225 oappend (" ");
3226 (*info->fprintf_func) (info->stream, "%s", obuf);
3227
3228 /* The enter and bound instructions are printed with operands in the same
3229 order as the intel book; everything else is printed in reverse order. */
2da11e11 3230 if (intel_syntax || two_source_ops)
252b5132
RH		 3231 {
3232 first = op1out;
3233 second = op2out;
3234 third = op3out;
050dfa73 3235 fourth = op4out;
252b5132 3236 op_ad = op_index[0];
050dfa73
MM		 3237 op_index[0] = op_index[3];
3238 op_index[3] = op_ad;
3239 op_ad = op_index[1];
3240 op_index[1] = op_index[2];
252b5132 3241 op_index[2] = op_ad;
050dfa73 3242
252b5132
RH		 3243 }
3244 else
3245 {
050dfa73
MM		 3246 first = op4out;
3247 second = op3out;
3248 third = op2out;
3249 fourth = op1out;
252b5132
RH		 3250 }
3251 needcomma = 0;
3252 if (*first)
3253 {
52b15da3 3254 if (op_index[0] != -1 && !op_riprel[0])
252b5132
RH		 3255 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
3256 else
3257 (*info->fprintf_func) (info->stream, "%s", first);
3258 needcomma = 1;
3259 }
050dfa73 3260
252b5132
RH		 3261 if (*second)
3262 {
3263 if (needcomma)
3264 (*info->fprintf_func) (info->stream, ",");
52b15da3 3265 if (op_index[1] != -1 && !op_riprel[1])
252b5132
RH		 3266 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
3267 else
3268 (*info->fprintf_func) (info->stream, "%s", second);
3269 needcomma = 1;
3270 }
050dfa73 3271
252b5132
RH		 3272 if (*third)
3273 {
3274 if (needcomma)
3275 (*info->fprintf_func) (info->stream, ",");
52b15da3 3276 if (op_index[2] != -1 && !op_riprel[2])
252b5132
RH		 3277 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
3278 else
3279 (*info->fprintf_func) (info->stream, "%s", third);
050dfa73
MM		 3280 needcomma = 1;
3281 }
3282
3283 if (*fourth)
3284 {
3285 if (needcomma)
3286 (*info->fprintf_func) (info->stream, ",");
3287 if (op_index[3] != -1 && !op_riprel[3])
3288 (*info->print_address_func) ((bfd_vma) op_address[op_index[3]], info);
3289 else
3290 (*info->fprintf_func) (info->stream, "%s", fourth);
252b5132 3291 }
050dfa73
MM		 3292
3293 for (i = 0; i < 4; i++)
52b15da3
JH		 3294 if (op_index[i] != -1 && op_riprel[i])
3295 {
3296 (*info->fprintf_func) (info->stream, " # ");
3297 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
3298 + op_address[op_index[i]]), info);
3299 }
e396998b 3300 return codep - priv.the_buffer;
252b5132
RH		 3301}
3302
6439fc28 3303static const char *float_mem[] = {
252b5132 3304 /* d8 */
6439fc28
AM		 3305 "fadd{s||s|}",
3306 "fmul{s||s|}",
3307 "fcom{s||s|}",
3308 "fcomp{s||s|}",
3309 "fsub{s||s|}",
3310 "fsubr{s||s|}",
3311 "fdiv{s||s|}",
3312 "fdivr{s||s|}",
db6eb5be 3313 /* d9 */
6439fc28 3314 "fld{s||s|}",
252b5132 3315 "(bad)",
6439fc28
AM		 3316 "fst{s||s|}",
3317 "fstp{s||s|}",
9306ca4a 3318 "fldenvIC",
252b5132 3319 "fldcw",
9306ca4a 3320 "fNstenvIC",
252b5132
RH		 3321 "fNstcw",
3322 /* da */
6439fc28
AM		 3323 "fiadd{l||l|}",
3324 "fimul{l||l|}",
3325 "ficom{l||l|}",
3326 "ficomp{l||l|}",
3327 "fisub{l||l|}",
3328 "fisubr{l||l|}",
3329 "fidiv{l||l|}",
3330 "fidivr{l||l|}",
252b5132 3331 /* db */
6439fc28 3332 "fild{l||l|}",
ca164297 3333 "fisttp{l||l|}",
6439fc28
AM		 3334 "fist{l||l|}",
3335 "fistp{l||l|}",
252b5132 3336 "(bad)",
6439fc28 3337 "fld{t||t|}",
252b5132 3338 "(bad)",
6439fc28 3339 "fstp{t||t|}",
252b5132 3340 /* dc */
6439fc28
AM		 3341 "fadd{l||l|}",
3342 "fmul{l||l|}",
3343 "fcom{l||l|}",
3344 "fcomp{l||l|}",
3345 "fsub{l||l|}",
3346 "fsubr{l||l|}",
3347 "fdiv{l||l|}",
3348 "fdivr{l||l|}",
252b5132 3349 /* dd */
6439fc28 3350 "fld{l||l|}",
1d9f512f 3351 "fisttp{ll||ll|}",
6439fc28
AM		 3352 "fst{l||l|}",
3353 "fstp{l||l|}",
9306ca4a 3354 "frstorIC",
252b5132 3355 "(bad)",
9306ca4a 3356 "fNsaveIC",
252b5132
RH		 3357 "fNstsw",
3358 /* de */
3359 "fiadd",
3360 "fimul",
3361 "ficom",
3362 "ficomp",
3363 "fisub",
3364 "fisubr",
3365 "fidiv",
3366 "fidivr",
3367 /* df */
3368 "fild",
ca164297 3369 "fisttp",
252b5132
RH		 3370 "fist",
3371 "fistp",
3372 "fbld",
6439fc28 3373 "fild{ll||ll|}",
252b5132 3374 "fbstp",
1d9f512f
AM		 3375 "fistp{ll||ll|}",
3376};
3377
3378static const unsigned char float_mem_mode[] = {
3379 /* d8 */
3380 d_mode,
3381 d_mode,
3382 d_mode,
3383 d_mode,
3384 d_mode,
3385 d_mode,
3386 d_mode,
3387 d_mode,
3388 /* d9 */
3389 d_mode,
3390 0,
3391 d_mode,
3392 d_mode,
3393 0,
3394 w_mode,
3395 0,
3396 w_mode,
3397 /* da */
3398 d_mode,
3399 d_mode,
3400 d_mode,
3401 d_mode,
3402 d_mode,
3403 d_mode,
3404 d_mode,
3405 d_mode,
3406 /* db */
3407 d_mode,
3408 d_mode,
3409 d_mode,
3410 d_mode,
3411 0,
9306ca4a 3412 t_mode,
1d9f512f 3413 0,
9306ca4a 3414 t_mode,
1d9f512f
AM		 3415 /* dc */
3416 q_mode,
3417 q_mode,
3418 q_mode,
3419 q_mode,
3420 q_mode,
3421 q_mode,
3422 q_mode,
3423 q_mode,
3424 /* dd */
3425 q_mode,
3426 q_mode,
3427 q_mode,
3428 q_mode,
3429 0,
3430 0,
3431 0,
3432 w_mode,
3433 /* de */
3434 w_mode,
3435 w_mode,
3436 w_mode,
3437 w_mode,
3438 w_mode,
3439 w_mode,
3440 w_mode,
3441 w_mode,
3442 /* df */
3443 w_mode,
3444 w_mode,
3445 w_mode,
3446 w_mode,
9306ca4a 3447 t_mode,
1d9f512f 3448 q_mode,
9306ca4a 3449 t_mode,
1d9f512f 3450 q_mode
252b5132
RH		 3451};
3452
3453#define ST OP_ST, 0
3454#define STi OP_STi, 0
3455
050dfa73
MM		 3456#define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0, NULL, 0
3457#define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0, NULL, 0
3458#define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0, NULL, 0
3459#define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0, NULL, 0
3460#define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0, NULL, 0
3461#define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0, NULL, 0
3462#define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0, NULL, 0
3463#define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0, NULL, 0
3464#define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0, NULL, 0
252b5132 3465
2da11e11 3466static const struct dis386 float_reg[][8] = {
252b5132
RH		 3467 /* d8 */
3468 {
050dfa73
MM		 3469 { "fadd", ST, STi, XX, XX },
3470 { "fmul", ST, STi, XX, XX },
3471 { "fcom", STi, XX, XX, XX },
3472 { "fcomp", STi, XX, XX, XX },
3473 { "fsub", ST, STi, XX, XX },
3474 { "fsubr", ST, STi, XX, XX },
3475 { "fdiv", ST, STi, XX, XX },
3476 { "fdivr", ST, STi, XX, XX },
252b5132
RH		 3477 },
3478 /* d9 */
3479 {
050dfa73
MM		 3480 { "fld", STi, XX, XX, XX },
3481 { "fxch", STi, XX, XX, XX },
252b5132 3482 { FGRPd9_2 },
050dfa73 3483 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3484 { FGRPd9_4 },
3485 { FGRPd9_5 },
3486 { FGRPd9_6 },
3487 { FGRPd9_7 },
3488 },
3489 /* da */
3490 {
050dfa73
MM		 3491 { "fcmovb", ST, STi, XX, XX },
3492 { "fcmove", ST, STi, XX, XX },
3493 { "fcmovbe",ST, STi, XX, XX },
3494 { "fcmovu", ST, STi, XX, XX },
3495 { "(bad)", XX, XX, XX, XX },
252b5132 3496 { FGRPda_5 },
050dfa73
MM		 3497 { "(bad)", XX, XX, XX, XX },
3498 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3499 },
3500 /* db */
3501 {
050dfa73
MM		 3502 { "fcmovnb",ST, STi, XX, XX },
3503 { "fcmovne",ST, STi, XX, XX },
3504 { "fcmovnbe",ST, STi, XX, XX },
3505 { "fcmovnu",ST, STi, XX, XX },
252b5132 3506 { FGRPdb_4 },
050dfa73
MM		 3507 { "fucomi", ST, STi, XX, XX },
3508 { "fcomi", ST, STi, XX, XX },
3509 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3510 },
3511 /* dc */
3512 {
050dfa73
MM		 3513 { "fadd", STi, ST, XX, XX },
3514 { "fmul", STi, ST, XX, XX },
3515 { "(bad)", XX, XX, XX, XX },
3516 { "(bad)", XX, XX, XX, XX },
252b5132 3517#if UNIXWARE_COMPAT
050dfa73
MM		 3518 { "fsub", STi, ST, XX, XX },
3519 { "fsubr", STi, ST, XX, XX },
3520 { "fdiv", STi, ST, XX, XX },
3521 { "fdivr", STi, ST, XX, XX },
252b5132 3522#else
050dfa73
MM		 3523 { "fsubr", STi, ST, XX, XX },
3524 { "fsub", STi, ST, XX, XX },
3525 { "fdivr", STi, ST, XX, XX },
3526 { "fdiv", STi, ST, XX, XX },
252b5132
RH		 3527#endif
3528 },
3529 /* dd */
3530 {
050dfa73
MM		 3531 { "ffree", STi, XX, XX, XX },
3532 { "(bad)", XX, XX, XX, XX },
3533 { "fst", STi, XX, XX, XX },
3534 { "fstp", STi, XX, XX, XX },
3535 { "fucom", STi, XX, XX, XX },
3536 { "fucomp", STi, XX, XX, XX },
3537 { "(bad)", XX, XX, XX, XX },
3538 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3539 },
3540 /* de */
3541 {
050dfa73
MM		 3542 { "faddp", STi, ST, XX, XX },
3543 { "fmulp", STi, ST, XX, XX },
3544 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3545 { FGRPde_3 },
3546#if UNIXWARE_COMPAT
050dfa73
MM		 3547 { "fsubp", STi, ST, XX, XX },
3548 { "fsubrp", STi, ST, XX, XX },
3549 { "fdivp", STi, ST, XX, XX },
3550 { "fdivrp", STi, ST, XX, XX },
252b5132 3551#else
050dfa73
MM		 3552 { "fsubrp", STi, ST, XX, XX },
3553 { "fsubp", STi, ST, XX, XX },
3554 { "fdivrp", STi, ST, XX, XX },
3555 { "fdivp", STi, ST, XX, XX },
252b5132
RH		 3556#endif
3557 },
3558 /* df */
3559 {
050dfa73
MM		 3560 { "ffreep", STi, XX, XX, XX },
3561 { "(bad)", XX, XX, XX, XX },
3562 { "(bad)", XX, XX, XX, XX },
3563 { "(bad)", XX, XX, XX, XX },
252b5132 3564 { FGRPdf_4 },
050dfa73
MM		 3565 { "fucomip",ST, STi, XX, XX },
3566 { "fcomip", ST, STi, XX, XX },
3567 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 3568 },
3569};
3570
252b5132
RH		 3571static char *fgrps[][8] = {
3572 /* d9_2 0 */
3573 {
3574 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3575 },
3576
3577 /* d9_4 1 */
3578 {
3579 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
3580 },
3581
3582 /* d9_5 2 */
3583 {
3584 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
3585 },
3586
3587 /* d9_6 3 */
3588 {
3589 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
3590 },
3591
3592 /* d9_7 4 */
3593 {
3594 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
3595 },
3596
3597 /* da_5 5 */
3598 {
3599 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3600 },
3601
3602 /* db_4 6 */
3603 {
3604 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
3605 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
3606 },
3607
3608 /* de_3 7 */
3609 {
3610 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3611 },
3612
3613 /* df_4 8 */
3614 {
3615 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3616 },
3617};
3618
3619static void
26ca5450 3620dofloat (int sizeflag)
252b5132 3621{
2da11e11 3622 const struct dis386 *dp;
252b5132
RH		 3623 unsigned char floatop;
3624
3625 floatop = codep[-1];
3626
3627 if (mod != 3)
3628 {
1d9f512f
AM		 3629 int fp_indx = (floatop - 0xd8) * 8 + reg;
3630
3631 putop (float_mem[fp_indx], sizeflag);
252b5132 3632 obufp = op1out;
6e50d963 3633 op_ad = 2;
1d9f512f 3634 OP_E (float_mem_mode[fp_indx], sizeflag);
252b5132
RH		 3635 return;
3636 }
6608db57 3637 /* Skip mod/rm byte. */
4bba6815 3638 MODRM_CHECK;
252b5132
RH		 3639 codep++;
3640
3641 dp = &float_reg[floatop - 0xd8][reg];
3642 if (dp->name == NULL)
3643 {
3644 putop (fgrps[dp->bytemode1][rm], sizeflag);
3645
6608db57 3646 /* Instruction fnstsw is only one with strange arg. */
252b5132
RH		 3647 if (floatop == 0xdf && codep[-1] == 0xe0)
3648 strcpy (op1out, names16[0]);
3649 }
3650 else
3651 {
3652 putop (dp->name, sizeflag);
3653
3654 obufp = op1out;
6e50d963 3655 op_ad = 2;
252b5132 3656 if (dp->op1)
6608db57 3657 (*dp->op1) (dp->bytemode1, sizeflag);
6e50d963 3658
252b5132 3659 obufp = op2out;
6e50d963 3660 op_ad = 1;
252b5132 3661 if (dp->op2)
6608db57 3662 (*dp->op2) (dp->bytemode2, sizeflag);
252b5132
RH		 3663 }
3664}
3665
252b5132 3666static void
26ca5450 3667OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 3668{
422673a9 3669 oappend ("%st" + intel_syntax);
252b5132
RH		 3670}
3671
252b5132 3672static void
26ca5450 3673OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 3674{
3675 sprintf (scratchbuf, "%%st(%d)", rm);
d708bcba 3676 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3677}
3678
6608db57 3679/* Capital letters in template are macros. */
6439fc28 3680static int
26ca5450 3681putop (const char *template, int sizeflag)
252b5132 3682{
2da11e11 3683 const char *p;
9306ca4a 3684 int alt = 0;
252b5132
RH		 3685
3686 for (p = template; *p; p++)
3687 {
3688 switch (*p)
3689 {
3690 default:
3691 *obufp++ = *p;
3692 break;
6439fc28
AM		 3693 case '{':
3694 alt = 0;
3695 if (intel_syntax)
3696 alt += 1;
cb712a9e 3697 if (address_mode == mode_64bit)
6439fc28
AM		 3698 alt += 2;
3699 while (alt != 0)
3700 {
3701 while (*++p != '|')
3702 {
3703 if (*p == '}')
3704 {
3705 /* Alternative not valid. */
3706 strcpy (obuf, "(bad)");
3707 obufp = obuf + 5;
3708 return 1;
3709 }
3710 else if (*p == '\0')
3711 abort ();
3712 }
3713 alt--;
3714 }
9306ca4a
JB		 3715 /* Fall through. */
3716 case 'I':
3717 alt = 1;
3718 continue;
6439fc28
AM		 3719 case '|':
3720 while (*++p != '}')
3721 {
3722 if (*p == '\0')
3723 abort ();
3724 }
3725 break;
3726 case '}':
3727 break;
252b5132 3728 case 'A':
db6eb5be
AM		 3729 if (intel_syntax)
3730 break;
e396998b 3731 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132
RH		 3732 *obufp++ = 'b';
3733 break;
3734 case 'B':
db6eb5be
AM		 3735 if (intel_syntax)
3736 break;
252b5132
RH		 3737 if (sizeflag & SUFFIX_ALWAYS)
3738 *obufp++ = 'b';
252b5132 3739 break;
9306ca4a
JB		 3740 case 'C':
3741 if (intel_syntax && !alt)
3742 break;
3743 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
3744 {
3745 if (sizeflag & DFLAG)
3746 *obufp++ = intel_syntax ? 'd' : 'l';
3747 else
3748 *obufp++ = intel_syntax ? 'w' : 's';
3749 used_prefixes |= (prefixes & PREFIX_DATA);
3750 }
3751 break;
ed7841b3
JB		 3752 case 'D':
3753 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
3754 break;
3755 USED_REX (REX_MODE64);
3756 if (mod == 3)
3757 {
3758 if (rex & REX_MODE64)
3759 *obufp++ = 'q';
3760 else if (sizeflag & DFLAG)
3761 *obufp++ = intel_syntax ? 'd' : 'l';
3762 else
3763 *obufp++ = 'w';
3764 used_prefixes |= (prefixes & PREFIX_DATA);
3765 }
3766 else
3767 *obufp++ = 'w';
3768 break;
252b5132 3769 case 'E': /* For jcxz/jecxz */
cb712a9e 3770 if (address_mode == mode_64bit)
c1a64871
JH		 3771 {
3772 if (sizeflag & AFLAG)
3773 *obufp++ = 'r';
3774 else
3775 *obufp++ = 'e';
3776 }
3777 else
3778 if (sizeflag & AFLAG)
3779 *obufp++ = 'e';
3ffd33cf
AM		 3780 used_prefixes |= (prefixes & PREFIX_ADDR);
3781 break;
3782 case 'F':
db6eb5be
AM		 3783 if (intel_syntax)
3784 break;
e396998b 3785 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
3ffd33cf
AM		 3786 {
3787 if (sizeflag & AFLAG)
cb712a9e 3788 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
3ffd33cf 3789 else
cb712a9e 3790 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
3ffd33cf
AM		 3791 used_prefixes |= (prefixes & PREFIX_ADDR);
3792 }
252b5132 3793 break;
52fd6d94
JB		 3794 case 'G':
3795 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
3796 break;
3797 if ((rex & REX_MODE64) || (sizeflag & DFLAG))
3798 *obufp++ = 'l';
3799 else
3800 *obufp++ = 'w';
3801 if (!(rex & REX_MODE64))
3802 used_prefixes |= (prefixes & PREFIX_DATA);
3803 break;
5dd0794d 3804 case 'H':
db6eb5be
AM		 3805 if (intel_syntax)
3806 break;
5dd0794d
AM		 3807 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
3808 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
3809 {
3810 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
3811 *obufp++ = ',';
3812 *obufp++ = 'p';
3813 if (prefixes & PREFIX_DS)
3814 *obufp++ = 't';
3815 else
3816 *obufp++ = 'n';
3817 }
3818 break;
9306ca4a
JB		 3819 case 'J':
3820 if (intel_syntax)
3821 break;
3822 *obufp++ = 'l';
3823 break;
6dd5059a
L		 3824 case 'Z':
3825 if (intel_syntax)
3826 break;
3827 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
3828 {
3829 *obufp++ = 'q';
3830 break;
3831 }
3832 /* Fall through. */
252b5132 3833 case 'L':
db6eb5be
AM		 3834 if (intel_syntax)
3835 break;
252b5132
RH		 3836 if (sizeflag & SUFFIX_ALWAYS)
3837 *obufp++ = 'l';
252b5132
RH		 3838 break;
3839 case 'N':
3840 if ((prefixes & PREFIX_FWAIT) == 0)
3841 *obufp++ = 'n';
7d421014
ILT		 3842 else
3843 used_prefixes |= PREFIX_FWAIT;
252b5132 3844 break;
52b15da3
JH		 3845 case 'O':
3846 USED_REX (REX_MODE64);
3847 if (rex & REX_MODE64)
6439fc28 3848 *obufp++ = 'o';
a35ca55a
JB		 3849 else if (intel_syntax && (sizeflag & DFLAG))
3850 *obufp++ = 'q';
52b15da3
JH		 3851 else
3852 *obufp++ = 'd';
a35ca55a
JB		 3853 if (!(rex & REX_MODE64))
3854 used_prefixes |= (prefixes & PREFIX_DATA);
52b15da3 3855 break;
6439fc28 3856 case 'T':
db6eb5be
AM		 3857 if (intel_syntax)
3858 break;
cb712a9e 3859 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28
AM		 3860 {
3861 *obufp++ = 'q';
3862 break;
3863 }
6608db57 3864 /* Fall through. */
252b5132 3865 case 'P':
db6eb5be
AM		 3866 if (intel_syntax)
3867 break;
252b5132 3868 if ((prefixes & PREFIX_DATA)
52b15da3 3869 || (rex & REX_MODE64)
e396998b 3870 || (sizeflag & SUFFIX_ALWAYS))
252b5132 3871 {
52b15da3
JH		 3872 USED_REX (REX_MODE64);
3873 if (rex & REX_MODE64)
3874 *obufp++ = 'q';
c2419411 3875 else
52b15da3
JH		 3876 {
3877 if (sizeflag & DFLAG)
3878 *obufp++ = 'l';
3879 else
3880 *obufp++ = 'w';
52b15da3 3881 }
1a114b12 3882 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3883 }
3884 break;
6439fc28 3885 case 'U':
db6eb5be
AM		 3886 if (intel_syntax)
3887 break;
cb712a9e 3888 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28 3889 {
1a114b12
JB		 3890 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
3891 *obufp++ = 'q';
6439fc28
AM		 3892 break;
3893 }
6608db57 3894 /* Fall through. */
252b5132 3895 case 'Q':
9306ca4a 3896 if (intel_syntax && !alt)
db6eb5be 3897 break;
90530880 3898 USED_REX (REX_MODE64);
e396998b 3899 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132 3900 {
52b15da3
JH		 3901 if (rex & REX_MODE64)
3902 *obufp++ = 'q';
252b5132 3903 else
52b15da3
JH		 3904 {
3905 if (sizeflag & DFLAG)
9306ca4a 3906 *obufp++ = intel_syntax ? 'd' : 'l';
52b15da3
JH		 3907 else
3908 *obufp++ = 'w';
52b15da3 3909 }
1a114b12 3910 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3911 }
3912 break;
3913 case 'R':
52b15da3 3914 USED_REX (REX_MODE64);
a35ca55a
JB		 3915 if (rex & REX_MODE64)
3916 *obufp++ = 'q';
3917 else if (sizeflag & DFLAG)
c608c12e 3918 {
a35ca55a 3919 if (intel_syntax)
c608c12e 3920 *obufp++ = 'd';
c608c12e 3921 else
a35ca55a 3922 *obufp++ = 'l';
c608c12e 3923 }
252b5132 3924 else
a35ca55a
JB		 3925 *obufp++ = 'w';
3926 if (intel_syntax && !p[1]
3927 && ((rex & REX_MODE64) || (sizeflag & DFLAG)))
3928 *obufp++ = 'e';
52b15da3
JH		 3929 if (!(rex & REX_MODE64))
3930 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 3931 break;
1a114b12
JB		 3932 case 'V':
3933 if (intel_syntax)
3934 break;
cb712a9e 3935 if (address_mode == mode_64bit && (sizeflag & DFLAG))
1a114b12
JB		 3936 {
3937 if (sizeflag & SUFFIX_ALWAYS)
3938 *obufp++ = 'q';
3939 break;
3940 }
3941 /* Fall through. */
252b5132 3942 case 'S':
db6eb5be
AM		 3943 if (intel_syntax)
3944 break;
252b5132
RH		 3945 if (sizeflag & SUFFIX_ALWAYS)
3946 {
52b15da3
JH		 3947 if (rex & REX_MODE64)
3948 *obufp++ = 'q';
252b5132 3949 else
52b15da3
JH		 3950 {
3951 if (sizeflag & DFLAG)
3952 *obufp++ = 'l';
3953 else
3954 *obufp++ = 'w';
3955 used_prefixes |= (prefixes & PREFIX_DATA);
3956 }
252b5132 3957 }
252b5132 3958 break;
041bd2e0
JH		 3959 case 'X':
3960 if (prefixes & PREFIX_DATA)
3961 *obufp++ = 'd';
3962 else
3963 *obufp++ = 's';
db6eb5be 3964 used_prefixes |= (prefixes & PREFIX_DATA);
041bd2e0 3965 break;
76f227a5 3966 case 'Y':
db6eb5be
AM		 3967 if (intel_syntax)
3968 break;
76f227a5
JH		 3969 if (rex & REX_MODE64)
3970 {
3971 USED_REX (REX_MODE64);
3972 *obufp++ = 'q';
3973 }
3974 break;
52b15da3 3975 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
252b5132 3976 case 'W':
252b5132 3977 /* operand size flag for cwtl, cbtw */
a35ca55a
JB		 3978 USED_REX (REX_MODE64);
3979 if (rex & REX_MODE64)
3980 {
3981 if (intel_syntax)
3982 *obufp++ = 'd';
3983 else
3984 *obufp++ = 'l';
3985 }
52b15da3 3986 else if (sizeflag & DFLAG)
252b5132
RH		 3987 *obufp++ = 'w';
3988 else
3989 *obufp++ = 'b';
a35ca55a 3990 if (!(rex & REX_MODE64))
52b15da3 3991 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3992 break;
3993 }
9306ca4a 3994 alt = 0;
252b5132
RH		 3995 }
3996 *obufp = 0;
6439fc28 3997 return 0;
252b5132
RH		 3998}
3999
4000static void
26ca5450 4001oappend (const char *s)
252b5132
RH		 4002{
4003 strcpy (obufp, s);
4004 obufp += strlen (s);
4005}
4006
4007static void
26ca5450 4008append_seg (void)
252b5132
RH		 4009{
4010 if (prefixes & PREFIX_CS)
7d421014 4011 {
7d421014 4012 used_prefixes |= PREFIX_CS;
d708bcba 4013 oappend ("%cs:" + intel_syntax);
7d421014 4014 }
252b5132 4015 if (prefixes & PREFIX_DS)
7d421014 4016 {
7d421014 4017 used_prefixes |= PREFIX_DS;
d708bcba 4018 oappend ("%ds:" + intel_syntax);
7d421014 4019 }
252b5132 4020 if (prefixes & PREFIX_SS)
7d421014 4021 {
7d421014 4022 used_prefixes |= PREFIX_SS;
d708bcba 4023 oappend ("%ss:" + intel_syntax);
7d421014 4024 }
252b5132 4025 if (prefixes & PREFIX_ES)
7d421014 4026 {
7d421014 4027 used_prefixes |= PREFIX_ES;
d708bcba 4028 oappend ("%es:" + intel_syntax);
7d421014 4029 }
252b5132 4030 if (prefixes & PREFIX_FS)
7d421014 4031 {
7d421014 4032 used_prefixes |= PREFIX_FS;
d708bcba 4033 oappend ("%fs:" + intel_syntax);
7d421014 4034 }
252b5132 4035 if (prefixes & PREFIX_GS)
7d421014 4036 {
7d421014 4037 used_prefixes |= PREFIX_GS;
d708bcba 4038 oappend ("%gs:" + intel_syntax);
7d421014 4039 }
252b5132
RH		 4040}
4041
4042static void
26ca5450 4043OP_indirE (int bytemode, int sizeflag)
252b5132
RH		 4044{
4045 if (!intel_syntax)
4046 oappend ("*");
4047 OP_E (bytemode, sizeflag);
4048}
4049
52b15da3 4050static void
26ca5450 4051print_operand_value (char *buf, int hex, bfd_vma disp)
52b15da3 4052{
cb712a9e 4053 if (address_mode == mode_64bit)
52b15da3
JH		 4054 {
4055 if (hex)
4056 {
4057 char tmp[30];
4058 int i;
4059 buf[0] = '0';
4060 buf[1] = 'x';
4061 sprintf_vma (tmp, disp);
6608db57 4062 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
52b15da3
JH		 4063 strcpy (buf + 2, tmp + i);
4064 }
4065 else
4066 {
4067 bfd_signed_vma v = disp;
4068 char tmp[30];
4069 int i;
4070 if (v < 0)
4071 {
4072 *(buf++) = '-';
4073 v = -disp;
6608db57 4074 /* Check for possible overflow on 0x8000000000000000. */
52b15da3
JH		 4075 if (v < 0)
4076 {
4077 strcpy (buf, "9223372036854775808");
4078 return;
4079 }
4080 }
4081 if (!v)
4082 {
4083 strcpy (buf, "0");
4084 return;
4085 }
4086
4087 i = 0;
4088 tmp[29] = 0;
4089 while (v)
4090 {
6608db57 4091 tmp[28 - i] = (v % 10) + '0';
52b15da3
JH		 4092 v /= 10;
4093 i++;
4094 }
4095 strcpy (buf, tmp + 29 - i);
4096 }
4097 }
4098 else
4099 {
4100 if (hex)
4101 sprintf (buf, "0x%x", (unsigned int) disp);
4102 else
4103 sprintf (buf, "%d", (int) disp);
4104 }
4105}
4106
3f31e633
JB		 4107static void
4108intel_operand_size (int bytemode, int sizeflag)
4109{
4110 switch (bytemode)
4111 {
4112 case b_mode:
4113 oappend ("BYTE PTR ");
4114 break;
4115 case w_mode:
4116 case dqw_mode:
4117 oappend ("WORD PTR ");
4118 break;
1a114b12 4119 case stack_v_mode:
cb712a9e 4120 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3f31e633
JB		 4121 {
4122 oappend ("QWORD PTR ");
4123 used_prefixes |= (prefixes & PREFIX_DATA);
4124 break;
4125 }
4126 /* FALLTHRU */
4127 case v_mode:
4128 case dq_mode:
4129 USED_REX (REX_MODE64);
4130 if (rex & REX_MODE64)
4131 oappend ("QWORD PTR ");
4132 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
4133 oappend ("DWORD PTR ");
4134 else
4135 oappend ("WORD PTR ");
4136 used_prefixes |= (prefixes & PREFIX_DATA);
4137 break;
52fd6d94
JB		 4138 case z_mode:
4139 if ((rex & REX_MODE64) || (sizeflag & DFLAG))
4140 *obufp++ = 'D';
4141 oappend ("WORD PTR ");
4142 if (!(rex & REX_MODE64))
4143 used_prefixes |= (prefixes & PREFIX_DATA);
4144 break;
3f31e633
JB		 4145 case d_mode:
4146 oappend ("DWORD PTR ");
4147 break;
4148 case q_mode:
4149 oappend ("QWORD PTR ");
4150 break;
4151 case m_mode:
cb712a9e 4152 if (address_mode == mode_64bit)
3f31e633
JB		 4153 oappend ("QWORD PTR ");
4154 else
4155 oappend ("DWORD PTR ");
4156 break;
4157 case f_mode:
4158 if (sizeflag & DFLAG)
4159 oappend ("FWORD PTR ");
4160 else
4161 oappend ("DWORD PTR ");
4162 used_prefixes |= (prefixes & PREFIX_DATA);
4163 break;
4164 case t_mode:
4165 oappend ("TBYTE PTR ");
4166 break;
4167 case x_mode:
4168 oappend ("XMMWORD PTR ");
4169 break;
4170 default:
4171 break;
4172 }
4173}
4174
252b5132 4175static void
26ca5450 4176OP_E (int bytemode, int sizeflag)
252b5132 4177{
52b15da3
JH		 4178 bfd_vma disp;
4179 int add = 0;
4180 int riprel = 0;
4181 USED_REX (REX_EXTZ);
4182 if (rex & REX_EXTZ)
4183 add += 8;
252b5132 4184
6608db57 4185 /* Skip mod/rm byte. */
4bba6815 4186 MODRM_CHECK;
252b5132
RH		 4187 codep++;
4188
4189 if (mod == 3)
4190 {
4191 switch (bytemode)
4192 {
4193 case b_mode:
52b15da3
JH		 4194 USED_REX (0);
4195 if (rex)
4196 oappend (names8rex[rm + add]);
4197 else
4198 oappend (names8[rm + add]);
252b5132
RH		 4199 break;
4200 case w_mode:
52b15da3 4201 oappend (names16[rm + add]);
252b5132 4202 break;
2da11e11 4203 case d_mode:
52b15da3
JH		 4204 oappend (names32[rm + add]);
4205 break;
4206 case q_mode:
4207 oappend (names64[rm + add]);
4208 break;
4209 case m_mode:
cb712a9e 4210 if (address_mode == mode_64bit)
52b15da3
JH		 4211 oappend (names64[rm + add]);
4212 else
4213 oappend (names32[rm + add]);
2da11e11 4214 break;
1a114b12 4215 case stack_v_mode:
cb712a9e 4216 if (address_mode == mode_64bit && (sizeflag & DFLAG))
003519a7 4217 {
1a114b12 4218 oappend (names64[rm + add]);
003519a7 4219 used_prefixes |= (prefixes & PREFIX_DATA);
1a114b12 4220 break;
003519a7 4221 }
1a114b12
JB		 4222 bytemode = v_mode;
4223 /* FALLTHRU */
252b5132 4224 case v_mode:
db6eb5be 4225 case dq_mode:
9306ca4a 4226 case dqw_mode:
52b15da3
JH		 4227 USED_REX (REX_MODE64);
4228 if (rex & REX_MODE64)
4229 oappend (names64[rm + add]);
9306ca4a 4230 else if ((sizeflag & DFLAG) || bytemode != v_mode)
52b15da3 4231 oappend (names32[rm + add]);
252b5132 4232 else
52b15da3 4233 oappend (names16[rm + add]);
7d421014 4234 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4235 break;
2da11e11 4236 case 0:
c608c12e 4237 break;
252b5132 4238 default:
c608c12e 4239 oappend (INTERNAL_DISASSEMBLER_ERROR);
252b5132
RH		 4240 break;
4241 }
4242 return;
4243 }
4244
4245 disp = 0;
3f31e633
JB		 4246 if (intel_syntax)
4247 intel_operand_size (bytemode, sizeflag);
252b5132
RH		 4248 append_seg ();
4249
cb712a9e 4250 if ((sizeflag & AFLAG) || address_mode == mode_64bit) /* 32 bit address mode */
252b5132
RH		 4251 {
4252 int havesib;
4253 int havebase;
4254 int base;
4255 int index = 0;
4256 int scale = 0;
4257
4258 havesib = 0;
4259 havebase = 1;
4260 base = rm;
4261
4262 if (base == 4)
4263 {
4264 havesib = 1;
4265 FETCH_DATA (the_info, codep + 1);
252b5132 4266 index = (*codep >> 3) & 7;
cb712a9e 4267 if (address_mode == mode_64bit || index != 0x4)
9df48ba9 4268 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
2033b4b9 4269 scale = (*codep >> 6) & 3;
252b5132 4270 base = *codep & 7;
52b15da3 4271 USED_REX (REX_EXTY);
52b15da3
JH		 4272 if (rex & REX_EXTY)
4273 index += 8;
252b5132
RH		 4274 codep++;
4275 }
2888cb7a 4276 base += add;
252b5132
RH		 4277
4278 switch (mod)
4279 {
4280 case 0:
52b15da3 4281 if ((base & 7) == 5)
252b5132
RH		 4282 {
4283 havebase = 0;
cb712a9e 4284 if (address_mode == mode_64bit && !havesib)
52b15da3
JH		 4285 riprel = 1;
4286 disp = get32s ();
252b5132
RH		 4287 }
4288 break;
4289 case 1:
4290 FETCH_DATA (the_info, codep + 1);
4291 disp = *codep++;
4292 if ((disp & 0x80) != 0)
4293 disp -= 0x100;
4294 break;
4295 case 2:
52b15da3 4296 disp = get32s ();
252b5132
RH		 4297 break;
4298 }
4299
4300 if (!intel_syntax)
db6eb5be
AM		 4301 if (mod != 0 || (base & 7) == 5)
4302 {
52b15da3 4303 print_operand_value (scratchbuf, !riprel, disp);
db6eb5be 4304 oappend (scratchbuf);
52b15da3
JH		 4305 if (riprel)
4306 {
4307 set_op (disp, 1);
4308 oappend ("(%rip)");
4309 }
db6eb5be 4310 }
2da11e11 4311
252b5132
RH		 4312 if (havebase || (havesib && (index != 4 || scale != 0)))
4313 {
252b5132 4314 *obufp++ = open_char;
52b15da3
JH		 4315 if (intel_syntax && riprel)
4316 oappend ("rip + ");
db6eb5be 4317 *obufp = '\0';
252b5132 4318 if (havebase)
cb712a9e 4319 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
c1a64871 4320 ? names64[base] : names32[base]);
252b5132
RH		 4321 if (havesib)
4322 {
4323 if (index != 4)
4324 {
9306ca4a 4325 if (!intel_syntax || havebase)
db6eb5be 4326 {
9306ca4a
JB		 4327 *obufp++ = separator_char;
4328 *obufp = '\0';
db6eb5be 4329 }
cb712a9e 4330 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
9306ca4a 4331 ? names64[index] : names32[index]);
252b5132 4332 }
a02a862a 4333 if (scale != 0 || (!intel_syntax && index != 4))
db6eb5be
AM		 4334 {
4335 *obufp++ = scale_char;
4336 *obufp = '\0';
4337 sprintf (scratchbuf, "%d", 1 << scale);
4338 oappend (scratchbuf);
4339 }
252b5132 4340 }
3d456fa1
JB		 4341 if (intel_syntax && disp)
4342 {
4343 if ((bfd_signed_vma) disp > 0)
4344 {
4345 *obufp++ = '+';
4346 *obufp = '\0';
4347 }
4348 else if (mod != 1)
4349 {
4350 *obufp++ = '-';
4351 *obufp = '\0';
4352 disp = - (bfd_signed_vma) disp;
4353 }
4354
4355 print_operand_value (scratchbuf, mod != 1, disp);
4356 oappend (scratchbuf);
4357 }
252b5132
RH		 4358
4359 *obufp++ = close_char;
db6eb5be 4360 *obufp = '\0';
252b5132
RH		 4361 }
4362 else if (intel_syntax)
db6eb5be
AM		 4363 {
4364 if (mod != 0 || (base & 7) == 5)
4365 {
252b5132
RH		 4366 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4367 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
4368 ;
4369 else
4370 {
d708bcba 4371 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 4372 oappend (":");
4373 }
52b15da3 4374 print_operand_value (scratchbuf, 1, disp);
db6eb5be
AM		 4375 oappend (scratchbuf);
4376 }
4377 }
252b5132
RH		 4378 }
4379 else
4380 { /* 16 bit address mode */
4381 switch (mod)
4382 {
4383 case 0:
2888cb7a 4384 if (rm == 6)
252b5132
RH		 4385 {
4386 disp = get16 ();
4387 if ((disp & 0x8000) != 0)
4388 disp -= 0x10000;
4389 }
4390 break;
4391 case 1:
4392 FETCH_DATA (the_info, codep + 1);
4393 disp = *codep++;
4394 if ((disp & 0x80) != 0)
4395 disp -= 0x100;
4396 break;
4397 case 2:
4398 disp = get16 ();
4399 if ((disp & 0x8000) != 0)
4400 disp -= 0x10000;
4401 break;
4402 }
4403
4404 if (!intel_syntax)
2888cb7a 4405 if (mod != 0 || rm == 6)
db6eb5be 4406 {
52b15da3 4407 print_operand_value (scratchbuf, 0, disp);
db6eb5be
AM		 4408 oappend (scratchbuf);
4409 }
252b5132 4410
2888cb7a 4411 if (mod != 0 || rm != 6)
252b5132
RH		 4412 {
4413 *obufp++ = open_char;
db6eb5be 4414 *obufp = '\0';
3d456fa1
JB		 4415 oappend (index16[rm]);
4416 if (intel_syntax && disp)
4417 {
4418 if ((bfd_signed_vma) disp > 0)
4419 {
4420 *obufp++ = '+';
4421 *obufp = '\0';
4422 }
4423 else if (mod != 1)
4424 {
4425 *obufp++ = '-';
4426 *obufp = '\0';
4427 disp = - (bfd_signed_vma) disp;
4428 }
4429
4430 print_operand_value (scratchbuf, mod != 1, disp);
4431 oappend (scratchbuf);
4432 }
4433
db6eb5be
AM		 4434 *obufp++ = close_char;
4435 *obufp = '\0';
252b5132 4436 }
3d456fa1
JB		 4437 else if (intel_syntax)
4438 {
4439 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4440 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
4441 ;
4442 else
4443 {
4444 oappend (names_seg[ds_reg - es_reg]);
4445 oappend (":");
4446 }
4447 print_operand_value (scratchbuf, 1, disp & 0xffff);
4448 oappend (scratchbuf);
4449 }
252b5132
RH		 4450 }
4451}
4452
252b5132 4453static void
26ca5450 4454OP_G (int bytemode, int sizeflag)
252b5132 4455{
52b15da3
JH		 4456 int add = 0;
4457 USED_REX (REX_EXTX);
4458 if (rex & REX_EXTX)
4459 add += 8;
252b5132
RH		 4460 switch (bytemode)
4461 {
4462 case b_mode:
52b15da3
JH		 4463 USED_REX (0);
4464 if (rex)
4465 oappend (names8rex[reg + add]);
4466 else
4467 oappend (names8[reg + add]);
252b5132
RH		 4468 break;
4469 case w_mode:
52b15da3 4470 oappend (names16[reg + add]);
252b5132
RH		 4471 break;
4472 case d_mode:
52b15da3
JH		 4473 oappend (names32[reg + add]);
4474 break;
4475 case q_mode:
4476 oappend (names64[reg + add]);
252b5132
RH		 4477 break;
4478 case v_mode:
9306ca4a
JB		 4479 case dq_mode:
4480 case dqw_mode:
52b15da3
JH		 4481 USED_REX (REX_MODE64);
4482 if (rex & REX_MODE64)
4483 oappend (names64[reg + add]);
9306ca4a 4484 else if ((sizeflag & DFLAG) || bytemode != v_mode)
52b15da3 4485 oappend (names32[reg + add]);
252b5132 4486 else
52b15da3 4487 oappend (names16[reg + add]);
7d421014 4488 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4489 break;
90700ea2 4490 case m_mode:
cb712a9e 4491 if (address_mode == mode_64bit)
90700ea2
L		 4492 oappend (names64[reg + add]);
4493 else
4494 oappend (names32[reg + add]);
4495 break;
252b5132
RH		 4496 default:
4497 oappend (INTERNAL_DISASSEMBLER_ERROR);
4498 break;
4499 }
4500}
4501
52b15da3 4502static bfd_vma
26ca5450 4503get64 (void)
52b15da3 4504{
5dd0794d 4505 bfd_vma x;
52b15da3 4506#ifdef BFD64
5dd0794d
AM		 4507 unsigned int a;
4508 unsigned int b;
4509
52b15da3
JH		 4510 FETCH_DATA (the_info, codep + 8);
4511 a = *codep++ & 0xff;
4512 a |= (*codep++ & 0xff) << 8;
4513 a |= (*codep++ & 0xff) << 16;
4514 a |= (*codep++ & 0xff) << 24;
5dd0794d 4515 b = *codep++ & 0xff;
52b15da3
JH		 4516 b |= (*codep++ & 0xff) << 8;
4517 b |= (*codep++ & 0xff) << 16;
4518 b |= (*codep++ & 0xff) << 24;
4519 x = a + ((bfd_vma) b << 32);
4520#else
6608db57 4521 abort ();
5dd0794d 4522 x = 0;
52b15da3
JH		 4523#endif
4524 return x;
4525}
4526
4527static bfd_signed_vma
26ca5450 4528get32 (void)
252b5132 4529{
52b15da3 4530 bfd_signed_vma x = 0;
252b5132
RH		 4531
4532 FETCH_DATA (the_info, codep + 4);
52b15da3
JH		 4533 x = *codep++ & (bfd_signed_vma) 0xff;
4534 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4535 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4536 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4537 return x;
4538}
4539
4540static bfd_signed_vma
26ca5450 4541get32s (void)
52b15da3
JH		 4542{
4543 bfd_signed_vma x = 0;
4544
4545 FETCH_DATA (the_info, codep + 4);
4546 x = *codep++ & (bfd_signed_vma) 0xff;
4547 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4548 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4549 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4550
4551 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
4552
252b5132
RH		 4553 return x;
4554}
4555
4556static int
26ca5450 4557get16 (void)
252b5132
RH		 4558{
4559 int x = 0;
4560
4561 FETCH_DATA (the_info, codep + 2);
4562 x = *codep++ & 0xff;
4563 x |= (*codep++ & 0xff) << 8;
4564 return x;
4565}
4566
4567static void
26ca5450 4568set_op (bfd_vma op, int riprel)
252b5132
RH		 4569{
4570 op_index[op_ad] = op_ad;
cb712a9e 4571 if (address_mode == mode_64bit)
7081ff04
AJ		 4572 {
4573 op_address[op_ad] = op;
4574 op_riprel[op_ad] = riprel;
4575 }
4576 else
4577 {
4578 /* Mask to get a 32-bit address. */
4579 op_address[op_ad] = op & 0xffffffff;
4580 op_riprel[op_ad] = riprel & 0xffffffff;
4581 }
252b5132
RH		 4582}
4583
4584static void
26ca5450 4585OP_REG (int code, int sizeflag)
252b5132 4586{
2da11e11 4587 const char *s;
52b15da3
JH		 4588 int add = 0;
4589 USED_REX (REX_EXTZ);
4590 if (rex & REX_EXTZ)
4591 add = 8;
4592
4593 switch (code)
4594 {
52b15da3
JH		 4595 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4596 case sp_reg: case bp_reg: case si_reg: case di_reg:
4597 s = names16[code - ax_reg + add];
4598 break;
4599 case es_reg: case ss_reg: case cs_reg:
4600 case ds_reg: case fs_reg: case gs_reg:
4601 s = names_seg[code - es_reg + add];
4602 break;
4603 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4604 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
4605 USED_REX (0);
4606 if (rex)
4607 s = names8rex[code - al_reg + add];
4608 else
4609 s = names8[code - al_reg];
4610 break;
6439fc28
AM		 4611 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
4612 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
cb712a9e 4613 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28
AM		 4614 {
4615 s = names64[code - rAX_reg + add];
4616 break;
4617 }
4618 code += eAX_reg - rAX_reg;
6608db57 4619 /* Fall through. */
52b15da3
JH		 4620 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4621 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
4622 USED_REX (REX_MODE64);
4623 if (rex & REX_MODE64)
4624 s = names64[code - eAX_reg + add];
4625 else if (sizeflag & DFLAG)
4626 s = names32[code - eAX_reg + add];
4627 else
4628 s = names16[code - eAX_reg + add];
4629 used_prefixes |= (prefixes & PREFIX_DATA);
4630 break;
52b15da3
JH		 4631 default:
4632 s = INTERNAL_DISASSEMBLER_ERROR;
4633 break;
4634 }
4635 oappend (s);
4636}
4637
4638static void
26ca5450 4639OP_IMREG (int code, int sizeflag)
52b15da3
JH		 4640{
4641 const char *s;
252b5132
RH		 4642
4643 switch (code)
4644 {
4645 case indir_dx_reg:
d708bcba 4646 if (intel_syntax)
52fd6d94 4647 s = "dx";
d708bcba 4648 else
db6eb5be 4649 s = "(%dx)";
252b5132
RH		 4650 break;
4651 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4652 case sp_reg: case bp_reg: case si_reg: case di_reg:
4653 s = names16[code - ax_reg];
4654 break;
4655 case es_reg: case ss_reg: case cs_reg:
4656 case ds_reg: case fs_reg: case gs_reg:
4657 s = names_seg[code - es_reg];
4658 break;
4659 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4660 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
52b15da3
JH		 4661 USED_REX (0);
4662 if (rex)
4663 s = names8rex[code - al_reg];
4664 else
4665 s = names8[code - al_reg];
252b5132
RH		 4666 break;
4667 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4668 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
52b15da3
JH		 4669 USED_REX (REX_MODE64);
4670 if (rex & REX_MODE64)
4671 s = names64[code - eAX_reg];
4672 else if (sizeflag & DFLAG)
252b5132
RH		 4673 s = names32[code - eAX_reg];
4674 else
4675 s = names16[code - eAX_reg];
7d421014 4676 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4677 break;
52fd6d94
JB		 4678 case z_mode_ax_reg:
4679 if ((rex & REX_MODE64) || (sizeflag & DFLAG))
4680 s = *names32;
4681 else
4682 s = *names16;
4683 if (!(rex & REX_MODE64))
4684 used_prefixes |= (prefixes & PREFIX_DATA);
4685 break;
252b5132
RH		 4686 default:
4687 s = INTERNAL_DISASSEMBLER_ERROR;
4688 break;
4689 }
4690 oappend (s);
4691}
4692
4693static void
26ca5450 4694OP_I (int bytemode, int sizeflag)
252b5132 4695{
52b15da3
JH		 4696 bfd_signed_vma op;
4697 bfd_signed_vma mask = -1;
252b5132
RH		 4698
4699 switch (bytemode)
4700 {
4701 case b_mode:
4702 FETCH_DATA (the_info, codep + 1);
52b15da3
JH		 4703 op = *codep++;
4704 mask = 0xff;
4705 break;
4706 case q_mode:
cb712a9e 4707 if (address_mode == mode_64bit)
6439fc28
AM		 4708 {
4709 op = get32s ();
4710 break;
4711 }
6608db57 4712 /* Fall through. */
252b5132 4713 case v_mode:
52b15da3
JH		 4714 USED_REX (REX_MODE64);
4715 if (rex & REX_MODE64)
4716 op = get32s ();
4717 else if (sizeflag & DFLAG)
4718 {
4719 op = get32 ();
4720 mask = 0xffffffff;
4721 }
252b5132 4722 else
52b15da3
JH		 4723 {
4724 op = get16 ();
4725 mask = 0xfffff;
4726 }
7d421014 4727 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4728 break;
4729 case w_mode:
52b15da3 4730 mask = 0xfffff;
252b5132
RH		 4731 op = get16 ();
4732 break;
9306ca4a
JB		 4733 case const_1_mode:
4734 if (intel_syntax)
4735 oappend ("1");
4736 return;
252b5132
RH		 4737 default:
4738 oappend (INTERNAL_DISASSEMBLER_ERROR);
4739 return;
4740 }
4741
52b15da3
JH		 4742 op &= mask;
4743 scratchbuf[0] = '$';
d708bcba
AM		 4744 print_operand_value (scratchbuf + 1, 1, op);
4745 oappend (scratchbuf + intel_syntax);
52b15da3
JH		 4746 scratchbuf[0] = '\0';
4747}
4748
4749static void
26ca5450 4750OP_I64 (int bytemode, int sizeflag)
52b15da3
JH		 4751{
4752 bfd_signed_vma op;
4753 bfd_signed_vma mask = -1;
4754
cb712a9e 4755 if (address_mode != mode_64bit)
6439fc28
AM		 4756 {
4757 OP_I (bytemode, sizeflag);
4758 return;
4759 }
4760
52b15da3
JH		 4761 switch (bytemode)
4762 {
4763 case b_mode:
4764 FETCH_DATA (the_info, codep + 1);
4765 op = *codep++;
4766 mask = 0xff;
4767 break;
4768 case v_mode:
4769 USED_REX (REX_MODE64);
4770 if (rex & REX_MODE64)
4771 op = get64 ();
4772 else if (sizeflag & DFLAG)
4773 {
4774 op = get32 ();
4775 mask = 0xffffffff;
4776 }
4777 else
4778 {
4779 op = get16 ();
4780 mask = 0xfffff;
4781 }
4782 used_prefixes |= (prefixes & PREFIX_DATA);
4783 break;
4784 case w_mode:
4785 mask = 0xfffff;
4786 op = get16 ();
4787 break;
4788 default:
4789 oappend (INTERNAL_DISASSEMBLER_ERROR);
4790 return;
4791 }
4792
4793 op &= mask;
4794 scratchbuf[0] = '$';
d708bcba
AM		 4795 print_operand_value (scratchbuf + 1, 1, op);
4796 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4797 scratchbuf[0] = '\0';
4798}
4799
4800static void
26ca5450 4801OP_sI (int bytemode, int sizeflag)
252b5132 4802{
52b15da3
JH		 4803 bfd_signed_vma op;
4804 bfd_signed_vma mask = -1;
252b5132
RH		 4805
4806 switch (bytemode)
4807 {
4808 case b_mode:
4809 FETCH_DATA (the_info, codep + 1);
4810 op = *codep++;
4811 if ((op & 0x80) != 0)
4812 op -= 0x100;
52b15da3 4813 mask = 0xffffffff;
252b5132
RH		 4814 break;
4815 case v_mode:
52b15da3
JH		 4816 USED_REX (REX_MODE64);
4817 if (rex & REX_MODE64)
4818 op = get32s ();
4819 else if (sizeflag & DFLAG)
4820 {
4821 op = get32s ();
4822 mask = 0xffffffff;
4823 }
252b5132
RH		 4824 else
4825 {
52b15da3 4826 mask = 0xffffffff;
6608db57 4827 op = get16 ();
252b5132
RH		 4828 if ((op & 0x8000) != 0)
4829 op -= 0x10000;
4830 }
7d421014 4831 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4832 break;
4833 case w_mode:
4834 op = get16 ();
52b15da3 4835 mask = 0xffffffff;
252b5132
RH		 4836 if ((op & 0x8000) != 0)
4837 op -= 0x10000;
4838 break;
4839 default:
4840 oappend (INTERNAL_DISASSEMBLER_ERROR);
4841 return;
4842 }
52b15da3
JH		 4843
4844 scratchbuf[0] = '$';
4845 print_operand_value (scratchbuf + 1, 1, op);
d708bcba 4846 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4847}
4848
4849static void
26ca5450 4850OP_J (int bytemode, int sizeflag)
252b5132 4851{
52b15da3 4852 bfd_vma disp;
7081ff04 4853 bfd_vma mask = -1;
252b5132
RH		 4854
4855 switch (bytemode)
4856 {
4857 case b_mode:
4858 FETCH_DATA (the_info, codep + 1);
4859 disp = *codep++;
4860 if ((disp & 0x80) != 0)
4861 disp -= 0x100;
4862 break;
4863 case v_mode:
1a114b12 4864 if ((sizeflag & DFLAG) || (rex & REX_MODE64))
52b15da3 4865 disp = get32s ();
252b5132
RH		 4866 else
4867 {
4868 disp = get16 ();
6608db57 4869 /* For some reason, a data16 prefix on a jump instruction
252b5132
RH		 4870 means that the pc is masked to 16 bits after the
4871 displacement is added! */
4872 mask = 0xffff;
4873 }
d807a492 4874 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4875 break;
4876 default:
4877 oappend (INTERNAL_DISASSEMBLER_ERROR);
4878 return;
4879 }
4880 disp = (start_pc + codep - start_codep + disp) & mask;
52b15da3
JH		 4881 set_op (disp, 0);
4882 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 4883 oappend (scratchbuf);
4884}
4885
252b5132 4886static void
ed7841b3 4887OP_SEG (int bytemode, int sizeflag)
252b5132 4888{
ed7841b3
JB		 4889 if (bytemode == w_mode)
4890 oappend (names_seg[reg]);
4891 else
4892 OP_E (mod == 3 ? bytemode : w_mode, sizeflag);
252b5132
RH		 4893}
4894
4895static void
26ca5450 4896OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
252b5132
RH		 4897{
4898 int seg, offset;
4899
c608c12e 4900 if (sizeflag & DFLAG)
252b5132 4901 {
c608c12e
AM		 4902 offset = get32 ();
4903 seg = get16 ();
252b5132 4904 }
c608c12e
AM		 4905 else
4906 {
4907 offset = get16 ();
4908 seg = get16 ();
4909 }
7d421014 4910 used_prefixes |= (prefixes & PREFIX_DATA);
d708bcba 4911 if (intel_syntax)
3f31e633 4912 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
d708bcba
AM		 4913 else
4914 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
c608c12e 4915 oappend (scratchbuf);
252b5132
RH		 4916}
4917
252b5132 4918static void
3f31e633 4919OP_OFF (int bytemode, int sizeflag)
252b5132 4920{
52b15da3 4921 bfd_vma off;
252b5132 4922
3f31e633
JB		 4923 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
4924 intel_operand_size (bytemode, sizeflag);
252b5132
RH		 4925 append_seg ();
4926
cb712a9e 4927 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
252b5132
RH		 4928 off = get32 ();
4929 else
4930 off = get16 ();
4931
4932 if (intel_syntax)
4933 {
4934 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 4935 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
252b5132 4936 {
d708bcba 4937 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 4938 oappend (":");
4939 }
4940 }
52b15da3
JH		 4941 print_operand_value (scratchbuf, 1, off);
4942 oappend (scratchbuf);
4943}
6439fc28 4944
52b15da3 4945static void
3f31e633 4946OP_OFF64 (int bytemode, int sizeflag)
52b15da3
JH		 4947{
4948 bfd_vma off;
4949
539e75ad
L		 4950 if (address_mode != mode_64bit
4951 || (prefixes & PREFIX_ADDR))
6439fc28
AM		 4952 {
4953 OP_OFF (bytemode, sizeflag);
4954 return;
4955 }
4956
3f31e633
JB		 4957 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
4958 intel_operand_size (bytemode, sizeflag);
52b15da3
JH		 4959 append_seg ();
4960
6608db57 4961 off = get64 ();
52b15da3
JH		 4962
4963 if (intel_syntax)
4964 {
4965 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 4966 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
52b15da3 4967 {
d708bcba 4968 oappend (names_seg[ds_reg - es_reg]);
52b15da3
JH		 4969 oappend (":");
4970 }
4971 }
4972 print_operand_value (scratchbuf, 1, off);
252b5132
RH		 4973 oappend (scratchbuf);
4974}
4975
4976static void
26ca5450 4977ptr_reg (int code, int sizeflag)
252b5132 4978{
2da11e11 4979 const char *s;
d708bcba 4980
1d9f512f 4981 *obufp++ = open_char;
20f0a1fc 4982 used_prefixes |= (prefixes & PREFIX_ADDR);
cb712a9e 4983 if (address_mode == mode_64bit)
c1a64871
JH		 4984 {
4985 if (!(sizeflag & AFLAG))
db6eb5be 4986 s = names32[code - eAX_reg];
c1a64871 4987 else
db6eb5be 4988 s = names64[code - eAX_reg];
c1a64871 4989 }
52b15da3 4990 else if (sizeflag & AFLAG)
252b5132
RH		 4991 s = names32[code - eAX_reg];
4992 else
4993 s = names16[code - eAX_reg];
4994 oappend (s);
1d9f512f
AM		 4995 *obufp++ = close_char;
4996 *obufp = 0;
252b5132
RH		 4997}
4998
4999static void
26ca5450 5000OP_ESreg (int code, int sizeflag)
252b5132 5001{
9306ca4a 5002 if (intel_syntax)
52fd6d94
JB		 5003 {
5004 switch (codep[-1])
5005 {
5006 case 0x6d: /* insw/insl */
5007 intel_operand_size (z_mode, sizeflag);
5008 break;
5009 case 0xa5: /* movsw/movsl/movsq */
5010 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5011 case 0xab: /* stosw/stosl */
5012 case 0xaf: /* scasw/scasl */
5013 intel_operand_size (v_mode, sizeflag);
5014 break;
5015 default:
5016 intel_operand_size (b_mode, sizeflag);
5017 }
5018 }
d708bcba 5019 oappend ("%es:" + intel_syntax);
252b5132
RH		 5020 ptr_reg (code, sizeflag);
5021}
5022
5023static void
26ca5450 5024OP_DSreg (int code, int sizeflag)
252b5132 5025{
9306ca4a 5026 if (intel_syntax)
52fd6d94
JB		 5027 {
5028 switch (codep[-1])
5029 {
5030 case 0x6f: /* outsw/outsl */
5031 intel_operand_size (z_mode, sizeflag);
5032 break;
5033 case 0xa5: /* movsw/movsl/movsq */
5034 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5035 case 0xad: /* lodsw/lodsl/lodsq */
5036 intel_operand_size (v_mode, sizeflag);
5037 break;
5038 default:
5039 intel_operand_size (b_mode, sizeflag);
5040 }
5041 }
252b5132
RH		 5042 if ((prefixes
5043 & (PREFIX_CS
5044 | PREFIX_DS
5045 | PREFIX_SS
5046 | PREFIX_ES
5047 | PREFIX_FS
5048 | PREFIX_GS)) == 0)
5049 prefixes |= PREFIX_DS;
6608db57 5050 append_seg ();
252b5132
RH		 5051 ptr_reg (code, sizeflag);
5052}
5053
252b5132 5054static void
26ca5450 5055OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5056{
52b15da3 5057 int add = 0;
52b15da3 5058 if (rex & REX_EXTX)
c4a530c5
JB		 5059 {
5060 USED_REX (REX_EXTX);
5061 add = 8;
5062 }
cb712a9e 5063 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
c4a530c5
JB		 5064 {
5065 used_prefixes |= PREFIX_LOCK;
5066 add = 8;
5067 }
d708bcba
AM		 5068 sprintf (scratchbuf, "%%cr%d", reg + add);
5069 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5070}
5071
252b5132 5072static void
26ca5450 5073OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5074{
52b15da3
JH		 5075 int add = 0;
5076 USED_REX (REX_EXTX);
5077 if (rex & REX_EXTX)
5078 add = 8;
d708bcba 5079 if (intel_syntax)
6608db57 5080 sprintf (scratchbuf, "db%d", reg + add);
d708bcba 5081 else
6608db57 5082 sprintf (scratchbuf, "%%db%d", reg + add);
252b5132
RH		 5083 oappend (scratchbuf);
5084}
5085
252b5132 5086static void
26ca5450 5087OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5088{
252b5132 5089 sprintf (scratchbuf, "%%tr%d", reg);
d708bcba 5090 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5091}
5092
5093static void
26ca5450 5094OP_Rd (int bytemode, int sizeflag)
252b5132 5095{
2da11e11
AM		 5096 if (mod == 3)
5097 OP_E (bytemode, sizeflag);
5098 else
6608db57 5099 BadOp ();
252b5132
RH		 5100}
5101
5102static void
26ca5450 5103OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5104{
041bd2e0
JH		 5105 used_prefixes |= (prefixes & PREFIX_DATA);
5106 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 5107 {
5108 int add = 0;
5109 USED_REX (REX_EXTX);
5110 if (rex & REX_EXTX)
5111 add = 8;
5112 sprintf (scratchbuf, "%%xmm%d", reg + add);
5113 }
041bd2e0 5114 else
20f0a1fc 5115 sprintf (scratchbuf, "%%mm%d", reg);
d708bcba 5116 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5117}
5118
c608c12e 5119static void
26ca5450 5120OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e 5121{
041bd2e0
JH		 5122 int add = 0;
5123 USED_REX (REX_EXTX);
5124 if (rex & REX_EXTX)
5125 add = 8;
5126 sprintf (scratchbuf, "%%xmm%d", reg + add);
d708bcba 5127 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 5128}
5129
252b5132 5130static void
26ca5450 5131OP_EM (int bytemode, int sizeflag)
252b5132
RH		 5132{
5133 if (mod != 3)
5134 {
9306ca4a
JB		 5135 if (intel_syntax && bytemode == v_mode)
5136 {
5137 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5138 used_prefixes |= (prefixes & PREFIX_DATA);
5139 }
252b5132
RH		 5140 OP_E (bytemode, sizeflag);
5141 return;
5142 }
5143
6608db57 5144 /* Skip mod/rm byte. */
4bba6815 5145 MODRM_CHECK;
252b5132 5146 codep++;
041bd2e0
JH		 5147 used_prefixes |= (prefixes & PREFIX_DATA);
5148 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 5149 {
5150 int add = 0;
5151
5152 USED_REX (REX_EXTZ);
5153 if (rex & REX_EXTZ)
5154 add = 8;
5155 sprintf (scratchbuf, "%%xmm%d", rm + add);
5156 }
041bd2e0 5157 else
20f0a1fc 5158 sprintf (scratchbuf, "%%mm%d", rm);
d708bcba 5159 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5160}
5161
4d9567e0
MM		 5162/* cvt* are the only instructions in sse2 which have
5163 both SSE and MMX operands and also have 0x66 prefix
5164 in their opcode. 0x66 was originally used to differentiate
5165 between SSE and MMX instruction(operands). So we have to handle the
5166 cvt* separately using OP_EMC and OP_MXC */
5167static void
5168OP_EMC (int bytemode, int sizeflag)
5169{
5170 if (mod != 3)
5171 {
5172 if (intel_syntax && bytemode == v_mode)
5173 {
5174 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5175 used_prefixes |= (prefixes & PREFIX_DATA);
5176 }
5177 OP_E (bytemode, sizeflag);
5178 return;
5179 }
5180
5181 /* Skip mod/rm byte. */
5182 MODRM_CHECK;
5183 codep++;
5184 used_prefixes |= (prefixes & PREFIX_DATA);
5185 sprintf (scratchbuf, "%%mm%d", rm);
5186 oappend (scratchbuf + intel_syntax);
5187}
5188
5189static void
5190OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5191{
5192 used_prefixes |= (prefixes & PREFIX_DATA);
5193 sprintf (scratchbuf, "%%mm%d", reg);
5194 oappend (scratchbuf + intel_syntax);
5195}
5196
c608c12e 5197static void
26ca5450 5198OP_EX (int bytemode, int sizeflag)
c608c12e 5199{
041bd2e0 5200 int add = 0;
c608c12e
AM		 5201 if (mod != 3)
5202 {
9306ca4a
JB		 5203 if (intel_syntax && bytemode == v_mode)
5204 {
5205 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
5206 {
5207 case 0: bytemode = x_mode; break;
5208 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
5209 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
5210 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
5211 default: bytemode = 0; break;
5212 }
5213 }
c608c12e
AM		 5214 OP_E (bytemode, sizeflag);
5215 return;
5216 }
041bd2e0
JH		 5217 USED_REX (REX_EXTZ);
5218 if (rex & REX_EXTZ)
5219 add = 8;
c608c12e 5220
6608db57 5221 /* Skip mod/rm byte. */
4bba6815 5222 MODRM_CHECK;
c608c12e 5223 codep++;
041bd2e0 5224 sprintf (scratchbuf, "%%xmm%d", rm + add);
d708bcba 5225 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 5226}
5227
252b5132 5228static void
26ca5450 5229OP_MS (int bytemode, int sizeflag)
252b5132 5230{
2da11e11
AM		 5231 if (mod == 3)
5232 OP_EM (bytemode, sizeflag);
5233 else
6608db57 5234 BadOp ();
252b5132
RH		 5235}
5236
992aaec9 5237static void
26ca5450 5238OP_XS (int bytemode, int sizeflag)
992aaec9
AM		 5239{
5240 if (mod == 3)
5241 OP_EX (bytemode, sizeflag);
5242 else
6608db57 5243 BadOp ();
992aaec9
AM		 5244}
5245
cc0ec051
AM		 5246static void
5247OP_M (int bytemode, int sizeflag)
5248{
5249 if (mod == 3)
5250 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
5251 else
5252 OP_E (bytemode, sizeflag);
5253}
5254
5255static void
5256OP_0f07 (int bytemode, int sizeflag)
5257{
5258 if (mod != 3 || rm != 0)
5259 BadOp ();
5260 else
5261 OP_E (bytemode, sizeflag);
5262}
5263
5264static void
5265OP_0fae (int bytemode, int sizeflag)
5266{
5267 if (mod == 3)
5268 {
5269 if (reg == 7)
5270 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
5271
5272 if (reg < 5 || rm != 0)
5273 {
5274 BadOp (); /* bad sfence, mfence, or lfence */
5275 return;
5276 }
5277 }
5278 else if (reg != 7)
5279 {
5280 BadOp (); /* bad clflush */
5281 return;
5282 }
5283
5284 OP_E (bytemode, sizeflag);
5285}
5286
46e883c5
L		 5287/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
5288 32bit mode and "xchg %rax,%rax" in 64bit mode. NOP with REPZ prefix
5289 is called PAUSE. We display "xchg %ax,%ax" instead of "data16 nop".
5290 */
5291
cc0ec051 5292static void
46e883c5 5293NOP_Fixup1 (int bytemode, int sizeflag)
cc0ec051 5294{
cc0ec051
AM		 5295 if (prefixes == PREFIX_REPZ)
5296 strcpy (obuf, "pause");
46e883c5
L		 5297 else if (prefixes == PREFIX_DATA
5298 || ((rex & REX_MODE64) && rex != 0x48))
5299 OP_REG (bytemode, sizeflag);
5300 else
5301 strcpy (obuf, "nop");
5302}
5303
5304static void
5305NOP_Fixup2 (int bytemode, int sizeflag)
5306{
5307 if (prefixes == PREFIX_DATA
5308 || ((rex & REX_MODE64) && rex != 0x48))
5309 OP_IMREG (bytemode, sizeflag);
cc0ec051
AM		 5310}
5311
84037f8c 5312static const char *const Suffix3DNow[] = {
252b5132
RH		 5313/* 00 */ NULL, NULL, NULL, NULL,
5314/* 04 */ NULL, NULL, NULL, NULL,
5315/* 08 */ NULL, NULL, NULL, NULL,
9e525108 5316/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
252b5132
RH		 5317/* 10 */ NULL, NULL, NULL, NULL,
5318/* 14 */ NULL, NULL, NULL, NULL,
5319/* 18 */ NULL, NULL, NULL, NULL,
9e525108 5320/* 1C */ "pf2iw", "pf2id", NULL, NULL,
252b5132
RH		 5321/* 20 */ NULL, NULL, NULL, NULL,
5322/* 24 */ NULL, NULL, NULL, NULL,
5323/* 28 */ NULL, NULL, NULL, NULL,
5324/* 2C */ NULL, NULL, NULL, NULL,
5325/* 30 */ NULL, NULL, NULL, NULL,
5326/* 34 */ NULL, NULL, NULL, NULL,
5327/* 38 */ NULL, NULL, NULL, NULL,
5328/* 3C */ NULL, NULL, NULL, NULL,
5329/* 40 */ NULL, NULL, NULL, NULL,
5330/* 44 */ NULL, NULL, NULL, NULL,
5331/* 48 */ NULL, NULL, NULL, NULL,
5332/* 4C */ NULL, NULL, NULL, NULL,
5333/* 50 */ NULL, NULL, NULL, NULL,
5334/* 54 */ NULL, NULL, NULL, NULL,
5335/* 58 */ NULL, NULL, NULL, NULL,
5336/* 5C */ NULL, NULL, NULL, NULL,
5337/* 60 */ NULL, NULL, NULL, NULL,
5338/* 64 */ NULL, NULL, NULL, NULL,
5339/* 68 */ NULL, NULL, NULL, NULL,
5340/* 6C */ NULL, NULL, NULL, NULL,
5341/* 70 */ NULL, NULL, NULL, NULL,
5342/* 74 */ NULL, NULL, NULL, NULL,
5343/* 78 */ NULL, NULL, NULL, NULL,
5344/* 7C */ NULL, NULL, NULL, NULL,
5345/* 80 */ NULL, NULL, NULL, NULL,
5346/* 84 */ NULL, NULL, NULL, NULL,
9e525108
AM		 5347/* 88 */ NULL, NULL, "pfnacc", NULL,
5348/* 8C */ NULL, NULL, "pfpnacc", NULL,
252b5132
RH		 5349/* 90 */ "pfcmpge", NULL, NULL, NULL,
5350/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
5351/* 98 */ NULL, NULL, "pfsub", NULL,
5352/* 9C */ NULL, NULL, "pfadd", NULL,
5353/* A0 */ "pfcmpgt", NULL, NULL, NULL,
5354/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
5355/* A8 */ NULL, NULL, "pfsubr", NULL,
5356/* AC */ NULL, NULL, "pfacc", NULL,
5357/* B0 */ "pfcmpeq", NULL, NULL, NULL,
5358/* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
9e525108 5359/* B8 */ NULL, NULL, NULL, "pswapd",
252b5132
RH		 5360/* BC */ NULL, NULL, NULL, "pavgusb",
5361/* C0 */ NULL, NULL, NULL, NULL,
5362/* C4 */ NULL, NULL, NULL, NULL,
5363/* C8 */ NULL, NULL, NULL, NULL,
5364/* CC */ NULL, NULL, NULL, NULL,
5365/* D0 */ NULL, NULL, NULL, NULL,
5366/* D4 */ NULL, NULL, NULL, NULL,
5367/* D8 */ NULL, NULL, NULL, NULL,
5368/* DC */ NULL, NULL, NULL, NULL,
5369/* E0 */ NULL, NULL, NULL, NULL,
5370/* E4 */ NULL, NULL, NULL, NULL,
5371/* E8 */ NULL, NULL, NULL, NULL,
5372/* EC */ NULL, NULL, NULL, NULL,
5373/* F0 */ NULL, NULL, NULL, NULL,
5374/* F4 */ NULL, NULL, NULL, NULL,
5375/* F8 */ NULL, NULL, NULL, NULL,
5376/* FC */ NULL, NULL, NULL, NULL,
5377};
5378
5379static void
26ca5450 5380OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 5381{
5382 const char *mnemonic;
5383
5384 FETCH_DATA (the_info, codep + 1);
5385 /* AMD 3DNow! instructions are specified by an opcode suffix in the
5386 place where an 8-bit immediate would normally go. ie. the last
5387 byte of the instruction. */
6608db57 5388 obufp = obuf + strlen (obuf);
c608c12e 5389 mnemonic = Suffix3DNow[*codep++ & 0xff];
252b5132 5390 if (mnemonic)
2da11e11 5391 oappend (mnemonic);
252b5132
RH		 5392 else
5393 {
5394 /* Since a variable sized modrm/sib chunk is between the start
5395 of the opcode (0x0f0f) and the opcode suffix, we need to do
5396 all the modrm processing first, and don't know until now that
5397 we have a bad opcode. This necessitates some cleaning up. */
2da11e11
AM		 5398 op1out[0] = '\0';
5399 op2out[0] = '\0';
6608db57 5400 BadOp ();
252b5132
RH		 5401 }
5402}
c608c12e 5403
6608db57 5404static const char *simd_cmp_op[] = {
c608c12e
AM		 5405 "eq",
5406 "lt",
5407 "le",
5408 "unord",
5409 "neq",
5410 "nlt",
5411 "nle",
5412 "ord"
5413};
5414
5415static void
26ca5450 5416OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 5417{
5418 unsigned int cmp_type;
5419
5420 FETCH_DATA (the_info, codep + 1);
6608db57 5421 obufp = obuf + strlen (obuf);
c608c12e
AM		 5422 cmp_type = *codep++ & 0xff;
5423 if (cmp_type < 8)
5424 {
041bd2e0
JH		 5425 char suffix1 = 'p', suffix2 = 's';
5426 used_prefixes |= (prefixes & PREFIX_REPZ);
5427 if (prefixes & PREFIX_REPZ)
5428 suffix1 = 's';
5429 else
5430 {
5431 used_prefixes |= (prefixes & PREFIX_DATA);
5432 if (prefixes & PREFIX_DATA)
5433 suffix2 = 'd';
5434 else
5435 {
5436 used_prefixes |= (prefixes & PREFIX_REPNZ);
5437 if (prefixes & PREFIX_REPNZ)
5438 suffix1 = 's', suffix2 = 'd';
5439 }
5440 }
5441 sprintf (scratchbuf, "cmp%s%c%c",
5442 simd_cmp_op[cmp_type], suffix1, suffix2);
7d421014 5443 used_prefixes |= (prefixes & PREFIX_REPZ);
2da11e11 5444 oappend (scratchbuf);
c608c12e
AM		 5445 }
5446 else
5447 {
5448 /* We have a bad extension byte. Clean up. */
2da11e11
AM		 5449 op1out[0] = '\0';
5450 op2out[0] = '\0';
6608db57 5451 BadOp ();
c608c12e
AM		 5452 }
5453}
5454
5455static void
26ca5450 5456SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 5457{
5458 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
5459 forms of these instructions. */
5460 if (mod == 3)
5461 {
6608db57
KH		 5462 char *p = obuf + strlen (obuf);
5463 *(p + 1) = '\0';
5464 *p = *(p - 1);
5465 *(p - 1) = *(p - 2);
5466 *(p - 2) = *(p - 3);
5467 *(p - 3) = extrachar;
c608c12e
AM		 5468 }
5469}
2da11e11 5470
ca164297 5471static void
4fd61dcb 5472PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
ca164297 5473{
1d9f512f 5474 if (mod == 3 && reg == 1 && rm <= 1)
ca164297 5475 {
ca164297 5476 /* Override "sidt". */
cb712a9e
L		 5477 size_t olen = strlen (obuf);
5478 char *p = obuf + olen - 4;
5479 const char **names = (address_mode == mode_64bit
5480 ? names64 : names32);
1d9f512f 5481
22cbf2e7 5482 /* We might have a suffix when disassembling with -Msuffix. */
1d9f512f
AM		 5483 if (*p == 'i')
5484 --p;
5485
cb712a9e
L		 5486 /* Remove "addr16/addr32" if we aren't in Intel mode. */
5487 if (!intel_syntax
5488 && (prefixes & PREFIX_ADDR)
5489 && olen >= (4 + 7)
5490 && *(p - 1) == ' '
0112cd26
NC		 5491 && CONST_STRNEQ (p - 7, "addr")
5492 && (CONST_STRNEQ (p - 3, "16")
5493 || CONST_STRNEQ (p - 3, "32")))
cb712a9e
L		 5494 p -= 7;
5495
ca164297
L		 5496 if (rm)
5497 {
5498 /* mwait %eax,%ecx */
1d9f512f 5499 strcpy (p, "mwait");
6128c599 5500 if (!intel_syntax)
cb712a9e 5501 strcpy (op1out, names[0]);
ca164297
L		 5502 }
5503 else
5504 {
5505 /* monitor %eax,%ecx,%edx" */
1d9f512f 5506 strcpy (p, "monitor");
6128c599
JB		 5507 if (!intel_syntax)
5508 {
cb712a9e
L		 5509 const char **op1_names;
5510 if (!(prefixes & PREFIX_ADDR))
5511 op1_names = (address_mode == mode_16bit
5512 ? names16 : names);
6128c599
JB		 5513 else
5514 {
cb712a9e
L		 5515 op1_names = (address_mode != mode_32bit
5516 ? names32 : names16);
6128c599
JB		 5517 used_prefixes |= PREFIX_ADDR;
5518 }
cb712a9e
L		 5519 strcpy (op1out, op1_names[0]);
5520 strcpy (op3out, names[2]);
6128c599
JB		 5521 }
5522 }
5523 if (!intel_syntax)
5524 {
cb712a9e 5525 strcpy (op2out, names[1]);
6128c599 5526 two_source_ops = 1;
ca164297
L		 5527 }
5528
5529 codep++;
5530 }
5531 else
30123838
JB		 5532 OP_M (0, sizeflag);
5533}
5534
5535static void
5536SVME_Fixup (int bytemode, int sizeflag)
5537{
5538 const char *alt;
5539 char *p;
5540
5541 switch (*codep)
5542 {
5543 case 0xd8:
5544 alt = "vmrun";
5545 break;
5546 case 0xd9:
5547 alt = "vmmcall";
5548 break;
5549 case 0xda:
5550 alt = "vmload";
5551 break;
5552 case 0xdb:
5553 alt = "vmsave";
5554 break;
5555 case 0xdc:
5556 alt = "stgi";
5557 break;
5558 case 0xdd:
5559 alt = "clgi";
5560 break;
5561 case 0xde:
5562 alt = "skinit";
5563 break;
5564 case 0xdf:
5565 alt = "invlpga";
5566 break;
5567 default:
5568 OP_M (bytemode, sizeflag);
5569 return;
5570 }
5571 /* Override "lidt". */
5572 p = obuf + strlen (obuf) - 4;
5573 /* We might have a suffix. */
5574 if (*p == 'i')
5575 --p;
5576 strcpy (p, alt);
5577 if (!(prefixes & PREFIX_ADDR))
5578 {
5579 ++codep;
5580 return;
5581 }
5582 used_prefixes |= PREFIX_ADDR;
5583 switch (*codep++)
5584 {
5585 case 0xdf:
5586 strcpy (op2out, names32[1]);
5587 two_source_ops = 1;
5588 /* Fall through. */
5589 case 0xd8:
5590 case 0xda:
5591 case 0xdb:
5592 *obufp++ = open_char;
cb712a9e 5593 if (address_mode == mode_64bit || (sizeflag & AFLAG))
30123838
JB		 5594 alt = names32[0];
5595 else
5596 alt = names16[0];
5597 strcpy (obufp, alt);
5598 obufp += strlen (alt);
5599 *obufp++ = close_char;
5600 *obufp = '\0';
5601 break;
5602 }
ca164297
L		 5603}
5604
4fd61dcb
JJ		 5605static void
5606INVLPG_Fixup (int bytemode, int sizeflag)
5607{
373ff435 5608 const char *alt;
4fd61dcb 5609
373ff435
JB		 5610 switch (*codep)
5611 {
5612 case 0xf8:
5613 alt = "swapgs";
5614 break;
5615 case 0xf9:
5616 alt = "rdtscp";
5617 break;
5618 default:
30123838 5619 OP_M (bytemode, sizeflag);
373ff435 5620 return;
4fd61dcb 5621 }
373ff435
JB		 5622 /* Override "invlpg". */
5623 strcpy (obuf + strlen (obuf) - 6, alt);
5624 codep++;
4fd61dcb
JJ		 5625}
5626
6608db57
KH		 5627static void
5628BadOp (void)
2da11e11 5629{
6608db57
KH		 5630 /* Throw away prefixes and 1st. opcode byte. */
5631 codep = insn_codep + 1;
2da11e11
AM		 5632 oappend ("(bad)");
5633}
4cc91dba 5634
90700ea2
L		 5635static void
5636VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
5637{
5638 if (mod == 3 && reg == 0 && rm >=1 && rm <= 4)
5639 {
5640 /* Override "sgdt". */
5641 char *p = obuf + strlen (obuf) - 4;
5642
22cbf2e7
L		 5643 /* We might have a suffix when disassembling with -Msuffix. */
5644 if (*p == 'g')
90700ea2
L		 5645 --p;
5646
5647 switch (rm)
5648 {
5649 case 1:
5650 strcpy (p, "vmcall");
5651 break;
5652 case 2:
5653 strcpy (p, "vmlaunch");
5654 break;
5655 case 3:
5656 strcpy (p, "vmresume");
5657 break;
5658 case 4:
5659 strcpy (p, "vmxoff");
5660 break;
5661 }
5662
5663 codep++;
5664 }
5665 else
5666 OP_E (0, sizeflag);
5667}
5668
5669static void
5670OP_VMX (int bytemode, int sizeflag)
5671{
5672 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
5673 if (prefixes & PREFIX_DATA)
5674 strcpy (obuf, "vmclear");
5675 else if (prefixes & PREFIX_REPZ)
5676 strcpy (obuf, "vmxon");
5677 else
5678 strcpy (obuf, "vmptrld");
5679 OP_E (bytemode, sizeflag);
5680}
35c52694
L		 5681
5682static void
5683REP_Fixup (int bytemode, int sizeflag)
5684{
5685 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
5686 lods and stos. */
5687 size_t ilen = 0;
5688
5689 if (prefixes & PREFIX_REPZ)
5690 switch (*insn_codep)
5691 {
5692 case 0x6e: /* outsb */
5693 case 0x6f: /* outsw/outsl */
5694 case 0xa4: /* movsb */
5695 case 0xa5: /* movsw/movsl/movsq */
5696 if (!intel_syntax)
5697 ilen = 5;
5698 else
5699 ilen = 4;
5700 break;
5701 case 0xaa: /* stosb */
5702 case 0xab: /* stosw/stosl/stosq */
5703 case 0xac: /* lodsb */
5704 case 0xad: /* lodsw/lodsl/lodsq */
5705 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5706 ilen = 5;
5707 else
5708 ilen = 4;
5709 break;
5710 case 0x6c: /* insb */
5711 case 0x6d: /* insl/insw */
5712 if (!intel_syntax)
5713 ilen = 4;
5714 else
5715 ilen = 3;
5716 break;
5717 default:
5718 abort ();
5719 break;
5720 }
5721
5722 if (ilen != 0)
5723 {
5724 size_t olen;
5725 char *p;
5726
5727 olen = strlen (obuf);
5728 p = obuf + olen - ilen - 1 - 4;
5729 /* Handle "repz [addr16|addr32]". */
5730 if ((prefixes & PREFIX_ADDR))
5731 p -= 1 + 6;
5732
5733 memmove (p + 3, p + 4, olen - (p + 3 - obuf));
5734 }
5735
5736 switch (bytemode)
5737 {
5738 case al_reg:
5739 case eAX_reg:
5740 case indir_dx_reg:
5741 OP_IMREG (bytemode, sizeflag);
5742 break;
5743 case eDI_reg:
5744 OP_ESreg (bytemode, sizeflag);
5745 break;
5746 case eSI_reg:
5747 OP_DSreg (bytemode, sizeflag);
5748 break;
5749 default:
5750 abort ();
5751 break;
5752 }
5753}
GDB Binutils - Deliverables
This page took 1.118404 seconds and 4 git commands to generate.