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* gdb.mi/mi-watch.exp (test_watchpoint_all): Pass the watchpoint
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
CommitLineData
252b5132 1/* Print i386 instructions for GDB, the GNU debugger.
060d22b0 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
9b201bb5 3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
252b5132 4
9b201bb5 5 This file is part of the GNU opcodes library.
20f0a1fc 6
9b201bb5 7 This library is free software; you can redistribute it and/or modify
20f0a1fc 8 it under the terms of the GNU General Public License as published by
9b201bb5
NC		 9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
20f0a1fc 11
9b201bb5
NC		 12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
20f0a1fc
NC		 16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
9b201bb5
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
20f0a1fc
NC		 22
23/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 July 1988
25 modified by John Hassey (hassey@dg-rtp.dg.com)
26 x86-64 support added by Jan Hubicka (jh@suse.cz)
27 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
28
29/* The main tables describing the instructions is essentially a copy
30 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
31 Programmers Manual. Usually, there is a capital letter, followed
32 by a small letter. The capital letter tell the addressing mode,
33 and the small letter tells about the operand size. Refer to
34 the Intel manual for details. */
252b5132 35
252b5132 36#include "sysdep.h"
dabbade6 37#include "dis-asm.h"
252b5132 38#include "opintl.h"
0b1cf022 39#include "opcode/i386.h"
252b5132
RH		 40
41#include <setjmp.h>
42
26ca5450
AJ		 43static int fetch_data (struct disassemble_info *, bfd_byte *);
44static void ckprefix (void);
45static const char *prefix_name (int, int);
46static int print_insn (bfd_vma, disassemble_info *);
47static void dofloat (int);
48static void OP_ST (int, int);
49static void OP_STi (int, int);
50static int putop (const char *, int);
51static void oappend (const char *);
52static void append_seg (void);
53static void OP_indirE (int, int);
54static void print_operand_value (char *, int, bfd_vma);
5d669648 55static void print_displacement (char *, bfd_vma);
26ca5450
AJ		 56static void OP_E (int, int);
57static void OP_G (int, int);
58static bfd_vma get64 (void);
59static bfd_signed_vma get32 (void);
60static bfd_signed_vma get32s (void);
61static int get16 (void);
62static void set_op (bfd_vma, int);
b844680a 63static void OP_Skip_MODRM (int, int);
26ca5450
AJ		 64static void OP_REG (int, int);
65static void OP_IMREG (int, int);
66static void OP_I (int, int);
67static void OP_I64 (int, int);
68static void OP_sI (int, int);
69static void OP_J (int, int);
70static void OP_SEG (int, int);
71static void OP_DIR (int, int);
72static void OP_OFF (int, int);
73static void OP_OFF64 (int, int);
74static void ptr_reg (int, int);
75static void OP_ESreg (int, int);
76static void OP_DSreg (int, int);
77static void OP_C (int, int);
78static void OP_D (int, int);
79static void OP_T (int, int);
6f74c397 80static void OP_R (int, int);
26ca5450
AJ		 81static void OP_MMX (int, int);
82static void OP_XMM (int, int);
83static void OP_EM (int, int);
84static void OP_EX (int, int);
4d9567e0
MM		 85static void OP_EMC (int,int);
86static void OP_MXC (int,int);
26ca5450
AJ		 87static void OP_MS (int, int);
88static void OP_XS (int, int);
cc0ec051 89static void OP_M (int, int);
cc0ec051 90static void OP_0f07 (int, int);
b844680a
L		 91static void OP_Monitor (int, int);
92static void OP_Mwait (int, int);
46e883c5
L		 93static void NOP_Fixup1 (int, int);
94static void NOP_Fixup2 (int, int);
26ca5450
AJ		 95static void OP_3DNowSuffix (int, int);
96static void OP_SIMD_Suffix (int, int);
26ca5450 97static void BadOp (void);
35c52694 98static void REP_Fixup (int, int);
f5804c90 99static void CMPXCHG8B_Fixup (int, int);
42903f7f 100static void XMM_Fixup (int, int);
381d071f 101static void CRC32_Fixup (int, int);
252b5132 102
6608db57 103struct dis_private {
252b5132
RH		 104 /* Points to first byte not fetched. */
105 bfd_byte *max_fetched;
0b1cf022 106 bfd_byte the_buffer[MAX_MNEM_SIZE];
252b5132 107 bfd_vma insn_start;
e396998b 108 int orig_sizeflag;
252b5132
RH		 109 jmp_buf bailout;
110};
111
cb712a9e
L		 112enum address_mode
113{
114 mode_16bit,
115 mode_32bit,
116 mode_64bit
117};
118
119enum address_mode address_mode;
52b15da3 120
5076851f
ILT		 121/* Flags for the prefixes for the current instruction. See below. */
122static int prefixes;
123
52b15da3
JH		 124/* REX prefix the current instruction. See below. */
125static int rex;
126/* Bits of REX we've already used. */
127static int rex_used;
52b15da3
JH		 128/* Mark parts used in the REX prefix. When we are testing for
129 empty prefix (for 8bit register REX extension), just mask it
130 out. Otherwise test for REX bit is excuse for existence of REX
131 only in case value is nonzero. */
132#define USED_REX(value) \
133 { \
134 if (value) \
161a04f6
L		 135 { \
136 if ((rex & value)) \
137 rex_used |= (value) | REX_OPCODE; \
138 } \
52b15da3 139 else \
161a04f6 140 rex_used |= REX_OPCODE; \
52b15da3
JH		 141 }
142
7d421014
ILT		 143/* Flags for prefixes which we somehow handled when printing the
144 current instruction. */
145static int used_prefixes;
146
5076851f
ILT		 147/* Flags stored in PREFIXES. */
148#define PREFIX_REPZ 1
149#define PREFIX_REPNZ 2
150#define PREFIX_LOCK 4
151#define PREFIX_CS 8
152#define PREFIX_SS 0x10
153#define PREFIX_DS 0x20
154#define PREFIX_ES 0x40
155#define PREFIX_FS 0x80
156#define PREFIX_GS 0x100
157#define PREFIX_DATA 0x200
158#define PREFIX_ADDR 0x400
159#define PREFIX_FWAIT 0x800
160
252b5132
RH		 161/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
162 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
163 on error. */
164#define FETCH_DATA(info, addr) \
6608db57 165 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
252b5132
RH		 166 ? 1 : fetch_data ((info), (addr)))
167
168static int
26ca5450 169fetch_data (struct disassemble_info *info, bfd_byte *addr)
252b5132
RH		 170{
171 int status;
6608db57 172 struct dis_private *priv = (struct dis_private *) info->private_data;
252b5132
RH		 173 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
174
0b1cf022 175 if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
272c9217
JB		 176 status = (*info->read_memory_func) (start,
177 priv->max_fetched,
178 addr - priv->max_fetched,
179 info);
180 else
181 status = -1;
252b5132
RH		 182 if (status != 0)
183 {
7d421014 184 /* If we did manage to read at least one byte, then
db6eb5be
AM		 185 print_insn_i386 will do something sensible. Otherwise, print
186 an error. We do that here because this is where we know
187 STATUS. */
7d421014 188 if (priv->max_fetched == priv->the_buffer)
5076851f 189 (*info->memory_error_func) (status, start, info);
252b5132
RH		 190 longjmp (priv->bailout, 1);
191 }
192 else
193 priv->max_fetched = addr;
194 return 1;
195}
196
ce518a5f
L		 197#define XX { NULL, 0 }
198
199#define Eb { OP_E, b_mode }
200#define Ev { OP_E, v_mode }
201#define Ed { OP_E, d_mode }
202#define Edq { OP_E, dq_mode }
203#define Edqw { OP_E, dqw_mode }
42903f7f
L		 204#define Edqb { OP_E, dqb_mode }
205#define Edqd { OP_E, dqd_mode }
09335d05 206#define Eq { OP_E, q_mode }
ce518a5f
L		 207#define indirEv { OP_indirE, stack_v_mode }
208#define indirEp { OP_indirE, f_mode }
209#define stackEv { OP_E, stack_v_mode }
210#define Em { OP_E, m_mode }
211#define Ew { OP_E, w_mode }
212#define M { OP_M, 0 } /* lea, lgdt, etc. */
213#define Ma { OP_M, v_mode }
b844680a 214#define Mb { OP_M, b_mode }
d9a5e5e5 215#define Md { OP_M, d_mode }
ce518a5f
L		 216#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
217#define Mq { OP_M, q_mode }
218#define Gb { OP_G, b_mode }
219#define Gv { OP_G, v_mode }
220#define Gd { OP_G, d_mode }
221#define Gdq { OP_G, dq_mode }
222#define Gm { OP_G, m_mode }
223#define Gw { OP_G, w_mode }
6f74c397
L		 224#define Rd { OP_R, d_mode }
225#define Rm { OP_R, m_mode }
ce518a5f
L		 226#define Ib { OP_I, b_mode }
227#define sIb { OP_sI, b_mode } /* sign extened byte */
228#define Iv { OP_I, v_mode }
229#define Iq { OP_I, q_mode }
230#define Iv64 { OP_I64, v_mode }
231#define Iw { OP_I, w_mode }
232#define I1 { OP_I, const_1_mode }
233#define Jb { OP_J, b_mode }
234#define Jv { OP_J, v_mode }
235#define Cm { OP_C, m_mode }
236#define Dm { OP_D, m_mode }
237#define Td { OP_T, d_mode }
b844680a 238#define Skip_MODRM { OP_Skip_MODRM, 0 }
ce518a5f
L		 239
240#define RMeAX { OP_REG, eAX_reg }
241#define RMeBX { OP_REG, eBX_reg }
242#define RMeCX { OP_REG, eCX_reg }
243#define RMeDX { OP_REG, eDX_reg }
244#define RMeSP { OP_REG, eSP_reg }
245#define RMeBP { OP_REG, eBP_reg }
246#define RMeSI { OP_REG, eSI_reg }
247#define RMeDI { OP_REG, eDI_reg }
248#define RMrAX { OP_REG, rAX_reg }
249#define RMrBX { OP_REG, rBX_reg }
250#define RMrCX { OP_REG, rCX_reg }
251#define RMrDX { OP_REG, rDX_reg }
252#define RMrSP { OP_REG, rSP_reg }
253#define RMrBP { OP_REG, rBP_reg }
254#define RMrSI { OP_REG, rSI_reg }
255#define RMrDI { OP_REG, rDI_reg }
256#define RMAL { OP_REG, al_reg }
257#define RMAL { OP_REG, al_reg }
258#define RMCL { OP_REG, cl_reg }
259#define RMDL { OP_REG, dl_reg }
260#define RMBL { OP_REG, bl_reg }
261#define RMAH { OP_REG, ah_reg }
262#define RMCH { OP_REG, ch_reg }
263#define RMDH { OP_REG, dh_reg }
264#define RMBH { OP_REG, bh_reg }
265#define RMAX { OP_REG, ax_reg }
266#define RMDX { OP_REG, dx_reg }
267
268#define eAX { OP_IMREG, eAX_reg }
269#define eBX { OP_IMREG, eBX_reg }
270#define eCX { OP_IMREG, eCX_reg }
271#define eDX { OP_IMREG, eDX_reg }
272#define eSP { OP_IMREG, eSP_reg }
273#define eBP { OP_IMREG, eBP_reg }
274#define eSI { OP_IMREG, eSI_reg }
275#define eDI { OP_IMREG, eDI_reg }
276#define AL { OP_IMREG, al_reg }
277#define CL { OP_IMREG, cl_reg }
278#define DL { OP_IMREG, dl_reg }
279#define BL { OP_IMREG, bl_reg }
280#define AH { OP_IMREG, ah_reg }
281#define CH { OP_IMREG, ch_reg }
282#define DH { OP_IMREG, dh_reg }
283#define BH { OP_IMREG, bh_reg }
284#define AX { OP_IMREG, ax_reg }
285#define DX { OP_IMREG, dx_reg }
286#define zAX { OP_IMREG, z_mode_ax_reg }
287#define indirDX { OP_IMREG, indir_dx_reg }
288
289#define Sw { OP_SEG, w_mode }
290#define Sv { OP_SEG, v_mode }
291#define Ap { OP_DIR, 0 }
292#define Ob { OP_OFF64, b_mode }
293#define Ov { OP_OFF64, v_mode }
294#define Xb { OP_DSreg, eSI_reg }
295#define Xv { OP_DSreg, eSI_reg }
296#define Xz { OP_DSreg, eSI_reg }
297#define Yb { OP_ESreg, eDI_reg }
298#define Yv { OP_ESreg, eDI_reg }
299#define DSBX { OP_DSreg, eBX_reg }
300
301#define es { OP_REG, es_reg }
302#define ss { OP_REG, ss_reg }
303#define cs { OP_REG, cs_reg }
304#define ds { OP_REG, ds_reg }
305#define fs { OP_REG, fs_reg }
306#define gs { OP_REG, gs_reg }
307
308#define MX { OP_MMX, 0 }
309#define XM { OP_XMM, 0 }
310#define EM { OP_EM, v_mode }
09a2c6cf 311#define EMd { OP_EM, d_mode }
14051056 312#define EMx { OP_EM, x_mode }
8976381e 313#define EXw { OP_EX, w_mode }
09a2c6cf
L		 314#define EXd { OP_EX, d_mode }
315#define EXq { OP_EX, q_mode }
316#define EXx { OP_EX, x_mode }
ce518a5f
L		 317#define MS { OP_MS, v_mode }
318#define XS { OP_XS, v_mode }
09335d05 319#define EMCq { OP_EMC, q_mode }
ce518a5f 320#define MXC { OP_MXC, 0 }
ce518a5f
L		 321#define OPSUF { OP_3DNowSuffix, 0 }
322#define OPSIMD { OP_SIMD_Suffix, 0 }
42903f7f 323#define XMM0 { XMM_Fixup, 0 }
252b5132 324
35c52694 325/* Used handle "rep" prefix for string instructions. */
ce518a5f
L		 326#define Xbr { REP_Fixup, eSI_reg }
327#define Xvr { REP_Fixup, eSI_reg }
328#define Ybr { REP_Fixup, eDI_reg }
329#define Yvr { REP_Fixup, eDI_reg }
330#define Yzr { REP_Fixup, eDI_reg }
331#define indirDXr { REP_Fixup, indir_dx_reg }
332#define ALr { REP_Fixup, al_reg }
333#define eAXr { REP_Fixup, eAX_reg }
334
335#define cond_jump_flag { NULL, cond_jump_mode }
336#define loop_jcxz_flag { NULL, loop_jcxz_mode }
3ffd33cf 337
252b5132 338/* bits in sizeflag */
252b5132 339#define SUFFIX_ALWAYS 4
252b5132
RH		 340#define AFLAG 2
341#define DFLAG 1
342
52b15da3
JH		 343#define b_mode 1 /* byte operand */
344#define v_mode 2 /* operand size depends on prefixes */
345#define w_mode 3 /* word operand */
346#define d_mode 4 /* double word operand */
347#define q_mode 5 /* quad word operand */
9306ca4a
JB		 348#define t_mode 6 /* ten-byte operand */
349#define x_mode 7 /* 16-byte XMM operand */
350#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
351#define cond_jump_mode 9
352#define loop_jcxz_mode 10
353#define dq_mode 11 /* operand size depends on REX prefixes. */
354#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
355#define f_mode 13 /* 4- or 6-byte pointer operand */
356#define const_1_mode 14
1a114b12 357#define stack_v_mode 15 /* v_mode for stack-related opcodes. */
52fd6d94 358#define z_mode 16 /* non-quad operand size depends on prefixes */
fb9c77c7 359#define o_mode 17 /* 16-byte operand */
42903f7f
L		 360#define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
361#define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
252b5132
RH		 362
363#define es_reg 100
364#define cs_reg 101
365#define ss_reg 102
366#define ds_reg 103
367#define fs_reg 104
368#define gs_reg 105
252b5132 369
c608c12e
AM		 370#define eAX_reg 108
371#define eCX_reg 109
372#define eDX_reg 110
373#define eBX_reg 111
374#define eSP_reg 112
375#define eBP_reg 113
376#define eSI_reg 114
377#define eDI_reg 115
252b5132
RH		 378
379#define al_reg 116
380#define cl_reg 117
381#define dl_reg 118
382#define bl_reg 119
383#define ah_reg 120
384#define ch_reg 121
385#define dh_reg 122
386#define bh_reg 123
387
388#define ax_reg 124
389#define cx_reg 125
390#define dx_reg 126
391#define bx_reg 127
392#define sp_reg 128
393#define bp_reg 129
394#define si_reg 130
395#define di_reg 131
396
52b15da3
JH		 397#define rAX_reg 132
398#define rCX_reg 133
399#define rDX_reg 134
400#define rBX_reg 135
401#define rSP_reg 136
402#define rBP_reg 137
403#define rSI_reg 138
404#define rDI_reg 139
405
52fd6d94 406#define z_mode_ax_reg 149
252b5132
RH		 407#define indir_dx_reg 150
408
6439fc28
AM		 409#define FLOATCODE 1
410#define USE_GROUPS 2
411#define USE_PREFIX_USER_TABLE 3
412#define X86_64_SPECIAL 4
331d2d0d 413#define IS_3BYTE_OPCODE 5
b844680a
L		 414#define USE_OPC_EXT_TABLE 6
415#define USE_OPC_EXT_RM_TABLE 7
6439fc28 416
4efba78c
L		 417#define FLOAT NULL, { { NULL, FLOATCODE } }
418
7967e09e
L		 419#define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
420#define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
421#define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
422#define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
423#define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
424#define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
425#define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
426#define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
427#define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
428#define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
429#define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
430#define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
431#define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
432#define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
433#define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
434#define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
435#define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
436#define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
437#define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
438#define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
439#define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
440#define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
441#define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
442#define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
443#define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
444#define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
445#define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
446#define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
4efba78c
L		 447
448#define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
449#define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
450#define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
451#define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
452#define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
453#define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
454#define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
455#define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
456#define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
457#define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
458#define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
459#define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
460#define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
461#define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
462#define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
463#define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
464#define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
465#define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
466#define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
467#define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
468#define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
469#define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
470#define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
471#define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
472#define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
473#define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
474#define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
475#define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
476#define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
477#define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
478#define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
479#define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
480#define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
481#define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
482#define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
483#define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
484#define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
485#define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
8b38ad71 486#define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
42903f7f
L		 487#define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
488#define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
489#define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
490#define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
491#define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
492#define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
493#define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
494#define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
495#define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
496#define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
497#define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
498#define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
499#define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
500#define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
501#define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
502#define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
503#define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
504#define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
505#define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
506#define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
507#define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
508#define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
509#define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
510#define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
511#define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
512#define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
513#define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
514#define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
515#define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
516#define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
517#define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
518#define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
519#define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
520#define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
521#define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
522#define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
523#define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
524#define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
525#define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
526#define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
527#define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
528#define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
529#define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
530#define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
531#define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
532#define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
533#define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
381d071f
L		 534#define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
535#define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
536#define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
537#define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
538#define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
539#define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
540#define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
09a2c6cf
L		 541#define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
542#define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
543#define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
544#define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
545#define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
b844680a
L		 546#define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
547#define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
548#define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
4efba78c
L		 549
550
551#define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
552#define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
553#define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
554#define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
555
556#define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
557#define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
331d2d0d 558
b844680a
L		 559#define OPC_EXT_0 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 0 } }
560#define OPC_EXT_1 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 1 } }
561#define OPC_EXT_2 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 2 } }
562#define OPC_EXT_3 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 3 } }
563#define OPC_EXT_4 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 4 } }
564#define OPC_EXT_5 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 5 } }
565#define OPC_EXT_6 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 6 } }
566#define OPC_EXT_7 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 7 } }
567#define OPC_EXT_8 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 8 } }
568#define OPC_EXT_9 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 9 } }
569#define OPC_EXT_10 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 10 } }
570#define OPC_EXT_11 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 11 } }
571#define OPC_EXT_12 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 12 } }
572#define OPC_EXT_13 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 13 } }
573#define OPC_EXT_14 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 14 } }
574#define OPC_EXT_15 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 15 } }
575#define OPC_EXT_16 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 16 } }
576#define OPC_EXT_17 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 17 } }
577#define OPC_EXT_18 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 18 } }
578#define OPC_EXT_19 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 19 } }
579#define OPC_EXT_20 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 20 } }
580#define OPC_EXT_21 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 21 } }
581#define OPC_EXT_22 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 22 } }
582#define OPC_EXT_23 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 23 } }
583#define OPC_EXT_24 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 24 } }
d8faab4e
L		 584#define OPC_EXT_25 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 25 } }
585#define OPC_EXT_26 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 26 } }
586#define OPC_EXT_27 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 27 } }
587#define OPC_EXT_28 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 28 } }
588#define OPC_EXT_29 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 29 } }
589#define OPC_EXT_30 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 30 } }
590#define OPC_EXT_31 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 31 } }
591#define OPC_EXT_32 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 32 } }
592#define OPC_EXT_33 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 33 } }
876d4bfa
L		 593#define OPC_EXT_34 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 34 } }
594#define OPC_EXT_35 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 35 } }
595#define OPC_EXT_36 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 36 } }
596#define OPC_EXT_37 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 37 } }
bbedc832 597#define OPC_EXT_38 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 38 } }
144c41d9 598#define OPC_EXT_39 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 39 } }
1afd85e3
L		 599#define OPC_EXT_40 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 40 } }
600#define OPC_EXT_41 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 41 } }
601#define OPC_EXT_42 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 42 } }
602#define OPC_EXT_43 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 43 } }
603#define OPC_EXT_44 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 44 } }
604#define OPC_EXT_45 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 45 } }
b844680a
L		 605
606#define OPC_EXT_RM_0 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 0 } }
607#define OPC_EXT_RM_1 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 1 } }
608#define OPC_EXT_RM_2 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 2 } }
609#define OPC_EXT_RM_3 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 3 } }
610#define OPC_EXT_RM_4 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 4 } }
bbedc832 611#define OPC_EXT_RM_5 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 5 } }
144c41d9 612#define OPC_EXT_RM_6 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 6 } }
b844680a 613
26ca5450 614typedef void (*op_rtn) (int bytemode, int sizeflag);
252b5132
RH		 615
616struct dis386 {
2da11e11 617 const char *name;
ce518a5f
L		 618 struct
619 {
620 op_rtn rtn;
621 int bytemode;
622 } op[MAX_OPERANDS];
252b5132
RH		 623};
624
625/* Upper case letters in the instruction names here are macros.
626 'A' => print 'b' if no register operands or suffix_always is true
627 'B' => print 'b' if suffix_always is true
9306ca4a
JB		 628 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
629 . size prefix
ed7841b3
JB		 630 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
631 . suffix_always is true
252b5132 632 'E' => print 'e' if 32-bit form of jcxz
3ffd33cf 633 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
52fd6d94 634 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
5dd0794d 635 'H' => print ",pt" or ",pn" branch hint
9306ca4a
JB		 636 'I' => honor following macro letter even in Intel mode (implemented only
637 . for some of the macro letters)
638 'J' => print 'l'
42903f7f 639 'K' => print 'd' or 'q' if rex prefix is present.
252b5132
RH		 640 'L' => print 'l' if suffix_always is true
641 'N' => print 'n' if instruction has no wait "prefix"
a35ca55a 642 'O' => print 'd' or 'o' (or 'q' in Intel mode)
52b15da3 643 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
e396998b
AM		 644 . or suffix_always is true. print 'q' if rex prefix is present.
645 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
646 . is true
a35ca55a 647 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
52b15da3 648 'S' => print 'w', 'l' or 'q' if suffix_always is true
6439fc28
AM		 649 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
650 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
1a114b12 651 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
a35ca55a 652 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
9306ca4a 653 'X' => print 's', 'd' depending on data16 prefix (for XMM)
76f227a5 654 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
6dd5059a 655 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
52b15da3 656
6439fc28
AM		 657 Many of the above letters print nothing in Intel mode. See "putop"
658 for the details.
52b15da3 659
6439fc28
AM		 660 Braces '{' and '}', and vertical bars '|', indicate alternative
661 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
662 modes. In cases where there are only two alternatives, the X86_64
663 instruction is reserved, and "(bad)" is printed.
664*/
252b5132 665
6439fc28 666static const struct dis386 dis386[] = {
252b5132 667 /* 00 */
ce518a5f
L		 668 { "addB", { Eb, Gb } },
669 { "addS", { Ev, Gv } },
670 { "addB", { Gb, Eb } },
671 { "addS", { Gv, Ev } },
672 { "addB", { AL, Ib } },
673 { "addS", { eAX, Iv } },
674 { "push{T|}", { es } },
675 { "pop{T|}", { es } },
252b5132 676 /* 08 */
ce518a5f
L		 677 { "orB", { Eb, Gb } },
678 { "orS", { Ev, Gv } },
679 { "orB", { Gb, Eb } },
680 { "orS", { Gv, Ev } },
681 { "orB", { AL, Ib } },
682 { "orS", { eAX, Iv } },
683 { "push{T|}", { cs } },
684 { "(bad)", { XX } }, /* 0x0f extended opcode escape */
252b5132 685 /* 10 */
ce518a5f
L		 686 { "adcB", { Eb, Gb } },
687 { "adcS", { Ev, Gv } },
688 { "adcB", { Gb, Eb } },
689 { "adcS", { Gv, Ev } },
690 { "adcB", { AL, Ib } },
691 { "adcS", { eAX, Iv } },
692 { "push{T|}", { ss } },
693 { "pop{T|}", { ss } },
252b5132 694 /* 18 */
ce518a5f
L		 695 { "sbbB", { Eb, Gb } },
696 { "sbbS", { Ev, Gv } },
697 { "sbbB", { Gb, Eb } },
698 { "sbbS", { Gv, Ev } },
699 { "sbbB", { AL, Ib } },
700 { "sbbS", { eAX, Iv } },
701 { "push{T|}", { ds } },
702 { "pop{T|}", { ds } },
252b5132 703 /* 20 */
ce518a5f
L		 704 { "andB", { Eb, Gb } },
705 { "andS", { Ev, Gv } },
706 { "andB", { Gb, Eb } },
707 { "andS", { Gv, Ev } },
708 { "andB", { AL, Ib } },
709 { "andS", { eAX, Iv } },
710 { "(bad)", { XX } }, /* SEG ES prefix */
711 { "daa{|}", { XX } },
252b5132 712 /* 28 */
ce518a5f
L		 713 { "subB", { Eb, Gb } },
714 { "subS", { Ev, Gv } },
715 { "subB", { Gb, Eb } },
716 { "subS", { Gv, Ev } },
717 { "subB", { AL, Ib } },
718 { "subS", { eAX, Iv } },
719 { "(bad)", { XX } }, /* SEG CS prefix */
720 { "das{|}", { XX } },
252b5132 721 /* 30 */
ce518a5f
L		 722 { "xorB", { Eb, Gb } },
723 { "xorS", { Ev, Gv } },
724 { "xorB", { Gb, Eb } },
725 { "xorS", { Gv, Ev } },
726 { "xorB", { AL, Ib } },
727 { "xorS", { eAX, Iv } },
728 { "(bad)", { XX } }, /* SEG SS prefix */
729 { "aaa{|}", { XX } },
252b5132 730 /* 38 */
ce518a5f
L		 731 { "cmpB", { Eb, Gb } },
732 { "cmpS", { Ev, Gv } },
733 { "cmpB", { Gb, Eb } },
734 { "cmpS", { Gv, Ev } },
735 { "cmpB", { AL, Ib } },
736 { "cmpS", { eAX, Iv } },
737 { "(bad)", { XX } }, /* SEG DS prefix */
738 { "aas{|}", { XX } },
252b5132 739 /* 40 */
ce518a5f
L		 740 { "inc{S|}", { RMeAX } },
741 { "inc{S|}", { RMeCX } },
742 { "inc{S|}", { RMeDX } },
743 { "inc{S|}", { RMeBX } },
744 { "inc{S|}", { RMeSP } },
745 { "inc{S|}", { RMeBP } },
746 { "inc{S|}", { RMeSI } },
747 { "inc{S|}", { RMeDI } },
252b5132 748 /* 48 */
ce518a5f
L		 749 { "dec{S|}", { RMeAX } },
750 { "dec{S|}", { RMeCX } },
751 { "dec{S|}", { RMeDX } },
752 { "dec{S|}", { RMeBX } },
753 { "dec{S|}", { RMeSP } },
754 { "dec{S|}", { RMeBP } },
755 { "dec{S|}", { RMeSI } },
756 { "dec{S|}", { RMeDI } },
252b5132 757 /* 50 */
ce518a5f
L		 758 { "pushV", { RMrAX } },
759 { "pushV", { RMrCX } },
760 { "pushV", { RMrDX } },
761 { "pushV", { RMrBX } },
762 { "pushV", { RMrSP } },
763 { "pushV", { RMrBP } },
764 { "pushV", { RMrSI } },
765 { "pushV", { RMrDI } },
252b5132 766 /* 58 */
ce518a5f
L		 767 { "popV", { RMrAX } },
768 { "popV", { RMrCX } },
769 { "popV", { RMrDX } },
770 { "popV", { RMrBX } },
771 { "popV", { RMrSP } },
772 { "popV", { RMrBP } },
773 { "popV", { RMrSI } },
774 { "popV", { RMrDI } },
252b5132 775 /* 60 */
6439fc28 776 { X86_64_0 },
5f754f58
L		 777 { X86_64_1 },
778 { X86_64_2 },
779 { X86_64_3 },
ce518a5f
L		 780 { "(bad)", { XX } }, /* seg fs */
781 { "(bad)", { XX } }, /* seg gs */
782 { "(bad)", { XX } }, /* op size prefix */
783 { "(bad)", { XX } }, /* adr size prefix */
252b5132 784 /* 68 */
ce518a5f
L		 785 { "pushT", { Iq } },
786 { "imulS", { Gv, Ev, Iv } },
787 { "pushT", { sIb } },
788 { "imulS", { Gv, Ev, sIb } },
789 { "ins{b||b|}", { Ybr, indirDX } },
790 { "ins{R||G|}", { Yzr, indirDX } },
791 { "outs{b||b|}", { indirDXr, Xb } },
792 { "outs{R||G|}", { indirDXr, Xz } },
252b5132 793 /* 70 */
ce518a5f
L		 794 { "joH", { Jb, XX, cond_jump_flag } },
795 { "jnoH", { Jb, XX, cond_jump_flag } },
796 { "jbH", { Jb, XX, cond_jump_flag } },
797 { "jaeH", { Jb, XX, cond_jump_flag } },
798 { "jeH", { Jb, XX, cond_jump_flag } },
799 { "jneH", { Jb, XX, cond_jump_flag } },
800 { "jbeH", { Jb, XX, cond_jump_flag } },
801 { "jaH", { Jb, XX, cond_jump_flag } },
252b5132 802 /* 78 */
ce518a5f
L		 803 { "jsH", { Jb, XX, cond_jump_flag } },
804 { "jnsH", { Jb, XX, cond_jump_flag } },
805 { "jpH", { Jb, XX, cond_jump_flag } },
806 { "jnpH", { Jb, XX, cond_jump_flag } },
807 { "jlH", { Jb, XX, cond_jump_flag } },
808 { "jgeH", { Jb, XX, cond_jump_flag } },
809 { "jleH", { Jb, XX, cond_jump_flag } },
810 { "jgH", { Jb, XX, cond_jump_flag } },
252b5132
RH		 811 /* 80 */
812 { GRP1b },
813 { GRP1S },
ce518a5f 814 { "(bad)", { XX } },
252b5132 815 { GRP1Ss },
ce518a5f
L		 816 { "testB", { Eb, Gb } },
817 { "testS", { Ev, Gv } },
818 { "xchgB", { Eb, Gb } },
819 { "xchgS", { Ev, Gv } },
252b5132 820 /* 88 */
ce518a5f
L		 821 { "movB", { Eb, Gb } },
822 { "movS", { Ev, Gv } },
823 { "movB", { Gb, Eb } },
824 { "movS", { Gv, Ev } },
825 { "movD", { Sv, Sw } },
d8faab4e 826 { OPC_EXT_0 },
ce518a5f 827 { "movD", { Sw, Sv } },
7967e09e 828 { GRP1a },
252b5132 829 /* 90 */
8b38ad71 830 { PREGRP38 },
ce518a5f
L		 831 { "xchgS", { RMeCX, eAX } },
832 { "xchgS", { RMeDX, eAX } },
833 { "xchgS", { RMeBX, eAX } },
834 { "xchgS", { RMeSP, eAX } },
835 { "xchgS", { RMeBP, eAX } },
836 { "xchgS", { RMeSI, eAX } },
837 { "xchgS", { RMeDI, eAX } },
252b5132 838 /* 98 */
ce518a5f
L		 839 { "cW{t||t|}R", { XX } },
840 { "cR{t||t|}O", { XX } },
841 { "Jcall{T|}", { Ap } },
842 { "(bad)", { XX } }, /* fwait */
843 { "pushfT", { XX } },
844 { "popfT", { XX } },
845 { "sahf{|}", { XX } },
846 { "lahf{|}", { XX } },
252b5132 847 /* a0 */
ce518a5f
L		 848 { "movB", { AL, Ob } },
849 { "movS", { eAX, Ov } },
850 { "movB", { Ob, AL } },
851 { "movS", { Ov, eAX } },
852 { "movs{b||b|}", { Ybr, Xb } },
853 { "movs{R||R|}", { Yvr, Xv } },
854 { "cmps{b||b|}", { Xb, Yb } },
855 { "cmps{R||R|}", { Xv, Yv } },
252b5132 856 /* a8 */
ce518a5f
L		 857 { "testB", { AL, Ib } },
858 { "testS", { eAX, Iv } },
859 { "stosB", { Ybr, AL } },
860 { "stosS", { Yvr, eAX } },
861 { "lodsB", { ALr, Xb } },
862 { "lodsS", { eAXr, Xv } },
863 { "scasB", { AL, Yb } },
864 { "scasS", { eAX, Yv } },
252b5132 865 /* b0 */
ce518a5f
L		 866 { "movB", { RMAL, Ib } },
867 { "movB", { RMCL, Ib } },
868 { "movB", { RMDL, Ib } },
869 { "movB", { RMBL, Ib } },
870 { "movB", { RMAH, Ib } },
871 { "movB", { RMCH, Ib } },
872 { "movB", { RMDH, Ib } },
873 { "movB", { RMBH, Ib } },
252b5132 874 /* b8 */
ce518a5f
L		 875 { "movS", { RMeAX, Iv64 } },
876 { "movS", { RMeCX, Iv64 } },
877 { "movS", { RMeDX, Iv64 } },
878 { "movS", { RMeBX, Iv64 } },
879 { "movS", { RMeSP, Iv64 } },
880 { "movS", { RMeBP, Iv64 } },
881 { "movS", { RMeSI, Iv64 } },
882 { "movS", { RMeDI, Iv64 } },
252b5132
RH		 883 /* c0 */
884 { GRP2b },
885 { GRP2S },
ce518a5f
L		 886 { "retT", { Iw } },
887 { "retT", { XX } },
d8faab4e
L		 888 { OPC_EXT_1 },
889 { OPC_EXT_2 },
a6bd098c
L		 890 { GRP11_C6 },
891 { GRP11_C7 },
252b5132 892 /* c8 */
ce518a5f
L		 893 { "enterT", { Iw, Ib } },
894 { "leaveT", { XX } },
895 { "lretP", { Iw } },
896 { "lretP", { XX } },
897 { "int3", { XX } },
898 { "int", { Ib } },
899 { "into{|}", { XX } },
900 { "iretP", { XX } },
252b5132
RH		 901 /* d0 */
902 { GRP2b_one },
903 { GRP2S_one },
904 { GRP2b_cl },
905 { GRP2S_cl },
ce518a5f
L		 906 { "aam{|}", { sIb } },
907 { "aad{|}", { sIb } },
908 { "(bad)", { XX } },
909 { "xlat", { DSBX } },
252b5132
RH		 910 /* d8 */
911 { FLOAT },
912 { FLOAT },
913 { FLOAT },
914 { FLOAT },
915 { FLOAT },
916 { FLOAT },
917 { FLOAT },
918 { FLOAT },
919 /* e0 */
ce518a5f
L		 920 { "loopneFH", { Jb, XX, loop_jcxz_flag } },
921 { "loopeFH", { Jb, XX, loop_jcxz_flag } },
922 { "loopFH", { Jb, XX, loop_jcxz_flag } },
923 { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
924 { "inB", { AL, Ib } },
925 { "inG", { zAX, Ib } },
926 { "outB", { Ib, AL } },
927 { "outG", { Ib, zAX } },
252b5132 928 /* e8 */
ce518a5f
L		 929 { "callT", { Jv } },
930 { "jmpT", { Jv } },
931 { "Jjmp{T|}", { Ap } },
932 { "jmp", { Jb } },
933 { "inB", { AL, indirDX } },
934 { "inG", { zAX, indirDX } },
935 { "outB", { indirDX, AL } },
936 { "outG", { indirDX, zAX } },
252b5132 937 /* f0 */
ce518a5f
L		 938 { "(bad)", { XX } }, /* lock prefix */
939 { "icebp", { XX } },
940 { "(bad)", { XX } }, /* repne */
941 { "(bad)", { XX } }, /* repz */
942 { "hlt", { XX } },
943 { "cmc", { XX } },
252b5132
RH		 944 { GRP3b },
945 { GRP3S },
946 /* f8 */
ce518a5f
L		 947 { "clc", { XX } },
948 { "stc", { XX } },
949 { "cli", { XX } },
950 { "sti", { XX } },
951 { "cld", { XX } },
952 { "std", { XX } },
252b5132
RH		 953 { GRP4 },
954 { GRP5 },
955};
956
6439fc28 957static const struct dis386 dis386_twobyte[] = {
252b5132
RH		 958 /* 00 */
959 { GRP6 },
960 { GRP7 },
ce518a5f
L		 961 { "larS", { Gv, Ew } },
962 { "lslS", { Gv, Ew } },
963 { "(bad)", { XX } },
964 { "syscall", { XX } },
965 { "clts", { XX } },
966 { "sysretP", { XX } },
252b5132 967 /* 08 */
ce518a5f
L		 968 { "invd", { XX } },
969 { "wbinvd", { XX } },
970 { "(bad)", { XX } },
971 { "ud2a", { XX } },
972 { "(bad)", { XX } },
c608c12e 973 { GRPAMD },
ce518a5f
L		 974 { "femms", { XX } },
975 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */
252b5132 976 /* 10 */
c608c12e
AM		 977 { PREGRP8 },
978 { PREGRP9 },
ca164297 979 { PREGRP30 },
876d4bfa 980 { OPC_EXT_34 },
09a2c6cf
L		 981 { "unpcklpX", { XM, EXq } },
982 { "unpckhpX", { XM, EXq } },
ca164297 983 { PREGRP31 },
876d4bfa 984 { OPC_EXT_35 },
252b5132 985 /* 18 */
b3882df9 986 { GRP16 },
ce518a5f
L		 987 { "(bad)", { XX } },
988 { "(bad)", { XX } },
989 { "(bad)", { XX } },
990 { "(bad)", { XX } },
991 { "(bad)", { XX } },
992 { "(bad)", { XX } },
993 { "nopQ", { Ev } },
252b5132 994 /* 20 */
1afd85e3
L		 995 { OPC_EXT_40 },
996 { OPC_EXT_41 },
997 { OPC_EXT_42 },
998 { OPC_EXT_43 },
999 { OPC_EXT_44 },
ce518a5f 1000 { "(bad)", { XX } },
1afd85e3 1001 { OPC_EXT_45 },
ce518a5f 1002 { "(bad)", { XX } },
252b5132 1003 /* 28 */
09a2c6cf
L		 1004 { "movapX", { XM, EXx } },
1005 { "movapX", { EXx, XM } },
c608c12e 1006 { PREGRP2 },
050dfa73 1007 { PREGRP33 },
2da11e11 1008 { PREGRP4 },
c608c12e 1009 { PREGRP3 },
09a2c6cf
L		 1010 { PREGRP93 },
1011 { PREGRP94 },
252b5132 1012 /* 30 */
ce518a5f
L		 1013 { "wrmsr", { XX } },
1014 { "rdtsc", { XX } },
1015 { "rdmsr", { XX } },
1016 { "rdpmc", { XX } },
1017 { "sysenter", { XX } },
1018 { "sysexit", { XX } },
1019 { "(bad)", { XX } },
1020 { "(bad)", { XX } },
252b5132 1021 /* 38 */
331d2d0d 1022 { THREE_BYTE_0 },
ce518a5f 1023 { "(bad)", { XX } },
331d2d0d 1024 { THREE_BYTE_1 },
ce518a5f
L		 1025 { "(bad)", { XX } },
1026 { "(bad)", { XX } },
1027 { "(bad)", { XX } },
1028 { "(bad)", { XX } },
1029 { "(bad)", { XX } },
252b5132 1030 /* 40 */
ce518a5f
L		 1031 { "cmovo", { Gv, Ev } },
1032 { "cmovno", { Gv, Ev } },
1033 { "cmovb", { Gv, Ev } },
1034 { "cmovae", { Gv, Ev } },
1035 { "cmove", { Gv, Ev } },
1036 { "cmovne", { Gv, Ev } },
1037 { "cmovbe", { Gv, Ev } },
1038 { "cmova", { Gv, Ev } },
252b5132 1039 /* 48 */
ce518a5f
L		 1040 { "cmovs", { Gv, Ev } },
1041 { "cmovns", { Gv, Ev } },
1042 { "cmovp", { Gv, Ev } },
1043 { "cmovnp", { Gv, Ev } },
1044 { "cmovl", { Gv, Ev } },
1045 { "cmovge", { Gv, Ev } },
1046 { "cmovle", { Gv, Ev } },
1047 { "cmovg", { Gv, Ev } },
252b5132 1048 /* 50 */
ce518a5f 1049 { "movmskpX", { Gdq, XS } },
c608c12e
AM		 1050 { PREGRP13 },
1051 { PREGRP12 },
1052 { PREGRP11 },
09a2c6cf
L		 1053 { "andpX", { XM, EXx } },
1054 { "andnpX", { XM, EXx } },
1055 { "orpX", { XM, EXx } },
1056 { "xorpX", { XM, EXx } },
252b5132 1057 /* 58 */
c608c12e
AM		 1058 { PREGRP0 },
1059 { PREGRP10 },
041bd2e0
JH		 1060 { PREGRP17 },
1061 { PREGRP16 },
c608c12e
AM		 1062 { PREGRP14 },
1063 { PREGRP7 },
1064 { PREGRP5 },
2da11e11 1065 { PREGRP6 },
252b5132 1066 /* 60 */
09a2c6cf
L		 1067 { PREGRP95 },
1068 { PREGRP96 },
1069 { PREGRP97 },
ce518a5f
L		 1070 { "packsswb", { MX, EM } },
1071 { "pcmpgtb", { MX, EM } },
1072 { "pcmpgtw", { MX, EM } },
1073 { "pcmpgtd", { MX, EM } },
1074 { "packuswb", { MX, EM } },
252b5132 1075 /* 68 */
ce518a5f
L		 1076 { "punpckhbw", { MX, EM } },
1077 { "punpckhwd", { MX, EM } },
1078 { "punpckhdq", { MX, EM } },
1079 { "packssdw", { MX, EM } },
0f17484f 1080 { PREGRP26 },
041bd2e0 1081 { PREGRP24 },
231af070 1082 { "movK", { MX, Edq } },
041bd2e0 1083 { PREGRP19 },
252b5132 1084 /* 70 */
041bd2e0 1085 { PREGRP22 },
252b5132 1086 { GRP12 },
b3882df9
L		 1087 { GRP13 },
1088 { GRP14 },
ce518a5f
L		 1089 { "pcmpeqb", { MX, EM } },
1090 { "pcmpeqw", { MX, EM } },
1091 { "pcmpeqd", { MX, EM } },
1092 { "emms", { XX } },
252b5132 1093 /* 78 */
050dfa73
MM		 1094 { PREGRP34 },
1095 { PREGRP35 },
ce518a5f
L		 1096 { "(bad)", { XX } },
1097 { "(bad)", { XX } },
ca164297
L		 1098 { PREGRP28 },
1099 { PREGRP29 },
041bd2e0
JH		 1100 { PREGRP23 },
1101 { PREGRP20 },
252b5132 1102 /* 80 */
ce518a5f
L		 1103 { "joH", { Jv, XX, cond_jump_flag } },
1104 { "jnoH", { Jv, XX, cond_jump_flag } },
1105 { "jbH", { Jv, XX, cond_jump_flag } },
1106 { "jaeH", { Jv, XX, cond_jump_flag } },
1107 { "jeH", { Jv, XX, cond_jump_flag } },
1108 { "jneH", { Jv, XX, cond_jump_flag } },
1109 { "jbeH", { Jv, XX, cond_jump_flag } },
1110 { "jaH", { Jv, XX, cond_jump_flag } },
252b5132 1111 /* 88 */
ce518a5f
L		 1112 { "jsH", { Jv, XX, cond_jump_flag } },
1113 { "jnsH", { Jv, XX, cond_jump_flag } },
1114 { "jpH", { Jv, XX, cond_jump_flag } },
1115 { "jnpH", { Jv, XX, cond_jump_flag } },
1116 { "jlH", { Jv, XX, cond_jump_flag } },
1117 { "jgeH", { Jv, XX, cond_jump_flag } },
1118 { "jleH", { Jv, XX, cond_jump_flag } },
1119 { "jgH", { Jv, XX, cond_jump_flag } },
252b5132 1120 /* 90 */
ce518a5f
L		 1121 { "seto", { Eb } },
1122 { "setno", { Eb } },
1123 { "setb", { Eb } },
1124 { "setae", { Eb } },
1125 { "sete", { Eb } },
1126 { "setne", { Eb } },
1127 { "setbe", { Eb } },
1128 { "seta", { Eb } },
252b5132 1129 /* 98 */
ce518a5f
L		 1130 { "sets", { Eb } },
1131 { "setns", { Eb } },
1132 { "setp", { Eb } },
1133 { "setnp", { Eb } },
1134 { "setl", { Eb } },
1135 { "setge", { Eb } },
1136 { "setle", { Eb } },
1137 { "setg", { Eb } },
252b5132 1138 /* a0 */
ce518a5f
L		 1139 { "pushT", { fs } },
1140 { "popT", { fs } },
1141 { "cpuid", { XX } },
1142 { "btS", { Ev, Gv } },
1143 { "shldS", { Ev, Gv, Ib } },
1144 { "shldS", { Ev, Gv, CL } },
30d1c836
ML		 1145 { GRPPADLCK2 },
1146 { GRPPADLCK1 },
252b5132 1147 /* a8 */
ce518a5f
L		 1148 { "pushT", { gs } },
1149 { "popT", { gs } },
1150 { "rsm", { XX } },
1151 { "btsS", { Ev, Gv } },
1152 { "shrdS", { Ev, Gv, Ib } },
1153 { "shrdS", { Ev, Gv, CL } },
b3882df9 1154 { GRP15 },
ce518a5f 1155 { "imulS", { Gv, Ev } },
252b5132 1156 /* b0 */
ce518a5f
L		 1157 { "cmpxchgB", { Eb, Gb } },
1158 { "cmpxchgS", { Ev, Gv } },
d8faab4e 1159 { OPC_EXT_3 },
ce518a5f 1160 { "btrS", { Ev, Gv } },
d8faab4e
L		 1161 { OPC_EXT_4 },
1162 { OPC_EXT_5 },
ce518a5f
L		 1163 { "movz{bR|x|bR|x}", { Gv, Eb } },
1164 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
252b5132 1165 /* b8 */
7918206c 1166 { PREGRP37 },
ce518a5f 1167 { "ud2b", { XX } },
252b5132 1168 { GRP8 },
ce518a5f
L		 1169 { "btcS", { Ev, Gv } },
1170 { "bsfS", { Gv, Ev } },
050dfa73 1171 { PREGRP36 },
ce518a5f
L		 1172 { "movs{bR|x|bR|x}", { Gv, Eb } },
1173 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
252b5132 1174 /* c0 */
ce518a5f
L		 1175 { "xaddB", { Eb, Gb } },
1176 { "xaddS", { Ev, Gv } },
c608c12e 1177 { PREGRP1 },
ce518a5f
L		 1178 { "movntiS", { Ev, Gv } },
1179 { "pinsrw", { MX, Edqw, Ib } },
1180 { "pextrw", { Gdq, MS, Ib } },
09a2c6cf 1181 { "shufpX", { XM, EXx, Ib } },
252b5132
RH		 1182 { GRP9 },
1183 /* c8 */
ce518a5f
L		 1184 { "bswap", { RMeAX } },
1185 { "bswap", { RMeCX } },
1186 { "bswap", { RMeDX } },
1187 { "bswap", { RMeBX } },
1188 { "bswap", { RMeSP } },
1189 { "bswap", { RMeBP } },
1190 { "bswap", { RMeSI } },
1191 { "bswap", { RMeDI } },
252b5132 1192 /* d0 */
ca164297 1193 { PREGRP27 },
ce518a5f
L		 1194 { "psrlw", { MX, EM } },
1195 { "psrld", { MX, EM } },
1196 { "psrlq", { MX, EM } },
1197 { "paddq", { MX, EM } },
1198 { "pmullw", { MX, EM } },
041bd2e0 1199 { PREGRP21 },
ce518a5f 1200 { "pmovmskb", { Gdq, MS } },
252b5132 1201 /* d8 */
ce518a5f
L		 1202 { "psubusb", { MX, EM } },
1203 { "psubusw", { MX, EM } },
1204 { "pminub", { MX, EM } },
1205 { "pand", { MX, EM } },
1206 { "paddusb", { MX, EM } },
1207 { "paddusw", { MX, EM } },
1208 { "pmaxub", { MX, EM } },
1209 { "pandn", { MX, EM } },
252b5132 1210 /* e0 */
ce518a5f
L		 1211 { "pavgb", { MX, EM } },
1212 { "psraw", { MX, EM } },
1213 { "psrad", { MX, EM } },
1214 { "pavgw", { MX, EM } },
1215 { "pmulhuw", { MX, EM } },
1216 { "pmulhw", { MX, EM } },
041bd2e0 1217 { PREGRP15 },
0f17484f 1218 { PREGRP25 },
252b5132 1219 /* e8 */
ce518a5f
L		 1220 { "psubsb", { MX, EM } },
1221 { "psubsw", { MX, EM } },
1222 { "pminsw", { MX, EM } },
1223 { "por", { MX, EM } },
1224 { "paddsb", { MX, EM } },
1225 { "paddsw", { MX, EM } },
1226 { "pmaxsw", { MX, EM } },
1227 { "pxor", { MX, EM } },
252b5132 1228 /* f0 */
ca164297 1229 { PREGRP32 },
ce518a5f
L		 1230 { "psllw", { MX, EM } },
1231 { "pslld", { MX, EM } },
1232 { "psllq", { MX, EM } },
1233 { "pmuludq", { MX, EM } },
1234 { "pmaddwd", { MX, EM } },
1235 { "psadbw", { MX, EM } },
041bd2e0 1236 { PREGRP18 },
252b5132 1237 /* f8 */
ce518a5f
L		 1238 { "psubb", { MX, EM } },
1239 { "psubw", { MX, EM } },
1240 { "psubd", { MX, EM } },
1241 { "psubq", { MX, EM } },
1242 { "paddb", { MX, EM } },
1243 { "paddw", { MX, EM } },
1244 { "paddd", { MX, EM } },
1245 { "(bad)", { XX } },
252b5132
RH		 1246};
1247
1248static const unsigned char onebyte_has_modrm[256] = {
c608c12e
AM		 1249 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1250 /* ------------------------------- */
1251 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1252 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1253 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1254 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1255 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1256 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1257 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1258 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1259 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1260 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1261 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1262 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1263 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1264 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1265 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1266 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1267 /* ------------------------------- */
1268 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1269};
1270
1271static const unsigned char twobyte_has_modrm[256] = {
c608c12e
AM		 1272 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1273 /* ------------------------------- */
252b5132 1274 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
15965411 1275 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
4bba6815 1276 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
331d2d0d 1277 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
252b5132 1278 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
4bba6815
AM		 1279 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1280 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
90700ea2 1281 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
252b5132
RH		 1282 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1283 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
30d1c836 1284 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
050dfa73 1285 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
252b5132 1286 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
ca164297 1287 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
4bba6815 1288 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
ca164297 1289 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
c608c12e
AM		 1290 /* ------------------------------- */
1291 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1292};
1293
252b5132
RH		 1294static char obuf[100];
1295static char *obufp;
1296static char scratchbuf[100];
1297static unsigned char *start_codep;
1298static unsigned char *insn_codep;
1299static unsigned char *codep;
b844680a
L		 1300static const char *lock_prefix;
1301static const char *data_prefix;
1302static const char *addr_prefix;
1303static const char *repz_prefix;
1304static const char *repnz_prefix;
252b5132 1305static disassemble_info *the_info;
7967e09e
L		 1306static struct
1307 {
1308 int mod;
7967e09e 1309 int reg;
484c222e 1310 int rm;
7967e09e
L		 1311 }
1312modrm;
4bba6815 1313static unsigned char need_modrm;
252b5132 1314
4bba6815
AM		 1315/* If we are accessing mod/rm/reg without need_modrm set, then the
1316 values are stale. Hitting this abort likely indicates that you
1317 need to update onebyte_has_modrm or twobyte_has_modrm. */
1318#define MODRM_CHECK if (!need_modrm) abort ()
1319
d708bcba
AM		 1320static const char **names64;
1321static const char **names32;
1322static const char **names16;
1323static const char **names8;
1324static const char **names8rex;
1325static const char **names_seg;
1326static const char **index16;
1327
1328static const char *intel_names64[] = {
1329 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1330 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1331};
1332static const char *intel_names32[] = {
1333 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1334 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1335};
1336static const char *intel_names16[] = {
1337 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1338 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1339};
1340static const char *intel_names8[] = {
1341 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1342};
1343static const char *intel_names8rex[] = {
1344 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1345 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1346};
1347static const char *intel_names_seg[] = {
1348 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1349};
1350static const char *intel_index16[] = {
1351 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1352};
1353
1354static const char *att_names64[] = {
1355 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
52b15da3
JH		 1356 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1357};
d708bcba
AM		 1358static const char *att_names32[] = {
1359 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
52b15da3 1360 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
252b5132 1361};
d708bcba
AM		 1362static const char *att_names16[] = {
1363 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
52b15da3 1364 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
252b5132 1365};
d708bcba
AM		 1366static const char *att_names8[] = {
1367 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
252b5132 1368};
d708bcba
AM		 1369static const char *att_names8rex[] = {
1370 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
52b15da3
JH		 1371 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1372};
d708bcba
AM		 1373static const char *att_names_seg[] = {
1374 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
252b5132 1375};
d708bcba
AM		 1376static const char *att_index16[] = {
1377 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
252b5132
RH		 1378};
1379
2da11e11 1380static const struct dis386 grps[][8] = {
7967e09e
L		 1381 /* GRP1a */
1382 {
1383 { "popU", { stackEv } },
1384 { "(bad)", { XX } },
1385 { "(bad)", { XX } },
1386 { "(bad)", { XX } },
1387 { "(bad)", { XX } },
1388 { "(bad)", { XX } },
1389 { "(bad)", { XX } },
1390 { "(bad)", { XX } },
1391 },
252b5132
RH		 1392 /* GRP1b */
1393 {
ce518a5f
L		 1394 { "addA", { Eb, Ib } },
1395 { "orA", { Eb, Ib } },
1396 { "adcA", { Eb, Ib } },
1397 { "sbbA", { Eb, Ib } },
1398 { "andA", { Eb, Ib } },
1399 { "subA", { Eb, Ib } },
1400 { "xorA", { Eb, Ib } },
1401 { "cmpA", { Eb, Ib } },
252b5132
RH		 1402 },
1403 /* GRP1S */
1404 {
ce518a5f
L		 1405 { "addQ", { Ev, Iv } },
1406 { "orQ", { Ev, Iv } },
1407 { "adcQ", { Ev, Iv } },
1408 { "sbbQ", { Ev, Iv } },
1409 { "andQ", { Ev, Iv } },
1410 { "subQ", { Ev, Iv } },
1411 { "xorQ", { Ev, Iv } },
1412 { "cmpQ", { Ev, Iv } },
252b5132
RH		 1413 },
1414 /* GRP1Ss */
1415 {
ce518a5f
L		 1416 { "addQ", { Ev, sIb } },
1417 { "orQ", { Ev, sIb } },
1418 { "adcQ", { Ev, sIb } },
1419 { "sbbQ", { Ev, sIb } },
1420 { "andQ", { Ev, sIb } },
1421 { "subQ", { Ev, sIb } },
1422 { "xorQ", { Ev, sIb } },
1423 { "cmpQ", { Ev, sIb } },
252b5132
RH		 1424 },
1425 /* GRP2b */
1426 {
ce518a5f
L		 1427 { "rolA", { Eb, Ib } },
1428 { "rorA", { Eb, Ib } },
1429 { "rclA", { Eb, Ib } },
1430 { "rcrA", { Eb, Ib } },
1431 { "shlA", { Eb, Ib } },
1432 { "shrA", { Eb, Ib } },
1433 { "(bad)", { XX } },
1434 { "sarA", { Eb, Ib } },
252b5132
RH		 1435 },
1436 /* GRP2S */
1437 {
ce518a5f
L		 1438 { "rolQ", { Ev, Ib } },
1439 { "rorQ", { Ev, Ib } },
1440 { "rclQ", { Ev, Ib } },
1441 { "rcrQ", { Ev, Ib } },
1442 { "shlQ", { Ev, Ib } },
1443 { "shrQ", { Ev, Ib } },
1444 { "(bad)", { XX } },
1445 { "sarQ", { Ev, Ib } },
252b5132
RH		 1446 },
1447 /* GRP2b_one */
1448 {
ce518a5f
L		 1449 { "rolA", { Eb, I1 } },
1450 { "rorA", { Eb, I1 } },
1451 { "rclA", { Eb, I1 } },
1452 { "rcrA", { Eb, I1 } },
1453 { "shlA", { Eb, I1 } },
1454 { "shrA", { Eb, I1 } },
1455 { "(bad)", { XX } },
1456 { "sarA", { Eb, I1 } },
252b5132
RH		 1457 },
1458 /* GRP2S_one */
1459 {
ce518a5f
L		 1460 { "rolQ", { Ev, I1 } },
1461 { "rorQ", { Ev, I1 } },
1462 { "rclQ", { Ev, I1 } },
1463 { "rcrQ", { Ev, I1 } },
1464 { "shlQ", { Ev, I1 } },
1465 { "shrQ", { Ev, I1 } },
1466 { "(bad)", { XX } },
1467 { "sarQ", { Ev, I1 } },
252b5132
RH		 1468 },
1469 /* GRP2b_cl */
1470 {
ce518a5f
L		 1471 { "rolA", { Eb, CL } },
1472 { "rorA", { Eb, CL } },
1473 { "rclA", { Eb, CL } },
1474 { "rcrA", { Eb, CL } },
1475 { "shlA", { Eb, CL } },
1476 { "shrA", { Eb, CL } },
1477 { "(bad)", { XX } },
1478 { "sarA", { Eb, CL } },
252b5132
RH		 1479 },
1480 /* GRP2S_cl */
1481 {
ce518a5f
L		 1482 { "rolQ", { Ev, CL } },
1483 { "rorQ", { Ev, CL } },
1484 { "rclQ", { Ev, CL } },
1485 { "rcrQ", { Ev, CL } },
1486 { "shlQ", { Ev, CL } },
1487 { "shrQ", { Ev, CL } },
1488 { "(bad)", { XX } },
1489 { "sarQ", { Ev, CL } },
252b5132
RH		 1490 },
1491 /* GRP3b */
1492 {
ce518a5f
L		 1493 { "testA", { Eb, Ib } },
1494 { "(bad)", { Eb } },
1495 { "notA", { Eb } },
1496 { "negA", { Eb } },
1497 { "mulA", { Eb } }, /* Don't print the implicit %al register, */
1498 { "imulA", { Eb } }, /* to distinguish these opcodes from other */
1499 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */
1500 { "idivA", { Eb } }, /* and idiv for consistency. */
252b5132
RH		 1501 },
1502 /* GRP3S */
1503 {
ce518a5f
L		 1504 { "testQ", { Ev, Iv } },
1505 { "(bad)", { XX } },
1506 { "notQ", { Ev } },
1507 { "negQ", { Ev } },
1508 { "mulQ", { Ev } }, /* Don't print the implicit register. */
1509 { "imulQ", { Ev } },
1510 { "divQ", { Ev } },
1511 { "idivQ", { Ev } },
252b5132
RH		 1512 },
1513 /* GRP4 */
1514 {
ce518a5f
L		 1515 { "incA", { Eb } },
1516 { "decA", { Eb } },
1517 { "(bad)", { XX } },
1518 { "(bad)", { XX } },
1519 { "(bad)", { XX } },
1520 { "(bad)", { XX } },
1521 { "(bad)", { XX } },
1522 { "(bad)", { XX } },
252b5132
RH		 1523 },
1524 /* GRP5 */
1525 {
ce518a5f
L		 1526 { "incQ", { Ev } },
1527 { "decQ", { Ev } },
1528 { "callT", { indirEv } },
1529 { "JcallT", { indirEp } },
1530 { "jmpT", { indirEv } },
1531 { "JjmpT", { indirEp } },
1532 { "pushU", { stackEv } },
1533 { "(bad)", { XX } },
252b5132
RH		 1534 },
1535 /* GRP6 */
1536 {
ce518a5f
L		 1537 { "sldtD", { Sv } },
1538 { "strD", { Sv } },
1539 { "lldt", { Ew } },
1540 { "ltr", { Ew } },
1541 { "verr", { Ew } },
1542 { "verw", { Ew } },
1543 { "(bad)", { XX } },
1544 { "(bad)", { XX } },
252b5132
RH		 1545 },
1546 /* GRP7 */
1547 {
d8faab4e
L		 1548 { OPC_EXT_6 },
1549 { OPC_EXT_7 },
1550 { OPC_EXT_8 },
144c41d9 1551 { OPC_EXT_39 },
ce518a5f
L		 1552 { "smswD", { Sv } },
1553 { "(bad)", { XX } },
1554 { "lmsw", { Ew } },
bbedc832 1555 { OPC_EXT_38 },
252b5132
RH		 1556 },
1557 /* GRP8 */
1558 {
ce518a5f
L		 1559 { "(bad)", { XX } },
1560 { "(bad)", { XX } },
1561 { "(bad)", { XX } },
1562 { "(bad)", { XX } },
1563 { "btQ", { Ev, Ib } },
1564 { "btsQ", { Ev, Ib } },
1565 { "btrQ", { Ev, Ib } },
1566 { "btcQ", { Ev, Ib } },
252b5132
RH		 1567 },
1568 /* GRP9 */
1569 {
ce518a5f
L		 1570 { "(bad)", { XX } },
1571 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1572 { "(bad)", { XX } },
1573 { "(bad)", { XX } },
1574 { "(bad)", { XX } },
1575 { "(bad)", { XX } },
d8faab4e
L		 1576 { OPC_EXT_9 },
1577 { OPC_EXT_10 },
252b5132 1578 },
a6bd098c
L		 1579 /* GRP11_C6 */
1580 {
ce518a5f
L		 1581 { "movA", { Eb, Ib } },
1582 { "(bad)", { XX } },
1583 { "(bad)", { XX } },
1584 { "(bad)", { XX } },
1585 { "(bad)", { XX } },
1586 { "(bad)", { XX } },
1587 { "(bad)", { XX } },
1588 { "(bad)", { XX } },
a6bd098c
L		 1589 },
1590 /* GRP11_C7 */
1591 {
ce518a5f
L		 1592 { "movQ", { Ev, Iv } },
1593 { "(bad)", { XX } },
1594 { "(bad)", { XX } },
1595 { "(bad)", { XX } },
1596 { "(bad)", { XX } },
1597 { "(bad)", { XX } },
1598 { "(bad)", { XX } },
1599 { "(bad)", { XX } },
a6bd098c 1600 },
b3882df9 1601 /* GRP12 */
252b5132 1602 {
ce518a5f
L		 1603 { "(bad)", { XX } },
1604 { "(bad)", { XX } },
d8faab4e 1605 { OPC_EXT_11 },
ce518a5f 1606 { "(bad)", { XX } },
d8faab4e 1607 { OPC_EXT_12 },
ce518a5f 1608 { "(bad)", { XX } },
d8faab4e 1609 { OPC_EXT_13 },
ce518a5f 1610 { "(bad)", { XX } },
252b5132 1611 },
b3882df9 1612 /* GRP13 */
252b5132 1613 {
ce518a5f
L		 1614 { "(bad)", { XX } },
1615 { "(bad)", { XX } },
d8faab4e 1616 { OPC_EXT_14 },
ce518a5f 1617 { "(bad)", { XX } },
d8faab4e 1618 { OPC_EXT_15 },
ce518a5f 1619 { "(bad)", { XX } },
d8faab4e 1620 { OPC_EXT_16 },
ce518a5f 1621 { "(bad)", { XX } },
252b5132 1622 },
b3882df9 1623 /* GRP14 */
252b5132 1624 {
ce518a5f
L		 1625 { "(bad)", { XX } },
1626 { "(bad)", { XX } },
b844680a 1627 { OPC_EXT_17 },
b844680a 1628 { OPC_EXT_18 },
d8faab4e
L		 1629 { "(bad)", { XX } },
1630 { "(bad)", { XX } },
b844680a
L		 1631 { OPC_EXT_19 },
1632 { OPC_EXT_20 },
c608c12e 1633 },
d8faab4e 1634 /* GRP15 */
c608c12e 1635 {
b844680a
L		 1636 { OPC_EXT_21 },
1637 { OPC_EXT_22 },
1638 { OPC_EXT_23 },
1639 { OPC_EXT_24 },
1640 { "(bad)", { XX } },
d8faab4e
L		 1641 { OPC_EXT_25 },
1642 { OPC_EXT_26 },
1643 { OPC_EXT_27 },
1644 },
1645 /* GRP16 */
1646 {
1647 { OPC_EXT_28 },
1648 { OPC_EXT_29 },
1649 { OPC_EXT_30 },
1650 { OPC_EXT_31 },
1651 { "(bad)", { XX } },
b844680a
L		 1652 { "(bad)", { XX } },
1653 { "(bad)", { XX } },
1654 { "(bad)", { XX } },
252b5132 1655 },
c608c12e 1656 /* GRPAMD */
252b5132 1657 {
ce518a5f
L		 1658 { "prefetch", { Eb } },
1659 { "prefetchw", { Eb } },
1660 { "(bad)", { XX } },
1661 { "(bad)", { XX } },
1662 { "(bad)", { XX } },
1663 { "(bad)", { XX } },
1664 { "(bad)", { XX } },
1665 { "(bad)", { XX } },
0f10071e 1666 },
30d1c836 1667 /* GRPPADLCK1 */
cc0ec051 1668 {
ce518a5f
L		 1669 { "xstore-rng", { { OP_0f07, 0 } } },
1670 { "xcrypt-ecb", { { OP_0f07, 0 } } },
1671 { "xcrypt-cbc", { { OP_0f07, 0 } } },
1672 { "xcrypt-ctr", { { OP_0f07, 0 } } },
1673 { "xcrypt-cfb", { { OP_0f07, 0 } } },
1674 { "xcrypt-ofb", { { OP_0f07, 0 } } },
1675 { "(bad)", { { OP_0f07, 0 } } },
1676 { "(bad)", { { OP_0f07, 0 } } },
30d1c836
ML		 1677 },
1678 /* GRPPADLCK2 */
1679 {
ce518a5f
L		 1680 { "montmul", { { OP_0f07, 0 } } },
1681 { "xsha1", { { OP_0f07, 0 } } },
1682 { "xsha256", { { OP_0f07, 0 } } },
1683 { "(bad)", { { OP_0f07, 0 } } },
1684 { "(bad)", { { OP_0f07, 0 } } },
1685 { "(bad)", { { OP_0f07, 0 } } },
1686 { "(bad)", { { OP_0f07, 0 } } },
1687 { "(bad)", { { OP_0f07, 0 } } },
252b5132 1688 }
252b5132
RH		 1689};
1690
041bd2e0 1691static const struct dis386 prefix_user_table[][4] = {
c608c12e
AM		 1692 /* PREGRP0 */
1693 {
09a2c6cf
L		 1694 { "addps", { XM, EXx } },
1695 { "addss", { XM, EXd } },
1696 { "addpd", { XM, EXx } },
1697 { "addsd", { XM, EXq } },
c608c12e
AM		 1698 },
1699 /* PREGRP1 */
1700 {
09a2c6cf 1701 { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */
09335d05 1702 { "", { XM, EXd, OPSIMD } },
09a2c6cf 1703 { "", { XM, EXx, OPSIMD } },
09335d05 1704 { "", { XM, EXq, OPSIMD } },
c608c12e
AM		 1705 },
1706 /* PREGRP2 */
1707 {
09335d05 1708 { "cvtpi2ps", { XM, EMCq } },
ce518a5f 1709 { "cvtsi2ssY", { XM, Ev } },
09335d05 1710 { "cvtpi2pd", { XM, EMCq } },
ce518a5f 1711 { "cvtsi2sdY", { XM, Ev } },
c608c12e
AM		 1712 },
1713 /* PREGRP3 */
1714 {
09335d05
L		 1715 { "cvtps2pi", { MXC, EXq } },
1716 { "cvtss2siY", { Gv, EXd } },
09a2c6cf 1717 { "cvtpd2pi", { MXC, EXx } },
09335d05 1718 { "cvtsd2siY", { Gv, EXq } },
c608c12e
AM		 1719 },
1720 /* PREGRP4 */
1721 {
09335d05
L		 1722 { "cvttps2pi", { MXC, EXq } },
1723 { "cvttss2siY", { Gv, EXd } },
09a2c6cf 1724 { "cvttpd2pi", { MXC, EXx } },
09335d05 1725 { "cvttsd2siY", { Gv, EXq } },
c608c12e
AM		 1726 },
1727 /* PREGRP5 */
1728 {
09a2c6cf 1729 { "divps", { XM, EXx } },
09335d05 1730 { "divss", { XM, EXd } },
09a2c6cf 1731 { "divpd", { XM, EXx } },
09335d05 1732 { "divsd", { XM, EXq } },
c608c12e
AM		 1733 },
1734 /* PREGRP6 */
1735 {
09a2c6cf 1736 { "maxps", { XM, EXx } },
09335d05 1737 { "maxss", { XM, EXd } },
09a2c6cf 1738 { "maxpd", { XM, EXx } },
09335d05 1739 { "maxsd", { XM, EXq } },
c608c12e
AM		 1740 },
1741 /* PREGRP7 */
1742 {
09a2c6cf 1743 { "minps", { XM, EXx } },
09335d05 1744 { "minss", { XM, EXd } },
09a2c6cf 1745 { "minpd", { XM, EXx } },
09335d05 1746 { "minsd", { XM, EXq } },
c608c12e
AM		 1747 },
1748 /* PREGRP8 */
1749 {
09a2c6cf 1750 { "movups", { XM, EXx } },
09335d05 1751 { "movss", { XM, EXd } },
09a2c6cf 1752 { "movupd", { XM, EXx } },
09335d05 1753 { "movsd", { XM, EXq } },
c608c12e
AM		 1754 },
1755 /* PREGRP9 */
1756 {
09a2c6cf 1757 { "movups", { EXx, XM } },
09335d05 1758 { "movss", { EXd, XM } },
09a2c6cf 1759 { "movupd", { EXx, XM } },
09335d05 1760 { "movsd", { EXq, XM } },
c608c12e
AM		 1761 },
1762 /* PREGRP10 */
1763 {
09a2c6cf 1764 { "mulps", { XM, EXx } },
09335d05 1765 { "mulss", { XM, EXd } },
09a2c6cf 1766 { "mulpd", { XM, EXx } },
09335d05 1767 { "mulsd", { XM, EXq } },
c608c12e
AM		 1768 },
1769 /* PREGRP11 */
1770 {
09a2c6cf 1771 { "rcpps", { XM, EXx } },
09335d05 1772 { "rcpss", { XM, EXd } },
09a2c6cf
L		 1773 { "(bad)", { XM, EXx } },
1774 { "(bad)", { XM, EXx } },
c608c12e
AM		 1775 },
1776 /* PREGRP12 */
1777 {
09a2c6cf 1778 { "rsqrtps",{ XM, EXx } },
09335d05 1779 { "rsqrtss",{ XM, EXd } },
09a2c6cf
L		 1780 { "(bad)", { XM, EXx } },
1781 { "(bad)", { XM, EXx } },
c608c12e
AM		 1782 },
1783 /* PREGRP13 */
1784 {
09a2c6cf 1785 { "sqrtps", { XM, EXx } },
09335d05 1786 { "sqrtss", { XM, EXd } },
09a2c6cf 1787 { "sqrtpd", { XM, EXx } },
09335d05 1788 { "sqrtsd", { XM, EXq } },
c608c12e
AM		 1789 },
1790 /* PREGRP14 */
1791 {
09a2c6cf 1792 { "subps", { XM, EXx } },
09335d05 1793 { "subss", { XM, EXd } },
09a2c6cf 1794 { "subpd", { XM, EXx } },
09335d05 1795 { "subsd", { XM, EXq } },
041bd2e0
JH		 1796 },
1797 /* PREGRP15 */
1798 {
09a2c6cf
L		 1799 { "(bad)", { XM, EXx } },
1800 { "cvtdq2pd", { XM, EXq } },
1801 { "cvttpd2dq", { XM, EXx } },
1802 { "cvtpd2dq", { XM, EXx } },
041bd2e0
JH		 1803 },
1804 /* PREGRP16 */
1805 {
09a2c6cf
L		 1806 { "cvtdq2ps", { XM, EXx } },
1807 { "cvttps2dq", { XM, EXx } },
1808 { "cvtps2dq", { XM, EXx } },
1809 { "(bad)", { XM, EXx } },
041bd2e0
JH		 1810 },
1811 /* PREGRP17 */
1812 {
09a2c6cf 1813 { "cvtps2pd", { XM, EXq } },
09335d05 1814 { "cvtss2sd", { XM, EXd } },
09a2c6cf 1815 { "cvtpd2ps", { XM, EXx } },
09335d05 1816 { "cvtsd2ss", { XM, EXq } },
041bd2e0
JH		 1817 },
1818 /* PREGRP18 */
1819 {
ce518a5f 1820 { "maskmovq", { MX, MS } },
09a2c6cf 1821 { "(bad)", { XM, EXx } },
ce518a5f 1822 { "maskmovdqu", { XM, XS } },
09a2c6cf 1823 { "(bad)", { XM, EXx } },
041bd2e0
JH		 1824 },
1825 /* PREGRP19 */
1826 {
ce518a5f 1827 { "movq", { MX, EM } },
09a2c6cf
L		 1828 { "movdqu", { XM, EXx } },
1829 { "movdqa", { XM, EXx } },
1830 { "(bad)", { XM, EXx } },
041bd2e0
JH		 1831 },
1832 /* PREGRP20 */
1833 {
ce518a5f 1834 { "movq", { EM, MX } },
09a2c6cf
L		 1835 { "movdqu", { EXx, XM } },
1836 { "movdqa", { EXx, XM } },
1837 { "(bad)", { EXx, XM } },
041bd2e0
JH		 1838 },
1839 /* PREGRP21 */
1840 {
09a2c6cf 1841 { "(bad)", { EXx, XM } },
ce518a5f 1842 { "movq2dq",{ XM, MS } },
231af070 1843 { "movq", { EXq, XM } },
ce518a5f 1844 { "movdq2q",{ MX, XS } },
041bd2e0
JH		 1845 },
1846 /* PREGRP22 */
1847 {
ce518a5f 1848 { "pshufw", { MX, EM, Ib } },
09a2c6cf
L		 1849 { "pshufhw",{ XM, EXx, Ib } },
1850 { "pshufd", { XM, EXx, Ib } },
1851 { "pshuflw",{ XM, EXx, Ib } },
041bd2e0
JH		 1852 },
1853 /* PREGRP23 */
1854 {
231af070
L		 1855 { "movK", { Edq, MX } },
1856 { "movq", { XM, EXq } },
1857 { "movK", { Edq, XM } },
ce518a5f 1858 { "(bad)", { Ed, XM } },
041bd2e0
JH		 1859 },
1860 /* PREGRP24 */
1861 {
09a2c6cf
L		 1862 { "(bad)", { MX, EXx } },
1863 { "(bad)", { XM, EXx } },
1864 { "punpckhqdq", { XM, EXx } },
1865 { "(bad)", { XM, EXx } },
0f17484f
AM		 1866 },
1867 /* PREGRP25 */
1868 {
ce518a5f
L		 1869 { "movntq", { EM, MX } },
1870 { "(bad)", { EM, XM } },
1871 { "movntdq",{ EM, XM } },
1872 { "(bad)", { EM, XM } },
0f17484f
AM		 1873 },
1874 /* PREGRP26 */
1875 {
09a2c6cf
L		 1876 { "(bad)", { MX, EXx } },
1877 { "(bad)", { XM, EXx } },
1878 { "punpcklqdq", { XM, EXx } },
1879 { "(bad)", { XM, EXx } },
041bd2e0 1880 },
ca164297
L		 1881 /* PREGRP27 */
1882 {
09a2c6cf
L		 1883 { "(bad)", { MX, EXx } },
1884 { "(bad)", { XM, EXx } },
1885 { "addsubpd", { XM, EXx } },
1886 { "addsubps", { XM, EXx } },
ca164297
L		 1887 },
1888 /* PREGRP28 */
1889 {
09a2c6cf
L		 1890 { "(bad)", { MX, EXx } },
1891 { "(bad)", { XM, EXx } },
1892 { "haddpd", { XM, EXx } },
1893 { "haddps", { XM, EXx } },
ca164297
L		 1894 },
1895 /* PREGRP29 */
1896 {
09a2c6cf
L		 1897 { "(bad)", { MX, EXx } },
1898 { "(bad)", { XM, EXx } },
1899 { "hsubpd", { XM, EXx } },
1900 { "hsubps", { XM, EXx } },
ca164297
L		 1901 },
1902 /* PREGRP30 */
1903 {
876d4bfa 1904 { OPC_EXT_36 },
09a2c6cf
L		 1905 { "movsldup", { XM, EXx } },
1906 { "movlpd", { XM, EXq } },
1907 { "movddup", { XM, EXq } },
ca164297
L		 1908 },
1909 /* PREGRP31 */
1910 {
876d4bfa 1911 { OPC_EXT_37 },
09a2c6cf
L		 1912 { "movshdup", { XM, EXx } },
1913 { "movhpd", { XM, EXq } },
1914 { "(bad)", { XM, EXq } },
ca164297
L		 1915 },
1916 /* PREGRP32 */
1917 {
09a2c6cf
L		 1918 { "(bad)", { XM, EXx } },
1919 { "(bad)", { XM, EXx } },
1920 { "(bad)", { XM, EXx } },
d8faab4e 1921 { OPC_EXT_32 },
ca164297 1922 },
050dfa73
MM		 1923 /* PREGRP33 */
1924 {
ce518a5f 1925 {"movntps", { Ev, XM } },
09335d05 1926 {"movntss", { Ed, XM } },
ce518a5f 1927 {"movntpd", { Ev, XM } },
09335d05 1928 {"movntsd", { Eq, XM } },
050dfa73
MM		 1929 },
1930
1931 /* PREGRP34 */
1932 {
ce518a5f
L		 1933 {"vmread", { Em, Gm } },
1934 {"(bad)", { XX } },
1935 {"extrq", { XS, Ib, Ib } },
1936 {"insertq", { XM, XS, Ib, Ib } },
050dfa73 1937 },
246c51aa
L		 1938
1939 /* PREGRP35 */
050dfa73 1940 {
ce518a5f
L		 1941 {"vmwrite", { Gm, Em } },
1942 {"(bad)", { XX } },
1943 {"extrq", { XM, XS } },
1944 {"insertq", { XM, XS } },
246c51aa 1945 },
050dfa73
MM		 1946
1947 /* PREGRP36 */
1948 {
ce518a5f
L		 1949 { "bsrS", { Gv, Ev } },
1950 { "lzcntS", { Gv, Ev } },
1951 { "bsrS", { Gv, Ev } },
1952 { "(bad)", { XX } },
050dfa73
MM		 1953 },
1954
7918206c
MM		 1955 /* PREGRP37 */
1956 {
d25a0fc5 1957 { "(bad)", { XX } },
ce518a5f 1958 { "popcntS", { Gv, Ev } },
d25a0fc5 1959 { "(bad)", { XX } },
246c51aa 1960 { "(bad)", { XX } },
7918206c 1961 },
8b38ad71
L		 1962
1963 /* PREGRP38 */
1964 {
1965 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1966 { "pause", { XX } },
1967 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
246c51aa 1968 { "(bad)", { XX } },
8b38ad71 1969 },
42903f7f
L		 1970
1971 /* PREGRP39 */
1972 {
1973 { "(bad)", { XX } },
1974 { "(bad)", { XX } },
09a2c6cf 1975 { "pblendvb", {XM, EXx, XMM0 } },
42903f7f
L		 1976 { "(bad)", { XX } },
1977 },
1978
1979 /* PREGRP40 */
1980 {
1981 { "(bad)", { XX } },
1982 { "(bad)", { XX } },
09a2c6cf 1983 { "blendvps", {XM, EXx, XMM0 } },
42903f7f
L		 1984 { "(bad)", { XX } },
1985 },
1986
1987 /* PREGRP41 */
1988 {
1989 { "(bad)", { XX } },
1990 { "(bad)", { XX } },
09a2c6cf 1991 { "blendvpd", { XM, EXx, XMM0 } },
42903f7f
L		 1992 { "(bad)", { XX } },
1993 },
1994
1995 /* PREGRP42 */
1996 {
1997 { "(bad)", { XX } },
1998 { "(bad)", { XX } },
09a2c6cf 1999 { "ptest", { XM, EXx } },
42903f7f
L		 2000 { "(bad)", { XX } },
2001 },
2002
2003 /* PREGRP43 */
2004 {
2005 { "(bad)", { XX } },
2006 { "(bad)", { XX } },
8976381e 2007 { "pmovsxbw", { XM, EXq } },
42903f7f
L		 2008 { "(bad)", { XX } },
2009 },
2010
2011 /* PREGRP44 */
2012 {
2013 { "(bad)", { XX } },
2014 { "(bad)", { XX } },
8976381e 2015 { "pmovsxbd", { XM, EXd } },
42903f7f
L		 2016 { "(bad)", { XX } },
2017 },
2018
2019 /* PREGRP45 */
2020 {
2021 { "(bad)", { XX } },
2022 { "(bad)", { XX } },
8976381e 2023 { "pmovsxbq", { XM, EXw } },
42903f7f
L		 2024 { "(bad)", { XX } },
2025 },
2026
2027 /* PREGRP46 */
2028 {
2029 { "(bad)", { XX } },
2030 { "(bad)", { XX } },
8976381e 2031 { "pmovsxwd", { XM, EXq } },
42903f7f
L		 2032 { "(bad)", { XX } },
2033 },
2034
2035 /* PREGRP47 */
2036 {
2037 { "(bad)", { XX } },
2038 { "(bad)", { XX } },
8976381e 2039 { "pmovsxwq", { XM, EXd } },
42903f7f
L		 2040 { "(bad)", { XX } },
2041 },
2042
2043 /* PREGRP48 */
2044 {
2045 { "(bad)", { XX } },
2046 { "(bad)", { XX } },
8976381e 2047 { "pmovsxdq", { XM, EXq } },
42903f7f
L		 2048 { "(bad)", { XX } },
2049 },
2050
2051 /* PREGRP49 */
2052 {
2053 { "(bad)", { XX } },
2054 { "(bad)", { XX } },
09a2c6cf 2055 { "pmuldq", { XM, EXx } },
42903f7f
L		 2056 { "(bad)", { XX } },
2057 },
2058
2059 /* PREGRP50 */
2060 {
2061 { "(bad)", { XX } },
2062 { "(bad)", { XX } },
09a2c6cf 2063 { "pcmpeqq", { XM, EXx } },
42903f7f
L		 2064 { "(bad)", { XX } },
2065 },
2066
2067 /* PREGRP51 */
2068 {
2069 { "(bad)", { XX } },
2070 { "(bad)", { XX } },
2071 { "movntdqa", { XM, EM } },
2072 { "(bad)", { XX } },
2073 },
2074
2075 /* PREGRP52 */
2076 {
2077 { "(bad)", { XX } },
2078 { "(bad)", { XX } },
09a2c6cf 2079 { "packusdw", { XM, EXx } },
42903f7f
L		 2080 { "(bad)", { XX } },
2081 },
2082
2083 /* PREGRP53 */
2084 {
2085 { "(bad)", { XX } },
2086 { "(bad)", { XX } },
8976381e 2087 { "pmovzxbw", { XM, EXq } },
42903f7f
L		 2088 { "(bad)", { XX } },
2089 },
2090
2091 /* PREGRP54 */
2092 {
2093 { "(bad)", { XX } },
2094 { "(bad)", { XX } },
8976381e 2095 { "pmovzxbd", { XM, EXd } },
42903f7f
L		 2096 { "(bad)", { XX } },
2097 },
2098
2099 /* PREGRP55 */
2100 {
2101 { "(bad)", { XX } },
2102 { "(bad)", { XX } },
8976381e 2103 { "pmovzxbq", { XM, EXw } },
42903f7f
L		 2104 { "(bad)", { XX } },
2105 },
2106
2107 /* PREGRP56 */
2108 {
2109 { "(bad)", { XX } },
2110 { "(bad)", { XX } },
8976381e 2111 { "pmovzxwd", { XM, EXq } },
42903f7f
L		 2112 { "(bad)", { XX } },
2113 },
2114
2115 /* PREGRP57 */
2116 {
2117 { "(bad)", { XX } },
2118 { "(bad)", { XX } },
8976381e 2119 { "pmovzxwq", { XM, EXd } },
42903f7f
L		 2120 { "(bad)", { XX } },
2121 },
2122
2123 /* PREGRP58 */
2124 {
2125 { "(bad)", { XX } },
2126 { "(bad)", { XX } },
8976381e 2127 { "pmovzxdq", { XM, EXq } },
42903f7f
L		 2128 { "(bad)", { XX } },
2129 },
2130
2131 /* PREGRP59 */
2132 {
2133 { "(bad)", { XX } },
2134 { "(bad)", { XX } },
09a2c6cf 2135 { "pminsb", { XM, EXx } },
42903f7f
L		 2136 { "(bad)", { XX } },
2137 },
2138
2139 /* PREGRP60 */
2140 {
2141 { "(bad)", { XX } },
2142 { "(bad)", { XX } },
09a2c6cf 2143 { "pminsd", { XM, EXx } },
42903f7f
L		 2144 { "(bad)", { XX } },
2145 },
2146
2147 /* PREGRP61 */
2148 {
2149 { "(bad)", { XX } },
2150 { "(bad)", { XX } },
09a2c6cf 2151 { "pminuw", { XM, EXx } },
42903f7f
L		 2152 { "(bad)", { XX } },
2153 },
2154
2155 /* PREGRP62 */
2156 {
2157 { "(bad)", { XX } },
2158 { "(bad)", { XX } },
09a2c6cf 2159 { "pminud", { XM, EXx } },
42903f7f
L		 2160 { "(bad)", { XX } },
2161 },
2162
2163 /* PREGRP63 */
2164 {
2165 { "(bad)", { XX } },
2166 { "(bad)", { XX } },
09a2c6cf 2167 { "pmaxsb", { XM, EXx } },
42903f7f
L		 2168 { "(bad)", { XX } },
2169 },
2170
2171 /* PREGRP64 */
2172 {
2173 { "(bad)", { XX } },
2174 { "(bad)", { XX } },
09a2c6cf 2175 { "pmaxsd", { XM, EXx } },
42903f7f
L		 2176 { "(bad)", { XX } },
2177 },
2178
2179 /* PREGRP65 */
2180 {
2181 { "(bad)", { XX } },
2182 { "(bad)", { XX } },
09a2c6cf 2183 { "pmaxuw", { XM, EXx } },
42903f7f
L		 2184 { "(bad)", { XX } },
2185 },
2186
2187 /* PREGRP66 */
2188 {
2189 { "(bad)", { XX } },
2190 { "(bad)", { XX } },
09a2c6cf 2191 { "pmaxud", { XM, EXx } },
42903f7f
L		 2192 { "(bad)", { XX } },
2193 },
2194
2195 /* PREGRP67 */
2196 {
2197 { "(bad)", { XX } },
2198 { "(bad)", { XX } },
09a2c6cf 2199 { "pmulld", { XM, EXx } },
42903f7f
L		 2200 { "(bad)", { XX } },
2201 },
2202
2203 /* PREGRP68 */
2204 {
2205 { "(bad)", { XX } },
2206 { "(bad)", { XX } },
09a2c6cf 2207 { "phminposuw", { XM, EXx } },
42903f7f
L		 2208 { "(bad)", { XX } },
2209 },
2210
2211 /* PREGRP69 */
2212 {
2213 { "(bad)", { XX } },
2214 { "(bad)", { XX } },
09a2c6cf 2215 { "roundps", { XM, EXx, Ib } },
42903f7f
L		 2216 { "(bad)", { XX } },
2217 },
2218
2219 /* PREGRP70 */
2220 {
2221 { "(bad)", { XX } },
2222 { "(bad)", { XX } },
09a2c6cf 2223 { "roundpd", { XM, EXx, Ib } },
42903f7f
L		 2224 { "(bad)", { XX } },
2225 },
2226
2227 /* PREGRP71 */
2228 {
2229 { "(bad)", { XX } },
2230 { "(bad)", { XX } },
09335d05 2231 { "roundss", { XM, EXd, Ib } },
42903f7f
L		 2232 { "(bad)", { XX } },
2233 },
2234
2235 /* PREGRP72 */
2236 {
2237 { "(bad)", { XX } },
2238 { "(bad)", { XX } },
09335d05 2239 { "roundsd", { XM, EXq, Ib } },
42903f7f
L		 2240 { "(bad)", { XX } },
2241 },
2242
2243 /* PREGRP73 */
2244 {
2245 { "(bad)", { XX } },
2246 { "(bad)", { XX } },
09a2c6cf 2247 { "blendps", { XM, EXx, Ib } },
42903f7f
L		 2248 { "(bad)", { XX } },
2249 },
2250
2251 /* PREGRP74 */
2252 {
2253 { "(bad)", { XX } },
2254 { "(bad)", { XX } },
09a2c6cf 2255 { "blendpd", { XM, EXx, Ib } },
42903f7f
L		 2256 { "(bad)", { XX } },
2257 },
2258
2259 /* PREGRP75 */
2260 {
2261 { "(bad)", { XX } },
2262 { "(bad)", { XX } },
09a2c6cf 2263 { "pblendw", { XM, EXx, Ib } },
42903f7f
L		 2264 { "(bad)", { XX } },
2265 },
2266
2267 /* PREGRP76 */
2268 {
2269 { "(bad)", { XX } },
2270 { "(bad)", { XX } },
2271 { "pextrb", { Edqb, XM, Ib } },
2272 { "(bad)", { XX } },
2273 },
2274
2275 /* PREGRP77 */
2276 {
2277 { "(bad)", { XX } },
2278 { "(bad)", { XX } },
2279 { "pextrw", { Edqw, XM, Ib } },
2280 { "(bad)", { XX } },
2281 },
2282
2283 /* PREGRP78 */
2284 {
2285 { "(bad)", { XX } },
2286 { "(bad)", { XX } },
2287 { "pextrK", { Edq, XM, Ib } },
2288 { "(bad)", { XX } },
2289 },
2290
2291 /* PREGRP79 */
2292 {
2293 { "(bad)", { XX } },
2294 { "(bad)", { XX } },
2295 { "extractps", { Edqd, XM, Ib } },
2296 { "(bad)", { XX } },
2297 },
2298
2299 /* PREGRP80 */
2300 {
2301 { "(bad)", { XX } },
2302 { "(bad)", { XX } },
2303 { "pinsrb", { XM, Edqb, Ib } },
2304 { "(bad)", { XX } },
2305 },
2306
2307 /* PREGRP81 */
2308 {
2309 { "(bad)", { XX } },
2310 { "(bad)", { XX } },
8976381e 2311 { "insertps", { XM, EXd, Ib } },
42903f7f
L		 2312 { "(bad)", { XX } },
2313 },
2314
2315 /* PREGRP82 */
2316 {
2317 { "(bad)", { XX } },
2318 { "(bad)", { XX } },
2319 { "pinsrK", { XM, Edq, Ib } },
2320 { "(bad)", { XX } },
2321 },
2322
2323 /* PREGRP83 */
2324 {
2325 { "(bad)", { XX } },
2326 { "(bad)", { XX } },
09a2c6cf 2327 { "dpps", { XM, EXx, Ib } },
42903f7f
L		 2328 { "(bad)", { XX } },
2329 },
2330
2331 /* PREGRP84 */
2332 {
2333 { "(bad)", { XX } },
2334 { "(bad)", { XX } },
09a2c6cf 2335 { "dppd", { XM, EXx, Ib } },
42903f7f
L		 2336 { "(bad)", { XX } },
2337 },
2338
2339 /* PREGRP85 */
2340 {
2341 { "(bad)", { XX } },
2342 { "(bad)", { XX } },
09a2c6cf 2343 { "mpsadbw", { XM, EXx, Ib } },
42903f7f
L		 2344 { "(bad)", { XX } },
2345 },
381d071f
L		 2346
2347 /* PREGRP86 */
2348 {
2349 { "(bad)", { XX } },
2350 { "(bad)", { XX } },
09a2c6cf 2351 { "pcmpgtq", { XM, EXx } },
381d071f
L		 2352 { "(bad)", { XX } },
2353 },
2354
2355 /* PREGRP87 */
2356 {
2357 { "(bad)", { XX } },
2358 { "(bad)", { XX } },
2359 { "(bad)", { XX } },
2360 { "crc32", { Gdq, { CRC32_Fixup, b_mode } } },
2361 },
2362
2363 /* PREGRP88 */
2364 {
2365 { "(bad)", { XX } },
2366 { "(bad)", { XX } },
2367 { "(bad)", { XX } },
2368 { "crc32", { Gdq, { CRC32_Fixup, v_mode } } },
2369 },
2370
2371 /* PREGRP89 */
2372 {
2373 { "(bad)", { XX } },
2374 { "(bad)", { XX } },
09a2c6cf 2375 { "pcmpestrm", { XM, EXx, Ib } },
381d071f
L		 2376 { "(bad)", { XX } },
2377 },
2378
2379 /* PREGRP90 */
2380 {
2381 { "(bad)", { XX } },
2382 { "(bad)", { XX } },
09a2c6cf 2383 { "pcmpestri", { XM, EXx, Ib } },
381d071f
L		 2384 { "(bad)", { XX } },
2385 },
2386
2387 /* PREGRP91 */
2388 {
2389 { "(bad)", { XX } },
2390 { "(bad)", { XX } },
09a2c6cf 2391 { "pcmpistrm", { XM, EXx, Ib } },
381d071f
L		 2392 { "(bad)", { XX } },
2393 },
2394
2395 /* PREGRP92 */
2396 {
2397 { "(bad)", { XX } },
2398 { "(bad)", { XX } },
09a2c6cf
L		 2399 { "pcmpistri", { XM, EXx, Ib } },
2400 { "(bad)", { XX } },
2401 },
2402
2403 /* PREGRP93 */
2404 {
2405 { "ucomiss",{ XM, EXd } },
2406 { "(bad)", { XX } },
2407 { "ucomisd",{ XM, EXq } },
2408 { "(bad)", { XX } },
2409 },
2410
2411 /* PREGRP94 */
2412 {
2413 { "comiss", { XM, EXd } },
2414 { "(bad)", { XX } },
2415 { "comisd", { XM, EXq } },
2416 { "(bad)", { XX } },
2417 },
2418
2419 /* PREGRP95 */
2420 {
2421 { "punpcklbw",{ MX, EMd } },
2422 { "(bad)", { XX } },
14051056 2423 { "punpcklbw",{ MX, EMx } },
09a2c6cf
L		 2424 { "(bad)", { XX } },
2425 },
2426
2427 /* PREGRP96 */
2428 {
2429 { "punpcklwd",{ MX, EMd } },
2430 { "(bad)", { XX } },
14051056 2431 { "punpcklwd",{ MX, EMx } },
09a2c6cf
L		 2432 { "(bad)", { XX } },
2433 },
2434
2435 /* PREGRP97 */
2436 {
2437 { "punpckldq",{ MX, EMd } },
2438 { "(bad)", { XX } },
14051056 2439 { "punpckldq",{ MX, EMx } },
381d071f
L		 2440 { "(bad)", { XX } },
2441 },
b844680a
L		 2442
2443 /* PREGRP98 */
2444 {
2445 { "vmptrld",{ Mq } },
2446 { "vmxon", { Mq } },
2447 { "vmclear",{ Mq } },
2448 { "(bad)", { XX } },
2449 },
2450
2451 /* PREGRP99 */
2452 {
2453 { "(bad)", { XX } },
2454 { "(bad)", { XX } },
2455 { "psrldq", { MS, Ib } },
2456 { "(bad)", { XX } },
2457 },
2458
c25c34f8 2459 /* PREGRP100 */
b844680a
L		 2460 {
2461 { "(bad)", { XX } },
2462 { "(bad)", { XX } },
2463 { "pslldq", { MS, Ib } },
2464 { "(bad)", { XX } },
2465 },
c608c12e
AM		 2466};
2467
6439fc28
AM		 2468static const struct dis386 x86_64_table[][2] = {
2469 {
ce518a5f
L		 2470 { "pusha{P|}", { XX } },
2471 { "(bad)", { XX } },
5f754f58
L		 2472 },
2473 {
ce518a5f
L		 2474 { "popa{P|}", { XX } },
2475 { "(bad)", { XX } },
5f754f58
L		 2476 },
2477 {
d8faab4e 2478 { OPC_EXT_33 },
ce518a5f 2479 { "(bad)", { XX } },
5f754f58
L		 2480 },
2481 {
ce518a5f
L		 2482 { "arpl", { Ew, Gw } },
2483 { "movs{||lq|xd}", { Gv, Ed } },
6439fc28
AM		 2484 },
2485};
2486
96fbad73 2487static const struct dis386 three_byte_table[][256] = {
331d2d0d
L		 2488 /* THREE_BYTE_0 */
2489 {
96fbad73 2490 /* 00 */
ce518a5f
L		 2491 { "pshufb", { MX, EM } },
2492 { "phaddw", { MX, EM } },
2493 { "phaddd", { MX, EM } },
2494 { "phaddsw", { MX, EM } },
2495 { "pmaddubsw", { MX, EM } },
2496 { "phsubw", { MX, EM } },
2497 { "phsubd", { MX, EM } },
2498 { "phsubsw", { MX, EM } },
96fbad73 2499 /* 08 */
ce518a5f
L		 2500 { "psignb", { MX, EM } },
2501 { "psignw", { MX, EM } },
2502 { "psignd", { MX, EM } },
2503 { "pmulhrsw", { MX, EM } },
2504 { "(bad)", { XX } },
2505 { "(bad)", { XX } },
2506 { "(bad)", { XX } },
2507 { "(bad)", { XX } },
96fbad73 2508 /* 10 */
42903f7f 2509 { PREGRP39 },
ce518a5f
L		 2510 { "(bad)", { XX } },
2511 { "(bad)", { XX } },
2512 { "(bad)", { XX } },
42903f7f
L		 2513 { PREGRP40 },
2514 { PREGRP41 },
ce518a5f 2515 { "(bad)", { XX } },
42903f7f 2516 { PREGRP42 },
96fbad73 2517 /* 18 */
ce518a5f
L		 2518 { "(bad)", { XX } },
2519 { "(bad)", { XX } },
2520 { "(bad)", { XX } },
2521 { "(bad)", { XX } },
2522 { "pabsb", { MX, EM } },
2523 { "pabsw", { MX, EM } },
2524 { "pabsd", { MX, EM } },
2525 { "(bad)", { XX } },
96fbad73 2526 /* 20 */
42903f7f
L		 2527 { PREGRP43 },
2528 { PREGRP44 },
2529 { PREGRP45 },
2530 { PREGRP46 },
2531 { PREGRP47 },
2532 { PREGRP48 },
ce518a5f
L		 2533 { "(bad)", { XX } },
2534 { "(bad)", { XX } },
96fbad73 2535 /* 28 */
42903f7f
L		 2536 { PREGRP49 },
2537 { PREGRP50 },
2538 { PREGRP51 },
2539 { PREGRP52 },
ce518a5f
L		 2540 { "(bad)", { XX } },
2541 { "(bad)", { XX } },
2542 { "(bad)", { XX } },
2543 { "(bad)", { XX } },
96fbad73 2544 /* 30 */
42903f7f
L		 2545 { PREGRP53 },
2546 { PREGRP54 },
2547 { PREGRP55 },
2548 { PREGRP56 },
2549 { PREGRP57 },
2550 { PREGRP58 },
ce518a5f 2551 { "(bad)", { XX } },
381d071f 2552 { PREGRP86 },
96fbad73 2553 /* 38 */
42903f7f
L		 2554 { PREGRP59 },
2555 { PREGRP60 },
2556 { PREGRP61 },
2557 { PREGRP62 },
2558 { PREGRP63 },
2559 { PREGRP64 },
2560 { PREGRP65 },
2561 { PREGRP66 },
96fbad73 2562 /* 40 */
42903f7f
L		 2563 { PREGRP67 },
2564 { PREGRP68 },
ce518a5f
L		 2565 { "(bad)", { XX } },
2566 { "(bad)", { XX } },
2567 { "(bad)", { XX } },
2568 { "(bad)", { XX } },
2569 { "(bad)", { XX } },
2570 { "(bad)", { XX } },
96fbad73 2571 /* 48 */
ce518a5f
L		 2572 { "(bad)", { XX } },
2573 { "(bad)", { XX } },
2574 { "(bad)", { XX } },
2575 { "(bad)", { XX } },
2576 { "(bad)", { XX } },
2577 { "(bad)", { XX } },
2578 { "(bad)", { XX } },
2579 { "(bad)", { XX } },
96fbad73 2580 /* 50 */
ce518a5f
L		 2581 { "(bad)", { XX } },
2582 { "(bad)", { XX } },
2583 { "(bad)", { XX } },
2584 { "(bad)", { XX } },
2585 { "(bad)", { XX } },
2586 { "(bad)", { XX } },
2587 { "(bad)", { XX } },
2588 { "(bad)", { XX } },
96fbad73 2589 /* 58 */
ce518a5f
L		 2590 { "(bad)", { XX } },
2591 { "(bad)", { XX } },
2592 { "(bad)", { XX } },
2593 { "(bad)", { XX } },
2594 { "(bad)", { XX } },
2595 { "(bad)", { XX } },
2596 { "(bad)", { XX } },
2597 { "(bad)", { XX } },
96fbad73 2598 /* 60 */
ce518a5f
L		 2599 { "(bad)", { XX } },
2600 { "(bad)", { XX } },
2601 { "(bad)", { XX } },
2602 { "(bad)", { XX } },
2603 { "(bad)", { XX } },
2604 { "(bad)", { XX } },
2605 { "(bad)", { XX } },
2606 { "(bad)", { XX } },
96fbad73 2607 /* 68 */
ce518a5f
L		 2608 { "(bad)", { XX } },
2609 { "(bad)", { XX } },
2610 { "(bad)", { XX } },
2611 { "(bad)", { XX } },
2612 { "(bad)", { XX } },
2613 { "(bad)", { XX } },
2614 { "(bad)", { XX } },
2615 { "(bad)", { XX } },
96fbad73 2616 /* 70 */
ce518a5f
L		 2617 { "(bad)", { XX } },
2618 { "(bad)", { XX } },
2619 { "(bad)", { XX } },
2620 { "(bad)", { XX } },
2621 { "(bad)", { XX } },
2622 { "(bad)", { XX } },
2623 { "(bad)", { XX } },
2624 { "(bad)", { XX } },
96fbad73 2625 /* 78 */
ce518a5f
L		 2626 { "(bad)", { XX } },
2627 { "(bad)", { XX } },
2628 { "(bad)", { XX } },
2629 { "(bad)", { XX } },
2630 { "(bad)", { XX } },
2631 { "(bad)", { XX } },
2632 { "(bad)", { XX } },
2633 { "(bad)", { XX } },
96fbad73 2634 /* 80 */
ce518a5f
L		 2635 { "(bad)", { XX } },
2636 { "(bad)", { XX } },
2637 { "(bad)", { XX } },
2638 { "(bad)", { XX } },
2639 { "(bad)", { XX } },
2640 { "(bad)", { XX } },
2641 { "(bad)", { XX } },
2642 { "(bad)", { XX } },
96fbad73 2643 /* 88 */
ce518a5f
L		 2644 { "(bad)", { XX } },
2645 { "(bad)", { XX } },
2646 { "(bad)", { XX } },
2647 { "(bad)", { XX } },
2648 { "(bad)", { XX } },
2649 { "(bad)", { XX } },
2650 { "(bad)", { XX } },
2651 { "(bad)", { XX } },
96fbad73 2652 /* 90 */
ce518a5f
L		 2653 { "(bad)", { XX } },
2654 { "(bad)", { XX } },
2655 { "(bad)", { XX } },
2656 { "(bad)", { XX } },
2657 { "(bad)", { XX } },
2658 { "(bad)", { XX } },
2659 { "(bad)", { XX } },
2660 { "(bad)", { XX } },
96fbad73 2661 /* 98 */
ce518a5f
L		 2662 { "(bad)", { XX } },
2663 { "(bad)", { XX } },
2664 { "(bad)", { XX } },
2665 { "(bad)", { XX } },
2666 { "(bad)", { XX } },
2667 { "(bad)", { XX } },
2668 { "(bad)", { XX } },
2669 { "(bad)", { XX } },
96fbad73 2670 /* a0 */
ce518a5f
L		 2671 { "(bad)", { XX } },
2672 { "(bad)", { XX } },
2673 { "(bad)", { XX } },
2674 { "(bad)", { XX } },
2675 { "(bad)", { XX } },
2676 { "(bad)", { XX } },
2677 { "(bad)", { XX } },
2678 { "(bad)", { XX } },
96fbad73 2679 /* a8 */
ce518a5f
L		 2680 { "(bad)", { XX } },
2681 { "(bad)", { XX } },
2682 { "(bad)", { XX } },
2683 { "(bad)", { XX } },
2684 { "(bad)", { XX } },
2685 { "(bad)", { XX } },
2686 { "(bad)", { XX } },
2687 { "(bad)", { XX } },
96fbad73 2688 /* b0 */
ce518a5f
L		 2689 { "(bad)", { XX } },
2690 { "(bad)", { XX } },
2691 { "(bad)", { XX } },
2692 { "(bad)", { XX } },
2693 { "(bad)", { XX } },
2694 { "(bad)", { XX } },
2695 { "(bad)", { XX } },
2696 { "(bad)", { XX } },
96fbad73 2697 /* b8 */
ce518a5f
L		 2698 { "(bad)", { XX } },
2699 { "(bad)", { XX } },
2700 { "(bad)", { XX } },
2701 { "(bad)", { XX } },
2702 { "(bad)", { XX } },
2703 { "(bad)", { XX } },
2704 { "(bad)", { XX } },
2705 { "(bad)", { XX } },
96fbad73 2706 /* c0 */
ce518a5f
L		 2707 { "(bad)", { XX } },
2708 { "(bad)", { XX } },
2709 { "(bad)", { XX } },
2710 { "(bad)", { XX } },
2711 { "(bad)", { XX } },
2712 { "(bad)", { XX } },
2713 { "(bad)", { XX } },
2714 { "(bad)", { XX } },
96fbad73 2715 /* c8 */
ce518a5f
L		 2716 { "(bad)", { XX } },
2717 { "(bad)", { XX } },
2718 { "(bad)", { XX } },
2719 { "(bad)", { XX } },
2720 { "(bad)", { XX } },
2721 { "(bad)", { XX } },
2722 { "(bad)", { XX } },
2723 { "(bad)", { XX } },
96fbad73 2724 /* d0 */
ce518a5f
L		 2725 { "(bad)", { XX } },
2726 { "(bad)", { XX } },
2727 { "(bad)", { XX } },
2728 { "(bad)", { XX } },
2729 { "(bad)", { XX } },
2730 { "(bad)", { XX } },
2731 { "(bad)", { XX } },
2732 { "(bad)", { XX } },
96fbad73 2733 /* d8 */
ce518a5f
L		 2734 { "(bad)", { XX } },
2735 { "(bad)", { XX } },
2736 { "(bad)", { XX } },
2737 { "(bad)", { XX } },
2738 { "(bad)", { XX } },
2739 { "(bad)", { XX } },
2740 { "(bad)", { XX } },
2741 { "(bad)", { XX } },
96fbad73 2742 /* e0 */
ce518a5f
L		 2743 { "(bad)", { XX } },
2744 { "(bad)", { XX } },
2745 { "(bad)", { XX } },
2746 { "(bad)", { XX } },
2747 { "(bad)", { XX } },
2748 { "(bad)", { XX } },
2749 { "(bad)", { XX } },
2750 { "(bad)", { XX } },
96fbad73 2751 /* e8 */
ce518a5f
L		 2752 { "(bad)", { XX } },
2753 { "(bad)", { XX } },
2754 { "(bad)", { XX } },
2755 { "(bad)", { XX } },
2756 { "(bad)", { XX } },
2757 { "(bad)", { XX } },
2758 { "(bad)", { XX } },
2759 { "(bad)", { XX } },
96fbad73 2760 /* f0 */
381d071f
L		 2761 { PREGRP87 },
2762 { PREGRP88 },
ce518a5f
L		 2763 { "(bad)", { XX } },
2764 { "(bad)", { XX } },
2765 { "(bad)", { XX } },
2766 { "(bad)", { XX } },
2767 { "(bad)", { XX } },
2768 { "(bad)", { XX } },
96fbad73 2769 /* f8 */
ce518a5f
L		 2770 { "(bad)", { XX } },
2771 { "(bad)", { XX } },
2772 { "(bad)", { XX } },
2773 { "(bad)", { XX } },
2774 { "(bad)", { XX } },
2775 { "(bad)", { XX } },
2776 { "(bad)", { XX } },
2777 { "(bad)", { XX } },
331d2d0d
L		 2778 },
2779 /* THREE_BYTE_1 */
2780 {
96fbad73 2781 /* 00 */
ce518a5f
L		 2782 { "(bad)", { XX } },
2783 { "(bad)", { XX } },
2784 { "(bad)", { XX } },
2785 { "(bad)", { XX } },
2786 { "(bad)", { XX } },
2787 { "(bad)", { XX } },
2788 { "(bad)", { XX } },
2789 { "(bad)", { XX } },
96fbad73 2790 /* 08 */
42903f7f
L		 2791 { PREGRP69 },
2792 { PREGRP70 },
2793 { PREGRP71 },
2794 { PREGRP72 },
2795 { PREGRP73 },
2796 { PREGRP74 },
2797 { PREGRP75 },
ce518a5f 2798 { "palignr", { MX, EM, Ib } },
96fbad73 2799 /* 10 */
ce518a5f
L		 2800 { "(bad)", { XX } },
2801 { "(bad)", { XX } },
2802 { "(bad)", { XX } },
2803 { "(bad)", { XX } },
42903f7f
L		 2804 { PREGRP76 },
2805 { PREGRP77 },
2806 { PREGRP78 },
2807 { PREGRP79 },
96fbad73 2808 /* 18 */
ce518a5f
L		 2809 { "(bad)", { XX } },
2810 { "(bad)", { XX } },
2811 { "(bad)", { XX } },
2812 { "(bad)", { XX } },
2813 { "(bad)", { XX } },
2814 { "(bad)", { XX } },
2815 { "(bad)", { XX } },
2816 { "(bad)", { XX } },
96fbad73 2817 /* 20 */
42903f7f
L		 2818 { PREGRP80 },
2819 { PREGRP81 },
2820 { PREGRP82 },
ce518a5f
L		 2821 { "(bad)", { XX } },
2822 { "(bad)", { XX } },
2823 { "(bad)", { XX } },
2824 { "(bad)", { XX } },
2825 { "(bad)", { XX } },
96fbad73 2826 /* 28 */
ce518a5f
L		 2827 { "(bad)", { XX } },
2828 { "(bad)", { XX } },
2829 { "(bad)", { XX } },
2830 { "(bad)", { XX } },
2831 { "(bad)", { XX } },
2832 { "(bad)", { XX } },
2833 { "(bad)", { XX } },
2834 { "(bad)", { XX } },
96fbad73 2835 /* 30 */
ce518a5f
L		 2836 { "(bad)", { XX } },
2837 { "(bad)", { XX } },
2838 { "(bad)", { XX } },
2839 { "(bad)", { XX } },
2840 { "(bad)", { XX } },
2841 { "(bad)", { XX } },
2842 { "(bad)", { XX } },
2843 { "(bad)", { XX } },
96fbad73 2844 /* 38 */
ce518a5f
L		 2845 { "(bad)", { XX } },
2846 { "(bad)", { XX } },
2847 { "(bad)", { XX } },
2848 { "(bad)", { XX } },
2849 { "(bad)", { XX } },
2850 { "(bad)", { XX } },
2851 { "(bad)", { XX } },
2852 { "(bad)", { XX } },
96fbad73 2853 /* 40 */
42903f7f
L		 2854 { PREGRP83 },
2855 { PREGRP84 },
2856 { PREGRP85 },
ce518a5f
L		 2857 { "(bad)", { XX } },
2858 { "(bad)", { XX } },
2859 { "(bad)", { XX } },
2860 { "(bad)", { XX } },
2861 { "(bad)", { XX } },
96fbad73 2862 /* 48 */
ce518a5f
L		 2863 { "(bad)", { XX } },
2864 { "(bad)", { XX } },
2865 { "(bad)", { XX } },
2866 { "(bad)", { XX } },
2867 { "(bad)", { XX } },
2868 { "(bad)", { XX } },
2869 { "(bad)", { XX } },
2870 { "(bad)", { XX } },
96fbad73 2871 /* 50 */
ce518a5f
L		 2872 { "(bad)", { XX } },
2873 { "(bad)", { XX } },
2874 { "(bad)", { XX } },
2875 { "(bad)", { XX } },
2876 { "(bad)", { XX } },
2877 { "(bad)", { XX } },
2878 { "(bad)", { XX } },
2879 { "(bad)", { XX } },
96fbad73 2880 /* 58 */
ce518a5f
L		 2881 { "(bad)", { XX } },
2882 { "(bad)", { XX } },
2883 { "(bad)", { XX } },
2884 { "(bad)", { XX } },
2885 { "(bad)", { XX } },
2886 { "(bad)", { XX } },
2887 { "(bad)", { XX } },
2888 { "(bad)", { XX } },
96fbad73 2889 /* 60 */
381d071f
L		 2890 { PREGRP89 },
2891 { PREGRP90 },
2892 { PREGRP91 },
2893 { PREGRP92 },
ce518a5f
L		 2894 { "(bad)", { XX } },
2895 { "(bad)", { XX } },
2896 { "(bad)", { XX } },
2897 { "(bad)", { XX } },
96fbad73 2898 /* 68 */
ce518a5f
L		 2899 { "(bad)", { XX } },
2900 { "(bad)", { XX } },
2901 { "(bad)", { XX } },
2902 { "(bad)", { XX } },
2903 { "(bad)", { XX } },
2904 { "(bad)", { XX } },
2905 { "(bad)", { XX } },
2906 { "(bad)", { XX } },
96fbad73 2907 /* 70 */
ce518a5f
L		 2908 { "(bad)", { XX } },
2909 { "(bad)", { XX } },
2910 { "(bad)", { XX } },
2911 { "(bad)", { XX } },
2912 { "(bad)", { XX } },
2913 { "(bad)", { XX } },
2914 { "(bad)", { XX } },
2915 { "(bad)", { XX } },
96fbad73 2916 /* 78 */
ce518a5f
L		 2917 { "(bad)", { XX } },
2918 { "(bad)", { XX } },
2919 { "(bad)", { XX } },
2920 { "(bad)", { XX } },
2921 { "(bad)", { XX } },
2922 { "(bad)", { XX } },
2923 { "(bad)", { XX } },
2924 { "(bad)", { XX } },
96fbad73 2925 /* 80 */
ce518a5f
L		 2926 { "(bad)", { XX } },
2927 { "(bad)", { XX } },
2928 { "(bad)", { XX } },
2929 { "(bad)", { XX } },
2930 { "(bad)", { XX } },
2931 { "(bad)", { XX } },
2932 { "(bad)", { XX } },
2933 { "(bad)", { XX } },
96fbad73 2934 /* 88 */
ce518a5f
L		 2935 { "(bad)", { XX } },
2936 { "(bad)", { XX } },
2937 { "(bad)", { XX } },
2938 { "(bad)", { XX } },
2939 { "(bad)", { XX } },
2940 { "(bad)", { XX } },
2941 { "(bad)", { XX } },
2942 { "(bad)", { XX } },
96fbad73 2943 /* 90 */
ce518a5f
L		 2944 { "(bad)", { XX } },
2945 { "(bad)", { XX } },
2946 { "(bad)", { XX } },
2947 { "(bad)", { XX } },
2948 { "(bad)", { XX } },
2949 { "(bad)", { XX } },
2950 { "(bad)", { XX } },
2951 { "(bad)", { XX } },
96fbad73 2952 /* 98 */
ce518a5f
L		 2953 { "(bad)", { XX } },
2954 { "(bad)", { XX } },
2955 { "(bad)", { XX } },
2956 { "(bad)", { XX } },
2957 { "(bad)", { XX } },
2958 { "(bad)", { XX } },
2959 { "(bad)", { XX } },
2960 { "(bad)", { XX } },
96fbad73 2961 /* a0 */
ce518a5f
L		 2962 { "(bad)", { XX } },
2963 { "(bad)", { XX } },
2964 { "(bad)", { XX } },
2965 { "(bad)", { XX } },
2966 { "(bad)", { XX } },
2967 { "(bad)", { XX } },
2968 { "(bad)", { XX } },
2969 { "(bad)", { XX } },
96fbad73 2970 /* a8 */
ce518a5f
L		 2971 { "(bad)", { XX } },
2972 { "(bad)", { XX } },
2973 { "(bad)", { XX } },
2974 { "(bad)", { XX } },
2975 { "(bad)", { XX } },
2976 { "(bad)", { XX } },
2977 { "(bad)", { XX } },
2978 { "(bad)", { XX } },
96fbad73 2979 /* b0 */
ce518a5f
L		 2980 { "(bad)", { XX } },
2981 { "(bad)", { XX } },
2982 { "(bad)", { XX } },
2983 { "(bad)", { XX } },
2984 { "(bad)", { XX } },
2985 { "(bad)", { XX } },
2986 { "(bad)", { XX } },
2987 { "(bad)", { XX } },
96fbad73 2988 /* b8 */
ce518a5f
L		 2989 { "(bad)", { XX } },
2990 { "(bad)", { XX } },
2991 { "(bad)", { XX } },
2992 { "(bad)", { XX } },
2993 { "(bad)", { XX } },
2994 { "(bad)", { XX } },
2995 { "(bad)", { XX } },
2996 { "(bad)", { XX } },
96fbad73 2997 /* c0 */
ce518a5f
L		 2998 { "(bad)", { XX } },
2999 { "(bad)", { XX } },
3000 { "(bad)", { XX } },
3001 { "(bad)", { XX } },
3002 { "(bad)", { XX } },
3003 { "(bad)", { XX } },
3004 { "(bad)", { XX } },
3005 { "(bad)", { XX } },
96fbad73 3006 /* c8 */
ce518a5f
L		 3007 { "(bad)", { XX } },
3008 { "(bad)", { XX } },
3009 { "(bad)", { XX } },
3010 { "(bad)", { XX } },
3011 { "(bad)", { XX } },
3012 { "(bad)", { XX } },
3013 { "(bad)", { XX } },
3014 { "(bad)", { XX } },
96fbad73 3015 /* d0 */
ce518a5f
L		 3016 { "(bad)", { XX } },
3017 { "(bad)", { XX } },
3018 { "(bad)", { XX } },
3019 { "(bad)", { XX } },
3020 { "(bad)", { XX } },
3021 { "(bad)", { XX } },
3022 { "(bad)", { XX } },
3023 { "(bad)", { XX } },
96fbad73 3024 /* d8 */
ce518a5f
L		 3025 { "(bad)", { XX } },
3026 { "(bad)", { XX } },
3027 { "(bad)", { XX } },
3028 { "(bad)", { XX } },
3029 { "(bad)", { XX } },
3030 { "(bad)", { XX } },
3031 { "(bad)", { XX } },
3032 { "(bad)", { XX } },
96fbad73 3033 /* e0 */
ce518a5f
L		 3034 { "(bad)", { XX } },
3035 { "(bad)", { XX } },
3036 { "(bad)", { XX } },
3037 { "(bad)", { XX } },
3038 { "(bad)", { XX } },
3039 { "(bad)", { XX } },
3040 { "(bad)", { XX } },
3041 { "(bad)", { XX } },
96fbad73 3042 /* e8 */
ce518a5f
L		 3043 { "(bad)", { XX } },
3044 { "(bad)", { XX } },
3045 { "(bad)", { XX } },
3046 { "(bad)", { XX } },
3047 { "(bad)", { XX } },
3048 { "(bad)", { XX } },
3049 { "(bad)", { XX } },
3050 { "(bad)", { XX } },
96fbad73 3051 /* f0 */
ce518a5f
L		 3052 { "(bad)", { XX } },
3053 { "(bad)", { XX } },
3054 { "(bad)", { XX } },
3055 { "(bad)", { XX } },
3056 { "(bad)", { XX } },
3057 { "(bad)", { XX } },
3058 { "(bad)", { XX } },
3059 { "(bad)", { XX } },
96fbad73 3060 /* f8 */
ce518a5f
L		 3061 { "(bad)", { XX } },
3062 { "(bad)", { XX } },
3063 { "(bad)", { XX } },
3064 { "(bad)", { XX } },
3065 { "(bad)", { XX } },
3066 { "(bad)", { XX } },
3067 { "(bad)", { XX } },
3068 { "(bad)", { XX } },
3069 }
331d2d0d
L		 3070};
3071
b844680a
L		 3072static const struct dis386 opc_ext_table[][2] = {
3073 {
3074 /* OPC_EXT_0 */
d8faab4e
L		 3075 { "leaS", { Gv, M } },
3076 { "(bad)", { XX } },
3077 },
3078 {
3079 /* OPC_EXT_1 */
3080 { "les{S|}", { Gv, Mp } },
3081 { "(bad)", { XX } },
3082 },
3083 {
3084 /* OPC_EXT_2 */
3085 { "ldsS", { Gv, Mp } },
3086 { "(bad)", { XX } },
3087 },
3088 {
3089 /* OPC_EXT_3 */
3090 { "lssS", { Gv, Mp } },
3091 { "(bad)", { XX } },
3092 },
3093 {
3094 /* OPC_EXT_4 */
3095 { "lfsS", { Gv, Mp } },
3096 { "(bad)", { XX } },
3097 },
3098 {
3099 /* OPC_EXT_5 */
3100 { "lgsS", { Gv, Mp } },
3101 { "(bad)", { XX } },
3102 },
3103 {
3104 /* OPC_EXT_6 */
b844680a
L		 3105 { "sgdt{Q|IQ||}", { M } },
3106 { OPC_EXT_RM_0 },
3107 },
3108 {
d8faab4e 3109 /* OPC_EXT_7 */
b844680a
L		 3110 { "sidt{Q|IQ||}", { M } },
3111 { OPC_EXT_RM_1 },
3112 },
3113 {
d8faab4e
L		 3114 /* OPC_EXT_8 */
3115 { "lgdt{Q|Q||}", { M } },
3116 { "(bad)", { XX } },
3117 },
3118 {
3119 /* OPC_EXT_9 */
b844680a
L		 3120 { PREGRP98 },
3121 { "(bad)", { XX } },
3122 },
3123 {
d8faab4e 3124 /* OPC_EXT_10 */
b844680a
L		 3125 { "vmptrst", { Mq } },
3126 { "(bad)", { XX } },
3127 },
3128 {
d8faab4e 3129 /* OPC_EXT_11 */
b844680a
L		 3130 { "(bad)", { XX } },
3131 { "psrlw", { MS, Ib } },
3132 },
3133 {
d8faab4e 3134 /* OPC_EXT_12 */
b844680a
L		 3135 { "(bad)", { XX } },
3136 { "psraw", { MS, Ib } },
3137 },
3138 {
d8faab4e 3139 /* OPC_EXT_13 */
b844680a
L		 3140 { "(bad)", { XX } },
3141 { "psllw", { MS, Ib } },
3142 },
3143 {
d8faab4e 3144 /* OPC_EXT_14 */
b844680a
L		 3145 { "(bad)", { XX } },
3146 { "psrld", { MS, Ib } },
3147 },
3148 {
d8faab4e 3149 /* OPC_EXT_15 */
b844680a
L		 3150 { "(bad)", { XX } },
3151 { "psrad", { MS, Ib } },
3152 },
3153 {
d8faab4e 3154 /* OPC_EXT_16 */
b844680a
L		 3155 { "(bad)", { XX } },
3156 { "pslld", { MS, Ib } },
3157 },
3158 {
d8faab4e 3159 /* OPC_EXT_17 */
b844680a
L		 3160 { "(bad)", { XX } },
3161 { "psrlq", { MS, Ib } },
3162 },
3163 {
d8faab4e 3164 /* OPC_EXT_18 */
b844680a
L		 3165 { "(bad)", { XX } },
3166 { PREGRP99 },
3167 },
3168 {
d8faab4e 3169 /* OPC_EXT_19 */
b844680a
L		 3170 { "(bad)", { XX } },
3171 { "psllq", { MS, Ib } },
3172 },
3173 {
d8faab4e 3174 /* OPC_EXT_20 */
b844680a
L		 3175 { "(bad)", { XX } },
3176 { PREGRP100 },
3177 },
3178 {
d8faab4e 3179 /* OPC_EXT_21 */
b844680a
L		 3180 { "fxsave", { M } },
3181 { "(bad)", { XX } },
3182 },
3183 {
d8faab4e 3184 /* OPC_EXT_22 */
b844680a
L		 3185 { "fxrstor", { M } },
3186 { "(bad)", { XX } },
3187 },
3188 {
d8faab4e 3189 /* OPC_EXT_23 */
b844680a
L		 3190 { "ldmxcsr", { Md } },
3191 { "(bad)", { XX } },
3192 },
3193 {
d8faab4e 3194 /* OPC_EXT_24 */
b844680a
L		 3195 { "stmxcsr", { Md } },
3196 { "(bad)", { XX } },
3197 },
3198 {
d8faab4e 3199 /* OPC_EXT_25 */
b844680a
L		 3200 { "(bad)", { XX } },
3201 { OPC_EXT_RM_2 },
3202 },
3203 {
d8faab4e 3204 /* OPC_EXT_26 */
b844680a
L		 3205 { "(bad)", { XX } },
3206 { OPC_EXT_RM_3 },
3207 },
3208 {
d8faab4e 3209 /* OPC_EXT_27 */
b844680a
L		 3210 { "clflush", { Mb } },
3211 { OPC_EXT_RM_4 },
3212 },
3213 {
d8faab4e 3214 /* OPC_EXT_28 */
b844680a
L		 3215 { "prefetchnta", { Mb } },
3216 { "(bad)", { XX } },
3217 },
3218 {
d8faab4e 3219 /* OPC_EXT_29 */
b844680a
L		 3220 { "prefetcht0", { Mb } },
3221 { "(bad)", { XX } },
3222 },
3223 {
d8faab4e 3224 /* OPC_EXT_30 */
b844680a
L		 3225 { "prefetcht1", { Mb } },
3226 { "(bad)", { XX } },
3227 },
3228 {
d8faab4e 3229 /* OPC_EXT_31 */
b844680a
L		 3230 { "prefetcht2", { Mb } },
3231 { "(bad)", { XX } },
3232 },
d8faab4e
L		 3233 {
3234 /* OPC_EXT_32 */
3235 { "lddqu", { XM, M } },
3236 { "(bad)", { XX } },
3237 },
3238 {
3239 /* OPC_EXT_33 */
3240 { "bound{S|}", { Gv, Ma } },
3241 { "(bad)", { XX } },
3242 },
876d4bfa
L		 3243 {
3244 /* OPC_EXT_34 */
3245 { "movlpX", { EXq, XM } },
3246 { "(bad)", { XX } },
3247 },
3248 {
3249 /* OPC_EXT_35 */
3250 { "movhpX", { EXq, XM } },
3251 { "(bad)", { XX } },
3252 },
3253 {
3254 /* OPC_EXT_36 */
3255 { "movlpX", { XM, EXq } },
3256 { "movhlpX", { XM, EXq } },
3257 },
3258 {
3259 /* OPC_EXT_37 */
3260 { "movhpX", { XM, EXq } },
3261 { "movlhpX", { XM, EXq } },
3262 },
bbedc832
L		 3263 {
3264 /* OPC_EXT_38 */
3265 { "invlpg", { Mb } },
3266 { OPC_EXT_RM_5 },
3267 },
144c41d9
L		 3268 {
3269 /* OPC_EXT_39 */
3270 { "lidt{Q|Q||}", { M } },
3271 { OPC_EXT_RM_6 },
3272 },
1afd85e3
L		 3273 {
3274 /* OPC_EXT_40 */
3275 { "(bad)", { XX } },
3276 { "movZ", { Rm, Cm } },
3277 },
3278 {
3279 /* OPC_EXT_41 */
3280 { "(bad)", { XX } },
3281 { "movZ", { Rm, Dm } },
3282 },
3283 {
3284 /* OPC_EXT_42 */
3285 { "(bad)", { XX } },
3286 { "movZ", { Cm, Rm } },
3287 },
3288 {
3289 /* OPC_EXT_43 */
3290 { "(bad)", { XX } },
3291 { "movZ", { Dm, Rm } },
3292 },
3293 {
3294 /* OPC_EXT_44 */
3295 { "(bad)", { XX } },
3296 { "movL", { Rd, Td } },
3297 },
3298 {
3299 /* OPC_EXT_45 */
3300 { "(bad)", { XX } },
3301 { "movL", { Td, Rd } },
3302 },
b844680a
L		 3303};
3304
3305static const struct dis386 opc_ext_rm_table[][8] = {
3306 {
3307 /* OPC_EXT_RM_0 */
3308 { "(bad)", { XX } },
3309 { "vmcall", { Skip_MODRM } },
3310 { "vmlaunch", { Skip_MODRM } },
3311 { "vmresume", { Skip_MODRM } },
3312 { "vmxoff", { Skip_MODRM } },
3313 { "(bad)", { XX } },
3314 { "(bad)", { XX } },
3315 { "(bad)", { XX } },
3316 },
3317 {
3318 /* OPC_EXT_RM_1 */
3319 { "monitor", { { OP_Monitor, 0 } } },
3320 { "mwait", { { OP_Mwait, 0 } } },
3321 { "(bad)", { XX } },
3322 { "(bad)", { XX } },
3323 { "(bad)", { XX } },
3324 { "(bad)", { XX } },
3325 { "(bad)", { XX } },
3326 { "(bad)", { XX } },
3327 },
3328 {
3329 /* OPC_EXT_RM_2 */
3330 { "lfence", { Skip_MODRM } },
3331 { "(bad)", { XX } },
3332 { "(bad)", { XX } },
3333 { "(bad)", { XX } },
3334 { "(bad)", { XX } },
3335 { "(bad)", { XX } },
3336 { "(bad)", { XX } },
3337 { "(bad)", { XX } },
3338 },
3339 {
3340 /* OPC_EXT_RM_3 */
3341 { "mfence", { Skip_MODRM } },
3342 { "(bad)", { XX } },
3343 { "(bad)", { XX } },
3344 { "(bad)", { XX } },
3345 { "(bad)", { XX } },
3346 { "(bad)", { XX } },
3347 { "(bad)", { XX } },
3348 { "(bad)", { XX } },
3349 },
3350 {
3351 /* OPC_EXT_RM_4 */
3352 { "sfence", { Skip_MODRM } },
3353 { "(bad)", { XX } },
3354 { "(bad)", { XX } },
3355 { "(bad)", { XX } },
3356 { "(bad)", { XX } },
3357 { "(bad)", { XX } },
3358 { "(bad)", { XX } },
3359 { "(bad)", { XX } },
3360 },
bbedc832
L		 3361 {
3362 /* OPC_EXT_RM_5 */
3363 { "swapgs", { Skip_MODRM } },
3364 { "rdtscp", { Skip_MODRM } },
3365 { "(bad)", { XX } },
3366 { "(bad)", { XX } },
3367 { "(bad)", { XX } },
3368 { "(bad)", { XX } },
3369 { "(bad)", { XX } },
3370 { "(bad)", { XX } },
3371 },
144c41d9
L		 3372 {
3373 /* OPC_EXT_RM_6 */
3374 { "vmrun", { Skip_MODRM } },
3375 { "vmmcall", { Skip_MODRM } },
3376 { "vmload", { Skip_MODRM } },
3377 { "vmsave", { Skip_MODRM } },
3378 { "stgi", { Skip_MODRM } },
3379 { "clgi", { Skip_MODRM } },
3380 { "skinit", { Skip_MODRM } },
3381 { "invlpga", { Skip_MODRM } },
3382 },
b844680a
L		 3383};
3384
c608c12e
AM		 3385#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3386
252b5132 3387static void
26ca5450 3388ckprefix (void)
252b5132 3389{
52b15da3
JH		 3390 int newrex;
3391 rex = 0;
252b5132 3392 prefixes = 0;
7d421014 3393 used_prefixes = 0;
52b15da3 3394 rex_used = 0;
252b5132
RH		 3395 while (1)
3396 {
3397 FETCH_DATA (the_info, codep + 1);
52b15da3 3398 newrex = 0;
252b5132
RH		 3399 switch (*codep)
3400 {
52b15da3
JH		 3401 /* REX prefixes family. */
3402 case 0x40:
3403 case 0x41:
3404 case 0x42:
3405 case 0x43:
3406 case 0x44:
3407 case 0x45:
3408 case 0x46:
3409 case 0x47:
3410 case 0x48:
3411 case 0x49:
3412 case 0x4a:
3413 case 0x4b:
3414 case 0x4c:
3415 case 0x4d:
3416 case 0x4e:
3417 case 0x4f:
cb712a9e 3418 if (address_mode == mode_64bit)
52b15da3
JH		 3419 newrex = *codep;
3420 else
3421 return;
3422 break;
252b5132
RH		 3423 case 0xf3:
3424 prefixes |= PREFIX_REPZ;
3425 break;
3426 case 0xf2:
3427 prefixes |= PREFIX_REPNZ;
3428 break;
3429 case 0xf0:
3430 prefixes |= PREFIX_LOCK;
3431 break;
3432 case 0x2e:
3433 prefixes |= PREFIX_CS;
3434 break;
3435 case 0x36:
3436 prefixes |= PREFIX_SS;
3437 break;
3438 case 0x3e:
3439 prefixes |= PREFIX_DS;
3440 break;
3441 case 0x26:
3442 prefixes |= PREFIX_ES;
3443 break;
3444 case 0x64:
3445 prefixes |= PREFIX_FS;
3446 break;
3447 case 0x65:
3448 prefixes |= PREFIX_GS;
3449 break;
3450 case 0x66:
3451 prefixes |= PREFIX_DATA;
3452 break;
3453 case 0x67:
3454 prefixes |= PREFIX_ADDR;
3455 break;
5076851f 3456 case FWAIT_OPCODE:
252b5132
RH		 3457 /* fwait is really an instruction. If there are prefixes
3458 before the fwait, they belong to the fwait, *not* to the
3459 following instruction. */
3e7d61b2 3460 if (prefixes || rex)
252b5132
RH		 3461 {
3462 prefixes |= PREFIX_FWAIT;
3463 codep++;
3464 return;
3465 }
3466 prefixes = PREFIX_FWAIT;
3467 break;
3468 default:
3469 return;
3470 }
52b15da3
JH		 3471 /* Rex is ignored when followed by another prefix. */
3472 if (rex)
3473 {
3e7d61b2
AM		 3474 rex_used = rex;
3475 return;
52b15da3
JH		 3476 }
3477 rex = newrex;
252b5132
RH		 3478 codep++;
3479 }
3480}
3481
7d421014
ILT		 3482/* Return the name of the prefix byte PREF, or NULL if PREF is not a
3483 prefix byte. */
3484
3485static const char *
26ca5450 3486prefix_name (int pref, int sizeflag)
7d421014 3487{
0003779b
L		 3488 static const char *rexes [16] =
3489 {
3490 "rex", /* 0x40 */
3491 "rex.B", /* 0x41 */
3492 "rex.X", /* 0x42 */
3493 "rex.XB", /* 0x43 */
3494 "rex.R", /* 0x44 */
3495 "rex.RB", /* 0x45 */
3496 "rex.RX", /* 0x46 */
3497 "rex.RXB", /* 0x47 */
3498 "rex.W", /* 0x48 */
3499 "rex.WB", /* 0x49 */
3500 "rex.WX", /* 0x4a */
3501 "rex.WXB", /* 0x4b */
3502 "rex.WR", /* 0x4c */
3503 "rex.WRB", /* 0x4d */
3504 "rex.WRX", /* 0x4e */
3505 "rex.WRXB", /* 0x4f */
3506 };
3507
7d421014
ILT		 3508 switch (pref)
3509 {
52b15da3
JH		 3510 /* REX prefixes family. */
3511 case 0x40:
52b15da3 3512 case 0x41:
52b15da3 3513 case 0x42:
52b15da3 3514 case 0x43:
52b15da3 3515 case 0x44:
52b15da3 3516 case 0x45:
52b15da3 3517 case 0x46:
52b15da3 3518 case 0x47:
52b15da3 3519 case 0x48:
52b15da3 3520 case 0x49:
52b15da3 3521 case 0x4a:
52b15da3 3522 case 0x4b:
52b15da3 3523 case 0x4c:
52b15da3 3524 case 0x4d:
52b15da3 3525 case 0x4e:
52b15da3 3526 case 0x4f:
0003779b 3527 return rexes [pref - 0x40];
7d421014
ILT		 3528 case 0xf3:
3529 return "repz";
3530 case 0xf2:
3531 return "repnz";
3532 case 0xf0:
3533 return "lock";
3534 case 0x2e:
3535 return "cs";
3536 case 0x36:
3537 return "ss";
3538 case 0x3e:
3539 return "ds";
3540 case 0x26:
3541 return "es";
3542 case 0x64:
3543 return "fs";
3544 case 0x65:
3545 return "gs";
3546 case 0x66:
3547 return (sizeflag & DFLAG) ? "data16" : "data32";
3548 case 0x67:
cb712a9e 3549 if (address_mode == mode_64bit)
db6eb5be 3550 return (sizeflag & AFLAG) ? "addr32" : "addr64";
c1a64871 3551 else
2888cb7a 3552 return (sizeflag & AFLAG) ? "addr16" : "addr32";
7d421014
ILT		 3553 case FWAIT_OPCODE:
3554 return "fwait";
3555 default:
3556 return NULL;
3557 }
3558}
3559
ce518a5f
L		 3560static char op_out[MAX_OPERANDS][100];
3561static int op_ad, op_index[MAX_OPERANDS];
1d9f512f 3562static int two_source_ops;
ce518a5f
L		 3563static bfd_vma op_address[MAX_OPERANDS];
3564static bfd_vma op_riprel[MAX_OPERANDS];
52b15da3 3565static bfd_vma start_pc;
ce518a5f 3566
252b5132
RH		 3567/*
3568 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3569 * (see topic "Redundant prefixes" in the "Differences from 8086"
3570 * section of the "Virtual 8086 Mode" chapter.)
3571 * 'pc' should be the address of this instruction, it will
3572 * be used to print the target address if this is a relative jump or call
3573 * The function returns the length of this instruction in bytes.
3574 */
3575
252b5132
RH		 3576static char intel_syntax;
3577static char open_char;
3578static char close_char;
3579static char separator_char;
3580static char scale_char;
3581
e396998b
AM		 3582/* Here for backwards compatibility. When gdb stops using
3583 print_insn_i386_att and print_insn_i386_intel these functions can
3584 disappear, and print_insn_i386 be merged into print_insn. */
252b5132 3585int
26ca5450 3586print_insn_i386_att (bfd_vma pc, disassemble_info *info)
252b5132
RH		 3587{
3588 intel_syntax = 0;
e396998b
AM		 3589
3590 return print_insn (pc, info);
252b5132
RH		 3591}
3592
3593int
26ca5450 3594print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
252b5132
RH		 3595{
3596 intel_syntax = 1;
e396998b
AM		 3597
3598 return print_insn (pc, info);
252b5132
RH		 3599}
3600
e396998b 3601int
26ca5450 3602print_insn_i386 (bfd_vma pc, disassemble_info *info)
e396998b
AM		 3603{
3604 intel_syntax = -1;
3605
3606 return print_insn (pc, info);
3607}
3608
f59a29b9
L		 3609void
3610print_i386_disassembler_options (FILE *stream)
3611{
3612 fprintf (stream, _("\n\
3613The following i386/x86-64 specific disassembler options are supported for use\n\
3614with the -M switch (multiple options should be separated by commas):\n"));
3615
3616 fprintf (stream, _(" x86-64 Disassemble in 64bit mode\n"));
3617 fprintf (stream, _(" i386 Disassemble in 32bit mode\n"));
3618 fprintf (stream, _(" i8086 Disassemble in 16bit mode\n"));
3619 fprintf (stream, _(" att Display instruction in AT&T syntax\n"));
3620 fprintf (stream, _(" intel Display instruction in Intel syntax\n"));
3621 fprintf (stream, _(" addr64 Assume 64bit address size\n"));
3622 fprintf (stream, _(" addr32 Assume 32bit address size\n"));
3623 fprintf (stream, _(" addr16 Assume 16bit address size\n"));
3624 fprintf (stream, _(" data32 Assume 32bit data size\n"));
3625 fprintf (stream, _(" data16 Assume 16bit data size\n"));
3626 fprintf (stream, _(" suffix Always display instruction suffix in AT&T syntax\n"));
3627}
3628
b844680a
L		 3629/* Get a pointer to struct dis386 with a valid name. */
3630
3631static const struct dis386 *
8bb15339 3632get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
b844680a
L		 3633{
3634 int index;
3635
3636 if (dp->name != NULL)
3637 return dp;
3638
3639 switch (dp->op[0].bytemode)
3640 {
3641 case USE_GROUPS:
3642 dp = &grps[dp->op[1].bytemode][modrm.reg];
3643 break;
3644
3645 case USE_PREFIX_USER_TABLE:
3646 index = 0;
3647 used_prefixes |= (prefixes & PREFIX_REPZ);
3648 if (prefixes & PREFIX_REPZ)
3649 {
3650 index = 1;
3651 repz_prefix = NULL;
3652 }
3653 else
3654 {
3655 /* We should check PREFIX_REPNZ and PREFIX_REPZ before
3656 PREFIX_DATA. */
3657 used_prefixes |= (prefixes & PREFIX_REPNZ);
3658 if (prefixes & PREFIX_REPNZ)
3659 {
3660 index = 3;
3661 repnz_prefix = NULL;
3662 }
3663 else
3664 {
3665 used_prefixes |= (prefixes & PREFIX_DATA);
3666 if (prefixes & PREFIX_DATA)
3667 {
3668 index = 2;
3669 data_prefix = NULL;
3670 }
3671 }
3672 }
3673 dp = &prefix_user_table[dp->op[1].bytemode][index];
3674 break;
3675
3676 case X86_64_SPECIAL:
3677 index = address_mode == mode_64bit ? 1 : 0;
3678 dp = &x86_64_table[dp->op[1].bytemode][index];
3679 break;
3680
8bb15339
L		 3681 case IS_3BYTE_OPCODE:
3682 FETCH_DATA (info, codep + 2);
3683 index = *codep++;
3684 dp = &three_byte_table[dp->op[1].bytemode][index];
3685 modrm.mod = (*codep >> 6) & 3;
3686 modrm.reg = (*codep >> 3) & 7;
3687 modrm.rm = *codep & 7;
3688 break;
3689
b844680a
L		 3690 case USE_OPC_EXT_TABLE:
3691 index = modrm.mod == 0x3 ? 1 : 0;
3692 dp = &opc_ext_table[dp->op[1].bytemode][index];
3693 break;
3694
3695 case USE_OPC_EXT_RM_TABLE:
3696 index = modrm.rm;
3697 dp = &opc_ext_rm_table[dp->op[1].bytemode][index];
3698 break;
3699
3700 default:
3701 oappend (INTERNAL_DISASSEMBLER_ERROR);
3702 return NULL;
3703 }
3704
3705 if (dp->name != NULL)
3706 return dp;
3707 else
8bb15339 3708 return get_valid_dis386 (dp, info);
b844680a
L		 3709}
3710
e396998b 3711static int
26ca5450 3712print_insn (bfd_vma pc, disassemble_info *info)
252b5132 3713{
2da11e11 3714 const struct dis386 *dp;
252b5132 3715 int i;
ce518a5f 3716 char *op_txt[MAX_OPERANDS];
252b5132 3717 int needcomma;
e396998b
AM		 3718 int sizeflag;
3719 const char *p;
252b5132 3720 struct dis_private priv;
eec0f4ca 3721 unsigned char op;
b844680a
L		 3722 char prefix_obuf[32];
3723 char *prefix_obufp;
252b5132 3724
cb712a9e
L		 3725 if (info->mach == bfd_mach_x86_64_intel_syntax
3726 || info->mach == bfd_mach_x86_64)
3727 address_mode = mode_64bit;
3728 else
3729 address_mode = mode_32bit;
52b15da3 3730
8373f971 3731 if (intel_syntax == (char) -1)
e396998b
AM		 3732 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
3733 || info->mach == bfd_mach_x86_64_intel_syntax);
3734
2da11e11 3735 if (info->mach == bfd_mach_i386_i386
52b15da3
JH		 3736 || info->mach == bfd_mach_x86_64
3737 || info->mach == bfd_mach_i386_i386_intel_syntax
3738 || info->mach == bfd_mach_x86_64_intel_syntax)
e396998b 3739 priv.orig_sizeflag = AFLAG | DFLAG;
2da11e11 3740 else if (info->mach == bfd_mach_i386_i8086)
e396998b 3741 priv.orig_sizeflag = 0;
2da11e11
AM		 3742 else
3743 abort ();
e396998b
AM		 3744
3745 for (p = info->disassembler_options; p != NULL; )
3746 {
0112cd26 3747 if (CONST_STRNEQ (p, "x86-64"))
e396998b 3748 {
cb712a9e 3749 address_mode = mode_64bit;
e396998b
AM		 3750 priv.orig_sizeflag = AFLAG | DFLAG;
3751 }
0112cd26 3752 else if (CONST_STRNEQ (p, "i386"))
e396998b 3753 {
cb712a9e 3754 address_mode = mode_32bit;
e396998b
AM		 3755 priv.orig_sizeflag = AFLAG | DFLAG;
3756 }
0112cd26 3757 else if (CONST_STRNEQ (p, "i8086"))
e396998b 3758 {
cb712a9e 3759 address_mode = mode_16bit;
e396998b
AM		 3760 priv.orig_sizeflag = 0;
3761 }
0112cd26 3762 else if (CONST_STRNEQ (p, "intel"))
e396998b
AM		 3763 {
3764 intel_syntax = 1;
3765 }
0112cd26 3766 else if (CONST_STRNEQ (p, "att"))
e396998b
AM		 3767 {
3768 intel_syntax = 0;
3769 }
0112cd26 3770 else if (CONST_STRNEQ (p, "addr"))
e396998b 3771 {
f59a29b9
L		 3772 if (address_mode == mode_64bit)
3773 {
3774 if (p[4] == '3' && p[5] == '2')
3775 priv.orig_sizeflag &= ~AFLAG;
3776 else if (p[4] == '6' && p[5] == '4')
3777 priv.orig_sizeflag |= AFLAG;
3778 }
3779 else
3780 {
3781 if (p[4] == '1' && p[5] == '6')
3782 priv.orig_sizeflag &= ~AFLAG;
3783 else if (p[4] == '3' && p[5] == '2')
3784 priv.orig_sizeflag |= AFLAG;
3785 }
e396998b 3786 }
0112cd26 3787 else if (CONST_STRNEQ (p, "data"))
e396998b
AM		 3788 {
3789 if (p[4] == '1' && p[5] == '6')
3790 priv.orig_sizeflag &= ~DFLAG;
3791 else if (p[4] == '3' && p[5] == '2')
3792 priv.orig_sizeflag |= DFLAG;
3793 }
0112cd26 3794 else if (CONST_STRNEQ (p, "suffix"))
e396998b
AM		 3795 priv.orig_sizeflag |= SUFFIX_ALWAYS;
3796
3797 p = strchr (p, ',');
3798 if (p != NULL)
3799 p++;
3800 }
3801
3802 if (intel_syntax)
3803 {
3804 names64 = intel_names64;
3805 names32 = intel_names32;
3806 names16 = intel_names16;
3807 names8 = intel_names8;
3808 names8rex = intel_names8rex;
3809 names_seg = intel_names_seg;
3810 index16 = intel_index16;
3811 open_char = '[';
3812 close_char = ']';
3813 separator_char = '+';
3814 scale_char = '*';
3815 }
3816 else
3817 {
3818 names64 = att_names64;
3819 names32 = att_names32;
3820 names16 = att_names16;
3821 names8 = att_names8;
3822 names8rex = att_names8rex;
3823 names_seg = att_names_seg;
3824 index16 = att_index16;
3825 open_char = '(';
3826 close_char = ')';
3827 separator_char = ',';
3828 scale_char = ',';
3829 }
2da11e11 3830
4fe53c98 3831 /* The output looks better if we put 7 bytes on a line, since that
c608c12e 3832 puts most long word instructions on a single line. */
4fe53c98 3833 info->bytes_per_line = 7;
252b5132 3834
26ca5450 3835 info->private_data = &priv;
252b5132
RH		 3836 priv.max_fetched = priv.the_buffer;
3837 priv.insn_start = pc;
252b5132
RH		 3838
3839 obuf[0] = 0;
ce518a5f
L		 3840 for (i = 0; i < MAX_OPERANDS; ++i)
3841 {
3842 op_out[i][0] = 0;
3843 op_index[i] = -1;
3844 }
252b5132
RH		 3845
3846 the_info = info;
3847 start_pc = pc;
e396998b
AM		 3848 start_codep = priv.the_buffer;
3849 codep = priv.the_buffer;
252b5132 3850
5076851f
ILT		 3851 if (setjmp (priv.bailout) != 0)
3852 {
7d421014
ILT		 3853 const char *name;
3854
5076851f 3855 /* Getting here means we tried for data but didn't get it. That
e396998b
AM		 3856 means we have an incomplete instruction of some sort. Just
3857 print the first byte as a prefix or a .byte pseudo-op. */
3858 if (codep > priv.the_buffer)
5076851f 3859 {
e396998b 3860 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 3861 if (name != NULL)
3862 (*info->fprintf_func) (info->stream, "%s", name);
3863 else
5076851f 3864 {
7d421014
ILT		 3865 /* Just print the first byte as a .byte instruction. */
3866 (*info->fprintf_func) (info->stream, ".byte 0x%x",
e396998b 3867 (unsigned int) priv.the_buffer[0]);
5076851f 3868 }
5076851f 3869
7d421014 3870 return 1;
5076851f
ILT		 3871 }
3872
3873 return -1;
3874 }
3875
52b15da3 3876 obufp = obuf;
252b5132
RH		 3877 ckprefix ();
3878
3879 insn_codep = codep;
e396998b 3880 sizeflag = priv.orig_sizeflag;
252b5132
RH		 3881
3882 FETCH_DATA (info, codep + 1);
3883 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3884
3e7d61b2
AM		 3885 if (((prefixes & PREFIX_FWAIT)
3886 && ((*codep < 0xd8) || (*codep > 0xdf)))
3887 || (rex && rex_used))
252b5132 3888 {
7d421014
ILT		 3889 const char *name;
3890
3e7d61b2
AM		 3891 /* fwait not followed by floating point instruction, or rex followed
3892 by other prefixes. Print the first prefix. */
e396998b 3893 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 3894 if (name == NULL)
3895 name = INTERNAL_DISASSEMBLER_ERROR;
3896 (*info->fprintf_func) (info->stream, "%s", name);
3897 return 1;
252b5132
RH		 3898 }
3899
eec0f4ca 3900 op = 0;
252b5132
RH		 3901 if (*codep == 0x0f)
3902 {
eec0f4ca 3903 unsigned char threebyte;
252b5132 3904 FETCH_DATA (info, codep + 2);
eec0f4ca
L		 3905 threebyte = *++codep;
3906 dp = &dis386_twobyte[threebyte];
252b5132 3907 need_modrm = twobyte_has_modrm[*codep];
eec0f4ca 3908 codep++;
252b5132
RH		 3909 }
3910 else
3911 {
6439fc28 3912 dp = &dis386[*codep];
252b5132 3913 need_modrm = onebyte_has_modrm[*codep];
eec0f4ca 3914 codep++;
252b5132 3915 }
246c51aa 3916
b844680a 3917 if ((prefixes & PREFIX_REPZ))
7d421014 3918 {
b844680a 3919 repz_prefix = "repz ";
7d421014
ILT		 3920 used_prefixes |= PREFIX_REPZ;
3921 }
b844680a
L		 3922 else
3923 repz_prefix = NULL;
3924
3925 if ((prefixes & PREFIX_REPNZ))
7d421014 3926 {
b844680a 3927 repnz_prefix = "repnz ";
7d421014
ILT		 3928 used_prefixes |= PREFIX_REPNZ;
3929 }
b844680a
L		 3930 else
3931 repnz_prefix = NULL;
050dfa73 3932
b844680a 3933 if ((prefixes & PREFIX_LOCK))
7d421014 3934 {
b844680a 3935 lock_prefix = "lock ";
7d421014
ILT		 3936 used_prefixes |= PREFIX_LOCK;
3937 }
b844680a
L		 3938 else
3939 lock_prefix = NULL;
c608c12e 3940
b844680a 3941 addr_prefix = NULL;
c608c12e
AM		 3942 if (prefixes & PREFIX_ADDR)
3943 {
3944 sizeflag ^= AFLAG;
ce518a5f 3945 if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
3ffd33cf 3946 {
cb712a9e 3947 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
b844680a 3948 addr_prefix = "addr32 ";
3ffd33cf 3949 else
b844680a 3950 addr_prefix = "addr16 ";
3ffd33cf
AM		 3951 used_prefixes |= PREFIX_ADDR;
3952 }
3953 }
3954
b844680a
L		 3955 data_prefix = NULL;
3956 if ((prefixes & PREFIX_DATA))
3ffd33cf
AM		 3957 {
3958 sizeflag ^= DFLAG;
ce518a5f
L		 3959 if (dp->op[2].bytemode == cond_jump_mode
3960 && dp->op[0].bytemode == v_mode
6439fc28 3961 && !intel_syntax)
3ffd33cf
AM		 3962 {
3963 if (sizeflag & DFLAG)
b844680a 3964 data_prefix = "data32 ";
3ffd33cf 3965 else
b844680a 3966 data_prefix = "data16 ";
3ffd33cf
AM		 3967 used_prefixes |= PREFIX_DATA;
3968 }
3969 }
3970
8bb15339 3971 if (need_modrm)
252b5132
RH		 3972 {
3973 FETCH_DATA (info, codep + 1);
7967e09e
L		 3974 modrm.mod = (*codep >> 6) & 3;
3975 modrm.reg = (*codep >> 3) & 7;
3976 modrm.rm = *codep & 7;
252b5132
RH		 3977 }
3978
ce518a5f 3979 if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
252b5132
RH		 3980 {
3981 dofloat (sizeflag);
3982 }
3983 else
3984 {
8bb15339 3985 dp = get_valid_dis386 (dp, info);
b844680a 3986 if (dp != NULL && putop (dp->name, sizeflag) == 0)
ce518a5f
L		 3987 {
3988 for (i = 0; i < MAX_OPERANDS; ++i)
3989 {
246c51aa 3990 obufp = op_out[i];
ce518a5f
L		 3991 op_ad = MAX_OPERANDS - 1 - i;
3992 if (dp->op[i].rtn)
3993 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
3994 }
6439fc28 3995 }
252b5132
RH		 3996 }
3997
7d421014
ILT		 3998 /* See if any prefixes were not used. If so, print the first one
3999 separately. If we don't do this, we'll wind up printing an
4000 instruction stream which does not precisely correspond to the
4001 bytes we are disassembling. */
4002 if ((prefixes & ~used_prefixes) != 0)
4003 {
4004 const char *name;
4005
e396998b 4006 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 4007 if (name == NULL)
4008 name = INTERNAL_DISASSEMBLER_ERROR;
4009 (*info->fprintf_func) (info->stream, "%s", name);
4010 return 1;
4011 }
52b15da3
JH		 4012 if (rex & ~rex_used)
4013 {
4014 const char *name;
e396998b 4015 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
52b15da3
JH		 4016 if (name == NULL)
4017 name = INTERNAL_DISASSEMBLER_ERROR;
4018 (*info->fprintf_func) (info->stream, "%s ", name);
4019 }
7d421014 4020
b844680a
L		 4021 prefix_obuf[0] = 0;
4022 prefix_obufp = prefix_obuf;
4023 if (lock_prefix)
4024 prefix_obufp = stpcpy (prefix_obufp, lock_prefix);
4025 if (repz_prefix)
4026 prefix_obufp = stpcpy (prefix_obufp, repz_prefix);
4027 if (repnz_prefix)
4028 prefix_obufp = stpcpy (prefix_obufp, repnz_prefix);
4029 if (addr_prefix)
4030 prefix_obufp = stpcpy (prefix_obufp, addr_prefix);
4031 if (data_prefix)
4032 prefix_obufp = stpcpy (prefix_obufp, data_prefix);
4033
4034 if (prefix_obuf[0] != 0)
4035 (*info->fprintf_func) (info->stream, "%s", prefix_obuf);
4036
252b5132 4037 obufp = obuf + strlen (obuf);
b844680a 4038 for (i = strlen (obuf) + strlen (prefix_obuf); i < 6; i++)
252b5132
RH		 4039 oappend (" ");
4040 oappend (" ");
4041 (*info->fprintf_func) (info->stream, "%s", obuf);
4042
4043 /* The enter and bound instructions are printed with operands in the same
4044 order as the intel book; everything else is printed in reverse order. */
2da11e11 4045 if (intel_syntax || two_source_ops)
252b5132 4046 {
185b1163
L		 4047 bfd_vma riprel;
4048
ce518a5f
L		 4049 for (i = 0; i < MAX_OPERANDS; ++i)
4050 op_txt[i] = op_out[i];
246c51aa 4051
ce518a5f
L		 4052 for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
4053 {
4054 op_ad = op_index[i];
4055 op_index[i] = op_index[MAX_OPERANDS - 1 - i];
4056 op_index[MAX_OPERANDS - 1 - i] = op_ad;
185b1163
L		 4057 riprel = op_riprel[i];
4058 op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
4059 op_riprel[MAX_OPERANDS - 1 - i] = riprel;
ce518a5f 4060 }
252b5132
RH		 4061 }
4062 else
4063 {
ce518a5f
L		 4064 for (i = 0; i < MAX_OPERANDS; ++i)
4065 op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
050dfa73
MM		 4066 }
4067
ce518a5f
L		 4068 needcomma = 0;
4069 for (i = 0; i < MAX_OPERANDS; ++i)
4070 if (*op_txt[i])
4071 {
4072 if (needcomma)
4073 (*info->fprintf_func) (info->stream, ",");
4074 if (op_index[i] != -1 && !op_riprel[i])
4075 (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
4076 else
4077 (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
4078 needcomma = 1;
4079 }
050dfa73 4080
ce518a5f 4081 for (i = 0; i < MAX_OPERANDS; i++)
52b15da3
JH		 4082 if (op_index[i] != -1 && op_riprel[i])
4083 {
4084 (*info->fprintf_func) (info->stream, " # ");
4085 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
4086 + op_address[op_index[i]]), info);
185b1163 4087 break;
52b15da3 4088 }
e396998b 4089 return codep - priv.the_buffer;
252b5132
RH		 4090}
4091
6439fc28 4092static const char *float_mem[] = {
252b5132 4093 /* d8 */
6439fc28
AM		 4094 "fadd{s||s|}",
4095 "fmul{s||s|}",
4096 "fcom{s||s|}",
4097 "fcomp{s||s|}",
4098 "fsub{s||s|}",
4099 "fsubr{s||s|}",
4100 "fdiv{s||s|}",
4101 "fdivr{s||s|}",
db6eb5be 4102 /* d9 */
6439fc28 4103 "fld{s||s|}",
252b5132 4104 "(bad)",
6439fc28
AM		 4105 "fst{s||s|}",
4106 "fstp{s||s|}",
9306ca4a 4107 "fldenvIC",
252b5132 4108 "fldcw",
9306ca4a 4109 "fNstenvIC",
252b5132
RH		 4110 "fNstcw",
4111 /* da */
6439fc28
AM		 4112 "fiadd{l||l|}",
4113 "fimul{l||l|}",
4114 "ficom{l||l|}",
4115 "ficomp{l||l|}",
4116 "fisub{l||l|}",
4117 "fisubr{l||l|}",
4118 "fidiv{l||l|}",
4119 "fidivr{l||l|}",
252b5132 4120 /* db */
6439fc28 4121 "fild{l||l|}",
ca164297 4122 "fisttp{l||l|}",
6439fc28
AM		 4123 "fist{l||l|}",
4124 "fistp{l||l|}",
252b5132 4125 "(bad)",
6439fc28 4126 "fld{t||t|}",
252b5132 4127 "(bad)",
6439fc28 4128 "fstp{t||t|}",
252b5132 4129 /* dc */
6439fc28
AM		 4130 "fadd{l||l|}",
4131 "fmul{l||l|}",
4132 "fcom{l||l|}",
4133 "fcomp{l||l|}",
4134 "fsub{l||l|}",
4135 "fsubr{l||l|}",
4136 "fdiv{l||l|}",
4137 "fdivr{l||l|}",
252b5132 4138 /* dd */
6439fc28 4139 "fld{l||l|}",
1d9f512f 4140 "fisttp{ll||ll|}",
6439fc28
AM		 4141 "fst{l||l|}",
4142 "fstp{l||l|}",
9306ca4a 4143 "frstorIC",
252b5132 4144 "(bad)",
9306ca4a 4145 "fNsaveIC",
252b5132
RH		 4146 "fNstsw",
4147 /* de */
4148 "fiadd",
4149 "fimul",
4150 "ficom",
4151 "ficomp",
4152 "fisub",
4153 "fisubr",
4154 "fidiv",
4155 "fidivr",
4156 /* df */
4157 "fild",
ca164297 4158 "fisttp",
252b5132
RH		 4159 "fist",
4160 "fistp",
4161 "fbld",
6439fc28 4162 "fild{ll||ll|}",
252b5132 4163 "fbstp",
1d9f512f
AM		 4164 "fistp{ll||ll|}",
4165};
4166
4167static const unsigned char float_mem_mode[] = {
4168 /* d8 */
4169 d_mode,
4170 d_mode,
4171 d_mode,
4172 d_mode,
4173 d_mode,
4174 d_mode,
4175 d_mode,
4176 d_mode,
4177 /* d9 */
4178 d_mode,
4179 0,
4180 d_mode,
4181 d_mode,
4182 0,
4183 w_mode,
4184 0,
4185 w_mode,
4186 /* da */
4187 d_mode,
4188 d_mode,
4189 d_mode,
4190 d_mode,
4191 d_mode,
4192 d_mode,
4193 d_mode,
4194 d_mode,
4195 /* db */
4196 d_mode,
4197 d_mode,
4198 d_mode,
4199 d_mode,
4200 0,
9306ca4a 4201 t_mode,
1d9f512f 4202 0,
9306ca4a 4203 t_mode,
1d9f512f
AM		 4204 /* dc */
4205 q_mode,
4206 q_mode,
4207 q_mode,
4208 q_mode,
4209 q_mode,
4210 q_mode,
4211 q_mode,
4212 q_mode,
4213 /* dd */
4214 q_mode,
4215 q_mode,
4216 q_mode,
4217 q_mode,
4218 0,
4219 0,
4220 0,
4221 w_mode,
4222 /* de */
4223 w_mode,
4224 w_mode,
4225 w_mode,
4226 w_mode,
4227 w_mode,
4228 w_mode,
4229 w_mode,
4230 w_mode,
4231 /* df */
4232 w_mode,
4233 w_mode,
4234 w_mode,
4235 w_mode,
9306ca4a 4236 t_mode,
1d9f512f 4237 q_mode,
9306ca4a 4238 t_mode,
1d9f512f 4239 q_mode
252b5132
RH		 4240};
4241
ce518a5f
L		 4242#define ST { OP_ST, 0 }
4243#define STi { OP_STi, 0 }
252b5132 4244
4efba78c
L		 4245#define FGRPd9_2 NULL, { { NULL, 0 } }
4246#define FGRPd9_4 NULL, { { NULL, 1 } }
4247#define FGRPd9_5 NULL, { { NULL, 2 } }
4248#define FGRPd9_6 NULL, { { NULL, 3 } }
4249#define FGRPd9_7 NULL, { { NULL, 4 } }
4250#define FGRPda_5 NULL, { { NULL, 5 } }
4251#define FGRPdb_4 NULL, { { NULL, 6 } }
4252#define FGRPde_3 NULL, { { NULL, 7 } }
4253#define FGRPdf_4 NULL, { { NULL, 8 } }
252b5132 4254
2da11e11 4255static const struct dis386 float_reg[][8] = {
252b5132
RH		 4256 /* d8 */
4257 {
ce518a5f
L		 4258 { "fadd", { ST, STi } },
4259 { "fmul", { ST, STi } },
4260 { "fcom", { STi } },
4261 { "fcomp", { STi } },
4262 { "fsub", { ST, STi } },
4263 { "fsubr", { ST, STi } },
4264 { "fdiv", { ST, STi } },
4265 { "fdivr", { ST, STi } },
252b5132
RH		 4266 },
4267 /* d9 */
4268 {
ce518a5f
L		 4269 { "fld", { STi } },
4270 { "fxch", { STi } },
252b5132 4271 { FGRPd9_2 },
ce518a5f 4272 { "(bad)", { XX } },
252b5132
RH		 4273 { FGRPd9_4 },
4274 { FGRPd9_5 },
4275 { FGRPd9_6 },
4276 { FGRPd9_7 },
4277 },
4278 /* da */
4279 {
ce518a5f
L		 4280 { "fcmovb", { ST, STi } },
4281 { "fcmove", { ST, STi } },
4282 { "fcmovbe",{ ST, STi } },
4283 { "fcmovu", { ST, STi } },
4284 { "(bad)", { XX } },
252b5132 4285 { FGRPda_5 },
ce518a5f
L		 4286 { "(bad)", { XX } },
4287 { "(bad)", { XX } },
252b5132
RH		 4288 },
4289 /* db */
4290 {
ce518a5f
L		 4291 { "fcmovnb",{ ST, STi } },
4292 { "fcmovne",{ ST, STi } },
4293 { "fcmovnbe",{ ST, STi } },
4294 { "fcmovnu",{ ST, STi } },
252b5132 4295 { FGRPdb_4 },
ce518a5f
L		 4296 { "fucomi", { ST, STi } },
4297 { "fcomi", { ST, STi } },
4298 { "(bad)", { XX } },
252b5132
RH		 4299 },
4300 /* dc */
4301 {
ce518a5f
L		 4302 { "fadd", { STi, ST } },
4303 { "fmul", { STi, ST } },
4304 { "(bad)", { XX } },
4305 { "(bad)", { XX } },
0b1cf022 4306#if SYSV386_COMPAT
ce518a5f
L		 4307 { "fsub", { STi, ST } },
4308 { "fsubr", { STi, ST } },
4309 { "fdiv", { STi, ST } },
4310 { "fdivr", { STi, ST } },
252b5132 4311#else
ce518a5f
L		 4312 { "fsubr", { STi, ST } },
4313 { "fsub", { STi, ST } },
4314 { "fdivr", { STi, ST } },
4315 { "fdiv", { STi, ST } },
252b5132
RH		 4316#endif
4317 },
4318 /* dd */
4319 {
ce518a5f
L		 4320 { "ffree", { STi } },
4321 { "(bad)", { XX } },
4322 { "fst", { STi } },
4323 { "fstp", { STi } },
4324 { "fucom", { STi } },
4325 { "fucomp", { STi } },
4326 { "(bad)", { XX } },
4327 { "(bad)", { XX } },
252b5132
RH		 4328 },
4329 /* de */
4330 {
ce518a5f
L		 4331 { "faddp", { STi, ST } },
4332 { "fmulp", { STi, ST } },
4333 { "(bad)", { XX } },
252b5132 4334 { FGRPde_3 },
0b1cf022 4335#if SYSV386_COMPAT
ce518a5f
L		 4336 { "fsubp", { STi, ST } },
4337 { "fsubrp", { STi, ST } },
4338 { "fdivp", { STi, ST } },
4339 { "fdivrp", { STi, ST } },
252b5132 4340#else
ce518a5f
L		 4341 { "fsubrp", { STi, ST } },
4342 { "fsubp", { STi, ST } },
4343 { "fdivrp", { STi, ST } },
4344 { "fdivp", { STi, ST } },
252b5132
RH		 4345#endif
4346 },
4347 /* df */
4348 {
ce518a5f
L		 4349 { "ffreep", { STi } },
4350 { "(bad)", { XX } },
4351 { "(bad)", { XX } },
4352 { "(bad)", { XX } },
252b5132 4353 { FGRPdf_4 },
ce518a5f
L		 4354 { "fucomip", { ST, STi } },
4355 { "fcomip", { ST, STi } },
4356 { "(bad)", { XX } },
252b5132
RH		 4357 },
4358};
4359
252b5132
RH		 4360static char *fgrps[][8] = {
4361 /* d9_2 0 */
4362 {
4363 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4364 },
4365
4366 /* d9_4 1 */
4367 {
4368 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4369 },
4370
4371 /* d9_5 2 */
4372 {
4373 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4374 },
4375
4376 /* d9_6 3 */
4377 {
4378 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4379 },
4380
4381 /* d9_7 4 */
4382 {
4383 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4384 },
4385
4386 /* da_5 5 */
4387 {
4388 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4389 },
4390
4391 /* db_4 6 */
4392 {
4393 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4394 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4395 },
4396
4397 /* de_3 7 */
4398 {
4399 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4400 },
4401
4402 /* df_4 8 */
4403 {
4404 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4405 },
4406};
4407
b844680a
L		 4408static void
4409OP_Skip_MODRM (int bytemode ATTRIBUTE_UNUSED,
4410 int sizeflag ATTRIBUTE_UNUSED)
4411{
4412 /* Skip mod/rm byte. */
4413 MODRM_CHECK;
4414 codep++;
4415}
4416
252b5132 4417static void
26ca5450 4418dofloat (int sizeflag)
252b5132 4419{
2da11e11 4420 const struct dis386 *dp;
252b5132
RH		 4421 unsigned char floatop;
4422
4423 floatop = codep[-1];
4424
7967e09e 4425 if (modrm.mod != 3)
252b5132 4426 {
7967e09e 4427 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
1d9f512f
AM		 4428
4429 putop (float_mem[fp_indx], sizeflag);
ce518a5f 4430 obufp = op_out[0];
6e50d963 4431 op_ad = 2;
1d9f512f 4432 OP_E (float_mem_mode[fp_indx], sizeflag);
252b5132
RH		 4433 return;
4434 }
6608db57 4435 /* Skip mod/rm byte. */
4bba6815 4436 MODRM_CHECK;
252b5132
RH		 4437 codep++;
4438
7967e09e 4439 dp = &float_reg[floatop - 0xd8][modrm.reg];
252b5132
RH		 4440 if (dp->name == NULL)
4441 {
7967e09e 4442 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
252b5132 4443
6608db57 4444 /* Instruction fnstsw is only one with strange arg. */
252b5132 4445 if (floatop == 0xdf && codep[-1] == 0xe0)
ce518a5f 4446 strcpy (op_out[0], names16[0]);
252b5132
RH		 4447 }
4448 else
4449 {
4450 putop (dp->name, sizeflag);
4451
ce518a5f 4452 obufp = op_out[0];
6e50d963 4453 op_ad = 2;
ce518a5f
L		 4454 if (dp->op[0].rtn)
4455 (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
6e50d963 4456
ce518a5f 4457 obufp = op_out[1];
6e50d963 4458 op_ad = 1;
ce518a5f
L		 4459 if (dp->op[1].rtn)
4460 (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
252b5132
RH		 4461 }
4462}
4463
252b5132 4464static void
26ca5450 4465OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4466{
422673a9 4467 oappend ("%st" + intel_syntax);
252b5132
RH		 4468}
4469
252b5132 4470static void
26ca5450 4471OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4472{
7967e09e 4473 sprintf (scratchbuf, "%%st(%d)", modrm.rm);
d708bcba 4474 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4475}
4476
6608db57 4477/* Capital letters in template are macros. */
6439fc28 4478static int
26ca5450 4479putop (const char *template, int sizeflag)
252b5132 4480{
2da11e11 4481 const char *p;
9306ca4a 4482 int alt = 0;
252b5132
RH		 4483
4484 for (p = template; *p; p++)
4485 {
4486 switch (*p)
4487 {
4488 default:
4489 *obufp++ = *p;
4490 break;
6439fc28
AM		 4491 case '{':
4492 alt = 0;
4493 if (intel_syntax)
4494 alt += 1;
cb712a9e 4495 if (address_mode == mode_64bit)
6439fc28
AM		 4496 alt += 2;
4497 while (alt != 0)
4498 {
4499 while (*++p != '|')
4500 {
4501 if (*p == '}')
4502 {
4503 /* Alternative not valid. */
4504 strcpy (obuf, "(bad)");
4505 obufp = obuf + 5;
4506 return 1;
4507 }
4508 else if (*p == '\0')
4509 abort ();
4510 }
4511 alt--;
4512 }
9306ca4a
JB		 4513 /* Fall through. */
4514 case 'I':
4515 alt = 1;
4516 continue;
6439fc28
AM		 4517 case '|':
4518 while (*++p != '}')
4519 {
4520 if (*p == '\0')
4521 abort ();
4522 }
4523 break;
4524 case '}':
4525 break;
252b5132 4526 case 'A':
db6eb5be
AM		 4527 if (intel_syntax)
4528 break;
7967e09e 4529 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132
RH		 4530 *obufp++ = 'b';
4531 break;
4532 case 'B':
db6eb5be
AM		 4533 if (intel_syntax)
4534 break;
252b5132
RH		 4535 if (sizeflag & SUFFIX_ALWAYS)
4536 *obufp++ = 'b';
252b5132 4537 break;
9306ca4a
JB		 4538 case 'C':
4539 if (intel_syntax && !alt)
4540 break;
4541 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
4542 {
4543 if (sizeflag & DFLAG)
4544 *obufp++ = intel_syntax ? 'd' : 'l';
4545 else
4546 *obufp++ = intel_syntax ? 'w' : 's';
4547 used_prefixes |= (prefixes & PREFIX_DATA);
4548 }
4549 break;
ed7841b3
JB		 4550 case 'D':
4551 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
4552 break;
161a04f6 4553 USED_REX (REX_W);
7967e09e 4554 if (modrm.mod == 3)
ed7841b3 4555 {
161a04f6 4556 if (rex & REX_W)
ed7841b3
JB		 4557 *obufp++ = 'q';
4558 else if (sizeflag & DFLAG)
4559 *obufp++ = intel_syntax ? 'd' : 'l';
4560 else
4561 *obufp++ = 'w';
4562 used_prefixes |= (prefixes & PREFIX_DATA);
4563 }
4564 else
4565 *obufp++ = 'w';
4566 break;
252b5132 4567 case 'E': /* For jcxz/jecxz */
cb712a9e 4568 if (address_mode == mode_64bit)
c1a64871
JH		 4569 {
4570 if (sizeflag & AFLAG)
4571 *obufp++ = 'r';
4572 else
4573 *obufp++ = 'e';
4574 }
4575 else
4576 if (sizeflag & AFLAG)
4577 *obufp++ = 'e';
3ffd33cf
AM		 4578 used_prefixes |= (prefixes & PREFIX_ADDR);
4579 break;
4580 case 'F':
db6eb5be
AM		 4581 if (intel_syntax)
4582 break;
e396998b 4583 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
3ffd33cf
AM		 4584 {
4585 if (sizeflag & AFLAG)
cb712a9e 4586 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
3ffd33cf 4587 else
cb712a9e 4588 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
3ffd33cf
AM		 4589 used_prefixes |= (prefixes & PREFIX_ADDR);
4590 }
252b5132 4591 break;
52fd6d94
JB		 4592 case 'G':
4593 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
4594 break;
161a04f6 4595 if ((rex & REX_W) || (sizeflag & DFLAG))
52fd6d94
JB		 4596 *obufp++ = 'l';
4597 else
4598 *obufp++ = 'w';
161a04f6 4599 if (!(rex & REX_W))
52fd6d94
JB		 4600 used_prefixes |= (prefixes & PREFIX_DATA);
4601 break;
5dd0794d 4602 case 'H':
db6eb5be
AM		 4603 if (intel_syntax)
4604 break;
5dd0794d
AM		 4605 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
4606 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
4607 {
4608 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
4609 *obufp++ = ',';
4610 *obufp++ = 'p';
4611 if (prefixes & PREFIX_DS)
4612 *obufp++ = 't';
4613 else
4614 *obufp++ = 'n';
4615 }
4616 break;
9306ca4a
JB		 4617 case 'J':
4618 if (intel_syntax)
4619 break;
4620 *obufp++ = 'l';
4621 break;
42903f7f
L		 4622 case 'K':
4623 USED_REX (REX_W);
4624 if (rex & REX_W)
4625 *obufp++ = 'q';
4626 else
4627 *obufp++ = 'd';
4628 break;
6dd5059a
L		 4629 case 'Z':
4630 if (intel_syntax)
4631 break;
4632 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
4633 {
4634 *obufp++ = 'q';
4635 break;
4636 }
4637 /* Fall through. */
252b5132 4638 case 'L':
db6eb5be
AM		 4639 if (intel_syntax)
4640 break;
252b5132
RH		 4641 if (sizeflag & SUFFIX_ALWAYS)
4642 *obufp++ = 'l';
252b5132
RH		 4643 break;
4644 case 'N':
4645 if ((prefixes & PREFIX_FWAIT) == 0)
4646 *obufp++ = 'n';
7d421014
ILT		 4647 else
4648 used_prefixes |= PREFIX_FWAIT;
252b5132 4649 break;
52b15da3 4650 case 'O':
161a04f6
L		 4651 USED_REX (REX_W);
4652 if (rex & REX_W)
6439fc28 4653 *obufp++ = 'o';
a35ca55a
JB		 4654 else if (intel_syntax && (sizeflag & DFLAG))
4655 *obufp++ = 'q';
52b15da3
JH		 4656 else
4657 *obufp++ = 'd';
161a04f6 4658 if (!(rex & REX_W))
a35ca55a 4659 used_prefixes |= (prefixes & PREFIX_DATA);
52b15da3 4660 break;
6439fc28 4661 case 'T':
db6eb5be
AM		 4662 if (intel_syntax)
4663 break;
cb712a9e 4664 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28
AM		 4665 {
4666 *obufp++ = 'q';
4667 break;
4668 }
6608db57 4669 /* Fall through. */
252b5132 4670 case 'P':
db6eb5be
AM		 4671 if (intel_syntax)
4672 break;
252b5132 4673 if ((prefixes & PREFIX_DATA)
161a04f6 4674 || (rex & REX_W)
e396998b 4675 || (sizeflag & SUFFIX_ALWAYS))
252b5132 4676 {
161a04f6
L		 4677 USED_REX (REX_W);
4678 if (rex & REX_W)
52b15da3 4679 *obufp++ = 'q';
c2419411 4680 else
52b15da3
JH		 4681 {
4682 if (sizeflag & DFLAG)
4683 *obufp++ = 'l';
4684 else
4685 *obufp++ = 'w';
52b15da3 4686 }
1a114b12 4687 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4688 }
4689 break;
6439fc28 4690 case 'U':
db6eb5be
AM		 4691 if (intel_syntax)
4692 break;
cb712a9e 4693 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28 4694 {
7967e09e 4695 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
1a114b12 4696 *obufp++ = 'q';
6439fc28
AM		 4697 break;
4698 }
6608db57 4699 /* Fall through. */
252b5132 4700 case 'Q':
9306ca4a 4701 if (intel_syntax && !alt)
db6eb5be 4702 break;
161a04f6 4703 USED_REX (REX_W);
7967e09e 4704 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132 4705 {
161a04f6 4706 if (rex & REX_W)
52b15da3 4707 *obufp++ = 'q';
252b5132 4708 else
52b15da3
JH		 4709 {
4710 if (sizeflag & DFLAG)
9306ca4a 4711 *obufp++ = intel_syntax ? 'd' : 'l';
52b15da3
JH		 4712 else
4713 *obufp++ = 'w';
52b15da3 4714 }
1a114b12 4715 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4716 }
4717 break;
4718 case 'R':
161a04f6
L		 4719 USED_REX (REX_W);
4720 if (rex & REX_W)
a35ca55a
JB		 4721 *obufp++ = 'q';
4722 else if (sizeflag & DFLAG)
c608c12e 4723 {
a35ca55a 4724 if (intel_syntax)
c608c12e 4725 *obufp++ = 'd';
c608c12e 4726 else
a35ca55a 4727 *obufp++ = 'l';
c608c12e 4728 }
252b5132 4729 else
a35ca55a
JB		 4730 *obufp++ = 'w';
4731 if (intel_syntax && !p[1]
161a04f6 4732 && ((rex & REX_W) || (sizeflag & DFLAG)))
a35ca55a 4733 *obufp++ = 'e';
161a04f6 4734 if (!(rex & REX_W))
52b15da3 4735 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4736 break;
1a114b12
JB		 4737 case 'V':
4738 if (intel_syntax)
4739 break;
cb712a9e 4740 if (address_mode == mode_64bit && (sizeflag & DFLAG))
1a114b12
JB		 4741 {
4742 if (sizeflag & SUFFIX_ALWAYS)
4743 *obufp++ = 'q';
4744 break;
4745 }
4746 /* Fall through. */
252b5132 4747 case 'S':
db6eb5be
AM		 4748 if (intel_syntax)
4749 break;
252b5132
RH		 4750 if (sizeflag & SUFFIX_ALWAYS)
4751 {
161a04f6 4752 if (rex & REX_W)
52b15da3 4753 *obufp++ = 'q';
252b5132 4754 else
52b15da3
JH		 4755 {
4756 if (sizeflag & DFLAG)
4757 *obufp++ = 'l';
4758 else
4759 *obufp++ = 'w';
4760 used_prefixes |= (prefixes & PREFIX_DATA);
4761 }
252b5132 4762 }
252b5132 4763 break;
041bd2e0
JH		 4764 case 'X':
4765 if (prefixes & PREFIX_DATA)
4766 *obufp++ = 'd';
4767 else
4768 *obufp++ = 's';
db6eb5be 4769 used_prefixes |= (prefixes & PREFIX_DATA);
041bd2e0 4770 break;
76f227a5 4771 case 'Y':
db6eb5be
AM		 4772 if (intel_syntax)
4773 break;
161a04f6 4774 if (rex & REX_W)
76f227a5 4775 {
161a04f6 4776 USED_REX (REX_W);
76f227a5
JH		 4777 *obufp++ = 'q';
4778 }
4779 break;
52b15da3 4780 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
252b5132 4781 case 'W':
252b5132 4782 /* operand size flag for cwtl, cbtw */
161a04f6
L		 4783 USED_REX (REX_W);
4784 if (rex & REX_W)
a35ca55a
JB		 4785 {
4786 if (intel_syntax)
4787 *obufp++ = 'd';
4788 else
4789 *obufp++ = 'l';
4790 }
52b15da3 4791 else if (sizeflag & DFLAG)
252b5132
RH		 4792 *obufp++ = 'w';
4793 else
4794 *obufp++ = 'b';
161a04f6 4795 if (!(rex & REX_W))
52b15da3 4796 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4797 break;
4798 }
9306ca4a 4799 alt = 0;
252b5132
RH		 4800 }
4801 *obufp = 0;
6439fc28 4802 return 0;
252b5132
RH		 4803}
4804
4805static void
26ca5450 4806oappend (const char *s)
252b5132
RH		 4807{
4808 strcpy (obufp, s);
4809 obufp += strlen (s);
4810}
4811
4812static void
26ca5450 4813append_seg (void)
252b5132
RH		 4814{
4815 if (prefixes & PREFIX_CS)
7d421014 4816 {
7d421014 4817 used_prefixes |= PREFIX_CS;
d708bcba 4818 oappend ("%cs:" + intel_syntax);
7d421014 4819 }
252b5132 4820 if (prefixes & PREFIX_DS)
7d421014 4821 {
7d421014 4822 used_prefixes |= PREFIX_DS;
d708bcba 4823 oappend ("%ds:" + intel_syntax);
7d421014 4824 }
252b5132 4825 if (prefixes & PREFIX_SS)
7d421014 4826 {
7d421014 4827 used_prefixes |= PREFIX_SS;
d708bcba 4828 oappend ("%ss:" + intel_syntax);
7d421014 4829 }
252b5132 4830 if (prefixes & PREFIX_ES)
7d421014 4831 {
7d421014 4832 used_prefixes |= PREFIX_ES;
d708bcba 4833 oappend ("%es:" + intel_syntax);
7d421014 4834 }
252b5132 4835 if (prefixes & PREFIX_FS)
7d421014 4836 {
7d421014 4837 used_prefixes |= PREFIX_FS;
d708bcba 4838 oappend ("%fs:" + intel_syntax);
7d421014 4839 }
252b5132 4840 if (prefixes & PREFIX_GS)
7d421014 4841 {
7d421014 4842 used_prefixes |= PREFIX_GS;
d708bcba 4843 oappend ("%gs:" + intel_syntax);
7d421014 4844 }
252b5132
RH		 4845}
4846
4847static void
26ca5450 4848OP_indirE (int bytemode, int sizeflag)
252b5132
RH		 4849{
4850 if (!intel_syntax)
4851 oappend ("*");
4852 OP_E (bytemode, sizeflag);
4853}
4854
52b15da3 4855static void
26ca5450 4856print_operand_value (char *buf, int hex, bfd_vma disp)
52b15da3 4857{
cb712a9e 4858 if (address_mode == mode_64bit)
52b15da3
JH		 4859 {
4860 if (hex)
4861 {
4862 char tmp[30];
4863 int i;
4864 buf[0] = '0';
4865 buf[1] = 'x';
4866 sprintf_vma (tmp, disp);
6608db57 4867 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
52b15da3
JH		 4868 strcpy (buf + 2, tmp + i);
4869 }
4870 else
4871 {
4872 bfd_signed_vma v = disp;
4873 char tmp[30];
4874 int i;
4875 if (v < 0)
4876 {
4877 *(buf++) = '-';
4878 v = -disp;
6608db57 4879 /* Check for possible overflow on 0x8000000000000000. */
52b15da3
JH		 4880 if (v < 0)
4881 {
4882 strcpy (buf, "9223372036854775808");
4883 return;
4884 }
4885 }
4886 if (!v)
4887 {
4888 strcpy (buf, "0");
4889 return;
4890 }
4891
4892 i = 0;
4893 tmp[29] = 0;
4894 while (v)
4895 {
6608db57 4896 tmp[28 - i] = (v % 10) + '0';
52b15da3
JH		 4897 v /= 10;
4898 i++;
4899 }
4900 strcpy (buf, tmp + 29 - i);
4901 }
4902 }
4903 else
4904 {
4905 if (hex)
4906 sprintf (buf, "0x%x", (unsigned int) disp);
4907 else
4908 sprintf (buf, "%d", (int) disp);
4909 }
4910}
4911
5d669648
L		 4912/* Put DISP in BUF as signed hex number. */
4913
4914static void
4915print_displacement (char *buf, bfd_vma disp)
4916{
4917 bfd_signed_vma val = disp;
4918 char tmp[30];
4919 int i, j = 0;
4920
4921 if (val < 0)
4922 {
4923 buf[j++] = '-';
4924 val = -disp;
4925
4926 /* Check for possible overflow. */
4927 if (val < 0)
4928 {
4929 switch (address_mode)
4930 {
4931 case mode_64bit:
4932 strcpy (buf + j, "0x8000000000000000");
4933 break;
4934 case mode_32bit:
4935 strcpy (buf + j, "0x80000000");
4936 break;
4937 case mode_16bit:
4938 strcpy (buf + j, "0x8000");
4939 break;
4940 }
4941 return;
4942 }
4943 }
4944
4945 buf[j++] = '0';
4946 buf[j++] = 'x';
4947
4948 sprintf_vma (tmp, val);
4949 for (i = 0; tmp[i] == '0'; i++)
4950 continue;
4951 if (tmp[i] == '\0')
4952 i--;
4953 strcpy (buf + j, tmp + i);
4954}
4955
3f31e633
JB		 4956static void
4957intel_operand_size (int bytemode, int sizeflag)
4958{
4959 switch (bytemode)
4960 {
4961 case b_mode:
42903f7f 4962 case dqb_mode:
3f31e633
JB		 4963 oappend ("BYTE PTR ");
4964 break;
4965 case w_mode:
4966 case dqw_mode:
4967 oappend ("WORD PTR ");
4968 break;
1a114b12 4969 case stack_v_mode:
cb712a9e 4970 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3f31e633
JB		 4971 {
4972 oappend ("QWORD PTR ");
4973 used_prefixes |= (prefixes & PREFIX_DATA);
4974 break;
4975 }
4976 /* FALLTHRU */
4977 case v_mode:
4978 case dq_mode:
161a04f6
L		 4979 USED_REX (REX_W);
4980 if (rex & REX_W)
3f31e633
JB		 4981 oappend ("QWORD PTR ");
4982 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
4983 oappend ("DWORD PTR ");
4984 else
4985 oappend ("WORD PTR ");
4986 used_prefixes |= (prefixes & PREFIX_DATA);
4987 break;
52fd6d94 4988 case z_mode:
161a04f6 4989 if ((rex & REX_W) || (sizeflag & DFLAG))
52fd6d94
JB		 4990 *obufp++ = 'D';
4991 oappend ("WORD PTR ");
161a04f6 4992 if (!(rex & REX_W))
52fd6d94
JB		 4993 used_prefixes |= (prefixes & PREFIX_DATA);
4994 break;
3f31e633 4995 case d_mode:
42903f7f 4996 case dqd_mode:
3f31e633
JB		 4997 oappend ("DWORD PTR ");
4998 break;
4999 case q_mode:
5000 oappend ("QWORD PTR ");
5001 break;
5002 case m_mode:
cb712a9e 5003 if (address_mode == mode_64bit)
3f31e633
JB		 5004 oappend ("QWORD PTR ");
5005 else
5006 oappend ("DWORD PTR ");
5007 break;
5008 case f_mode:
5009 if (sizeflag & DFLAG)
5010 oappend ("FWORD PTR ");
5011 else
5012 oappend ("DWORD PTR ");
5013 used_prefixes |= (prefixes & PREFIX_DATA);
5014 break;
5015 case t_mode:
5016 oappend ("TBYTE PTR ");
5017 break;
5018 case x_mode:
5019 oappend ("XMMWORD PTR ");
5020 break;
fb9c77c7
L		 5021 case o_mode:
5022 oappend ("OWORD PTR ");
5023 break;
3f31e633
JB		 5024 default:
5025 break;
5026 }
5027}
5028
252b5132 5029static void
26ca5450 5030OP_E (int bytemode, int sizeflag)
252b5132 5031{
52b15da3
JH		 5032 bfd_vma disp;
5033 int add = 0;
5034 int riprel = 0;
161a04f6
L		 5035 USED_REX (REX_B);
5036 if (rex & REX_B)
52b15da3 5037 add += 8;
252b5132 5038
6608db57 5039 /* Skip mod/rm byte. */
4bba6815 5040 MODRM_CHECK;
252b5132
RH		 5041 codep++;
5042
7967e09e 5043 if (modrm.mod == 3)
252b5132
RH		 5044 {
5045 switch (bytemode)
5046 {
5047 case b_mode:
52b15da3
JH		 5048 USED_REX (0);
5049 if (rex)
7967e09e 5050 oappend (names8rex[modrm.rm + add]);
52b15da3 5051 else
7967e09e 5052 oappend (names8[modrm.rm + add]);
252b5132
RH		 5053 break;
5054 case w_mode:
7967e09e 5055 oappend (names16[modrm.rm + add]);
252b5132 5056 break;
2da11e11 5057 case d_mode:
7967e09e 5058 oappend (names32[modrm.rm + add]);
52b15da3
JH		 5059 break;
5060 case q_mode:
7967e09e 5061 oappend (names64[modrm.rm + add]);
52b15da3
JH		 5062 break;
5063 case m_mode:
cb712a9e 5064 if (address_mode == mode_64bit)
7967e09e 5065 oappend (names64[modrm.rm + add]);
52b15da3 5066 else
7967e09e 5067 oappend (names32[modrm.rm + add]);
2da11e11 5068 break;
1a114b12 5069 case stack_v_mode:
cb712a9e 5070 if (address_mode == mode_64bit && (sizeflag & DFLAG))
003519a7 5071 {
7967e09e 5072 oappend (names64[modrm.rm + add]);
003519a7 5073 used_prefixes |= (prefixes & PREFIX_DATA);
1a114b12 5074 break;
003519a7 5075 }
1a114b12
JB		 5076 bytemode = v_mode;
5077 /* FALLTHRU */
252b5132 5078 case v_mode:
db6eb5be 5079 case dq_mode:
42903f7f
L		 5080 case dqb_mode:
5081 case dqd_mode:
9306ca4a 5082 case dqw_mode:
161a04f6
L		 5083 USED_REX (REX_W);
5084 if (rex & REX_W)
7967e09e 5085 oappend (names64[modrm.rm + add]);
9306ca4a 5086 else if ((sizeflag & DFLAG) || bytemode != v_mode)
7967e09e 5087 oappend (names32[modrm.rm + add]);
252b5132 5088 else
7967e09e 5089 oappend (names16[modrm.rm + add]);
7d421014 5090 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 5091 break;
2da11e11 5092 case 0:
c608c12e 5093 break;
252b5132 5094 default:
c608c12e 5095 oappend (INTERNAL_DISASSEMBLER_ERROR);
252b5132
RH		 5096 break;
5097 }
5098 return;
5099 }
5100
5101 disp = 0;
3f31e633
JB		 5102 if (intel_syntax)
5103 intel_operand_size (bytemode, sizeflag);
252b5132
RH		 5104 append_seg ();
5105
5d669648 5106 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
252b5132 5107 {
5d669648
L		 5108 /* 32/64 bit address mode */
5109 int havedisp;
252b5132
RH		 5110 int havesib;
5111 int havebase;
5112 int base;
5113 int index = 0;
5114 int scale = 0;
5115
5116 havesib = 0;
5117 havebase = 1;
7967e09e 5118 base = modrm.rm;
252b5132
RH		 5119
5120 if (base == 4)
5121 {
5122 havesib = 1;
5123 FETCH_DATA (the_info, codep + 1);
252b5132 5124 index = (*codep >> 3) & 7;
cb712a9e 5125 if (address_mode == mode_64bit || index != 0x4)
9df48ba9 5126 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
2033b4b9 5127 scale = (*codep >> 6) & 3;
252b5132 5128 base = *codep & 7;
161a04f6
L		 5129 USED_REX (REX_X);
5130 if (rex & REX_X)
52b15da3 5131 index += 8;
252b5132
RH		 5132 codep++;
5133 }
2888cb7a 5134 base += add;
252b5132 5135
7967e09e 5136 switch (modrm.mod)
252b5132
RH		 5137 {
5138 case 0:
52b15da3 5139 if ((base & 7) == 5)
252b5132
RH		 5140 {
5141 havebase = 0;
cb712a9e 5142 if (address_mode == mode_64bit && !havesib)
52b15da3
JH		 5143 riprel = 1;
5144 disp = get32s ();
252b5132
RH		 5145 }
5146 break;
5147 case 1:
5148 FETCH_DATA (the_info, codep + 1);
5149 disp = *codep++;
5150 if ((disp & 0x80) != 0)
5151 disp -= 0x100;
5152 break;
5153 case 2:
52b15da3 5154 disp = get32s ();
252b5132
RH		 5155 break;
5156 }
5157
5d669648
L		 5158 havedisp = havebase || (havesib && (index != 4 || scale != 0));
5159
252b5132 5160 if (!intel_syntax)
7967e09e 5161 if (modrm.mod != 0 || (base & 7) == 5)
db6eb5be 5162 {
5d669648
L		 5163 if (havedisp || riprel)
5164 print_displacement (scratchbuf, disp);
5165 else
5166 print_operand_value (scratchbuf, 1, disp);
db6eb5be 5167 oappend (scratchbuf);
52b15da3
JH		 5168 if (riprel)
5169 {
5170 set_op (disp, 1);
5171 oappend ("(%rip)");
5172 }
db6eb5be 5173 }
2da11e11 5174
5d669648 5175 if (havedisp || (intel_syntax && riprel))
252b5132 5176 {
252b5132 5177 *obufp++ = open_char;
52b15da3 5178 if (intel_syntax && riprel)
185b1163
L		 5179 {
5180 set_op (disp, 1);
5181 oappend ("rip");
5182 }
db6eb5be 5183 *obufp = '\0';
252b5132 5184 if (havebase)
cb712a9e 5185 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
c1a64871 5186 ? names64[base] : names32[base]);
252b5132
RH		 5187 if (havesib)
5188 {
5189 if (index != 4)
5190 {
9306ca4a 5191 if (!intel_syntax || havebase)
db6eb5be 5192 {
9306ca4a
JB		 5193 *obufp++ = separator_char;
5194 *obufp = '\0';
db6eb5be 5195 }
cb712a9e 5196 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
9306ca4a 5197 ? names64[index] : names32[index]);
252b5132 5198 }
a02a862a 5199 if (scale != 0 || (!intel_syntax && index != 4))
db6eb5be
AM		 5200 {
5201 *obufp++ = scale_char;
5202 *obufp = '\0';
5203 sprintf (scratchbuf, "%d", 1 << scale);
5204 oappend (scratchbuf);
5205 }
252b5132 5206 }
185b1163
L		 5207 if (intel_syntax
5208 && (disp || modrm.mod != 0 || (base & 7) == 5))
3d456fa1 5209 {
185b1163 5210 if ((bfd_signed_vma) disp >= 0)
3d456fa1
JB		 5211 {
5212 *obufp++ = '+';
5213 *obufp = '\0';
5214 }
7967e09e 5215 else if (modrm.mod != 1)
3d456fa1
JB		 5216 {
5217 *obufp++ = '-';
5218 *obufp = '\0';
5219 disp = - (bfd_signed_vma) disp;
5220 }
5221
5d669648 5222 print_displacement (scratchbuf, disp);
3d456fa1
JB		 5223 oappend (scratchbuf);
5224 }
252b5132
RH		 5225
5226 *obufp++ = close_char;
db6eb5be 5227 *obufp = '\0';
252b5132
RH		 5228 }
5229 else if (intel_syntax)
db6eb5be 5230 {
7967e09e 5231 if (modrm.mod != 0 || (base & 7) == 5)
db6eb5be 5232 {
252b5132
RH		 5233 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5234 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5235 ;
5236 else
5237 {
d708bcba 5238 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 5239 oappend (":");
5240 }
52b15da3 5241 print_operand_value (scratchbuf, 1, disp);
db6eb5be
AM		 5242 oappend (scratchbuf);
5243 }
5244 }
252b5132
RH		 5245 }
5246 else
5247 { /* 16 bit address mode */
7967e09e 5248 switch (modrm.mod)
252b5132
RH		 5249 {
5250 case 0:
7967e09e 5251 if (modrm.rm == 6)
252b5132
RH		 5252 {
5253 disp = get16 ();
5254 if ((disp & 0x8000) != 0)
5255 disp -= 0x10000;
5256 }
5257 break;
5258 case 1:
5259 FETCH_DATA (the_info, codep + 1);
5260 disp = *codep++;
5261 if ((disp & 0x80) != 0)
5262 disp -= 0x100;
5263 break;
5264 case 2:
5265 disp = get16 ();
5266 if ((disp & 0x8000) != 0)
5267 disp -= 0x10000;
5268 break;
5269 }
5270
5271 if (!intel_syntax)
7967e09e 5272 if (modrm.mod != 0 || modrm.rm == 6)
db6eb5be 5273 {
5d669648 5274 print_displacement (scratchbuf, disp);
db6eb5be
AM		 5275 oappend (scratchbuf);
5276 }
252b5132 5277
7967e09e 5278 if (modrm.mod != 0 || modrm.rm != 6)
252b5132
RH		 5279 {
5280 *obufp++ = open_char;
db6eb5be 5281 *obufp = '\0';
7967e09e 5282 oappend (index16[modrm.rm]);
5d669648
L		 5283 if (intel_syntax
5284 && (disp || modrm.mod != 0 || modrm.rm == 6))
3d456fa1 5285 {
5d669648 5286 if ((bfd_signed_vma) disp >= 0)
3d456fa1
JB		 5287 {
5288 *obufp++ = '+';
5289 *obufp = '\0';
5290 }
7967e09e 5291 else if (modrm.mod != 1)
3d456fa1
JB		 5292 {
5293 *obufp++ = '-';
5294 *obufp = '\0';
5295 disp = - (bfd_signed_vma) disp;
5296 }
5297
5d669648 5298 print_displacement (scratchbuf, disp);
3d456fa1
JB		 5299 oappend (scratchbuf);
5300 }
5301
db6eb5be
AM		 5302 *obufp++ = close_char;
5303 *obufp = '\0';
252b5132 5304 }
3d456fa1
JB		 5305 else if (intel_syntax)
5306 {
5307 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5308 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5309 ;
5310 else
5311 {
5312 oappend (names_seg[ds_reg - es_reg]);
5313 oappend (":");
5314 }
5315 print_operand_value (scratchbuf, 1, disp & 0xffff);
5316 oappend (scratchbuf);
5317 }
252b5132
RH		 5318 }
5319}
5320
252b5132 5321static void
26ca5450 5322OP_G (int bytemode, int sizeflag)
252b5132 5323{
52b15da3 5324 int add = 0;
161a04f6
L		 5325 USED_REX (REX_R);
5326 if (rex & REX_R)
52b15da3 5327 add += 8;
252b5132
RH		 5328 switch (bytemode)
5329 {
5330 case b_mode:
52b15da3
JH		 5331 USED_REX (0);
5332 if (rex)
7967e09e 5333 oappend (names8rex[modrm.reg + add]);
52b15da3 5334 else
7967e09e 5335 oappend (names8[modrm.reg + add]);
252b5132
RH		 5336 break;
5337 case w_mode:
7967e09e 5338 oappend (names16[modrm.reg + add]);
252b5132
RH		 5339 break;
5340 case d_mode:
7967e09e 5341 oappend (names32[modrm.reg + add]);
52b15da3
JH		 5342 break;
5343 case q_mode:
7967e09e 5344 oappend (names64[modrm.reg + add]);
252b5132
RH		 5345 break;
5346 case v_mode:
9306ca4a 5347 case dq_mode:
42903f7f
L		 5348 case dqb_mode:
5349 case dqd_mode:
9306ca4a 5350 case dqw_mode:
161a04f6
L		 5351 USED_REX (REX_W);
5352 if (rex & REX_W)
7967e09e 5353 oappend (names64[modrm.reg + add]);
9306ca4a 5354 else if ((sizeflag & DFLAG) || bytemode != v_mode)
7967e09e 5355 oappend (names32[modrm.reg + add]);
252b5132 5356 else
7967e09e 5357 oappend (names16[modrm.reg + add]);
7d421014 5358 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 5359 break;
90700ea2 5360 case m_mode:
cb712a9e 5361 if (address_mode == mode_64bit)
7967e09e 5362 oappend (names64[modrm.reg + add]);
90700ea2 5363 else
7967e09e 5364 oappend (names32[modrm.reg + add]);
90700ea2 5365 break;
252b5132
RH		 5366 default:
5367 oappend (INTERNAL_DISASSEMBLER_ERROR);
5368 break;
5369 }
5370}
5371
52b15da3 5372static bfd_vma
26ca5450 5373get64 (void)
52b15da3 5374{
5dd0794d 5375 bfd_vma x;
52b15da3 5376#ifdef BFD64
5dd0794d
AM		 5377 unsigned int a;
5378 unsigned int b;
5379
52b15da3
JH		 5380 FETCH_DATA (the_info, codep + 8);
5381 a = *codep++ & 0xff;
5382 a |= (*codep++ & 0xff) << 8;
5383 a |= (*codep++ & 0xff) << 16;
5384 a |= (*codep++ & 0xff) << 24;
5dd0794d 5385 b = *codep++ & 0xff;
52b15da3
JH		 5386 b |= (*codep++ & 0xff) << 8;
5387 b |= (*codep++ & 0xff) << 16;
5388 b |= (*codep++ & 0xff) << 24;
5389 x = a + ((bfd_vma) b << 32);
5390#else
6608db57 5391 abort ();
5dd0794d 5392 x = 0;
52b15da3
JH		 5393#endif
5394 return x;
5395}
5396
5397static bfd_signed_vma
26ca5450 5398get32 (void)
252b5132 5399{
52b15da3 5400 bfd_signed_vma x = 0;
252b5132
RH		 5401
5402 FETCH_DATA (the_info, codep + 4);
52b15da3
JH		 5403 x = *codep++ & (bfd_signed_vma) 0xff;
5404 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5405 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5406 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5407 return x;
5408}
5409
5410static bfd_signed_vma
26ca5450 5411get32s (void)
52b15da3
JH		 5412{
5413 bfd_signed_vma x = 0;
5414
5415 FETCH_DATA (the_info, codep + 4);
5416 x = *codep++ & (bfd_signed_vma) 0xff;
5417 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5418 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5419 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5420
5421 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
5422
252b5132
RH		 5423 return x;
5424}
5425
5426static int
26ca5450 5427get16 (void)
252b5132
RH		 5428{
5429 int x = 0;
5430
5431 FETCH_DATA (the_info, codep + 2);
5432 x = *codep++ & 0xff;
5433 x |= (*codep++ & 0xff) << 8;
5434 return x;
5435}
5436
5437static void
26ca5450 5438set_op (bfd_vma op, int riprel)
252b5132
RH		 5439{
5440 op_index[op_ad] = op_ad;
cb712a9e 5441 if (address_mode == mode_64bit)
7081ff04
AJ		 5442 {
5443 op_address[op_ad] = op;
5444 op_riprel[op_ad] = riprel;
5445 }
5446 else
5447 {
5448 /* Mask to get a 32-bit address. */
5449 op_address[op_ad] = op & 0xffffffff;
5450 op_riprel[op_ad] = riprel & 0xffffffff;
5451 }
252b5132
RH		 5452}
5453
5454static void
26ca5450 5455OP_REG (int code, int sizeflag)
252b5132 5456{
2da11e11 5457 const char *s;
52b15da3 5458 int add = 0;
161a04f6
L		 5459 USED_REX (REX_B);
5460 if (rex & REX_B)
52b15da3
JH		 5461 add = 8;
5462
5463 switch (code)
5464 {
52b15da3
JH		 5465 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5466 case sp_reg: case bp_reg: case si_reg: case di_reg:
5467 s = names16[code - ax_reg + add];
5468 break;
5469 case es_reg: case ss_reg: case cs_reg:
5470 case ds_reg: case fs_reg: case gs_reg:
5471 s = names_seg[code - es_reg + add];
5472 break;
5473 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5474 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5475 USED_REX (0);
5476 if (rex)
5477 s = names8rex[code - al_reg + add];
5478 else
5479 s = names8[code - al_reg];
5480 break;
6439fc28
AM		 5481 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
5482 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
cb712a9e 5483 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28
AM		 5484 {
5485 s = names64[code - rAX_reg + add];
5486 break;
5487 }
5488 code += eAX_reg - rAX_reg;
6608db57 5489 /* Fall through. */
52b15da3
JH		 5490 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5491 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
161a04f6
L		 5492 USED_REX (REX_W);
5493 if (rex & REX_W)
52b15da3
JH		 5494 s = names64[code - eAX_reg + add];
5495 else if (sizeflag & DFLAG)
5496 s = names32[code - eAX_reg + add];
5497 else
5498 s = names16[code - eAX_reg + add];
5499 used_prefixes |= (prefixes & PREFIX_DATA);
5500 break;
52b15da3
JH		 5501 default:
5502 s = INTERNAL_DISASSEMBLER_ERROR;
5503 break;
5504 }
5505 oappend (s);
5506}
5507
5508static void
26ca5450 5509OP_IMREG (int code, int sizeflag)
52b15da3
JH		 5510{
5511 const char *s;
252b5132
RH		 5512
5513 switch (code)
5514 {
5515 case indir_dx_reg:
d708bcba 5516 if (intel_syntax)
52fd6d94 5517 s = "dx";
d708bcba 5518 else
db6eb5be 5519 s = "(%dx)";
252b5132
RH		 5520 break;
5521 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5522 case sp_reg: case bp_reg: case si_reg: case di_reg:
5523 s = names16[code - ax_reg];
5524 break;
5525 case es_reg: case ss_reg: case cs_reg:
5526 case ds_reg: case fs_reg: case gs_reg:
5527 s = names_seg[code - es_reg];
5528 break;
5529 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5530 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
52b15da3
JH		 5531 USED_REX (0);
5532 if (rex)
5533 s = names8rex[code - al_reg];
5534 else
5535 s = names8[code - al_reg];
252b5132
RH		 5536 break;
5537 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5538 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
161a04f6
L		 5539 USED_REX (REX_W);
5540 if (rex & REX_W)
52b15da3
JH		 5541 s = names64[code - eAX_reg];
5542 else if (sizeflag & DFLAG)
252b5132
RH		 5543 s = names32[code - eAX_reg];
5544 else
5545 s = names16[code - eAX_reg];
7d421014 5546 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 5547 break;
52fd6d94 5548 case z_mode_ax_reg:
161a04f6 5549 if ((rex & REX_W) || (sizeflag & DFLAG))
52fd6d94
JB		 5550 s = *names32;
5551 else
5552 s = *names16;
161a04f6 5553 if (!(rex & REX_W))
52fd6d94
JB		 5554 used_prefixes |= (prefixes & PREFIX_DATA);
5555 break;
252b5132
RH		 5556 default:
5557 s = INTERNAL_DISASSEMBLER_ERROR;
5558 break;
5559 }
5560 oappend (s);
5561}
5562
5563static void
26ca5450 5564OP_I (int bytemode, int sizeflag)
252b5132 5565{
52b15da3
JH		 5566 bfd_signed_vma op;
5567 bfd_signed_vma mask = -1;
252b5132
RH		 5568
5569 switch (bytemode)
5570 {
5571 case b_mode:
5572 FETCH_DATA (the_info, codep + 1);
52b15da3
JH		 5573 op = *codep++;
5574 mask = 0xff;
5575 break;
5576 case q_mode:
cb712a9e 5577 if (address_mode == mode_64bit)
6439fc28
AM		 5578 {
5579 op = get32s ();
5580 break;
5581 }
6608db57 5582 /* Fall through. */
252b5132 5583 case v_mode:
161a04f6
L		 5584 USED_REX (REX_W);
5585 if (rex & REX_W)
52b15da3
JH		 5586 op = get32s ();
5587 else if (sizeflag & DFLAG)
5588 {
5589 op = get32 ();
5590 mask = 0xffffffff;
5591 }
252b5132 5592 else
52b15da3
JH		 5593 {
5594 op = get16 ();
5595 mask = 0xfffff;
5596 }
7d421014 5597 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 5598 break;
5599 case w_mode:
52b15da3 5600 mask = 0xfffff;
252b5132
RH		 5601 op = get16 ();
5602 break;
9306ca4a
JB		 5603 case const_1_mode:
5604 if (intel_syntax)
5605 oappend ("1");
5606 return;
252b5132
RH		 5607 default:
5608 oappend (INTERNAL_DISASSEMBLER_ERROR);
5609 return;
5610 }
5611
52b15da3
JH		 5612 op &= mask;
5613 scratchbuf[0] = '$';
d708bcba
AM		 5614 print_operand_value (scratchbuf + 1, 1, op);
5615 oappend (scratchbuf + intel_syntax);
52b15da3
JH		 5616 scratchbuf[0] = '\0';
5617}
5618
5619static void
26ca5450 5620OP_I64 (int bytemode, int sizeflag)
52b15da3
JH		 5621{
5622 bfd_signed_vma op;
5623 bfd_signed_vma mask = -1;
5624
cb712a9e 5625 if (address_mode != mode_64bit)
6439fc28
AM		 5626 {
5627 OP_I (bytemode, sizeflag);
5628 return;
5629 }
5630
52b15da3
JH		 5631 switch (bytemode)
5632 {
5633 case b_mode:
5634 FETCH_DATA (the_info, codep + 1);
5635 op = *codep++;
5636 mask = 0xff;
5637 break;
5638 case v_mode:
161a04f6
L		 5639 USED_REX (REX_W);
5640 if (rex & REX_W)
52b15da3
JH		 5641 op = get64 ();
5642 else if (sizeflag & DFLAG)
5643 {
5644 op = get32 ();
5645 mask = 0xffffffff;
5646 }
5647 else
5648 {
5649 op = get16 ();
5650 mask = 0xfffff;
5651 }
5652 used_prefixes |= (prefixes & PREFIX_DATA);
5653 break;
5654 case w_mode:
5655 mask = 0xfffff;
5656 op = get16 ();
5657 break;
5658 default:
5659 oappend (INTERNAL_DISASSEMBLER_ERROR);
5660 return;
5661 }
5662
5663 op &= mask;
5664 scratchbuf[0] = '$';
d708bcba
AM		 5665 print_operand_value (scratchbuf + 1, 1, op);
5666 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5667 scratchbuf[0] = '\0';
5668}
5669
5670static void
26ca5450 5671OP_sI (int bytemode, int sizeflag)
252b5132 5672{
52b15da3
JH		 5673 bfd_signed_vma op;
5674 bfd_signed_vma mask = -1;
252b5132
RH		 5675
5676 switch (bytemode)
5677 {
5678 case b_mode:
5679 FETCH_DATA (the_info, codep + 1);
5680 op = *codep++;
5681 if ((op & 0x80) != 0)
5682 op -= 0x100;
52b15da3 5683 mask = 0xffffffff;
252b5132
RH		 5684 break;
5685 case v_mode:
161a04f6
L		 5686 USED_REX (REX_W);
5687 if (rex & REX_W)
52b15da3
JH		 5688 op = get32s ();
5689 else if (sizeflag & DFLAG)
5690 {
5691 op = get32s ();
5692 mask = 0xffffffff;
5693 }
252b5132
RH		 5694 else
5695 {
52b15da3 5696 mask = 0xffffffff;
6608db57 5697 op = get16 ();
252b5132
RH		 5698 if ((op & 0x8000) != 0)
5699 op -= 0x10000;
5700 }
7d421014 5701 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 5702 break;
5703 case w_mode:
5704 op = get16 ();
52b15da3 5705 mask = 0xffffffff;
252b5132
RH		 5706 if ((op & 0x8000) != 0)
5707 op -= 0x10000;
5708 break;
5709 default:
5710 oappend (INTERNAL_DISASSEMBLER_ERROR);
5711 return;
5712 }
52b15da3
JH		 5713
5714 scratchbuf[0] = '$';
5715 print_operand_value (scratchbuf + 1, 1, op);
d708bcba 5716 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5717}
5718
5719static void
26ca5450 5720OP_J (int bytemode, int sizeflag)
252b5132 5721{
52b15da3 5722 bfd_vma disp;
7081ff04 5723 bfd_vma mask = -1;
65ca155d 5724 bfd_vma segment = 0;
252b5132
RH		 5725
5726 switch (bytemode)
5727 {
5728 case b_mode:
5729 FETCH_DATA (the_info, codep + 1);
5730 disp = *codep++;
5731 if ((disp & 0x80) != 0)
5732 disp -= 0x100;
5733 break;
5734 case v_mode:
161a04f6 5735 if ((sizeflag & DFLAG) || (rex & REX_W))
52b15da3 5736 disp = get32s ();
252b5132
RH		 5737 else
5738 {
5739 disp = get16 ();
206717e8
L		 5740 if ((disp & 0x8000) != 0)
5741 disp -= 0x10000;
65ca155d
L		 5742 /* In 16bit mode, address is wrapped around at 64k within
5743 the same segment. Otherwise, a data16 prefix on a jump
5744 instruction means that the pc is masked to 16 bits after
5745 the displacement is added! */
5746 mask = 0xffff;
5747 if ((prefixes & PREFIX_DATA) == 0)
5748 segment = ((start_pc + codep - start_codep)
5749 & ~((bfd_vma) 0xffff));
252b5132 5750 }
d807a492 5751 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 5752 break;
5753 default:
5754 oappend (INTERNAL_DISASSEMBLER_ERROR);
5755 return;
5756 }
65ca155d 5757 disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
52b15da3
JH		 5758 set_op (disp, 0);
5759 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 5760 oappend (scratchbuf);
5761}
5762
252b5132 5763static void
ed7841b3 5764OP_SEG (int bytemode, int sizeflag)
252b5132 5765{
ed7841b3 5766 if (bytemode == w_mode)
7967e09e 5767 oappend (names_seg[modrm.reg]);
ed7841b3 5768 else
7967e09e 5769 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
252b5132
RH		 5770}
5771
5772static void
26ca5450 5773OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
252b5132
RH		 5774{
5775 int seg, offset;
5776
c608c12e 5777 if (sizeflag & DFLAG)
252b5132 5778 {
c608c12e
AM		 5779 offset = get32 ();
5780 seg = get16 ();
252b5132 5781 }
c608c12e
AM		 5782 else
5783 {
5784 offset = get16 ();
5785 seg = get16 ();
5786 }
7d421014 5787 used_prefixes |= (prefixes & PREFIX_DATA);
d708bcba 5788 if (intel_syntax)
3f31e633 5789 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
d708bcba
AM		 5790 else
5791 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
c608c12e 5792 oappend (scratchbuf);
252b5132
RH		 5793}
5794
252b5132 5795static void
3f31e633 5796OP_OFF (int bytemode, int sizeflag)
252b5132 5797{
52b15da3 5798 bfd_vma off;
252b5132 5799
3f31e633
JB		 5800 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5801 intel_operand_size (bytemode, sizeflag);
252b5132
RH		 5802 append_seg ();
5803
cb712a9e 5804 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
252b5132
RH		 5805 off = get32 ();
5806 else
5807 off = get16 ();
5808
5809 if (intel_syntax)
5810 {
5811 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 5812 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
252b5132 5813 {
d708bcba 5814 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 5815 oappend (":");
5816 }
5817 }
52b15da3
JH		 5818 print_operand_value (scratchbuf, 1, off);
5819 oappend (scratchbuf);
5820}
6439fc28 5821
52b15da3 5822static void
3f31e633 5823OP_OFF64 (int bytemode, int sizeflag)
52b15da3
JH		 5824{
5825 bfd_vma off;
5826
539e75ad
L		 5827 if (address_mode != mode_64bit
5828 || (prefixes & PREFIX_ADDR))
6439fc28
AM		 5829 {
5830 OP_OFF (bytemode, sizeflag);
5831 return;
5832 }
5833
3f31e633
JB		 5834 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5835 intel_operand_size (bytemode, sizeflag);
52b15da3
JH		 5836 append_seg ();
5837
6608db57 5838 off = get64 ();
52b15da3
JH		 5839
5840 if (intel_syntax)
5841 {
5842 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 5843 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
52b15da3 5844 {
d708bcba 5845 oappend (names_seg[ds_reg - es_reg]);
52b15da3
JH		 5846 oappend (":");
5847 }
5848 }
5849 print_operand_value (scratchbuf, 1, off);
252b5132
RH		 5850 oappend (scratchbuf);
5851}
5852
5853static void
26ca5450 5854ptr_reg (int code, int sizeflag)
252b5132 5855{
2da11e11 5856 const char *s;
d708bcba 5857
1d9f512f 5858 *obufp++ = open_char;
20f0a1fc 5859 used_prefixes |= (prefixes & PREFIX_ADDR);
cb712a9e 5860 if (address_mode == mode_64bit)
c1a64871
JH		 5861 {
5862 if (!(sizeflag & AFLAG))
db6eb5be 5863 s = names32[code - eAX_reg];
c1a64871 5864 else
db6eb5be 5865 s = names64[code - eAX_reg];
c1a64871 5866 }
52b15da3 5867 else if (sizeflag & AFLAG)
252b5132
RH		 5868 s = names32[code - eAX_reg];
5869 else
5870 s = names16[code - eAX_reg];
5871 oappend (s);
1d9f512f
AM		 5872 *obufp++ = close_char;
5873 *obufp = 0;
252b5132
RH		 5874}
5875
5876static void
26ca5450 5877OP_ESreg (int code, int sizeflag)
252b5132 5878{
9306ca4a 5879 if (intel_syntax)
52fd6d94
JB		 5880 {
5881 switch (codep[-1])
5882 {
5883 case 0x6d: /* insw/insl */
5884 intel_operand_size (z_mode, sizeflag);
5885 break;
5886 case 0xa5: /* movsw/movsl/movsq */
5887 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5888 case 0xab: /* stosw/stosl */
5889 case 0xaf: /* scasw/scasl */
5890 intel_operand_size (v_mode, sizeflag);
5891 break;
5892 default:
5893 intel_operand_size (b_mode, sizeflag);
5894 }
5895 }
d708bcba 5896 oappend ("%es:" + intel_syntax);
252b5132
RH		 5897 ptr_reg (code, sizeflag);
5898}
5899
5900static void
26ca5450 5901OP_DSreg (int code, int sizeflag)
252b5132 5902{
9306ca4a 5903 if (intel_syntax)
52fd6d94
JB		 5904 {
5905 switch (codep[-1])
5906 {
5907 case 0x6f: /* outsw/outsl */
5908 intel_operand_size (z_mode, sizeflag);
5909 break;
5910 case 0xa5: /* movsw/movsl/movsq */
5911 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5912 case 0xad: /* lodsw/lodsl/lodsq */
5913 intel_operand_size (v_mode, sizeflag);
5914 break;
5915 default:
5916 intel_operand_size (b_mode, sizeflag);
5917 }
5918 }
252b5132
RH		 5919 if ((prefixes
5920 & (PREFIX_CS
5921 | PREFIX_DS
5922 | PREFIX_SS
5923 | PREFIX_ES
5924 | PREFIX_FS
5925 | PREFIX_GS)) == 0)
5926 prefixes |= PREFIX_DS;
6608db57 5927 append_seg ();
252b5132
RH		 5928 ptr_reg (code, sizeflag);
5929}
5930
252b5132 5931static void
26ca5450 5932OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5933{
52b15da3 5934 int add = 0;
161a04f6 5935 if (rex & REX_R)
c4a530c5 5936 {
161a04f6 5937 USED_REX (REX_R);
c4a530c5
JB		 5938 add = 8;
5939 }
cb712a9e 5940 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
c4a530c5 5941 {
b844680a 5942 lock_prefix = NULL;
c4a530c5
JB		 5943 used_prefixes |= PREFIX_LOCK;
5944 add = 8;
5945 }
7967e09e 5946 sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
d708bcba 5947 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5948}
5949
252b5132 5950static void
26ca5450 5951OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5952{
52b15da3 5953 int add = 0;
161a04f6
L		 5954 USED_REX (REX_R);
5955 if (rex & REX_R)
52b15da3 5956 add = 8;
d708bcba 5957 if (intel_syntax)
7967e09e 5958 sprintf (scratchbuf, "db%d", modrm.reg + add);
d708bcba 5959 else
7967e09e 5960 sprintf (scratchbuf, "%%db%d", modrm.reg + add);
252b5132
RH		 5961 oappend (scratchbuf);
5962}
5963
252b5132 5964static void
26ca5450 5965OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5966{
7967e09e 5967 sprintf (scratchbuf, "%%tr%d", modrm.reg);
d708bcba 5968 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5969}
5970
5971static void
6f74c397 5972OP_R (int bytemode, int sizeflag)
252b5132 5973{
7967e09e 5974 if (modrm.mod == 3)
2da11e11
AM		 5975 OP_E (bytemode, sizeflag);
5976 else
6608db57 5977 BadOp ();
252b5132
RH		 5978}
5979
5980static void
26ca5450 5981OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5982{
041bd2e0
JH		 5983 used_prefixes |= (prefixes & PREFIX_DATA);
5984 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 5985 {
5986 int add = 0;
161a04f6
L		 5987 USED_REX (REX_R);
5988 if (rex & REX_R)
20f0a1fc 5989 add = 8;
7967e09e 5990 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
20f0a1fc 5991 }
041bd2e0 5992 else
7967e09e 5993 sprintf (scratchbuf, "%%mm%d", modrm.reg);
d708bcba 5994 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5995}
5996
c608c12e 5997static void
26ca5450 5998OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e 5999{
041bd2e0 6000 int add = 0;
161a04f6
L		 6001 USED_REX (REX_R);
6002 if (rex & REX_R)
041bd2e0 6003 add = 8;
7967e09e 6004 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
d708bcba 6005 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 6006}
6007
252b5132 6008static void
26ca5450 6009OP_EM (int bytemode, int sizeflag)
252b5132 6010{
7967e09e 6011 if (modrm.mod != 3)
252b5132 6012 {
9306ca4a
JB		 6013 if (intel_syntax && bytemode == v_mode)
6014 {
6015 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
6016 used_prefixes |= (prefixes & PREFIX_DATA);
6017 }
252b5132
RH		 6018 OP_E (bytemode, sizeflag);
6019 return;
6020 }
6021
6608db57 6022 /* Skip mod/rm byte. */
4bba6815 6023 MODRM_CHECK;
252b5132 6024 codep++;
041bd2e0
JH		 6025 used_prefixes |= (prefixes & PREFIX_DATA);
6026 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 6027 {
6028 int add = 0;
6029
161a04f6
L		 6030 USED_REX (REX_B);
6031 if (rex & REX_B)
20f0a1fc 6032 add = 8;
7967e09e 6033 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
20f0a1fc 6034 }
041bd2e0 6035 else
7967e09e 6036 sprintf (scratchbuf, "%%mm%d", modrm.rm);
d708bcba 6037 oappend (scratchbuf + intel_syntax);
252b5132
RH		 6038}
6039
246c51aa
L		 6040/* cvt* are the only instructions in sse2 which have
6041 both SSE and MMX operands and also have 0x66 prefix
6042 in their opcode. 0x66 was originally used to differentiate
6043 between SSE and MMX instruction(operands). So we have to handle the
4d9567e0
MM		 6044 cvt* separately using OP_EMC and OP_MXC */
6045static void
6046OP_EMC (int bytemode, int sizeflag)
6047{
7967e09e 6048 if (modrm.mod != 3)
4d9567e0
MM		 6049 {
6050 if (intel_syntax && bytemode == v_mode)
6051 {
6052 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
6053 used_prefixes |= (prefixes & PREFIX_DATA);
6054 }
6055 OP_E (bytemode, sizeflag);
6056 return;
6057 }
246c51aa 6058
4d9567e0
MM		 6059 /* Skip mod/rm byte. */
6060 MODRM_CHECK;
6061 codep++;
6062 used_prefixes |= (prefixes & PREFIX_DATA);
7967e09e 6063 sprintf (scratchbuf, "%%mm%d", modrm.rm);
4d9567e0
MM		 6064 oappend (scratchbuf + intel_syntax);
6065}
6066
6067static void
6068OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6069{
6070 used_prefixes |= (prefixes & PREFIX_DATA);
7967e09e 6071 sprintf (scratchbuf, "%%mm%d", modrm.reg);
4d9567e0
MM		 6072 oappend (scratchbuf + intel_syntax);
6073}
6074
c608c12e 6075static void
26ca5450 6076OP_EX (int bytemode, int sizeflag)
c608c12e 6077{
041bd2e0 6078 int add = 0;
7967e09e 6079 if (modrm.mod != 3)
c608c12e
AM		 6080 {
6081 OP_E (bytemode, sizeflag);
6082 return;
6083 }
161a04f6
L		 6084 USED_REX (REX_B);
6085 if (rex & REX_B)
041bd2e0 6086 add = 8;
c608c12e 6087
6608db57 6088 /* Skip mod/rm byte. */
4bba6815 6089 MODRM_CHECK;
c608c12e 6090 codep++;
7967e09e 6091 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
d708bcba 6092 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 6093}
6094
252b5132 6095static void
26ca5450 6096OP_MS (int bytemode, int sizeflag)
252b5132 6097{
7967e09e 6098 if (modrm.mod == 3)
2da11e11
AM		 6099 OP_EM (bytemode, sizeflag);
6100 else
6608db57 6101 BadOp ();
252b5132
RH		 6102}
6103
992aaec9 6104static void
26ca5450 6105OP_XS (int bytemode, int sizeflag)
992aaec9 6106{
7967e09e 6107 if (modrm.mod == 3)
992aaec9
AM		 6108 OP_EX (bytemode, sizeflag);
6109 else
6608db57 6110 BadOp ();
992aaec9
AM		 6111}
6112
cc0ec051
AM		 6113static void
6114OP_M (int bytemode, int sizeflag)
6115{
7967e09e 6116 if (modrm.mod == 3)
75413a22
L		 6117 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
6118 BadOp ();
cc0ec051
AM		 6119 else
6120 OP_E (bytemode, sizeflag);
6121}
6122
6123static void
6124OP_0f07 (int bytemode, int sizeflag)
6125{
7967e09e 6126 if (modrm.mod != 3 || modrm.rm != 0)
cc0ec051
AM		 6127 BadOp ();
6128 else
6129 OP_E (bytemode, sizeflag);
6130}
6131
46e883c5 6132/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
246c51aa 6133 32bit mode and "xchg %rax,%rax" in 64bit mode. */
46e883c5 6134
cc0ec051 6135static void
46e883c5 6136NOP_Fixup1 (int bytemode, int sizeflag)
cc0ec051 6137{
8b38ad71
L		 6138 if ((prefixes & PREFIX_DATA) != 0
6139 || (rex != 0
6140 && rex != 0x48
6141 && address_mode == mode_64bit))
46e883c5
L		 6142 OP_REG (bytemode, sizeflag);
6143 else
6144 strcpy (obuf, "nop");
6145}
6146
6147static void
6148NOP_Fixup2 (int bytemode, int sizeflag)
6149{
8b38ad71
L		 6150 if ((prefixes & PREFIX_DATA) != 0
6151 || (rex != 0
6152 && rex != 0x48
6153 && address_mode == mode_64bit))
46e883c5 6154 OP_IMREG (bytemode, sizeflag);
cc0ec051
AM		 6155}
6156
84037f8c 6157static const char *const Suffix3DNow[] = {
252b5132
RH		 6158/* 00 */ NULL, NULL, NULL, NULL,
6159/* 04 */ NULL, NULL, NULL, NULL,
6160/* 08 */ NULL, NULL, NULL, NULL,
9e525108 6161/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
252b5132
RH		 6162/* 10 */ NULL, NULL, NULL, NULL,
6163/* 14 */ NULL, NULL, NULL, NULL,
6164/* 18 */ NULL, NULL, NULL, NULL,
9e525108 6165/* 1C */ "pf2iw", "pf2id", NULL, NULL,
252b5132
RH		 6166/* 20 */ NULL, NULL, NULL, NULL,
6167/* 24 */ NULL, NULL, NULL, NULL,
6168/* 28 */ NULL, NULL, NULL, NULL,
6169/* 2C */ NULL, NULL, NULL, NULL,
6170/* 30 */ NULL, NULL, NULL, NULL,
6171/* 34 */ NULL, NULL, NULL, NULL,
6172/* 38 */ NULL, NULL, NULL, NULL,
6173/* 3C */ NULL, NULL, NULL, NULL,
6174/* 40 */ NULL, NULL, NULL, NULL,
6175/* 44 */ NULL, NULL, NULL, NULL,
6176/* 48 */ NULL, NULL, NULL, NULL,
6177/* 4C */ NULL, NULL, NULL, NULL,
6178/* 50 */ NULL, NULL, NULL, NULL,
6179/* 54 */ NULL, NULL, NULL, NULL,
6180/* 58 */ NULL, NULL, NULL, NULL,
6181/* 5C */ NULL, NULL, NULL, NULL,
6182/* 60 */ NULL, NULL, NULL, NULL,
6183/* 64 */ NULL, NULL, NULL, NULL,
6184/* 68 */ NULL, NULL, NULL, NULL,
6185/* 6C */ NULL, NULL, NULL, NULL,
6186/* 70 */ NULL, NULL, NULL, NULL,
6187/* 74 */ NULL, NULL, NULL, NULL,
6188/* 78 */ NULL, NULL, NULL, NULL,
6189/* 7C */ NULL, NULL, NULL, NULL,
6190/* 80 */ NULL, NULL, NULL, NULL,
6191/* 84 */ NULL, NULL, NULL, NULL,
9e525108
AM		 6192/* 88 */ NULL, NULL, "pfnacc", NULL,
6193/* 8C */ NULL, NULL, "pfpnacc", NULL,
252b5132
RH		 6194/* 90 */ "pfcmpge", NULL, NULL, NULL,
6195/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
6196/* 98 */ NULL, NULL, "pfsub", NULL,
6197/* 9C */ NULL, NULL, "pfadd", NULL,
6198/* A0 */ "pfcmpgt", NULL, NULL, NULL,
6199/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
6200/* A8 */ NULL, NULL, "pfsubr", NULL,
6201/* AC */ NULL, NULL, "pfacc", NULL,
6202/* B0 */ "pfcmpeq", NULL, NULL, NULL,
9beff690 6203/* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw",
9e525108 6204/* B8 */ NULL, NULL, NULL, "pswapd",
252b5132
RH		 6205/* BC */ NULL, NULL, NULL, "pavgusb",
6206/* C0 */ NULL, NULL, NULL, NULL,
6207/* C4 */ NULL, NULL, NULL, NULL,
6208/* C8 */ NULL, NULL, NULL, NULL,
6209/* CC */ NULL, NULL, NULL, NULL,
6210/* D0 */ NULL, NULL, NULL, NULL,
6211/* D4 */ NULL, NULL, NULL, NULL,
6212/* D8 */ NULL, NULL, NULL, NULL,
6213/* DC */ NULL, NULL, NULL, NULL,
6214/* E0 */ NULL, NULL, NULL, NULL,
6215/* E4 */ NULL, NULL, NULL, NULL,
6216/* E8 */ NULL, NULL, NULL, NULL,
6217/* EC */ NULL, NULL, NULL, NULL,
6218/* F0 */ NULL, NULL, NULL, NULL,
6219/* F4 */ NULL, NULL, NULL, NULL,
6220/* F8 */ NULL, NULL, NULL, NULL,
6221/* FC */ NULL, NULL, NULL, NULL,
6222};
6223
6224static void
26ca5450 6225OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 6226{
6227 const char *mnemonic;
6228
6229 FETCH_DATA (the_info, codep + 1);
6230 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6231 place where an 8-bit immediate would normally go. ie. the last
6232 byte of the instruction. */
6608db57 6233 obufp = obuf + strlen (obuf);
c608c12e 6234 mnemonic = Suffix3DNow[*codep++ & 0xff];
252b5132 6235 if (mnemonic)
2da11e11 6236 oappend (mnemonic);
252b5132
RH		 6237 else
6238 {
6239 /* Since a variable sized modrm/sib chunk is between the start
6240 of the opcode (0x0f0f) and the opcode suffix, we need to do
6241 all the modrm processing first, and don't know until now that
6242 we have a bad opcode. This necessitates some cleaning up. */
ce518a5f
L		 6243 op_out[0][0] = '\0';
6244 op_out[1][0] = '\0';
6608db57 6245 BadOp ();
252b5132
RH		 6246 }
6247}
c608c12e 6248
6608db57 6249static const char *simd_cmp_op[] = {
c608c12e
AM		 6250 "eq",
6251 "lt",
6252 "le",
6253 "unord",
6254 "neq",
6255 "nlt",
6256 "nle",
6257 "ord"
6258};
6259
6260static void
26ca5450 6261OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 6262{
6263 unsigned int cmp_type;
6264
6265 FETCH_DATA (the_info, codep + 1);
6608db57 6266 obufp = obuf + strlen (obuf);
c608c12e
AM		 6267 cmp_type = *codep++ & 0xff;
6268 if (cmp_type < 8)
6269 {
041bd2e0
JH		 6270 char suffix1 = 'p', suffix2 = 's';
6271 used_prefixes |= (prefixes & PREFIX_REPZ);
6272 if (prefixes & PREFIX_REPZ)
6273 suffix1 = 's';
6274 else
6275 {
6276 used_prefixes |= (prefixes & PREFIX_DATA);
6277 if (prefixes & PREFIX_DATA)
6278 suffix2 = 'd';
6279 else
6280 {
6281 used_prefixes |= (prefixes & PREFIX_REPNZ);
6282 if (prefixes & PREFIX_REPNZ)
6283 suffix1 = 's', suffix2 = 'd';
6284 }
6285 }
6286 sprintf (scratchbuf, "cmp%s%c%c",
6287 simd_cmp_op[cmp_type], suffix1, suffix2);
7d421014 6288 used_prefixes |= (prefixes & PREFIX_REPZ);
2da11e11 6289 oappend (scratchbuf);
c608c12e
AM		 6290 }
6291 else
6292 {
6293 /* We have a bad extension byte. Clean up. */
ce518a5f
L		 6294 op_out[0][0] = '\0';
6295 op_out[1][0] = '\0';
6608db57 6296 BadOp ();
c608c12e
AM		 6297 }
6298}
6299
ca164297 6300static void
b844680a
L		 6301OP_Mwait (int bytemode ATTRIBUTE_UNUSED,
6302 int sizeflag ATTRIBUTE_UNUSED)
6303{
6304 /* mwait %eax,%ecx */
6305 if (!intel_syntax)
6306 {
6307 const char **names = (address_mode == mode_64bit
6308 ? names64 : names32);
6309 strcpy (op_out[0], names[0]);
6310 strcpy (op_out[1], names[1]);
6311 two_source_ops = 1;
6312 }
6313 /* Skip mod/rm byte. */
6314 MODRM_CHECK;
6315 codep++;
6316}
6317
6318static void
6319OP_Monitor (int bytemode ATTRIBUTE_UNUSED,
6320 int sizeflag ATTRIBUTE_UNUSED)
ca164297 6321{
b844680a
L		 6322 /* monitor %eax,%ecx,%edx" */
6323 if (!intel_syntax)
ca164297 6324 {
b844680a 6325 const char **op1_names;
cb712a9e
L		 6326 const char **names = (address_mode == mode_64bit
6327 ? names64 : names32);
1d9f512f 6328
b844680a
L		 6329 if (!(prefixes & PREFIX_ADDR))
6330 op1_names = (address_mode == mode_16bit
6331 ? names16 : names);
ca164297
L		 6332 else
6333 {
b844680a
L		 6334 /* Remove "addr16/addr32". */
6335 addr_prefix = NULL;
6336 op1_names = (address_mode != mode_32bit
6337 ? names32 : names16);
6338 used_prefixes |= PREFIX_ADDR;
ca164297 6339 }
b844680a
L		 6340 strcpy (op_out[0], op1_names[0]);
6341 strcpy (op_out[1], names[1]);
6342 strcpy (op_out[2], names[2]);
6343 two_source_ops = 1;
ca164297 6344 }
b844680a
L		 6345 /* Skip mod/rm byte. */
6346 MODRM_CHECK;
6347 codep++;
30123838
JB		 6348}
6349
6608db57
KH		 6350static void
6351BadOp (void)
2da11e11 6352{
6608db57
KH		 6353 /* Throw away prefixes and 1st. opcode byte. */
6354 codep = insn_codep + 1;
2da11e11
AM		 6355 oappend ("(bad)");
6356}
4cc91dba 6357
35c52694
L		 6358static void
6359REP_Fixup (int bytemode, int sizeflag)
6360{
6361 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6362 lods and stos. */
35c52694 6363 if (prefixes & PREFIX_REPZ)
b844680a 6364 repz_prefix = "rep ";
35c52694
L		 6365
6366 switch (bytemode)
6367 {
6368 case al_reg:
6369 case eAX_reg:
6370 case indir_dx_reg:
6371 OP_IMREG (bytemode, sizeflag);
6372 break;
6373 case eDI_reg:
6374 OP_ESreg (bytemode, sizeflag);
6375 break;
6376 case eSI_reg:
6377 OP_DSreg (bytemode, sizeflag);
6378 break;
6379 default:
6380 abort ();
6381 break;
6382 }
6383}
f5804c90
L		 6384
6385static void
6386CMPXCHG8B_Fixup (int bytemode, int sizeflag)
6387{
161a04f6
L		 6388 USED_REX (REX_W);
6389 if (rex & REX_W)
f5804c90
L		 6390 {
6391 /* Change cmpxchg8b to cmpxchg16b. */
6392 char *p = obuf + strlen (obuf) - 2;
6393 strcpy (p, "16b");
fb9c77c7 6394 bytemode = o_mode;
f5804c90
L		 6395 }
6396 OP_M (bytemode, sizeflag);
6397}
42903f7f
L		 6398
6399static void
6400XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
6401{
6402 sprintf (scratchbuf, "%%xmm%d", reg);
6403 oappend (scratchbuf + intel_syntax);
6404}
381d071f
L		 6405
6406static void
6407CRC32_Fixup (int bytemode, int sizeflag)
6408{
6409 /* Add proper suffix to "crc32". */
6410 char *p = obuf + strlen (obuf);
6411
6412 switch (bytemode)
6413 {
6414 case b_mode:
20592a94
L		 6415 if (intel_syntax)
6416 break;
6417
381d071f
L		 6418 *p++ = 'b';
6419 break;
6420 case v_mode:
20592a94
L		 6421 if (intel_syntax)
6422 break;
6423
381d071f
L		 6424 USED_REX (REX_W);
6425 if (rex & REX_W)
6426 *p++ = 'q';
9344ff29 6427 else if (sizeflag & DFLAG)
20592a94 6428 *p++ = 'l';
381d071f 6429 else
9344ff29
L		 6430 *p++ = 'w';
6431 used_prefixes |= (prefixes & PREFIX_DATA);
381d071f
L		 6432 break;
6433 default:
6434 oappend (INTERNAL_DISASSEMBLER_ERROR);
6435 break;
6436 }
6437 *p = '\0';
6438
6439 if (modrm.mod == 3)
6440 {
6441 int add;
6442
6443 /* Skip mod/rm byte. */
6444 MODRM_CHECK;
6445 codep++;
6446
6447 USED_REX (REX_B);
6448 add = (rex & REX_B) ? 8 : 0;
6449 if (bytemode == b_mode)
6450 {
6451 USED_REX (0);
6452 if (rex)
6453 oappend (names8rex[modrm.rm + add]);
6454 else
6455 oappend (names8[modrm.rm + add]);
6456 }
6457 else
6458 {
6459 USED_REX (REX_W);
6460 if (rex & REX_W)
6461 oappend (names64[modrm.rm + add]);
6462 else if ((prefixes & PREFIX_DATA))
6463 oappend (names16[modrm.rm + add]);
6464 else
6465 oappend (names32[modrm.rm + add]);
6466 }
6467 }
6468 else
9344ff29 6469 OP_E (bytemode, sizeflag);
381d071f 6470}
GDB Binutils - Deliverables
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