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Opps - forgot to include change to Makefile.am in the ChangeLog entry
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
CommitLineData
252b5132 1/* Print i386 instructions for GDB, the GNU debugger.
060d22b0 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
0112cd26 3 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
252b5132 4
20f0a1fc
NC		 5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
f4321104 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20f0a1fc
NC		 20
21/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
26
27/* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
252b5132
RH		 33
34#include "dis-asm.h"
35#include "sysdep.h"
36#include "opintl.h"
0b1cf022 37#include "opcode/i386.h"
252b5132
RH		 38
39#include <setjmp.h>
40
26ca5450
AJ		 41static int fetch_data (struct disassemble_info *, bfd_byte *);
42static void ckprefix (void);
43static const char *prefix_name (int, int);
44static int print_insn (bfd_vma, disassemble_info *);
45static void dofloat (int);
46static void OP_ST (int, int);
47static void OP_STi (int, int);
48static int putop (const char *, int);
49static void oappend (const char *);
50static void append_seg (void);
51static void OP_indirE (int, int);
52static void print_operand_value (char *, int, bfd_vma);
5d669648 53static void print_displacement (char *, bfd_vma);
26ca5450
AJ		 54static void OP_E (int, int);
55static void OP_G (int, int);
56static bfd_vma get64 (void);
57static bfd_signed_vma get32 (void);
58static bfd_signed_vma get32s (void);
59static int get16 (void);
60static void set_op (bfd_vma, int);
61static void OP_REG (int, int);
62static void OP_IMREG (int, int);
63static void OP_I (int, int);
64static void OP_I64 (int, int);
65static void OP_sI (int, int);
66static void OP_J (int, int);
67static void OP_SEG (int, int);
68static void OP_DIR (int, int);
69static void OP_OFF (int, int);
70static void OP_OFF64 (int, int);
71static void ptr_reg (int, int);
72static void OP_ESreg (int, int);
73static void OP_DSreg (int, int);
74static void OP_C (int, int);
75static void OP_D (int, int);
76static void OP_T (int, int);
6f74c397 77static void OP_R (int, int);
26ca5450
AJ		 78static void OP_MMX (int, int);
79static void OP_XMM (int, int);
80static void OP_EM (int, int);
81static void OP_EX (int, int);
4d9567e0
MM		 82static void OP_EMC (int,int);
83static void OP_MXC (int,int);
26ca5450
AJ		 84static void OP_MS (int, int);
85static void OP_XS (int, int);
cc0ec051 86static void OP_M (int, int);
90700ea2 87static void OP_VMX (int, int);
cc0ec051
AM		 88static void OP_0fae (int, int);
89static void OP_0f07 (int, int);
46e883c5
L		 90static void NOP_Fixup1 (int, int);
91static void NOP_Fixup2 (int, int);
26ca5450
AJ		 92static void OP_3DNowSuffix (int, int);
93static void OP_SIMD_Suffix (int, int);
94static void SIMD_Fixup (int, int);
95static void PNI_Fixup (int, int);
30123838 96static void SVME_Fixup (int, int);
4fd61dcb 97static void INVLPG_Fixup (int, int);
26ca5450 98static void BadOp (void);
90700ea2 99static void VMX_Fixup (int, int);
35c52694 100static void REP_Fixup (int, int);
f5804c90 101static void CMPXCHG8B_Fixup (int, int);
42903f7f 102static void XMM_Fixup (int, int);
381d071f 103static void CRC32_Fixup (int, int);
252b5132 104
6608db57 105struct dis_private {
252b5132
RH		 106 /* Points to first byte not fetched. */
107 bfd_byte *max_fetched;
0b1cf022 108 bfd_byte the_buffer[MAX_MNEM_SIZE];
252b5132 109 bfd_vma insn_start;
e396998b 110 int orig_sizeflag;
252b5132
RH		 111 jmp_buf bailout;
112};
113
cb712a9e
L		 114enum address_mode
115{
116 mode_16bit,
117 mode_32bit,
118 mode_64bit
119};
120
121enum address_mode address_mode;
52b15da3 122
5076851f
ILT		 123/* Flags for the prefixes for the current instruction. See below. */
124static int prefixes;
125
52b15da3
JH		 126/* REX prefix the current instruction. See below. */
127static int rex;
128/* Bits of REX we've already used. */
129static int rex_used;
52b15da3
JH		 130/* Mark parts used in the REX prefix. When we are testing for
131 empty prefix (for 8bit register REX extension), just mask it
132 out. Otherwise test for REX bit is excuse for existence of REX
133 only in case value is nonzero. */
134#define USED_REX(value) \
135 { \
136 if (value) \
161a04f6
L		 137 { \
138 if ((rex & value)) \
139 rex_used |= (value) | REX_OPCODE; \
140 } \
52b15da3 141 else \
161a04f6 142 rex_used |= REX_OPCODE; \
52b15da3
JH		 143 }
144
7d421014
ILT		 145/* Flags for prefixes which we somehow handled when printing the
146 current instruction. */
147static int used_prefixes;
148
5076851f
ILT		 149/* Flags stored in PREFIXES. */
150#define PREFIX_REPZ 1
151#define PREFIX_REPNZ 2
152#define PREFIX_LOCK 4
153#define PREFIX_CS 8
154#define PREFIX_SS 0x10
155#define PREFIX_DS 0x20
156#define PREFIX_ES 0x40
157#define PREFIX_FS 0x80
158#define PREFIX_GS 0x100
159#define PREFIX_DATA 0x200
160#define PREFIX_ADDR 0x400
161#define PREFIX_FWAIT 0x800
162
252b5132
RH		 163/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
164 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
165 on error. */
166#define FETCH_DATA(info, addr) \
6608db57 167 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
252b5132
RH		 168 ? 1 : fetch_data ((info), (addr)))
169
170static int
26ca5450 171fetch_data (struct disassemble_info *info, bfd_byte *addr)
252b5132
RH		 172{
173 int status;
6608db57 174 struct dis_private *priv = (struct dis_private *) info->private_data;
252b5132
RH		 175 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
176
0b1cf022 177 if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
272c9217
JB		 178 status = (*info->read_memory_func) (start,
179 priv->max_fetched,
180 addr - priv->max_fetched,
181 info);
182 else
183 status = -1;
252b5132
RH		 184 if (status != 0)
185 {
7d421014 186 /* If we did manage to read at least one byte, then
db6eb5be
AM		 187 print_insn_i386 will do something sensible. Otherwise, print
188 an error. We do that here because this is where we know
189 STATUS. */
7d421014 190 if (priv->max_fetched == priv->the_buffer)
5076851f 191 (*info->memory_error_func) (status, start, info);
252b5132
RH		 192 longjmp (priv->bailout, 1);
193 }
194 else
195 priv->max_fetched = addr;
196 return 1;
197}
198
ce518a5f
L		 199#define XX { NULL, 0 }
200
201#define Eb { OP_E, b_mode }
202#define Ev { OP_E, v_mode }
203#define Ed { OP_E, d_mode }
204#define Edq { OP_E, dq_mode }
205#define Edqw { OP_E, dqw_mode }
42903f7f
L		 206#define Edqb { OP_E, dqb_mode }
207#define Edqd { OP_E, dqd_mode }
ce518a5f
L		 208#define indirEv { OP_indirE, stack_v_mode }
209#define indirEp { OP_indirE, f_mode }
210#define stackEv { OP_E, stack_v_mode }
211#define Em { OP_E, m_mode }
212#define Ew { OP_E, w_mode }
213#define M { OP_M, 0 } /* lea, lgdt, etc. */
214#define Ma { OP_M, v_mode }
215#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
216#define Mq { OP_M, q_mode }
217#define Gb { OP_G, b_mode }
218#define Gv { OP_G, v_mode }
219#define Gd { OP_G, d_mode }
220#define Gdq { OP_G, dq_mode }
221#define Gm { OP_G, m_mode }
222#define Gw { OP_G, w_mode }
6f74c397
L		 223#define Rd { OP_R, d_mode }
224#define Rm { OP_R, m_mode }
ce518a5f
L		 225#define Ib { OP_I, b_mode }
226#define sIb { OP_sI, b_mode } /* sign extened byte */
227#define Iv { OP_I, v_mode }
228#define Iq { OP_I, q_mode }
229#define Iv64 { OP_I64, v_mode }
230#define Iw { OP_I, w_mode }
231#define I1 { OP_I, const_1_mode }
232#define Jb { OP_J, b_mode }
233#define Jv { OP_J, v_mode }
234#define Cm { OP_C, m_mode }
235#define Dm { OP_D, m_mode }
236#define Td { OP_T, d_mode }
237
238#define RMeAX { OP_REG, eAX_reg }
239#define RMeBX { OP_REG, eBX_reg }
240#define RMeCX { OP_REG, eCX_reg }
241#define RMeDX { OP_REG, eDX_reg }
242#define RMeSP { OP_REG, eSP_reg }
243#define RMeBP { OP_REG, eBP_reg }
244#define RMeSI { OP_REG, eSI_reg }
245#define RMeDI { OP_REG, eDI_reg }
246#define RMrAX { OP_REG, rAX_reg }
247#define RMrBX { OP_REG, rBX_reg }
248#define RMrCX { OP_REG, rCX_reg }
249#define RMrDX { OP_REG, rDX_reg }
250#define RMrSP { OP_REG, rSP_reg }
251#define RMrBP { OP_REG, rBP_reg }
252#define RMrSI { OP_REG, rSI_reg }
253#define RMrDI { OP_REG, rDI_reg }
254#define RMAL { OP_REG, al_reg }
255#define RMAL { OP_REG, al_reg }
256#define RMCL { OP_REG, cl_reg }
257#define RMDL { OP_REG, dl_reg }
258#define RMBL { OP_REG, bl_reg }
259#define RMAH { OP_REG, ah_reg }
260#define RMCH { OP_REG, ch_reg }
261#define RMDH { OP_REG, dh_reg }
262#define RMBH { OP_REG, bh_reg }
263#define RMAX { OP_REG, ax_reg }
264#define RMDX { OP_REG, dx_reg }
265
266#define eAX { OP_IMREG, eAX_reg }
267#define eBX { OP_IMREG, eBX_reg }
268#define eCX { OP_IMREG, eCX_reg }
269#define eDX { OP_IMREG, eDX_reg }
270#define eSP { OP_IMREG, eSP_reg }
271#define eBP { OP_IMREG, eBP_reg }
272#define eSI { OP_IMREG, eSI_reg }
273#define eDI { OP_IMREG, eDI_reg }
274#define AL { OP_IMREG, al_reg }
275#define CL { OP_IMREG, cl_reg }
276#define DL { OP_IMREG, dl_reg }
277#define BL { OP_IMREG, bl_reg }
278#define AH { OP_IMREG, ah_reg }
279#define CH { OP_IMREG, ch_reg }
280#define DH { OP_IMREG, dh_reg }
281#define BH { OP_IMREG, bh_reg }
282#define AX { OP_IMREG, ax_reg }
283#define DX { OP_IMREG, dx_reg }
284#define zAX { OP_IMREG, z_mode_ax_reg }
285#define indirDX { OP_IMREG, indir_dx_reg }
286
287#define Sw { OP_SEG, w_mode }
288#define Sv { OP_SEG, v_mode }
289#define Ap { OP_DIR, 0 }
290#define Ob { OP_OFF64, b_mode }
291#define Ov { OP_OFF64, v_mode }
292#define Xb { OP_DSreg, eSI_reg }
293#define Xv { OP_DSreg, eSI_reg }
294#define Xz { OP_DSreg, eSI_reg }
295#define Yb { OP_ESreg, eDI_reg }
296#define Yv { OP_ESreg, eDI_reg }
297#define DSBX { OP_DSreg, eBX_reg }
298
299#define es { OP_REG, es_reg }
300#define ss { OP_REG, ss_reg }
301#define cs { OP_REG, cs_reg }
302#define ds { OP_REG, ds_reg }
303#define fs { OP_REG, fs_reg }
304#define gs { OP_REG, gs_reg }
305
306#define MX { OP_MMX, 0 }
307#define XM { OP_XMM, 0 }
308#define EM { OP_EM, v_mode }
09a2c6cf
L		 309#define EMd { OP_EM, d_mode }
310#define EMq { OP_EM, q_mode }
311#define EXd { OP_EX, d_mode }
312#define EXq { OP_EX, q_mode }
313#define EXx { OP_EX, x_mode }
ce518a5f
L		 314#define MS { OP_MS, v_mode }
315#define XS { OP_XS, v_mode }
316#define EMC { OP_EMC, v_mode }
317#define MXC { OP_MXC, 0 }
318#define VM { OP_VMX, q_mode }
319#define OPSUF { OP_3DNowSuffix, 0 }
320#define OPSIMD { OP_SIMD_Suffix, 0 }
42903f7f 321#define XMM0 { XMM_Fixup, 0 }
252b5132 322
35c52694 323/* Used handle "rep" prefix for string instructions. */
ce518a5f
L		 324#define Xbr { REP_Fixup, eSI_reg }
325#define Xvr { REP_Fixup, eSI_reg }
326#define Ybr { REP_Fixup, eDI_reg }
327#define Yvr { REP_Fixup, eDI_reg }
328#define Yzr { REP_Fixup, eDI_reg }
329#define indirDXr { REP_Fixup, indir_dx_reg }
330#define ALr { REP_Fixup, al_reg }
331#define eAXr { REP_Fixup, eAX_reg }
332
333#define cond_jump_flag { NULL, cond_jump_mode }
334#define loop_jcxz_flag { NULL, loop_jcxz_mode }
3ffd33cf 335
252b5132 336/* bits in sizeflag */
252b5132 337#define SUFFIX_ALWAYS 4
252b5132
RH		 338#define AFLAG 2
339#define DFLAG 1
340
52b15da3
JH		 341#define b_mode 1 /* byte operand */
342#define v_mode 2 /* operand size depends on prefixes */
343#define w_mode 3 /* word operand */
344#define d_mode 4 /* double word operand */
345#define q_mode 5 /* quad word operand */
9306ca4a
JB		 346#define t_mode 6 /* ten-byte operand */
347#define x_mode 7 /* 16-byte XMM operand */
348#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
349#define cond_jump_mode 9
350#define loop_jcxz_mode 10
351#define dq_mode 11 /* operand size depends on REX prefixes. */
352#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
353#define f_mode 13 /* 4- or 6-byte pointer operand */
354#define const_1_mode 14
1a114b12 355#define stack_v_mode 15 /* v_mode for stack-related opcodes. */
52fd6d94 356#define z_mode 16 /* non-quad operand size depends on prefixes */
fb9c77c7 357#define o_mode 17 /* 16-byte operand */
42903f7f
L		 358#define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
359#define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
252b5132
RH		 360
361#define es_reg 100
362#define cs_reg 101
363#define ss_reg 102
364#define ds_reg 103
365#define fs_reg 104
366#define gs_reg 105
252b5132 367
c608c12e
AM		 368#define eAX_reg 108
369#define eCX_reg 109
370#define eDX_reg 110
371#define eBX_reg 111
372#define eSP_reg 112
373#define eBP_reg 113
374#define eSI_reg 114
375#define eDI_reg 115
252b5132
RH		 376
377#define al_reg 116
378#define cl_reg 117
379#define dl_reg 118
380#define bl_reg 119
381#define ah_reg 120
382#define ch_reg 121
383#define dh_reg 122
384#define bh_reg 123
385
386#define ax_reg 124
387#define cx_reg 125
388#define dx_reg 126
389#define bx_reg 127
390#define sp_reg 128
391#define bp_reg 129
392#define si_reg 130
393#define di_reg 131
394
52b15da3
JH		 395#define rAX_reg 132
396#define rCX_reg 133
397#define rDX_reg 134
398#define rBX_reg 135
399#define rSP_reg 136
400#define rBP_reg 137
401#define rSI_reg 138
402#define rDI_reg 139
403
52fd6d94 404#define z_mode_ax_reg 149
252b5132
RH		 405#define indir_dx_reg 150
406
6439fc28
AM		 407#define FLOATCODE 1
408#define USE_GROUPS 2
409#define USE_PREFIX_USER_TABLE 3
410#define X86_64_SPECIAL 4
331d2d0d 411#define IS_3BYTE_OPCODE 5
6439fc28 412
4efba78c
L		 413#define FLOAT NULL, { { NULL, FLOATCODE } }
414
7967e09e
L		 415#define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
416#define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
417#define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
418#define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
419#define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
420#define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
421#define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
422#define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
423#define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
424#define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
425#define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
426#define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
427#define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
428#define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
429#define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
430#define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
431#define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
432#define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
433#define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
434#define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
435#define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
436#define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
437#define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
438#define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
439#define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
440#define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
441#define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
442#define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
4efba78c
L		 443
444#define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
445#define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
446#define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
447#define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
448#define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
449#define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
450#define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
451#define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
452#define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
453#define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
454#define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
455#define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
456#define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
457#define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
458#define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
459#define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
460#define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
461#define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
462#define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
463#define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
464#define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
465#define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
466#define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
467#define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
468#define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
469#define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
470#define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
471#define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
472#define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
473#define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
474#define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
475#define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
476#define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
477#define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
478#define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
479#define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
480#define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
481#define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
8b38ad71 482#define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
42903f7f
L		 483#define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
484#define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
485#define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
486#define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
487#define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
488#define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
489#define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
490#define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
491#define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
492#define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
493#define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
494#define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
495#define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
496#define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
497#define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
498#define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
499#define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
500#define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
501#define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
502#define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
503#define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
504#define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
505#define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
506#define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
507#define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
508#define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
509#define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
510#define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
511#define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
512#define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
513#define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
514#define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
515#define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
516#define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
517#define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
518#define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
519#define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
520#define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
521#define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
522#define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
523#define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
524#define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
525#define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
526#define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
527#define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
528#define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
529#define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
381d071f
L		 530#define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
531#define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
532#define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
533#define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
534#define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
535#define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
536#define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
09a2c6cf
L		 537#define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
538#define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
539#define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
540#define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
541#define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
4efba78c
L		 542
543
544#define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
545#define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
546#define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
547#define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
548
549#define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
550#define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
331d2d0d 551
26ca5450 552typedef void (*op_rtn) (int bytemode, int sizeflag);
252b5132
RH		 553
554struct dis386 {
2da11e11 555 const char *name;
ce518a5f
L		 556 struct
557 {
558 op_rtn rtn;
559 int bytemode;
560 } op[MAX_OPERANDS];
252b5132
RH		 561};
562
563/* Upper case letters in the instruction names here are macros.
564 'A' => print 'b' if no register operands or suffix_always is true
565 'B' => print 'b' if suffix_always is true
9306ca4a
JB		 566 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
567 . size prefix
ed7841b3
JB		 568 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
569 . suffix_always is true
252b5132 570 'E' => print 'e' if 32-bit form of jcxz
3ffd33cf 571 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
52fd6d94 572 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
5dd0794d 573 'H' => print ",pt" or ",pn" branch hint
9306ca4a
JB		 574 'I' => honor following macro letter even in Intel mode (implemented only
575 . for some of the macro letters)
576 'J' => print 'l'
42903f7f 577 'K' => print 'd' or 'q' if rex prefix is present.
252b5132
RH		 578 'L' => print 'l' if suffix_always is true
579 'N' => print 'n' if instruction has no wait "prefix"
a35ca55a 580 'O' => print 'd' or 'o' (or 'q' in Intel mode)
52b15da3 581 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
e396998b
AM		 582 . or suffix_always is true. print 'q' if rex prefix is present.
583 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
584 . is true
a35ca55a 585 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
52b15da3 586 'S' => print 'w', 'l' or 'q' if suffix_always is true
6439fc28
AM		 587 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
588 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
1a114b12 589 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
a35ca55a 590 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
9306ca4a 591 'X' => print 's', 'd' depending on data16 prefix (for XMM)
76f227a5 592 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
6dd5059a 593 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
52b15da3 594
6439fc28
AM		 595 Many of the above letters print nothing in Intel mode. See "putop"
596 for the details.
52b15da3 597
6439fc28
AM		 598 Braces '{' and '}', and vertical bars '|', indicate alternative
599 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
600 modes. In cases where there are only two alternatives, the X86_64
601 instruction is reserved, and "(bad)" is printed.
602*/
252b5132 603
6439fc28 604static const struct dis386 dis386[] = {
252b5132 605 /* 00 */
ce518a5f
L		 606 { "addB", { Eb, Gb } },
607 { "addS", { Ev, Gv } },
608 { "addB", { Gb, Eb } },
609 { "addS", { Gv, Ev } },
610 { "addB", { AL, Ib } },
611 { "addS", { eAX, Iv } },
612 { "push{T|}", { es } },
613 { "pop{T|}", { es } },
252b5132 614 /* 08 */
ce518a5f
L		 615 { "orB", { Eb, Gb } },
616 { "orS", { Ev, Gv } },
617 { "orB", { Gb, Eb } },
618 { "orS", { Gv, Ev } },
619 { "orB", { AL, Ib } },
620 { "orS", { eAX, Iv } },
621 { "push{T|}", { cs } },
622 { "(bad)", { XX } }, /* 0x0f extended opcode escape */
252b5132 623 /* 10 */
ce518a5f
L		 624 { "adcB", { Eb, Gb } },
625 { "adcS", { Ev, Gv } },
626 { "adcB", { Gb, Eb } },
627 { "adcS", { Gv, Ev } },
628 { "adcB", { AL, Ib } },
629 { "adcS", { eAX, Iv } },
630 { "push{T|}", { ss } },
631 { "pop{T|}", { ss } },
252b5132 632 /* 18 */
ce518a5f
L		 633 { "sbbB", { Eb, Gb } },
634 { "sbbS", { Ev, Gv } },
635 { "sbbB", { Gb, Eb } },
636 { "sbbS", { Gv, Ev } },
637 { "sbbB", { AL, Ib } },
638 { "sbbS", { eAX, Iv } },
639 { "push{T|}", { ds } },
640 { "pop{T|}", { ds } },
252b5132 641 /* 20 */
ce518a5f
L		 642 { "andB", { Eb, Gb } },
643 { "andS", { Ev, Gv } },
644 { "andB", { Gb, Eb } },
645 { "andS", { Gv, Ev } },
646 { "andB", { AL, Ib } },
647 { "andS", { eAX, Iv } },
648 { "(bad)", { XX } }, /* SEG ES prefix */
649 { "daa{|}", { XX } },
252b5132 650 /* 28 */
ce518a5f
L		 651 { "subB", { Eb, Gb } },
652 { "subS", { Ev, Gv } },
653 { "subB", { Gb, Eb } },
654 { "subS", { Gv, Ev } },
655 { "subB", { AL, Ib } },
656 { "subS", { eAX, Iv } },
657 { "(bad)", { XX } }, /* SEG CS prefix */
658 { "das{|}", { XX } },
252b5132 659 /* 30 */
ce518a5f
L		 660 { "xorB", { Eb, Gb } },
661 { "xorS", { Ev, Gv } },
662 { "xorB", { Gb, Eb } },
663 { "xorS", { Gv, Ev } },
664 { "xorB", { AL, Ib } },
665 { "xorS", { eAX, Iv } },
666 { "(bad)", { XX } }, /* SEG SS prefix */
667 { "aaa{|}", { XX } },
252b5132 668 /* 38 */
ce518a5f
L		 669 { "cmpB", { Eb, Gb } },
670 { "cmpS", { Ev, Gv } },
671 { "cmpB", { Gb, Eb } },
672 { "cmpS", { Gv, Ev } },
673 { "cmpB", { AL, Ib } },
674 { "cmpS", { eAX, Iv } },
675 { "(bad)", { XX } }, /* SEG DS prefix */
676 { "aas{|}", { XX } },
252b5132 677 /* 40 */
ce518a5f
L		 678 { "inc{S|}", { RMeAX } },
679 { "inc{S|}", { RMeCX } },
680 { "inc{S|}", { RMeDX } },
681 { "inc{S|}", { RMeBX } },
682 { "inc{S|}", { RMeSP } },
683 { "inc{S|}", { RMeBP } },
684 { "inc{S|}", { RMeSI } },
685 { "inc{S|}", { RMeDI } },
252b5132 686 /* 48 */
ce518a5f
L		 687 { "dec{S|}", { RMeAX } },
688 { "dec{S|}", { RMeCX } },
689 { "dec{S|}", { RMeDX } },
690 { "dec{S|}", { RMeBX } },
691 { "dec{S|}", { RMeSP } },
692 { "dec{S|}", { RMeBP } },
693 { "dec{S|}", { RMeSI } },
694 { "dec{S|}", { RMeDI } },
252b5132 695 /* 50 */
ce518a5f
L		 696 { "pushV", { RMrAX } },
697 { "pushV", { RMrCX } },
698 { "pushV", { RMrDX } },
699 { "pushV", { RMrBX } },
700 { "pushV", { RMrSP } },
701 { "pushV", { RMrBP } },
702 { "pushV", { RMrSI } },
703 { "pushV", { RMrDI } },
252b5132 704 /* 58 */
ce518a5f
L		 705 { "popV", { RMrAX } },
706 { "popV", { RMrCX } },
707 { "popV", { RMrDX } },
708 { "popV", { RMrBX } },
709 { "popV", { RMrSP } },
710 { "popV", { RMrBP } },
711 { "popV", { RMrSI } },
712 { "popV", { RMrDI } },
252b5132 713 /* 60 */
6439fc28 714 { X86_64_0 },
5f754f58
L		 715 { X86_64_1 },
716 { X86_64_2 },
717 { X86_64_3 },
ce518a5f
L		 718 { "(bad)", { XX } }, /* seg fs */
719 { "(bad)", { XX } }, /* seg gs */
720 { "(bad)", { XX } }, /* op size prefix */
721 { "(bad)", { XX } }, /* adr size prefix */
252b5132 722 /* 68 */
ce518a5f
L		 723 { "pushT", { Iq } },
724 { "imulS", { Gv, Ev, Iv } },
725 { "pushT", { sIb } },
726 { "imulS", { Gv, Ev, sIb } },
727 { "ins{b||b|}", { Ybr, indirDX } },
728 { "ins{R||G|}", { Yzr, indirDX } },
729 { "outs{b||b|}", { indirDXr, Xb } },
730 { "outs{R||G|}", { indirDXr, Xz } },
252b5132 731 /* 70 */
ce518a5f
L		 732 { "joH", { Jb, XX, cond_jump_flag } },
733 { "jnoH", { Jb, XX, cond_jump_flag } },
734 { "jbH", { Jb, XX, cond_jump_flag } },
735 { "jaeH", { Jb, XX, cond_jump_flag } },
736 { "jeH", { Jb, XX, cond_jump_flag } },
737 { "jneH", { Jb, XX, cond_jump_flag } },
738 { "jbeH", { Jb, XX, cond_jump_flag } },
739 { "jaH", { Jb, XX, cond_jump_flag } },
252b5132 740 /* 78 */
ce518a5f
L		 741 { "jsH", { Jb, XX, cond_jump_flag } },
742 { "jnsH", { Jb, XX, cond_jump_flag } },
743 { "jpH", { Jb, XX, cond_jump_flag } },
744 { "jnpH", { Jb, XX, cond_jump_flag } },
745 { "jlH", { Jb, XX, cond_jump_flag } },
746 { "jgeH", { Jb, XX, cond_jump_flag } },
747 { "jleH", { Jb, XX, cond_jump_flag } },
748 { "jgH", { Jb, XX, cond_jump_flag } },
252b5132
RH		 749 /* 80 */
750 { GRP1b },
751 { GRP1S },
ce518a5f 752 { "(bad)", { XX } },
252b5132 753 { GRP1Ss },
ce518a5f
L		 754 { "testB", { Eb, Gb } },
755 { "testS", { Ev, Gv } },
756 { "xchgB", { Eb, Gb } },
757 { "xchgS", { Ev, Gv } },
252b5132 758 /* 88 */
ce518a5f
L		 759 { "movB", { Eb, Gb } },
760 { "movS", { Ev, Gv } },
761 { "movB", { Gb, Eb } },
762 { "movS", { Gv, Ev } },
763 { "movD", { Sv, Sw } },
764 { "leaS", { Gv, M } },
765 { "movD", { Sw, Sv } },
7967e09e 766 { GRP1a },
252b5132 767 /* 90 */
8b38ad71 768 { PREGRP38 },
ce518a5f
L		 769 { "xchgS", { RMeCX, eAX } },
770 { "xchgS", { RMeDX, eAX } },
771 { "xchgS", { RMeBX, eAX } },
772 { "xchgS", { RMeSP, eAX } },
773 { "xchgS", { RMeBP, eAX } },
774 { "xchgS", { RMeSI, eAX } },
775 { "xchgS", { RMeDI, eAX } },
252b5132 776 /* 98 */
ce518a5f
L		 777 { "cW{t||t|}R", { XX } },
778 { "cR{t||t|}O", { XX } },
779 { "Jcall{T|}", { Ap } },
780 { "(bad)", { XX } }, /* fwait */
781 { "pushfT", { XX } },
782 { "popfT", { XX } },
783 { "sahf{|}", { XX } },
784 { "lahf{|}", { XX } },
252b5132 785 /* a0 */
ce518a5f
L		 786 { "movB", { AL, Ob } },
787 { "movS", { eAX, Ov } },
788 { "movB", { Ob, AL } },
789 { "movS", { Ov, eAX } },
790 { "movs{b||b|}", { Ybr, Xb } },
791 { "movs{R||R|}", { Yvr, Xv } },
792 { "cmps{b||b|}", { Xb, Yb } },
793 { "cmps{R||R|}", { Xv, Yv } },
252b5132 794 /* a8 */
ce518a5f
L		 795 { "testB", { AL, Ib } },
796 { "testS", { eAX, Iv } },
797 { "stosB", { Ybr, AL } },
798 { "stosS", { Yvr, eAX } },
799 { "lodsB", { ALr, Xb } },
800 { "lodsS", { eAXr, Xv } },
801 { "scasB", { AL, Yb } },
802 { "scasS", { eAX, Yv } },
252b5132 803 /* b0 */
ce518a5f
L		 804 { "movB", { RMAL, Ib } },
805 { "movB", { RMCL, Ib } },
806 { "movB", { RMDL, Ib } },
807 { "movB", { RMBL, Ib } },
808 { "movB", { RMAH, Ib } },
809 { "movB", { RMCH, Ib } },
810 { "movB", { RMDH, Ib } },
811 { "movB", { RMBH, Ib } },
252b5132 812 /* b8 */
ce518a5f
L		 813 { "movS", { RMeAX, Iv64 } },
814 { "movS", { RMeCX, Iv64 } },
815 { "movS", { RMeDX, Iv64 } },
816 { "movS", { RMeBX, Iv64 } },
817 { "movS", { RMeSP, Iv64 } },
818 { "movS", { RMeBP, Iv64 } },
819 { "movS", { RMeSI, Iv64 } },
820 { "movS", { RMeDI, Iv64 } },
252b5132
RH		 821 /* c0 */
822 { GRP2b },
823 { GRP2S },
ce518a5f
L		 824 { "retT", { Iw } },
825 { "retT", { XX } },
826 { "les{S|}", { Gv, Mp } },
827 { "ldsS", { Gv, Mp } },
a6bd098c
L		 828 { GRP11_C6 },
829 { GRP11_C7 },
252b5132 830 /* c8 */
ce518a5f
L		 831 { "enterT", { Iw, Ib } },
832 { "leaveT", { XX } },
833 { "lretP", { Iw } },
834 { "lretP", { XX } },
835 { "int3", { XX } },
836 { "int", { Ib } },
837 { "into{|}", { XX } },
838 { "iretP", { XX } },
252b5132
RH		 839 /* d0 */
840 { GRP2b_one },
841 { GRP2S_one },
842 { GRP2b_cl },
843 { GRP2S_cl },
ce518a5f
L		 844 { "aam{|}", { sIb } },
845 { "aad{|}", { sIb } },
846 { "(bad)", { XX } },
847 { "xlat", { DSBX } },
252b5132
RH		 848 /* d8 */
849 { FLOAT },
850 { FLOAT },
851 { FLOAT },
852 { FLOAT },
853 { FLOAT },
854 { FLOAT },
855 { FLOAT },
856 { FLOAT },
857 /* e0 */
ce518a5f
L		 858 { "loopneFH", { Jb, XX, loop_jcxz_flag } },
859 { "loopeFH", { Jb, XX, loop_jcxz_flag } },
860 { "loopFH", { Jb, XX, loop_jcxz_flag } },
861 { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
862 { "inB", { AL, Ib } },
863 { "inG", { zAX, Ib } },
864 { "outB", { Ib, AL } },
865 { "outG", { Ib, zAX } },
252b5132 866 /* e8 */
ce518a5f
L		 867 { "callT", { Jv } },
868 { "jmpT", { Jv } },
869 { "Jjmp{T|}", { Ap } },
870 { "jmp", { Jb } },
871 { "inB", { AL, indirDX } },
872 { "inG", { zAX, indirDX } },
873 { "outB", { indirDX, AL } },
874 { "outG", { indirDX, zAX } },
252b5132 875 /* f0 */
ce518a5f
L		 876 { "(bad)", { XX } }, /* lock prefix */
877 { "icebp", { XX } },
878 { "(bad)", { XX } }, /* repne */
879 { "(bad)", { XX } }, /* repz */
880 { "hlt", { XX } },
881 { "cmc", { XX } },
252b5132
RH		 882 { GRP3b },
883 { GRP3S },
884 /* f8 */
ce518a5f
L		 885 { "clc", { XX } },
886 { "stc", { XX } },
887 { "cli", { XX } },
888 { "sti", { XX } },
889 { "cld", { XX } },
890 { "std", { XX } },
252b5132
RH		 891 { GRP4 },
892 { GRP5 },
893};
894
6439fc28 895static const struct dis386 dis386_twobyte[] = {
252b5132
RH		 896 /* 00 */
897 { GRP6 },
898 { GRP7 },
ce518a5f
L		 899 { "larS", { Gv, Ew } },
900 { "lslS", { Gv, Ew } },
901 { "(bad)", { XX } },
902 { "syscall", { XX } },
903 { "clts", { XX } },
904 { "sysretP", { XX } },
252b5132 905 /* 08 */
ce518a5f
L		 906 { "invd", { XX } },
907 { "wbinvd", { XX } },
908 { "(bad)", { XX } },
909 { "ud2a", { XX } },
910 { "(bad)", { XX } },
c608c12e 911 { GRPAMD },
ce518a5f
L		 912 { "femms", { XX } },
913 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */
252b5132 914 /* 10 */
c608c12e
AM		 915 { PREGRP8 },
916 { PREGRP9 },
ca164297 917 { PREGRP30 },
09a2c6cf
L		 918 { "movlpX", { EXq, XM, { SIMD_Fixup, 'h' } } },
919 { "unpcklpX", { XM, EXq } },
920 { "unpckhpX", { XM, EXq } },
ca164297 921 { PREGRP31 },
09a2c6cf 922 { "movhpX", { EXq, XM, { SIMD_Fixup, 'l' } } },
252b5132 923 /* 18 */
b3882df9 924 { GRP16 },
ce518a5f
L		 925 { "(bad)", { XX } },
926 { "(bad)", { XX } },
927 { "(bad)", { XX } },
928 { "(bad)", { XX } },
929 { "(bad)", { XX } },
930 { "(bad)", { XX } },
931 { "nopQ", { Ev } },
252b5132 932 /* 20 */
ce518a5f
L		 933 { "movZ", { Rm, Cm } },
934 { "movZ", { Rm, Dm } },
935 { "movZ", { Cm, Rm } },
936 { "movZ", { Dm, Rm } },
937 { "movL", { Rd, Td } },
938 { "(bad)", { XX } },
939 { "movL", { Td, Rd } },
940 { "(bad)", { XX } },
252b5132 941 /* 28 */
09a2c6cf
L		 942 { "movapX", { XM, EXx } },
943 { "movapX", { EXx, XM } },
c608c12e 944 { PREGRP2 },
050dfa73 945 { PREGRP33 },
2da11e11 946 { PREGRP4 },
c608c12e 947 { PREGRP3 },
09a2c6cf
L		 948 { PREGRP93 },
949 { PREGRP94 },
252b5132 950 /* 30 */
ce518a5f
L		 951 { "wrmsr", { XX } },
952 { "rdtsc", { XX } },
953 { "rdmsr", { XX } },
954 { "rdpmc", { XX } },
955 { "sysenter", { XX } },
956 { "sysexit", { XX } },
957 { "(bad)", { XX } },
958 { "(bad)", { XX } },
252b5132 959 /* 38 */
331d2d0d 960 { THREE_BYTE_0 },
ce518a5f 961 { "(bad)", { XX } },
331d2d0d 962 { THREE_BYTE_1 },
ce518a5f
L		 963 { "(bad)", { XX } },
964 { "(bad)", { XX } },
965 { "(bad)", { XX } },
966 { "(bad)", { XX } },
967 { "(bad)", { XX } },
252b5132 968 /* 40 */
ce518a5f
L		 969 { "cmovo", { Gv, Ev } },
970 { "cmovno", { Gv, Ev } },
971 { "cmovb", { Gv, Ev } },
972 { "cmovae", { Gv, Ev } },
973 { "cmove", { Gv, Ev } },
974 { "cmovne", { Gv, Ev } },
975 { "cmovbe", { Gv, Ev } },
976 { "cmova", { Gv, Ev } },
252b5132 977 /* 48 */
ce518a5f
L		 978 { "cmovs", { Gv, Ev } },
979 { "cmovns", { Gv, Ev } },
980 { "cmovp", { Gv, Ev } },
981 { "cmovnp", { Gv, Ev } },
982 { "cmovl", { Gv, Ev } },
983 { "cmovge", { Gv, Ev } },
984 { "cmovle", { Gv, Ev } },
985 { "cmovg", { Gv, Ev } },
252b5132 986 /* 50 */
ce518a5f 987 { "movmskpX", { Gdq, XS } },
c608c12e
AM		 988 { PREGRP13 },
989 { PREGRP12 },
990 { PREGRP11 },
09a2c6cf
L		 991 { "andpX", { XM, EXx } },
992 { "andnpX", { XM, EXx } },
993 { "orpX", { XM, EXx } },
994 { "xorpX", { XM, EXx } },
252b5132 995 /* 58 */
c608c12e
AM		 996 { PREGRP0 },
997 { PREGRP10 },
041bd2e0
JH		 998 { PREGRP17 },
999 { PREGRP16 },
c608c12e
AM		 1000 { PREGRP14 },
1001 { PREGRP7 },
1002 { PREGRP5 },
2da11e11 1003 { PREGRP6 },
252b5132 1004 /* 60 */
09a2c6cf
L		 1005 { PREGRP95 },
1006 { PREGRP96 },
1007 { PREGRP97 },
ce518a5f
L		 1008 { "packsswb", { MX, EM } },
1009 { "pcmpgtb", { MX, EM } },
1010 { "pcmpgtw", { MX, EM } },
1011 { "pcmpgtd", { MX, EM } },
1012 { "packuswb", { MX, EM } },
252b5132 1013 /* 68 */
ce518a5f
L		 1014 { "punpckhbw", { MX, EM } },
1015 { "punpckhwd", { MX, EM } },
1016 { "punpckhdq", { MX, EM } },
1017 { "packssdw", { MX, EM } },
0f17484f 1018 { PREGRP26 },
041bd2e0 1019 { PREGRP24 },
ce518a5f 1020 { "movd", { MX, Edq } },
041bd2e0 1021 { PREGRP19 },
252b5132 1022 /* 70 */
041bd2e0 1023 { PREGRP22 },
252b5132 1024 { GRP12 },
b3882df9
L		 1025 { GRP13 },
1026 { GRP14 },
ce518a5f
L		 1027 { "pcmpeqb", { MX, EM } },
1028 { "pcmpeqw", { MX, EM } },
1029 { "pcmpeqd", { MX, EM } },
1030 { "emms", { XX } },
252b5132 1031 /* 78 */
050dfa73
MM		 1032 { PREGRP34 },
1033 { PREGRP35 },
ce518a5f
L		 1034 { "(bad)", { XX } },
1035 { "(bad)", { XX } },
ca164297
L		 1036 { PREGRP28 },
1037 { PREGRP29 },
041bd2e0
JH		 1038 { PREGRP23 },
1039 { PREGRP20 },
252b5132 1040 /* 80 */
ce518a5f
L		 1041 { "joH", { Jv, XX, cond_jump_flag } },
1042 { "jnoH", { Jv, XX, cond_jump_flag } },
1043 { "jbH", { Jv, XX, cond_jump_flag } },
1044 { "jaeH", { Jv, XX, cond_jump_flag } },
1045 { "jeH", { Jv, XX, cond_jump_flag } },
1046 { "jneH", { Jv, XX, cond_jump_flag } },
1047 { "jbeH", { Jv, XX, cond_jump_flag } },
1048 { "jaH", { Jv, XX, cond_jump_flag } },
252b5132 1049 /* 88 */
ce518a5f
L		 1050 { "jsH", { Jv, XX, cond_jump_flag } },
1051 { "jnsH", { Jv, XX, cond_jump_flag } },
1052 { "jpH", { Jv, XX, cond_jump_flag } },
1053 { "jnpH", { Jv, XX, cond_jump_flag } },
1054 { "jlH", { Jv, XX, cond_jump_flag } },
1055 { "jgeH", { Jv, XX, cond_jump_flag } },
1056 { "jleH", { Jv, XX, cond_jump_flag } },
1057 { "jgH", { Jv, XX, cond_jump_flag } },
252b5132 1058 /* 90 */
ce518a5f
L		 1059 { "seto", { Eb } },
1060 { "setno", { Eb } },
1061 { "setb", { Eb } },
1062 { "setae", { Eb } },
1063 { "sete", { Eb } },
1064 { "setne", { Eb } },
1065 { "setbe", { Eb } },
1066 { "seta", { Eb } },
252b5132 1067 /* 98 */
ce518a5f
L		 1068 { "sets", { Eb } },
1069 { "setns", { Eb } },
1070 { "setp", { Eb } },
1071 { "setnp", { Eb } },
1072 { "setl", { Eb } },
1073 { "setge", { Eb } },
1074 { "setle", { Eb } },
1075 { "setg", { Eb } },
252b5132 1076 /* a0 */
ce518a5f
L		 1077 { "pushT", { fs } },
1078 { "popT", { fs } },
1079 { "cpuid", { XX } },
1080 { "btS", { Ev, Gv } },
1081 { "shldS", { Ev, Gv, Ib } },
1082 { "shldS", { Ev, Gv, CL } },
30d1c836
ML		 1083 { GRPPADLCK2 },
1084 { GRPPADLCK1 },
252b5132 1085 /* a8 */
ce518a5f
L		 1086 { "pushT", { gs } },
1087 { "popT", { gs } },
1088 { "rsm", { XX } },
1089 { "btsS", { Ev, Gv } },
1090 { "shrdS", { Ev, Gv, Ib } },
1091 { "shrdS", { Ev, Gv, CL } },
b3882df9 1092 { GRP15 },
ce518a5f 1093 { "imulS", { Gv, Ev } },
252b5132 1094 /* b0 */
ce518a5f
L		 1095 { "cmpxchgB", { Eb, Gb } },
1096 { "cmpxchgS", { Ev, Gv } },
1097 { "lssS", { Gv, Mp } },
1098 { "btrS", { Ev, Gv } },
1099 { "lfsS", { Gv, Mp } },
1100 { "lgsS", { Gv, Mp } },
1101 { "movz{bR|x|bR|x}", { Gv, Eb } },
1102 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
252b5132 1103 /* b8 */
7918206c 1104 { PREGRP37 },
ce518a5f 1105 { "ud2b", { XX } },
252b5132 1106 { GRP8 },
ce518a5f
L		 1107 { "btcS", { Ev, Gv } },
1108 { "bsfS", { Gv, Ev } },
050dfa73 1109 { PREGRP36 },
ce518a5f
L		 1110 { "movs{bR|x|bR|x}", { Gv, Eb } },
1111 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
252b5132 1112 /* c0 */
ce518a5f
L		 1113 { "xaddB", { Eb, Gb } },
1114 { "xaddS", { Ev, Gv } },
c608c12e 1115 { PREGRP1 },
ce518a5f
L		 1116 { "movntiS", { Ev, Gv } },
1117 { "pinsrw", { MX, Edqw, Ib } },
1118 { "pextrw", { Gdq, MS, Ib } },
09a2c6cf 1119 { "shufpX", { XM, EXx, Ib } },
252b5132
RH		 1120 { GRP9 },
1121 /* c8 */
ce518a5f
L		 1122 { "bswap", { RMeAX } },
1123 { "bswap", { RMeCX } },
1124 { "bswap", { RMeDX } },
1125 { "bswap", { RMeBX } },
1126 { "bswap", { RMeSP } },
1127 { "bswap", { RMeBP } },
1128 { "bswap", { RMeSI } },
1129 { "bswap", { RMeDI } },
252b5132 1130 /* d0 */
ca164297 1131 { PREGRP27 },
ce518a5f
L		 1132 { "psrlw", { MX, EM } },
1133 { "psrld", { MX, EM } },
1134 { "psrlq", { MX, EM } },
1135 { "paddq", { MX, EM } },
1136 { "pmullw", { MX, EM } },
041bd2e0 1137 { PREGRP21 },
ce518a5f 1138 { "pmovmskb", { Gdq, MS } },
252b5132 1139 /* d8 */
ce518a5f
L		 1140 { "psubusb", { MX, EM } },
1141 { "psubusw", { MX, EM } },
1142 { "pminub", { MX, EM } },
1143 { "pand", { MX, EM } },
1144 { "paddusb", { MX, EM } },
1145 { "paddusw", { MX, EM } },
1146 { "pmaxub", { MX, EM } },
1147 { "pandn", { MX, EM } },
252b5132 1148 /* e0 */
ce518a5f
L		 1149 { "pavgb", { MX, EM } },
1150 { "psraw", { MX, EM } },
1151 { "psrad", { MX, EM } },
1152 { "pavgw", { MX, EM } },
1153 { "pmulhuw", { MX, EM } },
1154 { "pmulhw", { MX, EM } },
041bd2e0 1155 { PREGRP15 },
0f17484f 1156 { PREGRP25 },
252b5132 1157 /* e8 */
ce518a5f
L		 1158 { "psubsb", { MX, EM } },
1159 { "psubsw", { MX, EM } },
1160 { "pminsw", { MX, EM } },
1161 { "por", { MX, EM } },
1162 { "paddsb", { MX, EM } },
1163 { "paddsw", { MX, EM } },
1164 { "pmaxsw", { MX, EM } },
1165 { "pxor", { MX, EM } },
252b5132 1166 /* f0 */
ca164297 1167 { PREGRP32 },
ce518a5f
L		 1168 { "psllw", { MX, EM } },
1169 { "pslld", { MX, EM } },
1170 { "psllq", { MX, EM } },
1171 { "pmuludq", { MX, EM } },
1172 { "pmaddwd", { MX, EM } },
1173 { "psadbw", { MX, EM } },
041bd2e0 1174 { PREGRP18 },
252b5132 1175 /* f8 */
ce518a5f
L		 1176 { "psubb", { MX, EM } },
1177 { "psubw", { MX, EM } },
1178 { "psubd", { MX, EM } },
1179 { "psubq", { MX, EM } },
1180 { "paddb", { MX, EM } },
1181 { "paddw", { MX, EM } },
1182 { "paddd", { MX, EM } },
1183 { "(bad)", { XX } },
252b5132
RH		 1184};
1185
1186static const unsigned char onebyte_has_modrm[256] = {
c608c12e
AM		 1187 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1188 /* ------------------------------- */
1189 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1190 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1191 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1192 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1193 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1194 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1195 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1196 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1197 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1198 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1199 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1200 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1201 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1202 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1203 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1204 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1205 /* ------------------------------- */
1206 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1207};
1208
1209static const unsigned char twobyte_has_modrm[256] = {
c608c12e
AM		 1210 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1211 /* ------------------------------- */
252b5132 1212 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
15965411 1213 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
4bba6815 1214 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
331d2d0d 1215 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
252b5132 1216 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
4bba6815
AM		 1217 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1218 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
90700ea2 1219 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
252b5132
RH		 1220 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1221 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
30d1c836 1222 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
050dfa73 1223 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
252b5132 1224 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
ca164297 1225 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
4bba6815 1226 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
ca164297 1227 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
c608c12e
AM		 1228 /* ------------------------------- */
1229 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1230};
1231
eec0f4ca 1232static const unsigned char twobyte_uses_DATA_prefix[256] = {
c608c12e
AM		 1233 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1234 /* ------------------------------- */
1235 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
ca164297 1236 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
050dfa73 1237 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
331d2d0d 1238 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
c608c12e 1239 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
041bd2e0
JH		 1240 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1241 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
050dfa73 1242 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
c608c12e
AM		 1243 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1244 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1245 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1246 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1247 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
ca164297 1248 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
041bd2e0 1249 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
ca164297 1250 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
c608c12e
AM		 1251 /* ------------------------------- */
1252 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1253};
1254
eec0f4ca
L		 1255static const unsigned char twobyte_uses_REPNZ_prefix[256] = {
1256 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1257 /* ------------------------------- */
1258 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1259 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1260 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1261 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1262 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1263 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1264 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1265 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1266 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1267 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1268 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1269 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1270 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1271 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1272 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1273 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1274 /* ------------------------------- */
1275 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1276};
1277
1278static const unsigned char twobyte_uses_REPZ_prefix[256] = {
1279 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1280 /* ------------------------------- */
1281 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1282 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1283 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1284 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1285 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1286 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1287 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1288 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1289 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1290 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1291 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1292 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1293 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1294 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1295 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1296 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1297 /* ------------------------------- */
1298 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1299};
1300
246c51aa 1301/* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
eec0f4ca
L		 1302static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
1303 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1304 /* ------------------------------- */
1305 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
8de28984 1306 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
42903f7f 1307 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
381d071f 1308 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
42903f7f 1309 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
eec0f4ca
L		 1310 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1311 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1312 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1313 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1314 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1315 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1316 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1317 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1318 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1319 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1320 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1321 /* ------------------------------- */
1322 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1323};
1324
246c51aa 1325/* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
eec0f4ca
L		 1326static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = {
1327 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1328 /* ------------------------------- */
1329 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1330 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1331 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1332 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1333 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1334 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1335 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1336 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1337 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1338 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1339 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1340 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1341 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1342 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1343 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
381d071f 1344 /* f0 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
eec0f4ca
L		 1345 /* ------------------------------- */
1346 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1347};
1348
246c51aa 1349/* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
eec0f4ca
L		 1350static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = {
1351 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1352 /* ------------------------------- */
1353 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1354 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1355 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1356 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1357 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1358 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1359 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1360 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1361 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1362 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1363 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1364 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1365 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1366 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1367 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1368 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1369 /* ------------------------------- */
1370 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1371};
1372
246c51aa 1373/* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
eec0f4ca
L		 1374static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
1375 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1376 /* ------------------------------- */
42903f7f
L		 1377 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1378 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1379 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
eec0f4ca 1380 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
42903f7f 1381 /* 40 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
eec0f4ca 1382 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
8de28984 1383 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
eec0f4ca
L		 1384 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1385 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1386 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1387 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1388 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1389 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1390 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1391 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1392 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1393 /* ------------------------------- */
1394 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1395};
1396
246c51aa 1397/* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
eec0f4ca
L		 1398static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = {
1399 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1400 /* ------------------------------- */
1401 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1402 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1403 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1404 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1405 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1406 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1407 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1408 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1409 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1410 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1411 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1412 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1413 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1414 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1415 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1416 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1417 /* ------------------------------- */
1418 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1419};
1420
246c51aa 1421/* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
eec0f4ca
L		 1422static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = {
1423 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1424 /* ------------------------------- */
1425 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1426 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1427 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1428 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1429 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1430 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1431 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1432 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1433 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1434 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1435 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1436 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1437 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1438 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1439 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1440 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1441 /* ------------------------------- */
1442 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1443};
1444
252b5132
RH		 1445static char obuf[100];
1446static char *obufp;
1447static char scratchbuf[100];
1448static unsigned char *start_codep;
1449static unsigned char *insn_codep;
1450static unsigned char *codep;
1451static disassemble_info *the_info;
7967e09e
L		 1452static struct
1453 {
1454 int mod;
7967e09e 1455 int reg;
484c222e 1456 int rm;
7967e09e
L		 1457 }
1458modrm;
4bba6815 1459static unsigned char need_modrm;
252b5132 1460
4bba6815
AM		 1461/* If we are accessing mod/rm/reg without need_modrm set, then the
1462 values are stale. Hitting this abort likely indicates that you
1463 need to update onebyte_has_modrm or twobyte_has_modrm. */
1464#define MODRM_CHECK if (!need_modrm) abort ()
1465
d708bcba
AM		 1466static const char **names64;
1467static const char **names32;
1468static const char **names16;
1469static const char **names8;
1470static const char **names8rex;
1471static const char **names_seg;
1472static const char **index16;
1473
1474static const char *intel_names64[] = {
1475 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1476 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1477};
1478static const char *intel_names32[] = {
1479 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1480 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1481};
1482static const char *intel_names16[] = {
1483 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1484 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1485};
1486static const char *intel_names8[] = {
1487 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1488};
1489static const char *intel_names8rex[] = {
1490 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1491 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1492};
1493static const char *intel_names_seg[] = {
1494 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1495};
1496static const char *intel_index16[] = {
1497 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1498};
1499
1500static const char *att_names64[] = {
1501 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
52b15da3
JH		 1502 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1503};
d708bcba
AM		 1504static const char *att_names32[] = {
1505 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
52b15da3 1506 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
252b5132 1507};
d708bcba
AM		 1508static const char *att_names16[] = {
1509 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
52b15da3 1510 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
252b5132 1511};
d708bcba
AM		 1512static const char *att_names8[] = {
1513 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
252b5132 1514};
d708bcba
AM		 1515static const char *att_names8rex[] = {
1516 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
52b15da3
JH		 1517 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1518};
d708bcba
AM		 1519static const char *att_names_seg[] = {
1520 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
252b5132 1521};
d708bcba
AM		 1522static const char *att_index16[] = {
1523 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
252b5132
RH		 1524};
1525
2da11e11 1526static const struct dis386 grps[][8] = {
7967e09e
L		 1527 /* GRP1a */
1528 {
1529 { "popU", { stackEv } },
1530 { "(bad)", { XX } },
1531 { "(bad)", { XX } },
1532 { "(bad)", { XX } },
1533 { "(bad)", { XX } },
1534 { "(bad)", { XX } },
1535 { "(bad)", { XX } },
1536 { "(bad)", { XX } },
1537 },
252b5132
RH		 1538 /* GRP1b */
1539 {
ce518a5f
L		 1540 { "addA", { Eb, Ib } },
1541 { "orA", { Eb, Ib } },
1542 { "adcA", { Eb, Ib } },
1543 { "sbbA", { Eb, Ib } },
1544 { "andA", { Eb, Ib } },
1545 { "subA", { Eb, Ib } },
1546 { "xorA", { Eb, Ib } },
1547 { "cmpA", { Eb, Ib } },
252b5132
RH		 1548 },
1549 /* GRP1S */
1550 {
ce518a5f
L		 1551 { "addQ", { Ev, Iv } },
1552 { "orQ", { Ev, Iv } },
1553 { "adcQ", { Ev, Iv } },
1554 { "sbbQ", { Ev, Iv } },
1555 { "andQ", { Ev, Iv } },
1556 { "subQ", { Ev, Iv } },
1557 { "xorQ", { Ev, Iv } },
1558 { "cmpQ", { Ev, Iv } },
252b5132
RH		 1559 },
1560 /* GRP1Ss */
1561 {
ce518a5f
L		 1562 { "addQ", { Ev, sIb } },
1563 { "orQ", { Ev, sIb } },
1564 { "adcQ", { Ev, sIb } },
1565 { "sbbQ", { Ev, sIb } },
1566 { "andQ", { Ev, sIb } },
1567 { "subQ", { Ev, sIb } },
1568 { "xorQ", { Ev, sIb } },
1569 { "cmpQ", { Ev, sIb } },
252b5132
RH		 1570 },
1571 /* GRP2b */
1572 {
ce518a5f
L		 1573 { "rolA", { Eb, Ib } },
1574 { "rorA", { Eb, Ib } },
1575 { "rclA", { Eb, Ib } },
1576 { "rcrA", { Eb, Ib } },
1577 { "shlA", { Eb, Ib } },
1578 { "shrA", { Eb, Ib } },
1579 { "(bad)", { XX } },
1580 { "sarA", { Eb, Ib } },
252b5132
RH		 1581 },
1582 /* GRP2S */
1583 {
ce518a5f
L		 1584 { "rolQ", { Ev, Ib } },
1585 { "rorQ", { Ev, Ib } },
1586 { "rclQ", { Ev, Ib } },
1587 { "rcrQ", { Ev, Ib } },
1588 { "shlQ", { Ev, Ib } },
1589 { "shrQ", { Ev, Ib } },
1590 { "(bad)", { XX } },
1591 { "sarQ", { Ev, Ib } },
252b5132
RH		 1592 },
1593 /* GRP2b_one */
1594 {
ce518a5f
L		 1595 { "rolA", { Eb, I1 } },
1596 { "rorA", { Eb, I1 } },
1597 { "rclA", { Eb, I1 } },
1598 { "rcrA", { Eb, I1 } },
1599 { "shlA", { Eb, I1 } },
1600 { "shrA", { Eb, I1 } },
1601 { "(bad)", { XX } },
1602 { "sarA", { Eb, I1 } },
252b5132
RH		 1603 },
1604 /* GRP2S_one */
1605 {
ce518a5f
L		 1606 { "rolQ", { Ev, I1 } },
1607 { "rorQ", { Ev, I1 } },
1608 { "rclQ", { Ev, I1 } },
1609 { "rcrQ", { Ev, I1 } },
1610 { "shlQ", { Ev, I1 } },
1611 { "shrQ", { Ev, I1 } },
1612 { "(bad)", { XX } },
1613 { "sarQ", { Ev, I1 } },
252b5132
RH		 1614 },
1615 /* GRP2b_cl */
1616 {
ce518a5f
L		 1617 { "rolA", { Eb, CL } },
1618 { "rorA", { Eb, CL } },
1619 { "rclA", { Eb, CL } },
1620 { "rcrA", { Eb, CL } },
1621 { "shlA", { Eb, CL } },
1622 { "shrA", { Eb, CL } },
1623 { "(bad)", { XX } },
1624 { "sarA", { Eb, CL } },
252b5132
RH		 1625 },
1626 /* GRP2S_cl */
1627 {
ce518a5f
L		 1628 { "rolQ", { Ev, CL } },
1629 { "rorQ", { Ev, CL } },
1630 { "rclQ", { Ev, CL } },
1631 { "rcrQ", { Ev, CL } },
1632 { "shlQ", { Ev, CL } },
1633 { "shrQ", { Ev, CL } },
1634 { "(bad)", { XX } },
1635 { "sarQ", { Ev, CL } },
252b5132
RH		 1636 },
1637 /* GRP3b */
1638 {
ce518a5f
L		 1639 { "testA", { Eb, Ib } },
1640 { "(bad)", { Eb } },
1641 { "notA", { Eb } },
1642 { "negA", { Eb } },
1643 { "mulA", { Eb } }, /* Don't print the implicit %al register, */
1644 { "imulA", { Eb } }, /* to distinguish these opcodes from other */
1645 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */
1646 { "idivA", { Eb } }, /* and idiv for consistency. */
252b5132
RH		 1647 },
1648 /* GRP3S */
1649 {
ce518a5f
L		 1650 { "testQ", { Ev, Iv } },
1651 { "(bad)", { XX } },
1652 { "notQ", { Ev } },
1653 { "negQ", { Ev } },
1654 { "mulQ", { Ev } }, /* Don't print the implicit register. */
1655 { "imulQ", { Ev } },
1656 { "divQ", { Ev } },
1657 { "idivQ", { Ev } },
252b5132
RH		 1658 },
1659 /* GRP4 */
1660 {
ce518a5f
L		 1661 { "incA", { Eb } },
1662 { "decA", { Eb } },
1663 { "(bad)", { XX } },
1664 { "(bad)", { XX } },
1665 { "(bad)", { XX } },
1666 { "(bad)", { XX } },
1667 { "(bad)", { XX } },
1668 { "(bad)", { XX } },
252b5132
RH		 1669 },
1670 /* GRP5 */
1671 {
ce518a5f
L		 1672 { "incQ", { Ev } },
1673 { "decQ", { Ev } },
1674 { "callT", { indirEv } },
1675 { "JcallT", { indirEp } },
1676 { "jmpT", { indirEv } },
1677 { "JjmpT", { indirEp } },
1678 { "pushU", { stackEv } },
1679 { "(bad)", { XX } },
252b5132
RH		 1680 },
1681 /* GRP6 */
1682 {
ce518a5f
L		 1683 { "sldtD", { Sv } },
1684 { "strD", { Sv } },
1685 { "lldt", { Ew } },
1686 { "ltr", { Ew } },
1687 { "verr", { Ew } },
1688 { "verw", { Ew } },
1689 { "(bad)", { XX } },
1690 { "(bad)", { XX } },
252b5132
RH		 1691 },
1692 /* GRP7 */
1693 {
ce518a5f
L		 1694 { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } },
1695 { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } },
1696 { "lgdt{Q|Q||}", { M } },
1697 { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } },
1698 { "smswD", { Sv } },
1699 { "(bad)", { XX } },
1700 { "lmsw", { Ew } },
1701 { "invlpg", { { INVLPG_Fixup, w_mode } } },
252b5132
RH		 1702 },
1703 /* GRP8 */
1704 {
ce518a5f
L		 1705 { "(bad)", { XX } },
1706 { "(bad)", { XX } },
1707 { "(bad)", { XX } },
1708 { "(bad)", { XX } },
1709 { "btQ", { Ev, Ib } },
1710 { "btsQ", { Ev, Ib } },
1711 { "btrQ", { Ev, Ib } },
1712 { "btcQ", { Ev, Ib } },
252b5132
RH		 1713 },
1714 /* GRP9 */
1715 {
ce518a5f
L		 1716 { "(bad)", { XX } },
1717 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1718 { "(bad)", { XX } },
1719 { "(bad)", { XX } },
1720 { "(bad)", { XX } },
1721 { "(bad)", { XX } },
1722 { "", { VM } }, /* See OP_VMX. */
1723 { "vmptrst", { Mq } },
252b5132 1724 },
a6bd098c
L		 1725 /* GRP11_C6 */
1726 {
ce518a5f
L		 1727 { "movA", { Eb, Ib } },
1728 { "(bad)", { XX } },
1729 { "(bad)", { XX } },
1730 { "(bad)", { XX } },
1731 { "(bad)", { XX } },
1732 { "(bad)", { XX } },
1733 { "(bad)", { XX } },
1734 { "(bad)", { XX } },
a6bd098c
L		 1735 },
1736 /* GRP11_C7 */
1737 {
ce518a5f
L		 1738 { "movQ", { Ev, Iv } },
1739 { "(bad)", { XX } },
1740 { "(bad)", { XX } },
1741 { "(bad)", { XX } },
1742 { "(bad)", { XX } },
1743 { "(bad)", { XX } },
1744 { "(bad)", { XX } },
1745 { "(bad)", { XX } },
a6bd098c 1746 },
b3882df9 1747 /* GRP12 */
252b5132 1748 {
ce518a5f
L		 1749 { "(bad)", { XX } },
1750 { "(bad)", { XX } },
1751 { "psrlw", { MS, Ib } },
1752 { "(bad)", { XX } },
1753 { "psraw", { MS, Ib } },
1754 { "(bad)", { XX } },
1755 { "psllw", { MS, Ib } },
1756 { "(bad)", { XX } },
252b5132 1757 },
b3882df9 1758 /* GRP13 */
252b5132 1759 {
ce518a5f
L		 1760 { "(bad)", { XX } },
1761 { "(bad)", { XX } },
1762 { "psrld", { MS, Ib } },
1763 { "(bad)", { XX } },
1764 { "psrad", { MS, Ib } },
1765 { "(bad)", { XX } },
1766 { "pslld", { MS, Ib } },
1767 { "(bad)", { XX } },
252b5132 1768 },
b3882df9 1769 /* GRP14 */
252b5132 1770 {
ce518a5f
L		 1771 { "(bad)", { XX } },
1772 { "(bad)", { XX } },
1773 { "psrlq", { MS, Ib } },
1774 { "psrldq", { MS, Ib } },
1775 { "(bad)", { XX } },
1776 { "(bad)", { XX } },
1777 { "psllq", { MS, Ib } },
1778 { "pslldq", { MS, Ib } },
252b5132 1779 },
b3882df9 1780 /* GRP15 */
252b5132 1781 {
ce518a5f
L		 1782 { "fxsave", { Ev } },
1783 { "fxrstor", { Ev } },
1784 { "ldmxcsr", { Ev } },
1785 { "stmxcsr", { Ev } },
1786 { "(bad)", { XX } },
1787 { "lfence", { { OP_0fae, 0 } } },
1788 { "mfence", { { OP_0fae, 0 } } },
1789 { "clflush", { { OP_0fae, 0 } } },
c608c12e 1790 },
b3882df9 1791 /* GRP16 */
c608c12e 1792 {
ce518a5f
L		 1793 { "prefetchnta", { Ev } },
1794 { "prefetcht0", { Ev } },
1795 { "prefetcht1", { Ev } },
1796 { "prefetcht2", { Ev } },
1797 { "(bad)", { XX } },
1798 { "(bad)", { XX } },
1799 { "(bad)", { XX } },
1800 { "(bad)", { XX } },
252b5132 1801 },
c608c12e 1802 /* GRPAMD */
252b5132 1803 {
ce518a5f
L		 1804 { "prefetch", { Eb } },
1805 { "prefetchw", { Eb } },
1806 { "(bad)", { XX } },
1807 { "(bad)", { XX } },
1808 { "(bad)", { XX } },
1809 { "(bad)", { XX } },
1810 { "(bad)", { XX } },
1811 { "(bad)", { XX } },
0f10071e 1812 },
30d1c836 1813 /* GRPPADLCK1 */
cc0ec051 1814 {
ce518a5f
L		 1815 { "xstore-rng", { { OP_0f07, 0 } } },
1816 { "xcrypt-ecb", { { OP_0f07, 0 } } },
1817 { "xcrypt-cbc", { { OP_0f07, 0 } } },
1818 { "xcrypt-ctr", { { OP_0f07, 0 } } },
1819 { "xcrypt-cfb", { { OP_0f07, 0 } } },
1820 { "xcrypt-ofb", { { OP_0f07, 0 } } },
1821 { "(bad)", { { OP_0f07, 0 } } },
1822 { "(bad)", { { OP_0f07, 0 } } },
30d1c836
ML		 1823 },
1824 /* GRPPADLCK2 */
1825 {
ce518a5f
L		 1826 { "montmul", { { OP_0f07, 0 } } },
1827 { "xsha1", { { OP_0f07, 0 } } },
1828 { "xsha256", { { OP_0f07, 0 } } },
1829 { "(bad)", { { OP_0f07, 0 } } },
1830 { "(bad)", { { OP_0f07, 0 } } },
1831 { "(bad)", { { OP_0f07, 0 } } },
1832 { "(bad)", { { OP_0f07, 0 } } },
1833 { "(bad)", { { OP_0f07, 0 } } },
252b5132 1834 }
252b5132
RH		 1835};
1836
041bd2e0 1837static const struct dis386 prefix_user_table[][4] = {
c608c12e
AM		 1838 /* PREGRP0 */
1839 {
09a2c6cf
L		 1840 { "addps", { XM, EXx } },
1841 { "addss", { XM, EXd } },
1842 { "addpd", { XM, EXx } },
1843 { "addsd", { XM, EXq } },
c608c12e
AM		 1844 },
1845 /* PREGRP1 */
1846 {
09a2c6cf
L		 1847 { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */
1848 { "", { XM, EXx, OPSIMD } },
1849 { "", { XM, EXx, OPSIMD } },
1850 { "", { XM, EXx, OPSIMD } },
c608c12e
AM		 1851 },
1852 /* PREGRP2 */
1853 {
ce518a5f
L		 1854 { "cvtpi2ps", { XM, EMC } },
1855 { "cvtsi2ssY", { XM, Ev } },
1856 { "cvtpi2pd", { XM, EMC } },
1857 { "cvtsi2sdY", { XM, Ev } },
c608c12e
AM		 1858 },
1859 /* PREGRP3 */
1860 {
09a2c6cf
L		 1861 { "cvtps2pi", { MXC, EXx } },
1862 { "cvtss2siY", { Gv, EXx } },
1863 { "cvtpd2pi", { MXC, EXx } },
1864 { "cvtsd2siY", { Gv, EXx } },
c608c12e
AM		 1865 },
1866 /* PREGRP4 */
1867 {
09a2c6cf
L		 1868 { "cvttps2pi", { MXC, EXx } },
1869 { "cvttss2siY", { Gv, EXx } },
1870 { "cvttpd2pi", { MXC, EXx } },
1871 { "cvttsd2siY", { Gv, EXx } },
c608c12e
AM		 1872 },
1873 /* PREGRP5 */
1874 {
09a2c6cf
L		 1875 { "divps", { XM, EXx } },
1876 { "divss", { XM, EXx } },
1877 { "divpd", { XM, EXx } },
1878 { "divsd", { XM, EXx } },
c608c12e
AM		 1879 },
1880 /* PREGRP6 */
1881 {
09a2c6cf
L		 1882 { "maxps", { XM, EXx } },
1883 { "maxss", { XM, EXx } },
1884 { "maxpd", { XM, EXx } },
1885 { "maxsd", { XM, EXx } },
c608c12e
AM		 1886 },
1887 /* PREGRP7 */
1888 {
09a2c6cf
L		 1889 { "minps", { XM, EXx } },
1890 { "minss", { XM, EXx } },
1891 { "minpd", { XM, EXx } },
1892 { "minsd", { XM, EXx } },
c608c12e
AM		 1893 },
1894 /* PREGRP8 */
1895 {
09a2c6cf
L		 1896 { "movups", { XM, EXx } },
1897 { "movss", { XM, EXx } },
1898 { "movupd", { XM, EXx } },
1899 { "movsd", { XM, EXx } },
c608c12e
AM		 1900 },
1901 /* PREGRP9 */
1902 {
09a2c6cf
L		 1903 { "movups", { EXx, XM } },
1904 { "movss", { EXx, XM } },
1905 { "movupd", { EXx, XM } },
1906 { "movsd", { EXx, XM } },
c608c12e
AM		 1907 },
1908 /* PREGRP10 */
1909 {
09a2c6cf
L		 1910 { "mulps", { XM, EXx } },
1911 { "mulss", { XM, EXx } },
1912 { "mulpd", { XM, EXx } },
1913 { "mulsd", { XM, EXx } },
c608c12e
AM		 1914 },
1915 /* PREGRP11 */
1916 {
09a2c6cf
L		 1917 { "rcpps", { XM, EXx } },
1918 { "rcpss", { XM, EXx } },
1919 { "(bad)", { XM, EXx } },
1920 { "(bad)", { XM, EXx } },
c608c12e
AM		 1921 },
1922 /* PREGRP12 */
1923 {
09a2c6cf
L		 1924 { "rsqrtps",{ XM, EXx } },
1925 { "rsqrtss",{ XM, EXx } },
1926 { "(bad)", { XM, EXx } },
1927 { "(bad)", { XM, EXx } },
c608c12e
AM		 1928 },
1929 /* PREGRP13 */
1930 {
09a2c6cf
L		 1931 { "sqrtps", { XM, EXx } },
1932 { "sqrtss", { XM, EXx } },
1933 { "sqrtpd", { XM, EXx } },
1934 { "sqrtsd", { XM, EXx } },
c608c12e
AM		 1935 },
1936 /* PREGRP14 */
1937 {
09a2c6cf
L		 1938 { "subps", { XM, EXx } },
1939 { "subss", { XM, EXx } },
1940 { "subpd", { XM, EXx } },
1941 { "subsd", { XM, EXx } },
041bd2e0
JH		 1942 },
1943 /* PREGRP15 */
1944 {
09a2c6cf
L		 1945 { "(bad)", { XM, EXx } },
1946 { "cvtdq2pd", { XM, EXq } },
1947 { "cvttpd2dq", { XM, EXx } },
1948 { "cvtpd2dq", { XM, EXx } },
041bd2e0
JH		 1949 },
1950 /* PREGRP16 */
1951 {
09a2c6cf
L		 1952 { "cvtdq2ps", { XM, EXx } },
1953 { "cvttps2dq", { XM, EXx } },
1954 { "cvtps2dq", { XM, EXx } },
1955 { "(bad)", { XM, EXx } },
041bd2e0
JH		 1956 },
1957 /* PREGRP17 */
1958 {
09a2c6cf
L		 1959 { "cvtps2pd", { XM, EXq } },
1960 { "cvtss2sd", { XM, EXx } },
1961 { "cvtpd2ps", { XM, EXx } },
1962 { "cvtsd2ss", { XM, EXx } },
041bd2e0
JH		 1963 },
1964 /* PREGRP18 */
1965 {
ce518a5f 1966 { "maskmovq", { MX, MS } },
09a2c6cf 1967 { "(bad)", { XM, EXx } },
ce518a5f 1968 { "maskmovdqu", { XM, XS } },
09a2c6cf 1969 { "(bad)", { XM, EXx } },
041bd2e0
JH		 1970 },
1971 /* PREGRP19 */
1972 {
ce518a5f 1973 { "movq", { MX, EM } },
09a2c6cf
L		 1974 { "movdqu", { XM, EXx } },
1975 { "movdqa", { XM, EXx } },
1976 { "(bad)", { XM, EXx } },
041bd2e0
JH		 1977 },
1978 /* PREGRP20 */
1979 {
ce518a5f 1980 { "movq", { EM, MX } },
09a2c6cf
L		 1981 { "movdqu", { EXx, XM } },
1982 { "movdqa", { EXx, XM } },
1983 { "(bad)", { EXx, XM } },
041bd2e0
JH		 1984 },
1985 /* PREGRP21 */
1986 {
09a2c6cf 1987 { "(bad)", { EXx, XM } },
ce518a5f 1988 { "movq2dq",{ XM, MS } },
09a2c6cf 1989 { "movq", { EXx, XM } },
ce518a5f 1990 { "movdq2q",{ MX, XS } },
041bd2e0
JH		 1991 },
1992 /* PREGRP22 */
1993 {
ce518a5f 1994 { "pshufw", { MX, EM, Ib } },
09a2c6cf
L		 1995 { "pshufhw",{ XM, EXx, Ib } },
1996 { "pshufd", { XM, EXx, Ib } },
1997 { "pshuflw",{ XM, EXx, Ib } },
041bd2e0
JH		 1998 },
1999 /* PREGRP23 */
2000 {
ce518a5f 2001 { "movd", { Edq, MX } },
09a2c6cf 2002 { "movq", { XM, EXx } },
ce518a5f
L		 2003 { "movd", { Edq, XM } },
2004 { "(bad)", { Ed, XM } },
041bd2e0
JH		 2005 },
2006 /* PREGRP24 */
2007 {
09a2c6cf
L		 2008 { "(bad)", { MX, EXx } },
2009 { "(bad)", { XM, EXx } },
2010 { "punpckhqdq", { XM, EXx } },
2011 { "(bad)", { XM, EXx } },
0f17484f
AM		 2012 },
2013 /* PREGRP25 */
2014 {
ce518a5f
L		 2015 { "movntq", { EM, MX } },
2016 { "(bad)", { EM, XM } },
2017 { "movntdq",{ EM, XM } },
2018 { "(bad)", { EM, XM } },
0f17484f
AM		 2019 },
2020 /* PREGRP26 */
2021 {
09a2c6cf
L		 2022 { "(bad)", { MX, EXx } },
2023 { "(bad)", { XM, EXx } },
2024 { "punpcklqdq", { XM, EXx } },
2025 { "(bad)", { XM, EXx } },
041bd2e0 2026 },
ca164297
L		 2027 /* PREGRP27 */
2028 {
09a2c6cf
L		 2029 { "(bad)", { MX, EXx } },
2030 { "(bad)", { XM, EXx } },
2031 { "addsubpd", { XM, EXx } },
2032 { "addsubps", { XM, EXx } },
ca164297
L		 2033 },
2034 /* PREGRP28 */
2035 {
09a2c6cf
L		 2036 { "(bad)", { MX, EXx } },
2037 { "(bad)", { XM, EXx } },
2038 { "haddpd", { XM, EXx } },
2039 { "haddps", { XM, EXx } },
ca164297
L		 2040 },
2041 /* PREGRP29 */
2042 {
09a2c6cf
L		 2043 { "(bad)", { MX, EXx } },
2044 { "(bad)", { XM, EXx } },
2045 { "hsubpd", { XM, EXx } },
2046 { "hsubps", { XM, EXx } },
ca164297
L		 2047 },
2048 /* PREGRP30 */
2049 {
09a2c6cf
L		 2050 { "movlpX", { XM, EXq, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */
2051 { "movsldup", { XM, EXx } },
2052 { "movlpd", { XM, EXq } },
2053 { "movddup", { XM, EXq } },
ca164297
L		 2054 },
2055 /* PREGRP31 */
2056 {
09a2c6cf
L		 2057 { "movhpX", { XM, EXq, { SIMD_Fixup, 'l' } } },
2058 { "movshdup", { XM, EXx } },
2059 { "movhpd", { XM, EXq } },
2060 { "(bad)", { XM, EXq } },
ca164297
L		 2061 },
2062 /* PREGRP32 */
2063 {
09a2c6cf
L		 2064 { "(bad)", { XM, EXx } },
2065 { "(bad)", { XM, EXx } },
2066 { "(bad)", { XM, EXx } },
ce518a5f 2067 { "lddqu", { XM, M } },
ca164297 2068 },
050dfa73
MM		 2069 /* PREGRP33 */
2070 {
ce518a5f
L		 2071 {"movntps", { Ev, XM } },
2072 {"movntss", { Ev, XM } },
2073 {"movntpd", { Ev, XM } },
2074 {"movntsd", { Ev, XM } },
050dfa73
MM		 2075 },
2076
2077 /* PREGRP34 */
2078 {
ce518a5f
L		 2079 {"vmread", { Em, Gm } },
2080 {"(bad)", { XX } },
2081 {"extrq", { XS, Ib, Ib } },
2082 {"insertq", { XM, XS, Ib, Ib } },
050dfa73 2083 },
246c51aa
L		 2084
2085 /* PREGRP35 */
050dfa73 2086 {
ce518a5f
L		 2087 {"vmwrite", { Gm, Em } },
2088 {"(bad)", { XX } },
2089 {"extrq", { XM, XS } },
2090 {"insertq", { XM, XS } },
246c51aa 2091 },
050dfa73
MM		 2092
2093 /* PREGRP36 */
2094 {
ce518a5f
L		 2095 { "bsrS", { Gv, Ev } },
2096 { "lzcntS", { Gv, Ev } },
2097 { "bsrS", { Gv, Ev } },
2098 { "(bad)", { XX } },
050dfa73
MM		 2099 },
2100
7918206c
MM		 2101 /* PREGRP37 */
2102 {
d25a0fc5 2103 { "(bad)", { XX } },
ce518a5f 2104 { "popcntS", { Gv, Ev } },
d25a0fc5 2105 { "(bad)", { XX } },
246c51aa 2106 { "(bad)", { XX } },
7918206c 2107 },
8b38ad71
L		 2108
2109 /* PREGRP38 */
2110 {
2111 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2112 { "pause", { XX } },
2113 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
246c51aa 2114 { "(bad)", { XX } },
8b38ad71 2115 },
42903f7f
L		 2116
2117 /* PREGRP39 */
2118 {
2119 { "(bad)", { XX } },
2120 { "(bad)", { XX } },
09a2c6cf 2121 { "pblendvb", {XM, EXx, XMM0 } },
42903f7f
L		 2122 { "(bad)", { XX } },
2123 },
2124
2125 /* PREGRP40 */
2126 {
2127 { "(bad)", { XX } },
2128 { "(bad)", { XX } },
09a2c6cf 2129 { "blendvps", {XM, EXx, XMM0 } },
42903f7f
L		 2130 { "(bad)", { XX } },
2131 },
2132
2133 /* PREGRP41 */
2134 {
2135 { "(bad)", { XX } },
2136 { "(bad)", { XX } },
09a2c6cf 2137 { "blendvpd", { XM, EXx, XMM0 } },
42903f7f
L		 2138 { "(bad)", { XX } },
2139 },
2140
2141 /* PREGRP42 */
2142 {
2143 { "(bad)", { XX } },
2144 { "(bad)", { XX } },
09a2c6cf 2145 { "ptest", { XM, EXx } },
42903f7f
L		 2146 { "(bad)", { XX } },
2147 },
2148
2149 /* PREGRP43 */
2150 {
2151 { "(bad)", { XX } },
2152 { "(bad)", { XX } },
09a2c6cf 2153 { "pmovsxbw", { XM, EXx } },
42903f7f
L		 2154 { "(bad)", { XX } },
2155 },
2156
2157 /* PREGRP44 */
2158 {
2159 { "(bad)", { XX } },
2160 { "(bad)", { XX } },
09a2c6cf 2161 { "pmovsxbd", { XM, EXx } },
42903f7f
L		 2162 { "(bad)", { XX } },
2163 },
2164
2165 /* PREGRP45 */
2166 {
2167 { "(bad)", { XX } },
2168 { "(bad)", { XX } },
09a2c6cf 2169 { "pmovsxbq", { XM, EXx } },
42903f7f
L		 2170 { "(bad)", { XX } },
2171 },
2172
2173 /* PREGRP46 */
2174 {
2175 { "(bad)", { XX } },
2176 { "(bad)", { XX } },
09a2c6cf 2177 { "pmovsxwd", { XM, EXx } },
42903f7f
L		 2178 { "(bad)", { XX } },
2179 },
2180
2181 /* PREGRP47 */
2182 {
2183 { "(bad)", { XX } },
2184 { "(bad)", { XX } },
09a2c6cf 2185 { "pmovsxwq", { XM, EXx } },
42903f7f
L		 2186 { "(bad)", { XX } },
2187 },
2188
2189 /* PREGRP48 */
2190 {
2191 { "(bad)", { XX } },
2192 { "(bad)", { XX } },
09a2c6cf 2193 { "pmovsxdq", { XM, EXx } },
42903f7f
L		 2194 { "(bad)", { XX } },
2195 },
2196
2197 /* PREGRP49 */
2198 {
2199 { "(bad)", { XX } },
2200 { "(bad)", { XX } },
09a2c6cf 2201 { "pmuldq", { XM, EXx } },
42903f7f
L		 2202 { "(bad)", { XX } },
2203 },
2204
2205 /* PREGRP50 */
2206 {
2207 { "(bad)", { XX } },
2208 { "(bad)", { XX } },
09a2c6cf 2209 { "pcmpeqq", { XM, EXx } },
42903f7f
L		 2210 { "(bad)", { XX } },
2211 },
2212
2213 /* PREGRP51 */
2214 {
2215 { "(bad)", { XX } },
2216 { "(bad)", { XX } },
2217 { "movntdqa", { XM, EM } },
2218 { "(bad)", { XX } },
2219 },
2220
2221 /* PREGRP52 */
2222 {
2223 { "(bad)", { XX } },
2224 { "(bad)", { XX } },
09a2c6cf 2225 { "packusdw", { XM, EXx } },
42903f7f
L		 2226 { "(bad)", { XX } },
2227 },
2228
2229 /* PREGRP53 */
2230 {
2231 { "(bad)", { XX } },
2232 { "(bad)", { XX } },
09a2c6cf 2233 { "pmovzxbw", { XM, EXx } },
42903f7f
L		 2234 { "(bad)", { XX } },
2235 },
2236
2237 /* PREGRP54 */
2238 {
2239 { "(bad)", { XX } },
2240 { "(bad)", { XX } },
09a2c6cf 2241 { "pmovzxbd", { XM, EXx } },
42903f7f
L		 2242 { "(bad)", { XX } },
2243 },
2244
2245 /* PREGRP55 */
2246 {
2247 { "(bad)", { XX } },
2248 { "(bad)", { XX } },
09a2c6cf 2249 { "pmovzxbq", { XM, EXx } },
42903f7f
L		 2250 { "(bad)", { XX } },
2251 },
2252
2253 /* PREGRP56 */
2254 {
2255 { "(bad)", { XX } },
2256 { "(bad)", { XX } },
09a2c6cf 2257 { "pmovzxwd", { XM, EXx } },
42903f7f
L		 2258 { "(bad)", { XX } },
2259 },
2260
2261 /* PREGRP57 */
2262 {
2263 { "(bad)", { XX } },
2264 { "(bad)", { XX } },
09a2c6cf 2265 { "pmovzxwq", { XM, EXx } },
42903f7f
L		 2266 { "(bad)", { XX } },
2267 },
2268
2269 /* PREGRP58 */
2270 {
2271 { "(bad)", { XX } },
2272 { "(bad)", { XX } },
09a2c6cf 2273 { "pmovzxdq", { XM, EXx } },
42903f7f
L		 2274 { "(bad)", { XX } },
2275 },
2276
2277 /* PREGRP59 */
2278 {
2279 { "(bad)", { XX } },
2280 { "(bad)", { XX } },
09a2c6cf 2281 { "pminsb", { XM, EXx } },
42903f7f
L		 2282 { "(bad)", { XX } },
2283 },
2284
2285 /* PREGRP60 */
2286 {
2287 { "(bad)", { XX } },
2288 { "(bad)", { XX } },
09a2c6cf 2289 { "pminsd", { XM, EXx } },
42903f7f
L		 2290 { "(bad)", { XX } },
2291 },
2292
2293 /* PREGRP61 */
2294 {
2295 { "(bad)", { XX } },
2296 { "(bad)", { XX } },
09a2c6cf 2297 { "pminuw", { XM, EXx } },
42903f7f
L		 2298 { "(bad)", { XX } },
2299 },
2300
2301 /* PREGRP62 */
2302 {
2303 { "(bad)", { XX } },
2304 { "(bad)", { XX } },
09a2c6cf 2305 { "pminud", { XM, EXx } },
42903f7f
L		 2306 { "(bad)", { XX } },
2307 },
2308
2309 /* PREGRP63 */
2310 {
2311 { "(bad)", { XX } },
2312 { "(bad)", { XX } },
09a2c6cf 2313 { "pmaxsb", { XM, EXx } },
42903f7f
L		 2314 { "(bad)", { XX } },
2315 },
2316
2317 /* PREGRP64 */
2318 {
2319 { "(bad)", { XX } },
2320 { "(bad)", { XX } },
09a2c6cf 2321 { "pmaxsd", { XM, EXx } },
42903f7f
L		 2322 { "(bad)", { XX } },
2323 },
2324
2325 /* PREGRP65 */
2326 {
2327 { "(bad)", { XX } },
2328 { "(bad)", { XX } },
09a2c6cf 2329 { "pmaxuw", { XM, EXx } },
42903f7f
L		 2330 { "(bad)", { XX } },
2331 },
2332
2333 /* PREGRP66 */
2334 {
2335 { "(bad)", { XX } },
2336 { "(bad)", { XX } },
09a2c6cf 2337 { "pmaxud", { XM, EXx } },
42903f7f
L		 2338 { "(bad)", { XX } },
2339 },
2340
2341 /* PREGRP67 */
2342 {
2343 { "(bad)", { XX } },
2344 { "(bad)", { XX } },
09a2c6cf 2345 { "pmulld", { XM, EXx } },
42903f7f
L		 2346 { "(bad)", { XX } },
2347 },
2348
2349 /* PREGRP68 */
2350 {
2351 { "(bad)", { XX } },
2352 { "(bad)", { XX } },
09a2c6cf 2353 { "phminposuw", { XM, EXx } },
42903f7f
L		 2354 { "(bad)", { XX } },
2355 },
2356
2357 /* PREGRP69 */
2358 {
2359 { "(bad)", { XX } },
2360 { "(bad)", { XX } },
09a2c6cf 2361 { "roundps", { XM, EXx, Ib } },
42903f7f
L		 2362 { "(bad)", { XX } },
2363 },
2364
2365 /* PREGRP70 */
2366 {
2367 { "(bad)", { XX } },
2368 { "(bad)", { XX } },
09a2c6cf 2369 { "roundpd", { XM, EXx, Ib } },
42903f7f
L		 2370 { "(bad)", { XX } },
2371 },
2372
2373 /* PREGRP71 */
2374 {
2375 { "(bad)", { XX } },
2376 { "(bad)", { XX } },
09a2c6cf 2377 { "roundss", { XM, EXx, Ib } },
42903f7f
L		 2378 { "(bad)", { XX } },
2379 },
2380
2381 /* PREGRP72 */
2382 {
2383 { "(bad)", { XX } },
2384 { "(bad)", { XX } },
09a2c6cf 2385 { "roundsd", { XM, EXx, Ib } },
42903f7f
L		 2386 { "(bad)", { XX } },
2387 },
2388
2389 /* PREGRP73 */
2390 {
2391 { "(bad)", { XX } },
2392 { "(bad)", { XX } },
09a2c6cf 2393 { "blendps", { XM, EXx, Ib } },
42903f7f
L		 2394 { "(bad)", { XX } },
2395 },
2396
2397 /* PREGRP74 */
2398 {
2399 { "(bad)", { XX } },
2400 { "(bad)", { XX } },
09a2c6cf 2401 { "blendpd", { XM, EXx, Ib } },
42903f7f
L		 2402 { "(bad)", { XX } },
2403 },
2404
2405 /* PREGRP75 */
2406 {
2407 { "(bad)", { XX } },
2408 { "(bad)", { XX } },
09a2c6cf 2409 { "pblendw", { XM, EXx, Ib } },
42903f7f
L		 2410 { "(bad)", { XX } },
2411 },
2412
2413 /* PREGRP76 */
2414 {
2415 { "(bad)", { XX } },
2416 { "(bad)", { XX } },
2417 { "pextrb", { Edqb, XM, Ib } },
2418 { "(bad)", { XX } },
2419 },
2420
2421 /* PREGRP77 */
2422 {
2423 { "(bad)", { XX } },
2424 { "(bad)", { XX } },
2425 { "pextrw", { Edqw, XM, Ib } },
2426 { "(bad)", { XX } },
2427 },
2428
2429 /* PREGRP78 */
2430 {
2431 { "(bad)", { XX } },
2432 { "(bad)", { XX } },
2433 { "pextrK", { Edq, XM, Ib } },
2434 { "(bad)", { XX } },
2435 },
2436
2437 /* PREGRP79 */
2438 {
2439 { "(bad)", { XX } },
2440 { "(bad)", { XX } },
2441 { "extractps", { Edqd, XM, Ib } },
2442 { "(bad)", { XX } },
2443 },
2444
2445 /* PREGRP80 */
2446 {
2447 { "(bad)", { XX } },
2448 { "(bad)", { XX } },
2449 { "pinsrb", { XM, Edqb, Ib } },
2450 { "(bad)", { XX } },
2451 },
2452
2453 /* PREGRP81 */
2454 {
2455 { "(bad)", { XX } },
2456 { "(bad)", { XX } },
09a2c6cf 2457 { "insertps", { XM, EXx, Ib } },
42903f7f
L		 2458 { "(bad)", { XX } },
2459 },
2460
2461 /* PREGRP82 */
2462 {
2463 { "(bad)", { XX } },
2464 { "(bad)", { XX } },
2465 { "pinsrK", { XM, Edq, Ib } },
2466 { "(bad)", { XX } },
2467 },
2468
2469 /* PREGRP83 */
2470 {
2471 { "(bad)", { XX } },
2472 { "(bad)", { XX } },
09a2c6cf 2473 { "dpps", { XM, EXx, Ib } },
42903f7f
L		 2474 { "(bad)", { XX } },
2475 },
2476
2477 /* PREGRP84 */
2478 {
2479 { "(bad)", { XX } },
2480 { "(bad)", { XX } },
09a2c6cf 2481 { "dppd", { XM, EXx, Ib } },
42903f7f
L		 2482 { "(bad)", { XX } },
2483 },
2484
2485 /* PREGRP85 */
2486 {
2487 { "(bad)", { XX } },
2488 { "(bad)", { XX } },
09a2c6cf 2489 { "mpsadbw", { XM, EXx, Ib } },
42903f7f
L		 2490 { "(bad)", { XX } },
2491 },
381d071f
L		 2492
2493 /* PREGRP86 */
2494 {
2495 { "(bad)", { XX } },
2496 { "(bad)", { XX } },
09a2c6cf 2497 { "pcmpgtq", { XM, EXx } },
381d071f
L		 2498 { "(bad)", { XX } },
2499 },
2500
2501 /* PREGRP87 */
2502 {
2503 { "(bad)", { XX } },
2504 { "(bad)", { XX } },
2505 { "(bad)", { XX } },
2506 { "crc32", { Gdq, { CRC32_Fixup, b_mode } } },
2507 },
2508
2509 /* PREGRP88 */
2510 {
2511 { "(bad)", { XX } },
2512 { "(bad)", { XX } },
2513 { "(bad)", { XX } },
2514 { "crc32", { Gdq, { CRC32_Fixup, v_mode } } },
2515 },
2516
2517 /* PREGRP89 */
2518 {
2519 { "(bad)", { XX } },
2520 { "(bad)", { XX } },
09a2c6cf 2521 { "pcmpestrm", { XM, EXx, Ib } },
381d071f
L		 2522 { "(bad)", { XX } },
2523 },
2524
2525 /* PREGRP90 */
2526 {
2527 { "(bad)", { XX } },
2528 { "(bad)", { XX } },
09a2c6cf 2529 { "pcmpestri", { XM, EXx, Ib } },
381d071f
L		 2530 { "(bad)", { XX } },
2531 },
2532
2533 /* PREGRP91 */
2534 {
2535 { "(bad)", { XX } },
2536 { "(bad)", { XX } },
09a2c6cf 2537 { "pcmpistrm", { XM, EXx, Ib } },
381d071f
L		 2538 { "(bad)", { XX } },
2539 },
2540
2541 /* PREGRP92 */
2542 {
2543 { "(bad)", { XX } },
2544 { "(bad)", { XX } },
09a2c6cf
L		 2545 { "pcmpistri", { XM, EXx, Ib } },
2546 { "(bad)", { XX } },
2547 },
2548
2549 /* PREGRP93 */
2550 {
2551 { "ucomiss",{ XM, EXd } },
2552 { "(bad)", { XX } },
2553 { "ucomisd",{ XM, EXq } },
2554 { "(bad)", { XX } },
2555 },
2556
2557 /* PREGRP94 */
2558 {
2559 { "comiss", { XM, EXd } },
2560 { "(bad)", { XX } },
2561 { "comisd", { XM, EXq } },
2562 { "(bad)", { XX } },
2563 },
2564
2565 /* PREGRP95 */
2566 {
2567 { "punpcklbw",{ MX, EMd } },
2568 { "(bad)", { XX } },
2569 { "punpcklbw",{ MX, EMq } },
2570 { "(bad)", { XX } },
2571 },
2572
2573 /* PREGRP96 */
2574 {
2575 { "punpcklwd",{ MX, EMd } },
2576 { "(bad)", { XX } },
2577 { "punpcklwd",{ MX, EMq } },
2578 { "(bad)", { XX } },
2579 },
2580
2581 /* PREGRP97 */
2582 {
2583 { "punpckldq",{ MX, EMd } },
2584 { "(bad)", { XX } },
2585 { "punpckldq",{ MX, EMq } },
381d071f
L		 2586 { "(bad)", { XX } },
2587 },
c608c12e
AM		 2588};
2589
6439fc28
AM		 2590static const struct dis386 x86_64_table[][2] = {
2591 {
ce518a5f
L		 2592 { "pusha{P|}", { XX } },
2593 { "(bad)", { XX } },
5f754f58
L		 2594 },
2595 {
ce518a5f
L		 2596 { "popa{P|}", { XX } },
2597 { "(bad)", { XX } },
5f754f58
L		 2598 },
2599 {
ce518a5f
L		 2600 { "bound{S|}", { Gv, Ma } },
2601 { "(bad)", { XX } },
5f754f58
L		 2602 },
2603 {
ce518a5f
L		 2604 { "arpl", { Ew, Gw } },
2605 { "movs{||lq|xd}", { Gv, Ed } },
6439fc28
AM		 2606 },
2607};
2608
96fbad73 2609static const struct dis386 three_byte_table[][256] = {
331d2d0d
L		 2610 /* THREE_BYTE_0 */
2611 {
96fbad73 2612 /* 00 */
ce518a5f
L		 2613 { "pshufb", { MX, EM } },
2614 { "phaddw", { MX, EM } },
2615 { "phaddd", { MX, EM } },
2616 { "phaddsw", { MX, EM } },
2617 { "pmaddubsw", { MX, EM } },
2618 { "phsubw", { MX, EM } },
2619 { "phsubd", { MX, EM } },
2620 { "phsubsw", { MX, EM } },
96fbad73 2621 /* 08 */
ce518a5f
L		 2622 { "psignb", { MX, EM } },
2623 { "psignw", { MX, EM } },
2624 { "psignd", { MX, EM } },
2625 { "pmulhrsw", { MX, EM } },
2626 { "(bad)", { XX } },
2627 { "(bad)", { XX } },
2628 { "(bad)", { XX } },
2629 { "(bad)", { XX } },
96fbad73 2630 /* 10 */
42903f7f 2631 { PREGRP39 },
ce518a5f
L		 2632 { "(bad)", { XX } },
2633 { "(bad)", { XX } },
2634 { "(bad)", { XX } },
42903f7f
L		 2635 { PREGRP40 },
2636 { PREGRP41 },
ce518a5f 2637 { "(bad)", { XX } },
42903f7f 2638 { PREGRP42 },
96fbad73 2639 /* 18 */
ce518a5f
L		 2640 { "(bad)", { XX } },
2641 { "(bad)", { XX } },
2642 { "(bad)", { XX } },
2643 { "(bad)", { XX } },
2644 { "pabsb", { MX, EM } },
2645 { "pabsw", { MX, EM } },
2646 { "pabsd", { MX, EM } },
2647 { "(bad)", { XX } },
96fbad73 2648 /* 20 */
42903f7f
L		 2649 { PREGRP43 },
2650 { PREGRP44 },
2651 { PREGRP45 },
2652 { PREGRP46 },
2653 { PREGRP47 },
2654 { PREGRP48 },
ce518a5f
L		 2655 { "(bad)", { XX } },
2656 { "(bad)", { XX } },
96fbad73 2657 /* 28 */
42903f7f
L		 2658 { PREGRP49 },
2659 { PREGRP50 },
2660 { PREGRP51 },
2661 { PREGRP52 },
ce518a5f
L		 2662 { "(bad)", { XX } },
2663 { "(bad)", { XX } },
2664 { "(bad)", { XX } },
2665 { "(bad)", { XX } },
96fbad73 2666 /* 30 */
42903f7f
L		 2667 { PREGRP53 },
2668 { PREGRP54 },
2669 { PREGRP55 },
2670 { PREGRP56 },
2671 { PREGRP57 },
2672 { PREGRP58 },
ce518a5f 2673 { "(bad)", { XX } },
381d071f 2674 { PREGRP86 },
96fbad73 2675 /* 38 */
42903f7f
L		 2676 { PREGRP59 },
2677 { PREGRP60 },
2678 { PREGRP61 },
2679 { PREGRP62 },
2680 { PREGRP63 },
2681 { PREGRP64 },
2682 { PREGRP65 },
2683 { PREGRP66 },
96fbad73 2684 /* 40 */
42903f7f
L		 2685 { PREGRP67 },
2686 { PREGRP68 },
ce518a5f
L		 2687 { "(bad)", { XX } },
2688 { "(bad)", { XX } },
2689 { "(bad)", { XX } },
2690 { "(bad)", { XX } },
2691 { "(bad)", { XX } },
2692 { "(bad)", { XX } },
96fbad73 2693 /* 48 */
ce518a5f
L		 2694 { "(bad)", { XX } },
2695 { "(bad)", { XX } },
2696 { "(bad)", { XX } },
2697 { "(bad)", { XX } },
2698 { "(bad)", { XX } },
2699 { "(bad)", { XX } },
2700 { "(bad)", { XX } },
2701 { "(bad)", { XX } },
96fbad73 2702 /* 50 */
ce518a5f
L		 2703 { "(bad)", { XX } },
2704 { "(bad)", { XX } },
2705 { "(bad)", { XX } },
2706 { "(bad)", { XX } },
2707 { "(bad)", { XX } },
2708 { "(bad)", { XX } },
2709 { "(bad)", { XX } },
2710 { "(bad)", { XX } },
96fbad73 2711 /* 58 */
ce518a5f
L		 2712 { "(bad)", { XX } },
2713 { "(bad)", { XX } },
2714 { "(bad)", { XX } },
2715 { "(bad)", { XX } },
2716 { "(bad)", { XX } },
2717 { "(bad)", { XX } },
2718 { "(bad)", { XX } },
2719 { "(bad)", { XX } },
96fbad73 2720 /* 60 */
ce518a5f
L		 2721 { "(bad)", { XX } },
2722 { "(bad)", { XX } },
2723 { "(bad)", { XX } },
2724 { "(bad)", { XX } },
2725 { "(bad)", { XX } },
2726 { "(bad)", { XX } },
2727 { "(bad)", { XX } },
2728 { "(bad)", { XX } },
96fbad73 2729 /* 68 */
ce518a5f
L		 2730 { "(bad)", { XX } },
2731 { "(bad)", { XX } },
2732 { "(bad)", { XX } },
2733 { "(bad)", { XX } },
2734 { "(bad)", { XX } },
2735 { "(bad)", { XX } },
2736 { "(bad)", { XX } },
2737 { "(bad)", { XX } },
96fbad73 2738 /* 70 */
ce518a5f
L		 2739 { "(bad)", { XX } },
2740 { "(bad)", { XX } },
2741 { "(bad)", { XX } },
2742 { "(bad)", { XX } },
2743 { "(bad)", { XX } },
2744 { "(bad)", { XX } },
2745 { "(bad)", { XX } },
2746 { "(bad)", { XX } },
96fbad73 2747 /* 78 */
ce518a5f
L		 2748 { "(bad)", { XX } },
2749 { "(bad)", { XX } },
2750 { "(bad)", { XX } },
2751 { "(bad)", { XX } },
2752 { "(bad)", { XX } },
2753 { "(bad)", { XX } },
2754 { "(bad)", { XX } },
2755 { "(bad)", { XX } },
96fbad73 2756 /* 80 */
ce518a5f
L		 2757 { "(bad)", { XX } },
2758 { "(bad)", { XX } },
2759 { "(bad)", { XX } },
2760 { "(bad)", { XX } },
2761 { "(bad)", { XX } },
2762 { "(bad)", { XX } },
2763 { "(bad)", { XX } },
2764 { "(bad)", { XX } },
96fbad73 2765 /* 88 */
ce518a5f
L		 2766 { "(bad)", { XX } },
2767 { "(bad)", { XX } },
2768 { "(bad)", { XX } },
2769 { "(bad)", { XX } },
2770 { "(bad)", { XX } },
2771 { "(bad)", { XX } },
2772 { "(bad)", { XX } },
2773 { "(bad)", { XX } },
96fbad73 2774 /* 90 */
ce518a5f
L		 2775 { "(bad)", { XX } },
2776 { "(bad)", { XX } },
2777 { "(bad)", { XX } },
2778 { "(bad)", { XX } },
2779 { "(bad)", { XX } },
2780 { "(bad)", { XX } },
2781 { "(bad)", { XX } },
2782 { "(bad)", { XX } },
96fbad73 2783 /* 98 */
ce518a5f
L		 2784 { "(bad)", { XX } },
2785 { "(bad)", { XX } },
2786 { "(bad)", { XX } },
2787 { "(bad)", { XX } },
2788 { "(bad)", { XX } },
2789 { "(bad)", { XX } },
2790 { "(bad)", { XX } },
2791 { "(bad)", { XX } },
96fbad73 2792 /* a0 */
ce518a5f
L		 2793 { "(bad)", { XX } },
2794 { "(bad)", { XX } },
2795 { "(bad)", { XX } },
2796 { "(bad)", { XX } },
2797 { "(bad)", { XX } },
2798 { "(bad)", { XX } },
2799 { "(bad)", { XX } },
2800 { "(bad)", { XX } },
96fbad73 2801 /* a8 */
ce518a5f
L		 2802 { "(bad)", { XX } },
2803 { "(bad)", { XX } },
2804 { "(bad)", { XX } },
2805 { "(bad)", { XX } },
2806 { "(bad)", { XX } },
2807 { "(bad)", { XX } },
2808 { "(bad)", { XX } },
2809 { "(bad)", { XX } },
96fbad73 2810 /* b0 */
ce518a5f
L		 2811 { "(bad)", { XX } },
2812 { "(bad)", { XX } },
2813 { "(bad)", { XX } },
2814 { "(bad)", { XX } },
2815 { "(bad)", { XX } },
2816 { "(bad)", { XX } },
2817 { "(bad)", { XX } },
2818 { "(bad)", { XX } },
96fbad73 2819 /* b8 */
ce518a5f
L		 2820 { "(bad)", { XX } },
2821 { "(bad)", { XX } },
2822 { "(bad)", { XX } },
2823 { "(bad)", { XX } },
2824 { "(bad)", { XX } },
2825 { "(bad)", { XX } },
2826 { "(bad)", { XX } },
2827 { "(bad)", { XX } },
96fbad73 2828 /* c0 */
ce518a5f
L		 2829 { "(bad)", { XX } },
2830 { "(bad)", { XX } },
2831 { "(bad)", { XX } },
2832 { "(bad)", { XX } },
2833 { "(bad)", { XX } },
2834 { "(bad)", { XX } },
2835 { "(bad)", { XX } },
2836 { "(bad)", { XX } },
96fbad73 2837 /* c8 */
ce518a5f
L		 2838 { "(bad)", { XX } },
2839 { "(bad)", { XX } },
2840 { "(bad)", { XX } },
2841 { "(bad)", { XX } },
2842 { "(bad)", { XX } },
2843 { "(bad)", { XX } },
2844 { "(bad)", { XX } },
2845 { "(bad)", { XX } },
96fbad73 2846 /* d0 */
ce518a5f
L		 2847 { "(bad)", { XX } },
2848 { "(bad)", { XX } },
2849 { "(bad)", { XX } },
2850 { "(bad)", { XX } },
2851 { "(bad)", { XX } },
2852 { "(bad)", { XX } },
2853 { "(bad)", { XX } },
2854 { "(bad)", { XX } },
96fbad73 2855 /* d8 */
ce518a5f
L		 2856 { "(bad)", { XX } },
2857 { "(bad)", { XX } },
2858 { "(bad)", { XX } },
2859 { "(bad)", { XX } },
2860 { "(bad)", { XX } },
2861 { "(bad)", { XX } },
2862 { "(bad)", { XX } },
2863 { "(bad)", { XX } },
96fbad73 2864 /* e0 */
ce518a5f
L		 2865 { "(bad)", { XX } },
2866 { "(bad)", { XX } },
2867 { "(bad)", { XX } },
2868 { "(bad)", { XX } },
2869 { "(bad)", { XX } },
2870 { "(bad)", { XX } },
2871 { "(bad)", { XX } },
2872 { "(bad)", { XX } },
96fbad73 2873 /* e8 */
ce518a5f
L		 2874 { "(bad)", { XX } },
2875 { "(bad)", { XX } },
2876 { "(bad)", { XX } },
2877 { "(bad)", { XX } },
2878 { "(bad)", { XX } },
2879 { "(bad)", { XX } },
2880 { "(bad)", { XX } },
2881 { "(bad)", { XX } },
96fbad73 2882 /* f0 */
381d071f
L		 2883 { PREGRP87 },
2884 { PREGRP88 },
ce518a5f
L		 2885 { "(bad)", { XX } },
2886 { "(bad)", { XX } },
2887 { "(bad)", { XX } },
2888 { "(bad)", { XX } },
2889 { "(bad)", { XX } },
2890 { "(bad)", { XX } },
96fbad73 2891 /* f8 */
ce518a5f
L		 2892 { "(bad)", { XX } },
2893 { "(bad)", { XX } },
2894 { "(bad)", { XX } },
2895 { "(bad)", { XX } },
2896 { "(bad)", { XX } },
2897 { "(bad)", { XX } },
2898 { "(bad)", { XX } },
2899 { "(bad)", { XX } },
331d2d0d
L		 2900 },
2901 /* THREE_BYTE_1 */
2902 {
96fbad73 2903 /* 00 */
ce518a5f
L		 2904 { "(bad)", { XX } },
2905 { "(bad)", { XX } },
2906 { "(bad)", { XX } },
2907 { "(bad)", { XX } },
2908 { "(bad)", { XX } },
2909 { "(bad)", { XX } },
2910 { "(bad)", { XX } },
2911 { "(bad)", { XX } },
96fbad73 2912 /* 08 */
42903f7f
L		 2913 { PREGRP69 },
2914 { PREGRP70 },
2915 { PREGRP71 },
2916 { PREGRP72 },
2917 { PREGRP73 },
2918 { PREGRP74 },
2919 { PREGRP75 },
ce518a5f 2920 { "palignr", { MX, EM, Ib } },
96fbad73 2921 /* 10 */
ce518a5f
L		 2922 { "(bad)", { XX } },
2923 { "(bad)", { XX } },
2924 { "(bad)", { XX } },
2925 { "(bad)", { XX } },
42903f7f
L		 2926 { PREGRP76 },
2927 { PREGRP77 },
2928 { PREGRP78 },
2929 { PREGRP79 },
96fbad73 2930 /* 18 */
ce518a5f
L		 2931 { "(bad)", { XX } },
2932 { "(bad)", { XX } },
2933 { "(bad)", { XX } },
2934 { "(bad)", { XX } },
2935 { "(bad)", { XX } },
2936 { "(bad)", { XX } },
2937 { "(bad)", { XX } },
2938 { "(bad)", { XX } },
96fbad73 2939 /* 20 */
42903f7f
L		 2940 { PREGRP80 },
2941 { PREGRP81 },
2942 { PREGRP82 },
ce518a5f
L		 2943 { "(bad)", { XX } },
2944 { "(bad)", { XX } },
2945 { "(bad)", { XX } },
2946 { "(bad)", { XX } },
2947 { "(bad)", { XX } },
96fbad73 2948 /* 28 */
ce518a5f
L		 2949 { "(bad)", { XX } },
2950 { "(bad)", { XX } },
2951 { "(bad)", { XX } },
2952 { "(bad)", { XX } },
2953 { "(bad)", { XX } },
2954 { "(bad)", { XX } },
2955 { "(bad)", { XX } },
2956 { "(bad)", { XX } },
96fbad73 2957 /* 30 */
ce518a5f
L		 2958 { "(bad)", { XX } },
2959 { "(bad)", { XX } },
2960 { "(bad)", { XX } },
2961 { "(bad)", { XX } },
2962 { "(bad)", { XX } },
2963 { "(bad)", { XX } },
2964 { "(bad)", { XX } },
2965 { "(bad)", { XX } },
96fbad73 2966 /* 38 */
ce518a5f
L		 2967 { "(bad)", { XX } },
2968 { "(bad)", { XX } },
2969 { "(bad)", { XX } },
2970 { "(bad)", { XX } },
2971 { "(bad)", { XX } },
2972 { "(bad)", { XX } },
2973 { "(bad)", { XX } },
2974 { "(bad)", { XX } },
96fbad73 2975 /* 40 */
42903f7f
L		 2976 { PREGRP83 },
2977 { PREGRP84 },
2978 { PREGRP85 },
ce518a5f
L		 2979 { "(bad)", { XX } },
2980 { "(bad)", { XX } },
2981 { "(bad)", { XX } },
2982 { "(bad)", { XX } },
2983 { "(bad)", { XX } },
96fbad73 2984 /* 48 */
ce518a5f
L		 2985 { "(bad)", { XX } },
2986 { "(bad)", { XX } },
2987 { "(bad)", { XX } },
2988 { "(bad)", { XX } },
2989 { "(bad)", { XX } },
2990 { "(bad)", { XX } },
2991 { "(bad)", { XX } },
2992 { "(bad)", { XX } },
96fbad73 2993 /* 50 */
ce518a5f
L		 2994 { "(bad)", { XX } },
2995 { "(bad)", { XX } },
2996 { "(bad)", { XX } },
2997 { "(bad)", { XX } },
2998 { "(bad)", { XX } },
2999 { "(bad)", { XX } },
3000 { "(bad)", { XX } },
3001 { "(bad)", { XX } },
96fbad73 3002 /* 58 */
ce518a5f
L		 3003 { "(bad)", { XX } },
3004 { "(bad)", { XX } },
3005 { "(bad)", { XX } },
3006 { "(bad)", { XX } },
3007 { "(bad)", { XX } },
3008 { "(bad)", { XX } },
3009 { "(bad)", { XX } },
3010 { "(bad)", { XX } },
96fbad73 3011 /* 60 */
381d071f
L		 3012 { PREGRP89 },
3013 { PREGRP90 },
3014 { PREGRP91 },
3015 { PREGRP92 },
ce518a5f
L		 3016 { "(bad)", { XX } },
3017 { "(bad)", { XX } },
3018 { "(bad)", { XX } },
3019 { "(bad)", { XX } },
96fbad73 3020 /* 68 */
ce518a5f
L		 3021 { "(bad)", { XX } },
3022 { "(bad)", { XX } },
3023 { "(bad)", { XX } },
3024 { "(bad)", { XX } },
3025 { "(bad)", { XX } },
3026 { "(bad)", { XX } },
3027 { "(bad)", { XX } },
3028 { "(bad)", { XX } },
96fbad73 3029 /* 70 */
ce518a5f
L		 3030 { "(bad)", { XX } },
3031 { "(bad)", { XX } },
3032 { "(bad)", { XX } },
3033 { "(bad)", { XX } },
3034 { "(bad)", { XX } },
3035 { "(bad)", { XX } },
3036 { "(bad)", { XX } },
3037 { "(bad)", { XX } },
96fbad73 3038 /* 78 */
ce518a5f
L		 3039 { "(bad)", { XX } },
3040 { "(bad)", { XX } },
3041 { "(bad)", { XX } },
3042 { "(bad)", { XX } },
3043 { "(bad)", { XX } },
3044 { "(bad)", { XX } },
3045 { "(bad)", { XX } },
3046 { "(bad)", { XX } },
96fbad73 3047 /* 80 */
ce518a5f
L		 3048 { "(bad)", { XX } },
3049 { "(bad)", { XX } },
3050 { "(bad)", { XX } },
3051 { "(bad)", { XX } },
3052 { "(bad)", { XX } },
3053 { "(bad)", { XX } },
3054 { "(bad)", { XX } },
3055 { "(bad)", { XX } },
96fbad73 3056 /* 88 */
ce518a5f
L		 3057 { "(bad)", { XX } },
3058 { "(bad)", { XX } },
3059 { "(bad)", { XX } },
3060 { "(bad)", { XX } },
3061 { "(bad)", { XX } },
3062 { "(bad)", { XX } },
3063 { "(bad)", { XX } },
3064 { "(bad)", { XX } },
96fbad73 3065 /* 90 */
ce518a5f
L		 3066 { "(bad)", { XX } },
3067 { "(bad)", { XX } },
3068 { "(bad)", { XX } },
3069 { "(bad)", { XX } },
3070 { "(bad)", { XX } },
3071 { "(bad)", { XX } },
3072 { "(bad)", { XX } },
3073 { "(bad)", { XX } },
96fbad73 3074 /* 98 */
ce518a5f
L		 3075 { "(bad)", { XX } },
3076 { "(bad)", { XX } },
3077 { "(bad)", { XX } },
3078 { "(bad)", { XX } },
3079 { "(bad)", { XX } },
3080 { "(bad)", { XX } },
3081 { "(bad)", { XX } },
3082 { "(bad)", { XX } },
96fbad73 3083 /* a0 */
ce518a5f
L		 3084 { "(bad)", { XX } },
3085 { "(bad)", { XX } },
3086 { "(bad)", { XX } },
3087 { "(bad)", { XX } },
3088 { "(bad)", { XX } },
3089 { "(bad)", { XX } },
3090 { "(bad)", { XX } },
3091 { "(bad)", { XX } },
96fbad73 3092 /* a8 */
ce518a5f
L		 3093 { "(bad)", { XX } },
3094 { "(bad)", { XX } },
3095 { "(bad)", { XX } },
3096 { "(bad)", { XX } },
3097 { "(bad)", { XX } },
3098 { "(bad)", { XX } },
3099 { "(bad)", { XX } },
3100 { "(bad)", { XX } },
96fbad73 3101 /* b0 */
ce518a5f
L		 3102 { "(bad)", { XX } },
3103 { "(bad)", { XX } },
3104 { "(bad)", { XX } },
3105 { "(bad)", { XX } },
3106 { "(bad)", { XX } },
3107 { "(bad)", { XX } },
3108 { "(bad)", { XX } },
3109 { "(bad)", { XX } },
96fbad73 3110 /* b8 */
ce518a5f
L		 3111 { "(bad)", { XX } },
3112 { "(bad)", { XX } },
3113 { "(bad)", { XX } },
3114 { "(bad)", { XX } },
3115 { "(bad)", { XX } },
3116 { "(bad)", { XX } },
3117 { "(bad)", { XX } },
3118 { "(bad)", { XX } },
96fbad73 3119 /* c0 */
ce518a5f
L		 3120 { "(bad)", { XX } },
3121 { "(bad)", { XX } },
3122 { "(bad)", { XX } },
3123 { "(bad)", { XX } },
3124 { "(bad)", { XX } },
3125 { "(bad)", { XX } },
3126 { "(bad)", { XX } },
3127 { "(bad)", { XX } },
96fbad73 3128 /* c8 */
ce518a5f
L		 3129 { "(bad)", { XX } },
3130 { "(bad)", { XX } },
3131 { "(bad)", { XX } },
3132 { "(bad)", { XX } },
3133 { "(bad)", { XX } },
3134 { "(bad)", { XX } },
3135 { "(bad)", { XX } },
3136 { "(bad)", { XX } },
96fbad73 3137 /* d0 */
ce518a5f
L		 3138 { "(bad)", { XX } },
3139 { "(bad)", { XX } },
3140 { "(bad)", { XX } },
3141 { "(bad)", { XX } },
3142 { "(bad)", { XX } },
3143 { "(bad)", { XX } },
3144 { "(bad)", { XX } },
3145 { "(bad)", { XX } },
96fbad73 3146 /* d8 */
ce518a5f
L		 3147 { "(bad)", { XX } },
3148 { "(bad)", { XX } },
3149 { "(bad)", { XX } },
3150 { "(bad)", { XX } },
3151 { "(bad)", { XX } },
3152 { "(bad)", { XX } },
3153 { "(bad)", { XX } },
3154 { "(bad)", { XX } },
96fbad73 3155 /* e0 */
ce518a5f
L		 3156 { "(bad)", { XX } },
3157 { "(bad)", { XX } },
3158 { "(bad)", { XX } },
3159 { "(bad)", { XX } },
3160 { "(bad)", { XX } },
3161 { "(bad)", { XX } },
3162 { "(bad)", { XX } },
3163 { "(bad)", { XX } },
96fbad73 3164 /* e8 */
ce518a5f
L		 3165 { "(bad)", { XX } },
3166 { "(bad)", { XX } },
3167 { "(bad)", { XX } },
3168 { "(bad)", { XX } },
3169 { "(bad)", { XX } },
3170 { "(bad)", { XX } },
3171 { "(bad)", { XX } },
3172 { "(bad)", { XX } },
96fbad73 3173 /* f0 */
ce518a5f
L		 3174 { "(bad)", { XX } },
3175 { "(bad)", { XX } },
3176 { "(bad)", { XX } },
3177 { "(bad)", { XX } },
3178 { "(bad)", { XX } },
3179 { "(bad)", { XX } },
3180 { "(bad)", { XX } },
3181 { "(bad)", { XX } },
96fbad73 3182 /* f8 */
ce518a5f
L		 3183 { "(bad)", { XX } },
3184 { "(bad)", { XX } },
3185 { "(bad)", { XX } },
3186 { "(bad)", { XX } },
3187 { "(bad)", { XX } },
3188 { "(bad)", { XX } },
3189 { "(bad)", { XX } },
3190 { "(bad)", { XX } },
3191 }
331d2d0d
L		 3192};
3193
c608c12e
AM		 3194#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3195
252b5132 3196static void
26ca5450 3197ckprefix (void)
252b5132 3198{
52b15da3
JH		 3199 int newrex;
3200 rex = 0;
252b5132 3201 prefixes = 0;
7d421014 3202 used_prefixes = 0;
52b15da3 3203 rex_used = 0;
252b5132
RH		 3204 while (1)
3205 {
3206 FETCH_DATA (the_info, codep + 1);
52b15da3 3207 newrex = 0;
252b5132
RH		 3208 switch (*codep)
3209 {
52b15da3
JH		 3210 /* REX prefixes family. */
3211 case 0x40:
3212 case 0x41:
3213 case 0x42:
3214 case 0x43:
3215 case 0x44:
3216 case 0x45:
3217 case 0x46:
3218 case 0x47:
3219 case 0x48:
3220 case 0x49:
3221 case 0x4a:
3222 case 0x4b:
3223 case 0x4c:
3224 case 0x4d:
3225 case 0x4e:
3226 case 0x4f:
cb712a9e 3227 if (address_mode == mode_64bit)
52b15da3
JH		 3228 newrex = *codep;
3229 else
3230 return;
3231 break;
252b5132
RH		 3232 case 0xf3:
3233 prefixes |= PREFIX_REPZ;
3234 break;
3235 case 0xf2:
3236 prefixes |= PREFIX_REPNZ;
3237 break;
3238 case 0xf0:
3239 prefixes |= PREFIX_LOCK;
3240 break;
3241 case 0x2e:
3242 prefixes |= PREFIX_CS;
3243 break;
3244 case 0x36:
3245 prefixes |= PREFIX_SS;
3246 break;
3247 case 0x3e:
3248 prefixes |= PREFIX_DS;
3249 break;
3250 case 0x26:
3251 prefixes |= PREFIX_ES;
3252 break;
3253 case 0x64:
3254 prefixes |= PREFIX_FS;
3255 break;
3256 case 0x65:
3257 prefixes |= PREFIX_GS;
3258 break;
3259 case 0x66:
3260 prefixes |= PREFIX_DATA;
3261 break;
3262 case 0x67:
3263 prefixes |= PREFIX_ADDR;
3264 break;
5076851f 3265 case FWAIT_OPCODE:
252b5132
RH		 3266 /* fwait is really an instruction. If there are prefixes
3267 before the fwait, they belong to the fwait, *not* to the
3268 following instruction. */
3e7d61b2 3269 if (prefixes || rex)
252b5132
RH		 3270 {
3271 prefixes |= PREFIX_FWAIT;
3272 codep++;
3273 return;
3274 }
3275 prefixes = PREFIX_FWAIT;
3276 break;
3277 default:
3278 return;
3279 }
52b15da3
JH		 3280 /* Rex is ignored when followed by another prefix. */
3281 if (rex)
3282 {
3e7d61b2
AM		 3283 rex_used = rex;
3284 return;
52b15da3
JH		 3285 }
3286 rex = newrex;
252b5132
RH		 3287 codep++;
3288 }
3289}
3290
7d421014
ILT		 3291/* Return the name of the prefix byte PREF, or NULL if PREF is not a
3292 prefix byte. */
3293
3294static const char *
26ca5450 3295prefix_name (int pref, int sizeflag)
7d421014 3296{
0003779b
L		 3297 static const char *rexes [16] =
3298 {
3299 "rex", /* 0x40 */
3300 "rex.B", /* 0x41 */
3301 "rex.X", /* 0x42 */
3302 "rex.XB", /* 0x43 */
3303 "rex.R", /* 0x44 */
3304 "rex.RB", /* 0x45 */
3305 "rex.RX", /* 0x46 */
3306 "rex.RXB", /* 0x47 */
3307 "rex.W", /* 0x48 */
3308 "rex.WB", /* 0x49 */
3309 "rex.WX", /* 0x4a */
3310 "rex.WXB", /* 0x4b */
3311 "rex.WR", /* 0x4c */
3312 "rex.WRB", /* 0x4d */
3313 "rex.WRX", /* 0x4e */
3314 "rex.WRXB", /* 0x4f */
3315 };
3316
7d421014
ILT		 3317 switch (pref)
3318 {
52b15da3
JH		 3319 /* REX prefixes family. */
3320 case 0x40:
52b15da3 3321 case 0x41:
52b15da3 3322 case 0x42:
52b15da3 3323 case 0x43:
52b15da3 3324 case 0x44:
52b15da3 3325 case 0x45:
52b15da3 3326 case 0x46:
52b15da3 3327 case 0x47:
52b15da3 3328 case 0x48:
52b15da3 3329 case 0x49:
52b15da3 3330 case 0x4a:
52b15da3 3331 case 0x4b:
52b15da3 3332 case 0x4c:
52b15da3 3333 case 0x4d:
52b15da3 3334 case 0x4e:
52b15da3 3335 case 0x4f:
0003779b 3336 return rexes [pref - 0x40];
7d421014
ILT		 3337 case 0xf3:
3338 return "repz";
3339 case 0xf2:
3340 return "repnz";
3341 case 0xf0:
3342 return "lock";
3343 case 0x2e:
3344 return "cs";
3345 case 0x36:
3346 return "ss";
3347 case 0x3e:
3348 return "ds";
3349 case 0x26:
3350 return "es";
3351 case 0x64:
3352 return "fs";
3353 case 0x65:
3354 return "gs";
3355 case 0x66:
3356 return (sizeflag & DFLAG) ? "data16" : "data32";
3357 case 0x67:
cb712a9e 3358 if (address_mode == mode_64bit)
db6eb5be 3359 return (sizeflag & AFLAG) ? "addr32" : "addr64";
c1a64871 3360 else
2888cb7a 3361 return (sizeflag & AFLAG) ? "addr16" : "addr32";
7d421014
ILT		 3362 case FWAIT_OPCODE:
3363 return "fwait";
3364 default:
3365 return NULL;
3366 }
3367}
3368
ce518a5f
L		 3369static char op_out[MAX_OPERANDS][100];
3370static int op_ad, op_index[MAX_OPERANDS];
1d9f512f 3371static int two_source_ops;
ce518a5f
L		 3372static bfd_vma op_address[MAX_OPERANDS];
3373static bfd_vma op_riprel[MAX_OPERANDS];
52b15da3 3374static bfd_vma start_pc;
ce518a5f 3375
252b5132
RH		 3376/*
3377 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3378 * (see topic "Redundant prefixes" in the "Differences from 8086"
3379 * section of the "Virtual 8086 Mode" chapter.)
3380 * 'pc' should be the address of this instruction, it will
3381 * be used to print the target address if this is a relative jump or call
3382 * The function returns the length of this instruction in bytes.
3383 */
3384
252b5132
RH		 3385static char intel_syntax;
3386static char open_char;
3387static char close_char;
3388static char separator_char;
3389static char scale_char;
3390
e396998b
AM		 3391/* Here for backwards compatibility. When gdb stops using
3392 print_insn_i386_att and print_insn_i386_intel these functions can
3393 disappear, and print_insn_i386 be merged into print_insn. */
252b5132 3394int
26ca5450 3395print_insn_i386_att (bfd_vma pc, disassemble_info *info)
252b5132
RH		 3396{
3397 intel_syntax = 0;
e396998b
AM		 3398
3399 return print_insn (pc, info);
252b5132
RH		 3400}
3401
3402int
26ca5450 3403print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
252b5132
RH		 3404{
3405 intel_syntax = 1;
e396998b
AM		 3406
3407 return print_insn (pc, info);
252b5132
RH		 3408}
3409
e396998b 3410int
26ca5450 3411print_insn_i386 (bfd_vma pc, disassemble_info *info)
e396998b
AM		 3412{
3413 intel_syntax = -1;
3414
3415 return print_insn (pc, info);
3416}
3417
f59a29b9
L		 3418void
3419print_i386_disassembler_options (FILE *stream)
3420{
3421 fprintf (stream, _("\n\
3422The following i386/x86-64 specific disassembler options are supported for use\n\
3423with the -M switch (multiple options should be separated by commas):\n"));
3424
3425 fprintf (stream, _(" x86-64 Disassemble in 64bit mode\n"));
3426 fprintf (stream, _(" i386 Disassemble in 32bit mode\n"));
3427 fprintf (stream, _(" i8086 Disassemble in 16bit mode\n"));
3428 fprintf (stream, _(" att Display instruction in AT&T syntax\n"));
3429 fprintf (stream, _(" intel Display instruction in Intel syntax\n"));
3430 fprintf (stream, _(" addr64 Assume 64bit address size\n"));
3431 fprintf (stream, _(" addr32 Assume 32bit address size\n"));
3432 fprintf (stream, _(" addr16 Assume 16bit address size\n"));
3433 fprintf (stream, _(" data32 Assume 32bit data size\n"));
3434 fprintf (stream, _(" data16 Assume 16bit data size\n"));
3435 fprintf (stream, _(" suffix Always display instruction suffix in AT&T syntax\n"));
3436}
3437
e396998b 3438static int
26ca5450 3439print_insn (bfd_vma pc, disassemble_info *info)
252b5132 3440{
2da11e11 3441 const struct dis386 *dp;
252b5132 3442 int i;
ce518a5f 3443 char *op_txt[MAX_OPERANDS];
252b5132 3444 int needcomma;
eec0f4ca
L		 3445 unsigned char uses_DATA_prefix, uses_LOCK_prefix;
3446 unsigned char uses_REPNZ_prefix, uses_REPZ_prefix;
e396998b
AM		 3447 int sizeflag;
3448 const char *p;
252b5132 3449 struct dis_private priv;
eec0f4ca 3450 unsigned char op;
252b5132 3451
cb712a9e
L		 3452 if (info->mach == bfd_mach_x86_64_intel_syntax
3453 || info->mach == bfd_mach_x86_64)
3454 address_mode = mode_64bit;
3455 else
3456 address_mode = mode_32bit;
52b15da3 3457
8373f971 3458 if (intel_syntax == (char) -1)
e396998b
AM		 3459 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
3460 || info->mach == bfd_mach_x86_64_intel_syntax);
3461
2da11e11 3462 if (info->mach == bfd_mach_i386_i386
52b15da3
JH		 3463 || info->mach == bfd_mach_x86_64
3464 || info->mach == bfd_mach_i386_i386_intel_syntax
3465 || info->mach == bfd_mach_x86_64_intel_syntax)
e396998b 3466 priv.orig_sizeflag = AFLAG | DFLAG;
2da11e11 3467 else if (info->mach == bfd_mach_i386_i8086)
e396998b 3468 priv.orig_sizeflag = 0;
2da11e11
AM		 3469 else
3470 abort ();
e396998b
AM		 3471
3472 for (p = info->disassembler_options; p != NULL; )
3473 {
0112cd26 3474 if (CONST_STRNEQ (p, "x86-64"))
e396998b 3475 {
cb712a9e 3476 address_mode = mode_64bit;
e396998b
AM		 3477 priv.orig_sizeflag = AFLAG | DFLAG;
3478 }
0112cd26 3479 else if (CONST_STRNEQ (p, "i386"))
e396998b 3480 {
cb712a9e 3481 address_mode = mode_32bit;
e396998b
AM		 3482 priv.orig_sizeflag = AFLAG | DFLAG;
3483 }
0112cd26 3484 else if (CONST_STRNEQ (p, "i8086"))
e396998b 3485 {
cb712a9e 3486 address_mode = mode_16bit;
e396998b
AM		 3487 priv.orig_sizeflag = 0;
3488 }
0112cd26 3489 else if (CONST_STRNEQ (p, "intel"))
e396998b
AM		 3490 {
3491 intel_syntax = 1;
3492 }
0112cd26 3493 else if (CONST_STRNEQ (p, "att"))
e396998b
AM		 3494 {
3495 intel_syntax = 0;
3496 }
0112cd26 3497 else if (CONST_STRNEQ (p, "addr"))
e396998b 3498 {
f59a29b9
L		 3499 if (address_mode == mode_64bit)
3500 {
3501 if (p[4] == '3' && p[5] == '2')
3502 priv.orig_sizeflag &= ~AFLAG;
3503 else if (p[4] == '6' && p[5] == '4')
3504 priv.orig_sizeflag |= AFLAG;
3505 }
3506 else
3507 {
3508 if (p[4] == '1' && p[5] == '6')
3509 priv.orig_sizeflag &= ~AFLAG;
3510 else if (p[4] == '3' && p[5] == '2')
3511 priv.orig_sizeflag |= AFLAG;
3512 }
e396998b 3513 }
0112cd26 3514 else if (CONST_STRNEQ (p, "data"))
e396998b
AM		 3515 {
3516 if (p[4] == '1' && p[5] == '6')
3517 priv.orig_sizeflag &= ~DFLAG;
3518 else if (p[4] == '3' && p[5] == '2')
3519 priv.orig_sizeflag |= DFLAG;
3520 }
0112cd26 3521 else if (CONST_STRNEQ (p, "suffix"))
e396998b
AM		 3522 priv.orig_sizeflag |= SUFFIX_ALWAYS;
3523
3524 p = strchr (p, ',');
3525 if (p != NULL)
3526 p++;
3527 }
3528
3529 if (intel_syntax)
3530 {
3531 names64 = intel_names64;
3532 names32 = intel_names32;
3533 names16 = intel_names16;
3534 names8 = intel_names8;
3535 names8rex = intel_names8rex;
3536 names_seg = intel_names_seg;
3537 index16 = intel_index16;
3538 open_char = '[';
3539 close_char = ']';
3540 separator_char = '+';
3541 scale_char = '*';
3542 }
3543 else
3544 {
3545 names64 = att_names64;
3546 names32 = att_names32;
3547 names16 = att_names16;
3548 names8 = att_names8;
3549 names8rex = att_names8rex;
3550 names_seg = att_names_seg;
3551 index16 = att_index16;
3552 open_char = '(';
3553 close_char = ')';
3554 separator_char = ',';
3555 scale_char = ',';
3556 }
2da11e11 3557
4fe53c98 3558 /* The output looks better if we put 7 bytes on a line, since that
c608c12e 3559 puts most long word instructions on a single line. */
4fe53c98 3560 info->bytes_per_line = 7;
252b5132 3561
26ca5450 3562 info->private_data = &priv;
252b5132
RH		 3563 priv.max_fetched = priv.the_buffer;
3564 priv.insn_start = pc;
252b5132
RH		 3565
3566 obuf[0] = 0;
ce518a5f
L		 3567 for (i = 0; i < MAX_OPERANDS; ++i)
3568 {
3569 op_out[i][0] = 0;
3570 op_index[i] = -1;
3571 }
252b5132
RH		 3572
3573 the_info = info;
3574 start_pc = pc;
e396998b
AM		 3575 start_codep = priv.the_buffer;
3576 codep = priv.the_buffer;
252b5132 3577
5076851f
ILT		 3578 if (setjmp (priv.bailout) != 0)
3579 {
7d421014
ILT		 3580 const char *name;
3581
5076851f 3582 /* Getting here means we tried for data but didn't get it. That
e396998b
AM		 3583 means we have an incomplete instruction of some sort. Just
3584 print the first byte as a prefix or a .byte pseudo-op. */
3585 if (codep > priv.the_buffer)
5076851f 3586 {
e396998b 3587 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 3588 if (name != NULL)
3589 (*info->fprintf_func) (info->stream, "%s", name);
3590 else
5076851f 3591 {
7d421014
ILT		 3592 /* Just print the first byte as a .byte instruction. */
3593 (*info->fprintf_func) (info->stream, ".byte 0x%x",
e396998b 3594 (unsigned int) priv.the_buffer[0]);
5076851f 3595 }
5076851f 3596
7d421014 3597 return 1;
5076851f
ILT		 3598 }
3599
3600 return -1;
3601 }
3602
52b15da3 3603 obufp = obuf;
252b5132
RH		 3604 ckprefix ();
3605
3606 insn_codep = codep;
e396998b 3607 sizeflag = priv.orig_sizeflag;
252b5132
RH		 3608
3609 FETCH_DATA (info, codep + 1);
3610 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3611
3e7d61b2
AM		 3612 if (((prefixes & PREFIX_FWAIT)
3613 && ((*codep < 0xd8) || (*codep > 0xdf)))
3614 || (rex && rex_used))
252b5132 3615 {
7d421014
ILT		 3616 const char *name;
3617
3e7d61b2
AM		 3618 /* fwait not followed by floating point instruction, or rex followed
3619 by other prefixes. Print the first prefix. */
e396998b 3620 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 3621 if (name == NULL)
3622 name = INTERNAL_DISASSEMBLER_ERROR;
3623 (*info->fprintf_func) (info->stream, "%s", name);
3624 return 1;
252b5132
RH		 3625 }
3626
eec0f4ca 3627 op = 0;
252b5132
RH		 3628 if (*codep == 0x0f)
3629 {
eec0f4ca 3630 unsigned char threebyte;
252b5132 3631 FETCH_DATA (info, codep + 2);
eec0f4ca
L		 3632 threebyte = *++codep;
3633 dp = &dis386_twobyte[threebyte];
252b5132 3634 need_modrm = twobyte_has_modrm[*codep];
eec0f4ca
L		 3635 uses_DATA_prefix = twobyte_uses_DATA_prefix[*codep];
3636 uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[*codep];
3637 uses_REPZ_prefix = twobyte_uses_REPZ_prefix[*codep];
c4a530c5 3638 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
eec0f4ca 3639 codep++;
ce518a5f 3640 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
eec0f4ca
L		 3641 {
3642 FETCH_DATA (info, codep + 2);
3643 op = *codep++;
3644 switch (threebyte)
3645 {
3646 case 0x38:
3647 uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op];
3648 uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op];
3649 uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op];
3650 break;
3651 case 0x3a:
3652 uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op];
3653 uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op];
3654 uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op];
3655 break;
3656 default:
3657 break;
3658 }
3659 }
252b5132
RH		 3660 }
3661 else
3662 {
6439fc28 3663 dp = &dis386[*codep];
252b5132 3664 need_modrm = onebyte_has_modrm[*codep];
eec0f4ca
L		 3665 uses_DATA_prefix = 0;
3666 uses_REPNZ_prefix = 0;
8b38ad71
L		 3667 /* pause is 0xf3 0x90. */
3668 uses_REPZ_prefix = *codep == 0x90;
c4a530c5 3669 uses_LOCK_prefix = 0;
eec0f4ca 3670 codep++;
252b5132 3671 }
246c51aa 3672
eec0f4ca 3673 if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ))
7d421014
ILT		 3674 {
3675 oappend ("repz ");
3676 used_prefixes |= PREFIX_REPZ;
3677 }
eec0f4ca 3678 if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ))
7d421014
ILT		 3679 {
3680 oappend ("repnz ");
3681 used_prefixes |= PREFIX_REPNZ;
3682 }
050dfa73 3683
c4a530c5 3684 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
7d421014
ILT		 3685 {
3686 oappend ("lock ");
3687 used_prefixes |= PREFIX_LOCK;
3688 }
c608c12e 3689
c608c12e
AM		 3690 if (prefixes & PREFIX_ADDR)
3691 {
3692 sizeflag ^= AFLAG;
ce518a5f 3693 if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
3ffd33cf 3694 {
cb712a9e 3695 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3ffd33cf
AM		 3696 oappend ("addr32 ");
3697 else
3698 oappend ("addr16 ");
3699 used_prefixes |= PREFIX_ADDR;
3700 }
3701 }
3702
eec0f4ca 3703 if (!uses_DATA_prefix && (prefixes & PREFIX_DATA))
3ffd33cf
AM		 3704 {
3705 sizeflag ^= DFLAG;
ce518a5f
L		 3706 if (dp->op[2].bytemode == cond_jump_mode
3707 && dp->op[0].bytemode == v_mode
6439fc28 3708 && !intel_syntax)
3ffd33cf
AM		 3709 {
3710 if (sizeflag & DFLAG)
3711 oappend ("data32 ");
3712 else
3713 oappend ("data16 ");
3714 used_prefixes |= PREFIX_DATA;
3715 }
3716 }
3717
ce518a5f 3718 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
331d2d0d 3719 {
ce518a5f 3720 dp = &three_byte_table[dp->op[1].bytemode][op];
7967e09e
L		 3721 modrm.mod = (*codep >> 6) & 3;
3722 modrm.reg = (*codep >> 3) & 7;
3723 modrm.rm = *codep & 7;
331d2d0d
L		 3724 }
3725 else if (need_modrm)
252b5132
RH		 3726 {
3727 FETCH_DATA (info, codep + 1);
7967e09e
L		 3728 modrm.mod = (*codep >> 6) & 3;
3729 modrm.reg = (*codep >> 3) & 7;
3730 modrm.rm = *codep & 7;
252b5132
RH		 3731 }
3732
ce518a5f 3733 if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
252b5132
RH		 3734 {
3735 dofloat (sizeflag);
3736 }
3737 else
3738 {
041bd2e0 3739 int index;
252b5132 3740 if (dp->name == NULL)
c608c12e 3741 {
ce518a5f 3742 switch (dp->op[0].bytemode)
c608c12e 3743 {
6439fc28 3744 case USE_GROUPS:
7967e09e 3745 dp = &grps[dp->op[1].bytemode][modrm.reg];
6439fc28
AM		 3746 break;
3747
3748 case USE_PREFIX_USER_TABLE:
3749 index = 0;
3750 used_prefixes |= (prefixes & PREFIX_REPZ);
3751 if (prefixes & PREFIX_REPZ)
3752 index = 1;
3753 else
3754 {
d81afd0c
L		 3755 /* We should check PREFIX_REPNZ and PREFIX_REPZ
3756 before PREFIX_DATA. */
3757 used_prefixes |= (prefixes & PREFIX_REPNZ);
3758 if (prefixes & PREFIX_REPNZ)
3759 index = 3;
6439fc28
AM		 3760 else
3761 {
d81afd0c
L		 3762 used_prefixes |= (prefixes & PREFIX_DATA);
3763 if (prefixes & PREFIX_DATA)
3764 index = 2;
6439fc28
AM		 3765 }
3766 }
ce518a5f 3767 dp = &prefix_user_table[dp->op[1].bytemode][index];
6439fc28 3768 break;
252b5132 3769
6439fc28 3770 case X86_64_SPECIAL:
cb712a9e 3771 index = address_mode == mode_64bit ? 1 : 0;
ce518a5f 3772 dp = &x86_64_table[dp->op[1].bytemode][index];
6439fc28 3773 break;
252b5132 3774
6439fc28
AM		 3775 default:
3776 oappend (INTERNAL_DISASSEMBLER_ERROR);
3777 break;
3778 }
3779 }
252b5132 3780
6439fc28 3781 if (putop (dp->name, sizeflag) == 0)
ce518a5f
L		 3782 {
3783 for (i = 0; i < MAX_OPERANDS; ++i)
3784 {
246c51aa 3785 obufp = op_out[i];
ce518a5f
L		 3786 op_ad = MAX_OPERANDS - 1 - i;
3787 if (dp->op[i].rtn)
3788 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
3789 }
6439fc28 3790 }
252b5132
RH		 3791 }
3792
7d421014
ILT		 3793 /* See if any prefixes were not used. If so, print the first one
3794 separately. If we don't do this, we'll wind up printing an
3795 instruction stream which does not precisely correspond to the
3796 bytes we are disassembling. */
3797 if ((prefixes & ~used_prefixes) != 0)
3798 {
3799 const char *name;
3800
e396998b 3801 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 3802 if (name == NULL)
3803 name = INTERNAL_DISASSEMBLER_ERROR;
3804 (*info->fprintf_func) (info->stream, "%s", name);
3805 return 1;
3806 }
52b15da3
JH		 3807 if (rex & ~rex_used)
3808 {
3809 const char *name;
e396998b 3810 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
52b15da3
JH		 3811 if (name == NULL)
3812 name = INTERNAL_DISASSEMBLER_ERROR;
3813 (*info->fprintf_func) (info->stream, "%s ", name);
3814 }
7d421014 3815
252b5132
RH		 3816 obufp = obuf + strlen (obuf);
3817 for (i = strlen (obuf); i < 6; i++)
3818 oappend (" ");
3819 oappend (" ");
3820 (*info->fprintf_func) (info->stream, "%s", obuf);
3821
3822 /* The enter and bound instructions are printed with operands in the same
3823 order as the intel book; everything else is printed in reverse order. */
2da11e11 3824 if (intel_syntax || two_source_ops)
252b5132 3825 {
185b1163
L		 3826 bfd_vma riprel;
3827
ce518a5f
L		 3828 for (i = 0; i < MAX_OPERANDS; ++i)
3829 op_txt[i] = op_out[i];
246c51aa 3830
ce518a5f
L		 3831 for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
3832 {
3833 op_ad = op_index[i];
3834 op_index[i] = op_index[MAX_OPERANDS - 1 - i];
3835 op_index[MAX_OPERANDS - 1 - i] = op_ad;
185b1163
L		 3836 riprel = op_riprel[i];
3837 op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
3838 op_riprel[MAX_OPERANDS - 1 - i] = riprel;
ce518a5f 3839 }
252b5132
RH		 3840 }
3841 else
3842 {
ce518a5f
L		 3843 for (i = 0; i < MAX_OPERANDS; ++i)
3844 op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
050dfa73
MM		 3845 }
3846
ce518a5f
L		 3847 needcomma = 0;
3848 for (i = 0; i < MAX_OPERANDS; ++i)
3849 if (*op_txt[i])
3850 {
3851 if (needcomma)
3852 (*info->fprintf_func) (info->stream, ",");
3853 if (op_index[i] != -1 && !op_riprel[i])
3854 (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
3855 else
3856 (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
3857 needcomma = 1;
3858 }
050dfa73 3859
ce518a5f 3860 for (i = 0; i < MAX_OPERANDS; i++)
52b15da3
JH		 3861 if (op_index[i] != -1 && op_riprel[i])
3862 {
3863 (*info->fprintf_func) (info->stream, " # ");
3864 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
3865 + op_address[op_index[i]]), info);
185b1163 3866 break;
52b15da3 3867 }
e396998b 3868 return codep - priv.the_buffer;
252b5132
RH		 3869}
3870
6439fc28 3871static const char *float_mem[] = {
252b5132 3872 /* d8 */
6439fc28
AM		 3873 "fadd{s||s|}",
3874 "fmul{s||s|}",
3875 "fcom{s||s|}",
3876 "fcomp{s||s|}",
3877 "fsub{s||s|}",
3878 "fsubr{s||s|}",
3879 "fdiv{s||s|}",
3880 "fdivr{s||s|}",
db6eb5be 3881 /* d9 */
6439fc28 3882 "fld{s||s|}",
252b5132 3883 "(bad)",
6439fc28
AM		 3884 "fst{s||s|}",
3885 "fstp{s||s|}",
9306ca4a 3886 "fldenvIC",
252b5132 3887 "fldcw",
9306ca4a 3888 "fNstenvIC",
252b5132
RH		 3889 "fNstcw",
3890 /* da */
6439fc28
AM		 3891 "fiadd{l||l|}",
3892 "fimul{l||l|}",
3893 "ficom{l||l|}",
3894 "ficomp{l||l|}",
3895 "fisub{l||l|}",
3896 "fisubr{l||l|}",
3897 "fidiv{l||l|}",
3898 "fidivr{l||l|}",
252b5132 3899 /* db */
6439fc28 3900 "fild{l||l|}",
ca164297 3901 "fisttp{l||l|}",
6439fc28
AM		 3902 "fist{l||l|}",
3903 "fistp{l||l|}",
252b5132 3904 "(bad)",
6439fc28 3905 "fld{t||t|}",
252b5132 3906 "(bad)",
6439fc28 3907 "fstp{t||t|}",
252b5132 3908 /* dc */
6439fc28
AM		 3909 "fadd{l||l|}",
3910 "fmul{l||l|}",
3911 "fcom{l||l|}",
3912 "fcomp{l||l|}",
3913 "fsub{l||l|}",
3914 "fsubr{l||l|}",
3915 "fdiv{l||l|}",
3916 "fdivr{l||l|}",
252b5132 3917 /* dd */
6439fc28 3918 "fld{l||l|}",
1d9f512f 3919 "fisttp{ll||ll|}",
6439fc28
AM		 3920 "fst{l||l|}",
3921 "fstp{l||l|}",
9306ca4a 3922 "frstorIC",
252b5132 3923 "(bad)",
9306ca4a 3924 "fNsaveIC",
252b5132
RH		 3925 "fNstsw",
3926 /* de */
3927 "fiadd",
3928 "fimul",
3929 "ficom",
3930 "ficomp",
3931 "fisub",
3932 "fisubr",
3933 "fidiv",
3934 "fidivr",
3935 /* df */
3936 "fild",
ca164297 3937 "fisttp",
252b5132
RH		 3938 "fist",
3939 "fistp",
3940 "fbld",
6439fc28 3941 "fild{ll||ll|}",
252b5132 3942 "fbstp",
1d9f512f
AM		 3943 "fistp{ll||ll|}",
3944};
3945
3946static const unsigned char float_mem_mode[] = {
3947 /* d8 */
3948 d_mode,
3949 d_mode,
3950 d_mode,
3951 d_mode,
3952 d_mode,
3953 d_mode,
3954 d_mode,
3955 d_mode,
3956 /* d9 */
3957 d_mode,
3958 0,
3959 d_mode,
3960 d_mode,
3961 0,
3962 w_mode,
3963 0,
3964 w_mode,
3965 /* da */
3966 d_mode,
3967 d_mode,
3968 d_mode,
3969 d_mode,
3970 d_mode,
3971 d_mode,
3972 d_mode,
3973 d_mode,
3974 /* db */
3975 d_mode,
3976 d_mode,
3977 d_mode,
3978 d_mode,
3979 0,
9306ca4a 3980 t_mode,
1d9f512f 3981 0,
9306ca4a 3982 t_mode,
1d9f512f
AM		 3983 /* dc */
3984 q_mode,
3985 q_mode,
3986 q_mode,
3987 q_mode,
3988 q_mode,
3989 q_mode,
3990 q_mode,
3991 q_mode,
3992 /* dd */
3993 q_mode,
3994 q_mode,
3995 q_mode,
3996 q_mode,
3997 0,
3998 0,
3999 0,
4000 w_mode,
4001 /* de */
4002 w_mode,
4003 w_mode,
4004 w_mode,
4005 w_mode,
4006 w_mode,
4007 w_mode,
4008 w_mode,
4009 w_mode,
4010 /* df */
4011 w_mode,
4012 w_mode,
4013 w_mode,
4014 w_mode,
9306ca4a 4015 t_mode,
1d9f512f 4016 q_mode,
9306ca4a 4017 t_mode,
1d9f512f 4018 q_mode
252b5132
RH		 4019};
4020
ce518a5f
L		 4021#define ST { OP_ST, 0 }
4022#define STi { OP_STi, 0 }
252b5132 4023
4efba78c
L		 4024#define FGRPd9_2 NULL, { { NULL, 0 } }
4025#define FGRPd9_4 NULL, { { NULL, 1 } }
4026#define FGRPd9_5 NULL, { { NULL, 2 } }
4027#define FGRPd9_6 NULL, { { NULL, 3 } }
4028#define FGRPd9_7 NULL, { { NULL, 4 } }
4029#define FGRPda_5 NULL, { { NULL, 5 } }
4030#define FGRPdb_4 NULL, { { NULL, 6 } }
4031#define FGRPde_3 NULL, { { NULL, 7 } }
4032#define FGRPdf_4 NULL, { { NULL, 8 } }
252b5132 4033
2da11e11 4034static const struct dis386 float_reg[][8] = {
252b5132
RH		 4035 /* d8 */
4036 {
ce518a5f
L		 4037 { "fadd", { ST, STi } },
4038 { "fmul", { ST, STi } },
4039 { "fcom", { STi } },
4040 { "fcomp", { STi } },
4041 { "fsub", { ST, STi } },
4042 { "fsubr", { ST, STi } },
4043 { "fdiv", { ST, STi } },
4044 { "fdivr", { ST, STi } },
252b5132
RH		 4045 },
4046 /* d9 */
4047 {
ce518a5f
L		 4048 { "fld", { STi } },
4049 { "fxch", { STi } },
252b5132 4050 { FGRPd9_2 },
ce518a5f 4051 { "(bad)", { XX } },
252b5132
RH		 4052 { FGRPd9_4 },
4053 { FGRPd9_5 },
4054 { FGRPd9_6 },
4055 { FGRPd9_7 },
4056 },
4057 /* da */
4058 {
ce518a5f
L		 4059 { "fcmovb", { ST, STi } },
4060 { "fcmove", { ST, STi } },
4061 { "fcmovbe",{ ST, STi } },
4062 { "fcmovu", { ST, STi } },
4063 { "(bad)", { XX } },
252b5132 4064 { FGRPda_5 },
ce518a5f
L		 4065 { "(bad)", { XX } },
4066 { "(bad)", { XX } },
252b5132
RH		 4067 },
4068 /* db */
4069 {
ce518a5f
L		 4070 { "fcmovnb",{ ST, STi } },
4071 { "fcmovne",{ ST, STi } },
4072 { "fcmovnbe",{ ST, STi } },
4073 { "fcmovnu",{ ST, STi } },
252b5132 4074 { FGRPdb_4 },
ce518a5f
L		 4075 { "fucomi", { ST, STi } },
4076 { "fcomi", { ST, STi } },
4077 { "(bad)", { XX } },
252b5132
RH		 4078 },
4079 /* dc */
4080 {
ce518a5f
L		 4081 { "fadd", { STi, ST } },
4082 { "fmul", { STi, ST } },
4083 { "(bad)", { XX } },
4084 { "(bad)", { XX } },
0b1cf022 4085#if SYSV386_COMPAT
ce518a5f
L		 4086 { "fsub", { STi, ST } },
4087 { "fsubr", { STi, ST } },
4088 { "fdiv", { STi, ST } },
4089 { "fdivr", { STi, ST } },
252b5132 4090#else
ce518a5f
L		 4091 { "fsubr", { STi, ST } },
4092 { "fsub", { STi, ST } },
4093 { "fdivr", { STi, ST } },
4094 { "fdiv", { STi, ST } },
252b5132
RH		 4095#endif
4096 },
4097 /* dd */
4098 {
ce518a5f
L		 4099 { "ffree", { STi } },
4100 { "(bad)", { XX } },
4101 { "fst", { STi } },
4102 { "fstp", { STi } },
4103 { "fucom", { STi } },
4104 { "fucomp", { STi } },
4105 { "(bad)", { XX } },
4106 { "(bad)", { XX } },
252b5132
RH		 4107 },
4108 /* de */
4109 {
ce518a5f
L		 4110 { "faddp", { STi, ST } },
4111 { "fmulp", { STi, ST } },
4112 { "(bad)", { XX } },
252b5132 4113 { FGRPde_3 },
0b1cf022 4114#if SYSV386_COMPAT
ce518a5f
L		 4115 { "fsubp", { STi, ST } },
4116 { "fsubrp", { STi, ST } },
4117 { "fdivp", { STi, ST } },
4118 { "fdivrp", { STi, ST } },
252b5132 4119#else
ce518a5f
L		 4120 { "fsubrp", { STi, ST } },
4121 { "fsubp", { STi, ST } },
4122 { "fdivrp", { STi, ST } },
4123 { "fdivp", { STi, ST } },
252b5132
RH		 4124#endif
4125 },
4126 /* df */
4127 {
ce518a5f
L		 4128 { "ffreep", { STi } },
4129 { "(bad)", { XX } },
4130 { "(bad)", { XX } },
4131 { "(bad)", { XX } },
252b5132 4132 { FGRPdf_4 },
ce518a5f
L		 4133 { "fucomip", { ST, STi } },
4134 { "fcomip", { ST, STi } },
4135 { "(bad)", { XX } },
252b5132
RH		 4136 },
4137};
4138
252b5132
RH		 4139static char *fgrps[][8] = {
4140 /* d9_2 0 */
4141 {
4142 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4143 },
4144
4145 /* d9_4 1 */
4146 {
4147 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4148 },
4149
4150 /* d9_5 2 */
4151 {
4152 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4153 },
4154
4155 /* d9_6 3 */
4156 {
4157 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4158 },
4159
4160 /* d9_7 4 */
4161 {
4162 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4163 },
4164
4165 /* da_5 5 */
4166 {
4167 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4168 },
4169
4170 /* db_4 6 */
4171 {
4172 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4173 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4174 },
4175
4176 /* de_3 7 */
4177 {
4178 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4179 },
4180
4181 /* df_4 8 */
4182 {
4183 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4184 },
4185};
4186
4187static void
26ca5450 4188dofloat (int sizeflag)
252b5132 4189{
2da11e11 4190 const struct dis386 *dp;
252b5132
RH		 4191 unsigned char floatop;
4192
4193 floatop = codep[-1];
4194
7967e09e 4195 if (modrm.mod != 3)
252b5132 4196 {
7967e09e 4197 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
1d9f512f
AM		 4198
4199 putop (float_mem[fp_indx], sizeflag);
ce518a5f 4200 obufp = op_out[0];
6e50d963 4201 op_ad = 2;
1d9f512f 4202 OP_E (float_mem_mode[fp_indx], sizeflag);
252b5132
RH		 4203 return;
4204 }
6608db57 4205 /* Skip mod/rm byte. */
4bba6815 4206 MODRM_CHECK;
252b5132
RH		 4207 codep++;
4208
7967e09e 4209 dp = &float_reg[floatop - 0xd8][modrm.reg];
252b5132
RH		 4210 if (dp->name == NULL)
4211 {
7967e09e 4212 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
252b5132 4213
6608db57 4214 /* Instruction fnstsw is only one with strange arg. */
252b5132 4215 if (floatop == 0xdf && codep[-1] == 0xe0)
ce518a5f 4216 strcpy (op_out[0], names16[0]);
252b5132
RH		 4217 }
4218 else
4219 {
4220 putop (dp->name, sizeflag);
4221
ce518a5f 4222 obufp = op_out[0];
6e50d963 4223 op_ad = 2;
ce518a5f
L		 4224 if (dp->op[0].rtn)
4225 (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
6e50d963 4226
ce518a5f 4227 obufp = op_out[1];
6e50d963 4228 op_ad = 1;
ce518a5f
L		 4229 if (dp->op[1].rtn)
4230 (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
252b5132
RH		 4231 }
4232}
4233
252b5132 4234static void
26ca5450 4235OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4236{
422673a9 4237 oappend ("%st" + intel_syntax);
252b5132
RH		 4238}
4239
252b5132 4240static void
26ca5450 4241OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4242{
7967e09e 4243 sprintf (scratchbuf, "%%st(%d)", modrm.rm);
d708bcba 4244 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4245}
4246
6608db57 4247/* Capital letters in template are macros. */
6439fc28 4248static int
26ca5450 4249putop (const char *template, int sizeflag)
252b5132 4250{
2da11e11 4251 const char *p;
9306ca4a 4252 int alt = 0;
252b5132
RH		 4253
4254 for (p = template; *p; p++)
4255 {
4256 switch (*p)
4257 {
4258 default:
4259 *obufp++ = *p;
4260 break;
6439fc28
AM		 4261 case '{':
4262 alt = 0;
4263 if (intel_syntax)
4264 alt += 1;
cb712a9e 4265 if (address_mode == mode_64bit)
6439fc28
AM		 4266 alt += 2;
4267 while (alt != 0)
4268 {
4269 while (*++p != '|')
4270 {
4271 if (*p == '}')
4272 {
4273 /* Alternative not valid. */
4274 strcpy (obuf, "(bad)");
4275 obufp = obuf + 5;
4276 return 1;
4277 }
4278 else if (*p == '\0')
4279 abort ();
4280 }
4281 alt--;
4282 }
9306ca4a
JB		 4283 /* Fall through. */
4284 case 'I':
4285 alt = 1;
4286 continue;
6439fc28
AM		 4287 case '|':
4288 while (*++p != '}')
4289 {
4290 if (*p == '\0')
4291 abort ();
4292 }
4293 break;
4294 case '}':
4295 break;
252b5132 4296 case 'A':
db6eb5be
AM		 4297 if (intel_syntax)
4298 break;
7967e09e 4299 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132
RH		 4300 *obufp++ = 'b';
4301 break;
4302 case 'B':
db6eb5be
AM		 4303 if (intel_syntax)
4304 break;
252b5132
RH		 4305 if (sizeflag & SUFFIX_ALWAYS)
4306 *obufp++ = 'b';
252b5132 4307 break;
9306ca4a
JB		 4308 case 'C':
4309 if (intel_syntax && !alt)
4310 break;
4311 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
4312 {
4313 if (sizeflag & DFLAG)
4314 *obufp++ = intel_syntax ? 'd' : 'l';
4315 else
4316 *obufp++ = intel_syntax ? 'w' : 's';
4317 used_prefixes |= (prefixes & PREFIX_DATA);
4318 }
4319 break;
ed7841b3
JB		 4320 case 'D':
4321 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
4322 break;
161a04f6 4323 USED_REX (REX_W);
7967e09e 4324 if (modrm.mod == 3)
ed7841b3 4325 {
161a04f6 4326 if (rex & REX_W)
ed7841b3
JB		 4327 *obufp++ = 'q';
4328 else if (sizeflag & DFLAG)
4329 *obufp++ = intel_syntax ? 'd' : 'l';
4330 else
4331 *obufp++ = 'w';
4332 used_prefixes |= (prefixes & PREFIX_DATA);
4333 }
4334 else
4335 *obufp++ = 'w';
4336 break;
252b5132 4337 case 'E': /* For jcxz/jecxz */
cb712a9e 4338 if (address_mode == mode_64bit)
c1a64871
JH		 4339 {
4340 if (sizeflag & AFLAG)
4341 *obufp++ = 'r';
4342 else
4343 *obufp++ = 'e';
4344 }
4345 else
4346 if (sizeflag & AFLAG)
4347 *obufp++ = 'e';
3ffd33cf
AM		 4348 used_prefixes |= (prefixes & PREFIX_ADDR);
4349 break;
4350 case 'F':
db6eb5be
AM		 4351 if (intel_syntax)
4352 break;
e396998b 4353 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
3ffd33cf
AM		 4354 {
4355 if (sizeflag & AFLAG)
cb712a9e 4356 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
3ffd33cf 4357 else
cb712a9e 4358 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
3ffd33cf
AM		 4359 used_prefixes |= (prefixes & PREFIX_ADDR);
4360 }
252b5132 4361 break;
52fd6d94
JB		 4362 case 'G':
4363 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
4364 break;
161a04f6 4365 if ((rex & REX_W) || (sizeflag & DFLAG))
52fd6d94
JB		 4366 *obufp++ = 'l';
4367 else
4368 *obufp++ = 'w';
161a04f6 4369 if (!(rex & REX_W))
52fd6d94
JB		 4370 used_prefixes |= (prefixes & PREFIX_DATA);
4371 break;
5dd0794d 4372 case 'H':
db6eb5be
AM		 4373 if (intel_syntax)
4374 break;
5dd0794d
AM		 4375 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
4376 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
4377 {
4378 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
4379 *obufp++ = ',';
4380 *obufp++ = 'p';
4381 if (prefixes & PREFIX_DS)
4382 *obufp++ = 't';
4383 else
4384 *obufp++ = 'n';
4385 }
4386 break;
9306ca4a
JB		 4387 case 'J':
4388 if (intel_syntax)
4389 break;
4390 *obufp++ = 'l';
4391 break;
42903f7f
L		 4392 case 'K':
4393 USED_REX (REX_W);
4394 if (rex & REX_W)
4395 *obufp++ = 'q';
4396 else
4397 *obufp++ = 'd';
4398 break;
6dd5059a
L		 4399 case 'Z':
4400 if (intel_syntax)
4401 break;
4402 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
4403 {
4404 *obufp++ = 'q';
4405 break;
4406 }
4407 /* Fall through. */
252b5132 4408 case 'L':
db6eb5be
AM		 4409 if (intel_syntax)
4410 break;
252b5132
RH		 4411 if (sizeflag & SUFFIX_ALWAYS)
4412 *obufp++ = 'l';
252b5132
RH		 4413 break;
4414 case 'N':
4415 if ((prefixes & PREFIX_FWAIT) == 0)
4416 *obufp++ = 'n';
7d421014
ILT		 4417 else
4418 used_prefixes |= PREFIX_FWAIT;
252b5132 4419 break;
52b15da3 4420 case 'O':
161a04f6
L		 4421 USED_REX (REX_W);
4422 if (rex & REX_W)
6439fc28 4423 *obufp++ = 'o';
a35ca55a
JB		 4424 else if (intel_syntax && (sizeflag & DFLAG))
4425 *obufp++ = 'q';
52b15da3
JH		 4426 else
4427 *obufp++ = 'd';
161a04f6 4428 if (!(rex & REX_W))
a35ca55a 4429 used_prefixes |= (prefixes & PREFIX_DATA);
52b15da3 4430 break;
6439fc28 4431 case 'T':
db6eb5be
AM		 4432 if (intel_syntax)
4433 break;
cb712a9e 4434 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28
AM		 4435 {
4436 *obufp++ = 'q';
4437 break;
4438 }
6608db57 4439 /* Fall through. */
252b5132 4440 case 'P':
db6eb5be
AM		 4441 if (intel_syntax)
4442 break;
252b5132 4443 if ((prefixes & PREFIX_DATA)
161a04f6 4444 || (rex & REX_W)
e396998b 4445 || (sizeflag & SUFFIX_ALWAYS))
252b5132 4446 {
161a04f6
L		 4447 USED_REX (REX_W);
4448 if (rex & REX_W)
52b15da3 4449 *obufp++ = 'q';
c2419411 4450 else
52b15da3
JH		 4451 {
4452 if (sizeflag & DFLAG)
4453 *obufp++ = 'l';
4454 else
4455 *obufp++ = 'w';
52b15da3 4456 }
1a114b12 4457 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4458 }
4459 break;
6439fc28 4460 case 'U':
db6eb5be
AM		 4461 if (intel_syntax)
4462 break;
cb712a9e 4463 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28 4464 {
7967e09e 4465 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
1a114b12 4466 *obufp++ = 'q';
6439fc28
AM		 4467 break;
4468 }
6608db57 4469 /* Fall through. */
252b5132 4470 case 'Q':
9306ca4a 4471 if (intel_syntax && !alt)
db6eb5be 4472 break;
161a04f6 4473 USED_REX (REX_W);
7967e09e 4474 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132 4475 {
161a04f6 4476 if (rex & REX_W)
52b15da3 4477 *obufp++ = 'q';
252b5132 4478 else
52b15da3
JH		 4479 {
4480 if (sizeflag & DFLAG)
9306ca4a 4481 *obufp++ = intel_syntax ? 'd' : 'l';
52b15da3
JH		 4482 else
4483 *obufp++ = 'w';
52b15da3 4484 }
1a114b12 4485 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4486 }
4487 break;
4488 case 'R':
161a04f6
L		 4489 USED_REX (REX_W);
4490 if (rex & REX_W)
a35ca55a
JB		 4491 *obufp++ = 'q';
4492 else if (sizeflag & DFLAG)
c608c12e 4493 {
a35ca55a 4494 if (intel_syntax)
c608c12e 4495 *obufp++ = 'd';
c608c12e 4496 else
a35ca55a 4497 *obufp++ = 'l';
c608c12e 4498 }
252b5132 4499 else
a35ca55a
JB		 4500 *obufp++ = 'w';
4501 if (intel_syntax && !p[1]
161a04f6 4502 && ((rex & REX_W) || (sizeflag & DFLAG)))
a35ca55a 4503 *obufp++ = 'e';
161a04f6 4504 if (!(rex & REX_W))
52b15da3 4505 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4506 break;
1a114b12
JB		 4507 case 'V':
4508 if (intel_syntax)
4509 break;
cb712a9e 4510 if (address_mode == mode_64bit && (sizeflag & DFLAG))
1a114b12
JB		 4511 {
4512 if (sizeflag & SUFFIX_ALWAYS)
4513 *obufp++ = 'q';
4514 break;
4515 }
4516 /* Fall through. */
252b5132 4517 case 'S':
db6eb5be
AM		 4518 if (intel_syntax)
4519 break;
252b5132
RH		 4520 if (sizeflag & SUFFIX_ALWAYS)
4521 {
161a04f6 4522 if (rex & REX_W)
52b15da3 4523 *obufp++ = 'q';
252b5132 4524 else
52b15da3
JH		 4525 {
4526 if (sizeflag & DFLAG)
4527 *obufp++ = 'l';
4528 else
4529 *obufp++ = 'w';
4530 used_prefixes |= (prefixes & PREFIX_DATA);
4531 }
252b5132 4532 }
252b5132 4533 break;
041bd2e0
JH		 4534 case 'X':
4535 if (prefixes & PREFIX_DATA)
4536 *obufp++ = 'd';
4537 else
4538 *obufp++ = 's';
db6eb5be 4539 used_prefixes |= (prefixes & PREFIX_DATA);
041bd2e0 4540 break;
76f227a5 4541 case 'Y':
db6eb5be
AM		 4542 if (intel_syntax)
4543 break;
161a04f6 4544 if (rex & REX_W)
76f227a5 4545 {
161a04f6 4546 USED_REX (REX_W);
76f227a5
JH		 4547 *obufp++ = 'q';
4548 }
4549 break;
52b15da3 4550 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
252b5132 4551 case 'W':
252b5132 4552 /* operand size flag for cwtl, cbtw */
161a04f6
L		 4553 USED_REX (REX_W);
4554 if (rex & REX_W)
a35ca55a
JB		 4555 {
4556 if (intel_syntax)
4557 *obufp++ = 'd';
4558 else
4559 *obufp++ = 'l';
4560 }
52b15da3 4561 else if (sizeflag & DFLAG)
252b5132
RH		 4562 *obufp++ = 'w';
4563 else
4564 *obufp++ = 'b';
161a04f6 4565 if (!(rex & REX_W))
52b15da3 4566 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4567 break;
4568 }
9306ca4a 4569 alt = 0;
252b5132
RH		 4570 }
4571 *obufp = 0;
6439fc28 4572 return 0;
252b5132
RH		 4573}
4574
4575static void
26ca5450 4576oappend (const char *s)
252b5132
RH		 4577{
4578 strcpy (obufp, s);
4579 obufp += strlen (s);
4580}
4581
4582static void
26ca5450 4583append_seg (void)
252b5132
RH		 4584{
4585 if (prefixes & PREFIX_CS)
7d421014 4586 {
7d421014 4587 used_prefixes |= PREFIX_CS;
d708bcba 4588 oappend ("%cs:" + intel_syntax);
7d421014 4589 }
252b5132 4590 if (prefixes & PREFIX_DS)
7d421014 4591 {
7d421014 4592 used_prefixes |= PREFIX_DS;
d708bcba 4593 oappend ("%ds:" + intel_syntax);
7d421014 4594 }
252b5132 4595 if (prefixes & PREFIX_SS)
7d421014 4596 {
7d421014 4597 used_prefixes |= PREFIX_SS;
d708bcba 4598 oappend ("%ss:" + intel_syntax);
7d421014 4599 }
252b5132 4600 if (prefixes & PREFIX_ES)
7d421014 4601 {
7d421014 4602 used_prefixes |= PREFIX_ES;
d708bcba 4603 oappend ("%es:" + intel_syntax);
7d421014 4604 }
252b5132 4605 if (prefixes & PREFIX_FS)
7d421014 4606 {
7d421014 4607 used_prefixes |= PREFIX_FS;
d708bcba 4608 oappend ("%fs:" + intel_syntax);
7d421014 4609 }
252b5132 4610 if (prefixes & PREFIX_GS)
7d421014 4611 {
7d421014 4612 used_prefixes |= PREFIX_GS;
d708bcba 4613 oappend ("%gs:" + intel_syntax);
7d421014 4614 }
252b5132
RH		 4615}
4616
4617static void
26ca5450 4618OP_indirE (int bytemode, int sizeflag)
252b5132
RH		 4619{
4620 if (!intel_syntax)
4621 oappend ("*");
4622 OP_E (bytemode, sizeflag);
4623}
4624
52b15da3 4625static void
26ca5450 4626print_operand_value (char *buf, int hex, bfd_vma disp)
52b15da3 4627{
cb712a9e 4628 if (address_mode == mode_64bit)
52b15da3
JH		 4629 {
4630 if (hex)
4631 {
4632 char tmp[30];
4633 int i;
4634 buf[0] = '0';
4635 buf[1] = 'x';
4636 sprintf_vma (tmp, disp);
6608db57 4637 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
52b15da3
JH		 4638 strcpy (buf + 2, tmp + i);
4639 }
4640 else
4641 {
4642 bfd_signed_vma v = disp;
4643 char tmp[30];
4644 int i;
4645 if (v < 0)
4646 {
4647 *(buf++) = '-';
4648 v = -disp;
6608db57 4649 /* Check for possible overflow on 0x8000000000000000. */
52b15da3
JH		 4650 if (v < 0)
4651 {
4652 strcpy (buf, "9223372036854775808");
4653 return;
4654 }
4655 }
4656 if (!v)
4657 {
4658 strcpy (buf, "0");
4659 return;
4660 }
4661
4662 i = 0;
4663 tmp[29] = 0;
4664 while (v)
4665 {
6608db57 4666 tmp[28 - i] = (v % 10) + '0';
52b15da3
JH		 4667 v /= 10;
4668 i++;
4669 }
4670 strcpy (buf, tmp + 29 - i);
4671 }
4672 }
4673 else
4674 {
4675 if (hex)
4676 sprintf (buf, "0x%x", (unsigned int) disp);
4677 else
4678 sprintf (buf, "%d", (int) disp);
4679 }
4680}
4681
5d669648
L		 4682/* Put DISP in BUF as signed hex number. */
4683
4684static void
4685print_displacement (char *buf, bfd_vma disp)
4686{
4687 bfd_signed_vma val = disp;
4688 char tmp[30];
4689 int i, j = 0;
4690
4691 if (val < 0)
4692 {
4693 buf[j++] = '-';
4694 val = -disp;
4695
4696 /* Check for possible overflow. */
4697 if (val < 0)
4698 {
4699 switch (address_mode)
4700 {
4701 case mode_64bit:
4702 strcpy (buf + j, "0x8000000000000000");
4703 break;
4704 case mode_32bit:
4705 strcpy (buf + j, "0x80000000");
4706 break;
4707 case mode_16bit:
4708 strcpy (buf + j, "0x8000");
4709 break;
4710 }
4711 return;
4712 }
4713 }
4714
4715 buf[j++] = '0';
4716 buf[j++] = 'x';
4717
4718 sprintf_vma (tmp, val);
4719 for (i = 0; tmp[i] == '0'; i++)
4720 continue;
4721 if (tmp[i] == '\0')
4722 i--;
4723 strcpy (buf + j, tmp + i);
4724}
4725
3f31e633
JB		 4726static void
4727intel_operand_size (int bytemode, int sizeflag)
4728{
4729 switch (bytemode)
4730 {
4731 case b_mode:
42903f7f 4732 case dqb_mode:
3f31e633
JB		 4733 oappend ("BYTE PTR ");
4734 break;
4735 case w_mode:
4736 case dqw_mode:
4737 oappend ("WORD PTR ");
4738 break;
1a114b12 4739 case stack_v_mode:
cb712a9e 4740 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3f31e633
JB		 4741 {
4742 oappend ("QWORD PTR ");
4743 used_prefixes |= (prefixes & PREFIX_DATA);
4744 break;
4745 }
4746 /* FALLTHRU */
4747 case v_mode:
4748 case dq_mode:
161a04f6
L		 4749 USED_REX (REX_W);
4750 if (rex & REX_W)
3f31e633
JB		 4751 oappend ("QWORD PTR ");
4752 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
4753 oappend ("DWORD PTR ");
4754 else
4755 oappend ("WORD PTR ");
4756 used_prefixes |= (prefixes & PREFIX_DATA);
4757 break;
52fd6d94 4758 case z_mode:
161a04f6 4759 if ((rex & REX_W) || (sizeflag & DFLAG))
52fd6d94
JB		 4760 *obufp++ = 'D';
4761 oappend ("WORD PTR ");
161a04f6 4762 if (!(rex & REX_W))
52fd6d94
JB		 4763 used_prefixes |= (prefixes & PREFIX_DATA);
4764 break;
3f31e633 4765 case d_mode:
42903f7f 4766 case dqd_mode:
3f31e633
JB		 4767 oappend ("DWORD PTR ");
4768 break;
4769 case q_mode:
4770 oappend ("QWORD PTR ");
4771 break;
4772 case m_mode:
cb712a9e 4773 if (address_mode == mode_64bit)
3f31e633
JB		 4774 oappend ("QWORD PTR ");
4775 else
4776 oappend ("DWORD PTR ");
4777 break;
4778 case f_mode:
4779 if (sizeflag & DFLAG)
4780 oappend ("FWORD PTR ");
4781 else
4782 oappend ("DWORD PTR ");
4783 used_prefixes |= (prefixes & PREFIX_DATA);
4784 break;
4785 case t_mode:
4786 oappend ("TBYTE PTR ");
4787 break;
4788 case x_mode:
4789 oappend ("XMMWORD PTR ");
4790 break;
fb9c77c7
L		 4791 case o_mode:
4792 oappend ("OWORD PTR ");
4793 break;
3f31e633
JB		 4794 default:
4795 break;
4796 }
4797}
4798
252b5132 4799static void
26ca5450 4800OP_E (int bytemode, int sizeflag)
252b5132 4801{
52b15da3
JH		 4802 bfd_vma disp;
4803 int add = 0;
4804 int riprel = 0;
161a04f6
L		 4805 USED_REX (REX_B);
4806 if (rex & REX_B)
52b15da3 4807 add += 8;
252b5132 4808
6608db57 4809 /* Skip mod/rm byte. */
4bba6815 4810 MODRM_CHECK;
252b5132
RH		 4811 codep++;
4812
7967e09e 4813 if (modrm.mod == 3)
252b5132
RH		 4814 {
4815 switch (bytemode)
4816 {
4817 case b_mode:
52b15da3
JH		 4818 USED_REX (0);
4819 if (rex)
7967e09e 4820 oappend (names8rex[modrm.rm + add]);
52b15da3 4821 else
7967e09e 4822 oappend (names8[modrm.rm + add]);
252b5132
RH		 4823 break;
4824 case w_mode:
7967e09e 4825 oappend (names16[modrm.rm + add]);
252b5132 4826 break;
2da11e11 4827 case d_mode:
7967e09e 4828 oappend (names32[modrm.rm + add]);
52b15da3
JH		 4829 break;
4830 case q_mode:
7967e09e 4831 oappend (names64[modrm.rm + add]);
52b15da3
JH		 4832 break;
4833 case m_mode:
cb712a9e 4834 if (address_mode == mode_64bit)
7967e09e 4835 oappend (names64[modrm.rm + add]);
52b15da3 4836 else
7967e09e 4837 oappend (names32[modrm.rm + add]);
2da11e11 4838 break;
1a114b12 4839 case stack_v_mode:
cb712a9e 4840 if (address_mode == mode_64bit && (sizeflag & DFLAG))
003519a7 4841 {
7967e09e 4842 oappend (names64[modrm.rm + add]);
003519a7 4843 used_prefixes |= (prefixes & PREFIX_DATA);
1a114b12 4844 break;
003519a7 4845 }
1a114b12
JB		 4846 bytemode = v_mode;
4847 /* FALLTHRU */
252b5132 4848 case v_mode:
db6eb5be 4849 case dq_mode:
42903f7f
L		 4850 case dqb_mode:
4851 case dqd_mode:
9306ca4a 4852 case dqw_mode:
161a04f6
L		 4853 USED_REX (REX_W);
4854 if (rex & REX_W)
7967e09e 4855 oappend (names64[modrm.rm + add]);
9306ca4a 4856 else if ((sizeflag & DFLAG) || bytemode != v_mode)
7967e09e 4857 oappend (names32[modrm.rm + add]);
252b5132 4858 else
7967e09e 4859 oappend (names16[modrm.rm + add]);
7d421014 4860 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4861 break;
2da11e11 4862 case 0:
c608c12e 4863 break;
252b5132 4864 default:
c608c12e 4865 oappend (INTERNAL_DISASSEMBLER_ERROR);
252b5132
RH		 4866 break;
4867 }
4868 return;
4869 }
4870
4871 disp = 0;
3f31e633
JB		 4872 if (intel_syntax)
4873 intel_operand_size (bytemode, sizeflag);
252b5132
RH		 4874 append_seg ();
4875
5d669648 4876 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
252b5132 4877 {
5d669648
L		 4878 /* 32/64 bit address mode */
4879 int havedisp;
252b5132
RH		 4880 int havesib;
4881 int havebase;
4882 int base;
4883 int index = 0;
4884 int scale = 0;
4885
4886 havesib = 0;
4887 havebase = 1;
7967e09e 4888 base = modrm.rm;
252b5132
RH		 4889
4890 if (base == 4)
4891 {
4892 havesib = 1;
4893 FETCH_DATA (the_info, codep + 1);
252b5132 4894 index = (*codep >> 3) & 7;
cb712a9e 4895 if (address_mode == mode_64bit || index != 0x4)
9df48ba9 4896 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
2033b4b9 4897 scale = (*codep >> 6) & 3;
252b5132 4898 base = *codep & 7;
161a04f6
L		 4899 USED_REX (REX_X);
4900 if (rex & REX_X)
52b15da3 4901 index += 8;
252b5132
RH		 4902 codep++;
4903 }
2888cb7a 4904 base += add;
252b5132 4905
7967e09e 4906 switch (modrm.mod)
252b5132
RH		 4907 {
4908 case 0:
52b15da3 4909 if ((base & 7) == 5)
252b5132
RH		 4910 {
4911 havebase = 0;
cb712a9e 4912 if (address_mode == mode_64bit && !havesib)
52b15da3
JH		 4913 riprel = 1;
4914 disp = get32s ();
252b5132
RH		 4915 }
4916 break;
4917 case 1:
4918 FETCH_DATA (the_info, codep + 1);
4919 disp = *codep++;
4920 if ((disp & 0x80) != 0)
4921 disp -= 0x100;
4922 break;
4923 case 2:
52b15da3 4924 disp = get32s ();
252b5132
RH		 4925 break;
4926 }
4927
5d669648
L		 4928 havedisp = havebase || (havesib && (index != 4 || scale != 0));
4929
252b5132 4930 if (!intel_syntax)
7967e09e 4931 if (modrm.mod != 0 || (base & 7) == 5)
db6eb5be 4932 {
5d669648
L		 4933 if (havedisp || riprel)
4934 print_displacement (scratchbuf, disp);
4935 else
4936 print_operand_value (scratchbuf, 1, disp);
db6eb5be 4937 oappend (scratchbuf);
52b15da3
JH		 4938 if (riprel)
4939 {
4940 set_op (disp, 1);
4941 oappend ("(%rip)");
4942 }
db6eb5be 4943 }
2da11e11 4944
5d669648 4945 if (havedisp || (intel_syntax && riprel))
252b5132 4946 {
252b5132 4947 *obufp++ = open_char;
52b15da3 4948 if (intel_syntax && riprel)
185b1163
L		 4949 {
4950 set_op (disp, 1);
4951 oappend ("rip");
4952 }
db6eb5be 4953 *obufp = '\0';
252b5132 4954 if (havebase)
cb712a9e 4955 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
c1a64871 4956 ? names64[base] : names32[base]);
252b5132
RH		 4957 if (havesib)
4958 {
4959 if (index != 4)
4960 {
9306ca4a 4961 if (!intel_syntax || havebase)
db6eb5be 4962 {
9306ca4a
JB		 4963 *obufp++ = separator_char;
4964 *obufp = '\0';
db6eb5be 4965 }
cb712a9e 4966 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
9306ca4a 4967 ? names64[index] : names32[index]);
252b5132 4968 }
a02a862a 4969 if (scale != 0 || (!intel_syntax && index != 4))
db6eb5be
AM		 4970 {
4971 *obufp++ = scale_char;
4972 *obufp = '\0';
4973 sprintf (scratchbuf, "%d", 1 << scale);
4974 oappend (scratchbuf);
4975 }
252b5132 4976 }
185b1163
L		 4977 if (intel_syntax
4978 && (disp || modrm.mod != 0 || (base & 7) == 5))
3d456fa1 4979 {
185b1163 4980 if ((bfd_signed_vma) disp >= 0)
3d456fa1
JB		 4981 {
4982 *obufp++ = '+';
4983 *obufp = '\0';
4984 }
7967e09e 4985 else if (modrm.mod != 1)
3d456fa1
JB		 4986 {
4987 *obufp++ = '-';
4988 *obufp = '\0';
4989 disp = - (bfd_signed_vma) disp;
4990 }
4991
5d669648 4992 print_displacement (scratchbuf, disp);
3d456fa1
JB		 4993 oappend (scratchbuf);
4994 }
252b5132
RH		 4995
4996 *obufp++ = close_char;
db6eb5be 4997 *obufp = '\0';
252b5132
RH		 4998 }
4999 else if (intel_syntax)
db6eb5be 5000 {
7967e09e 5001 if (modrm.mod != 0 || (base & 7) == 5)
db6eb5be 5002 {
252b5132
RH		 5003 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5004 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5005 ;
5006 else
5007 {
d708bcba 5008 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 5009 oappend (":");
5010 }
52b15da3 5011 print_operand_value (scratchbuf, 1, disp);
db6eb5be
AM		 5012 oappend (scratchbuf);
5013 }
5014 }
252b5132
RH		 5015 }
5016 else
5017 { /* 16 bit address mode */
7967e09e 5018 switch (modrm.mod)
252b5132
RH		 5019 {
5020 case 0:
7967e09e 5021 if (modrm.rm == 6)
252b5132
RH		 5022 {
5023 disp = get16 ();
5024 if ((disp & 0x8000) != 0)
5025 disp -= 0x10000;
5026 }
5027 break;
5028 case 1:
5029 FETCH_DATA (the_info, codep + 1);
5030 disp = *codep++;
5031 if ((disp & 0x80) != 0)
5032 disp -= 0x100;
5033 break;
5034 case 2:
5035 disp = get16 ();
5036 if ((disp & 0x8000) != 0)
5037 disp -= 0x10000;
5038 break;
5039 }
5040
5041 if (!intel_syntax)
7967e09e 5042 if (modrm.mod != 0 || modrm.rm == 6)
db6eb5be 5043 {
5d669648 5044 print_displacement (scratchbuf, disp);
db6eb5be
AM		 5045 oappend (scratchbuf);
5046 }
252b5132 5047
7967e09e 5048 if (modrm.mod != 0 || modrm.rm != 6)
252b5132
RH		 5049 {
5050 *obufp++ = open_char;
db6eb5be 5051 *obufp = '\0';
7967e09e 5052 oappend (index16[modrm.rm]);
5d669648
L		 5053 if (intel_syntax
5054 && (disp || modrm.mod != 0 || modrm.rm == 6))
3d456fa1 5055 {
5d669648 5056 if ((bfd_signed_vma) disp >= 0)
3d456fa1
JB		 5057 {
5058 *obufp++ = '+';
5059 *obufp = '\0';
5060 }
7967e09e 5061 else if (modrm.mod != 1)
3d456fa1
JB		 5062 {
5063 *obufp++ = '-';
5064 *obufp = '\0';
5065 disp = - (bfd_signed_vma) disp;
5066 }
5067
5d669648 5068 print_displacement (scratchbuf, disp);
3d456fa1
JB		 5069 oappend (scratchbuf);
5070 }
5071
db6eb5be
AM		 5072 *obufp++ = close_char;
5073 *obufp = '\0';
252b5132 5074 }
3d456fa1
JB		 5075 else if (intel_syntax)
5076 {
5077 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5078 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5079 ;
5080 else
5081 {
5082 oappend (names_seg[ds_reg - es_reg]);
5083 oappend (":");
5084 }
5085 print_operand_value (scratchbuf, 1, disp & 0xffff);
5086 oappend (scratchbuf);
5087 }
252b5132
RH		 5088 }
5089}
5090
252b5132 5091static void
26ca5450 5092OP_G (int bytemode, int sizeflag)
252b5132 5093{
52b15da3 5094 int add = 0;
161a04f6
L		 5095 USED_REX (REX_R);
5096 if (rex & REX_R)
52b15da3 5097 add += 8;
252b5132
RH		 5098 switch (bytemode)
5099 {
5100 case b_mode:
52b15da3
JH		 5101 USED_REX (0);
5102 if (rex)
7967e09e 5103 oappend (names8rex[modrm.reg + add]);
52b15da3 5104 else
7967e09e 5105 oappend (names8[modrm.reg + add]);
252b5132
RH		 5106 break;
5107 case w_mode:
7967e09e 5108 oappend (names16[modrm.reg + add]);
252b5132
RH		 5109 break;
5110 case d_mode:
7967e09e 5111 oappend (names32[modrm.reg + add]);
52b15da3
JH		 5112 break;
5113 case q_mode:
7967e09e 5114 oappend (names64[modrm.reg + add]);
252b5132
RH		 5115 break;
5116 case v_mode:
9306ca4a 5117 case dq_mode:
42903f7f
L		 5118 case dqb_mode:
5119 case dqd_mode:
9306ca4a 5120 case dqw_mode:
161a04f6
L		 5121 USED_REX (REX_W);
5122 if (rex & REX_W)
7967e09e 5123 oappend (names64[modrm.reg + add]);
9306ca4a 5124 else if ((sizeflag & DFLAG) || bytemode != v_mode)
7967e09e 5125 oappend (names32[modrm.reg + add]);
252b5132 5126 else
7967e09e 5127 oappend (names16[modrm.reg + add]);
7d421014 5128 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 5129 break;
90700ea2 5130 case m_mode:
cb712a9e 5131 if (address_mode == mode_64bit)
7967e09e 5132 oappend (names64[modrm.reg + add]);
90700ea2 5133 else
7967e09e 5134 oappend (names32[modrm.reg + add]);
90700ea2 5135 break;
252b5132
RH		 5136 default:
5137 oappend (INTERNAL_DISASSEMBLER_ERROR);
5138 break;
5139 }
5140}
5141
52b15da3 5142static bfd_vma
26ca5450 5143get64 (void)
52b15da3 5144{
5dd0794d 5145 bfd_vma x;
52b15da3 5146#ifdef BFD64
5dd0794d
AM		 5147 unsigned int a;
5148 unsigned int b;
5149
52b15da3
JH		 5150 FETCH_DATA (the_info, codep + 8);
5151 a = *codep++ & 0xff;
5152 a |= (*codep++ & 0xff) << 8;
5153 a |= (*codep++ & 0xff) << 16;
5154 a |= (*codep++ & 0xff) << 24;
5dd0794d 5155 b = *codep++ & 0xff;
52b15da3
JH		 5156 b |= (*codep++ & 0xff) << 8;
5157 b |= (*codep++ & 0xff) << 16;
5158 b |= (*codep++ & 0xff) << 24;
5159 x = a + ((bfd_vma) b << 32);
5160#else
6608db57 5161 abort ();
5dd0794d 5162 x = 0;
52b15da3
JH		 5163#endif
5164 return x;
5165}
5166
5167static bfd_signed_vma
26ca5450 5168get32 (void)
252b5132 5169{
52b15da3 5170 bfd_signed_vma x = 0;
252b5132
RH		 5171
5172 FETCH_DATA (the_info, codep + 4);
52b15da3
JH		 5173 x = *codep++ & (bfd_signed_vma) 0xff;
5174 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5175 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5176 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5177 return x;
5178}
5179
5180static bfd_signed_vma
26ca5450 5181get32s (void)
52b15da3
JH		 5182{
5183 bfd_signed_vma x = 0;
5184
5185 FETCH_DATA (the_info, codep + 4);
5186 x = *codep++ & (bfd_signed_vma) 0xff;
5187 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5188 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5189 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5190
5191 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
5192
252b5132
RH		 5193 return x;
5194}
5195
5196static int
26ca5450 5197get16 (void)
252b5132
RH		 5198{
5199 int x = 0;
5200
5201 FETCH_DATA (the_info, codep + 2);
5202 x = *codep++ & 0xff;
5203 x |= (*codep++ & 0xff) << 8;
5204 return x;
5205}
5206
5207static void
26ca5450 5208set_op (bfd_vma op, int riprel)
252b5132
RH		 5209{
5210 op_index[op_ad] = op_ad;
cb712a9e 5211 if (address_mode == mode_64bit)
7081ff04
AJ		 5212 {
5213 op_address[op_ad] = op;
5214 op_riprel[op_ad] = riprel;
5215 }
5216 else
5217 {
5218 /* Mask to get a 32-bit address. */
5219 op_address[op_ad] = op & 0xffffffff;
5220 op_riprel[op_ad] = riprel & 0xffffffff;
5221 }
252b5132
RH		 5222}
5223
5224static void
26ca5450 5225OP_REG (int code, int sizeflag)
252b5132 5226{
2da11e11 5227 const char *s;
52b15da3 5228 int add = 0;
161a04f6
L		 5229 USED_REX (REX_B);
5230 if (rex & REX_B)
52b15da3
JH		 5231 add = 8;
5232
5233 switch (code)
5234 {
52b15da3
JH		 5235 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5236 case sp_reg: case bp_reg: case si_reg: case di_reg:
5237 s = names16[code - ax_reg + add];
5238 break;
5239 case es_reg: case ss_reg: case cs_reg:
5240 case ds_reg: case fs_reg: case gs_reg:
5241 s = names_seg[code - es_reg + add];
5242 break;
5243 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5244 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5245 USED_REX (0);
5246 if (rex)
5247 s = names8rex[code - al_reg + add];
5248 else
5249 s = names8[code - al_reg];
5250 break;
6439fc28
AM		 5251 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
5252 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
cb712a9e 5253 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28
AM		 5254 {
5255 s = names64[code - rAX_reg + add];
5256 break;
5257 }
5258 code += eAX_reg - rAX_reg;
6608db57 5259 /* Fall through. */
52b15da3
JH		 5260 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5261 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
161a04f6
L		 5262 USED_REX (REX_W);
5263 if (rex & REX_W)
52b15da3
JH		 5264 s = names64[code - eAX_reg + add];
5265 else if (sizeflag & DFLAG)
5266 s = names32[code - eAX_reg + add];
5267 else
5268 s = names16[code - eAX_reg + add];
5269 used_prefixes |= (prefixes & PREFIX_DATA);
5270 break;
52b15da3
JH		 5271 default:
5272 s = INTERNAL_DISASSEMBLER_ERROR;
5273 break;
5274 }
5275 oappend (s);
5276}
5277
5278static void
26ca5450 5279OP_IMREG (int code, int sizeflag)
52b15da3
JH		 5280{
5281 const char *s;
252b5132
RH		 5282
5283 switch (code)
5284 {
5285 case indir_dx_reg:
d708bcba 5286 if (intel_syntax)
52fd6d94 5287 s = "dx";
d708bcba 5288 else
db6eb5be 5289 s = "(%dx)";
252b5132
RH		 5290 break;
5291 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5292 case sp_reg: case bp_reg: case si_reg: case di_reg:
5293 s = names16[code - ax_reg];
5294 break;
5295 case es_reg: case ss_reg: case cs_reg:
5296 case ds_reg: case fs_reg: case gs_reg:
5297 s = names_seg[code - es_reg];
5298 break;
5299 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5300 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
52b15da3
JH		 5301 USED_REX (0);
5302 if (rex)
5303 s = names8rex[code - al_reg];
5304 else
5305 s = names8[code - al_reg];
252b5132
RH		 5306 break;
5307 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5308 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
161a04f6
L		 5309 USED_REX (REX_W);
5310 if (rex & REX_W)
52b15da3
JH		 5311 s = names64[code - eAX_reg];
5312 else if (sizeflag & DFLAG)
252b5132
RH		 5313 s = names32[code - eAX_reg];
5314 else
5315 s = names16[code - eAX_reg];
7d421014 5316 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 5317 break;
52fd6d94 5318 case z_mode_ax_reg:
161a04f6 5319 if ((rex & REX_W) || (sizeflag & DFLAG))
52fd6d94
JB		 5320 s = *names32;
5321 else
5322 s = *names16;
161a04f6 5323 if (!(rex & REX_W))
52fd6d94
JB		 5324 used_prefixes |= (prefixes & PREFIX_DATA);
5325 break;
252b5132
RH		 5326 default:
5327 s = INTERNAL_DISASSEMBLER_ERROR;
5328 break;
5329 }
5330 oappend (s);
5331}
5332
5333static void
26ca5450 5334OP_I (int bytemode, int sizeflag)
252b5132 5335{
52b15da3
JH		 5336 bfd_signed_vma op;
5337 bfd_signed_vma mask = -1;
252b5132
RH		 5338
5339 switch (bytemode)
5340 {
5341 case b_mode:
5342 FETCH_DATA (the_info, codep + 1);
52b15da3
JH		 5343 op = *codep++;
5344 mask = 0xff;
5345 break;
5346 case q_mode:
cb712a9e 5347 if (address_mode == mode_64bit)
6439fc28
AM		 5348 {
5349 op = get32s ();
5350 break;
5351 }
6608db57 5352 /* Fall through. */
252b5132 5353 case v_mode:
161a04f6
L		 5354 USED_REX (REX_W);
5355 if (rex & REX_W)
52b15da3
JH		 5356 op = get32s ();
5357 else if (sizeflag & DFLAG)
5358 {
5359 op = get32 ();
5360 mask = 0xffffffff;
5361 }
252b5132 5362 else
52b15da3
JH		 5363 {
5364 op = get16 ();
5365 mask = 0xfffff;
5366 }
7d421014 5367 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 5368 break;
5369 case w_mode:
52b15da3 5370 mask = 0xfffff;
252b5132
RH		 5371 op = get16 ();
5372 break;
9306ca4a
JB		 5373 case const_1_mode:
5374 if (intel_syntax)
5375 oappend ("1");
5376 return;
252b5132
RH		 5377 default:
5378 oappend (INTERNAL_DISASSEMBLER_ERROR);
5379 return;
5380 }
5381
52b15da3
JH		 5382 op &= mask;
5383 scratchbuf[0] = '$';
d708bcba
AM		 5384 print_operand_value (scratchbuf + 1, 1, op);
5385 oappend (scratchbuf + intel_syntax);
52b15da3
JH		 5386 scratchbuf[0] = '\0';
5387}
5388
5389static void
26ca5450 5390OP_I64 (int bytemode, int sizeflag)
52b15da3
JH		 5391{
5392 bfd_signed_vma op;
5393 bfd_signed_vma mask = -1;
5394
cb712a9e 5395 if (address_mode != mode_64bit)
6439fc28
AM		 5396 {
5397 OP_I (bytemode, sizeflag);
5398 return;
5399 }
5400
52b15da3
JH		 5401 switch (bytemode)
5402 {
5403 case b_mode:
5404 FETCH_DATA (the_info, codep + 1);
5405 op = *codep++;
5406 mask = 0xff;
5407 break;
5408 case v_mode:
161a04f6
L		 5409 USED_REX (REX_W);
5410 if (rex & REX_W)
52b15da3
JH		 5411 op = get64 ();
5412 else if (sizeflag & DFLAG)
5413 {
5414 op = get32 ();
5415 mask = 0xffffffff;
5416 }
5417 else
5418 {
5419 op = get16 ();
5420 mask = 0xfffff;
5421 }
5422 used_prefixes |= (prefixes & PREFIX_DATA);
5423 break;
5424 case w_mode:
5425 mask = 0xfffff;
5426 op = get16 ();
5427 break;
5428 default:
5429 oappend (INTERNAL_DISASSEMBLER_ERROR);
5430 return;
5431 }
5432
5433 op &= mask;
5434 scratchbuf[0] = '$';
d708bcba
AM		 5435 print_operand_value (scratchbuf + 1, 1, op);
5436 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5437 scratchbuf[0] = '\0';
5438}
5439
5440static void
26ca5450 5441OP_sI (int bytemode, int sizeflag)
252b5132 5442{
52b15da3
JH		 5443 bfd_signed_vma op;
5444 bfd_signed_vma mask = -1;
252b5132
RH		 5445
5446 switch (bytemode)
5447 {
5448 case b_mode:
5449 FETCH_DATA (the_info, codep + 1);
5450 op = *codep++;
5451 if ((op & 0x80) != 0)
5452 op -= 0x100;
52b15da3 5453 mask = 0xffffffff;
252b5132
RH		 5454 break;
5455 case v_mode:
161a04f6
L		 5456 USED_REX (REX_W);
5457 if (rex & REX_W)
52b15da3
JH		 5458 op = get32s ();
5459 else if (sizeflag & DFLAG)
5460 {
5461 op = get32s ();
5462 mask = 0xffffffff;
5463 }
252b5132
RH		 5464 else
5465 {
52b15da3 5466 mask = 0xffffffff;
6608db57 5467 op = get16 ();
252b5132
RH		 5468 if ((op & 0x8000) != 0)
5469 op -= 0x10000;
5470 }
7d421014 5471 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 5472 break;
5473 case w_mode:
5474 op = get16 ();
52b15da3 5475 mask = 0xffffffff;
252b5132
RH		 5476 if ((op & 0x8000) != 0)
5477 op -= 0x10000;
5478 break;
5479 default:
5480 oappend (INTERNAL_DISASSEMBLER_ERROR);
5481 return;
5482 }
52b15da3
JH		 5483
5484 scratchbuf[0] = '$';
5485 print_operand_value (scratchbuf + 1, 1, op);
d708bcba 5486 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5487}
5488
5489static void
26ca5450 5490OP_J (int bytemode, int sizeflag)
252b5132 5491{
52b15da3 5492 bfd_vma disp;
7081ff04 5493 bfd_vma mask = -1;
65ca155d 5494 bfd_vma segment = 0;
252b5132
RH		 5495
5496 switch (bytemode)
5497 {
5498 case b_mode:
5499 FETCH_DATA (the_info, codep + 1);
5500 disp = *codep++;
5501 if ((disp & 0x80) != 0)
5502 disp -= 0x100;
5503 break;
5504 case v_mode:
161a04f6 5505 if ((sizeflag & DFLAG) || (rex & REX_W))
52b15da3 5506 disp = get32s ();
252b5132
RH		 5507 else
5508 {
5509 disp = get16 ();
206717e8
L		 5510 if ((disp & 0x8000) != 0)
5511 disp -= 0x10000;
65ca155d
L		 5512 /* In 16bit mode, address is wrapped around at 64k within
5513 the same segment. Otherwise, a data16 prefix on a jump
5514 instruction means that the pc is masked to 16 bits after
5515 the displacement is added! */
5516 mask = 0xffff;
5517 if ((prefixes & PREFIX_DATA) == 0)
5518 segment = ((start_pc + codep - start_codep)
5519 & ~((bfd_vma) 0xffff));
252b5132 5520 }
d807a492 5521 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 5522 break;
5523 default:
5524 oappend (INTERNAL_DISASSEMBLER_ERROR);
5525 return;
5526 }
65ca155d 5527 disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
52b15da3
JH		 5528 set_op (disp, 0);
5529 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 5530 oappend (scratchbuf);
5531}
5532
252b5132 5533static void
ed7841b3 5534OP_SEG (int bytemode, int sizeflag)
252b5132 5535{
ed7841b3 5536 if (bytemode == w_mode)
7967e09e 5537 oappend (names_seg[modrm.reg]);
ed7841b3 5538 else
7967e09e 5539 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
252b5132
RH		 5540}
5541
5542static void
26ca5450 5543OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
252b5132
RH		 5544{
5545 int seg, offset;
5546
c608c12e 5547 if (sizeflag & DFLAG)
252b5132 5548 {
c608c12e
AM		 5549 offset = get32 ();
5550 seg = get16 ();
252b5132 5551 }
c608c12e
AM		 5552 else
5553 {
5554 offset = get16 ();
5555 seg = get16 ();
5556 }
7d421014 5557 used_prefixes |= (prefixes & PREFIX_DATA);
d708bcba 5558 if (intel_syntax)
3f31e633 5559 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
d708bcba
AM		 5560 else
5561 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
c608c12e 5562 oappend (scratchbuf);
252b5132
RH		 5563}
5564
252b5132 5565static void
3f31e633 5566OP_OFF (int bytemode, int sizeflag)
252b5132 5567{
52b15da3 5568 bfd_vma off;
252b5132 5569
3f31e633
JB		 5570 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5571 intel_operand_size (bytemode, sizeflag);
252b5132
RH		 5572 append_seg ();
5573
cb712a9e 5574 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
252b5132
RH		 5575 off = get32 ();
5576 else
5577 off = get16 ();
5578
5579 if (intel_syntax)
5580 {
5581 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 5582 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
252b5132 5583 {
d708bcba 5584 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 5585 oappend (":");
5586 }
5587 }
52b15da3
JH		 5588 print_operand_value (scratchbuf, 1, off);
5589 oappend (scratchbuf);
5590}
6439fc28 5591
52b15da3 5592static void
3f31e633 5593OP_OFF64 (int bytemode, int sizeflag)
52b15da3
JH		 5594{
5595 bfd_vma off;
5596
539e75ad
L		 5597 if (address_mode != mode_64bit
5598 || (prefixes & PREFIX_ADDR))
6439fc28
AM		 5599 {
5600 OP_OFF (bytemode, sizeflag);
5601 return;
5602 }
5603
3f31e633
JB		 5604 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5605 intel_operand_size (bytemode, sizeflag);
52b15da3
JH		 5606 append_seg ();
5607
6608db57 5608 off = get64 ();
52b15da3
JH		 5609
5610 if (intel_syntax)
5611 {
5612 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 5613 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
52b15da3 5614 {
d708bcba 5615 oappend (names_seg[ds_reg - es_reg]);
52b15da3
JH		 5616 oappend (":");
5617 }
5618 }
5619 print_operand_value (scratchbuf, 1, off);
252b5132
RH		 5620 oappend (scratchbuf);
5621}
5622
5623static void
26ca5450 5624ptr_reg (int code, int sizeflag)
252b5132 5625{
2da11e11 5626 const char *s;
d708bcba 5627
1d9f512f 5628 *obufp++ = open_char;
20f0a1fc 5629 used_prefixes |= (prefixes & PREFIX_ADDR);
cb712a9e 5630 if (address_mode == mode_64bit)
c1a64871
JH		 5631 {
5632 if (!(sizeflag & AFLAG))
db6eb5be 5633 s = names32[code - eAX_reg];
c1a64871 5634 else
db6eb5be 5635 s = names64[code - eAX_reg];
c1a64871 5636 }
52b15da3 5637 else if (sizeflag & AFLAG)
252b5132
RH		 5638 s = names32[code - eAX_reg];
5639 else
5640 s = names16[code - eAX_reg];
5641 oappend (s);
1d9f512f
AM		 5642 *obufp++ = close_char;
5643 *obufp = 0;
252b5132
RH		 5644}
5645
5646static void
26ca5450 5647OP_ESreg (int code, int sizeflag)
252b5132 5648{
9306ca4a 5649 if (intel_syntax)
52fd6d94
JB		 5650 {
5651 switch (codep[-1])
5652 {
5653 case 0x6d: /* insw/insl */
5654 intel_operand_size (z_mode, sizeflag);
5655 break;
5656 case 0xa5: /* movsw/movsl/movsq */
5657 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5658 case 0xab: /* stosw/stosl */
5659 case 0xaf: /* scasw/scasl */
5660 intel_operand_size (v_mode, sizeflag);
5661 break;
5662 default:
5663 intel_operand_size (b_mode, sizeflag);
5664 }
5665 }
d708bcba 5666 oappend ("%es:" + intel_syntax);
252b5132
RH		 5667 ptr_reg (code, sizeflag);
5668}
5669
5670static void
26ca5450 5671OP_DSreg (int code, int sizeflag)
252b5132 5672{
9306ca4a 5673 if (intel_syntax)
52fd6d94
JB		 5674 {
5675 switch (codep[-1])
5676 {
5677 case 0x6f: /* outsw/outsl */
5678 intel_operand_size (z_mode, sizeflag);
5679 break;
5680 case 0xa5: /* movsw/movsl/movsq */
5681 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5682 case 0xad: /* lodsw/lodsl/lodsq */
5683 intel_operand_size (v_mode, sizeflag);
5684 break;
5685 default:
5686 intel_operand_size (b_mode, sizeflag);
5687 }
5688 }
252b5132
RH		 5689 if ((prefixes
5690 & (PREFIX_CS
5691 | PREFIX_DS
5692 | PREFIX_SS
5693 | PREFIX_ES
5694 | PREFIX_FS
5695 | PREFIX_GS)) == 0)
5696 prefixes |= PREFIX_DS;
6608db57 5697 append_seg ();
252b5132
RH		 5698 ptr_reg (code, sizeflag);
5699}
5700
252b5132 5701static void
26ca5450 5702OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5703{
52b15da3 5704 int add = 0;
161a04f6 5705 if (rex & REX_R)
c4a530c5 5706 {
161a04f6 5707 USED_REX (REX_R);
c4a530c5
JB		 5708 add = 8;
5709 }
cb712a9e 5710 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
c4a530c5
JB		 5711 {
5712 used_prefixes |= PREFIX_LOCK;
5713 add = 8;
5714 }
7967e09e 5715 sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
d708bcba 5716 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5717}
5718
252b5132 5719static void
26ca5450 5720OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5721{
52b15da3 5722 int add = 0;
161a04f6
L		 5723 USED_REX (REX_R);
5724 if (rex & REX_R)
52b15da3 5725 add = 8;
d708bcba 5726 if (intel_syntax)
7967e09e 5727 sprintf (scratchbuf, "db%d", modrm.reg + add);
d708bcba 5728 else
7967e09e 5729 sprintf (scratchbuf, "%%db%d", modrm.reg + add);
252b5132
RH		 5730 oappend (scratchbuf);
5731}
5732
252b5132 5733static void
26ca5450 5734OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5735{
7967e09e 5736 sprintf (scratchbuf, "%%tr%d", modrm.reg);
d708bcba 5737 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5738}
5739
5740static void
6f74c397 5741OP_R (int bytemode, int sizeflag)
252b5132 5742{
7967e09e 5743 if (modrm.mod == 3)
2da11e11
AM		 5744 OP_E (bytemode, sizeflag);
5745 else
6608db57 5746 BadOp ();
252b5132
RH		 5747}
5748
5749static void
26ca5450 5750OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 5751{
041bd2e0
JH		 5752 used_prefixes |= (prefixes & PREFIX_DATA);
5753 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 5754 {
5755 int add = 0;
161a04f6
L		 5756 USED_REX (REX_R);
5757 if (rex & REX_R)
20f0a1fc 5758 add = 8;
7967e09e 5759 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
20f0a1fc 5760 }
041bd2e0 5761 else
7967e09e 5762 sprintf (scratchbuf, "%%mm%d", modrm.reg);
d708bcba 5763 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5764}
5765
c608c12e 5766static void
26ca5450 5767OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e 5768{
041bd2e0 5769 int add = 0;
161a04f6
L		 5770 USED_REX (REX_R);
5771 if (rex & REX_R)
041bd2e0 5772 add = 8;
7967e09e 5773 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
d708bcba 5774 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 5775}
5776
252b5132 5777static void
26ca5450 5778OP_EM (int bytemode, int sizeflag)
252b5132 5779{
7967e09e 5780 if (modrm.mod != 3)
252b5132 5781 {
9306ca4a
JB		 5782 if (intel_syntax && bytemode == v_mode)
5783 {
5784 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5785 used_prefixes |= (prefixes & PREFIX_DATA);
5786 }
252b5132
RH		 5787 OP_E (bytemode, sizeflag);
5788 return;
5789 }
5790
6608db57 5791 /* Skip mod/rm byte. */
4bba6815 5792 MODRM_CHECK;
252b5132 5793 codep++;
041bd2e0
JH		 5794 used_prefixes |= (prefixes & PREFIX_DATA);
5795 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 5796 {
5797 int add = 0;
5798
161a04f6
L		 5799 USED_REX (REX_B);
5800 if (rex & REX_B)
20f0a1fc 5801 add = 8;
7967e09e 5802 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
20f0a1fc 5803 }
041bd2e0 5804 else
7967e09e 5805 sprintf (scratchbuf, "%%mm%d", modrm.rm);
d708bcba 5806 oappend (scratchbuf + intel_syntax);
252b5132
RH		 5807}
5808
246c51aa
L		 5809/* cvt* are the only instructions in sse2 which have
5810 both SSE and MMX operands and also have 0x66 prefix
5811 in their opcode. 0x66 was originally used to differentiate
5812 between SSE and MMX instruction(operands). So we have to handle the
4d9567e0
MM		 5813 cvt* separately using OP_EMC and OP_MXC */
5814static void
5815OP_EMC (int bytemode, int sizeflag)
5816{
7967e09e 5817 if (modrm.mod != 3)
4d9567e0
MM		 5818 {
5819 if (intel_syntax && bytemode == v_mode)
5820 {
5821 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5822 used_prefixes |= (prefixes & PREFIX_DATA);
5823 }
5824 OP_E (bytemode, sizeflag);
5825 return;
5826 }
246c51aa 5827
4d9567e0
MM		 5828 /* Skip mod/rm byte. */
5829 MODRM_CHECK;
5830 codep++;
5831 used_prefixes |= (prefixes & PREFIX_DATA);
7967e09e 5832 sprintf (scratchbuf, "%%mm%d", modrm.rm);
4d9567e0
MM		 5833 oappend (scratchbuf + intel_syntax);
5834}
5835
5836static void
5837OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5838{
5839 used_prefixes |= (prefixes & PREFIX_DATA);
7967e09e 5840 sprintf (scratchbuf, "%%mm%d", modrm.reg);
4d9567e0
MM		 5841 oappend (scratchbuf + intel_syntax);
5842}
5843
c608c12e 5844static void
26ca5450 5845OP_EX (int bytemode, int sizeflag)
c608c12e 5846{
041bd2e0 5847 int add = 0;
7967e09e 5848 if (modrm.mod != 3)
c608c12e
AM		 5849 {
5850 OP_E (bytemode, sizeflag);
5851 return;
5852 }
161a04f6
L		 5853 USED_REX (REX_B);
5854 if (rex & REX_B)
041bd2e0 5855 add = 8;
c608c12e 5856
6608db57 5857 /* Skip mod/rm byte. */
4bba6815 5858 MODRM_CHECK;
c608c12e 5859 codep++;
7967e09e 5860 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
d708bcba 5861 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 5862}
5863
252b5132 5864static void
26ca5450 5865OP_MS (int bytemode, int sizeflag)
252b5132 5866{
7967e09e 5867 if (modrm.mod == 3)
2da11e11
AM		 5868 OP_EM (bytemode, sizeflag);
5869 else
6608db57 5870 BadOp ();
252b5132
RH		 5871}
5872
992aaec9 5873static void
26ca5450 5874OP_XS (int bytemode, int sizeflag)
992aaec9 5875{
7967e09e 5876 if (modrm.mod == 3)
992aaec9
AM		 5877 OP_EX (bytemode, sizeflag);
5878 else
6608db57 5879 BadOp ();
992aaec9
AM		 5880}
5881
cc0ec051
AM		 5882static void
5883OP_M (int bytemode, int sizeflag)
5884{
7967e09e 5885 if (modrm.mod == 3)
75413a22
L		 5886 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
5887 BadOp ();
cc0ec051
AM		 5888 else
5889 OP_E (bytemode, sizeflag);
5890}
5891
5892static void
5893OP_0f07 (int bytemode, int sizeflag)
5894{
7967e09e 5895 if (modrm.mod != 3 || modrm.rm != 0)
cc0ec051
AM		 5896 BadOp ();
5897 else
5898 OP_E (bytemode, sizeflag);
5899}
5900
5901static void
5902OP_0fae (int bytemode, int sizeflag)
5903{
7967e09e 5904 if (modrm.mod == 3)
cc0ec051 5905 {
7967e09e 5906 if (modrm.reg == 7)
cc0ec051
AM		 5907 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
5908
7967e09e 5909 if (modrm.reg < 5 || modrm.rm != 0)
cc0ec051
AM		 5910 {
5911 BadOp (); /* bad sfence, mfence, or lfence */
5912 return;
5913 }
5914 }
7967e09e 5915 else if (modrm.reg != 7)
cc0ec051
AM		 5916 {
5917 BadOp (); /* bad clflush */
5918 return;
5919 }
5920
5921 OP_E (bytemode, sizeflag);
5922}
5923
46e883c5 5924/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
246c51aa 5925 32bit mode and "xchg %rax,%rax" in 64bit mode. */
46e883c5 5926
cc0ec051 5927static void
46e883c5 5928NOP_Fixup1 (int bytemode, int sizeflag)
cc0ec051 5929{
8b38ad71
L		 5930 if ((prefixes & PREFIX_DATA) != 0
5931 || (rex != 0
5932 && rex != 0x48
5933 && address_mode == mode_64bit))
46e883c5
L		 5934 OP_REG (bytemode, sizeflag);
5935 else
5936 strcpy (obuf, "nop");
5937}
5938
5939static void
5940NOP_Fixup2 (int bytemode, int sizeflag)
5941{
8b38ad71
L		 5942 if ((prefixes & PREFIX_DATA) != 0
5943 || (rex != 0
5944 && rex != 0x48
5945 && address_mode == mode_64bit))
46e883c5 5946 OP_IMREG (bytemode, sizeflag);
cc0ec051
AM		 5947}
5948
84037f8c 5949static const char *const Suffix3DNow[] = {
252b5132
RH		 5950/* 00 */ NULL, NULL, NULL, NULL,
5951/* 04 */ NULL, NULL, NULL, NULL,
5952/* 08 */ NULL, NULL, NULL, NULL,
9e525108 5953/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
252b5132
RH		 5954/* 10 */ NULL, NULL, NULL, NULL,
5955/* 14 */ NULL, NULL, NULL, NULL,
5956/* 18 */ NULL, NULL, NULL, NULL,
9e525108 5957/* 1C */ "pf2iw", "pf2id", NULL, NULL,
252b5132
RH		 5958/* 20 */ NULL, NULL, NULL, NULL,
5959/* 24 */ NULL, NULL, NULL, NULL,
5960/* 28 */ NULL, NULL, NULL, NULL,
5961/* 2C */ NULL, NULL, NULL, NULL,
5962/* 30 */ NULL, NULL, NULL, NULL,
5963/* 34 */ NULL, NULL, NULL, NULL,
5964/* 38 */ NULL, NULL, NULL, NULL,
5965/* 3C */ NULL, NULL, NULL, NULL,
5966/* 40 */ NULL, NULL, NULL, NULL,
5967/* 44 */ NULL, NULL, NULL, NULL,
5968/* 48 */ NULL, NULL, NULL, NULL,
5969/* 4C */ NULL, NULL, NULL, NULL,
5970/* 50 */ NULL, NULL, NULL, NULL,
5971/* 54 */ NULL, NULL, NULL, NULL,
5972/* 58 */ NULL, NULL, NULL, NULL,
5973/* 5C */ NULL, NULL, NULL, NULL,
5974/* 60 */ NULL, NULL, NULL, NULL,
5975/* 64 */ NULL, NULL, NULL, NULL,
5976/* 68 */ NULL, NULL, NULL, NULL,
5977/* 6C */ NULL, NULL, NULL, NULL,
5978/* 70 */ NULL, NULL, NULL, NULL,
5979/* 74 */ NULL, NULL, NULL, NULL,
5980/* 78 */ NULL, NULL, NULL, NULL,
5981/* 7C */ NULL, NULL, NULL, NULL,
5982/* 80 */ NULL, NULL, NULL, NULL,
5983/* 84 */ NULL, NULL, NULL, NULL,
9e525108
AM		 5984/* 88 */ NULL, NULL, "pfnacc", NULL,
5985/* 8C */ NULL, NULL, "pfpnacc", NULL,
252b5132
RH		 5986/* 90 */ "pfcmpge", NULL, NULL, NULL,
5987/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
5988/* 98 */ NULL, NULL, "pfsub", NULL,
5989/* 9C */ NULL, NULL, "pfadd", NULL,
5990/* A0 */ "pfcmpgt", NULL, NULL, NULL,
5991/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
5992/* A8 */ NULL, NULL, "pfsubr", NULL,
5993/* AC */ NULL, NULL, "pfacc", NULL,
5994/* B0 */ "pfcmpeq", NULL, NULL, NULL,
9beff690 5995/* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw",
9e525108 5996/* B8 */ NULL, NULL, NULL, "pswapd",
252b5132
RH		 5997/* BC */ NULL, NULL, NULL, "pavgusb",
5998/* C0 */ NULL, NULL, NULL, NULL,
5999/* C4 */ NULL, NULL, NULL, NULL,
6000/* C8 */ NULL, NULL, NULL, NULL,
6001/* CC */ NULL, NULL, NULL, NULL,
6002/* D0 */ NULL, NULL, NULL, NULL,
6003/* D4 */ NULL, NULL, NULL, NULL,
6004/* D8 */ NULL, NULL, NULL, NULL,
6005/* DC */ NULL, NULL, NULL, NULL,
6006/* E0 */ NULL, NULL, NULL, NULL,
6007/* E4 */ NULL, NULL, NULL, NULL,
6008/* E8 */ NULL, NULL, NULL, NULL,
6009/* EC */ NULL, NULL, NULL, NULL,
6010/* F0 */ NULL, NULL, NULL, NULL,
6011/* F4 */ NULL, NULL, NULL, NULL,
6012/* F8 */ NULL, NULL, NULL, NULL,
6013/* FC */ NULL, NULL, NULL, NULL,
6014};
6015
6016static void
26ca5450 6017OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 6018{
6019 const char *mnemonic;
6020
6021 FETCH_DATA (the_info, codep + 1);
6022 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6023 place where an 8-bit immediate would normally go. ie. the last
6024 byte of the instruction. */
6608db57 6025 obufp = obuf + strlen (obuf);
c608c12e 6026 mnemonic = Suffix3DNow[*codep++ & 0xff];
252b5132 6027 if (mnemonic)
2da11e11 6028 oappend (mnemonic);
252b5132
RH		 6029 else
6030 {
6031 /* Since a variable sized modrm/sib chunk is between the start
6032 of the opcode (0x0f0f) and the opcode suffix, we need to do
6033 all the modrm processing first, and don't know until now that
6034 we have a bad opcode. This necessitates some cleaning up. */
ce518a5f
L		 6035 op_out[0][0] = '\0';
6036 op_out[1][0] = '\0';
6608db57 6037 BadOp ();
252b5132
RH		 6038 }
6039}
c608c12e 6040
6608db57 6041static const char *simd_cmp_op[] = {
c608c12e
AM		 6042 "eq",
6043 "lt",
6044 "le",
6045 "unord",
6046 "neq",
6047 "nlt",
6048 "nle",
6049 "ord"
6050};
6051
6052static void
26ca5450 6053OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 6054{
6055 unsigned int cmp_type;
6056
6057 FETCH_DATA (the_info, codep + 1);
6608db57 6058 obufp = obuf + strlen (obuf);
c608c12e
AM		 6059 cmp_type = *codep++ & 0xff;
6060 if (cmp_type < 8)
6061 {
041bd2e0
JH		 6062 char suffix1 = 'p', suffix2 = 's';
6063 used_prefixes |= (prefixes & PREFIX_REPZ);
6064 if (prefixes & PREFIX_REPZ)
6065 suffix1 = 's';
6066 else
6067 {
6068 used_prefixes |= (prefixes & PREFIX_DATA);
6069 if (prefixes & PREFIX_DATA)
6070 suffix2 = 'd';
6071 else
6072 {
6073 used_prefixes |= (prefixes & PREFIX_REPNZ);
6074 if (prefixes & PREFIX_REPNZ)
6075 suffix1 = 's', suffix2 = 'd';
6076 }
6077 }
6078 sprintf (scratchbuf, "cmp%s%c%c",
6079 simd_cmp_op[cmp_type], suffix1, suffix2);
7d421014 6080 used_prefixes |= (prefixes & PREFIX_REPZ);
2da11e11 6081 oappend (scratchbuf);
c608c12e
AM		 6082 }
6083 else
6084 {
6085 /* We have a bad extension byte. Clean up. */
ce518a5f
L		 6086 op_out[0][0] = '\0';
6087 op_out[1][0] = '\0';
6608db57 6088 BadOp ();
c608c12e
AM		 6089 }
6090}
6091
6092static void
26ca5450 6093SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 6094{
6095 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6096 forms of these instructions. */
7967e09e 6097 if (modrm.mod == 3)
c608c12e 6098 {
6608db57
KH		 6099 char *p = obuf + strlen (obuf);
6100 *(p + 1) = '\0';
6101 *p = *(p - 1);
6102 *(p - 1) = *(p - 2);
6103 *(p - 2) = *(p - 3);
6104 *(p - 3) = extrachar;
c608c12e
AM		 6105 }
6106}
2da11e11 6107
ca164297 6108static void
4fd61dcb 6109PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
ca164297 6110{
7967e09e 6111 if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 1)
ca164297 6112 {
ca164297 6113 /* Override "sidt". */
cb712a9e
L		 6114 size_t olen = strlen (obuf);
6115 char *p = obuf + olen - 4;
6116 const char **names = (address_mode == mode_64bit
6117 ? names64 : names32);
1d9f512f 6118
22cbf2e7 6119 /* We might have a suffix when disassembling with -Msuffix. */
1d9f512f
AM		 6120 if (*p == 'i')
6121 --p;
6122
cb712a9e
L		 6123 /* Remove "addr16/addr32" if we aren't in Intel mode. */
6124 if (!intel_syntax
6125 && (prefixes & PREFIX_ADDR)
6126 && olen >= (4 + 7)
6127 && *(p - 1) == ' '
0112cd26
NC		 6128 && CONST_STRNEQ (p - 7, "addr")
6129 && (CONST_STRNEQ (p - 3, "16")
6130 || CONST_STRNEQ (p - 3, "32")))
cb712a9e
L		 6131 p -= 7;
6132
7967e09e 6133 if (modrm.rm)
ca164297
L		 6134 {
6135 /* mwait %eax,%ecx */
1d9f512f 6136 strcpy (p, "mwait");
6128c599 6137 if (!intel_syntax)
ce518a5f 6138 strcpy (op_out[0], names[0]);
ca164297
L		 6139 }
6140 else
6141 {
6142 /* monitor %eax,%ecx,%edx" */
1d9f512f 6143 strcpy (p, "monitor");
6128c599
JB		 6144 if (!intel_syntax)
6145 {
cb712a9e
L		 6146 const char **op1_names;
6147 if (!(prefixes & PREFIX_ADDR))
6148 op1_names = (address_mode == mode_16bit
6149 ? names16 : names);
6128c599
JB		 6150 else
6151 {
cb712a9e
L		 6152 op1_names = (address_mode != mode_32bit
6153 ? names32 : names16);
6128c599
JB		 6154 used_prefixes |= PREFIX_ADDR;
6155 }
ce518a5f
L		 6156 strcpy (op_out[0], op1_names[0]);
6157 strcpy (op_out[2], names[2]);
6128c599
JB		 6158 }
6159 }
6160 if (!intel_syntax)
6161 {
ce518a5f 6162 strcpy (op_out[1], names[1]);
6128c599 6163 two_source_ops = 1;
ca164297
L		 6164 }
6165
6166 codep++;
6167 }
6168 else
30123838
JB		 6169 OP_M (0, sizeflag);
6170}
6171
6172static void
6173SVME_Fixup (int bytemode, int sizeflag)
6174{
6175 const char *alt;
6176 char *p;
6177
6178 switch (*codep)
6179 {
6180 case 0xd8:
6181 alt = "vmrun";
6182 break;
6183 case 0xd9:
6184 alt = "vmmcall";
6185 break;
6186 case 0xda:
6187 alt = "vmload";
6188 break;
6189 case 0xdb:
6190 alt = "vmsave";
6191 break;
6192 case 0xdc:
6193 alt = "stgi";
6194 break;
6195 case 0xdd:
6196 alt = "clgi";
6197 break;
6198 case 0xde:
6199 alt = "skinit";
6200 break;
6201 case 0xdf:
6202 alt = "invlpga";
6203 break;
6204 default:
6205 OP_M (bytemode, sizeflag);
6206 return;
6207 }
6208 /* Override "lidt". */
6209 p = obuf + strlen (obuf) - 4;
6210 /* We might have a suffix. */
6211 if (*p == 'i')
6212 --p;
6213 strcpy (p, alt);
6214 if (!(prefixes & PREFIX_ADDR))
6215 {
6216 ++codep;
6217 return;
6218 }
6219 used_prefixes |= PREFIX_ADDR;
6220 switch (*codep++)
6221 {
6222 case 0xdf:
ce518a5f 6223 strcpy (op_out[1], names32[1]);
30123838
JB		 6224 two_source_ops = 1;
6225 /* Fall through. */
6226 case 0xd8:
6227 case 0xda:
6228 case 0xdb:
6229 *obufp++ = open_char;
cb712a9e 6230 if (address_mode == mode_64bit || (sizeflag & AFLAG))
30123838
JB		 6231 alt = names32[0];
6232 else
6233 alt = names16[0];
6234 strcpy (obufp, alt);
6235 obufp += strlen (alt);
6236 *obufp++ = close_char;
6237 *obufp = '\0';
6238 break;
6239 }
ca164297
L		 6240}
6241
4fd61dcb
JJ		 6242static void
6243INVLPG_Fixup (int bytemode, int sizeflag)
6244{
373ff435 6245 const char *alt;
4fd61dcb 6246
373ff435
JB		 6247 switch (*codep)
6248 {
6249 case 0xf8:
6250 alt = "swapgs";
6251 break;
6252 case 0xf9:
6253 alt = "rdtscp";
6254 break;
6255 default:
30123838 6256 OP_M (bytemode, sizeflag);
373ff435 6257 return;
4fd61dcb 6258 }
373ff435
JB		 6259 /* Override "invlpg". */
6260 strcpy (obuf + strlen (obuf) - 6, alt);
6261 codep++;
4fd61dcb
JJ		 6262}
6263
6608db57
KH		 6264static void
6265BadOp (void)
2da11e11 6266{
6608db57
KH		 6267 /* Throw away prefixes and 1st. opcode byte. */
6268 codep = insn_codep + 1;
2da11e11
AM		 6269 oappend ("(bad)");
6270}
4cc91dba 6271
90700ea2
L		 6272static void
6273VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
6274{
7967e09e
L		 6275 if (modrm.mod == 3
6276 && modrm.reg == 0
6277 && modrm.rm >=1
6278 && modrm.rm <= 4)
90700ea2
L		 6279 {
6280 /* Override "sgdt". */
6281 char *p = obuf + strlen (obuf) - 4;
6282
22cbf2e7
L		 6283 /* We might have a suffix when disassembling with -Msuffix. */
6284 if (*p == 'g')
90700ea2
L		 6285 --p;
6286
7967e09e 6287 switch (modrm.rm)
90700ea2
L		 6288 {
6289 case 1:
6290 strcpy (p, "vmcall");
6291 break;
6292 case 2:
6293 strcpy (p, "vmlaunch");
6294 break;
6295 case 3:
6296 strcpy (p, "vmresume");
6297 break;
6298 case 4:
6299 strcpy (p, "vmxoff");
6300 break;
6301 }
6302
6303 codep++;
6304 }
6305 else
6306 OP_E (0, sizeflag);
6307}
6308
6309static void
6310OP_VMX (int bytemode, int sizeflag)
6311{
6312 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
6313 if (prefixes & PREFIX_DATA)
6314 strcpy (obuf, "vmclear");
6315 else if (prefixes & PREFIX_REPZ)
6316 strcpy (obuf, "vmxon");
6317 else
6318 strcpy (obuf, "vmptrld");
6319 OP_E (bytemode, sizeflag);
6320}
35c52694
L		 6321
6322static void
6323REP_Fixup (int bytemode, int sizeflag)
6324{
6325 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6326 lods and stos. */
6327 size_t ilen = 0;
6328
6329 if (prefixes & PREFIX_REPZ)
246c51aa 6330 switch (*insn_codep)
35c52694
L		 6331 {
6332 case 0x6e: /* outsb */
6333 case 0x6f: /* outsw/outsl */
6334 case 0xa4: /* movsb */
6335 case 0xa5: /* movsw/movsl/movsq */
6336 if (!intel_syntax)
6337 ilen = 5;
6338 else
6339 ilen = 4;
6340 break;
6341 case 0xaa: /* stosb */
6342 case 0xab: /* stosw/stosl/stosq */
6343 case 0xac: /* lodsb */
6344 case 0xad: /* lodsw/lodsl/lodsq */
6345 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
6346 ilen = 5;
6347 else
6348 ilen = 4;
6349 break;
6350 case 0x6c: /* insb */
6351 case 0x6d: /* insl/insw */
6352 if (!intel_syntax)
6353 ilen = 4;
6354 else
6355 ilen = 3;
6356 break;
6357 default:
6358 abort ();
6359 break;
6360 }
6361
6362 if (ilen != 0)
6363 {
6364 size_t olen;
6365 char *p;
6366
6367 olen = strlen (obuf);
6368 p = obuf + olen - ilen - 1 - 4;
6369 /* Handle "repz [addr16|addr32]". */
6370 if ((prefixes & PREFIX_ADDR))
6371 p -= 1 + 6;
6372
6373 memmove (p + 3, p + 4, olen - (p + 3 - obuf));
6374 }
6375
6376 switch (bytemode)
6377 {
6378 case al_reg:
6379 case eAX_reg:
6380 case indir_dx_reg:
6381 OP_IMREG (bytemode, sizeflag);
6382 break;
6383 case eDI_reg:
6384 OP_ESreg (bytemode, sizeflag);
6385 break;
6386 case eSI_reg:
6387 OP_DSreg (bytemode, sizeflag);
6388 break;
6389 default:
6390 abort ();
6391 break;
6392 }
6393}
f5804c90
L		 6394
6395static void
6396CMPXCHG8B_Fixup (int bytemode, int sizeflag)
6397{
161a04f6
L		 6398 USED_REX (REX_W);
6399 if (rex & REX_W)
f5804c90
L		 6400 {
6401 /* Change cmpxchg8b to cmpxchg16b. */
6402 char *p = obuf + strlen (obuf) - 2;
6403 strcpy (p, "16b");
fb9c77c7 6404 bytemode = o_mode;
f5804c90
L		 6405 }
6406 OP_M (bytemode, sizeflag);
6407}
42903f7f
L		 6408
6409static void
6410XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
6411{
6412 sprintf (scratchbuf, "%%xmm%d", reg);
6413 oappend (scratchbuf + intel_syntax);
6414}
381d071f
L		 6415
6416static void
6417CRC32_Fixup (int bytemode, int sizeflag)
6418{
6419 /* Add proper suffix to "crc32". */
6420 char *p = obuf + strlen (obuf);
6421
6422 switch (bytemode)
6423 {
6424 case b_mode:
20592a94
L		 6425 if (intel_syntax)
6426 break;
6427
381d071f
L		 6428 *p++ = 'b';
6429 break;
6430 case v_mode:
20592a94
L		 6431 if (intel_syntax)
6432 break;
6433
381d071f
L		 6434 USED_REX (REX_W);
6435 if (rex & REX_W)
6436 *p++ = 'q';
9344ff29 6437 else if (sizeflag & DFLAG)
20592a94 6438 *p++ = 'l';
381d071f 6439 else
9344ff29
L		 6440 *p++ = 'w';
6441 used_prefixes |= (prefixes & PREFIX_DATA);
381d071f
L		 6442 break;
6443 default:
6444 oappend (INTERNAL_DISASSEMBLER_ERROR);
6445 break;
6446 }
6447 *p = '\0';
6448
6449 if (modrm.mod == 3)
6450 {
6451 int add;
6452
6453 /* Skip mod/rm byte. */
6454 MODRM_CHECK;
6455 codep++;
6456
6457 USED_REX (REX_B);
6458 add = (rex & REX_B) ? 8 : 0;
6459 if (bytemode == b_mode)
6460 {
6461 USED_REX (0);
6462 if (rex)
6463 oappend (names8rex[modrm.rm + add]);
6464 else
6465 oappend (names8[modrm.rm + add]);
6466 }
6467 else
6468 {
6469 USED_REX (REX_W);
6470 if (rex & REX_W)
6471 oappend (names64[modrm.rm + add]);
6472 else if ((prefixes & PREFIX_DATA))
6473 oappend (names16[modrm.rm + add]);
6474 else
6475 oappend (names32[modrm.rm + add]);
6476 }
6477 }
6478 else
9344ff29 6479 OP_E (bytemode, sizeflag);
381d071f 6480}
GDB Binutils - Deliverables
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