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* elf-m10300.c (elf32_mn10300_link_hash_entry): Add value.
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
CommitLineData
252b5132 1/* Print i386 instructions for GDB, the GNU debugger.
060d22b0 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
aef6203b 3 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
252b5132 4
20f0a1fc
NC		 5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
f4321104 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20f0a1fc
NC		 20
21/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
26
27/* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
252b5132
RH		 33
34#include "dis-asm.h"
35#include "sysdep.h"
36#include "opintl.h"
37
272c9217 38#define MAXLEN 15
252b5132
RH		 39
40#include <setjmp.h>
41
42#ifndef UNIXWARE_COMPAT
43/* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45#define UNIXWARE_COMPAT 1
46#endif
47
26ca5450
AJ		 48static int fetch_data (struct disassemble_info *, bfd_byte *);
49static void ckprefix (void);
50static const char *prefix_name (int, int);
51static int print_insn (bfd_vma, disassemble_info *);
52static void dofloat (int);
53static void OP_ST (int, int);
54static void OP_STi (int, int);
55static int putop (const char *, int);
56static void oappend (const char *);
57static void append_seg (void);
58static void OP_indirE (int, int);
59static void print_operand_value (char *, int, bfd_vma);
60static void OP_E (int, int);
61static void OP_G (int, int);
62static bfd_vma get64 (void);
63static bfd_signed_vma get32 (void);
64static bfd_signed_vma get32s (void);
65static int get16 (void);
66static void set_op (bfd_vma, int);
67static void OP_REG (int, int);
68static void OP_IMREG (int, int);
69static void OP_I (int, int);
70static void OP_I64 (int, int);
71static void OP_sI (int, int);
72static void OP_J (int, int);
73static void OP_SEG (int, int);
74static void OP_DIR (int, int);
75static void OP_OFF (int, int);
76static void OP_OFF64 (int, int);
77static void ptr_reg (int, int);
78static void OP_ESreg (int, int);
79static void OP_DSreg (int, int);
80static void OP_C (int, int);
81static void OP_D (int, int);
82static void OP_T (int, int);
83static void OP_Rd (int, int);
84static void OP_MMX (int, int);
85static void OP_XMM (int, int);
86static void OP_EM (int, int);
87static void OP_EX (int, int);
88static void OP_MS (int, int);
89static void OP_XS (int, int);
cc0ec051 90static void OP_M (int, int);
90700ea2 91static void OP_VMX (int, int);
cc0ec051
AM		 92static void OP_0fae (int, int);
93static void OP_0f07 (int, int);
46e883c5
L		 94static void NOP_Fixup1 (int, int);
95static void NOP_Fixup2 (int, int);
26ca5450
AJ		 96static void OP_3DNowSuffix (int, int);
97static void OP_SIMD_Suffix (int, int);
98static void SIMD_Fixup (int, int);
99static void PNI_Fixup (int, int);
30123838 100static void SVME_Fixup (int, int);
4fd61dcb 101static void INVLPG_Fixup (int, int);
26ca5450 102static void BadOp (void);
4cc91dba 103static void SEG_Fixup (int, int);
90700ea2 104static void VMX_Fixup (int, int);
35c52694 105static void REP_Fixup (int, int);
252b5132 106
6608db57 107struct dis_private {
252b5132
RH		 108 /* Points to first byte not fetched. */
109 bfd_byte *max_fetched;
110 bfd_byte the_buffer[MAXLEN];
111 bfd_vma insn_start;
e396998b 112 int orig_sizeflag;
252b5132
RH		 113 jmp_buf bailout;
114};
115
5076851f
ILT		 116/* The opcode for the fwait instruction, which we treat as a prefix
117 when we can. */
118#define FWAIT_OPCODE (0x9b)
119
cb712a9e
L		 120enum address_mode
121{
122 mode_16bit,
123 mode_32bit,
124 mode_64bit
125};
126
127enum address_mode address_mode;
52b15da3 128
5076851f
ILT		 129/* Flags for the prefixes for the current instruction. See below. */
130static int prefixes;
131
52b15da3
JH		 132/* REX prefix the current instruction. See below. */
133static int rex;
134/* Bits of REX we've already used. */
135static int rex_used;
136#define REX_MODE64 8
137#define REX_EXTX 4
138#define REX_EXTY 2
139#define REX_EXTZ 1
140/* Mark parts used in the REX prefix. When we are testing for
141 empty prefix (for 8bit register REX extension), just mask it
142 out. Otherwise test for REX bit is excuse for existence of REX
143 only in case value is nonzero. */
144#define USED_REX(value) \
145 { \
146 if (value) \
147 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
148 else \
149 rex_used |= 0x40; \
150 }
151
7d421014
ILT		 152/* Flags for prefixes which we somehow handled when printing the
153 current instruction. */
154static int used_prefixes;
155
5076851f
ILT		 156/* Flags stored in PREFIXES. */
157#define PREFIX_REPZ 1
158#define PREFIX_REPNZ 2
159#define PREFIX_LOCK 4
160#define PREFIX_CS 8
161#define PREFIX_SS 0x10
162#define PREFIX_DS 0x20
163#define PREFIX_ES 0x40
164#define PREFIX_FS 0x80
165#define PREFIX_GS 0x100
166#define PREFIX_DATA 0x200
167#define PREFIX_ADDR 0x400
168#define PREFIX_FWAIT 0x800
169
252b5132
RH		 170/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
171 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
172 on error. */
173#define FETCH_DATA(info, addr) \
6608db57 174 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
252b5132
RH		 175 ? 1 : fetch_data ((info), (addr)))
176
177static int
26ca5450 178fetch_data (struct disassemble_info *info, bfd_byte *addr)
252b5132
RH		 179{
180 int status;
6608db57 181 struct dis_private *priv = (struct dis_private *) info->private_data;
252b5132
RH		 182 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
183
272c9217
JB		 184 if (addr <= priv->the_buffer + MAXLEN)
185 status = (*info->read_memory_func) (start,
186 priv->max_fetched,
187 addr - priv->max_fetched,
188 info);
189 else
190 status = -1;
252b5132
RH		 191 if (status != 0)
192 {
7d421014 193 /* If we did manage to read at least one byte, then
db6eb5be
AM		 194 print_insn_i386 will do something sensible. Otherwise, print
195 an error. We do that here because this is where we know
196 STATUS. */
7d421014 197 if (priv->max_fetched == priv->the_buffer)
5076851f 198 (*info->memory_error_func) (status, start, info);
252b5132
RH		 199 longjmp (priv->bailout, 1);
200 }
201 else
202 priv->max_fetched = addr;
203 return 1;
204}
205
57d91c3c
ILT		 206#define XX NULL, 0
207
252b5132 208#define Eb OP_E, b_mode
52b15da3
JH		 209#define Ev OP_E, v_mode
210#define Ed OP_E, d_mode
9306ca4a 211#define Eq OP_E, q_mode
db6eb5be 212#define Edq OP_E, dq_mode
9306ca4a 213#define Edqw OP_E, dqw_mode
1a114b12 214#define indirEv OP_indirE, stack_v_mode
9306ca4a 215#define indirEp OP_indirE, f_mode
1a114b12 216#define stackEv OP_E, stack_v_mode
90700ea2 217#define Em OP_E, m_mode
252b5132
RH		 218#define Ew OP_E, w_mode
219#define Ma OP_E, v_mode
cc0ec051 220#define M OP_M, 0 /* lea, lgdt, etc. */
9306ca4a 221#define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
992aaec9 222#define Gb OP_G, b_mode
252b5132 223#define Gv OP_G, v_mode
992aaec9 224#define Gd OP_G, d_mode
9306ca4a 225#define Gdq OP_G, dq_mode
90700ea2 226#define Gm OP_G, m_mode
252b5132 227#define Gw OP_G, w_mode
2da11e11 228#define Rd OP_Rd, d_mode
52b15da3 229#define Rm OP_Rd, m_mode
252b5132
RH		 230#define Ib OP_I, b_mode
231#define sIb OP_sI, b_mode /* sign extened byte */
232#define Iv OP_I, v_mode
52b15da3
JH		 233#define Iq OP_I, q_mode
234#define Iv64 OP_I64, v_mode
252b5132 235#define Iw OP_I, w_mode
9306ca4a 236#define I1 OP_I, const_1_mode
252b5132
RH		 237#define Jb OP_J, b_mode
238#define Jv OP_J, v_mode
52b15da3
JH		 239#define Cm OP_C, m_mode
240#define Dm OP_D, m_mode
252b5132 241#define Td OP_T, d_mode
4cc91dba 242#define Sv SEG_Fixup, v_mode
252b5132 243
52b15da3
JH		 244#define RMeAX OP_REG, eAX_reg
245#define RMeBX OP_REG, eBX_reg
246#define RMeCX OP_REG, eCX_reg
247#define RMeDX OP_REG, eDX_reg
248#define RMeSP OP_REG, eSP_reg
249#define RMeBP OP_REG, eBP_reg
250#define RMeSI OP_REG, eSI_reg
251#define RMeDI OP_REG, eDI_reg
252#define RMrAX OP_REG, rAX_reg
253#define RMrBX OP_REG, rBX_reg
254#define RMrCX OP_REG, rCX_reg
255#define RMrDX OP_REG, rDX_reg
256#define RMrSP OP_REG, rSP_reg
257#define RMrBP OP_REG, rBP_reg
258#define RMrSI OP_REG, rSI_reg
259#define RMrDI OP_REG, rDI_reg
260#define RMAL OP_REG, al_reg
261#define RMAL OP_REG, al_reg
262#define RMCL OP_REG, cl_reg
263#define RMDL OP_REG, dl_reg
264#define RMBL OP_REG, bl_reg
265#define RMAH OP_REG, ah_reg
266#define RMCH OP_REG, ch_reg
267#define RMDH OP_REG, dh_reg
268#define RMBH OP_REG, bh_reg
269#define RMAX OP_REG, ax_reg
270#define RMDX OP_REG, dx_reg
271
272#define eAX OP_IMREG, eAX_reg
273#define eBX OP_IMREG, eBX_reg
274#define eCX OP_IMREG, eCX_reg
275#define eDX OP_IMREG, eDX_reg
276#define eSP OP_IMREG, eSP_reg
277#define eBP OP_IMREG, eBP_reg
278#define eSI OP_IMREG, eSI_reg
279#define eDI OP_IMREG, eDI_reg
280#define AL OP_IMREG, al_reg
52b15da3
JH		 281#define CL OP_IMREG, cl_reg
282#define DL OP_IMREG, dl_reg
283#define BL OP_IMREG, bl_reg
284#define AH OP_IMREG, ah_reg
285#define CH OP_IMREG, ch_reg
286#define DH OP_IMREG, dh_reg
287#define BH OP_IMREG, bh_reg
288#define AX OP_IMREG, ax_reg
289#define DX OP_IMREG, dx_reg
290#define indirDX OP_IMREG, indir_dx_reg
252b5132
RH		 291
292#define Sw OP_SEG, w_mode
c608c12e 293#define Ap OP_DIR, 0
1a114b12
JB		 294#define Ob OP_OFF64, b_mode
295#define Ov OP_OFF64, v_mode
252b5132
RH		 296#define Xb OP_DSreg, eSI_reg
297#define Xv OP_DSreg, eSI_reg
298#define Yb OP_ESreg, eDI_reg
299#define Yv OP_ESreg, eDI_reg
300#define DSBX OP_DSreg, eBX_reg
301
302#define es OP_REG, es_reg
303#define ss OP_REG, ss_reg
304#define cs OP_REG, cs_reg
305#define ds OP_REG, ds_reg
306#define fs OP_REG, fs_reg
307#define gs OP_REG, gs_reg
308
309#define MX OP_MMX, 0
c608c12e 310#define XM OP_XMM, 0
252b5132 311#define EM OP_EM, v_mode
c608c12e 312#define EX OP_EX, v_mode
2da11e11 313#define MS OP_MS, v_mode
992aaec9 314#define XS OP_XS, v_mode
90700ea2 315#define VM OP_VMX, q_mode
252b5132 316#define OPSUF OP_3DNowSuffix, 0
c608c12e 317#define OPSIMD OP_SIMD_Suffix, 0
252b5132 318
35c52694
L		 319/* Used handle "rep" prefix for string instructions. */
320#define Xbr REP_Fixup, eSI_reg
321#define Xvr REP_Fixup, eSI_reg
322#define Ybr REP_Fixup, eDI_reg
323#define Yvr REP_Fixup, eDI_reg
324#define indirDXr REP_Fixup, indir_dx_reg
325#define ALr REP_Fixup, al_reg
326#define eAXr REP_Fixup, eAX_reg
327
3ffd33cf
AM		 328#define cond_jump_flag NULL, cond_jump_mode
329#define loop_jcxz_flag NULL, loop_jcxz_mode
330
252b5132 331/* bits in sizeflag */
252b5132 332#define SUFFIX_ALWAYS 4
252b5132
RH		 333#define AFLAG 2
334#define DFLAG 1
335
52b15da3
JH		 336#define b_mode 1 /* byte operand */
337#define v_mode 2 /* operand size depends on prefixes */
338#define w_mode 3 /* word operand */
339#define d_mode 4 /* double word operand */
340#define q_mode 5 /* quad word operand */
9306ca4a
JB		 341#define t_mode 6 /* ten-byte operand */
342#define x_mode 7 /* 16-byte XMM operand */
343#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
344#define cond_jump_mode 9
345#define loop_jcxz_mode 10
346#define dq_mode 11 /* operand size depends on REX prefixes. */
347#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
348#define f_mode 13 /* 4- or 6-byte pointer operand */
349#define const_1_mode 14
1a114b12 350#define stack_v_mode 15 /* v_mode for stack-related opcodes. */
252b5132
RH		 351
352#define es_reg 100
353#define cs_reg 101
354#define ss_reg 102
355#define ds_reg 103
356#define fs_reg 104
357#define gs_reg 105
252b5132 358
c608c12e
AM		 359#define eAX_reg 108
360#define eCX_reg 109
361#define eDX_reg 110
362#define eBX_reg 111
363#define eSP_reg 112
364#define eBP_reg 113
365#define eSI_reg 114
366#define eDI_reg 115
252b5132
RH		 367
368#define al_reg 116
369#define cl_reg 117
370#define dl_reg 118
371#define bl_reg 119
372#define ah_reg 120
373#define ch_reg 121
374#define dh_reg 122
375#define bh_reg 123
376
377#define ax_reg 124
378#define cx_reg 125
379#define dx_reg 126
380#define bx_reg 127
381#define sp_reg 128
382#define bp_reg 129
383#define si_reg 130
384#define di_reg 131
385
52b15da3
JH		 386#define rAX_reg 132
387#define rCX_reg 133
388#define rDX_reg 134
389#define rBX_reg 135
390#define rSP_reg 136
391#define rBP_reg 137
392#define rSI_reg 138
393#define rDI_reg 139
394
252b5132
RH		 395#define indir_dx_reg 150
396
6439fc28
AM		 397#define FLOATCODE 1
398#define USE_GROUPS 2
399#define USE_PREFIX_USER_TABLE 3
400#define X86_64_SPECIAL 4
331d2d0d 401#define IS_3BYTE_OPCODE 5
6439fc28 402
050dfa73
MM		 403#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0, NULL, 0
404
405#define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0, NULL, 0
406#define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0, NULL, 0
407#define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0, NULL, 0
408#define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0, NULL, 0
409#define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0, NULL, 0
410#define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0, NULL, 0
411#define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0, NULL, 0
412#define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0, NULL, 0
413#define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0, NULL, 0
414#define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0, NULL, 0
415#define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0, NULL, 0
416#define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0, NULL, 0
417#define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0, NULL, 0
418#define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0, NULL, 0
419#define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0, NULL, 0
420#define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0, NULL, 0
421#define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0, NULL, 0
a6bd098c
L		 422#define GRP11_C6 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0, NULL, 0
423#define GRP11_C7 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0, NULL, 0
424#define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0, NULL, 0
425#define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0, NULL, 0
426#define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0, NULL, 0
427#define GRP15 NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0, NULL, 0
428#define GRP16 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0, NULL, 0
429#define GRPAMD NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0, NULL, 0
430#define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 25, NULL, 0, NULL, 0
431#define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 26, NULL, 0, NULL, 0
050dfa73
MM		 432
433#define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0, NULL, 0
434#define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0, NULL, 0
435#define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0, NULL, 0
436#define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0, NULL, 0
437#define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0, NULL, 0
438#define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0, NULL, 0
439#define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0, NULL, 0
440#define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0, NULL, 0
441#define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0, NULL, 0
442#define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0, NULL, 0
443#define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0, NULL, 0
444#define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0, NULL, 0
445#define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0, NULL, 0
446#define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0, NULL, 0
447#define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0, NULL, 0
448#define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0, NULL, 0
449#define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0, NULL, 0
450#define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0, NULL, 0
451#define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0, NULL, 0
452#define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0, NULL, 0
453#define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0, NULL, 0
454#define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0, NULL, 0
455#define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0, NULL, 0
456#define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0, NULL, 0
457#define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0, NULL, 0
458#define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0, NULL, 0
459#define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0, NULL, 0
460#define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0, NULL, 0
461#define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0, NULL, 0
462#define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0, NULL, 0
463#define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0, NULL, 0
464#define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0, NULL, 0
465#define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0, NULL, 0
466#define PREGRP33 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 33, NULL, 0, NULL, 0
467#define PREGRP34 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 34, NULL, 0, NULL, 0
468#define PREGRP35 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 35, NULL, 0, NULL, 0
469#define PREGRP36 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 36, NULL, 0, NULL, 0
470
471#define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0, NULL, 0
472
473#define THREE_BYTE_0 NULL, NULL, IS_3BYTE_OPCODE, NULL, 0, NULL, 0, NULL, 0
474#define THREE_BYTE_1 NULL, NULL, IS_3BYTE_OPCODE, NULL, 1, NULL, 0, NULL, 0
331d2d0d 475
26ca5450 476typedef void (*op_rtn) (int bytemode, int sizeflag);
252b5132
RH		 477
478struct dis386 {
2da11e11 479 const char *name;
252b5132
RH		 480 op_rtn op1;
481 int bytemode1;
482 op_rtn op2;
483 int bytemode2;
484 op_rtn op3;
485 int bytemode3;
050dfa73
MM		 486 op_rtn op4;
487 int bytemode4;
252b5132
RH		 488};
489
490/* Upper case letters in the instruction names here are macros.
491 'A' => print 'b' if no register operands or suffix_always is true
492 'B' => print 'b' if suffix_always is true
9306ca4a
JB		 493 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
494 . size prefix
252b5132 495 'E' => print 'e' if 32-bit form of jcxz
3ffd33cf 496 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
5dd0794d 497 'H' => print ",pt" or ",pn" branch hint
9306ca4a
JB		 498 'I' => honor following macro letter even in Intel mode (implemented only
499 . for some of the macro letters)
500 'J' => print 'l'
252b5132
RH		 501 'L' => print 'l' if suffix_always is true
502 'N' => print 'n' if instruction has no wait "prefix"
52b15da3
JH		 503 'O' => print 'd', or 'o'
504 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
e396998b
AM		 505 . or suffix_always is true. print 'q' if rex prefix is present.
506 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
507 . is true
52b15da3
JH		 508 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
509 'S' => print 'w', 'l' or 'q' if suffix_always is true
6439fc28
AM		 510 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
511 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
1a114b12 512 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
10084519 513 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
9306ca4a 514 'X' => print 's', 'd' depending on data16 prefix (for XMM)
76f227a5 515 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
6dd5059a 516 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
52b15da3 517
6439fc28
AM		 518 Many of the above letters print nothing in Intel mode. See "putop"
519 for the details.
52b15da3 520
6439fc28
AM		 521 Braces '{' and '}', and vertical bars '|', indicate alternative
522 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
523 modes. In cases where there are only two alternatives, the X86_64
524 instruction is reserved, and "(bad)" is printed.
525*/
252b5132 526
6439fc28 527static const struct dis386 dis386[] = {
252b5132 528 /* 00 */
050dfa73
MM		 529 { "addB", Eb, Gb, XX, XX },
530 { "addS", Ev, Gv, XX, XX },
531 { "addB", Gb, Eb, XX, XX },
532 { "addS", Gv, Ev, XX, XX },
533 { "addB", AL, Ib, XX, XX },
534 { "addS", eAX, Iv, XX, XX },
535 { "push{T|}", es, XX, XX, XX },
536 { "pop{T|}", es, XX, XX, XX },
252b5132 537 /* 08 */
050dfa73
MM		 538 { "orB", Eb, Gb, XX, XX },
539 { "orS", Ev, Gv, XX, XX },
540 { "orB", Gb, Eb, XX, XX },
541 { "orS", Gv, Ev, XX , XX},
542 { "orB", AL, Ib, XX, XX },
543 { "orS", eAX, Iv, XX, XX },
544 { "push{T|}", cs, XX, XX, XX },
545 { "(bad)", XX, XX, XX, XX }, /* 0x0f extended opcode escape */
252b5132 546 /* 10 */
050dfa73
MM		 547 { "adcB", Eb, Gb, XX, XX },
548 { "adcS", Ev, Gv, XX, XX },
549 { "adcB", Gb, Eb, XX, XX },
550 { "adcS", Gv, Ev, XX, XX },
551 { "adcB", AL, Ib, XX, XX },
552 { "adcS", eAX, Iv, XX, XX },
553 { "push{T|}", ss, XX, XX, XX },
554 { "pop{T|}", ss, XX, XX, XX },
252b5132 555 /* 18 */
050dfa73
MM		 556 { "sbbB", Eb, Gb, XX, XX },
557 { "sbbS", Ev, Gv, XX, XX },
558 { "sbbB", Gb, Eb, XX, XX },
559 { "sbbS", Gv, Ev, XX, XX },
560 { "sbbB", AL, Ib, XX, XX },
561 { "sbbS", eAX, Iv, XX, XX },
562 { "push{T|}", ds, XX, XX, XX },
563 { "pop{T|}", ds, XX, XX, XX },
252b5132 564 /* 20 */
050dfa73
MM		 565 { "andB", Eb, Gb, XX, XX },
566 { "andS", Ev, Gv, XX, XX },
567 { "andB", Gb, Eb, XX, XX },
568 { "andS", Gv, Ev, XX, XX },
569 { "andB", AL, Ib, XX, XX },
570 { "andS", eAX, Iv, XX, XX },
571 { "(bad)", XX, XX, XX, XX }, /* SEG ES prefix */
572 { "daa{|}", XX, XX, XX, XX },
252b5132 573 /* 28 */
050dfa73
MM		 574 { "subB", Eb, Gb, XX, XX },
575 { "subS", Ev, Gv, XX, XX},
576 { "subB", Gb, Eb, XX, XX },
577 { "subS", Gv, Ev, XX, XX },
578 { "subB", AL, Ib, XX, XX },
579 { "subS", eAX, Iv, XX, XX },
580 { "(bad)", XX, XX, XX, XX }, /* SEG CS prefix */
581 { "das{|}", XX, XX, XX, XX },
252b5132 582 /* 30 */
050dfa73
MM		 583 { "xorB", Eb, Gb, XX, XX },
584 { "xorS", Ev, Gv, XX, XX },
585 { "xorB", Gb, Eb, XX, XX },
586 { "xorS", Gv, Ev, XX, XX },
587 { "xorB", AL, Ib, XX, XX },
588 { "xorS", eAX, Iv, XX, XX },
589 { "(bad)", XX, XX, XX, XX }, /* SEG SS prefix */
590 { "aaa{|}", XX, XX, XX, XX },
252b5132 591 /* 38 */
050dfa73
MM		 592 { "cmpB", Eb, Gb, XX, XX },
593 { "cmpS", Ev, Gv, XX, XX },
594 { "cmpB", Gb, Eb, XX, XX },
595 { "cmpS", Gv, Ev, XX, XX },
596 { "cmpB", AL, Ib, XX, XX },
597 { "cmpS", eAX, Iv, XX, XX },
598 { "(bad)", XX, XX, XX, XX }, /* SEG DS prefix */
599 { "aas{|}", XX, XX, XX, XX },
252b5132 600 /* 40 */
050dfa73
MM		 601 { "inc{S|}", RMeAX, XX, XX, XX },
602 { "inc{S|}", RMeCX, XX, XX, XX },
603 { "inc{S|}", RMeDX, XX, XX, XX },
604 { "inc{S|}", RMeBX, XX, XX, XX },
605 { "inc{S|}", RMeSP, XX, XX, XX },
606 { "inc{S|}", RMeBP, XX, XX, XX },
607 { "inc{S|}", RMeSI, XX, XX, XX },
608 { "inc{S|}", RMeDI, XX, XX, XX },
252b5132 609 /* 48 */
050dfa73
MM		 610 { "dec{S|}", RMeAX, XX, XX, XX },
611 { "dec{S|}", RMeCX, XX, XX, XX },
612 { "dec{S|}", RMeDX, XX, XX, XX },
613 { "dec{S|}", RMeBX, XX, XX, XX },
614 { "dec{S|}", RMeSP, XX, XX, XX },
615 { "dec{S|}", RMeBP, XX, XX, XX },
616 { "dec{S|}", RMeSI, XX, XX, XX },
617 { "dec{S|}", RMeDI, XX, XX, XX },
252b5132 618 /* 50 */
050dfa73
MM		 619 { "pushV", RMrAX, XX, XX, XX },
620 { "pushV", RMrCX, XX, XX, XX },
621 { "pushV", RMrDX, XX, XX, XX },
622 { "pushV", RMrBX, XX, XX, XX },
623 { "pushV", RMrSP, XX, XX, XX },
624 { "pushV", RMrBP, XX, XX, XX },
625 { "pushV", RMrSI, XX, XX, XX },
626 { "pushV", RMrDI, XX, XX, XX },
252b5132 627 /* 58 */
050dfa73
MM		 628 { "popV", RMrAX, XX, XX, XX },
629 { "popV", RMrCX, XX, XX, XX },
630 { "popV", RMrDX, XX, XX, XX },
631 { "popV", RMrBX, XX, XX, XX },
632 { "popV", RMrSP, XX, XX, XX },
633 { "popV", RMrBP, XX, XX, XX },
634 { "popV", RMrSI, XX, XX, XX },
635 { "popV", RMrDI, XX, XX, XX },
252b5132 636 /* 60 */
050dfa73
MM		 637 { "pusha{P|}", XX, XX, XX, XX},
638 { "popa{P|}", XX, XX, XX, XX },
639 { "bound{S|}", Gv, Ma, XX, XX },
6439fc28 640 { X86_64_0 },
050dfa73
MM		 641 { "(bad)", XX, XX, XX, XX }, /* seg fs */
642 { "(bad)", XX, XX, XX, XX }, /* seg gs */
643 { "(bad)", XX, XX, XX, XX }, /* op size prefix */
644 { "(bad)", XX, XX, XX, XX }, /* adr size prefix */
252b5132 645 /* 68 */
050dfa73
MM		 646 { "pushT", Iq, XX, XX, XX },
647 { "imulS", Gv, Ev, Iv, XX },
648 { "pushT", sIb, XX, XX, XX },
649 { "imulS", Gv, Ev, sIb, XX },
650 { "ins{b||b|}", Ybr, indirDX, XX, XX },
651 { "ins{R||R|}", Yvr, indirDX, XX, XX },
652 { "outs{b||b|}", indirDXr, Xb, XX, XX },
653 { "outs{R||R|}", indirDXr, Xv, XX, XX },
252b5132 654 /* 70 */
050dfa73
MM		 655 { "joH", Jb, XX, cond_jump_flag, XX },
656 { "jnoH", Jb, XX, cond_jump_flag, XX },
657 { "jbH", Jb, XX, cond_jump_flag, XX },
658 { "jaeH", Jb, XX, cond_jump_flag, XX },
659 { "jeH", Jb, XX, cond_jump_flag, XX },
660 { "jneH", Jb, XX, cond_jump_flag, XX },
661 { "jbeH", Jb, XX, cond_jump_flag, XX },
662 { "jaH", Jb, XX, cond_jump_flag, XX },
252b5132 663 /* 78 */
050dfa73
MM		 664 { "jsH", Jb, XX, cond_jump_flag, XX },
665 { "jnsH", Jb, XX, cond_jump_flag, XX },
666 { "jpH", Jb, XX, cond_jump_flag, XX },
667 { "jnpH", Jb, XX, cond_jump_flag, XX },
668 { "jlH", Jb, XX, cond_jump_flag, XX },
669 { "jgeH", Jb, XX, cond_jump_flag, XX },
670 { "jleH", Jb, XX, cond_jump_flag, XX },
671 { "jgH", Jb, XX, cond_jump_flag, XX },
252b5132
RH		 672 /* 80 */
673 { GRP1b },
674 { GRP1S },
050dfa73 675 { "(bad)", XX, XX, XX, XX },
252b5132 676 { GRP1Ss },
050dfa73
MM		 677 { "testB", Eb, Gb, XX, XX },
678 { "testS", Ev, Gv, XX, XX },
679 { "xchgB", Eb, Gb, XX, XX },
680 { "xchgS", Ev, Gv, XX, XX },
252b5132 681 /* 88 */
050dfa73
MM		 682 { "movB", Eb, Gb, XX, XX },
683 { "movS", Ev, Gv, XX, XX },
684 { "movB", Gb, Eb, XX, XX },
685 { "movS", Gv, Ev, XX, XX },
686 { "movQ", Sv, Sw, XX, XX },
687 { "leaS", Gv, M, XX, XX },
688 { "movQ", Sw, Sv, XX, XX },
689 { "popU", stackEv, XX, XX, XX },
252b5132 690 /* 90 */
050dfa73
MM		 691 { "xchgS", NOP_Fixup1, eAX_reg, NOP_Fixup2, eAX_reg, XX, XX },
692 { "xchgS", RMeCX, eAX, XX, XX },
693 { "xchgS", RMeDX, eAX, XX, XX },
694 { "xchgS", RMeBX, eAX, XX, XX },
695 { "xchgS", RMeSP, eAX, XX, XX },
696 { "xchgS", RMeBP, eAX, XX, XX },
697 { "xchgS", RMeSI, eAX, XX, XX },
698 { "xchgS", RMeDI, eAX, XX, XX },
252b5132 699 /* 98 */
050dfa73
MM		 700 { "cW{tR||tR|}", XX, XX, XX, XX },
701 { "cR{tO||tO|}", XX, XX, XX, XX },
702 { "Jcall{T|}", Ap, XX, XX, XX },
703 { "(bad)", XX, XX, XX, XX }, /* fwait */
704 { "pushfT", XX, XX, XX, XX },
705 { "popfT", XX, XX, XX, XX },
706 { "sahf{|}", XX, XX, XX, XX },
707 { "lahf{|}", XX, XX, XX, XX },
252b5132 708 /* a0 */
050dfa73
MM		 709 { "movB", AL, Ob, XX, XX },
710 { "movS", eAX, Ov, XX, XX },
711 { "movB", Ob, AL, XX, XX },
712 { "movS", Ov, eAX, XX, XX },
713 { "movs{b||b|}", Ybr, Xb, XX, XX },
714 { "movs{R||R|}", Yvr, Xv, XX, XX },
715 { "cmps{b||b|}", Xb, Yb, XX, XX },
716 { "cmps{R||R|}", Xv, Yv, XX, XX },
252b5132 717 /* a8 */
050dfa73
MM		 718 { "testB", AL, Ib, XX, XX },
719 { "testS", eAX, Iv, XX, XX },
720 { "stosB", Ybr, AL, XX, XX },
721 { "stosS", Yvr, eAX, XX, XX },
722 { "lodsB", ALr, Xb, XX, XX },
723 { "lodsS", eAXr, Xv, XX, XX },
724 { "scasB", AL, Yb, XX, XX },
725 { "scasS", eAX, Yv, XX, XX },
252b5132 726 /* b0 */
050dfa73
MM		 727 { "movB", RMAL, Ib, XX, XX },
728 { "movB", RMCL, Ib, XX, XX },
729 { "movB", RMDL, Ib, XX, XX },
730 { "movB", RMBL, Ib, XX, XX },
731 { "movB", RMAH, Ib, XX, XX },
732 { "movB", RMCH, Ib, XX, XX },
733 { "movB", RMDH, Ib, XX, XX },
734 { "movB", RMBH, Ib, XX, XX },
252b5132 735 /* b8 */
050dfa73
MM		 736 { "movS", RMeAX, Iv64, XX, XX },
737 { "movS", RMeCX, Iv64, XX, XX },
738 { "movS", RMeDX, Iv64, XX, XX },
739 { "movS", RMeBX, Iv64, XX, XX },
740 { "movS", RMeSP, Iv64, XX, XX },
741 { "movS", RMeBP, Iv64, XX, XX },
742 { "movS", RMeSI, Iv64, XX, XX },
743 { "movS", RMeDI, Iv64, XX, XX },
252b5132
RH		 744 /* c0 */
745 { GRP2b },
746 { GRP2S },
050dfa73
MM		 747 { "retT", Iw, XX, XX, XX },
748 { "retT", XX, XX, XX, XX },
749 { "les{S|}", Gv, Mp, XX, XX },
750 { "ldsS", Gv, Mp, XX, XX },
a6bd098c
L		 751 { GRP11_C6 },
752 { GRP11_C7 },
252b5132 753 /* c8 */
050dfa73
MM		 754 { "enterT", Iw, Ib, XX, XX },
755 { "leaveT", XX, XX, XX, XX },
756 { "lretP", Iw, XX, XX, XX },
757 { "lretP", XX, XX, XX, XX },
758 { "int3", XX, XX, XX, XX },
759 { "int", Ib, XX, XX, XX },
760 { "into{|}", XX, XX, XX, XX },
761 { "iretP", XX, XX, XX, XX },
252b5132
RH		 762 /* d0 */
763 { GRP2b_one },
764 { GRP2S_one },
765 { GRP2b_cl },
766 { GRP2S_cl },
050dfa73
MM		 767 { "aam{|}", sIb, XX, XX, XX },
768 { "aad{|}", sIb, XX, XX, XX },
769 { "(bad)", XX, XX, XX, XX },
770 { "xlat", DSBX, XX, XX, XX },
252b5132
RH		 771 /* d8 */
772 { FLOAT },
773 { FLOAT },
774 { FLOAT },
775 { FLOAT },
776 { FLOAT },
777 { FLOAT },
778 { FLOAT },
779 { FLOAT },
780 /* e0 */
050dfa73
MM		 781 { "loopneFH", Jb, XX, loop_jcxz_flag, XX },
782 { "loopeFH", Jb, XX, loop_jcxz_flag, XX },
783 { "loopFH", Jb, XX, loop_jcxz_flag, XX },
784 { "jEcxzH", Jb, XX, loop_jcxz_flag, XX },
785 { "inB", AL, Ib, XX, XX },
786 { "inS", eAX, Ib, XX, XX },
787 { "outB", Ib, AL, XX, XX },
788 { "outS", Ib, eAX, XX, XX },
252b5132 789 /* e8 */
050dfa73
MM		 790 { "callT", Jv, XX, XX, XX },
791 { "jmpT", Jv, XX, XX, XX },
792 { "Jjmp{T|}", Ap, XX, XX, XX },
793 { "jmp", Jb, XX, XX, XX },
794 { "inB", AL, indirDX, XX, XX },
795 { "inS", eAX, indirDX, XX, XX },
796 { "outB", indirDX, AL, XX, XX },
797 { "outS", indirDX, eAX, XX, XX },
252b5132 798 /* f0 */
050dfa73
MM		 799 { "(bad)", XX, XX, XX, XX }, /* lock prefix */
800 { "icebp", XX, XX, XX, XX },
801 { "(bad)", XX, XX, XX, XX }, /* repne */
802 { "(bad)", XX, XX, XX, XX }, /* repz */
803 { "hlt", XX, XX, XX, XX },
804 { "cmc", XX, XX, XX, XX },
252b5132
RH		 805 { GRP3b },
806 { GRP3S },
807 /* f8 */
050dfa73
MM		 808 { "clc", XX, XX, XX, XX },
809 { "stc", XX, XX, XX, XX },
810 { "cli", XX, XX, XX, XX },
811 { "sti", XX, XX, XX, XX },
812 { "cld", XX, XX, XX, XX },
813 { "std", XX, XX, XX, XX },
252b5132
RH		 814 { GRP4 },
815 { GRP5 },
816};
817
6439fc28 818static const struct dis386 dis386_twobyte[] = {
252b5132
RH		 819 /* 00 */
820 { GRP6 },
821 { GRP7 },
050dfa73
MM		 822 { "larS", Gv, Ew, XX, XX },
823 { "lslS", Gv, Ew, XX, XX },
824 { "(bad)", XX, XX, XX, XX },
825 { "syscall", XX, XX, XX, XX },
826 { "clts", XX, XX, XX, XX },
827 { "sysretP", XX, XX, XX, XX },
252b5132 828 /* 08 */
050dfa73
MM		 829 { "invd", XX, XX, XX, XX},
830 { "wbinvd", XX, XX, XX, XX },
831 { "(bad)", XX, XX, XX, XX },
832 { "ud2a", XX, XX, XX, XX },
833 { "(bad)", XX, XX, XX, XX },
c608c12e 834 { GRPAMD },
050dfa73
MM		 835 { "femms", XX, XX, XX, XX },
836 { "", MX, EM, OPSUF, XX }, /* See OP_3DNowSuffix. */
252b5132 837 /* 10 */
c608c12e
AM		 838 { PREGRP8 },
839 { PREGRP9 },
ca164297 840 { PREGRP30 },
050dfa73
MM		 841 { "movlpX", EX, XM, SIMD_Fixup, 'h', XX },
842 { "unpcklpX", XM, EX, XX, XX },
843 { "unpckhpX", XM, EX, XX, XX },
ca164297 844 { PREGRP31 },
050dfa73 845 { "movhpX", EX, XM, SIMD_Fixup, 'l', XX },
252b5132 846 /* 18 */
b3882df9 847 { GRP16 },
050dfa73
MM		 848 { "(bad)", XX, XX, XX, XX },
849 { "(bad)", XX, XX, XX, XX },
850 { "(bad)", XX, XX, XX, XX },
851 { "(bad)", XX, XX, XX, XX },
852 { "(bad)", XX, XX, XX, XX },
853 { "(bad)", XX, XX, XX, XX },
854 { "nopQ", Ev, XX, XX, XX },
252b5132 855 /* 20 */
050dfa73
MM		 856 { "movZ", Rm, Cm, XX, XX },
857 { "movZ", Rm, Dm, XX, XX },
858 { "movZ", Cm, Rm, XX, XX },
859 { "movZ", Dm, Rm, XX, XX },
860 { "movL", Rd, Td, XX, XX },
861 { "(bad)", XX, XX, XX, XX },
862 { "movL", Td, Rd, XX, XX },
863 { "(bad)", XX, XX, XX, XX },
252b5132 864 /* 28 */
050dfa73
MM		 865 { "movapX", XM, EX, XX, XX },
866 { "movapX", EX, XM, XX, XX },
c608c12e 867 { PREGRP2 },
050dfa73 868 { PREGRP33 },
2da11e11 869 { PREGRP4 },
c608c12e 870 { PREGRP3 },
050dfa73
MM		 871 { "ucomisX", XM,EX, XX, XX },
872 { "comisX", XM,EX, XX, XX },
252b5132 873 /* 30 */
050dfa73
MM		 874 { "wrmsr", XX, XX, XX, XX },
875 { "rdtsc", XX, XX, XX, XX },
876 { "rdmsr", XX, XX, XX, XX },
877 { "rdpmc", XX, XX, XX, XX },
878 { "sysenter", XX, XX, XX, XX },
879 { "sysexit", XX, XX, XX, XX },
880 { "(bad)", XX, XX, XX, XX },
881 { "(bad)", XX, XX, XX, XX },
252b5132 882 /* 38 */
331d2d0d 883 { THREE_BYTE_0 },
050dfa73 884 { "(bad)", XX, XX, XX, XX },
331d2d0d 885 { THREE_BYTE_1 },
050dfa73
MM		 886 { "(bad)", XX, XX, XX, XX },
887 { "(bad)", XX, XX, XX, XX },
888 { "(bad)", XX, XX, XX, XX },
889 { "(bad)", XX, XX, XX, XX },
890 { "(bad)", XX, XX, XX, XX },
252b5132 891 /* 40 */
050dfa73
MM		 892 { "cmovo", Gv, Ev, XX, XX },
893 { "cmovno", Gv, Ev, XX, XX },
894 { "cmovb", Gv, Ev, XX, XX },
895 { "cmovae", Gv, Ev, XX, XX },
896 { "cmove", Gv, Ev, XX, XX },
897 { "cmovne", Gv, Ev, XX, XX },
898 { "cmovbe", Gv, Ev, XX, XX },
899 { "cmova", Gv, Ev, XX, XX },
252b5132 900 /* 48 */
050dfa73
MM		 901 { "cmovs", Gv, Ev, XX, XX },
902 { "cmovns", Gv, Ev, XX, XX },
903 { "cmovp", Gv, Ev, XX, XX },
904 { "cmovnp", Gv, Ev, XX, XX },
905 { "cmovl", Gv, Ev, XX, XX },
906 { "cmovge", Gv, Ev, XX, XX },
907 { "cmovle", Gv, Ev, XX, XX },
908 { "cmovg", Gv, Ev, XX, XX },
252b5132 909 /* 50 */
050dfa73 910 { "movmskpX", Gdq, XS, XX, XX },
c608c12e
AM		 911 { PREGRP13 },
912 { PREGRP12 },
913 { PREGRP11 },
050dfa73
MM		 914 { "andpX", XM, EX, XX, XX },
915 { "andnpX", XM, EX, XX, XX },
916 { "orpX", XM, EX, XX, XX },
917 { "xorpX", XM, EX, XX, XX },
252b5132 918 /* 58 */
c608c12e
AM		 919 { PREGRP0 },
920 { PREGRP10 },
041bd2e0
JH		 921 { PREGRP17 },
922 { PREGRP16 },
c608c12e
AM		 923 { PREGRP14 },
924 { PREGRP7 },
925 { PREGRP5 },
2da11e11 926 { PREGRP6 },
252b5132 927 /* 60 */
050dfa73
MM		 928 { "punpcklbw", MX, EM, XX, XX },
929 { "punpcklwd", MX, EM, XX, XX },
930 { "punpckldq", MX, EM, XX, XX },
931 { "packsswb", MX, EM, XX, XX },
932 { "pcmpgtb", MX, EM, XX, XX },
933 { "pcmpgtw", MX, EM, XX, XX },
934 { "pcmpgtd", MX, EM, XX, XX },
935 { "packuswb", MX, EM, XX, XX },
252b5132 936 /* 68 */
050dfa73
MM		 937 { "punpckhbw", MX, EM, XX, XX },
938 { "punpckhwd", MX, EM, XX, XX },
939 { "punpckhdq", MX, EM, XX, XX },
940 { "packssdw", MX, EM, XX, XX },
0f17484f 941 { PREGRP26 },
041bd2e0 942 { PREGRP24 },
050dfa73 943 { "movd", MX, Edq, XX, XX },
041bd2e0 944 { PREGRP19 },
252b5132 945 /* 70 */
041bd2e0 946 { PREGRP22 },
252b5132 947 { GRP12 },
b3882df9
L		 948 { GRP13 },
949 { GRP14 },
050dfa73
MM		 950 { "pcmpeqb", MX, EM, XX, XX },
951 { "pcmpeqw", MX, EM, XX, XX },
952 { "pcmpeqd", MX, EM, XX, XX },
953 { "emms", XX, XX, XX, XX },
252b5132 954 /* 78 */
050dfa73
MM		 955 { PREGRP34 },
956 { PREGRP35 },
957 { "(bad)", XX, XX, XX, XX },
958 { "(bad)", XX, XX, XX, XX },
ca164297
L		 959 { PREGRP28 },
960 { PREGRP29 },
041bd2e0
JH		 961 { PREGRP23 },
962 { PREGRP20 },
252b5132 963 /* 80 */
050dfa73
MM		 964 { "joH", Jv, XX, cond_jump_flag, XX },
965 { "jnoH", Jv, XX, cond_jump_flag, XX },
966 { "jbH", Jv, XX, cond_jump_flag, XX },
967 { "jaeH", Jv, XX, cond_jump_flag, XX },
968 { "jeH", Jv, XX, cond_jump_flag, XX },
969 { "jneH", Jv, XX, cond_jump_flag, XX },
970 { "jbeH", Jv, XX, cond_jump_flag, XX },
971 { "jaH", Jv, XX, cond_jump_flag, XX },
252b5132 972 /* 88 */
050dfa73
MM		 973 { "jsH", Jv, XX, cond_jump_flag, XX },
974 { "jnsH", Jv, XX, cond_jump_flag, XX },
975 { "jpH", Jv, XX, cond_jump_flag, XX },
976 { "jnpH", Jv, XX, cond_jump_flag, XX },
977 { "jlH", Jv, XX, cond_jump_flag, XX },
978 { "jgeH", Jv, XX, cond_jump_flag, XX },
979 { "jleH", Jv, XX, cond_jump_flag, XX },
980 { "jgH", Jv, XX, cond_jump_flag, XX },
252b5132 981 /* 90 */
050dfa73
MM		 982 { "seto", Eb, XX, XX, XX },
983 { "setno", Eb, XX, XX, XX },
984 { "setb", Eb, XX, XX, XX },
985 { "setae", Eb, XX, XX, XX },
986 { "sete", Eb, XX, XX, XX },
987 { "setne", Eb, XX, XX, XX },
988 { "setbe", Eb, XX, XX, XX },
989 { "seta", Eb, XX, XX, XX },
252b5132 990 /* 98 */
050dfa73
MM		 991 { "sets", Eb, XX, XX, XX },
992 { "setns", Eb, XX, XX, XX },
993 { "setp", Eb, XX, XX, XX },
994 { "setnp", Eb, XX, XX, XX },
995 { "setl", Eb, XX, XX, XX },
996 { "setge", Eb, XX, XX, XX },
997 { "setle", Eb, XX, XX, XX },
998 { "setg", Eb, XX, XX, XX },
252b5132 999 /* a0 */
050dfa73
MM		 1000 { "pushT", fs, XX, XX, XX },
1001 { "popT", fs, XX, XX, XX },
1002 { "cpuid", XX, XX, XX, XX },
1003 { "btS", Ev, Gv, XX, XX },
1004 { "shldS", Ev, Gv, Ib, XX },
1005 { "shldS", Ev, Gv, CL, XX },
30d1c836
ML		 1006 { GRPPADLCK2 },
1007 { GRPPADLCK1 },
252b5132 1008 /* a8 */
050dfa73
MM		 1009 { "pushT", gs, XX, XX, XX },
1010 { "popT", gs, XX, XX, XX },
1011 { "rsm", XX, XX, XX, XX },
1012 { "btsS", Ev, Gv, XX, XX },
1013 { "shrdS", Ev, Gv, Ib, XX },
1014 { "shrdS", Ev, Gv, CL, XX },
b3882df9 1015 { GRP15 },
050dfa73 1016 { "imulS", Gv, Ev, XX, XX },
252b5132 1017 /* b0 */
050dfa73
MM		 1018 { "cmpxchgB", Eb, Gb, XX, XX },
1019 { "cmpxchgS", Ev, Gv, XX, XX },
1020 { "lssS", Gv, Mp, XX, XX },
1021 { "btrS", Ev, Gv, XX, XX },
1022 { "lfsS", Gv, Mp, XX, XX },
1023 { "lgsS", Gv, Mp, XX, XX },
1024 { "movz{bR|x|bR|x}", Gv, Eb, XX, XX },
1025 { "movz{wR|x|wR|x}", Gv, Ew, XX, XX }, /* yes, there really is movzww ! */
252b5132 1026 /* b8 */
050dfa73
MM		 1027 { "popcntS", Gv, Ev, XX, XX },
1028 { "ud2b", XX, XX, XX, XX },
252b5132 1029 { GRP8 },
050dfa73
MM		 1030 { "btcS", Ev, Gv, XX, XX },
1031 { "bsfS", Gv, Ev, XX, XX },
1032 { PREGRP36 },
1033 { "movs{bR|x|bR|x}", Gv, Eb, XX, XX },
1034 { "movs{wR|x|wR|x}", Gv, Ew, XX, XX }, /* yes, there really is movsww ! */
252b5132 1035 /* c0 */
050dfa73
MM		 1036 { "xaddB", Eb, Gb, XX, XX },
1037 { "xaddS", Ev, Gv, XX, XX },
c608c12e 1038 { PREGRP1 },
050dfa73
MM		 1039 { "movntiS", Ev, Gv, XX, XX },
1040 { "pinsrw", MX, Edqw, Ib, XX },
1041 { "pextrw", Gdq, MS, Ib, XX },
1042 { "shufpX", XM, EX, Ib, XX },
252b5132
RH		 1043 { GRP9 },
1044 /* c8 */
050dfa73
MM		 1045 { "bswap", RMeAX, XX, XX, XX },
1046 { "bswap", RMeCX, XX, XX, XX },
1047 { "bswap", RMeDX, XX, XX, XX },
1048 { "bswap", RMeBX, XX, XX, XX },
1049 { "bswap", RMeSP, XX, XX, XX },
1050 { "bswap", RMeBP, XX, XX, XX },
1051 { "bswap", RMeSI, XX, XX, XX },
1052 { "bswap", RMeDI, XX, XX, XX },
252b5132 1053 /* d0 */
ca164297 1054 { PREGRP27 },
050dfa73
MM		 1055 { "psrlw", MX, EM, XX, XX },
1056 { "psrld", MX, EM, XX, XX },
1057 { "psrlq", MX, EM, XX, XX },
1058 { "paddq", MX, EM, XX, XX },
1059 { "pmullw", MX, EM, XX, XX },
041bd2e0 1060 { PREGRP21 },
050dfa73 1061 { "pmovmskb", Gdq, MS, XX, XX },
252b5132 1062 /* d8 */
050dfa73
MM		 1063 { "psubusb", MX, EM, XX, XX },
1064 { "psubusw", MX, EM, XX, XX },
1065 { "pminub", MX, EM, XX, XX },
1066 { "pand", MX, EM, XX, XX },
1067 { "paddusb", MX, EM, XX, XX },
1068 { "paddusw", MX, EM, XX, XX },
1069 { "pmaxub", MX, EM, XX, XX },
1070 { "pandn", MX, EM, XX, XX },
252b5132 1071 /* e0 */
050dfa73
MM		 1072 { "pavgb", MX, EM, XX, XX },
1073 { "psraw", MX, EM, XX, XX },
1074 { "psrad", MX, EM, XX, XX },
1075 { "pavgw", MX, EM, XX, XX },
1076 { "pmulhuw", MX, EM, XX, XX },
1077 { "pmulhw", MX, EM, XX, XX },
041bd2e0 1078 { PREGRP15 },
0f17484f 1079 { PREGRP25 },
252b5132 1080 /* e8 */
050dfa73
MM		 1081 { "psubsb", MX, EM, XX, XX },
1082 { "psubsw", MX, EM, XX, XX },
1083 { "pminsw", MX, EM, XX, XX },
1084 { "por", MX, EM, XX, XX },
1085 { "paddsb", MX, EM, XX, XX },
1086 { "paddsw", MX, EM, XX, XX },
1087 { "pmaxsw", MX, EM, XX, XX },
1088 { "pxor", MX, EM, XX, XX },
252b5132 1089 /* f0 */
ca164297 1090 { PREGRP32 },
050dfa73
MM		 1091 { "psllw", MX, EM, XX, XX },
1092 { "pslld", MX, EM, XX, XX },
1093 { "psllq", MX, EM, XX, XX },
1094 { "pmuludq", MX, EM, XX, XX },
1095 { "pmaddwd", MX, EM, XX, XX },
1096 { "psadbw", MX, EM, XX, XX },
041bd2e0 1097 { PREGRP18 },
252b5132 1098 /* f8 */
050dfa73
MM		 1099 { "psubb", MX, EM, XX, XX },
1100 { "psubw", MX, EM, XX, XX },
1101 { "psubd", MX, EM, XX, XX },
1102 { "psubq", MX, EM, XX, XX },
1103 { "paddb", MX, EM, XX, XX },
1104 { "paddw", MX, EM, XX, XX },
1105 { "paddd", MX, EM, XX, XX },
1106 { "(bad)", XX, XX, XX, XX }
252b5132
RH		 1107};
1108
1109static const unsigned char onebyte_has_modrm[256] = {
c608c12e
AM		 1110 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1111 /* ------------------------------- */
1112 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1113 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1114 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1115 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1116 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1117 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1118 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1119 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1120 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1121 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1122 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1123 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1124 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1125 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1126 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1127 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1128 /* ------------------------------- */
1129 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1130};
1131
1132static const unsigned char twobyte_has_modrm[256] = {
c608c12e
AM		 1133 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1134 /* ------------------------------- */
252b5132 1135 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
15965411 1136 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
4bba6815 1137 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
331d2d0d 1138 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
252b5132 1139 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
4bba6815
AM		 1140 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1141 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
90700ea2 1142 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
252b5132
RH		 1143 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1144 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
30d1c836 1145 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
050dfa73 1146 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
252b5132 1147 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
ca164297 1148 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
4bba6815 1149 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
ca164297 1150 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
c608c12e
AM		 1151 /* ------------------------------- */
1152 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1153};
1154
041bd2e0 1155static const unsigned char twobyte_uses_SSE_prefix[256] = {
c608c12e
AM		 1156 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1157 /* ------------------------------- */
1158 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
ca164297 1159 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
050dfa73 1160 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
331d2d0d 1161 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
c608c12e 1162 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
041bd2e0
JH		 1163 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1164 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
050dfa73 1165 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
c608c12e
AM		 1166 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1167 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1168 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1169 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1170 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
ca164297 1171 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
041bd2e0 1172 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
ca164297 1173 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
c608c12e
AM		 1174 /* ------------------------------- */
1175 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1176};
1177
1178static char obuf[100];
1179static char *obufp;
1180static char scratchbuf[100];
1181static unsigned char *start_codep;
1182static unsigned char *insn_codep;
1183static unsigned char *codep;
1184static disassemble_info *the_info;
1185static int mod;
1186static int rm;
1187static int reg;
4bba6815 1188static unsigned char need_modrm;
252b5132 1189
4bba6815
AM		 1190/* If we are accessing mod/rm/reg without need_modrm set, then the
1191 values are stale. Hitting this abort likely indicates that you
1192 need to update onebyte_has_modrm or twobyte_has_modrm. */
1193#define MODRM_CHECK if (!need_modrm) abort ()
1194
d708bcba
AM		 1195static const char **names64;
1196static const char **names32;
1197static const char **names16;
1198static const char **names8;
1199static const char **names8rex;
1200static const char **names_seg;
1201static const char **index16;
1202
1203static const char *intel_names64[] = {
1204 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1205 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1206};
1207static const char *intel_names32[] = {
1208 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1209 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1210};
1211static const char *intel_names16[] = {
1212 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1213 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1214};
1215static const char *intel_names8[] = {
1216 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1217};
1218static const char *intel_names8rex[] = {
1219 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1220 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1221};
1222static const char *intel_names_seg[] = {
1223 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1224};
1225static const char *intel_index16[] = {
1226 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1227};
1228
1229static const char *att_names64[] = {
1230 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
52b15da3
JH		 1231 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1232};
d708bcba
AM		 1233static const char *att_names32[] = {
1234 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
52b15da3 1235 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
252b5132 1236};
d708bcba
AM		 1237static const char *att_names16[] = {
1238 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
52b15da3 1239 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
252b5132 1240};
d708bcba
AM		 1241static const char *att_names8[] = {
1242 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
252b5132 1243};
d708bcba
AM		 1244static const char *att_names8rex[] = {
1245 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
52b15da3
JH		 1246 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1247};
d708bcba
AM		 1248static const char *att_names_seg[] = {
1249 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
252b5132 1250};
d708bcba
AM		 1251static const char *att_index16[] = {
1252 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
252b5132
RH		 1253};
1254
2da11e11 1255static const struct dis386 grps[][8] = {
252b5132
RH		 1256 /* GRP1b */
1257 {
050dfa73
MM		 1258 { "addA", Eb, Ib, XX, XX },
1259 { "orA", Eb, Ib, XX, XX },
1260 { "adcA", Eb, Ib, XX, XX },
1261 { "sbbA", Eb, Ib, XX, XX },
1262 { "andA", Eb, Ib, XX, XX },
1263 { "subA", Eb, Ib, XX, XX },
1264 { "xorA", Eb, Ib, XX, XX },
1265 { "cmpA", Eb, Ib, XX, XX }
252b5132
RH		 1266 },
1267 /* GRP1S */
1268 {
050dfa73
MM		 1269 { "addQ", Ev, Iv, XX, XX },
1270 { "orQ", Ev, Iv, XX, XX },
1271 { "adcQ", Ev, Iv, XX, XX },
1272 { "sbbQ", Ev, Iv, XX, XX },
1273 { "andQ", Ev, Iv, XX, XX },
1274 { "subQ", Ev, Iv, XX, XX },
1275 { "xorQ", Ev, Iv, XX, XX },
1276 { "cmpQ", Ev, Iv, XX, XX }
252b5132
RH		 1277 },
1278 /* GRP1Ss */
1279 {
050dfa73
MM		 1280 { "addQ", Ev, sIb, XX, XX },
1281 { "orQ", Ev, sIb, XX, XX },
1282 { "adcQ", Ev, sIb, XX, XX },
1283 { "sbbQ", Ev, sIb, XX, XX },
1284 { "andQ", Ev, sIb, XX, XX },
1285 { "subQ", Ev, sIb, XX, XX },
1286 { "xorQ", Ev, sIb, XX, XX },
1287 { "cmpQ", Ev, sIb, XX, XX }
252b5132
RH		 1288 },
1289 /* GRP2b */
1290 {
050dfa73
MM		 1291 { "rolA", Eb, Ib, XX, XX },
1292 { "rorA", Eb, Ib, XX, XX },
1293 { "rclA", Eb, Ib, XX, XX },
1294 { "rcrA", Eb, Ib, XX, XX },
1295 { "shlA", Eb, Ib, XX, XX },
1296 { "shrA", Eb, Ib, XX, XX },
1297 { "(bad)", XX, XX, XX, XX },
1298 { "sarA", Eb, Ib, XX, XX },
252b5132
RH		 1299 },
1300 /* GRP2S */
1301 {
050dfa73
MM		 1302 { "rolQ", Ev, Ib, XX, XX },
1303 { "rorQ", Ev, Ib, XX, XX },
1304 { "rclQ", Ev, Ib, XX, XX },
1305 { "rcrQ", Ev, Ib, XX, XX },
1306 { "shlQ", Ev, Ib, XX, XX },
1307 { "shrQ", Ev, Ib, XX, XX },
1308 { "(bad)", XX, XX, XX, XX },
1309 { "sarQ", Ev, Ib, XX, XX },
252b5132
RH		 1310 },
1311 /* GRP2b_one */
1312 {
050dfa73
MM		 1313 { "rolA", Eb, I1, XX, XX },
1314 { "rorA", Eb, I1, XX, XX },
1315 { "rclA", Eb, I1, XX, XX },
1316 { "rcrA", Eb, I1, XX, XX },
1317 { "shlA", Eb, I1, XX, XX },
1318 { "shrA", Eb, I1, XX, XX },
1319 { "(bad)", XX, XX, XX, XX },
1320 { "sarA", Eb, I1, XX, XX },
252b5132
RH		 1321 },
1322 /* GRP2S_one */
1323 {
050dfa73
MM		 1324 { "rolQ", Ev, I1, XX, XX },
1325 { "rorQ", Ev, I1, XX, XX },
1326 { "rclQ", Ev, I1, XX, XX },
1327 { "rcrQ", Ev, I1, XX, XX },
1328 { "shlQ", Ev, I1, XX, XX },
1329 { "shrQ", Ev, I1, XX, XX },
1330 { "(bad)", XX, XX, XX, XX },
1331 { "sarQ", Ev, I1, XX, XX },
252b5132
RH		 1332 },
1333 /* GRP2b_cl */
1334 {
050dfa73
MM		 1335 { "rolA", Eb, CL, XX, XX },
1336 { "rorA", Eb, CL, XX, XX },
1337 { "rclA", Eb, CL, XX, XX },
1338 { "rcrA", Eb, CL, XX, XX },
1339 { "shlA", Eb, CL, XX, XX },
1340 { "shrA", Eb, CL, XX, XX },
1341 { "(bad)", XX, XX, XX, XX },
1342 { "sarA", Eb, CL, XX, XX },
252b5132
RH		 1343 },
1344 /* GRP2S_cl */
1345 {
050dfa73
MM		 1346 { "rolQ", Ev, CL, XX, XX },
1347 { "rorQ", Ev, CL, XX, XX },
1348 { "rclQ", Ev, CL, XX, XX },
1349 { "rcrQ", Ev, CL, XX, XX },
1350 { "shlQ", Ev, CL, XX, XX },
1351 { "shrQ", Ev, CL, XX, XX },
1352 { "(bad)", XX, XX, XX, XX },
1353 { "sarQ", Ev, CL, XX, XX }
252b5132
RH		 1354 },
1355 /* GRP3b */
1356 {
050dfa73
MM		 1357 { "testA", Eb, Ib, XX, XX },
1358 { "(bad)", Eb, XX, XX, XX },
1359 { "notA", Eb, XX, XX, XX },
1360 { "negA", Eb, XX, XX, XX },
1361 { "mulA", Eb, XX, XX, XX }, /* Don't print the implicit %al register, */
1362 { "imulA", Eb, XX, XX, XX }, /* to distinguish these opcodes from other */
1363 { "divA", Eb, XX, XX, XX }, /* mul/imul opcodes. Do the same for div */
1364 { "idivA", Eb, XX, XX, XX } /* and idiv for consistency. */
252b5132
RH		 1365 },
1366 /* GRP3S */
1367 {
050dfa73
MM		 1368 { "testQ", Ev, Iv, XX, XX },
1369 { "(bad)", XX, XX, XX, XX },
1370 { "notQ", Ev, XX, XX, XX },
1371 { "negQ", Ev, XX, XX, XX },
1372 { "mulQ", Ev, XX, XX, XX }, /* Don't print the implicit register. */
1373 { "imulQ", Ev, XX, XX, XX },
1374 { "divQ", Ev, XX, XX, XX },
1375 { "idivQ", Ev, XX, XX, XX },
252b5132
RH		 1376 },
1377 /* GRP4 */
1378 {
050dfa73
MM		 1379 { "incA", Eb, XX, XX, XX },
1380 { "decA", Eb, XX, XX, XX },
1381 { "(bad)", XX, XX, XX, XX },
1382 { "(bad)", XX, XX, XX, XX },
1383 { "(bad)", XX, XX, XX, XX },
1384 { "(bad)", XX, XX, XX, XX },
1385 { "(bad)", XX, XX, XX, XX },
1386 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 1387 },
1388 /* GRP5 */
1389 {
050dfa73
MM		 1390 { "incQ", Ev, XX, XX, XX },
1391 { "decQ", Ev, XX, XX, XX },
1392 { "callT", indirEv, XX, XX, XX },
1393 { "JcallT", indirEp, XX, XX, XX },
1394 { "jmpT", indirEv, XX, XX, XX },
1395 { "JjmpT", indirEp, XX, XX, XX },
1396 { "pushU", stackEv, XX, XX, XX },
1397 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 1398 },
1399 /* GRP6 */
1400 {
2b516b72
L		 1401 { "sldt", Ev, XX, XX, XX },
1402 { "str", Ev, XX, XX, XX },
050dfa73
MM		 1403 { "lldt", Ew, XX, XX, XX },
1404 { "ltr", Ew, XX, XX, XX },
1405 { "verr", Ew, XX, XX, XX },
1406 { "verw", Ew, XX, XX, XX },
1407 { "(bad)", XX, XX, XX, XX },
1408 { "(bad)", XX, XX, XX, XX }
252b5132
RH		 1409 },
1410 /* GRP7 */
1411 {
050dfa73
MM		 1412 { "sgdt{Q|IQ||}", VMX_Fixup, 0, XX, XX, XX },
1413 { "sidt{Q|IQ||}", PNI_Fixup, 0, XX, XX, XX },
1414 { "lgdt{Q|Q||}", M, XX, XX, XX },
1415 { "lidt{Q|Q||}", SVME_Fixup, 0, XX, XX, XX },
2b516b72 1416 { "smsw", Ev, XX, XX, XX },
050dfa73
MM		 1417 { "(bad)", XX, XX, XX, XX },
1418 { "lmsw", Ew, XX, XX, XX },
1419 { "invlpg", INVLPG_Fixup, w_mode, XX, XX, XX },
252b5132
RH		 1420 },
1421 /* GRP8 */
1422 {
050dfa73
MM		 1423 { "(bad)", XX, XX, XX, XX },
1424 { "(bad)", XX, XX, XX, XX },
1425 { "(bad)", XX, XX, XX, XX },
1426 { "(bad)", XX, XX, XX, XX },
1427 { "btQ", Ev, Ib, XX, XX },
1428 { "btsQ", Ev, Ib, XX, XX },
1429 { "btrQ", Ev, Ib, XX, XX },
1430 { "btcQ", Ev, Ib, XX, XX },
252b5132
RH		 1431 },
1432 /* GRP9 */
1433 {
050dfa73
MM		 1434 { "(bad)", XX, XX, XX, XX },
1435 { "cmpxchg8b", Eq, XX, XX, XX },
1436 { "(bad)", XX, XX, XX, XX },
1437 { "(bad)", XX, XX, XX, XX },
1438 { "(bad)", XX, XX, XX, XX },
1439 { "(bad)", XX, XX, XX, XX },
1440 { "", VM, XX, XX, XX }, /* See OP_VMX. */
1441 { "vmptrst", Eq, XX, XX, XX },
252b5132 1442 },
a6bd098c
L		 1443 /* GRP11_C6 */
1444 {
1445 { "movA", Eb, Ib, XX, XX },
1446 { "(bad)", XX, XX, XX, XX },
1447 { "(bad)", XX, XX, XX, XX },
1448 { "(bad)", XX, XX, XX, XX },
1449 { "(bad)", XX, XX, XX, XX },
1450 { "(bad)", XX, XX, XX, XX },
1451 { "(bad)", XX, XX, XX, XX },
1452 { "(bad)", XX, XX, XX, XX },
1453 },
1454 /* GRP11_C7 */
1455 {
1456 { "movQ", Ev, Iv, XX, XX },
1457 { "(bad)", XX, XX, XX, XX },
1458 { "(bad)", XX, XX, XX, XX },
1459 { "(bad)", XX, XX, XX, XX },
1460 { "(bad)", XX, XX, XX, XX },
1461 { "(bad)", XX, XX, XX, XX },
1462 { "(bad)", XX, XX, XX, XX },
1463 { "(bad)", XX, XX, XX, XX },
1464 },
b3882df9 1465 /* GRP12 */
252b5132 1466 {
050dfa73
MM		 1467 { "(bad)", XX, XX, XX, XX },
1468 { "(bad)", XX, XX, XX, XX },
1469 { "psrlw", MS, Ib, XX, XX },
1470 { "(bad)", XX, XX, XX, XX },
1471 { "psraw", MS, Ib, XX, XX },
1472 { "(bad)", XX, XX, XX, XX },
1473 { "psllw", MS, Ib, XX, XX },
1474 { "(bad)", XX, XX, XX, XX },
252b5132 1475 },
b3882df9 1476 /* GRP13 */
252b5132 1477 {
050dfa73
MM		 1478 { "(bad)", XX, XX, XX, XX },
1479 { "(bad)", XX, XX, XX, XX },
1480 { "psrld", MS, Ib, XX, XX },
1481 { "(bad)", XX, XX, XX, XX },
1482 { "psrad", MS, Ib, XX, XX },
1483 { "(bad)", XX, XX, XX, XX },
1484 { "pslld", MS, Ib, XX, XX },
1485 { "(bad)", XX, XX, XX, XX },
252b5132 1486 },
b3882df9 1487 /* GRP14 */
252b5132 1488 {
050dfa73
MM		 1489 { "(bad)", XX, XX, XX, XX },
1490 { "(bad)", XX, XX, XX, XX },
1491 { "psrlq", MS, Ib, XX, XX },
1492 { "psrldq", MS, Ib, XX, XX },
1493 { "(bad)", XX, XX, XX, XX },
1494 { "(bad)", XX, XX, XX, XX },
1495 { "psllq", MS, Ib, XX, XX },
1496 { "pslldq", MS, Ib, XX, XX },
252b5132 1497 },
b3882df9 1498 /* GRP15 */
252b5132 1499 {
050dfa73
MM		 1500 { "fxsave", Ev, XX, XX, XX },
1501 { "fxrstor", Ev, XX, XX, XX },
1502 { "ldmxcsr", Ev, XX, XX, XX },
1503 { "stmxcsr", Ev, XX, XX, XX },
1504 { "(bad)", XX, XX, XX, XX },
1505 { "lfence", OP_0fae, 0, XX, XX, XX },
1506 { "mfence", OP_0fae, 0, XX, XX, XX },
1507 { "clflush", OP_0fae, 0, XX, XX, XX },
c608c12e 1508 },
b3882df9 1509 /* GRP16 */
c608c12e 1510 {
050dfa73
MM		 1511 { "prefetchnta", Ev, XX, XX, XX },
1512 { "prefetcht0", Ev, XX, XX, XX },
1513 { "prefetcht1", Ev, XX, XX, XX },
1514 { "prefetcht2", Ev, XX, XX, XX },
1515 { "(bad)", XX, XX, XX, XX },
1516 { "(bad)", XX, XX, XX, XX },
1517 { "(bad)", XX, XX, XX, XX },
1518 { "(bad)", XX, XX, XX, XX },
252b5132 1519 },
c608c12e 1520 /* GRPAMD */
252b5132 1521 {
050dfa73
MM		 1522 { "prefetch", Eb, XX, XX, XX },
1523 { "prefetchw", Eb, XX, XX, XX },
1524 { "(bad)", XX, XX, XX, XX },
1525 { "(bad)", XX, XX, XX, XX },
1526 { "(bad)", XX, XX, XX, XX },
1527 { "(bad)", XX, XX, XX, XX },
1528 { "(bad)", XX, XX, XX, XX },
1529 { "(bad)", XX, XX, XX, XX },
0f10071e 1530 },
30d1c836 1531 /* GRPPADLCK1 */
cc0ec051 1532 {
050dfa73
MM		 1533 { "xstore-rng", OP_0f07, 0, XX, XX, XX },
1534 { "xcrypt-ecb", OP_0f07, 0, XX, XX, XX },
1535 { "xcrypt-cbc", OP_0f07, 0, XX, XX, XX },
1536 { "xcrypt-ctr", OP_0f07, 0, XX, XX, XX },
1537 { "xcrypt-cfb", OP_0f07, 0, XX, XX, XX },
1538 { "xcrypt-ofb", OP_0f07, 0, XX, XX, XX },
1539 { "(bad)", OP_0f07, 0, XX, XX, XX },
1540 { "(bad)", OP_0f07, 0, XX, XX, XX },
30d1c836
ML		 1541 },
1542 /* GRPPADLCK2 */
1543 {
050dfa73
MM		 1544 { "montmul", OP_0f07, 0, XX, XX, XX },
1545 { "xsha1", OP_0f07, 0, XX, XX, XX },
1546 { "xsha256", OP_0f07, 0, XX, XX, XX },
1547 { "(bad)", OP_0f07, 0, XX, XX, XX },
1548 { "(bad)", OP_0f07, 0, XX, XX, XX },
1549 { "(bad)", OP_0f07, 0, XX, XX, XX },
1550 { "(bad)", OP_0f07, 0, XX, XX, XX },
1551 { "(bad)", OP_0f07, 0, XX, XX, XX },
252b5132 1552 }
252b5132
RH		 1553};
1554
041bd2e0 1555static const struct dis386 prefix_user_table[][4] = {
c608c12e
AM		 1556 /* PREGRP0 */
1557 {
050dfa73
MM		 1558 { "addps", XM, EX, XX, XX },
1559 { "addss", XM, EX, XX, XX },
1560 { "addpd", XM, EX, XX, XX },
1561 { "addsd", XM, EX, XX, XX },
c608c12e
AM		 1562 },
1563 /* PREGRP1 */
1564 {
050dfa73
MM		 1565 { "", XM, EX, OPSIMD, XX }, /* See OP_SIMD_SUFFIX. */
1566 { "", XM, EX, OPSIMD, XX },
1567 { "", XM, EX, OPSIMD, XX },
1568 { "", XM, EX, OPSIMD, XX },
c608c12e
AM		 1569 },
1570 /* PREGRP2 */
1571 {
050dfa73
MM		 1572 { "cvtpi2ps", XM, EM, XX, XX },
1573 { "cvtsi2ssY", XM, Ev, XX, XX },
1574 { "cvtpi2pd", XM, EM, XX, XX },
1575 { "cvtsi2sdY", XM, Ev, XX, XX },
c608c12e
AM		 1576 },
1577 /* PREGRP3 */
1578 {
050dfa73
MM		 1579 { "cvtps2pi", MX, EX, XX, XX },
1580 { "cvtss2siY", Gv, EX, XX, XX },
1581 { "cvtpd2pi", MX, EX, XX, XX },
1582 { "cvtsd2siY", Gv, EX, XX, XX },
c608c12e
AM		 1583 },
1584 /* PREGRP4 */
1585 {
050dfa73
MM		 1586 { "cvttps2pi", MX, EX, XX, XX },
1587 { "cvttss2siY", Gv, EX, XX, XX },
1588 { "cvttpd2pi", MX, EX, XX, XX },
1589 { "cvttsd2siY", Gv, EX, XX, XX },
c608c12e
AM		 1590 },
1591 /* PREGRP5 */
1592 {
050dfa73
MM		 1593 { "divps", XM, EX, XX, XX },
1594 { "divss", XM, EX, XX, XX },
1595 { "divpd", XM, EX, XX, XX },
1596 { "divsd", XM, EX, XX, XX },
c608c12e
AM		 1597 },
1598 /* PREGRP6 */
1599 {
050dfa73
MM		 1600 { "maxps", XM, EX, XX, XX },
1601 { "maxss", XM, EX, XX, XX },
1602 { "maxpd", XM, EX, XX, XX },
1603 { "maxsd", XM, EX, XX, XX },
c608c12e
AM		 1604 },
1605 /* PREGRP7 */
1606 {
050dfa73
MM		 1607 { "minps", XM, EX, XX, XX },
1608 { "minss", XM, EX, XX, XX },
1609 { "minpd", XM, EX, XX, XX },
1610 { "minsd", XM, EX, XX, XX },
c608c12e
AM		 1611 },
1612 /* PREGRP8 */
1613 {
050dfa73
MM		 1614 { "movups", XM, EX, XX, XX },
1615 { "movss", XM, EX, XX, XX },
1616 { "movupd", XM, EX, XX, XX },
1617 { "movsd", XM, EX, XX, XX },
c608c12e
AM		 1618 },
1619 /* PREGRP9 */
1620 {
050dfa73
MM		 1621 { "movups", EX, XM, XX, XX },
1622 { "movss", EX, XM, XX, XX },
1623 { "movupd", EX, XM, XX, XX },
1624 { "movsd", EX, XM, XX, XX },
c608c12e
AM		 1625 },
1626 /* PREGRP10 */
1627 {
050dfa73
MM		 1628 { "mulps", XM, EX, XX, XX },
1629 { "mulss", XM, EX, XX, XX },
1630 { "mulpd", XM, EX, XX, XX },
1631 { "mulsd", XM, EX, XX, XX },
c608c12e
AM		 1632 },
1633 /* PREGRP11 */
1634 {
050dfa73
MM		 1635 { "rcpps", XM, EX, XX, XX },
1636 { "rcpss", XM, EX, XX, XX },
1637 { "(bad)", XM, EX, XX, XX },
1638 { "(bad)", XM, EX, XX, XX },
c608c12e
AM		 1639 },
1640 /* PREGRP12 */
1641 {
050dfa73
MM		 1642 { "rsqrtps", XM, EX, XX, XX },
1643 { "rsqrtss", XM, EX, XX, XX },
1644 { "(bad)", XM, EX, XX, XX },
1645 { "(bad)", XM, EX, XX, XX },
c608c12e
AM		 1646 },
1647 /* PREGRP13 */
1648 {
050dfa73
MM		 1649 { "sqrtps", XM, EX, XX, XX },
1650 { "sqrtss", XM, EX, XX, XX },
1651 { "sqrtpd", XM, EX, XX, XX },
1652 { "sqrtsd", XM, EX, XX, XX },
c608c12e
AM		 1653 },
1654 /* PREGRP14 */
1655 {
050dfa73
MM		 1656 { "subps", XM, EX, XX, XX },
1657 { "subss", XM, EX, XX, XX },
1658 { "subpd", XM, EX, XX, XX },
1659 { "subsd", XM, EX, XX, XX },
041bd2e0
JH		 1660 },
1661 /* PREGRP15 */
1662 {
050dfa73
MM		 1663 { "(bad)", XM, EX, XX, XX},
1664 { "cvtdq2pd", XM, EX, XX, XX },
1665 { "cvttpd2dq", XM, EX, XX, XX },
1666 { "cvtpd2dq", XM, EX, XX, XX },
041bd2e0
JH		 1667 },
1668 /* PREGRP16 */
1669 {
050dfa73
MM		 1670 { "cvtdq2ps", XM, EX, XX, XX },
1671 { "cvttps2dq",XM, EX, XX, XX },
1672 { "cvtps2dq",XM, EX, XX, XX },
1673 { "(bad)", XM, EX, XX, XX },
041bd2e0
JH		 1674 },
1675 /* PREGRP17 */
1676 {
050dfa73
MM		 1677 { "cvtps2pd", XM, EX, XX, XX },
1678 { "cvtss2sd", XM, EX, XX, XX },
1679 { "cvtpd2ps", XM, EX, XX, XX },
1680 { "cvtsd2ss", XM, EX, XX, XX },
041bd2e0
JH		 1681 },
1682 /* PREGRP18 */
1683 {
050dfa73
MM		 1684 { "maskmovq", MX, MS, XX, XX },
1685 { "(bad)", XM, EX, XX, XX },
1686 { "maskmovdqu", XM, EX, XX, XX },
1687 { "(bad)", XM, EX, XX, XX },
041bd2e0
JH		 1688 },
1689 /* PREGRP19 */
1690 {
050dfa73
MM		 1691 { "movq", MX, EM, XX, XX },
1692 { "movdqu", XM, EX, XX, XX },
1693 { "movdqa", XM, EX, XX, XX },
1694 { "(bad)", XM, EX, XX, XX },
041bd2e0
JH		 1695 },
1696 /* PREGRP20 */
1697 {
050dfa73
MM		 1698 { "movq", EM, MX, XX, XX },
1699 { "movdqu", EX, XM, XX, XX },
1700 { "movdqa", EX, XM, XX, XX },
1701 { "(bad)", EX, XM, XX, XX },
041bd2e0
JH		 1702 },
1703 /* PREGRP21 */
1704 {
050dfa73
MM		 1705 { "(bad)", EX, XM, XX, XX },
1706 { "movq2dq", XM, MS, XX, XX },
1707 { "movq", EX, XM, XX, XX },
1708 { "movdq2q", MX, XS, XX, XX },
041bd2e0
JH		 1709 },
1710 /* PREGRP22 */
1711 {
050dfa73
MM		 1712 { "pshufw", MX, EM, Ib, XX },
1713 { "pshufhw", XM, EX, Ib, XX },
1714 { "pshufd", XM, EX, Ib, XX },
1715 { "pshuflw", XM, EX, Ib, XX},
041bd2e0
JH		 1716 },
1717 /* PREGRP23 */
1718 {
050dfa73
MM		 1719 { "movd", Edq, MX, XX, XX },
1720 { "movq", XM, EX, XX, XX },
1721 { "movd", Edq, XM, XX, XX },
1722 { "(bad)", Ed, XM, XX, XX },
041bd2e0
JH		 1723 },
1724 /* PREGRP24 */
1725 {
050dfa73
MM		 1726 { "(bad)", MX, EX, XX, XX },
1727 { "(bad)", XM, EX, XX, XX },
1728 { "punpckhqdq", XM, EX, XX, XX },
1729 { "(bad)", XM, EX, XX, XX },
0f17484f
AM		 1730 },
1731 /* PREGRP25 */
1732 {
050dfa73
MM		 1733 { "movntq", EM, MX, XX, XX },
1734 { "(bad)", EM, XM, XX, XX },
1735 { "movntdq", EM, XM, XX, XX },
1736 { "(bad)", EM, XM, XX, XX },
0f17484f
AM		 1737 },
1738 /* PREGRP26 */
1739 {
050dfa73
MM		 1740 { "(bad)", MX, EX, XX, XX },
1741 { "(bad)", XM, EX, XX, XX },
1742 { "punpcklqdq", XM, EX, XX, XX },
1743 { "(bad)", XM, EX, XX, XX },
041bd2e0 1744 },
ca164297
L		 1745 /* PREGRP27 */
1746 {
050dfa73
MM		 1747 { "(bad)", MX, EX, XX, XX },
1748 { "(bad)", XM, EX, XX, XX },
1749 { "addsubpd", XM, EX, XX, XX },
1750 { "addsubps", XM, EX, XX, XX },
ca164297
L		 1751 },
1752 /* PREGRP28 */
1753 {
050dfa73
MM		 1754 { "(bad)", MX, EX, XX, XX },
1755 { "(bad)", XM, EX, XX, XX },
1756 { "haddpd", XM, EX, XX, XX },
1757 { "haddps", XM, EX, XX, XX },
ca164297
L		 1758 },
1759 /* PREGRP29 */
1760 {
050dfa73
MM		 1761 { "(bad)", MX, EX, XX, XX },
1762 { "(bad)", XM, EX, XX, XX },
1763 { "hsubpd", XM, EX, XX, XX },
1764 { "hsubps", XM, EX, XX, XX },
ca164297
L		 1765 },
1766 /* PREGRP30 */
1767 {
050dfa73
MM		 1768 { "movlpX", XM, EX, SIMD_Fixup, 'h', XX }, /* really only 2 operands */
1769 { "movsldup", XM, EX, XX, XX },
1770 { "movlpd", XM, EX, XX, XX },
1771 { "movddup", XM, EX, XX, XX },
ca164297
L		 1772 },
1773 /* PREGRP31 */
1774 {
050dfa73
MM		 1775 { "movhpX", XM, EX, SIMD_Fixup, 'l', XX },
1776 { "movshdup", XM, EX, XX, XX },
1777 { "movhpd", XM, EX, XX, XX },
1778 { "(bad)", XM, EX, XX, XX },
ca164297
L		 1779 },
1780 /* PREGRP32 */
1781 {
050dfa73
MM		 1782 { "(bad)", XM, EX, XX, XX },
1783 { "(bad)", XM, EX, XX, XX },
1784 { "(bad)", XM, EX, XX, XX },
1785 { "lddqu", XM, M, XX, XX },
ca164297 1786 },
050dfa73
MM		 1787 /* PREGRP33 */
1788 {
1789 {"movntps",Ev, XM, XX, XX},
1790 {"movntss",Ev, XM, XX, XX},
1791 {"movntpd",Ev, XM, XX, XX},
1792 {"movntsd",Ev, XM, XX, XX},
1793 },
1794
1795 /* PREGRP34 */
1796 {
1797 {"vmread", Em, Gm, XX, XX},
1798 {"(bad)", XX, XX, XX, XX},
1799 {"extrq", XS, Ib, Ib, XX},
1800 {"insertq",XM, XS, Ib, Ib},
1801 },
1802
1803 /* PREGRP35 */
1804 {
1805 {"vmwrite", Gm, Em, XX, XX},
1806 {"(bad)", XX, XX, XX, XX},
1807 {"extrq", XM, XS, XX, XX},
1808 {"insertq", XM, XS, XX, XX},
1809 },
1810
1811 /* PREGRP36 */
1812 {
1813 { "bsrS", Gv, Ev, XX, XX },
1814 { "lzcntS", Gv, Ev, XX, XX },
1815 { "bsrS", Gv, Ev, XX, XX },
1816 { "(bad)", XX, XX, XX, XX },
1817 },
1818
c608c12e
AM		 1819};
1820
6439fc28
AM		 1821static const struct dis386 x86_64_table[][2] = {
1822 {
050dfa73
MM		 1823 { "arpl", Ew, Gw, XX, XX },
1824 { "movs{||lq|xd}", Gv, Ed, XX, XX },
6439fc28
AM		 1825 },
1826};
1827
331d2d0d
L		 1828static const struct dis386 three_byte_table[][32] = {
1829 /* THREE_BYTE_0 */
1830 {
050dfa73
MM		 1831 { "pshufb", MX, EM, XX, XX },
1832 { "phaddw", MX, EM, XX, XX },
1833 { "phaddd", MX, EM, XX, XX },
1834 { "phaddsw", MX, EM, XX, XX },
1835 { "pmaddubsw", MX, EM, XX, XX },
1836 { "phsubw", MX, EM, XX, XX },
1837 { "phsubd", MX, EM, XX, XX },
1838 { "phsubsw", MX, EM, XX, XX },
1839 { "psignb", MX, EM, XX, XX },
1840 { "psignw", MX, EM, XX, XX },
1841 { "psignd", MX, EM, XX, XX },
1842 { "pmulhrsw", MX, EM, XX, XX },
1843 { "(bad)", XX, XX, XX, XX },
1844 { "(bad)", XX, XX, XX, XX },
1845 { "(bad)", XX, XX, XX, XX },
1846 { "(bad)", XX, XX, XX, XX },
1847 { "(bad)", XX, XX, XX, XX },
1848 { "(bad)", XX, XX, XX, XX },
1849 { "(bad)", XX, XX, XX, XX },
1850 { "(bad)", XX, XX, XX, XX },
1851 { "(bad)", XX, XX, XX, XX },
1852 { "(bad)", XX, XX, XX, XX },
1853 { "(bad)", XX, XX, XX, XX },
1854 { "(bad)", XX, XX, XX, XX },
1855 { "(bad)", XX, XX, XX, XX },
1856 { "(bad)", XX, XX, XX, XX },
1857 { "(bad)", XX, XX, XX, XX },
1858 { "(bad)", XX, XX, XX, XX },
1859 { "pabsb", MX, EM, XX, XX },
1860 { "pabsw", MX, EM, XX, XX },
1861 { "pabsd", MX, EM, XX, XX },
1862 { "(bad)", XX, XX, XX, XX }
331d2d0d
L		 1863 },
1864 /* THREE_BYTE_1 */
1865 {
050dfa73
MM		 1866 { "(bad)", XX, XX, XX, XX },
1867 { "(bad)", XX, XX, XX, XX },
1868 { "(bad)", XX, XX, XX, XX },
1869 { "(bad)", XX, XX, XX, XX },
1870 { "(bad)", XX, XX, XX, XX },
1871 { "(bad)", XX, XX, XX, XX },
1872 { "(bad)", XX, XX, XX, XX },
1873 { "(bad)", XX, XX, XX, XX },
1874 { "(bad)", XX, XX, XX, XX },
1875 { "(bad)", XX, XX, XX, XX },
1876 { "(bad)", XX, XX, XX, XX },
1877 { "(bad)", XX, XX, XX, XX },
1878 { "(bad)", XX, XX, XX, XX },
1879 { "(bad)", XX, XX, XX, XX },
1880 { "(bad)", XX, XX, XX, XX },
1881 { "palignr", MX, EM, Ib, XX },
1882 { "(bad)", XX, XX, XX, XX },
1883 { "(bad)", XX, XX, XX, XX },
1884 { "(bad)", XX, XX, XX, XX },
1885 { "(bad)", XX, XX, XX, XX },
1886 { "(bad)", XX, XX, XX, XX },
1887 { "(bad)", XX, XX, XX, XX },
1888 { "(bad)", XX, XX, XX, XX },
1889 { "(bad)", XX, XX, XX, XX },
1890 { "(bad)", XX, XX, XX, XX },
1891 { "(bad)", XX, XX, XX, XX },
1892 { "(bad)", XX, XX, XX, XX },
1893 { "(bad)", XX, XX, XX, XX },
1894 { "(bad)", XX, XX, XX, XX },
1895 { "(bad)", XX, XX, XX, XX },
1896 { "(bad)", XX, XX, XX, XX },
1897 { "(bad)", XX, XX, XX, XX }
331d2d0d
L		 1898 },
1899};
1900
c608c12e
AM		 1901#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1902
252b5132 1903static void
26ca5450 1904ckprefix (void)
252b5132 1905{
52b15da3
JH		 1906 int newrex;
1907 rex = 0;
252b5132 1908 prefixes = 0;
7d421014 1909 used_prefixes = 0;
52b15da3 1910 rex_used = 0;
252b5132
RH		 1911 while (1)
1912 {
1913 FETCH_DATA (the_info, codep + 1);
52b15da3 1914 newrex = 0;
252b5132
RH		 1915 switch (*codep)
1916 {
52b15da3
JH		 1917 /* REX prefixes family. */
1918 case 0x40:
1919 case 0x41:
1920 case 0x42:
1921 case 0x43:
1922 case 0x44:
1923 case 0x45:
1924 case 0x46:
1925 case 0x47:
1926 case 0x48:
1927 case 0x49:
1928 case 0x4a:
1929 case 0x4b:
1930 case 0x4c:
1931 case 0x4d:
1932 case 0x4e:
1933 case 0x4f:
cb712a9e 1934 if (address_mode == mode_64bit)
52b15da3
JH		 1935 newrex = *codep;
1936 else
1937 return;
1938 break;
252b5132
RH		 1939 case 0xf3:
1940 prefixes |= PREFIX_REPZ;
1941 break;
1942 case 0xf2:
1943 prefixes |= PREFIX_REPNZ;
1944 break;
1945 case 0xf0:
1946 prefixes |= PREFIX_LOCK;
1947 break;
1948 case 0x2e:
1949 prefixes |= PREFIX_CS;
1950 break;
1951 case 0x36:
1952 prefixes |= PREFIX_SS;
1953 break;
1954 case 0x3e:
1955 prefixes |= PREFIX_DS;
1956 break;
1957 case 0x26:
1958 prefixes |= PREFIX_ES;
1959 break;
1960 case 0x64:
1961 prefixes |= PREFIX_FS;
1962 break;
1963 case 0x65:
1964 prefixes |= PREFIX_GS;
1965 break;
1966 case 0x66:
1967 prefixes |= PREFIX_DATA;
1968 break;
1969 case 0x67:
1970 prefixes |= PREFIX_ADDR;
1971 break;
5076851f 1972 case FWAIT_OPCODE:
252b5132
RH		 1973 /* fwait is really an instruction. If there are prefixes
1974 before the fwait, they belong to the fwait, *not* to the
1975 following instruction. */
3e7d61b2 1976 if (prefixes || rex)
252b5132
RH		 1977 {
1978 prefixes |= PREFIX_FWAIT;
1979 codep++;
1980 return;
1981 }
1982 prefixes = PREFIX_FWAIT;
1983 break;
1984 default:
1985 return;
1986 }
52b15da3
JH		 1987 /* Rex is ignored when followed by another prefix. */
1988 if (rex)
1989 {
3e7d61b2
AM		 1990 rex_used = rex;
1991 return;
52b15da3
JH		 1992 }
1993 rex = newrex;
252b5132
RH		 1994 codep++;
1995 }
1996}
1997
7d421014
ILT		 1998/* Return the name of the prefix byte PREF, or NULL if PREF is not a
1999 prefix byte. */
2000
2001static const char *
26ca5450 2002prefix_name (int pref, int sizeflag)
7d421014
ILT		 2003{
2004 switch (pref)
2005 {
52b15da3
JH		 2006 /* REX prefixes family. */
2007 case 0x40:
2008 return "rex";
2009 case 0x41:
2010 return "rexZ";
2011 case 0x42:
2012 return "rexY";
2013 case 0x43:
2014 return "rexYZ";
2015 case 0x44:
2016 return "rexX";
2017 case 0x45:
2018 return "rexXZ";
2019 case 0x46:
2020 return "rexXY";
2021 case 0x47:
2022 return "rexXYZ";
2023 case 0x48:
2024 return "rex64";
2025 case 0x49:
2026 return "rex64Z";
2027 case 0x4a:
2028 return "rex64Y";
2029 case 0x4b:
2030 return "rex64YZ";
2031 case 0x4c:
2032 return "rex64X";
2033 case 0x4d:
2034 return "rex64XZ";
2035 case 0x4e:
2036 return "rex64XY";
2037 case 0x4f:
2038 return "rex64XYZ";
7d421014
ILT		 2039 case 0xf3:
2040 return "repz";
2041 case 0xf2:
2042 return "repnz";
2043 case 0xf0:
2044 return "lock";
2045 case 0x2e:
2046 return "cs";
2047 case 0x36:
2048 return "ss";
2049 case 0x3e:
2050 return "ds";
2051 case 0x26:
2052 return "es";
2053 case 0x64:
2054 return "fs";
2055 case 0x65:
2056 return "gs";
2057 case 0x66:
2058 return (sizeflag & DFLAG) ? "data16" : "data32";
2059 case 0x67:
cb712a9e 2060 if (address_mode == mode_64bit)
db6eb5be 2061 return (sizeflag & AFLAG) ? "addr32" : "addr64";
c1a64871 2062 else
2888cb7a 2063 return (sizeflag & AFLAG) ? "addr16" : "addr32";
7d421014
ILT		 2064 case FWAIT_OPCODE:
2065 return "fwait";
2066 default:
2067 return NULL;
2068 }
2069}
2070
050dfa73
MM		 2071static char op1out[100], op2out[100], op3out[100], op4out[100];
2072static int op_ad, op_index[4];
1d9f512f 2073static int two_source_ops;
050dfa73
MM		 2074static bfd_vma op_address[4];
2075static bfd_vma op_riprel[4];
52b15da3 2076static bfd_vma start_pc;
252b5132
RH		 2077\f
2078/*
2079 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
2080 * (see topic "Redundant prefixes" in the "Differences from 8086"
2081 * section of the "Virtual 8086 Mode" chapter.)
2082 * 'pc' should be the address of this instruction, it will
2083 * be used to print the target address if this is a relative jump or call
2084 * The function returns the length of this instruction in bytes.
2085 */
2086
252b5132
RH		 2087static char intel_syntax;
2088static char open_char;
2089static char close_char;
2090static char separator_char;
2091static char scale_char;
2092
e396998b
AM		 2093/* Here for backwards compatibility. When gdb stops using
2094 print_insn_i386_att and print_insn_i386_intel these functions can
2095 disappear, and print_insn_i386 be merged into print_insn. */
252b5132 2096int
26ca5450 2097print_insn_i386_att (bfd_vma pc, disassemble_info *info)
252b5132
RH		 2098{
2099 intel_syntax = 0;
e396998b
AM		 2100
2101 return print_insn (pc, info);
252b5132
RH		 2102}
2103
2104int
26ca5450 2105print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
252b5132
RH		 2106{
2107 intel_syntax = 1;
e396998b
AM		 2108
2109 return print_insn (pc, info);
252b5132
RH		 2110}
2111
e396998b 2112int
26ca5450 2113print_insn_i386 (bfd_vma pc, disassemble_info *info)
e396998b
AM		 2114{
2115 intel_syntax = -1;
2116
2117 return print_insn (pc, info);
2118}
2119
2120static int
26ca5450 2121print_insn (bfd_vma pc, disassemble_info *info)
252b5132 2122{
2da11e11 2123 const struct dis386 *dp;
252b5132 2124 int i;
050dfa73 2125 char *first, *second, *third, *fourth;
252b5132 2126 int needcomma;
c4a530c5 2127 unsigned char uses_SSE_prefix, uses_LOCK_prefix;
e396998b
AM		 2128 int sizeflag;
2129 const char *p;
252b5132 2130 struct dis_private priv;
252b5132 2131
cb712a9e
L		 2132 if (info->mach == bfd_mach_x86_64_intel_syntax
2133 || info->mach == bfd_mach_x86_64)
2134 address_mode = mode_64bit;
2135 else
2136 address_mode = mode_32bit;
52b15da3 2137
8373f971 2138 if (intel_syntax == (char) -1)
e396998b
AM		 2139 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
2140 || info->mach == bfd_mach_x86_64_intel_syntax);
2141
2da11e11 2142 if (info->mach == bfd_mach_i386_i386
52b15da3
JH		 2143 || info->mach == bfd_mach_x86_64
2144 || info->mach == bfd_mach_i386_i386_intel_syntax
2145 || info->mach == bfd_mach_x86_64_intel_syntax)
e396998b 2146 priv.orig_sizeflag = AFLAG | DFLAG;
2da11e11 2147 else if (info->mach == bfd_mach_i386_i8086)
e396998b 2148 priv.orig_sizeflag = 0;
2da11e11
AM		 2149 else
2150 abort ();
e396998b
AM		 2151
2152 for (p = info->disassembler_options; p != NULL; )
2153 {
fa405d97 2154 if (strncmp (p, "x86-64", 6) == 0)
e396998b 2155 {
cb712a9e 2156 address_mode = mode_64bit;
e396998b
AM		 2157 priv.orig_sizeflag = AFLAG | DFLAG;
2158 }
2159 else if (strncmp (p, "i386", 4) == 0)
2160 {
cb712a9e 2161 address_mode = mode_32bit;
e396998b
AM		 2162 priv.orig_sizeflag = AFLAG | DFLAG;
2163 }
2164 else if (strncmp (p, "i8086", 5) == 0)
2165 {
cb712a9e 2166 address_mode = mode_16bit;
e396998b
AM		 2167 priv.orig_sizeflag = 0;
2168 }
2169 else if (strncmp (p, "intel", 5) == 0)
2170 {
2171 intel_syntax = 1;
2172 }
2173 else if (strncmp (p, "att", 3) == 0)
2174 {
2175 intel_syntax = 0;
2176 }
2177 else if (strncmp (p, "addr", 4) == 0)
2178 {
2179 if (p[4] == '1' && p[5] == '6')
2180 priv.orig_sizeflag &= ~AFLAG;
2181 else if (p[4] == '3' && p[5] == '2')
2182 priv.orig_sizeflag |= AFLAG;
2183 }
2184 else if (strncmp (p, "data", 4) == 0)
2185 {
2186 if (p[4] == '1' && p[5] == '6')
2187 priv.orig_sizeflag &= ~DFLAG;
2188 else if (p[4] == '3' && p[5] == '2')
2189 priv.orig_sizeflag |= DFLAG;
2190 }
2191 else if (strncmp (p, "suffix", 6) == 0)
2192 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2193
2194 p = strchr (p, ',');
2195 if (p != NULL)
2196 p++;
2197 }
2198
2199 if (intel_syntax)
2200 {
2201 names64 = intel_names64;
2202 names32 = intel_names32;
2203 names16 = intel_names16;
2204 names8 = intel_names8;
2205 names8rex = intel_names8rex;
2206 names_seg = intel_names_seg;
2207 index16 = intel_index16;
2208 open_char = '[';
2209 close_char = ']';
2210 separator_char = '+';
2211 scale_char = '*';
2212 }
2213 else
2214 {
2215 names64 = att_names64;
2216 names32 = att_names32;
2217 names16 = att_names16;
2218 names8 = att_names8;
2219 names8rex = att_names8rex;
2220 names_seg = att_names_seg;
2221 index16 = att_index16;
2222 open_char = '(';
2223 close_char = ')';
2224 separator_char = ',';
2225 scale_char = ',';
2226 }
2da11e11 2227
4fe53c98 2228 /* The output looks better if we put 7 bytes on a line, since that
c608c12e 2229 puts most long word instructions on a single line. */
4fe53c98 2230 info->bytes_per_line = 7;
252b5132 2231
26ca5450 2232 info->private_data = &priv;
252b5132
RH		 2233 priv.max_fetched = priv.the_buffer;
2234 priv.insn_start = pc;
252b5132
RH		 2235
2236 obuf[0] = 0;
2237 op1out[0] = 0;
2238 op2out[0] = 0;
2239 op3out[0] = 0;
050dfa73 2240 op4out[0] = 0;
252b5132 2241
050dfa73 2242 op_index[0] = op_index[1] = op_index[2] = op_index[3] = -1;
252b5132
RH		 2243
2244 the_info = info;
2245 start_pc = pc;
e396998b
AM		 2246 start_codep = priv.the_buffer;
2247 codep = priv.the_buffer;
252b5132 2248
5076851f
ILT		 2249 if (setjmp (priv.bailout) != 0)
2250 {
7d421014
ILT		 2251 const char *name;
2252
5076851f 2253 /* Getting here means we tried for data but didn't get it. That
e396998b
AM		 2254 means we have an incomplete instruction of some sort. Just
2255 print the first byte as a prefix or a .byte pseudo-op. */
2256 if (codep > priv.the_buffer)
5076851f 2257 {
e396998b 2258 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2259 if (name != NULL)
2260 (*info->fprintf_func) (info->stream, "%s", name);
2261 else
5076851f 2262 {
7d421014
ILT		 2263 /* Just print the first byte as a .byte instruction. */
2264 (*info->fprintf_func) (info->stream, ".byte 0x%x",
e396998b 2265 (unsigned int) priv.the_buffer[0]);
5076851f 2266 }
5076851f 2267
7d421014 2268 return 1;
5076851f
ILT		 2269 }
2270
2271 return -1;
2272 }
2273
52b15da3 2274 obufp = obuf;
252b5132
RH		 2275 ckprefix ();
2276
2277 insn_codep = codep;
e396998b 2278 sizeflag = priv.orig_sizeflag;
252b5132
RH		 2279
2280 FETCH_DATA (info, codep + 1);
2281 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2282
3e7d61b2
AM		 2283 if (((prefixes & PREFIX_FWAIT)
2284 && ((*codep < 0xd8) || (*codep > 0xdf)))
2285 || (rex && rex_used))
252b5132 2286 {
7d421014
ILT		 2287 const char *name;
2288
3e7d61b2
AM		 2289 /* fwait not followed by floating point instruction, or rex followed
2290 by other prefixes. Print the first prefix. */
e396998b 2291 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2292 if (name == NULL)
2293 name = INTERNAL_DISASSEMBLER_ERROR;
2294 (*info->fprintf_func) (info->stream, "%s", name);
2295 return 1;
252b5132
RH		 2296 }
2297
252b5132
RH		 2298 if (*codep == 0x0f)
2299 {
2300 FETCH_DATA (info, codep + 2);
6439fc28 2301 dp = &dis386_twobyte[*++codep];
252b5132 2302 need_modrm = twobyte_has_modrm[*codep];
041bd2e0 2303 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
c4a530c5 2304 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
252b5132
RH		 2305 }
2306 else
2307 {
6439fc28 2308 dp = &dis386[*codep];
252b5132 2309 need_modrm = onebyte_has_modrm[*codep];
041bd2e0 2310 uses_SSE_prefix = 0;
c4a530c5 2311 uses_LOCK_prefix = 0;
252b5132 2312 }
050dfa73
MM		 2313
2314 /*"lzcnt"=0xBD is the only non-sse instruction which uses F3 in the opcode without any "rep(z|nz)"*/
2315 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ) && *codep !=0xBD)
7d421014
ILT		 2316 {
2317 oappend ("repz ");
2318 used_prefixes |= PREFIX_REPZ;
2319 }
050dfa73 2320 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ) && *codep !=0xBD)
7d421014
ILT		 2321 {
2322 oappend ("repnz ");
2323 used_prefixes |= PREFIX_REPNZ;
2324 }
050dfa73
MM		 2325
2326 codep++;
2327
c4a530c5 2328 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
7d421014
ILT		 2329 {
2330 oappend ("lock ");
2331 used_prefixes |= PREFIX_LOCK;
2332 }
c608c12e 2333
c608c12e
AM		 2334 if (prefixes & PREFIX_ADDR)
2335 {
2336 sizeflag ^= AFLAG;
6439fc28 2337 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
3ffd33cf 2338 {
cb712a9e 2339 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3ffd33cf
AM		 2340 oappend ("addr32 ");
2341 else
2342 oappend ("addr16 ");
2343 used_prefixes |= PREFIX_ADDR;
2344 }
2345 }
2346
2347 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2348 {
2349 sizeflag ^= DFLAG;
6439fc28
AM		 2350 if (dp->bytemode3 == cond_jump_mode
2351 && dp->bytemode1 == v_mode
2352 && !intel_syntax)
3ffd33cf
AM		 2353 {
2354 if (sizeflag & DFLAG)
2355 oappend ("data32 ");
2356 else
2357 oappend ("data16 ");
2358 used_prefixes |= PREFIX_DATA;
2359 }
2360 }
2361
331d2d0d
L		 2362 if (dp->name == NULL && dp->bytemode1 == IS_3BYTE_OPCODE)
2363 {
2364 FETCH_DATA (info, codep + 2);
2365 dp = &three_byte_table[dp->bytemode2][*codep++];
2366 mod = (*codep >> 6) & 3;
2367 reg = (*codep >> 3) & 7;
2368 rm = *codep & 7;
2369 }
2370 else if (need_modrm)
252b5132
RH		 2371 {
2372 FETCH_DATA (info, codep + 1);
2373 mod = (*codep >> 6) & 3;
2374 reg = (*codep >> 3) & 7;
2375 rm = *codep & 7;
2376 }
2377
2378 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2379 {
2380 dofloat (sizeflag);
2381 }
2382 else
2383 {
041bd2e0 2384 int index;
252b5132 2385 if (dp->name == NULL)
c608c12e 2386 {
6439fc28 2387 switch (dp->bytemode1)
c608c12e 2388 {
6439fc28
AM		 2389 case USE_GROUPS:
2390 dp = &grps[dp->bytemode2][reg];
2391 break;
2392
2393 case USE_PREFIX_USER_TABLE:
2394 index = 0;
2395 used_prefixes |= (prefixes & PREFIX_REPZ);
2396 if (prefixes & PREFIX_REPZ)
2397 index = 1;
2398 else
2399 {
2400 used_prefixes |= (prefixes & PREFIX_DATA);
2401 if (prefixes & PREFIX_DATA)
2402 index = 2;
2403 else
2404 {
2405 used_prefixes |= (prefixes & PREFIX_REPNZ);
2406 if (prefixes & PREFIX_REPNZ)
2407 index = 3;
2408 }
2409 }
2410 dp = &prefix_user_table[dp->bytemode2][index];
2411 break;
252b5132 2412
6439fc28 2413 case X86_64_SPECIAL:
cb712a9e
L		 2414 index = address_mode == mode_64bit ? 1 : 0;
2415 dp = &x86_64_table[dp->bytemode2][index];
6439fc28 2416 break;
252b5132 2417
6439fc28
AM		 2418 default:
2419 oappend (INTERNAL_DISASSEMBLER_ERROR);
2420 break;
2421 }
2422 }
252b5132 2423
6439fc28
AM		 2424 if (putop (dp->name, sizeflag) == 0)
2425 {
2426 obufp = op1out;
050dfa73 2427 op_ad = 3;
6439fc28 2428 if (dp->op1)
6608db57 2429 (*dp->op1) (dp->bytemode1, sizeflag);
6439fc28
AM		 2430
2431 obufp = op2out;
050dfa73 2432 op_ad = 2;
6439fc28 2433 if (dp->op2)
6608db57 2434 (*dp->op2) (dp->bytemode2, sizeflag);
6439fc28
AM		 2435
2436 obufp = op3out;
050dfa73 2437 op_ad = 1;
6439fc28 2438 if (dp->op3)
6608db57 2439 (*dp->op3) (dp->bytemode3, sizeflag);
050dfa73
MM		 2440
2441 obufp = op4out;
2442 op_ad = 0;
2443 if (dp->op4)
2444 (*dp->op4) (dp->bytemode4, sizeflag);
6439fc28 2445 }
252b5132
RH		 2446 }
2447
7d421014
ILT		 2448 /* See if any prefixes were not used. If so, print the first one
2449 separately. If we don't do this, we'll wind up printing an
2450 instruction stream which does not precisely correspond to the
2451 bytes we are disassembling. */
2452 if ((prefixes & ~used_prefixes) != 0)
2453 {
2454 const char *name;
2455
e396998b 2456 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2457 if (name == NULL)
2458 name = INTERNAL_DISASSEMBLER_ERROR;
2459 (*info->fprintf_func) (info->stream, "%s", name);
2460 return 1;
2461 }
52b15da3
JH		 2462 if (rex & ~rex_used)
2463 {
2464 const char *name;
e396998b 2465 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
52b15da3
JH		 2466 if (name == NULL)
2467 name = INTERNAL_DISASSEMBLER_ERROR;
2468 (*info->fprintf_func) (info->stream, "%s ", name);
2469 }
7d421014 2470
252b5132
RH		 2471 obufp = obuf + strlen (obuf);
2472 for (i = strlen (obuf); i < 6; i++)
2473 oappend (" ");
2474 oappend (" ");
2475 (*info->fprintf_func) (info->stream, "%s", obuf);
2476
2477 /* The enter and bound instructions are printed with operands in the same
2478 order as the intel book; everything else is printed in reverse order. */
2da11e11 2479 if (intel_syntax || two_source_ops)
252b5132
RH		 2480 {
2481 first = op1out;
2482 second = op2out;
2483 third = op3out;
050dfa73 2484 fourth = op4out;
252b5132 2485 op_ad = op_index[0];
050dfa73
MM		 2486 op_index[0] = op_index[3];
2487 op_index[3] = op_ad;
2488 op_ad = op_index[1];
2489 op_index[1] = op_index[2];
252b5132 2490 op_index[2] = op_ad;
050dfa73 2491
252b5132
RH		 2492 }
2493 else
2494 {
050dfa73
MM		 2495 first = op4out;
2496 second = op3out;
2497 third = op2out;
2498 fourth = op1out;
252b5132
RH		 2499 }
2500 needcomma = 0;
2501 if (*first)
2502 {
52b15da3 2503 if (op_index[0] != -1 && !op_riprel[0])
252b5132
RH		 2504 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2505 else
2506 (*info->fprintf_func) (info->stream, "%s", first);
2507 needcomma = 1;
2508 }
050dfa73 2509
252b5132
RH		 2510 if (*second)
2511 {
2512 if (needcomma)
2513 (*info->fprintf_func) (info->stream, ",");
52b15da3 2514 if (op_index[1] != -1 && !op_riprel[1])
252b5132
RH		 2515 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2516 else
2517 (*info->fprintf_func) (info->stream, "%s", second);
2518 needcomma = 1;
2519 }
050dfa73 2520
252b5132
RH		 2521 if (*third)
2522 {
2523 if (needcomma)
2524 (*info->fprintf_func) (info->stream, ",");
52b15da3 2525 if (op_index[2] != -1 && !op_riprel[2])
252b5132
RH		 2526 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2527 else
2528 (*info->fprintf_func) (info->stream, "%s", third);
050dfa73
MM		 2529 needcomma = 1;
2530 }
2531
2532 if (*fourth)
2533 {
2534 if (needcomma)
2535 (*info->fprintf_func) (info->stream, ",");
2536 if (op_index[3] != -1 && !op_riprel[3])
2537 (*info->print_address_func) ((bfd_vma) op_address[op_index[3]], info);
2538 else
2539 (*info->fprintf_func) (info->stream, "%s", fourth);
252b5132 2540 }
050dfa73
MM		 2541
2542 for (i = 0; i < 4; i++)
52b15da3
JH		 2543 if (op_index[i] != -1 && op_riprel[i])
2544 {
2545 (*info->fprintf_func) (info->stream, " # ");
2546 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2547 + op_address[op_index[i]]), info);
2548 }
e396998b 2549 return codep - priv.the_buffer;
252b5132
RH		 2550}
2551
6439fc28 2552static const char *float_mem[] = {
252b5132 2553 /* d8 */
6439fc28
AM		 2554 "fadd{s||s|}",
2555 "fmul{s||s|}",
2556 "fcom{s||s|}",
2557 "fcomp{s||s|}",
2558 "fsub{s||s|}",
2559 "fsubr{s||s|}",
2560 "fdiv{s||s|}",
2561 "fdivr{s||s|}",
db6eb5be 2562 /* d9 */
6439fc28 2563 "fld{s||s|}",
252b5132 2564 "(bad)",
6439fc28
AM		 2565 "fst{s||s|}",
2566 "fstp{s||s|}",
9306ca4a 2567 "fldenvIC",
252b5132 2568 "fldcw",
9306ca4a 2569 "fNstenvIC",
252b5132
RH		 2570 "fNstcw",
2571 /* da */
6439fc28
AM		 2572 "fiadd{l||l|}",
2573 "fimul{l||l|}",
2574 "ficom{l||l|}",
2575 "ficomp{l||l|}",
2576 "fisub{l||l|}",
2577 "fisubr{l||l|}",
2578 "fidiv{l||l|}",
2579 "fidivr{l||l|}",
252b5132 2580 /* db */
6439fc28 2581 "fild{l||l|}",
ca164297 2582 "fisttp{l||l|}",
6439fc28
AM		 2583 "fist{l||l|}",
2584 "fistp{l||l|}",
252b5132 2585 "(bad)",
6439fc28 2586 "fld{t||t|}",
252b5132 2587 "(bad)",
6439fc28 2588 "fstp{t||t|}",
252b5132 2589 /* dc */
6439fc28
AM		 2590 "fadd{l||l|}",
2591 "fmul{l||l|}",
2592 "fcom{l||l|}",
2593 "fcomp{l||l|}",
2594 "fsub{l||l|}",
2595 "fsubr{l||l|}",
2596 "fdiv{l||l|}",
2597 "fdivr{l||l|}",
252b5132 2598 /* dd */
6439fc28 2599 "fld{l||l|}",
1d9f512f 2600 "fisttp{ll||ll|}",
6439fc28
AM		 2601 "fst{l||l|}",
2602 "fstp{l||l|}",
9306ca4a 2603 "frstorIC",
252b5132 2604 "(bad)",
9306ca4a 2605 "fNsaveIC",
252b5132
RH		 2606 "fNstsw",
2607 /* de */
2608 "fiadd",
2609 "fimul",
2610 "ficom",
2611 "ficomp",
2612 "fisub",
2613 "fisubr",
2614 "fidiv",
2615 "fidivr",
2616 /* df */
2617 "fild",
ca164297 2618 "fisttp",
252b5132
RH		 2619 "fist",
2620 "fistp",
2621 "fbld",
6439fc28 2622 "fild{ll||ll|}",
252b5132 2623 "fbstp",
1d9f512f
AM		 2624 "fistp{ll||ll|}",
2625};
2626
2627static const unsigned char float_mem_mode[] = {
2628 /* d8 */
2629 d_mode,
2630 d_mode,
2631 d_mode,
2632 d_mode,
2633 d_mode,
2634 d_mode,
2635 d_mode,
2636 d_mode,
2637 /* d9 */
2638 d_mode,
2639 0,
2640 d_mode,
2641 d_mode,
2642 0,
2643 w_mode,
2644 0,
2645 w_mode,
2646 /* da */
2647 d_mode,
2648 d_mode,
2649 d_mode,
2650 d_mode,
2651 d_mode,
2652 d_mode,
2653 d_mode,
2654 d_mode,
2655 /* db */
2656 d_mode,
2657 d_mode,
2658 d_mode,
2659 d_mode,
2660 0,
9306ca4a 2661 t_mode,
1d9f512f 2662 0,
9306ca4a 2663 t_mode,
1d9f512f
AM		 2664 /* dc */
2665 q_mode,
2666 q_mode,
2667 q_mode,
2668 q_mode,
2669 q_mode,
2670 q_mode,
2671 q_mode,
2672 q_mode,
2673 /* dd */
2674 q_mode,
2675 q_mode,
2676 q_mode,
2677 q_mode,
2678 0,
2679 0,
2680 0,
2681 w_mode,
2682 /* de */
2683 w_mode,
2684 w_mode,
2685 w_mode,
2686 w_mode,
2687 w_mode,
2688 w_mode,
2689 w_mode,
2690 w_mode,
2691 /* df */
2692 w_mode,
2693 w_mode,
2694 w_mode,
2695 w_mode,
9306ca4a 2696 t_mode,
1d9f512f 2697 q_mode,
9306ca4a 2698 t_mode,
1d9f512f 2699 q_mode
252b5132
RH		 2700};
2701
2702#define ST OP_ST, 0
2703#define STi OP_STi, 0
2704
050dfa73
MM		 2705#define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0, NULL, 0
2706#define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0, NULL, 0
2707#define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0, NULL, 0
2708#define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0, NULL, 0
2709#define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0, NULL, 0
2710#define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0, NULL, 0
2711#define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0, NULL, 0
2712#define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0, NULL, 0
2713#define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0, NULL, 0
252b5132 2714
2da11e11 2715static const struct dis386 float_reg[][8] = {
252b5132
RH		 2716 /* d8 */
2717 {
050dfa73
MM		 2718 { "fadd", ST, STi, XX, XX },
2719 { "fmul", ST, STi, XX, XX },
2720 { "fcom", STi, XX, XX, XX },
2721 { "fcomp", STi, XX, XX, XX },
2722 { "fsub", ST, STi, XX, XX },
2723 { "fsubr", ST, STi, XX, XX },
2724 { "fdiv", ST, STi, XX, XX },
2725 { "fdivr", ST, STi, XX, XX },
252b5132
RH		 2726 },
2727 /* d9 */
2728 {
050dfa73
MM		 2729 { "fld", STi, XX, XX, XX },
2730 { "fxch", STi, XX, XX, XX },
252b5132 2731 { FGRPd9_2 },
050dfa73 2732 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 2733 { FGRPd9_4 },
2734 { FGRPd9_5 },
2735 { FGRPd9_6 },
2736 { FGRPd9_7 },
2737 },
2738 /* da */
2739 {
050dfa73
MM		 2740 { "fcmovb", ST, STi, XX, XX },
2741 { "fcmove", ST, STi, XX, XX },
2742 { "fcmovbe",ST, STi, XX, XX },
2743 { "fcmovu", ST, STi, XX, XX },
2744 { "(bad)", XX, XX, XX, XX },
252b5132 2745 { FGRPda_5 },
050dfa73
MM		 2746 { "(bad)", XX, XX, XX, XX },
2747 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 2748 },
2749 /* db */
2750 {
050dfa73
MM		 2751 { "fcmovnb",ST, STi, XX, XX },
2752 { "fcmovne",ST, STi, XX, XX },
2753 { "fcmovnbe",ST, STi, XX, XX },
2754 { "fcmovnu",ST, STi, XX, XX },
252b5132 2755 { FGRPdb_4 },
050dfa73
MM		 2756 { "fucomi", ST, STi, XX, XX },
2757 { "fcomi", ST, STi, XX, XX },
2758 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 2759 },
2760 /* dc */
2761 {
050dfa73
MM		 2762 { "fadd", STi, ST, XX, XX },
2763 { "fmul", STi, ST, XX, XX },
2764 { "(bad)", XX, XX, XX, XX },
2765 { "(bad)", XX, XX, XX, XX },
252b5132 2766#if UNIXWARE_COMPAT
050dfa73
MM		 2767 { "fsub", STi, ST, XX, XX },
2768 { "fsubr", STi, ST, XX, XX },
2769 { "fdiv", STi, ST, XX, XX },
2770 { "fdivr", STi, ST, XX, XX },
252b5132 2771#else
050dfa73
MM		 2772 { "fsubr", STi, ST, XX, XX },
2773 { "fsub", STi, ST, XX, XX },
2774 { "fdivr", STi, ST, XX, XX },
2775 { "fdiv", STi, ST, XX, XX },
252b5132
RH		 2776#endif
2777 },
2778 /* dd */
2779 {
050dfa73
MM		 2780 { "ffree", STi, XX, XX, XX },
2781 { "(bad)", XX, XX, XX, XX },
2782 { "fst", STi, XX, XX, XX },
2783 { "fstp", STi, XX, XX, XX },
2784 { "fucom", STi, XX, XX, XX },
2785 { "fucomp", STi, XX, XX, XX },
2786 { "(bad)", XX, XX, XX, XX },
2787 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 2788 },
2789 /* de */
2790 {
050dfa73
MM		 2791 { "faddp", STi, ST, XX, XX },
2792 { "fmulp", STi, ST, XX, XX },
2793 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 2794 { FGRPde_3 },
2795#if UNIXWARE_COMPAT
050dfa73
MM		 2796 { "fsubp", STi, ST, XX, XX },
2797 { "fsubrp", STi, ST, XX, XX },
2798 { "fdivp", STi, ST, XX, XX },
2799 { "fdivrp", STi, ST, XX, XX },
252b5132 2800#else
050dfa73
MM		 2801 { "fsubrp", STi, ST, XX, XX },
2802 { "fsubp", STi, ST, XX, XX },
2803 { "fdivrp", STi, ST, XX, XX },
2804 { "fdivp", STi, ST, XX, XX },
252b5132
RH		 2805#endif
2806 },
2807 /* df */
2808 {
050dfa73
MM		 2809 { "ffreep", STi, XX, XX, XX },
2810 { "(bad)", XX, XX, XX, XX },
2811 { "(bad)", XX, XX, XX, XX },
2812 { "(bad)", XX, XX, XX, XX },
252b5132 2813 { FGRPdf_4 },
050dfa73
MM		 2814 { "fucomip",ST, STi, XX, XX },
2815 { "fcomip", ST, STi, XX, XX },
2816 { "(bad)", XX, XX, XX, XX },
252b5132
RH		 2817 },
2818};
2819
252b5132
RH		 2820static char *fgrps[][8] = {
2821 /* d9_2 0 */
2822 {
2823 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2824 },
2825
2826 /* d9_4 1 */
2827 {
2828 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2829 },
2830
2831 /* d9_5 2 */
2832 {
2833 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2834 },
2835
2836 /* d9_6 3 */
2837 {
2838 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2839 },
2840
2841 /* d9_7 4 */
2842 {
2843 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2844 },
2845
2846 /* da_5 5 */
2847 {
2848 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2849 },
2850
2851 /* db_4 6 */
2852 {
2853 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2854 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2855 },
2856
2857 /* de_3 7 */
2858 {
2859 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2860 },
2861
2862 /* df_4 8 */
2863 {
2864 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2865 },
2866};
2867
2868static void
26ca5450 2869dofloat (int sizeflag)
252b5132 2870{
2da11e11 2871 const struct dis386 *dp;
252b5132
RH		 2872 unsigned char floatop;
2873
2874 floatop = codep[-1];
2875
2876 if (mod != 3)
2877 {
1d9f512f
AM		 2878 int fp_indx = (floatop - 0xd8) * 8 + reg;
2879
2880 putop (float_mem[fp_indx], sizeflag);
252b5132 2881 obufp = op1out;
6e50d963 2882 op_ad = 2;
1d9f512f 2883 OP_E (float_mem_mode[fp_indx], sizeflag);
252b5132
RH		 2884 return;
2885 }
6608db57 2886 /* Skip mod/rm byte. */
4bba6815 2887 MODRM_CHECK;
252b5132
RH		 2888 codep++;
2889
2890 dp = &float_reg[floatop - 0xd8][reg];
2891 if (dp->name == NULL)
2892 {
2893 putop (fgrps[dp->bytemode1][rm], sizeflag);
2894
6608db57 2895 /* Instruction fnstsw is only one with strange arg. */
252b5132
RH		 2896 if (floatop == 0xdf && codep[-1] == 0xe0)
2897 strcpy (op1out, names16[0]);
2898 }
2899 else
2900 {
2901 putop (dp->name, sizeflag);
2902
2903 obufp = op1out;
6e50d963 2904 op_ad = 2;
252b5132 2905 if (dp->op1)
6608db57 2906 (*dp->op1) (dp->bytemode1, sizeflag);
6e50d963 2907
252b5132 2908 obufp = op2out;
6e50d963 2909 op_ad = 1;
252b5132 2910 if (dp->op2)
6608db57 2911 (*dp->op2) (dp->bytemode2, sizeflag);
252b5132
RH		 2912 }
2913}
2914
252b5132 2915static void
26ca5450 2916OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 2917{
422673a9 2918 oappend ("%st" + intel_syntax);
252b5132
RH		 2919}
2920
252b5132 2921static void
26ca5450 2922OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 2923{
2924 sprintf (scratchbuf, "%%st(%d)", rm);
d708bcba 2925 oappend (scratchbuf + intel_syntax);
252b5132
RH		 2926}
2927
6608db57 2928/* Capital letters in template are macros. */
6439fc28 2929static int
26ca5450 2930putop (const char *template, int sizeflag)
252b5132 2931{
2da11e11 2932 const char *p;
9306ca4a 2933 int alt = 0;
252b5132
RH		 2934
2935 for (p = template; *p; p++)
2936 {
2937 switch (*p)
2938 {
2939 default:
2940 *obufp++ = *p;
2941 break;
6439fc28
AM		 2942 case '{':
2943 alt = 0;
2944 if (intel_syntax)
2945 alt += 1;
cb712a9e 2946 if (address_mode == mode_64bit)
6439fc28
AM		 2947 alt += 2;
2948 while (alt != 0)
2949 {
2950 while (*++p != '|')
2951 {
2952 if (*p == '}')
2953 {
2954 /* Alternative not valid. */
2955 strcpy (obuf, "(bad)");
2956 obufp = obuf + 5;
2957 return 1;
2958 }
2959 else if (*p == '\0')
2960 abort ();
2961 }
2962 alt--;
2963 }
9306ca4a
JB		 2964 /* Fall through. */
2965 case 'I':
2966 alt = 1;
2967 continue;
6439fc28
AM		 2968 case '|':
2969 while (*++p != '}')
2970 {
2971 if (*p == '\0')
2972 abort ();
2973 }
2974 break;
2975 case '}':
2976 break;
252b5132 2977 case 'A':
db6eb5be
AM		 2978 if (intel_syntax)
2979 break;
e396998b 2980 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132
RH		 2981 *obufp++ = 'b';
2982 break;
2983 case 'B':
db6eb5be
AM		 2984 if (intel_syntax)
2985 break;
252b5132
RH		 2986 if (sizeflag & SUFFIX_ALWAYS)
2987 *obufp++ = 'b';
252b5132 2988 break;
9306ca4a
JB		 2989 case 'C':
2990 if (intel_syntax && !alt)
2991 break;
2992 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
2993 {
2994 if (sizeflag & DFLAG)
2995 *obufp++ = intel_syntax ? 'd' : 'l';
2996 else
2997 *obufp++ = intel_syntax ? 'w' : 's';
2998 used_prefixes |= (prefixes & PREFIX_DATA);
2999 }
3000 break;
252b5132 3001 case 'E': /* For jcxz/jecxz */
cb712a9e 3002 if (address_mode == mode_64bit)
c1a64871
JH		 3003 {
3004 if (sizeflag & AFLAG)
3005 *obufp++ = 'r';
3006 else
3007 *obufp++ = 'e';
3008 }
3009 else
3010 if (sizeflag & AFLAG)
3011 *obufp++ = 'e';
3ffd33cf
AM		 3012 used_prefixes |= (prefixes & PREFIX_ADDR);
3013 break;
3014 case 'F':
db6eb5be
AM		 3015 if (intel_syntax)
3016 break;
e396998b 3017 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
3ffd33cf
AM		 3018 {
3019 if (sizeflag & AFLAG)
cb712a9e 3020 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
3ffd33cf 3021 else
cb712a9e 3022 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
3ffd33cf
AM		 3023 used_prefixes |= (prefixes & PREFIX_ADDR);
3024 }
252b5132 3025 break;
5dd0794d 3026 case 'H':
db6eb5be
AM		 3027 if (intel_syntax)
3028 break;
5dd0794d
AM		 3029 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
3030 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
3031 {
3032 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
3033 *obufp++ = ',';
3034 *obufp++ = 'p';
3035 if (prefixes & PREFIX_DS)
3036 *obufp++ = 't';
3037 else
3038 *obufp++ = 'n';
3039 }
3040 break;
9306ca4a
JB		 3041 case 'J':
3042 if (intel_syntax)
3043 break;
3044 *obufp++ = 'l';
3045 break;
6dd5059a
L		 3046 case 'Z':
3047 if (intel_syntax)
3048 break;
3049 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
3050 {
3051 *obufp++ = 'q';
3052 break;
3053 }
3054 /* Fall through. */
252b5132 3055 case 'L':
db6eb5be
AM		 3056 if (intel_syntax)
3057 break;
252b5132
RH		 3058 if (sizeflag & SUFFIX_ALWAYS)
3059 *obufp++ = 'l';
252b5132
RH		 3060 break;
3061 case 'N':
3062 if ((prefixes & PREFIX_FWAIT) == 0)
3063 *obufp++ = 'n';
7d421014
ILT		 3064 else
3065 used_prefixes |= PREFIX_FWAIT;
252b5132 3066 break;
52b15da3
JH		 3067 case 'O':
3068 USED_REX (REX_MODE64);
3069 if (rex & REX_MODE64)
6439fc28 3070 *obufp++ = 'o';
52b15da3
JH		 3071 else
3072 *obufp++ = 'd';
3073 break;
6439fc28 3074 case 'T':
db6eb5be
AM		 3075 if (intel_syntax)
3076 break;
cb712a9e 3077 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28
AM		 3078 {
3079 *obufp++ = 'q';
3080 break;
3081 }
6608db57 3082 /* Fall through. */
252b5132 3083 case 'P':
db6eb5be
AM		 3084 if (intel_syntax)
3085 break;
252b5132 3086 if ((prefixes & PREFIX_DATA)
52b15da3 3087 || (rex & REX_MODE64)
e396998b 3088 || (sizeflag & SUFFIX_ALWAYS))
252b5132 3089 {
52b15da3
JH		 3090 USED_REX (REX_MODE64);
3091 if (rex & REX_MODE64)
3092 *obufp++ = 'q';
c2419411 3093 else
52b15da3
JH		 3094 {
3095 if (sizeflag & DFLAG)
3096 *obufp++ = 'l';
3097 else
3098 *obufp++ = 'w';
52b15da3 3099 }
1a114b12 3100 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3101 }
3102 break;
6439fc28 3103 case 'U':
db6eb5be
AM		 3104 if (intel_syntax)
3105 break;
cb712a9e 3106 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28 3107 {
1a114b12
JB		 3108 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
3109 *obufp++ = 'q';
6439fc28
AM		 3110 break;
3111 }
6608db57 3112 /* Fall through. */
252b5132 3113 case 'Q':
9306ca4a 3114 if (intel_syntax && !alt)
db6eb5be 3115 break;
90530880 3116 USED_REX (REX_MODE64);
e396998b 3117 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132 3118 {
52b15da3
JH		 3119 if (rex & REX_MODE64)
3120 *obufp++ = 'q';
252b5132 3121 else
52b15da3
JH		 3122 {
3123 if (sizeflag & DFLAG)
9306ca4a 3124 *obufp++ = intel_syntax ? 'd' : 'l';
52b15da3
JH		 3125 else
3126 *obufp++ = 'w';
52b15da3 3127 }
1a114b12 3128 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3129 }
3130 break;
3131 case 'R':
52b15da3 3132 USED_REX (REX_MODE64);
db6eb5be 3133 if (intel_syntax)
c608c12e 3134 {
52b15da3
JH		 3135 if (rex & REX_MODE64)
3136 {
3137 *obufp++ = 'q';
3138 *obufp++ = 't';
3139 }
3140 else if (sizeflag & DFLAG)
c608c12e
AM		 3141 {
3142 *obufp++ = 'd';
3143 *obufp++ = 'q';
3144 }
3145 else
3146 {
3147 *obufp++ = 'w';
3148 *obufp++ = 'd';
3149 }
3150 }
252b5132 3151 else
c608c12e 3152 {
52b15da3
JH		 3153 if (rex & REX_MODE64)
3154 *obufp++ = 'q';
3155 else if (sizeflag & DFLAG)
c608c12e
AM		 3156 *obufp++ = 'l';
3157 else
3158 *obufp++ = 'w';
3159 }
52b15da3
JH		 3160 if (!(rex & REX_MODE64))
3161 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 3162 break;
1a114b12
JB		 3163 case 'V':
3164 if (intel_syntax)
3165 break;
cb712a9e 3166 if (address_mode == mode_64bit && (sizeflag & DFLAG))
1a114b12
JB		 3167 {
3168 if (sizeflag & SUFFIX_ALWAYS)
3169 *obufp++ = 'q';
3170 break;
3171 }
3172 /* Fall through. */
252b5132 3173 case 'S':
db6eb5be
AM		 3174 if (intel_syntax)
3175 break;
252b5132
RH		 3176 if (sizeflag & SUFFIX_ALWAYS)
3177 {
52b15da3
JH		 3178 if (rex & REX_MODE64)
3179 *obufp++ = 'q';
252b5132 3180 else
52b15da3
JH		 3181 {
3182 if (sizeflag & DFLAG)
3183 *obufp++ = 'l';
3184 else
3185 *obufp++ = 'w';
3186 used_prefixes |= (prefixes & PREFIX_DATA);
3187 }
252b5132 3188 }
252b5132 3189 break;
041bd2e0
JH		 3190 case 'X':
3191 if (prefixes & PREFIX_DATA)
3192 *obufp++ = 'd';
3193 else
3194 *obufp++ = 's';
db6eb5be 3195 used_prefixes |= (prefixes & PREFIX_DATA);
041bd2e0 3196 break;
76f227a5 3197 case 'Y':
db6eb5be
AM		 3198 if (intel_syntax)
3199 break;
76f227a5
JH		 3200 if (rex & REX_MODE64)
3201 {
3202 USED_REX (REX_MODE64);
3203 *obufp++ = 'q';
3204 }
3205 break;
52b15da3 3206 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
252b5132 3207 case 'W':
252b5132 3208 /* operand size flag for cwtl, cbtw */
52b15da3
JH		 3209 USED_REX (0);
3210 if (rex)
3211 *obufp++ = 'l';
3212 else if (sizeflag & DFLAG)
252b5132
RH		 3213 *obufp++ = 'w';
3214 else
3215 *obufp++ = 'b';
db6eb5be 3216 if (intel_syntax)
c608c12e 3217 {
52b15da3
JH		 3218 if (rex)
3219 {
3220 *obufp++ = 'q';
3221 *obufp++ = 'e';
3222 }
c608c12e
AM		 3223 if (sizeflag & DFLAG)
3224 {
3225 *obufp++ = 'd';
3226 *obufp++ = 'e';
3227 }
3228 else
3229 {
3230 *obufp++ = 'w';
3231 }
3232 }
52b15da3
JH		 3233 if (!rex)
3234 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3235 break;
3236 }
9306ca4a 3237 alt = 0;
252b5132
RH		 3238 }
3239 *obufp = 0;
6439fc28 3240 return 0;
252b5132
RH		 3241}
3242
3243static void
26ca5450 3244oappend (const char *s)
252b5132
RH		 3245{
3246 strcpy (obufp, s);
3247 obufp += strlen (s);
3248}
3249
3250static void
26ca5450 3251append_seg (void)
252b5132
RH		 3252{
3253 if (prefixes & PREFIX_CS)
7d421014 3254 {
7d421014 3255 used_prefixes |= PREFIX_CS;
d708bcba 3256 oappend ("%cs:" + intel_syntax);
7d421014 3257 }
252b5132 3258 if (prefixes & PREFIX_DS)
7d421014 3259 {
7d421014 3260 used_prefixes |= PREFIX_DS;
d708bcba 3261 oappend ("%ds:" + intel_syntax);
7d421014 3262 }
252b5132 3263 if (prefixes & PREFIX_SS)
7d421014 3264 {
7d421014 3265 used_prefixes |= PREFIX_SS;
d708bcba 3266 oappend ("%ss:" + intel_syntax);
7d421014 3267 }
252b5132 3268 if (prefixes & PREFIX_ES)
7d421014 3269 {
7d421014 3270 used_prefixes |= PREFIX_ES;
d708bcba 3271 oappend ("%es:" + intel_syntax);
7d421014 3272 }
252b5132 3273 if (prefixes & PREFIX_FS)
7d421014 3274 {
7d421014 3275 used_prefixes |= PREFIX_FS;
d708bcba 3276 oappend ("%fs:" + intel_syntax);
7d421014 3277 }
252b5132 3278 if (prefixes & PREFIX_GS)
7d421014 3279 {
7d421014 3280 used_prefixes |= PREFIX_GS;
d708bcba 3281 oappend ("%gs:" + intel_syntax);
7d421014 3282 }
252b5132
RH		 3283}
3284
3285static void
26ca5450 3286OP_indirE (int bytemode, int sizeflag)
252b5132
RH		 3287{
3288 if (!intel_syntax)
3289 oappend ("*");
3290 OP_E (bytemode, sizeflag);
3291}
3292
52b15da3 3293static void
26ca5450 3294print_operand_value (char *buf, int hex, bfd_vma disp)
52b15da3 3295{
cb712a9e 3296 if (address_mode == mode_64bit)
52b15da3
JH		 3297 {
3298 if (hex)
3299 {
3300 char tmp[30];
3301 int i;
3302 buf[0] = '0';
3303 buf[1] = 'x';
3304 sprintf_vma (tmp, disp);
6608db57 3305 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
52b15da3
JH		 3306 strcpy (buf + 2, tmp + i);
3307 }
3308 else
3309 {
3310 bfd_signed_vma v = disp;
3311 char tmp[30];
3312 int i;
3313 if (v < 0)
3314 {
3315 *(buf++) = '-';
3316 v = -disp;
6608db57 3317 /* Check for possible overflow on 0x8000000000000000. */
52b15da3
JH		 3318 if (v < 0)
3319 {
3320 strcpy (buf, "9223372036854775808");
3321 return;
3322 }
3323 }
3324 if (!v)
3325 {
3326 strcpy (buf, "0");
3327 return;
3328 }
3329
3330 i = 0;
3331 tmp[29] = 0;
3332 while (v)
3333 {
6608db57 3334 tmp[28 - i] = (v % 10) + '0';
52b15da3
JH		 3335 v /= 10;
3336 i++;
3337 }
3338 strcpy (buf, tmp + 29 - i);
3339 }
3340 }
3341 else
3342 {
3343 if (hex)
3344 sprintf (buf, "0x%x", (unsigned int) disp);
3345 else
3346 sprintf (buf, "%d", (int) disp);
3347 }
3348}
3349
3f31e633
JB		 3350static void
3351intel_operand_size (int bytemode, int sizeflag)
3352{
3353 switch (bytemode)
3354 {
3355 case b_mode:
3356 oappend ("BYTE PTR ");
3357 break;
3358 case w_mode:
3359 case dqw_mode:
3360 oappend ("WORD PTR ");
3361 break;
1a114b12 3362 case stack_v_mode:
cb712a9e 3363 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3f31e633
JB		 3364 {
3365 oappend ("QWORD PTR ");
3366 used_prefixes |= (prefixes & PREFIX_DATA);
3367 break;
3368 }
3369 /* FALLTHRU */
3370 case v_mode:
3371 case dq_mode:
3372 USED_REX (REX_MODE64);
3373 if (rex & REX_MODE64)
3374 oappend ("QWORD PTR ");
3375 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3376 oappend ("DWORD PTR ");
3377 else
3378 oappend ("WORD PTR ");
3379 used_prefixes |= (prefixes & PREFIX_DATA);
3380 break;
3381 case d_mode:
3382 oappend ("DWORD PTR ");
3383 break;
3384 case q_mode:
3385 oappend ("QWORD PTR ");
3386 break;
3387 case m_mode:
cb712a9e 3388 if (address_mode == mode_64bit)
3f31e633
JB		 3389 oappend ("QWORD PTR ");
3390 else
3391 oappend ("DWORD PTR ");
3392 break;
3393 case f_mode:
3394 if (sizeflag & DFLAG)
3395 oappend ("FWORD PTR ");
3396 else
3397 oappend ("DWORD PTR ");
3398 used_prefixes |= (prefixes & PREFIX_DATA);
3399 break;
3400 case t_mode:
3401 oappend ("TBYTE PTR ");
3402 break;
3403 case x_mode:
3404 oappend ("XMMWORD PTR ");
3405 break;
3406 default:
3407 break;
3408 }
3409}
3410
252b5132 3411static void
26ca5450 3412OP_E (int bytemode, int sizeflag)
252b5132 3413{
52b15da3
JH		 3414 bfd_vma disp;
3415 int add = 0;
3416 int riprel = 0;
3417 USED_REX (REX_EXTZ);
3418 if (rex & REX_EXTZ)
3419 add += 8;
252b5132 3420
6608db57 3421 /* Skip mod/rm byte. */
4bba6815 3422 MODRM_CHECK;
252b5132
RH		 3423 codep++;
3424
3425 if (mod == 3)
3426 {
3427 switch (bytemode)
3428 {
3429 case b_mode:
52b15da3
JH		 3430 USED_REX (0);
3431 if (rex)
3432 oappend (names8rex[rm + add]);
3433 else
3434 oappend (names8[rm + add]);
252b5132
RH		 3435 break;
3436 case w_mode:
52b15da3 3437 oappend (names16[rm + add]);
252b5132 3438 break;
2da11e11 3439 case d_mode:
52b15da3
JH		 3440 oappend (names32[rm + add]);
3441 break;
3442 case q_mode:
3443 oappend (names64[rm + add]);
3444 break;
3445 case m_mode:
cb712a9e 3446 if (address_mode == mode_64bit)
52b15da3
JH		 3447 oappend (names64[rm + add]);
3448 else
3449 oappend (names32[rm + add]);
2da11e11 3450 break;
1a114b12 3451 case stack_v_mode:
cb712a9e 3452 if (address_mode == mode_64bit && (sizeflag & DFLAG))
003519a7 3453 {
1a114b12 3454 oappend (names64[rm + add]);
003519a7 3455 used_prefixes |= (prefixes & PREFIX_DATA);
1a114b12 3456 break;
003519a7 3457 }
1a114b12
JB		 3458 bytemode = v_mode;
3459 /* FALLTHRU */
252b5132 3460 case v_mode:
db6eb5be 3461 case dq_mode:
9306ca4a 3462 case dqw_mode:
52b15da3
JH		 3463 USED_REX (REX_MODE64);
3464 if (rex & REX_MODE64)
3465 oappend (names64[rm + add]);
9306ca4a 3466 else if ((sizeflag & DFLAG) || bytemode != v_mode)
52b15da3 3467 oappend (names32[rm + add]);
252b5132 3468 else
52b15da3 3469 oappend (names16[rm + add]);
7d421014 3470 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 3471 break;
2da11e11 3472 case 0:
c608c12e 3473 break;
252b5132 3474 default:
c608c12e 3475 oappend (INTERNAL_DISASSEMBLER_ERROR);
252b5132
RH		 3476 break;
3477 }
3478 return;
3479 }
3480
3481 disp = 0;
3f31e633
JB		 3482 if (intel_syntax)
3483 intel_operand_size (bytemode, sizeflag);
252b5132
RH		 3484 append_seg ();
3485
cb712a9e 3486 if ((sizeflag & AFLAG) || address_mode == mode_64bit) /* 32 bit address mode */
252b5132
RH		 3487 {
3488 int havesib;
3489 int havebase;
3490 int base;
3491 int index = 0;
3492 int scale = 0;
3493
3494 havesib = 0;
3495 havebase = 1;
3496 base = rm;
3497
3498 if (base == 4)
3499 {
3500 havesib = 1;
3501 FETCH_DATA (the_info, codep + 1);
252b5132 3502 index = (*codep >> 3) & 7;
cb712a9e 3503 if (address_mode == mode_64bit || index != 0x4)
9df48ba9 3504 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
2033b4b9 3505 scale = (*codep >> 6) & 3;
252b5132 3506 base = *codep & 7;
52b15da3 3507 USED_REX (REX_EXTY);
52b15da3
JH		 3508 if (rex & REX_EXTY)
3509 index += 8;
252b5132
RH		 3510 codep++;
3511 }
2888cb7a 3512 base += add;
252b5132
RH		 3513
3514 switch (mod)
3515 {
3516 case 0:
52b15da3 3517 if ((base & 7) == 5)
252b5132
RH		 3518 {
3519 havebase = 0;
cb712a9e 3520 if (address_mode == mode_64bit && !havesib)
52b15da3
JH		 3521 riprel = 1;
3522 disp = get32s ();
252b5132
RH		 3523 }
3524 break;
3525 case 1:
3526 FETCH_DATA (the_info, codep + 1);
3527 disp = *codep++;
3528 if ((disp & 0x80) != 0)
3529 disp -= 0x100;
3530 break;
3531 case 2:
52b15da3 3532 disp = get32s ();
252b5132
RH		 3533 break;
3534 }
3535
3536 if (!intel_syntax)
db6eb5be
AM		 3537 if (mod != 0 || (base & 7) == 5)
3538 {
52b15da3 3539 print_operand_value (scratchbuf, !riprel, disp);
db6eb5be 3540 oappend (scratchbuf);
52b15da3
JH		 3541 if (riprel)
3542 {
3543 set_op (disp, 1);
3544 oappend ("(%rip)");
3545 }
db6eb5be 3546 }
2da11e11 3547
252b5132
RH		 3548 if (havebase || (havesib && (index != 4 || scale != 0)))
3549 {
252b5132 3550 *obufp++ = open_char;
52b15da3
JH		 3551 if (intel_syntax && riprel)
3552 oappend ("rip + ");
db6eb5be 3553 *obufp = '\0';
252b5132 3554 if (havebase)
cb712a9e 3555 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
c1a64871 3556 ? names64[base] : names32[base]);
252b5132
RH		 3557 if (havesib)
3558 {
3559 if (index != 4)
3560 {
9306ca4a 3561 if (!intel_syntax || havebase)
db6eb5be 3562 {
9306ca4a
JB		 3563 *obufp++ = separator_char;
3564 *obufp = '\0';
db6eb5be 3565 }
cb712a9e 3566 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
9306ca4a 3567 ? names64[index] : names32[index]);
252b5132 3568 }
a02a862a 3569 if (scale != 0 || (!intel_syntax && index != 4))
db6eb5be
AM		 3570 {
3571 *obufp++ = scale_char;
3572 *obufp = '\0';
3573 sprintf (scratchbuf, "%d", 1 << scale);
3574 oappend (scratchbuf);
3575 }
252b5132 3576 }
3d456fa1
JB		 3577 if (intel_syntax && disp)
3578 {
3579 if ((bfd_signed_vma) disp > 0)
3580 {
3581 *obufp++ = '+';
3582 *obufp = '\0';
3583 }
3584 else if (mod != 1)
3585 {
3586 *obufp++ = '-';
3587 *obufp = '\0';
3588 disp = - (bfd_signed_vma) disp;
3589 }
3590
3591 print_operand_value (scratchbuf, mod != 1, disp);
3592 oappend (scratchbuf);
3593 }
252b5132
RH		 3594
3595 *obufp++ = close_char;
db6eb5be 3596 *obufp = '\0';
252b5132
RH		 3597 }
3598 else if (intel_syntax)
db6eb5be
AM		 3599 {
3600 if (mod != 0 || (base & 7) == 5)
3601 {
252b5132
RH		 3602 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3603 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3604 ;
3605 else
3606 {
d708bcba 3607 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 3608 oappend (":");
3609 }
52b15da3 3610 print_operand_value (scratchbuf, 1, disp);
db6eb5be
AM		 3611 oappend (scratchbuf);
3612 }
3613 }
252b5132
RH		 3614 }
3615 else
3616 { /* 16 bit address mode */
3617 switch (mod)
3618 {
3619 case 0:
2888cb7a 3620 if (rm == 6)
252b5132
RH		 3621 {
3622 disp = get16 ();
3623 if ((disp & 0x8000) != 0)
3624 disp -= 0x10000;
3625 }
3626 break;
3627 case 1:
3628 FETCH_DATA (the_info, codep + 1);
3629 disp = *codep++;
3630 if ((disp & 0x80) != 0)
3631 disp -= 0x100;
3632 break;
3633 case 2:
3634 disp = get16 ();
3635 if ((disp & 0x8000) != 0)
3636 disp -= 0x10000;
3637 break;
3638 }
3639
3640 if (!intel_syntax)
2888cb7a 3641 if (mod != 0 || rm == 6)
db6eb5be 3642 {
52b15da3 3643 print_operand_value (scratchbuf, 0, disp);
db6eb5be
AM		 3644 oappend (scratchbuf);
3645 }
252b5132 3646
2888cb7a 3647 if (mod != 0 || rm != 6)
252b5132
RH		 3648 {
3649 *obufp++ = open_char;
db6eb5be 3650 *obufp = '\0';
3d456fa1
JB		 3651 oappend (index16[rm]);
3652 if (intel_syntax && disp)
3653 {
3654 if ((bfd_signed_vma) disp > 0)
3655 {
3656 *obufp++ = '+';
3657 *obufp = '\0';
3658 }
3659 else if (mod != 1)
3660 {
3661 *obufp++ = '-';
3662 *obufp = '\0';
3663 disp = - (bfd_signed_vma) disp;
3664 }
3665
3666 print_operand_value (scratchbuf, mod != 1, disp);
3667 oappend (scratchbuf);
3668 }
3669
db6eb5be
AM		 3670 *obufp++ = close_char;
3671 *obufp = '\0';
252b5132 3672 }
3d456fa1
JB		 3673 else if (intel_syntax)
3674 {
3675 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3676 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3677 ;
3678 else
3679 {
3680 oappend (names_seg[ds_reg - es_reg]);
3681 oappend (":");
3682 }
3683 print_operand_value (scratchbuf, 1, disp & 0xffff);
3684 oappend (scratchbuf);
3685 }
252b5132
RH		 3686 }
3687}
3688
252b5132 3689static void
26ca5450 3690OP_G (int bytemode, int sizeflag)
252b5132 3691{
52b15da3
JH		 3692 int add = 0;
3693 USED_REX (REX_EXTX);
3694 if (rex & REX_EXTX)
3695 add += 8;
252b5132
RH		 3696 switch (bytemode)
3697 {
3698 case b_mode:
52b15da3
JH		 3699 USED_REX (0);
3700 if (rex)
3701 oappend (names8rex[reg + add]);
3702 else
3703 oappend (names8[reg + add]);
252b5132
RH		 3704 break;
3705 case w_mode:
52b15da3 3706 oappend (names16[reg + add]);
252b5132
RH		 3707 break;
3708 case d_mode:
52b15da3
JH		 3709 oappend (names32[reg + add]);
3710 break;
3711 case q_mode:
3712 oappend (names64[reg + add]);
252b5132
RH		 3713 break;
3714 case v_mode:
9306ca4a
JB		 3715 case dq_mode:
3716 case dqw_mode:
52b15da3
JH		 3717 USED_REX (REX_MODE64);
3718 if (rex & REX_MODE64)
3719 oappend (names64[reg + add]);
9306ca4a 3720 else if ((sizeflag & DFLAG) || bytemode != v_mode)
52b15da3 3721 oappend (names32[reg + add]);
252b5132 3722 else
52b15da3 3723 oappend (names16[reg + add]);
7d421014 3724 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 3725 break;
90700ea2 3726 case m_mode:
cb712a9e 3727 if (address_mode == mode_64bit)
90700ea2
L		 3728 oappend (names64[reg + add]);
3729 else
3730 oappend (names32[reg + add]);
3731 break;
252b5132
RH		 3732 default:
3733 oappend (INTERNAL_DISASSEMBLER_ERROR);
3734 break;
3735 }
3736}
3737
52b15da3 3738static bfd_vma
26ca5450 3739get64 (void)
52b15da3 3740{
5dd0794d 3741 bfd_vma x;
52b15da3 3742#ifdef BFD64
5dd0794d
AM		 3743 unsigned int a;
3744 unsigned int b;
3745
52b15da3
JH		 3746 FETCH_DATA (the_info, codep + 8);
3747 a = *codep++ & 0xff;
3748 a |= (*codep++ & 0xff) << 8;
3749 a |= (*codep++ & 0xff) << 16;
3750 a |= (*codep++ & 0xff) << 24;
5dd0794d 3751 b = *codep++ & 0xff;
52b15da3
JH		 3752 b |= (*codep++ & 0xff) << 8;
3753 b |= (*codep++ & 0xff) << 16;
3754 b |= (*codep++ & 0xff) << 24;
3755 x = a + ((bfd_vma) b << 32);
3756#else
6608db57 3757 abort ();
5dd0794d 3758 x = 0;
52b15da3
JH		 3759#endif
3760 return x;
3761}
3762
3763static bfd_signed_vma
26ca5450 3764get32 (void)
252b5132 3765{
52b15da3 3766 bfd_signed_vma x = 0;
252b5132
RH		 3767
3768 FETCH_DATA (the_info, codep + 4);
52b15da3
JH		 3769 x = *codep++ & (bfd_signed_vma) 0xff;
3770 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3771 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3772 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3773 return x;
3774}
3775
3776static bfd_signed_vma
26ca5450 3777get32s (void)
52b15da3
JH		 3778{
3779 bfd_signed_vma x = 0;
3780
3781 FETCH_DATA (the_info, codep + 4);
3782 x = *codep++ & (bfd_signed_vma) 0xff;
3783 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3784 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3785 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3786
3787 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3788
252b5132
RH		 3789 return x;
3790}
3791
3792static int
26ca5450 3793get16 (void)
252b5132
RH		 3794{
3795 int x = 0;
3796
3797 FETCH_DATA (the_info, codep + 2);
3798 x = *codep++ & 0xff;
3799 x |= (*codep++ & 0xff) << 8;
3800 return x;
3801}
3802
3803static void
26ca5450 3804set_op (bfd_vma op, int riprel)
252b5132
RH		 3805{
3806 op_index[op_ad] = op_ad;
cb712a9e 3807 if (address_mode == mode_64bit)
7081ff04
AJ		 3808 {
3809 op_address[op_ad] = op;
3810 op_riprel[op_ad] = riprel;
3811 }
3812 else
3813 {
3814 /* Mask to get a 32-bit address. */
3815 op_address[op_ad] = op & 0xffffffff;
3816 op_riprel[op_ad] = riprel & 0xffffffff;
3817 }
252b5132
RH		 3818}
3819
3820static void
26ca5450 3821OP_REG (int code, int sizeflag)
252b5132 3822{
2da11e11 3823 const char *s;
52b15da3
JH		 3824 int add = 0;
3825 USED_REX (REX_EXTZ);
3826 if (rex & REX_EXTZ)
3827 add = 8;
3828
3829 switch (code)
3830 {
3831 case indir_dx_reg:
d708bcba 3832 if (intel_syntax)
db6eb5be 3833 s = "[dx]";
d708bcba 3834 else
db6eb5be 3835 s = "(%dx)";
52b15da3
JH		 3836 break;
3837 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3838 case sp_reg: case bp_reg: case si_reg: case di_reg:
3839 s = names16[code - ax_reg + add];
3840 break;
3841 case es_reg: case ss_reg: case cs_reg:
3842 case ds_reg: case fs_reg: case gs_reg:
3843 s = names_seg[code - es_reg + add];
3844 break;
3845 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3846 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3847 USED_REX (0);
3848 if (rex)
3849 s = names8rex[code - al_reg + add];
3850 else
3851 s = names8[code - al_reg];
3852 break;
6439fc28
AM		 3853 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3854 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
cb712a9e 3855 if (address_mode == mode_64bit && (sizeflag & DFLAG))
6439fc28
AM		 3856 {
3857 s = names64[code - rAX_reg + add];
3858 break;
3859 }
3860 code += eAX_reg - rAX_reg;
6608db57 3861 /* Fall through. */
52b15da3
JH		 3862 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3863 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3864 USED_REX (REX_MODE64);
3865 if (rex & REX_MODE64)
3866 s = names64[code - eAX_reg + add];
3867 else if (sizeflag & DFLAG)
3868 s = names32[code - eAX_reg + add];
3869 else
3870 s = names16[code - eAX_reg + add];
3871 used_prefixes |= (prefixes & PREFIX_DATA);
3872 break;
52b15da3
JH		 3873 default:
3874 s = INTERNAL_DISASSEMBLER_ERROR;
3875 break;
3876 }
3877 oappend (s);
3878}
3879
3880static void
26ca5450 3881OP_IMREG (int code, int sizeflag)
52b15da3
JH		 3882{
3883 const char *s;
252b5132
RH		 3884
3885 switch (code)
3886 {
3887 case indir_dx_reg:
d708bcba 3888 if (intel_syntax)
db6eb5be 3889 s = "[dx]";
d708bcba 3890 else
db6eb5be 3891 s = "(%dx)";
252b5132
RH		 3892 break;
3893 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3894 case sp_reg: case bp_reg: case si_reg: case di_reg:
3895 s = names16[code - ax_reg];
3896 break;
3897 case es_reg: case ss_reg: case cs_reg:
3898 case ds_reg: case fs_reg: case gs_reg:
3899 s = names_seg[code - es_reg];
3900 break;
3901 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3902 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
52b15da3
JH		 3903 USED_REX (0);
3904 if (rex)
3905 s = names8rex[code - al_reg];
3906 else
3907 s = names8[code - al_reg];
252b5132
RH		 3908 break;
3909 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3910 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
52b15da3
JH		 3911 USED_REX (REX_MODE64);
3912 if (rex & REX_MODE64)
3913 s = names64[code - eAX_reg];
3914 else if (sizeflag & DFLAG)
252b5132
RH		 3915 s = names32[code - eAX_reg];
3916 else
3917 s = names16[code - eAX_reg];
7d421014 3918 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3919 break;
3920 default:
3921 s = INTERNAL_DISASSEMBLER_ERROR;
3922 break;
3923 }
3924 oappend (s);
3925}
3926
3927static void
26ca5450 3928OP_I (int bytemode, int sizeflag)
252b5132 3929{
52b15da3
JH		 3930 bfd_signed_vma op;
3931 bfd_signed_vma mask = -1;
252b5132
RH		 3932
3933 switch (bytemode)
3934 {
3935 case b_mode:
3936 FETCH_DATA (the_info, codep + 1);
52b15da3
JH		 3937 op = *codep++;
3938 mask = 0xff;
3939 break;
3940 case q_mode:
cb712a9e 3941 if (address_mode == mode_64bit)
6439fc28
AM		 3942 {
3943 op = get32s ();
3944 break;
3945 }
6608db57 3946 /* Fall through. */
252b5132 3947 case v_mode:
52b15da3
JH		 3948 USED_REX (REX_MODE64);
3949 if (rex & REX_MODE64)
3950 op = get32s ();
3951 else if (sizeflag & DFLAG)
3952 {
3953 op = get32 ();
3954 mask = 0xffffffff;
3955 }
252b5132 3956 else
52b15da3
JH		 3957 {
3958 op = get16 ();
3959 mask = 0xfffff;
3960 }
7d421014 3961 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3962 break;
3963 case w_mode:
52b15da3 3964 mask = 0xfffff;
252b5132
RH		 3965 op = get16 ();
3966 break;
9306ca4a
JB		 3967 case const_1_mode:
3968 if (intel_syntax)
3969 oappend ("1");
3970 return;
252b5132
RH		 3971 default:
3972 oappend (INTERNAL_DISASSEMBLER_ERROR);
3973 return;
3974 }
3975
52b15da3
JH		 3976 op &= mask;
3977 scratchbuf[0] = '$';
d708bcba
AM		 3978 print_operand_value (scratchbuf + 1, 1, op);
3979 oappend (scratchbuf + intel_syntax);
52b15da3
JH		 3980 scratchbuf[0] = '\0';
3981}
3982
3983static void
26ca5450 3984OP_I64 (int bytemode, int sizeflag)
52b15da3
JH		 3985{
3986 bfd_signed_vma op;
3987 bfd_signed_vma mask = -1;
3988
cb712a9e 3989 if (address_mode != mode_64bit)
6439fc28
AM		 3990 {
3991 OP_I (bytemode, sizeflag);
3992 return;
3993 }
3994
52b15da3
JH		 3995 switch (bytemode)
3996 {
3997 case b_mode:
3998 FETCH_DATA (the_info, codep + 1);
3999 op = *codep++;
4000 mask = 0xff;
4001 break;
4002 case v_mode:
4003 USED_REX (REX_MODE64);
4004 if (rex & REX_MODE64)
4005 op = get64 ();
4006 else if (sizeflag & DFLAG)
4007 {
4008 op = get32 ();
4009 mask = 0xffffffff;
4010 }
4011 else
4012 {
4013 op = get16 ();
4014 mask = 0xfffff;
4015 }
4016 used_prefixes |= (prefixes & PREFIX_DATA);
4017 break;
4018 case w_mode:
4019 mask = 0xfffff;
4020 op = get16 ();
4021 break;
4022 default:
4023 oappend (INTERNAL_DISASSEMBLER_ERROR);
4024 return;
4025 }
4026
4027 op &= mask;
4028 scratchbuf[0] = '$';
d708bcba
AM		 4029 print_operand_value (scratchbuf + 1, 1, op);
4030 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4031 scratchbuf[0] = '\0';
4032}
4033
4034static void
26ca5450 4035OP_sI (int bytemode, int sizeflag)
252b5132 4036{
52b15da3
JH		 4037 bfd_signed_vma op;
4038 bfd_signed_vma mask = -1;
252b5132
RH		 4039
4040 switch (bytemode)
4041 {
4042 case b_mode:
4043 FETCH_DATA (the_info, codep + 1);
4044 op = *codep++;
4045 if ((op & 0x80) != 0)
4046 op -= 0x100;
52b15da3 4047 mask = 0xffffffff;
252b5132
RH		 4048 break;
4049 case v_mode:
52b15da3
JH		 4050 USED_REX (REX_MODE64);
4051 if (rex & REX_MODE64)
4052 op = get32s ();
4053 else if (sizeflag & DFLAG)
4054 {
4055 op = get32s ();
4056 mask = 0xffffffff;
4057 }
252b5132
RH		 4058 else
4059 {
52b15da3 4060 mask = 0xffffffff;
6608db57 4061 op = get16 ();
252b5132
RH		 4062 if ((op & 0x8000) != 0)
4063 op -= 0x10000;
4064 }
7d421014 4065 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4066 break;
4067 case w_mode:
4068 op = get16 ();
52b15da3 4069 mask = 0xffffffff;
252b5132
RH		 4070 if ((op & 0x8000) != 0)
4071 op -= 0x10000;
4072 break;
4073 default:
4074 oappend (INTERNAL_DISASSEMBLER_ERROR);
4075 return;
4076 }
52b15da3
JH		 4077
4078 scratchbuf[0] = '$';
4079 print_operand_value (scratchbuf + 1, 1, op);
d708bcba 4080 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4081}
4082
4083static void
26ca5450 4084OP_J (int bytemode, int sizeflag)
252b5132 4085{
52b15da3 4086 bfd_vma disp;
7081ff04 4087 bfd_vma mask = -1;
252b5132
RH		 4088
4089 switch (bytemode)
4090 {
4091 case b_mode:
4092 FETCH_DATA (the_info, codep + 1);
4093 disp = *codep++;
4094 if ((disp & 0x80) != 0)
4095 disp -= 0x100;
4096 break;
4097 case v_mode:
1a114b12 4098 if ((sizeflag & DFLAG) || (rex & REX_MODE64))
52b15da3 4099 disp = get32s ();
252b5132
RH		 4100 else
4101 {
4102 disp = get16 ();
6608db57 4103 /* For some reason, a data16 prefix on a jump instruction
252b5132
RH		 4104 means that the pc is masked to 16 bits after the
4105 displacement is added! */
4106 mask = 0xffff;
4107 }
4108 break;
4109 default:
4110 oappend (INTERNAL_DISASSEMBLER_ERROR);
4111 return;
4112 }
4113 disp = (start_pc + codep - start_codep + disp) & mask;
52b15da3
JH		 4114 set_op (disp, 0);
4115 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 4116 oappend (scratchbuf);
4117}
4118
252b5132 4119static void
26ca5450 4120OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4121{
d708bcba 4122 oappend (names_seg[reg]);
252b5132
RH		 4123}
4124
4125static void
26ca5450 4126OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
252b5132
RH		 4127{
4128 int seg, offset;
4129
c608c12e 4130 if (sizeflag & DFLAG)
252b5132 4131 {
c608c12e
AM		 4132 offset = get32 ();
4133 seg = get16 ();
252b5132 4134 }
c608c12e
AM		 4135 else
4136 {
4137 offset = get16 ();
4138 seg = get16 ();
4139 }
7d421014 4140 used_prefixes |= (prefixes & PREFIX_DATA);
d708bcba 4141 if (intel_syntax)
3f31e633 4142 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
d708bcba
AM		 4143 else
4144 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
c608c12e 4145 oappend (scratchbuf);
252b5132
RH		 4146}
4147
252b5132 4148static void
3f31e633 4149OP_OFF (int bytemode, int sizeflag)
252b5132 4150{
52b15da3 4151 bfd_vma off;
252b5132 4152
3f31e633
JB		 4153 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
4154 intel_operand_size (bytemode, sizeflag);
252b5132
RH		 4155 append_seg ();
4156
cb712a9e 4157 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
252b5132
RH		 4158 off = get32 ();
4159 else
4160 off = get16 ();
4161
4162 if (intel_syntax)
4163 {
4164 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 4165 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
252b5132 4166 {
d708bcba 4167 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 4168 oappend (":");
4169 }
4170 }
52b15da3
JH		 4171 print_operand_value (scratchbuf, 1, off);
4172 oappend (scratchbuf);
4173}
6439fc28 4174
52b15da3 4175static void
3f31e633 4176OP_OFF64 (int bytemode, int sizeflag)
52b15da3
JH		 4177{
4178 bfd_vma off;
4179
cb712a9e 4180 if (address_mode != mode_64bit)
6439fc28
AM		 4181 {
4182 OP_OFF (bytemode, sizeflag);
4183 return;
4184 }
4185
3f31e633
JB		 4186 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
4187 intel_operand_size (bytemode, sizeflag);
52b15da3
JH		 4188 append_seg ();
4189
6608db57 4190 off = get64 ();
52b15da3
JH		 4191
4192 if (intel_syntax)
4193 {
4194 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
db6eb5be 4195 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
52b15da3 4196 {
d708bcba 4197 oappend (names_seg[ds_reg - es_reg]);
52b15da3
JH		 4198 oappend (":");
4199 }
4200 }
4201 print_operand_value (scratchbuf, 1, off);
252b5132
RH		 4202 oappend (scratchbuf);
4203}
4204
4205static void
26ca5450 4206ptr_reg (int code, int sizeflag)
252b5132 4207{
2da11e11 4208 const char *s;
d708bcba 4209
1d9f512f 4210 *obufp++ = open_char;
20f0a1fc 4211 used_prefixes |= (prefixes & PREFIX_ADDR);
cb712a9e 4212 if (address_mode == mode_64bit)
c1a64871
JH		 4213 {
4214 if (!(sizeflag & AFLAG))
db6eb5be 4215 s = names32[code - eAX_reg];
c1a64871 4216 else
db6eb5be 4217 s = names64[code - eAX_reg];
c1a64871 4218 }
52b15da3 4219 else if (sizeflag & AFLAG)
252b5132
RH		 4220 s = names32[code - eAX_reg];
4221 else
4222 s = names16[code - eAX_reg];
4223 oappend (s);
1d9f512f
AM		 4224 *obufp++ = close_char;
4225 *obufp = 0;
252b5132
RH		 4226}
4227
4228static void
26ca5450 4229OP_ESreg (int code, int sizeflag)
252b5132 4230{
9306ca4a 4231 if (intel_syntax)
3f31e633 4232 intel_operand_size (codep[-1] & 1 ? v_mode : b_mode, sizeflag);
d708bcba 4233 oappend ("%es:" + intel_syntax);
252b5132
RH		 4234 ptr_reg (code, sizeflag);
4235}
4236
4237static void
26ca5450 4238OP_DSreg (int code, int sizeflag)
252b5132 4239{
9306ca4a 4240 if (intel_syntax)
3f31e633
JB		 4241 intel_operand_size (codep[-1] != 0xd7 && (codep[-1] & 1)
4242 ? v_mode
4243 : b_mode,
4244 sizeflag);
252b5132
RH		 4245 if ((prefixes
4246 & (PREFIX_CS
4247 | PREFIX_DS
4248 | PREFIX_SS
4249 | PREFIX_ES
4250 | PREFIX_FS
4251 | PREFIX_GS)) == 0)
4252 prefixes |= PREFIX_DS;
6608db57 4253 append_seg ();
252b5132
RH		 4254 ptr_reg (code, sizeflag);
4255}
4256
252b5132 4257static void
26ca5450 4258OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4259{
52b15da3 4260 int add = 0;
52b15da3 4261 if (rex & REX_EXTX)
c4a530c5
JB		 4262 {
4263 USED_REX (REX_EXTX);
4264 add = 8;
4265 }
cb712a9e 4266 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
c4a530c5
JB		 4267 {
4268 used_prefixes |= PREFIX_LOCK;
4269 add = 8;
4270 }
d708bcba
AM		 4271 sprintf (scratchbuf, "%%cr%d", reg + add);
4272 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4273}
4274
252b5132 4275static void
26ca5450 4276OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4277{
52b15da3
JH		 4278 int add = 0;
4279 USED_REX (REX_EXTX);
4280 if (rex & REX_EXTX)
4281 add = 8;
d708bcba 4282 if (intel_syntax)
6608db57 4283 sprintf (scratchbuf, "db%d", reg + add);
d708bcba 4284 else
6608db57 4285 sprintf (scratchbuf, "%%db%d", reg + add);
252b5132
RH		 4286 oappend (scratchbuf);
4287}
4288
252b5132 4289static void
26ca5450 4290OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4291{
252b5132 4292 sprintf (scratchbuf, "%%tr%d", reg);
d708bcba 4293 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4294}
4295
4296static void
26ca5450 4297OP_Rd (int bytemode, int sizeflag)
252b5132 4298{
2da11e11
AM		 4299 if (mod == 3)
4300 OP_E (bytemode, sizeflag);
4301 else
6608db57 4302 BadOp ();
252b5132
RH		 4303}
4304
4305static void
26ca5450 4306OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132 4307{
041bd2e0
JH		 4308 used_prefixes |= (prefixes & PREFIX_DATA);
4309 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 4310 {
4311 int add = 0;
4312 USED_REX (REX_EXTX);
4313 if (rex & REX_EXTX)
4314 add = 8;
4315 sprintf (scratchbuf, "%%xmm%d", reg + add);
4316 }
041bd2e0 4317 else
20f0a1fc 4318 sprintf (scratchbuf, "%%mm%d", reg);
d708bcba 4319 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4320}
4321
c608c12e 4322static void
26ca5450 4323OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e 4324{
041bd2e0
JH		 4325 int add = 0;
4326 USED_REX (REX_EXTX);
4327 if (rex & REX_EXTX)
4328 add = 8;
4329 sprintf (scratchbuf, "%%xmm%d", reg + add);
d708bcba 4330 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 4331}
4332
252b5132 4333static void
26ca5450 4334OP_EM (int bytemode, int sizeflag)
252b5132
RH		 4335{
4336 if (mod != 3)
4337 {
9306ca4a
JB		 4338 if (intel_syntax && bytemode == v_mode)
4339 {
4340 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4341 used_prefixes |= (prefixes & PREFIX_DATA);
4342 }
252b5132
RH		 4343 OP_E (bytemode, sizeflag);
4344 return;
4345 }
4346
6608db57 4347 /* Skip mod/rm byte. */
4bba6815 4348 MODRM_CHECK;
252b5132 4349 codep++;
041bd2e0
JH		 4350 used_prefixes |= (prefixes & PREFIX_DATA);
4351 if (prefixes & PREFIX_DATA)
20f0a1fc
NC		 4352 {
4353 int add = 0;
4354
4355 USED_REX (REX_EXTZ);
4356 if (rex & REX_EXTZ)
4357 add = 8;
4358 sprintf (scratchbuf, "%%xmm%d", rm + add);
4359 }
041bd2e0 4360 else
20f0a1fc 4361 sprintf (scratchbuf, "%%mm%d", rm);
d708bcba 4362 oappend (scratchbuf + intel_syntax);
252b5132
RH		 4363}
4364
c608c12e 4365static void
26ca5450 4366OP_EX (int bytemode, int sizeflag)
c608c12e 4367{
041bd2e0 4368 int add = 0;
c608c12e
AM		 4369 if (mod != 3)
4370 {
9306ca4a
JB		 4371 if (intel_syntax && bytemode == v_mode)
4372 {
4373 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
4374 {
4375 case 0: bytemode = x_mode; break;
4376 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
4377 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
4378 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
4379 default: bytemode = 0; break;
4380 }
4381 }
c608c12e
AM		 4382 OP_E (bytemode, sizeflag);
4383 return;
4384 }
041bd2e0
JH		 4385 USED_REX (REX_EXTZ);
4386 if (rex & REX_EXTZ)
4387 add = 8;
c608c12e 4388
6608db57 4389 /* Skip mod/rm byte. */
4bba6815 4390 MODRM_CHECK;
c608c12e 4391 codep++;
041bd2e0 4392 sprintf (scratchbuf, "%%xmm%d", rm + add);
d708bcba 4393 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 4394}
4395
252b5132 4396static void
26ca5450 4397OP_MS (int bytemode, int sizeflag)
252b5132 4398{
2da11e11
AM		 4399 if (mod == 3)
4400 OP_EM (bytemode, sizeflag);
4401 else
6608db57 4402 BadOp ();
252b5132
RH		 4403}
4404
992aaec9 4405static void
26ca5450 4406OP_XS (int bytemode, int sizeflag)
992aaec9
AM		 4407{
4408 if (mod == 3)
4409 OP_EX (bytemode, sizeflag);
4410 else
6608db57 4411 BadOp ();
992aaec9
AM		 4412}
4413
cc0ec051
AM		 4414static void
4415OP_M (int bytemode, int sizeflag)
4416{
4417 if (mod == 3)
4418 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4419 else
4420 OP_E (bytemode, sizeflag);
4421}
4422
4423static void
4424OP_0f07 (int bytemode, int sizeflag)
4425{
4426 if (mod != 3 || rm != 0)
4427 BadOp ();
4428 else
4429 OP_E (bytemode, sizeflag);
4430}
4431
4432static void
4433OP_0fae (int bytemode, int sizeflag)
4434{
4435 if (mod == 3)
4436 {
4437 if (reg == 7)
4438 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
4439
4440 if (reg < 5 || rm != 0)
4441 {
4442 BadOp (); /* bad sfence, mfence, or lfence */
4443 return;
4444 }
4445 }
4446 else if (reg != 7)
4447 {
4448 BadOp (); /* bad clflush */
4449 return;
4450 }
4451
4452 OP_E (bytemode, sizeflag);
4453}
4454
46e883c5
L		 4455/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
4456 32bit mode and "xchg %rax,%rax" in 64bit mode. NOP with REPZ prefix
4457 is called PAUSE. We display "xchg %ax,%ax" instead of "data16 nop".
4458 */
4459
cc0ec051 4460static void
46e883c5 4461NOP_Fixup1 (int bytemode, int sizeflag)
cc0ec051 4462{
cc0ec051
AM		 4463 if (prefixes == PREFIX_REPZ)
4464 strcpy (obuf, "pause");
46e883c5
L		 4465 else if (prefixes == PREFIX_DATA
4466 || ((rex & REX_MODE64) && rex != 0x48))
4467 OP_REG (bytemode, sizeflag);
4468 else
4469 strcpy (obuf, "nop");
4470}
4471
4472static void
4473NOP_Fixup2 (int bytemode, int sizeflag)
4474{
4475 if (prefixes == PREFIX_DATA
4476 || ((rex & REX_MODE64) && rex != 0x48))
4477 OP_IMREG (bytemode, sizeflag);
cc0ec051
AM		 4478}
4479
84037f8c 4480static const char *const Suffix3DNow[] = {
252b5132
RH		 4481/* 00 */ NULL, NULL, NULL, NULL,
4482/* 04 */ NULL, NULL, NULL, NULL,
4483/* 08 */ NULL, NULL, NULL, NULL,
9e525108 4484/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
252b5132
RH		 4485/* 10 */ NULL, NULL, NULL, NULL,
4486/* 14 */ NULL, NULL, NULL, NULL,
4487/* 18 */ NULL, NULL, NULL, NULL,
9e525108 4488/* 1C */ "pf2iw", "pf2id", NULL, NULL,
252b5132
RH		 4489/* 20 */ NULL, NULL, NULL, NULL,
4490/* 24 */ NULL, NULL, NULL, NULL,
4491/* 28 */ NULL, NULL, NULL, NULL,
4492/* 2C */ NULL, NULL, NULL, NULL,
4493/* 30 */ NULL, NULL, NULL, NULL,
4494/* 34 */ NULL, NULL, NULL, NULL,
4495/* 38 */ NULL, NULL, NULL, NULL,
4496/* 3C */ NULL, NULL, NULL, NULL,
4497/* 40 */ NULL, NULL, NULL, NULL,
4498/* 44 */ NULL, NULL, NULL, NULL,
4499/* 48 */ NULL, NULL, NULL, NULL,
4500/* 4C */ NULL, NULL, NULL, NULL,
4501/* 50 */ NULL, NULL, NULL, NULL,
4502/* 54 */ NULL, NULL, NULL, NULL,
4503/* 58 */ NULL, NULL, NULL, NULL,
4504/* 5C */ NULL, NULL, NULL, NULL,
4505/* 60 */ NULL, NULL, NULL, NULL,
4506/* 64 */ NULL, NULL, NULL, NULL,
4507/* 68 */ NULL, NULL, NULL, NULL,
4508/* 6C */ NULL, NULL, NULL, NULL,
4509/* 70 */ NULL, NULL, NULL, NULL,
4510/* 74 */ NULL, NULL, NULL, NULL,
4511/* 78 */ NULL, NULL, NULL, NULL,
4512/* 7C */ NULL, NULL, NULL, NULL,
4513/* 80 */ NULL, NULL, NULL, NULL,
4514/* 84 */ NULL, NULL, NULL, NULL,
9e525108
AM		 4515/* 88 */ NULL, NULL, "pfnacc", NULL,
4516/* 8C */ NULL, NULL, "pfpnacc", NULL,
252b5132
RH		 4517/* 90 */ "pfcmpge", NULL, NULL, NULL,
4518/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4519/* 98 */ NULL, NULL, "pfsub", NULL,
4520/* 9C */ NULL, NULL, "pfadd", NULL,
4521/* A0 */ "pfcmpgt", NULL, NULL, NULL,
4522/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4523/* A8 */ NULL, NULL, "pfsubr", NULL,
4524/* AC */ NULL, NULL, "pfacc", NULL,
4525/* B0 */ "pfcmpeq", NULL, NULL, NULL,
4526/* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
9e525108 4527/* B8 */ NULL, NULL, NULL, "pswapd",
252b5132
RH		 4528/* BC */ NULL, NULL, NULL, "pavgusb",
4529/* C0 */ NULL, NULL, NULL, NULL,
4530/* C4 */ NULL, NULL, NULL, NULL,
4531/* C8 */ NULL, NULL, NULL, NULL,
4532/* CC */ NULL, NULL, NULL, NULL,
4533/* D0 */ NULL, NULL, NULL, NULL,
4534/* D4 */ NULL, NULL, NULL, NULL,
4535/* D8 */ NULL, NULL, NULL, NULL,
4536/* DC */ NULL, NULL, NULL, NULL,
4537/* E0 */ NULL, NULL, NULL, NULL,
4538/* E4 */ NULL, NULL, NULL, NULL,
4539/* E8 */ NULL, NULL, NULL, NULL,
4540/* EC */ NULL, NULL, NULL, NULL,
4541/* F0 */ NULL, NULL, NULL, NULL,
4542/* F4 */ NULL, NULL, NULL, NULL,
4543/* F8 */ NULL, NULL, NULL, NULL,
4544/* FC */ NULL, NULL, NULL, NULL,
4545};
4546
4547static void
26ca5450 4548OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
252b5132
RH		 4549{
4550 const char *mnemonic;
4551
4552 FETCH_DATA (the_info, codep + 1);
4553 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4554 place where an 8-bit immediate would normally go. ie. the last
4555 byte of the instruction. */
6608db57 4556 obufp = obuf + strlen (obuf);
c608c12e 4557 mnemonic = Suffix3DNow[*codep++ & 0xff];
252b5132 4558 if (mnemonic)
2da11e11 4559 oappend (mnemonic);
252b5132
RH		 4560 else
4561 {
4562 /* Since a variable sized modrm/sib chunk is between the start
4563 of the opcode (0x0f0f) and the opcode suffix, we need to do
4564 all the modrm processing first, and don't know until now that
4565 we have a bad opcode. This necessitates some cleaning up. */
2da11e11
AM		 4566 op1out[0] = '\0';
4567 op2out[0] = '\0';
6608db57 4568 BadOp ();
252b5132
RH		 4569 }
4570}
c608c12e 4571
6608db57 4572static const char *simd_cmp_op[] = {
c608c12e
AM		 4573 "eq",
4574 "lt",
4575 "le",
4576 "unord",
4577 "neq",
4578 "nlt",
4579 "nle",
4580 "ord"
4581};
4582
4583static void
26ca5450 4584OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 4585{
4586 unsigned int cmp_type;
4587
4588 FETCH_DATA (the_info, codep + 1);
6608db57 4589 obufp = obuf + strlen (obuf);
c608c12e
AM		 4590 cmp_type = *codep++ & 0xff;
4591 if (cmp_type < 8)
4592 {
041bd2e0
JH		 4593 char suffix1 = 'p', suffix2 = 's';
4594 used_prefixes |= (prefixes & PREFIX_REPZ);
4595 if (prefixes & PREFIX_REPZ)
4596 suffix1 = 's';
4597 else
4598 {
4599 used_prefixes |= (prefixes & PREFIX_DATA);
4600 if (prefixes & PREFIX_DATA)
4601 suffix2 = 'd';
4602 else
4603 {
4604 used_prefixes |= (prefixes & PREFIX_REPNZ);
4605 if (prefixes & PREFIX_REPNZ)
4606 suffix1 = 's', suffix2 = 'd';
4607 }
4608 }
4609 sprintf (scratchbuf, "cmp%s%c%c",
4610 simd_cmp_op[cmp_type], suffix1, suffix2);
7d421014 4611 used_prefixes |= (prefixes & PREFIX_REPZ);
2da11e11 4612 oappend (scratchbuf);
c608c12e
AM		 4613 }
4614 else
4615 {
4616 /* We have a bad extension byte. Clean up. */
2da11e11
AM		 4617 op1out[0] = '\0';
4618 op2out[0] = '\0';
6608db57 4619 BadOp ();
c608c12e
AM		 4620 }
4621}
4622
4623static void
26ca5450 4624SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
c608c12e
AM		 4625{
4626 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4627 forms of these instructions. */
4628 if (mod == 3)
4629 {
6608db57
KH		 4630 char *p = obuf + strlen (obuf);
4631 *(p + 1) = '\0';
4632 *p = *(p - 1);
4633 *(p - 1) = *(p - 2);
4634 *(p - 2) = *(p - 3);
4635 *(p - 3) = extrachar;
c608c12e
AM		 4636 }
4637}
2da11e11 4638
ca164297 4639static void
4fd61dcb 4640PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
ca164297 4641{
1d9f512f 4642 if (mod == 3 && reg == 1 && rm <= 1)
ca164297 4643 {
ca164297 4644 /* Override "sidt". */
cb712a9e
L		 4645 size_t olen = strlen (obuf);
4646 char *p = obuf + olen - 4;
4647 const char **names = (address_mode == mode_64bit
4648 ? names64 : names32);
1d9f512f 4649
22cbf2e7 4650 /* We might have a suffix when disassembling with -Msuffix. */
1d9f512f
AM		 4651 if (*p == 'i')
4652 --p;
4653
cb712a9e
L		 4654 /* Remove "addr16/addr32" if we aren't in Intel mode. */
4655 if (!intel_syntax
4656 && (prefixes & PREFIX_ADDR)
4657 && olen >= (4 + 7)
4658 && *(p - 1) == ' '
4659 && strncmp (p - 7, "addr", 4) == 0
4660 && (strncmp (p - 3, "16", 2) == 0
4661 || strncmp (p - 3, "32", 2) == 0))
4662 p -= 7;
4663
ca164297
L		 4664 if (rm)
4665 {
4666 /* mwait %eax,%ecx */
1d9f512f 4667 strcpy (p, "mwait");
6128c599 4668 if (!intel_syntax)
cb712a9e 4669 strcpy (op1out, names[0]);
ca164297
L		 4670 }
4671 else
4672 {
4673 /* monitor %eax,%ecx,%edx" */
1d9f512f 4674 strcpy (p, "monitor");
6128c599
JB		 4675 if (!intel_syntax)
4676 {
cb712a9e
L		 4677 const char **op1_names;
4678 if (!(prefixes & PREFIX_ADDR))
4679 op1_names = (address_mode == mode_16bit
4680 ? names16 : names);
6128c599
JB		 4681 else
4682 {
cb712a9e
L		 4683 op1_names = (address_mode != mode_32bit
4684 ? names32 : names16);
6128c599
JB		 4685 used_prefixes |= PREFIX_ADDR;
4686 }
cb712a9e
L		 4687 strcpy (op1out, op1_names[0]);
4688 strcpy (op3out, names[2]);
6128c599
JB		 4689 }
4690 }
4691 if (!intel_syntax)
4692 {
cb712a9e 4693 strcpy (op2out, names[1]);
6128c599 4694 two_source_ops = 1;
ca164297
L		 4695 }
4696
4697 codep++;
4698 }
4699 else
30123838
JB		 4700 OP_M (0, sizeflag);
4701}
4702
4703static void
4704SVME_Fixup (int bytemode, int sizeflag)
4705{
4706 const char *alt;
4707 char *p;
4708
4709 switch (*codep)
4710 {
4711 case 0xd8:
4712 alt = "vmrun";
4713 break;
4714 case 0xd9:
4715 alt = "vmmcall";
4716 break;
4717 case 0xda:
4718 alt = "vmload";
4719 break;
4720 case 0xdb:
4721 alt = "vmsave";
4722 break;
4723 case 0xdc:
4724 alt = "stgi";
4725 break;
4726 case 0xdd:
4727 alt = "clgi";
4728 break;
4729 case 0xde:
4730 alt = "skinit";
4731 break;
4732 case 0xdf:
4733 alt = "invlpga";
4734 break;
4735 default:
4736 OP_M (bytemode, sizeflag);
4737 return;
4738 }
4739 /* Override "lidt". */
4740 p = obuf + strlen (obuf) - 4;
4741 /* We might have a suffix. */
4742 if (*p == 'i')
4743 --p;
4744 strcpy (p, alt);
4745 if (!(prefixes & PREFIX_ADDR))
4746 {
4747 ++codep;
4748 return;
4749 }
4750 used_prefixes |= PREFIX_ADDR;
4751 switch (*codep++)
4752 {
4753 case 0xdf:
4754 strcpy (op2out, names32[1]);
4755 two_source_ops = 1;
4756 /* Fall through. */
4757 case 0xd8:
4758 case 0xda:
4759 case 0xdb:
4760 *obufp++ = open_char;
cb712a9e 4761 if (address_mode == mode_64bit || (sizeflag & AFLAG))
30123838
JB		 4762 alt = names32[0];
4763 else
4764 alt = names16[0];
4765 strcpy (obufp, alt);
4766 obufp += strlen (alt);
4767 *obufp++ = close_char;
4768 *obufp = '\0';
4769 break;
4770 }
ca164297
L		 4771}
4772
4fd61dcb
JJ		 4773static void
4774INVLPG_Fixup (int bytemode, int sizeflag)
4775{
373ff435 4776 const char *alt;
4fd61dcb 4777
373ff435
JB		 4778 switch (*codep)
4779 {
4780 case 0xf8:
4781 alt = "swapgs";
4782 break;
4783 case 0xf9:
4784 alt = "rdtscp";
4785 break;
4786 default:
30123838 4787 OP_M (bytemode, sizeflag);
373ff435 4788 return;
4fd61dcb 4789 }
373ff435
JB		 4790 /* Override "invlpg". */
4791 strcpy (obuf + strlen (obuf) - 6, alt);
4792 codep++;
4fd61dcb
JJ		 4793}
4794
6608db57
KH		 4795static void
4796BadOp (void)
2da11e11 4797{
6608db57
KH		 4798 /* Throw away prefixes and 1st. opcode byte. */
4799 codep = insn_codep + 1;
2da11e11
AM		 4800 oappend ("(bad)");
4801}
4cc91dba
L		 4802
4803static void
4804SEG_Fixup (int extrachar, int sizeflag)
4805{
4806 if (mod == 3)
4807 {
4808 /* We need to add a proper suffix with
4809
4810 movw %ds,%ax
4811 movl %ds,%eax
4812 movq %ds,%rax
4813 movw %ax,%ds
4814 movl %eax,%ds
4815 movq %rax,%ds
4816 */
4817 const char *suffix;
4818
4819 if (prefixes & PREFIX_DATA)
4820 suffix = "w";
4821 else
4822 {
4823 USED_REX (REX_MODE64);
4824 if (rex & REX_MODE64)
4825 suffix = "q";
4826 else
4827 suffix = "l";
4828 }
4829 strcat (obuf, suffix);
4830 }
4831 else
4832 {
4833 /* We need to fix the suffix for
4834
4835 movw %ds,(%eax)
4836 movw %ds,(%rax)
4837 movw (%eax),%ds
4838 movw (%rax),%ds
4839
4840 Override "mov[l|q]". */
4841 char *p = obuf + strlen (obuf) - 1;
4842
4843 /* We might not have a suffix. */
4844 if (*p == 'v')
4845 ++p;
4846 *p = 'w';
4847 }
4848
4849 OP_E (extrachar, sizeflag);
4850}
90700ea2
L		 4851
4852static void
4853VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4854{
4855 if (mod == 3 && reg == 0 && rm >=1 && rm <= 4)
4856 {
4857 /* Override "sgdt". */
4858 char *p = obuf + strlen (obuf) - 4;
4859
22cbf2e7
L		 4860 /* We might have a suffix when disassembling with -Msuffix. */
4861 if (*p == 'g')
90700ea2
L		 4862 --p;
4863
4864 switch (rm)
4865 {
4866 case 1:
4867 strcpy (p, "vmcall");
4868 break;
4869 case 2:
4870 strcpy (p, "vmlaunch");
4871 break;
4872 case 3:
4873 strcpy (p, "vmresume");
4874 break;
4875 case 4:
4876 strcpy (p, "vmxoff");
4877 break;
4878 }
4879
4880 codep++;
4881 }
4882 else
4883 OP_E (0, sizeflag);
4884}
4885
4886static void
4887OP_VMX (int bytemode, int sizeflag)
4888{
4889 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
4890 if (prefixes & PREFIX_DATA)
4891 strcpy (obuf, "vmclear");
4892 else if (prefixes & PREFIX_REPZ)
4893 strcpy (obuf, "vmxon");
4894 else
4895 strcpy (obuf, "vmptrld");
4896 OP_E (bytemode, sizeflag);
4897}
35c52694
L		 4898
4899static void
4900REP_Fixup (int bytemode, int sizeflag)
4901{
4902 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
4903 lods and stos. */
4904 size_t ilen = 0;
4905
4906 if (prefixes & PREFIX_REPZ)
4907 switch (*insn_codep)
4908 {
4909 case 0x6e: /* outsb */
4910 case 0x6f: /* outsw/outsl */
4911 case 0xa4: /* movsb */
4912 case 0xa5: /* movsw/movsl/movsq */
4913 if (!intel_syntax)
4914 ilen = 5;
4915 else
4916 ilen = 4;
4917 break;
4918 case 0xaa: /* stosb */
4919 case 0xab: /* stosw/stosl/stosq */
4920 case 0xac: /* lodsb */
4921 case 0xad: /* lodsw/lodsl/lodsq */
4922 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
4923 ilen = 5;
4924 else
4925 ilen = 4;
4926 break;
4927 case 0x6c: /* insb */
4928 case 0x6d: /* insl/insw */
4929 if (!intel_syntax)
4930 ilen = 4;
4931 else
4932 ilen = 3;
4933 break;
4934 default:
4935 abort ();
4936 break;
4937 }
4938
4939 if (ilen != 0)
4940 {
4941 size_t olen;
4942 char *p;
4943
4944 olen = strlen (obuf);
4945 p = obuf + olen - ilen - 1 - 4;
4946 /* Handle "repz [addr16|addr32]". */
4947 if ((prefixes & PREFIX_ADDR))
4948 p -= 1 + 6;
4949
4950 memmove (p + 3, p + 4, olen - (p + 3 - obuf));
4951 }
4952
4953 switch (bytemode)
4954 {
4955 case al_reg:
4956 case eAX_reg:
4957 case indir_dx_reg:
4958 OP_IMREG (bytemode, sizeflag);
4959 break;
4960 case eDI_reg:
4961 OP_ESreg (bytemode, sizeflag);
4962 break;
4963 case eSI_reg:
4964 OP_DSreg (bytemode, sizeflag);
4965 break;
4966 default:
4967 abort ();
4968 break;
4969 }
4970}
GDB Binutils - Deliverables
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