projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 40fb9820 | 1 | /* This file is automatically generated by i386-gen. Do not edit! */ |
| 6f143e4d | 2 | /* Copyright 2007, 2008 Free Software Foundation, Inc. |
| 40fb9820 L |
3 | |
| 4 | This file is part of the GNU opcodes library. | |
| 5 | ||
| 6 | This library is free software; you can redistribute it and/or modify | |
| 7 | it under the terms of the GNU General Public License as published by | |
| 8 | the Free Software Foundation; either version 3, or (at your option) | |
| 9 | any later version. | |
| 10 | ||
| 11 | It is distributed in the hope that it will be useful, but WITHOUT | |
| 12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
| 13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
| 14 | License for more details. | |
| 15 | ||
| 16 | You should have received a copy of the GNU General Public License | |
| 17 | along with this program; if not, write to the Free Software | |
| 18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
| 19 | MA 02110-1301, USA. */ | |
| 20 | ||
| 21 | #define CPU_UNKNOWN_FLAGS \ | |
| 22 | { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
| 475a2301 | 23 | 1, 1, 1, 1, 1, 1, 1, 0, 1, 1 } } |
| 40fb9820 L |
24 | |
| 25 | #define CPU_GENERIC32_FLAGS \ | |
| 26 | { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 475a2301 | 27 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
28 | |
| 29 | #define CPU_GENERIC64_FLAGS \ | |
| 115c7c25 | 30 | { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 475a2301 | 31 | 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } |
| 40fb9820 L |
32 | |
| 33 | #define CPU_NONE_FLAGS \ | |
| 34 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 475a2301 | 35 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
36 | |
| 37 | #define CPU_I186_FLAGS \ | |
| 38 | { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 475a2301 | 39 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
40 | |
| 41 | #define CPU_I286_FLAGS \ | |
| 42 | { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 475a2301 | 43 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
44 | |
| 45 | #define CPU_I386_FLAGS \ | |
| 46 | { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 475a2301 | 47 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
48 | |
| 49 | #define CPU_I486_FLAGS \ | |
| 50 | { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 475a2301 | 51 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
52 | |
| 53 | #define CPU_I586_FLAGS \ | |
| 54 | { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 475a2301 | 55 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
56 | |
| 57 | #define CPU_I686_FLAGS \ | |
| 58 | { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 475a2301 | 59 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
60 | |
| 61 | #define CPU_P2_FLAGS \ | |
| 62 | { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 475a2301 | 63 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
64 | |
| 65 | #define CPU_P3_FLAGS \ | |
| 115c7c25 | 66 | { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 475a2301 | 67 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
68 | |
| 69 | #define CPU_P4_FLAGS \ | |
| 115c7c25 | 70 | { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 475a2301 | 71 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
72 | |
| 73 | #define CPU_NOCONA_FLAGS \ | |
| 115c7c25 | 74 | { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, \ |
| 475a2301 | 75 | 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } |
| 40fb9820 L |
76 | |
| 77 | #define CPU_CORE_FLAGS \ | |
| 115c7c25 | 78 | { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, \ |
| 475a2301 | 79 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
80 | |
| 81 | #define CPU_CORE2_FLAGS \ | |
| 115c7c25 | 82 | { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, \ |
| 475a2301 | 83 | 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } |
| 40fb9820 L |
84 | |
| 85 | #define CPU_K6_FLAGS \ | |
| 86 | { { 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 475a2301 | 87 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
88 | |
| 89 | #define CPU_K6_2_FLAGS \ | |
| 115c7c25 | 90 | { { 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \ |
| 475a2301 | 91 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
92 | |
| 93 | #define CPU_ATHLON_FLAGS \ | |
| 115c7c25 | 94 | { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \ |
| 475a2301 | 95 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
96 | |
| 97 | #define CPU_K8_FLAGS \ | |
| 115c7c25 | 98 | { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, \ |
| 475a2301 | 99 | 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } |
| 40fb9820 L |
100 | |
| 101 | #define CPU_AMDFAM10_FLAGS \ | |
| 115c7c25 | 102 | { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, \ |
| 475a2301 | 103 | 1, 1, 0, 0, 0, 0, 1, 0, 0, 0 } } |
| 40fb9820 L |
104 | |
| 105 | #define CPU_MMX_FLAGS \ | |
| 106 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 475a2301 | 107 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
108 | |
| 109 | #define CPU_SSE_FLAGS \ | |
| 115c7c25 | 110 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 475a2301 | 111 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
112 | |
| 113 | #define CPU_SSE2_FLAGS \ | |
| 115c7c25 | 114 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 475a2301 | 115 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
116 | |
| 117 | #define CPU_SSE3_FLAGS \ | |
| 115c7c25 | 118 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, \ |
| 475a2301 | 119 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
120 | |
| 121 | #define CPU_SSSE3_FLAGS \ | |
| 115c7c25 | 122 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, \ |
| 475a2301 | 123 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
124 | |
| 125 | #define CPU_SSE4_1_FLAGS \ | |
| 115c7c25 | 126 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, \ |
| 475a2301 | 127 | 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
128 | |
| 129 | #define CPU_SSE4_2_FLAGS \ | |
| 115c7c25 | 130 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, \ |
| 475a2301 | 131 | 0, 0, 1, 1, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 | 132 | |
| 6305a203 | 133 | #define CPU_VMX_FLAGS \ |
| 115c7c25 | 134 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \ |
| 475a2301 | 135 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 6305a203 L |
136 | |
| 137 | #define CPU_SMX_FLAGS \ | |
| 115c7c25 | 138 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \ |
| 475a2301 | 139 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 6305a203 | 140 | |
| f03fe4c1 L |
141 | #define CPU_XSAVE_FLAGS \ |
| 142 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 143 | 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } } | |
| 144 | ||
| 40fb9820 | 145 | #define CPU_3DNOW_FLAGS \ |
| 115c7c25 | 146 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \ |
| 475a2301 | 147 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
148 | |
| 149 | #define CPU_3DNOWA_FLAGS \ | |
| 115c7c25 | 150 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \ |
| 475a2301 | 151 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
152 | |
| 153 | #define CPU_PADLOCK_FLAGS \ | |
| 115c7c25 | 154 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \ |
| 475a2301 | 155 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
156 | |
| 157 | #define CPU_SVME_FLAGS \ | |
| 115c7c25 | 158 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \ |
| 475a2301 | 159 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
160 | |
| 161 | #define CPU_SSE4A_FLAGS \ | |
| 115c7c25 | 162 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, \ |
| 475a2301 | 163 | 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
164 | |
| 165 | #define CPU_ABM_FLAGS \ | |
| 166 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 475a2301 | 167 | 0, 1, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 85f10a01 MM |
168 | |
| 169 | #define CPU_SSE5_FLAGS \ | |
| 115c7c25 | 170 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, \ |
| 475a2301 | 171 | 1, 1, 0, 0, 1, 0, 0, 0, 0, 0 } } |
| 40fb9820 L |
172 | |
| 173 | ||
| 174 | #define OPERAND_TYPE_NONE \ | |
| 175 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 7d5e4556 | 176 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 5c07affc | 177 | 0, 0, 0 } } |
| 40fb9820 L |
178 | |
| 179 | #define OPERAND_TYPE_REG8 \ | |
| 180 | { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 7d5e4556 | 181 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 5c07affc | 182 | 0, 0, 0 } } |
| 40fb9820 L |
183 | |
| 184 | #define OPERAND_TYPE_REG16 \ | |
| 185 | { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 7d5e4556 | 186 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 5c07affc | 187 | 0, 0, 0 } } |
| 40fb9820 L |
188 | |
| 189 | #define OPERAND_TYPE_REG32 \ | |
| 190 | { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 7d5e4556 | 191 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 5c07affc | 192 | 0, 0, 0 } } |
| 40fb9820 L |
193 | |
| 194 | #define OPERAND_TYPE_REG64 \ | |
| 195 | { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 7d5e4556 | 196 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 5c07affc | 197 | 0, 0, 0 } } |
| 40fb9820 L |
198 | |
| 199 | #define OPERAND_TYPE_IMM1 \ | |
| 7d5e4556 L |
200 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \ |
| 201 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 202 | 0, 0, 0 } } |
| 40fb9820 L |
203 | |
| 204 | #define OPERAND_TYPE_IMM8 \ | |
| 7d5e4556 L |
205 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \ |
| 206 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 207 | 0, 0, 0 } } |
| 40fb9820 L |
208 | |
| 209 | #define OPERAND_TYPE_IMM8S \ | |
| 7d5e4556 L |
210 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \ |
| 211 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 212 | 0, 0, 0 } } |
| 40fb9820 L |
213 | |
| 214 | #define OPERAND_TYPE_IMM16 \ | |
| 7d5e4556 L |
215 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \ |
| 216 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 217 | 0, 0, 0 } } |
| 40fb9820 L |
218 | |
| 219 | #define OPERAND_TYPE_IMM32 \ | |
| 7d5e4556 L |
220 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \ |
| 221 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 222 | 0, 0, 0 } } |
| 40fb9820 L |
223 | |
| 224 | #define OPERAND_TYPE_IMM32S \ | |
| 7d5e4556 L |
225 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \ |
| 226 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 227 | 0, 0, 0 } } |
| 40fb9820 L |
228 | |
| 229 | #define OPERAND_TYPE_IMM64 \ | |
| 7d5e4556 L |
230 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \ |
| 231 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 232 | 0, 0, 0 } } |
| 40fb9820 L |
233 | |
| 234 | #define OPERAND_TYPE_BASEINDEX \ | |
| 7d5e4556 L |
235 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 236 | 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 237 | 0, 0, 0 } } |
| 40fb9820 L |
238 | |
| 239 | #define OPERAND_TYPE_DISP8 \ | |
| 7d5e4556 L |
240 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \ |
| 241 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 242 | 0, 0, 0 } } |
| 40fb9820 L |
243 | |
| 244 | #define OPERAND_TYPE_DISP16 \ | |
| 7d5e4556 L |
245 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 246 | 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 247 | 0, 0, 0 } } |
| 40fb9820 L |
248 | |
| 249 | #define OPERAND_TYPE_DISP32 \ | |
| 7d5e4556 L |
250 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 251 | 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 252 | 0, 0, 0 } } |
| 40fb9820 L |
253 | |
| 254 | #define OPERAND_TYPE_DISP32S \ | |
| 7d5e4556 L |
255 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 256 | 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 257 | 0, 0, 0 } } |
| 40fb9820 L |
258 | |
| 259 | #define OPERAND_TYPE_DISP64 \ | |
| 7d5e4556 L |
260 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 261 | 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 262 | 0, 0, 0 } } |
| 40fb9820 L |
263 | |
| 264 | #define OPERAND_TYPE_INOUTPORTREG \ | |
| 7d5e4556 L |
265 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 266 | 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 267 | 0, 0, 0 } } |
| 40fb9820 L |
268 | |
| 269 | #define OPERAND_TYPE_SHIFTCOUNT \ | |
| 7d5e4556 L |
270 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 271 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 272 | 0, 0, 0 } } |
| 40fb9820 L |
273 | |
| 274 | #define OPERAND_TYPE_CONTROL \ | |
| 7d5e4556 L |
275 | { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 276 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 277 | 0, 0, 0 } } |
| 40fb9820 L |
278 | |
| 279 | #define OPERAND_TYPE_TEST \ | |
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280 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 281 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 282 | 0, 0, 0 } } |
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283 | |
| 284 | #define OPERAND_TYPE_DEBUG \ | |
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285 | { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 286 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 287 | 0, 0, 0 } } |
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288 | |
| 289 | #define OPERAND_TYPE_FLOATREG \ | |
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290 | { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 291 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 292 | 0, 0, 0 } } |
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293 | |
| 294 | #define OPERAND_TYPE_FLOATACC \ | |
| 295 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 7d5e4556 | 296 | 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 5c07affc | 297 | 0, 0, 0 } } |
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298 | |
| 299 | #define OPERAND_TYPE_SREG2 \ | |
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300 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 301 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 302 | 0, 0, 0 } } |
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303 | |
| 304 | #define OPERAND_TYPE_SREG3 \ | |
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305 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 306 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 307 | 0, 0, 0 } } |
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308 | |
| 309 | #define OPERAND_TYPE_ACC \ | |
| 310 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 7d5e4556 | 311 | 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 5c07affc | 312 | 0, 0, 0 } } |
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313 | |
| 314 | #define OPERAND_TYPE_JUMPABSOLUTE \ | |
| 315 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 7d5e4556 | 316 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 5c07affc | 317 | 0, 0, 0 } } |
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318 | |
| 319 | #define OPERAND_TYPE_REGMMX \ | |
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320 | { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 321 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 322 | 0, 0, 0 } } |
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323 | |
| 324 | #define OPERAND_TYPE_REGXMM \ | |
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325 | { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 326 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 327 | 0, 0, 0 } } |
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328 | |
| 329 | #define OPERAND_TYPE_ESSEG \ | |
| 330 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 7d5e4556 | 331 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 5c07affc | 332 | 0, 0, 0 } } |
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333 | |
| 334 | #define OPERAND_TYPE_ACC32 \ | |
| 335 | { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
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336 | 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \ |
| 337 | 0, 0, 0 } } | |
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338 | |
| 339 | #define OPERAND_TYPE_ACC64 \ | |
| 340 | { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
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341 | 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \ |
| 342 | 0, 0, 0 } } | |
| 40fb9820 | 343 | |
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344 | #define OPERAND_TYPE_INOUTPORTREG \ |
| 345 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 346 | 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 347 | 0, 0, 0 } } | |
| 348 | ||
| 40fb9820 | 349 | #define OPERAND_TYPE_REG16_INOUTPORTREG \ |
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350 | { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 351 | 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 352 | 0, 0, 0 } } |
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353 | |
| 354 | #define OPERAND_TYPE_DISP16_32 \ | |
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355 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 356 | 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 357 | 0, 0, 0 } } |
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358 | |
| 359 | #define OPERAND_TYPE_ANYDISP \ | |
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360 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \ |
| 361 | 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 362 | 0, 0, 0 } } |
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363 | |
| 364 | #define OPERAND_TYPE_IMM16_32 \ | |
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365 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \ |
| 366 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 367 | 0, 0, 0 } } |
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368 | |
| 369 | #define OPERAND_TYPE_IMM16_32S \ | |
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370 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \ |
| 371 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 372 | 0, 0, 0 } } |
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373 | |
| 374 | #define OPERAND_TYPE_IMM16_32_32S \ | |
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375 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \ |
| 376 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 377 | 0, 0, 0 } } |
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378 | |
| 379 | #define OPERAND_TYPE_IMM32_32S_DISP32 \ | |
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380 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \ |
| 381 | 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 382 | 0, 0, 0 } } |
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383 | |
| 384 | #define OPERAND_TYPE_IMM64_DISP64 \ | |
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385 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \ |
| 386 | 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 387 | 0, 0, 0 } } |
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388 | |
| 389 | #define OPERAND_TYPE_IMM32_32S_64_DISP32 \ | |
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390 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, \ |
| 391 | 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 392 | 0, 0, 0 } } |
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393 | |
| 394 | #define OPERAND_TYPE_IMM32_32S_64_DISP32_64 \ | |
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395 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, \ |
| 396 | 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 5c07affc | 397 | 0, 0, 0 } } |