Commit | Line | Data |
---|---|---|
40b8e679 L |
1 | // i386 register table. |
2 | ||
3 | // Make %st first as we test for it. | |
4 | st, FloatReg|FloatAcc, 0, 0 | |
5 | // 8 bit regs | |
6 | al, Reg8|Acc, 0, 0 | |
7 | cl, Reg8|ShiftCount, 0, 1 | |
8 | dl, Reg8, 0, 2 | |
9 | bl, Reg8, 0, 3 | |
10 | ah, Reg8, 0, 4 | |
11 | ch, Reg8, 0, 5 | |
12 | dh, Reg8, 0, 6 | |
13 | bh, Reg8, 0, 7 | |
14 | axl, Reg8|Acc, RegRex64, 0 | |
15 | cxl, Reg8, RegRex64, 1 | |
16 | dxl, Reg8, RegRex64, 2 | |
17 | bxl, Reg8, RegRex64, 3 | |
18 | spl, Reg8, RegRex64, 4 | |
19 | bpl, Reg8, RegRex64, 5 | |
20 | sil, Reg8, RegRex64, 6 | |
21 | dil, Reg8, RegRex64, 7 | |
22 | r8b, Reg8, RegRex|RegRex64, 0 | |
23 | r9b, Reg8, RegRex|RegRex64, 1 | |
24 | r10b, Reg8, RegRex|RegRex64, 2 | |
25 | r11b, Reg8, RegRex|RegRex64, 3 | |
26 | r12b, Reg8, RegRex|RegRex64, 4 | |
27 | r13b, Reg8, RegRex|RegRex64, 5 | |
28 | r14b, Reg8, RegRex|RegRex64, 6 | |
29 | r15b, Reg8, RegRex|RegRex64, 7 | |
30 | // 16 bit regs | |
31 | ax, Reg16|Acc, 0, 0 | |
32 | cx, Reg16, 0, 1 | |
33 | dx, Reg16|InOutPortReg, 0, 2 | |
34 | bx, Reg16|BaseIndex, 0, 3 | |
35 | sp, Reg16, 0, 4 | |
36 | bp, Reg16|BaseIndex, 0, 5 | |
37 | si, Reg16|BaseIndex, 0, 6 | |
38 | di, Reg16|BaseIndex, 0, 7 | |
39 | r8w, Reg16, RegRex, 0 | |
40 | r9w, Reg16, RegRex, 1 | |
41 | r10w, Reg16, RegRex, 2 | |
42 | r11w, Reg16, RegRex, 3 | |
43 | r12w, Reg16, RegRex, 4 | |
44 | r13w, Reg16, RegRex, 5 | |
45 | r14w, Reg16, RegRex, 6 | |
46 | r15w, Reg16, RegRex, 7 | |
47 | // 32 bit regs | |
48 | eax, Reg32|BaseIndex|Acc, 0, 0 | |
49 | ecx, Reg32|BaseIndex, 0, 1 | |
50 | edx, Reg32|BaseIndex, 0, 2 | |
51 | ebx, Reg32|BaseIndex, 0, 3 | |
52 | esp, Reg32, 0, 4 | |
53 | ebp, Reg32|BaseIndex, 0, 5 | |
54 | esi, Reg32|BaseIndex, 0, 6 | |
55 | edi, Reg32|BaseIndex, 0, 7 | |
56 | r8d, Reg32|BaseIndex, RegRex, 0 | |
57 | r9d, Reg32|BaseIndex, RegRex, 1 | |
58 | r10d, Reg32|BaseIndex, RegRex, 2 | |
59 | r11d, Reg32|BaseIndex, RegRex, 3 | |
60 | r12d, Reg32|BaseIndex, RegRex, 4 | |
61 | r13d, Reg32|BaseIndex, RegRex, 5 | |
62 | r14d, Reg32|BaseIndex, RegRex, 6 | |
63 | r15d, Reg32|BaseIndex, RegRex, 7 | |
64 | rax, Reg64|BaseIndex|Acc, 0, 0 | |
65 | rcx, Reg64|BaseIndex, 0, 1 | |
66 | rdx, Reg64|BaseIndex, 0, 2 | |
67 | rbx, Reg64|BaseIndex, 0, 3 | |
68 | rsp, Reg64, 0, 4 | |
69 | rbp, Reg64|BaseIndex, 0, 5 | |
70 | rsi, Reg64|BaseIndex, 0, 6 | |
71 | rdi, Reg64|BaseIndex, 0, 7 | |
72 | r8, Reg64|BaseIndex, RegRex, 0 | |
73 | r9, Reg64|BaseIndex, RegRex, 1 | |
74 | r10, Reg64|BaseIndex, RegRex, 2 | |
75 | r11, Reg64|BaseIndex, RegRex, 3 | |
76 | r12, Reg64|BaseIndex, RegRex, 4 | |
77 | r13, Reg64|BaseIndex, RegRex, 5 | |
78 | r14, Reg64|BaseIndex, RegRex, 6 | |
79 | r15, Reg64|BaseIndex, RegRex, 7 | |
f85fcb85 | 80 | // Segment registers. |
40b8e679 L |
81 | es, SReg2, 0, 0 |
82 | cs, SReg2, 0, 1 | |
83 | ss, SReg2, 0, 2 | |
84 | ds, SReg2, 0, 3 | |
85 | fs, SReg3, 0, 4 | |
86 | gs, SReg3, 0, 5 | |
87 | // Control registers. | |
88 | cr0, Control, 0, 0 | |
89 | cr1, Control, 0, 1 | |
90 | cr2, Control, 0, 2 | |
91 | cr3, Control, 0, 3 | |
92 | cr4, Control, 0, 4 | |
93 | cr5, Control, 0, 5 | |
94 | cr6, Control, 0, 6 | |
95 | cr7, Control, 0, 7 | |
96 | cr8, Control, RegRex, 0 | |
97 | cr9, Control, RegRex, 1 | |
98 | cr10, Control, RegRex, 2 | |
99 | cr11, Control, RegRex, 3 | |
100 | cr12, Control, RegRex, 4 | |
101 | cr13, Control, RegRex, 5 | |
102 | cr14, Control, RegRex, 6 | |
103 | cr15, Control, RegRex, 7 | |
104 | // Debug registers. | |
105 | db0, Debug, 0, 0 | |
106 | db1, Debug, 0, 1 | |
107 | db2, Debug, 0, 2 | |
108 | db3, Debug, 0, 3 | |
109 | db4, Debug, 0, 4 | |
110 | db5, Debug, 0, 5 | |
111 | db6, Debug, 0, 6 | |
112 | db7, Debug, 0, 7 | |
113 | db8, Debug, RegRex, 0 | |
114 | db9, Debug, RegRex, 1 | |
115 | db10, Debug, RegRex, 2 | |
116 | db11, Debug, RegRex, 3 | |
117 | db12, Debug, RegRex, 4 | |
118 | db13, Debug, RegRex, 5 | |
119 | db14, Debug, RegRex, 6 | |
120 | db15, Debug, RegRex, 7 | |
121 | dr0, Debug, 0, 0 | |
122 | dr1, Debug, 0, 1 | |
123 | dr2, Debug, 0, 2 | |
124 | dr3, Debug, 0, 3 | |
125 | dr4, Debug, 0, 4 | |
126 | dr5, Debug, 0, 5 | |
127 | dr6, Debug, 0, 6 | |
128 | dr7, Debug, 0, 7 | |
129 | dr8, Debug, RegRex, 0 | |
130 | dr9, Debug, RegRex, 1 | |
131 | dr10, Debug, RegRex, 2 | |
132 | dr11, Debug, RegRex, 3 | |
133 | dr12, Debug, RegRex, 4 | |
134 | dr13, Debug, RegRex, 5 | |
135 | dr14, Debug, RegRex, 6 | |
136 | dr15, Debug, RegRex, 7 | |
137 | // Test registers. | |
138 | tr0, Test, 0, 0 | |
139 | tr1, Test, 0, 1 | |
140 | tr2, Test, 0, 2 | |
141 | tr3, Test, 0, 3 | |
142 | tr4, Test, 0, 4 | |
143 | tr5, Test, 0, 5 | |
144 | tr6, Test, 0, 6 | |
145 | tr7, Test, 0, 7 | |
146 | // MMX and simd registers. | |
147 | mm0, RegMMX, 0, 0 | |
148 | mm1, RegMMX, 0, 1 | |
149 | mm2, RegMMX, 0, 2 | |
150 | mm3, RegMMX, 0, 3 | |
151 | mm4, RegMMX, 0, 4 | |
152 | mm5, RegMMX, 0, 5 | |
153 | mm6, RegMMX, 0, 6 | |
154 | mm7, RegMMX, 0, 7 | |
155 | xmm0, RegXMM, 0, 0 | |
156 | xmm1, RegXMM, 0, 1 | |
157 | xmm2, RegXMM, 0, 2 | |
158 | xmm3, RegXMM, 0, 3 | |
159 | xmm4, RegXMM, 0, 4 | |
160 | xmm5, RegXMM, 0, 5 | |
161 | xmm6, RegXMM, 0, 6 | |
162 | xmm7, RegXMM, 0, 7 | |
163 | xmm8, RegXMM, RegRex, 0 | |
164 | xmm9, RegXMM, RegRex, 1 | |
165 | xmm10, RegXMM, RegRex, 2 | |
166 | xmm11, RegXMM, RegRex, 3 | |
167 | xmm12, RegXMM, RegRex, 4 | |
168 | xmm13, RegXMM, RegRex, 5 | |
169 | xmm14, RegXMM, RegRex, 6 | |
170 | xmm15, RegXMM, RegRex, 7 | |
171 | // No type will make this register rejected for all purposes except | |
172 | // for addressing. This saves creating one extra type for RIP. | |
173 | rip, BaseIndex, 0, 0 | |
174 | // fp regs. | |
175 | st(0), FloatReg|FloatAcc, 0, 0 | |
176 | st(1), FloatReg, 0, 1 | |
177 | st(2), FloatReg, 0, 2 | |
178 | st(3), FloatReg, 0, 3 | |
179 | st(4), FloatReg, 0, 4 | |
180 | st(5), FloatReg, 0, 5 | |
181 | st(6), FloatReg, 0, 6 | |
182 | st(7), FloatReg, 0, 7 |