Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* Disassemble i80960 instructions. |
7fa108a4 | 2 | Copyright 1990, 1991, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001 |
060d22b0 | 3 | Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2, or (at your option) | |
8 | any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; see the file COPYING. If not, write to the | |
17 | Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
18 | 02111-1307, USA. */ | |
19 | ||
0d8dfecf | 20 | #include "sysdep.h" |
252b5132 RH |
21 | #include "dis-asm.h" |
22 | ||
23 | static const char *const reg_names[] = { | |
7fa108a4 | 24 | /* 0 */ "pfp", "sp", "rip", "r3", "r4", "r5", "r6", "r7", |
252b5132 | 25 | /* 8 */ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
7fa108a4 AJ |
26 | /* 16 */ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", |
27 | /* 24 */ "g8", "g9", "g10", "g11", "g12", "g13", "g14", "fp", | |
28 | /* 32 */ "pc", "ac", "ip", "tc", "fp0", "fp1", "fp2", "fp3" | |
252b5132 RH |
29 | }; |
30 | ||
31 | ||
32 | static FILE *stream; /* Output goes here */ | |
33 | static struct disassemble_info *info; | |
7fa108a4 AJ |
34 | static void print_addr PARAMS ((bfd_vma)); |
35 | static void ctrl PARAMS ((bfd_vma, unsigned long, unsigned long)); | |
36 | static void cobr PARAMS ((bfd_vma, unsigned long, unsigned long)); | |
37 | static void reg PARAMS ((unsigned long)); | |
38 | static int mem PARAMS ((bfd_vma, unsigned long, unsigned long, int)); | |
fc05c67f | 39 | static void ea PARAMS ((bfd_vma, int, const char *, const char *, int, unsigned int)); |
7fa108a4 AJ |
40 | static void dstop PARAMS ((int, int, int)); |
41 | static void regop PARAMS ((int, int, int, int)); | |
42 | static void invalid PARAMS ((int)); | |
43 | static int pinsn PARAMS ((bfd_vma, unsigned long, unsigned long)); | |
44 | static void put_abs PARAMS ((unsigned long, unsigned long)); | |
252b5132 RH |
45 | |
46 | ||
47 | /* Print the i960 instruction at address 'memaddr' in debugged memory, | |
48 | on INFO->STREAM. Returns length of the instruction, in bytes. */ | |
49 | ||
50 | int | |
51 | print_insn_i960 (memaddr, info_arg) | |
52 | bfd_vma memaddr; | |
53 | struct disassemble_info *info_arg; | |
54 | { | |
55 | unsigned int word1, word2 = 0xdeadbeef; | |
56 | bfd_byte buffer[8]; | |
57 | int status; | |
58 | ||
59 | info = info_arg; | |
60 | stream = info->stream; | |
61 | ||
62 | /* Read word1. Only read word2 if the instruction | |
63 | needs it, to prevent reading past the end of a section. */ | |
64 | ||
65 | status = (*info->read_memory_func) (memaddr, (bfd_byte *) buffer, 4, info); | |
66 | if (status != 0) | |
67 | { | |
68 | (*info->memory_error_func) (status, memaddr, info); | |
69 | return -1; | |
70 | } | |
71 | ||
72 | word1 = bfd_getl32 (buffer); | |
73 | ||
74 | /* Divide instruction set into classes based on high 4 bits of opcode. */ | |
75 | switch ( (word1 >> 28) & 0xf ) | |
76 | { | |
77 | default: | |
78 | break; | |
79 | case 0x8: | |
80 | case 0x9: | |
81 | case 0xa: | |
82 | case 0xb: | |
83 | case 0xc: | |
84 | /* Read word2. */ | |
85 | status = (*info->read_memory_func) | |
86 | (memaddr + 4, (bfd_byte *) (buffer + 4), 4, info); | |
87 | if (status != 0) | |
88 | { | |
89 | (*info->memory_error_func) (status, memaddr, info); | |
90 | return -1; | |
91 | } | |
92 | word2 = bfd_getl32 (buffer + 4); | |
93 | break; | |
94 | } | |
95 | ||
96 | return pinsn( memaddr, word1, word2 ); | |
97 | } | |
98 | \f | |
99 | #define IN_GDB | |
100 | ||
101 | /***************************************************************************** | |
102 | * All code below this point should be identical with that of | |
103 | * the disassembler in gdmp960. | |
104 | ||
105 | A noble sentiment, but at least in cosmetic ways (info->fprintf_func), it | |
106 | just ain't so. -kingdon, 31 Mar 93 | |
107 | *****************************************************************************/ | |
108 | ||
109 | struct tabent { | |
110 | char *name; | |
111 | short numops; | |
112 | }; | |
113 | ||
114 | struct sparse_tabent { | |
115 | int opcode; | |
116 | char *name; | |
117 | short numops; | |
118 | }; | |
119 | ||
120 | static int | |
fc05c67f NC |
121 | pinsn (memaddr, word1, word2) |
122 | bfd_vma memaddr; | |
123 | unsigned long word1, word2; | |
252b5132 | 124 | { |
fc05c67f NC |
125 | int instr_len; |
126 | ||
127 | instr_len = 4; | |
128 | put_abs (word1, word2); | |
129 | ||
130 | /* Divide instruction set into classes based on high 4 bits of opcode. */ | |
131 | switch ((word1 >> 28) & 0xf) | |
132 | { | |
133 | case 0x0: | |
134 | case 0x1: | |
135 | ctrl (memaddr, word1, word2); | |
136 | break; | |
137 | case 0x2: | |
138 | case 0x3: | |
139 | cobr (memaddr, word1, word2); | |
140 | break; | |
141 | case 0x5: | |
142 | case 0x6: | |
143 | case 0x7: | |
144 | reg (word1); | |
145 | break; | |
146 | case 0x8: | |
147 | case 0x9: | |
148 | case 0xa: | |
149 | case 0xb: | |
150 | case 0xc: | |
151 | instr_len = mem (memaddr, word1, word2, 0); | |
152 | break; | |
153 | default: | |
154 | /* Invalid instruction, print as data word. */ | |
155 | invalid (word1); | |
156 | break; | |
157 | } | |
158 | return instr_len; | |
252b5132 RH |
159 | } |
160 | ||
fc05c67f NC |
161 | /* CTRL format.. */ |
162 | ||
252b5132 | 163 | static void |
fc05c67f NC |
164 | ctrl (memaddr, word1, word2) |
165 | bfd_vma memaddr; | |
166 | unsigned long word1; | |
167 | unsigned long word2 ATTRIBUTE_UNUSED; | |
252b5132 | 168 | { |
fc05c67f NC |
169 | int i; |
170 | static const struct tabent ctrl_tab[] = { | |
171 | { NULL, 0, }, /* 0x00 */ | |
172 | { NULL, 0, }, /* 0x01 */ | |
173 | { NULL, 0, }, /* 0x02 */ | |
174 | { NULL, 0, }, /* 0x03 */ | |
175 | { NULL, 0, }, /* 0x04 */ | |
176 | { NULL, 0, }, /* 0x05 */ | |
177 | { NULL, 0, }, /* 0x06 */ | |
178 | { NULL, 0, }, /* 0x07 */ | |
179 | { "b", 1, }, /* 0x08 */ | |
180 | { "call", 1, }, /* 0x09 */ | |
181 | { "ret", 0, }, /* 0x0a */ | |
182 | { "bal", 1, }, /* 0x0b */ | |
183 | { NULL, 0, }, /* 0x0c */ | |
184 | { NULL, 0, }, /* 0x0d */ | |
185 | { NULL, 0, }, /* 0x0e */ | |
186 | { NULL, 0, }, /* 0x0f */ | |
187 | { "bno", 1, }, /* 0x10 */ | |
188 | { "bg", 1, }, /* 0x11 */ | |
189 | { "be", 1, }, /* 0x12 */ | |
190 | { "bge", 1, }, /* 0x13 */ | |
191 | { "bl", 1, }, /* 0x14 */ | |
192 | { "bne", 1, }, /* 0x15 */ | |
193 | { "ble", 1, }, /* 0x16 */ | |
194 | { "bo", 1, }, /* 0x17 */ | |
195 | { "faultno", 0, }, /* 0x18 */ | |
196 | { "faultg", 0, }, /* 0x19 */ | |
197 | { "faulte", 0, }, /* 0x1a */ | |
198 | { "faultge", 0, }, /* 0x1b */ | |
199 | { "faultl", 0, }, /* 0x1c */ | |
200 | { "faultne", 0, }, /* 0x1d */ | |
201 | { "faultle", 0, }, /* 0x1e */ | |
202 | { "faulto", 0, }, /* 0x1f */ | |
203 | }; | |
204 | ||
205 | i = (word1 >> 24) & 0xff; | |
206 | if ((ctrl_tab[i].name == NULL) || ((word1 & 1) != 0)) | |
207 | { | |
208 | invalid (word1); | |
209 | return; | |
210 | } | |
252b5132 | 211 | |
fc05c67f NC |
212 | (*info->fprintf_func) (stream, ctrl_tab[i].name); |
213 | if (word1 & 2) | |
214 | /* Predicts branch not taken. */ | |
215 | (*info->fprintf_func) (stream, ".f"); | |
252b5132 | 216 | |
fc05c67f NC |
217 | if (ctrl_tab[i].numops == 1) |
218 | { | |
219 | /* Extract displacement and convert to address. */ | |
220 | word1 &= 0x00ffffff; | |
221 | ||
222 | if (word1 & 0x00800000) | |
223 | { | |
224 | /* Sign bit is set. */ | |
225 | word1 |= (-1 & ~0xffffff); /* Sign extend. */ | |
252b5132 | 226 | } |
fc05c67f NC |
227 | |
228 | (*info->fprintf_func) (stream, "\t"); | |
229 | print_addr (word1 + memaddr); | |
230 | } | |
252b5132 RH |
231 | } |
232 | ||
fc05c67f NC |
233 | /* COBR format. */ |
234 | ||
252b5132 | 235 | static void |
fc05c67f NC |
236 | cobr (memaddr, word1, word2) |
237 | bfd_vma memaddr; | |
238 | unsigned long word1; | |
239 | unsigned long word2 ATTRIBUTE_UNUSED; | |
252b5132 | 240 | { |
fc05c67f NC |
241 | int src1; |
242 | int src2; | |
243 | int i; | |
244 | ||
245 | static const struct tabent cobr_tab[] = { | |
246 | { "testno", 1, }, /* 0x20 */ | |
247 | { "testg", 1, }, /* 0x21 */ | |
248 | { "teste", 1, }, /* 0x22 */ | |
249 | { "testge", 1, }, /* 0x23 */ | |
250 | { "testl", 1, }, /* 0x24 */ | |
251 | { "testne", 1, }, /* 0x25 */ | |
252 | { "testle", 1, }, /* 0x26 */ | |
253 | { "testo", 1, }, /* 0x27 */ | |
254 | { NULL, 0, }, /* 0x28 */ | |
255 | { NULL, 0, }, /* 0x29 */ | |
256 | { NULL, 0, }, /* 0x2a */ | |
257 | { NULL, 0, }, /* 0x2b */ | |
258 | { NULL, 0, }, /* 0x2c */ | |
259 | { NULL, 0, }, /* 0x2d */ | |
260 | { NULL, 0, }, /* 0x2e */ | |
261 | { NULL, 0, }, /* 0x2f */ | |
262 | { "bbc", 3, }, /* 0x30 */ | |
263 | { "cmpobg", 3, }, /* 0x31 */ | |
264 | { "cmpobe", 3, }, /* 0x32 */ | |
265 | { "cmpobge",3, }, /* 0x33 */ | |
266 | { "cmpobl", 3, }, /* 0x34 */ | |
267 | { "cmpobne",3, }, /* 0x35 */ | |
268 | { "cmpoble",3, }, /* 0x36 */ | |
269 | { "bbs", 3, }, /* 0x37 */ | |
270 | { "cmpibno",3, }, /* 0x38 */ | |
271 | { "cmpibg", 3, }, /* 0x39 */ | |
272 | { "cmpibe", 3, }, /* 0x3a */ | |
273 | { "cmpibge",3, }, /* 0x3b */ | |
274 | { "cmpibl", 3, }, /* 0x3c */ | |
275 | { "cmpibne",3, }, /* 0x3d */ | |
276 | { "cmpible",3, }, /* 0x3e */ | |
277 | { "cmpibo", 3, }, /* 0x3f */ | |
278 | }; | |
279 | ||
280 | i = ((word1 >> 24) & 0xff) - 0x20; | |
281 | if (cobr_tab[i].name == NULL) | |
282 | { | |
283 | invalid (word1); | |
284 | return; | |
285 | } | |
252b5132 | 286 | |
fc05c67f | 287 | (*info->fprintf_func) (stream, cobr_tab[i].name); |
252b5132 | 288 | |
fc05c67f NC |
289 | /* Predicts branch not taken. */ |
290 | if (word1 & 2) | |
291 | (*info->fprintf_func) (stream, ".f"); | |
252b5132 | 292 | |
fc05c67f | 293 | (*info->fprintf_func) (stream, "\t"); |
252b5132 | 294 | |
fc05c67f NC |
295 | src1 = (word1 >> 19) & 0x1f; |
296 | src2 = (word1 >> 14) & 0x1f; | |
297 | ||
298 | if (word1 & 0x02000) | |
299 | /* M1 is 1 */ | |
300 | (*info->fprintf_func) (stream, "%d", src1); | |
301 | else | |
302 | (*info->fprintf_func) (stream, reg_names[src1]); | |
303 | ||
304 | if (cobr_tab[i].numops > 1) | |
305 | { | |
306 | if (word1 & 1) | |
307 | /* S2 is 1. */ | |
308 | (*info->fprintf_func) (stream, ",sf%d,", src2); | |
309 | else | |
310 | /* S1 is 0. */ | |
311 | (*info->fprintf_func) (stream, ",%s,", reg_names[src2]); | |
312 | ||
313 | /* Extract displacement and convert to address. */ | |
314 | word1 &= 0x00001ffc; | |
315 | if (word1 & 0x00001000) | |
316 | /* Negative displacement. */ | |
317 | word1 |= (-1 & ~0x1fff); /* Sign extend. */ | |
318 | ||
319 | print_addr (memaddr + word1); | |
320 | } | |
252b5132 RH |
321 | } |
322 | ||
fc05c67f NC |
323 | /* MEM format. */ |
324 | /* Returns instruction length: 4 or 8. */ | |
325 | ||
326 | static int | |
327 | mem (memaddr, word1, word2, noprint) | |
328 | bfd_vma memaddr; | |
329 | unsigned long word1, word2; | |
330 | int noprint; /* If TRUE, return instruction length, but | |
331 | don't output any text. */ | |
252b5132 | 332 | { |
fc05c67f NC |
333 | int i, j; |
334 | int len; | |
335 | int mode; | |
336 | int offset; | |
337 | const char *reg1, *reg2, *reg3; | |
338 | ||
339 | /* This lookup table is too sparse to make it worth typing in, but not | |
340 | so large as to make a sparse array necessary. We create the table | |
341 | at runtime. */ | |
342 | ||
343 | /* NOTE: In this table, the meaning of 'numops' is: | |
344 | 1: single operand | |
345 | 2: 2 operands, load instruction | |
346 | -2: 2 operands, store instruction. */ | |
347 | static struct tabent *mem_tab; | |
348 | /* Opcodes of 0x8X, 9X, aX, bX, and cX must be in the table. */ | |
252b5132 RH |
349 | #define MEM_MIN 0x80 |
350 | #define MEM_MAX 0xcf | |
351 | #define MEM_SIZ ( * sizeof(struct tabent)) | |
352 | ||
fc05c67f NC |
353 | static const struct sparse_tabent mem_init[] = { |
354 | { 0x80, "ldob", 2 }, | |
355 | { 0x82, "stob", -2 }, | |
356 | { 0x84, "bx", 1 }, | |
357 | { 0x85, "balx", 2 }, | |
358 | { 0x86, "callx", 1 }, | |
359 | { 0x88, "ldos", 2 }, | |
360 | { 0x8a, "stos", -2 }, | |
361 | { 0x8c, "lda", 2 }, | |
362 | { 0x90, "ld", 2 }, | |
363 | { 0x92, "st", -2 }, | |
364 | { 0x98, "ldl", 2 }, | |
365 | { 0x9a, "stl", -2 }, | |
366 | { 0xa0, "ldt", 2 }, | |
367 | { 0xa2, "stt", -2 }, | |
368 | { 0xac, "dcinva", 1 }, | |
369 | { 0xb0, "ldq", 2 }, | |
370 | { 0xb2, "stq", -2 }, | |
371 | { 0xc0, "ldib", 2 }, | |
372 | { 0xc2, "stib", -2 }, | |
373 | { 0xc8, "ldis", 2 }, | |
374 | { 0xca, "stis", -2 }, | |
375 | { 0, NULL, 0 } | |
376 | }; | |
377 | static struct tabent mem_tab_buf[MEM_MAX - MEM_MIN + 1]; | |
378 | ||
379 | if (mem_tab == NULL) | |
380 | { | |
381 | mem_tab = mem_tab_buf; | |
382 | ||
383 | for (i = 0; mem_init[i].opcode != 0; i++) | |
384 | { | |
385 | j = mem_init[i].opcode - MEM_MIN; | |
386 | mem_tab[j].name = mem_init[i].name; | |
387 | mem_tab[j].numops = mem_init[i].numops; | |
252b5132 | 388 | } |
fc05c67f | 389 | } |
252b5132 | 390 | |
fc05c67f NC |
391 | i = ((word1 >> 24) & 0xff) - MEM_MIN; |
392 | mode = (word1 >> 10) & 0xf; | |
252b5132 | 393 | |
fc05c67f NC |
394 | if ((mem_tab[i].name != NULL) /* Valid instruction */ |
395 | && ((mode == 5) || (mode >= 12))) | |
396 | /* With 32-bit displacement. */ | |
397 | len = 8; | |
398 | else | |
399 | len = 4; | |
400 | ||
401 | if (noprint) | |
402 | return len; | |
403 | ||
404 | if ((mem_tab[i].name == NULL) || (mode == 6)) | |
405 | { | |
406 | invalid (word1); | |
407 | return len; | |
408 | } | |
409 | ||
410 | (*info->fprintf_func) (stream, "%s\t", mem_tab[i].name); | |
411 | ||
412 | reg1 = reg_names[ (word1 >> 19) & 0x1f ]; /* MEMB only */ | |
413 | reg2 = reg_names[ (word1 >> 14) & 0x1f ]; | |
414 | reg3 = reg_names[ word1 & 0x1f ]; /* MEMB only */ | |
415 | offset = word1 & 0xfff; /* MEMA only */ | |
416 | ||
417 | switch (mem_tab[i].numops) | |
418 | { | |
419 | case 2: /* LOAD INSTRUCTION */ | |
420 | if (mode & 4) | |
421 | { /* MEMB FORMAT */ | |
422 | ea (memaddr, mode, reg2, reg3, word1, word2); | |
423 | (*info->fprintf_func) (stream, ",%s", reg1); | |
252b5132 | 424 | } |
fc05c67f NC |
425 | else |
426 | { /* MEMA FORMAT */ | |
427 | (*info->fprintf_func) (stream, "0x%x", (unsigned) offset); | |
252b5132 | 428 | |
fc05c67f NC |
429 | if (mode & 8) |
430 | (*info->fprintf_func) (stream, "(%s)", reg2); | |
431 | ||
432 | (*info->fprintf_func)(stream, ",%s", reg1); | |
433 | } | |
434 | break; | |
435 | ||
436 | case -2: /* STORE INSTRUCTION */ | |
437 | if (mode & 4) | |
438 | { | |
439 | /* MEMB FORMAT */ | |
440 | (*info->fprintf_func) (stream, "%s,", reg1); | |
441 | ea (memaddr, mode, reg2, reg3, word1, word2); | |
252b5132 | 442 | } |
fc05c67f NC |
443 | else |
444 | { | |
445 | /* MEMA FORMAT */ | |
446 | (*info->fprintf_func) (stream, "%s,0x%x", reg1, (unsigned) offset); | |
252b5132 | 447 | |
fc05c67f NC |
448 | if (mode & 8) |
449 | (*info->fprintf_func) (stream, "(%s)", reg2); | |
252b5132 | 450 | } |
fc05c67f | 451 | break; |
252b5132 | 452 | |
fc05c67f NC |
453 | case 1: /* BX/CALLX INSTRUCTION */ |
454 | if (mode & 4) | |
455 | { | |
456 | /* MEMB FORMAT */ | |
457 | ea (memaddr, mode, reg2, reg3, word1, word2); | |
252b5132 | 458 | } |
fc05c67f NC |
459 | else |
460 | { | |
461 | /* MEMA FORMAT */ | |
462 | (*info->fprintf_func) (stream, "0x%x", (unsigned) offset); | |
463 | if (mode & 8) | |
464 | (*info->fprintf_func) (stream, "(%s)", reg2); | |
465 | } | |
466 | break; | |
467 | } | |
252b5132 | 468 | |
fc05c67f | 469 | return len; |
252b5132 RH |
470 | } |
471 | ||
fc05c67f NC |
472 | /* REG format. */ |
473 | ||
252b5132 | 474 | static void |
fc05c67f NC |
475 | reg (word1) |
476 | unsigned long word1; | |
252b5132 | 477 | { |
fc05c67f NC |
478 | int i, j; |
479 | int opcode; | |
480 | int fp; | |
481 | int m1, m2, m3; | |
482 | int s1, s2; | |
483 | int src, src2, dst; | |
484 | char *mnemp; | |
485 | ||
486 | /* This lookup table is too sparse to make it worth typing in, but not | |
487 | so large as to make a sparse array necessary. We create the table | |
488 | at runtime. */ | |
489 | ||
490 | /* NOTE: In this table, the meaning of 'numops' is: | |
491 | 1: single operand, which is NOT a destination. | |
492 | -1: single operand, which IS a destination. | |
493 | 2: 2 operands, the 2nd of which is NOT a destination. | |
494 | -2: 2 operands, the 2nd of which IS a destination. | |
495 | 3: 3 operands | |
496 | ||
497 | If an opcode mnemonic begins with "F", it is a floating-point | |
498 | opcode (the "F" is not printed). */ | |
499 | ||
500 | static struct tabent *reg_tab; | |
501 | static const struct sparse_tabent reg_init[] = | |
502 | { | |
252b5132 | 503 | #define REG_MIN 0x580 |
fc05c67f NC |
504 | { 0x580, "notbit", 3 }, |
505 | { 0x581, "and", 3 }, | |
506 | { 0x582, "andnot", 3 }, | |
507 | { 0x583, "setbit", 3 }, | |
508 | { 0x584, "notand", 3 }, | |
509 | { 0x586, "xor", 3 }, | |
510 | { 0x587, "or", 3 }, | |
511 | { 0x588, "nor", 3 }, | |
512 | { 0x589, "xnor", 3 }, | |
513 | { 0x58a, "not", -2 }, | |
514 | { 0x58b, "ornot", 3 }, | |
515 | { 0x58c, "clrbit", 3 }, | |
516 | { 0x58d, "notor", 3 }, | |
517 | { 0x58e, "nand", 3 }, | |
518 | { 0x58f, "alterbit", 3 }, | |
519 | { 0x590, "addo", 3 }, | |
520 | { 0x591, "addi", 3 }, | |
521 | { 0x592, "subo", 3 }, | |
522 | { 0x593, "subi", 3 }, | |
523 | { 0x594, "cmpob", 2 }, | |
524 | { 0x595, "cmpib", 2 }, | |
525 | { 0x596, "cmpos", 2 }, | |
526 | { 0x597, "cmpis", 2 }, | |
527 | { 0x598, "shro", 3 }, | |
528 | { 0x59a, "shrdi", 3 }, | |
529 | { 0x59b, "shri", 3 }, | |
530 | { 0x59c, "shlo", 3 }, | |
531 | { 0x59d, "rotate", 3 }, | |
532 | { 0x59e, "shli", 3 }, | |
533 | { 0x5a0, "cmpo", 2 }, | |
534 | { 0x5a1, "cmpi", 2 }, | |
535 | { 0x5a2, "concmpo", 2 }, | |
536 | { 0x5a3, "concmpi", 2 }, | |
537 | { 0x5a4, "cmpinco", 3 }, | |
538 | { 0x5a5, "cmpinci", 3 }, | |
539 | { 0x5a6, "cmpdeco", 3 }, | |
540 | { 0x5a7, "cmpdeci", 3 }, | |
541 | { 0x5ac, "scanbyte", 2 }, | |
542 | { 0x5ad, "bswap", -2 }, | |
543 | { 0x5ae, "chkbit", 2 }, | |
544 | { 0x5b0, "addc", 3 }, | |
545 | { 0x5b2, "subc", 3 }, | |
546 | { 0x5b4, "intdis", 0 }, | |
547 | { 0x5b5, "inten", 0 }, | |
548 | { 0x5cc, "mov", -2 }, | |
549 | { 0x5d8, "eshro", 3 }, | |
550 | { 0x5dc, "movl", -2 }, | |
551 | { 0x5ec, "movt", -2 }, | |
552 | { 0x5fc, "movq", -2 }, | |
553 | { 0x600, "synmov", 2 }, | |
554 | { 0x601, "synmovl", 2 }, | |
555 | { 0x602, "synmovq", 2 }, | |
556 | { 0x603, "cmpstr", 3 }, | |
557 | { 0x604, "movqstr", 3 }, | |
558 | { 0x605, "movstr", 3 }, | |
559 | { 0x610, "atmod", 3 }, | |
560 | { 0x612, "atadd", 3 }, | |
561 | { 0x613, "inspacc", -2 }, | |
562 | { 0x614, "ldphy", -2 }, | |
563 | { 0x615, "synld", -2 }, | |
564 | { 0x617, "fill", 3 }, | |
565 | { 0x630, "sdma", 3 }, | |
566 | { 0x631, "udma", 0 }, | |
567 | { 0x640, "spanbit", -2 }, | |
568 | { 0x641, "scanbit", -2 }, | |
569 | { 0x642, "daddc", 3 }, | |
570 | { 0x643, "dsubc", 3 }, | |
571 | { 0x644, "dmovt", -2 }, | |
572 | { 0x645, "modac", 3 }, | |
573 | { 0x646, "condrec", -2 }, | |
574 | { 0x650, "modify", 3 }, | |
575 | { 0x651, "extract", 3 }, | |
576 | { 0x654, "modtc", 3 }, | |
577 | { 0x655, "modpc", 3 }, | |
578 | { 0x656, "receive", -2 }, | |
579 | { 0x658, "intctl", -2 }, | |
580 | { 0x659, "sysctl", 3 }, | |
581 | { 0x65b, "icctl", 3 }, | |
582 | { 0x65c, "dcctl", 3 }, | |
583 | { 0x65d, "halt", 0 }, | |
584 | { 0x660, "calls", 1 }, | |
585 | { 0x662, "send", 3 }, | |
586 | { 0x663, "sendserv", 1 }, | |
587 | { 0x664, "resumprcs", 1 }, | |
588 | { 0x665, "schedprcs", 1 }, | |
589 | { 0x666, "saveprcs", 0 }, | |
590 | { 0x668, "condwait", 1 }, | |
591 | { 0x669, "wait", 1 }, | |
592 | { 0x66a, "signal", 1 }, | |
593 | { 0x66b, "mark", 0 }, | |
594 | { 0x66c, "fmark", 0 }, | |
595 | { 0x66d, "flushreg", 0 }, | |
596 | { 0x66f, "syncf", 0 }, | |
597 | { 0x670, "emul", 3 }, | |
598 | { 0x671, "ediv", 3 }, | |
599 | { 0x673, "ldtime", -1 }, | |
600 | { 0x674, "Fcvtir", -2 }, | |
601 | { 0x675, "Fcvtilr", -2 }, | |
602 | { 0x676, "Fscalerl", 3 }, | |
603 | { 0x677, "Fscaler", 3 }, | |
604 | { 0x680, "Fatanr", 3 }, | |
605 | { 0x681, "Flogepr", 3 }, | |
606 | { 0x682, "Flogr", 3 }, | |
607 | { 0x683, "Fremr", 3 }, | |
608 | { 0x684, "Fcmpor", 2 }, | |
609 | { 0x685, "Fcmpr", 2 }, | |
610 | { 0x688, "Fsqrtr", -2 }, | |
611 | { 0x689, "Fexpr", -2 }, | |
612 | { 0x68a, "Flogbnr", -2 }, | |
613 | { 0x68b, "Froundr", -2 }, | |
614 | { 0x68c, "Fsinr", -2 }, | |
615 | { 0x68d, "Fcosr", -2 }, | |
616 | { 0x68e, "Ftanr", -2 }, | |
617 | { 0x68f, "Fclassr", 1 }, | |
618 | { 0x690, "Fatanrl", 3 }, | |
619 | { 0x691, "Flogeprl", 3 }, | |
620 | { 0x692, "Flogrl", 3 }, | |
621 | { 0x693, "Fremrl", 3 }, | |
622 | { 0x694, "Fcmporl", 2 }, | |
623 | { 0x695, "Fcmprl", 2 }, | |
624 | { 0x698, "Fsqrtrl", -2 }, | |
625 | { 0x699, "Fexprl", -2 }, | |
626 | { 0x69a, "Flogbnrl", -2 }, | |
627 | { 0x69b, "Froundrl", -2 }, | |
628 | { 0x69c, "Fsinrl", -2 }, | |
629 | { 0x69d, "Fcosrl", -2 }, | |
630 | { 0x69e, "Ftanrl", -2 }, | |
631 | { 0x69f, "Fclassrl", 1 }, | |
632 | { 0x6c0, "Fcvtri", -2 }, | |
633 | { 0x6c1, "Fcvtril", -2 }, | |
634 | { 0x6c2, "Fcvtzri", -2 }, | |
635 | { 0x6c3, "Fcvtzril", -2 }, | |
636 | { 0x6c9, "Fmovr", -2 }, | |
637 | { 0x6d9, "Fmovrl", -2 }, | |
638 | { 0x6e1, "Fmovre", -2 }, | |
639 | { 0x6e2, "Fcpysre", 3 }, | |
640 | { 0x6e3, "Fcpyrsre", 3 }, | |
641 | { 0x701, "mulo", 3 }, | |
642 | { 0x708, "remo", 3 }, | |
643 | { 0x70b, "divo", 3 }, | |
644 | { 0x741, "muli", 3 }, | |
645 | { 0x748, "remi", 3 }, | |
646 | { 0x749, "modi", 3 }, | |
647 | { 0x74b, "divi", 3 }, | |
648 | { 0x780, "addono", 3 }, | |
649 | { 0x781, "addino", 3 }, | |
650 | { 0x782, "subono", 3 }, | |
651 | { 0x783, "subino", 3 }, | |
652 | { 0x784, "selno", 3 }, | |
653 | { 0x78b, "Fdivr", 3 }, | |
654 | { 0x78c, "Fmulr", 3 }, | |
655 | { 0x78d, "Fsubr", 3 }, | |
656 | { 0x78f, "Faddr", 3 }, | |
657 | { 0x790, "addog", 3 }, | |
658 | { 0x791, "addig", 3 }, | |
659 | { 0x792, "subog", 3 }, | |
660 | { 0x793, "subig", 3 }, | |
661 | { 0x794, "selg", 3 }, | |
662 | { 0x79b, "Fdivrl", 3 }, | |
663 | { 0x79c, "Fmulrl", 3 }, | |
664 | { 0x79d, "Fsubrl", 3 }, | |
665 | { 0x79f, "Faddrl", 3 }, | |
666 | { 0x7a0, "addoe", 3 }, | |
667 | { 0x7a1, "addie", 3 }, | |
668 | { 0x7a2, "suboe", 3 }, | |
669 | { 0x7a3, "subie", 3 }, | |
670 | { 0x7a4, "sele", 3 }, | |
671 | { 0x7b0, "addoge", 3 }, | |
672 | { 0x7b1, "addige", 3 }, | |
673 | { 0x7b2, "suboge", 3 }, | |
674 | { 0x7b3, "subige", 3 }, | |
675 | { 0x7b4, "selge", 3 }, | |
676 | { 0x7c0, "addol", 3 }, | |
677 | { 0x7c1, "addil", 3 }, | |
678 | { 0x7c2, "subol", 3 }, | |
679 | { 0x7c3, "subil", 3 }, | |
680 | { 0x7c4, "sell", 3 }, | |
681 | { 0x7d0, "addone", 3 }, | |
682 | { 0x7d1, "addine", 3 }, | |
683 | { 0x7d2, "subone", 3 }, | |
684 | { 0x7d3, "subine", 3 }, | |
685 | { 0x7d4, "selne", 3 }, | |
686 | { 0x7e0, "addole", 3 }, | |
687 | { 0x7e1, "addile", 3 }, | |
688 | { 0x7e2, "subole", 3 }, | |
689 | { 0x7e3, "subile", 3 }, | |
690 | { 0x7e4, "selle", 3 }, | |
691 | { 0x7f0, "addoo", 3 }, | |
692 | { 0x7f1, "addio", 3 }, | |
693 | { 0x7f2, "suboo", 3 }, | |
694 | { 0x7f3, "subio", 3 }, | |
695 | { 0x7f4, "selo", 3 }, | |
252b5132 | 696 | #define REG_MAX 0x7f4 |
fc05c67f NC |
697 | { 0, NULL, 0 } |
698 | }; | |
699 | static struct tabent reg_tab_buf[REG_MAX - REG_MIN + 1]; | |
252b5132 | 700 | |
fc05c67f NC |
701 | if (reg_tab == NULL) |
702 | { | |
703 | reg_tab = reg_tab_buf; | |
252b5132 | 704 | |
fc05c67f NC |
705 | for (i = 0; reg_init[i].opcode != 0; i++) |
706 | { | |
707 | j = reg_init[i].opcode - REG_MIN; | |
708 | reg_tab[j].name = reg_init[i].name; | |
709 | reg_tab[j].numops = reg_init[i].numops; | |
252b5132 | 710 | } |
fc05c67f | 711 | } |
252b5132 | 712 | |
fc05c67f NC |
713 | opcode = ((word1 >> 20) & 0xff0) | ((word1 >> 7) & 0xf); |
714 | i = opcode - REG_MIN; | |
252b5132 | 715 | |
fc05c67f NC |
716 | if ((opcode<REG_MIN) || (opcode>REG_MAX) || (reg_tab[i].name==NULL)) |
717 | { | |
718 | invalid (word1); | |
719 | return; | |
720 | } | |
721 | ||
722 | mnemp = reg_tab[i].name; | |
723 | if (*mnemp == 'F') | |
724 | { | |
725 | fp = 1; | |
726 | mnemp++; | |
727 | } | |
728 | else | |
729 | { | |
730 | fp = 0; | |
731 | } | |
732 | ||
733 | (*info->fprintf_func) (stream, mnemp); | |
734 | ||
735 | s1 = (word1 >> 5) & 1; | |
736 | s2 = (word1 >> 6) & 1; | |
737 | m1 = (word1 >> 11) & 1; | |
738 | m2 = (word1 >> 12) & 1; | |
739 | m3 = (word1 >> 13) & 1; | |
740 | src = word1 & 0x1f; | |
741 | src2 = (word1 >> 14) & 0x1f; | |
742 | dst = (word1 >> 19) & 0x1f; | |
743 | ||
744 | if (reg_tab[i].numops != 0) | |
745 | { | |
746 | (*info->fprintf_func) (stream, "\t"); | |
747 | ||
748 | switch (reg_tab[i].numops) | |
749 | { | |
750 | case 1: | |
751 | regop (m1, s1, src, fp); | |
752 | break; | |
753 | case -1: | |
754 | dstop (m3, dst, fp); | |
755 | break; | |
756 | case 2: | |
757 | regop (m1, s1, src, fp); | |
758 | (*info->fprintf_func) (stream, ","); | |
759 | regop (m2, s2, src2, fp); | |
760 | break; | |
761 | case -2: | |
762 | regop (m1, s1, src, fp); | |
763 | (*info->fprintf_func) (stream, ","); | |
764 | dstop (m3, dst, fp); | |
765 | break; | |
766 | case 3: | |
767 | regop (m1, s1, src, fp); | |
768 | (*info->fprintf_func) (stream, ","); | |
769 | regop (m2, s2, src2, fp); | |
770 | (*info->fprintf_func) (stream, ","); | |
771 | dstop (m3, dst, fp); | |
772 | break; | |
773 | } | |
774 | } | |
252b5132 RH |
775 | } |
776 | ||
fc05c67f | 777 | /* Print out effective address for memb instructions. */ |
252b5132 | 778 | |
252b5132 | 779 | static void |
fc05c67f | 780 | ea (memaddr, mode, reg2, reg3, word1, word2) |
252b5132 RH |
781 | bfd_vma memaddr; |
782 | int mode; | |
fc05c67f NC |
783 | const char *reg2; |
784 | const char *reg3; | |
252b5132 RH |
785 | int word1; |
786 | unsigned int word2; | |
787 | { | |
fc05c67f NC |
788 | int scale; |
789 | static const int scale_tab[] = { 1, 2, 4, 8, 16 }; | |
252b5132 | 790 | |
fc05c67f NC |
791 | scale = (word1 >> 7) & 0x07; |
792 | ||
793 | if ((scale > 4) || (((word1 >> 5) & 0x03) != 0)) | |
794 | { | |
795 | invalid (word1); | |
796 | return; | |
797 | } | |
798 | scale = scale_tab[scale]; | |
799 | ||
800 | switch (mode) | |
801 | { | |
802 | case 4: /* (reg) */ | |
803 | (*info->fprintf_func)( stream, "(%s)", reg2 ); | |
804 | break; | |
805 | case 5: /* displ+8(ip) */ | |
806 | print_addr (word2 + 8 + memaddr); | |
807 | break; | |
808 | case 7: /* (reg)[index*scale] */ | |
809 | if (scale == 1) | |
810 | (*info->fprintf_func) (stream, "(%s)[%s]", reg2, reg3); | |
811 | else | |
812 | (*info->fprintf_func) (stream, "(%s)[%s*%d]", reg2, reg3, scale); | |
813 | break; | |
814 | case 12: /* displacement */ | |
815 | print_addr ((bfd_vma) word2); | |
816 | break; | |
817 | case 13: /* displ(reg) */ | |
818 | print_addr ((bfd_vma) word2); | |
819 | (*info->fprintf_func) (stream, "(%s)", reg2); | |
820 | break; | |
821 | case 14: /* displ[index*scale] */ | |
822 | print_addr ((bfd_vma) word2); | |
823 | if (scale == 1) | |
824 | (*info->fprintf_func) (stream, "[%s]", reg3); | |
825 | else | |
826 | (*info->fprintf_func) (stream, "[%s*%d]", reg3, scale); | |
827 | break; | |
828 | case 15: /* displ(reg)[index*scale] */ | |
829 | print_addr ((bfd_vma) word2); | |
830 | if (scale == 1) | |
831 | (*info->fprintf_func) (stream, "(%s)[%s]", reg2, reg3); | |
832 | else | |
833 | (*info->fprintf_func) (stream, "(%s)[%s*%d]", reg2, reg3, scale); | |
834 | break; | |
835 | default: | |
836 | invalid (word1); | |
837 | return; | |
838 | } | |
252b5132 RH |
839 | } |
840 | ||
841 | ||
fc05c67f NC |
842 | /* Register Instruction Operand. */ |
843 | ||
252b5132 | 844 | static void |
fc05c67f NC |
845 | regop (mode, spec, reg, fp) |
846 | int mode, spec, reg, fp; | |
252b5132 | 847 | { |
fc05c67f NC |
848 | if (fp) |
849 | { | |
850 | /* Floating point instruction. */ | |
851 | if (mode == 1) | |
852 | { | |
853 | /* FP operand. */ | |
854 | switch (reg) | |
855 | { | |
856 | case 0: (*info->fprintf_func) (stream, "fp0"); | |
857 | break; | |
858 | case 1: (*info->fprintf_func) (stream, "fp1"); | |
859 | break; | |
860 | case 2: (*info->fprintf_func) (stream, "fp2"); | |
861 | break; | |
862 | case 3: (*info->fprintf_func) (stream, "fp3"); | |
863 | break; | |
864 | case 16: (*info->fprintf_func) (stream, "0f0.0"); | |
865 | break; | |
866 | case 22: (*info->fprintf_func) (stream, "0f1.0"); | |
867 | break; | |
868 | default: (*info->fprintf_func) (stream, "?"); | |
869 | break; | |
870 | } | |
871 | } | |
872 | else | |
873 | { | |
874 | /* Non-FP register. */ | |
875 | (*info->fprintf_func) (stream, reg_names[reg]); | |
876 | } | |
877 | } | |
878 | else | |
879 | { | |
880 | /* Not floating point. */ | |
881 | if (mode == 1) | |
882 | { | |
883 | /* Literal. */ | |
884 | (*info->fprintf_func) (stream, "%d", reg); | |
885 | } | |
886 | else | |
887 | { | |
888 | /* Register. */ | |
889 | if (spec == 0) | |
890 | (*info->fprintf_func) (stream, reg_names[reg]); | |
891 | else | |
892 | (*info->fprintf_func) (stream, "sf%d", reg); | |
252b5132 | 893 | } |
fc05c67f | 894 | } |
252b5132 RH |
895 | } |
896 | ||
fc05c67f NC |
897 | /* Register Instruction Destination Operand. */ |
898 | ||
252b5132 | 899 | static void |
fc05c67f NC |
900 | dstop (mode, reg, fp) |
901 | int mode, reg, fp; | |
252b5132 | 902 | { |
fc05c67f NC |
903 | /* 'dst' operand can't be a literal. On non-FP instructions, register |
904 | mode is assumed and "m3" acts as if were "s3"; on FP-instructions, | |
905 | sf registers are not allowed so m3 acts normally. */ | |
906 | if (fp) | |
907 | regop (mode, 0, reg, fp); | |
908 | else | |
909 | regop (0, mode, reg, fp); | |
252b5132 RH |
910 | } |
911 | ||
252b5132 | 912 | static void |
fc05c67f NC |
913 | invalid (word1) |
914 | int word1; | |
252b5132 | 915 | { |
fc05c67f | 916 | (*info->fprintf_func) (stream, ".word\t0x%08x", (unsigned) word1); |
7fa108a4 | 917 | } |
252b5132 RH |
918 | |
919 | static void | |
fc05c67f NC |
920 | print_addr (a) |
921 | bfd_vma a; | |
252b5132 RH |
922 | { |
923 | (*info->print_address_func) (a, info); | |
924 | } | |
925 | ||
926 | static void | |
fc05c67f NC |
927 | put_abs (word1, word2) |
928 | unsigned long word1 ATTRIBUTE_UNUSED; | |
929 | unsigned long word2 ATTRIBUTE_UNUSED; | |
252b5132 RH |
930 | { |
931 | #ifdef IN_GDB | |
fc05c67f | 932 | return; |
252b5132 | 933 | #else |
fc05c67f | 934 | int len; |
252b5132 | 935 | |
fc05c67f NC |
936 | switch ((word1 >> 28) & 0xf) |
937 | { | |
938 | case 0x8: | |
939 | case 0x9: | |
940 | case 0xa: | |
941 | case 0xb: | |
942 | case 0xc: | |
943 | /* MEM format instruction. */ | |
944 | len = mem (0, word1, word2, 1); | |
945 | break; | |
946 | default: | |
947 | len = 4; | |
948 | break; | |
949 | } | |
252b5132 | 950 | |
fc05c67f NC |
951 | if (len == 8) |
952 | (*info->fprintf_func) (stream, "%08x %08x\t", word1, word2); | |
953 | else | |
954 | (*info->fprintf_func) (stream, "%08x \t", word1); | |
252b5132 RH |
955 | #endif |
956 | } |