projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 800eeca4 JW |
1 | Resource Name; Writers; Writers; Semantics of Dependency |
| 2 | ALAT; IC:mem-readers-alat, IC:mem-writers, chk.a.clr, IC:invala-all; IC:mem-readers-alat, IC:mem-writers, chk.a.clr, IC:invala-all; none | |
| 3 | AR[BSP]; br.call, brl.call, br.ret, cover, IC:mov-to-AR-BSPSTORE, rfi; br.call, brl.call, br.ret, cover, IC:mov-to-AR-BSPSTORE, rfi; impliedF | |
| 4 | AR[BSPSTORE]; alloc, loadrs, flushrs, IC:mov-to-AR-BSPSTORE; alloc, loadrs, flushrs, IC:mov-to-AR-BSPSTORE; impliedF | |
| 5 | AR[CCV]; IC:mov-to-AR-CCV; IC:mov-to-AR-CCV; impliedF | |
| c10d9d8f JW |
6 | AR[CFLG]; IC:mov-to-AR-CFLG; IC:mov-to-AR-CFLG; impliedF |
| 7 | AR[CSD]; ld16, IC:mov-to-AR-CSD; ld16, IC:mov-to-AR-CSD; impliedF | |
| 800eeca4 | 8 | AR[EC]; br.ret, IC:mod-sched-brs, IC:mov-to-AR-EC; br.ret, IC:mod-sched-brs, IC:mov-to-AR-EC; impliedF |
| 7f3dfb9c L |
9 | AR[EFLAG]; IC:mov-to-AR-EFLAG; IC:mov-to-AR-EFLAG; impliedF |
| 10 | AR[FCR]; IC:mov-to-AR-FCR; IC:mov-to-AR-FCR; impliedF | |
| 11 | AR[FDR]; IC:mov-to-AR-FDR; IC:mov-to-AR-FDR; impliedF | |
| 12 | AR[FIR]; IC:mov-to-AR-FIR; IC:mov-to-AR-FIR; impliedF | |
| 800eeca4 JW |
13 | AR[FPSR].sf0.controls; IC:mov-to-AR-FPSR, fsetc.s0; IC:mov-to-AR-FPSR, fsetc.s0; impliedF |
| 14 | AR[FPSR].sf1.controls; IC:mov-to-AR-FPSR, fsetc.s1; IC:mov-to-AR-FPSR, fsetc.s1; impliedF | |
| 15 | AR[FPSR].sf2.controls; IC:mov-to-AR-FPSR, fsetc.s2; IC:mov-to-AR-FPSR, fsetc.s2; impliedF | |
| 16 | AR[FPSR].sf3.controls; IC:mov-to-AR-FPSR, fsetc.s3; IC:mov-to-AR-FPSR, fsetc.s3; impliedF | |
| 17 | AR[FPSR].sf0.flags; IC:fp-arith-s0, IC:fcmp-s0, IC:fpcmp-s0; IC:fp-arith-s0, IC:fcmp-s0, IC:fpcmp-s0; none | |
| 18 | AR[FPSR].sf0.flags; fclrf.s0, IC:fcmp-s0, IC:fp-arith-s0, IC:fpcmp-s0, IC:mov-to-AR-FPSR; fclrf.s0, IC:mov-to-AR-FPSR; impliedF | |
| 19 | AR[FPSR].sf1.flags; IC:fp-arith-s1, IC:fcmp-s1, IC:fpcmp-s1; IC:fp-arith-s1, IC:fcmp-s1, IC:fpcmp-s1; none | |
| 20 | AR[FPSR].sf1.flags; fclrf.s1, IC:fcmp-s1, IC:fp-arith-s1, IC:fpcmp-s1, IC:mov-to-AR-FPSR; fclrf.s1, IC:mov-to-AR-FPSR; impliedF | |
| 21 | AR[FPSR].sf2.flags; IC:fp-arith-s2, IC:fcmp-s2, IC:fpcmp-s2; IC:fp-arith-s2, IC:fcmp-s2, IC:fpcmp-s2; none | |
| 22 | AR[FPSR].sf2.flags; fclrf.s2, IC:fcmp-s2, IC:fp-arith-s2, IC:fpcmp-s2, IC:mov-to-AR-FPSR; fclrf.s2, IC:mov-to-AR-FPSR; impliedF | |
| 23 | AR[FPSR].sf3.flags; IC:fp-arith-s3, IC:fcmp-s3, IC:fpcmp-s3; IC:fp-arith-s3, IC:fcmp-s3, IC:fpcmp-s3; none | |
| 24 | AR[FPSR].sf3.flags; fclrf.s3, IC:fcmp-s3, IC:fp-arith-s3, IC:fpcmp-s3, IC:mov-to-AR-FPSR; fclrf.s3, IC:mov-to-AR-FPSR; impliedF | |
| 25 | AR[FPSR].rv; IC:mov-to-AR-FPSR; IC:mov-to-AR-FPSR; impliedF | |
| 26 | AR[FPSR].traps; IC:mov-to-AR-FPSR; IC:mov-to-AR-FPSR; impliedF | |
| c10d9d8f | 27 | AR[FSR]; IC:mov-to-AR-FSR; IC:mov-to-AR-FSR; impliedF |
| 800eeca4 JW |
28 | AR[ITC]; IC:mov-to-AR-ITC; IC:mov-to-AR-ITC; impliedF |
| 29 | AR[K%], % in 0 - 7; IC:mov-to-AR-K+1; IC:mov-to-AR-K+1; impliedF | |
| 30 | AR[LC]; IC:mod-sched-brs-counted, IC:mov-to-AR-LC; IC:mod-sched-brs-counted, IC:mov-to-AR-LC; impliedF | |
| 31 | AR[PFS]; br.call, brl.call; br.call, brl.call; none | |
| 32 | AR[PFS]; br.call, brl.call; IC:mov-to-AR-PFS; impliedF | |
| 33 | AR[RNAT]; alloc, flushrs, loadrs, IC:mov-to-AR-RNAT, IC:mov-to-AR-BSPSTORE; alloc, flushrs, loadrs, IC:mov-to-AR-RNAT, IC:mov-to-AR-BSPSTORE; impliedF | |
| 34 | AR[RSC]; IC:mov-to-AR-RSC; IC:mov-to-AR-RSC; impliedF | |
| 4f8631b1 | 35 | AR[RUC]; IC:mov-to-AR-RUC; IC:mov-to-AR-RUC; impliedF |
| 7f3dfb9c | 36 | AR[SSD]; IC:mov-to-AR-SSD; IC:mov-to-AR-SSD; impliedF |
| 800eeca4 | 37 | AR[UNAT]{%}, % in 0 - 63; IC:mov-to-AR-UNAT, st8.spill; IC:mov-to-AR-UNAT, st8.spill; impliedF |
| 4f8631b1 | 38 | AR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 46-47, 67-111; IC:none; IC:none; none |
| 800eeca4 JW |
39 | AR%, % in 48 - 63, 112-127; IC:mov-to-AR-ig+1; IC:mov-to-AR-ig+1; impliedF |
| 40 | BR%, % in 0 - 7; br.call+1, brl.call+1; IC:mov-to-BR+1; impliedF | |
| 41 | BR%, % in 0 - 7; IC:mov-to-BR+1; IC:mov-to-BR+1; impliedF | |
| 42 | BR%, % in 0 - 7; br.call+1, brl.call+1; br.call+1, brl.call+1; none | |
| 43 | CFM; IC:mod-sched-brs, br.call, brl.call, br.ret, alloc, clrrrb, cover, rfi; IC:mod-sched-brs, br.call, brl.call, br.ret, alloc, clrrrb, cover, rfi; impliedF | |
| 44 | CPUID#; IC:none; IC:none; none | |
| 45 | CR[CMCV]; IC:mov-to-CR-CMCV; IC:mov-to-CR-CMCV; impliedF | |
| 46 | CR[DCR]; IC:mov-to-CR-DCR; IC:mov-to-CR-DCR; impliedF |