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4162bb66 | 1 | /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ |
47b1a55a SC |
2 | /* Assembler interface for targets using CGEN. -*- C -*- |
3 | CGEN: Cpu tools GENerator | |
4 | ||
47b0e7ad NC |
5 | THIS FILE IS MACHINE GENERATED WITH CGEN. |
6 | - the resultant file is machine generated, cgen-asm.in isn't | |
47b1a55a | 7 | |
82704155 | 8 | Copyright (C) 1996-2019 Free Software Foundation, Inc. |
47b1a55a | 9 | |
9b201bb5 | 10 | This file is part of libopcodes. |
47b1a55a | 11 | |
9b201bb5 | 12 | This library is free software; you can redistribute it and/or modify |
47b0e7ad | 13 | it under the terms of the GNU General Public License as published by |
9b201bb5 | 14 | the Free Software Foundation; either version 3, or (at your option) |
47b0e7ad | 15 | any later version. |
47b1a55a | 16 | |
9b201bb5 NC |
17 | It is distributed in the hope that it will be useful, but WITHOUT |
18 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
19 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
20 | License for more details. | |
47b1a55a | 21 | |
47b0e7ad NC |
22 | You should have received a copy of the GNU General Public License |
23 | along with this program; if not, write to the Free Software Foundation, Inc., | |
24 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ | |
47b1a55a | 25 | |
9b201bb5 | 26 | |
47b1a55a SC |
27 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. |
28 | Keep that in mind. */ | |
29 | ||
30 | #include "sysdep.h" | |
31 | #include <stdio.h> | |
32 | #include "ansidecl.h" | |
33 | #include "bfd.h" | |
34 | #include "symcat.h" | |
35 | #include "iq2000-desc.h" | |
36 | #include "iq2000-opc.h" | |
37 | #include "opintl.h" | |
38 | #include "xregex.h" | |
39 | #include "libiberty.h" | |
40 | #include "safe-ctype.h" | |
41 | ||
42 | #undef min | |
43 | #define min(a,b) ((a) < (b) ? (a) : (b)) | |
44 | #undef max | |
45 | #define max(a,b) ((a) > (b) ? (a) : (b)) | |
46 | ||
47 | static const char * parse_insn_normal | |
ffead7ae | 48 | (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *); |
47b1a55a SC |
49 | \f |
50 | /* -- assembler routines inserted here. */ | |
51 | ||
52 | /* -- asm.c */ | |
4030fa5a NC |
53 | |
54 | #include "safe-ctype.h" | |
55 | ||
47b0e7ad NC |
56 | static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'"); |
57 | ||
58 | /* Special check to ensure that instruction exists for given machine. */ | |
47b1a55a | 59 | |
47b1a55a | 60 | int |
47b0e7ad | 61 | iq2000_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) |
47b1a55a SC |
62 | { |
63 | int machs = cd->machs; | |
64 | ||
47b0e7ad | 65 | return (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0; |
47b1a55a SC |
66 | } |
67 | ||
47b0e7ad NC |
68 | static int |
69 | iq2000_cgen_isa_register (const char **strp) | |
47b1a55a SC |
70 | { |
71 | int len; | |
72 | int ch1, ch2; | |
47b0e7ad | 73 | |
43e65147 | 74 | if (**strp == 'r' || **strp == 'R') |
47b1a55a SC |
75 | { |
76 | len = strlen (*strp); | |
43e65147 | 77 | if (len == 2) |
47b1a55a SC |
78 | { |
79 | ch1 = (*strp)[1]; | |
80 | if ('0' <= ch1 && ch1 <= '9') | |
81 | return 1; | |
43e65147 L |
82 | } |
83 | else if (len == 3) | |
47b1a55a SC |
84 | { |
85 | ch1 = (*strp)[1]; | |
86 | ch2 = (*strp)[2]; | |
87 | if (('1' <= ch1 && ch1 <= '2') && ('0' <= ch2 && ch2 <= '9')) | |
88 | return 1; | |
89 | if ('3' == ch1 && (ch2 == '0' || ch2 == '1')) | |
90 | return 1; | |
91 | } | |
92 | } | |
47b0e7ad NC |
93 | if (**strp == '%' |
94 | && TOLOWER ((*strp)[1]) != 'l' | |
95 | && TOLOWER ((*strp)[1]) != 'h') | |
47b1a55a SC |
96 | return 1; |
97 | return 0; | |
98 | } | |
99 | ||
100 | /* Handle negated literal. */ | |
101 | ||
102 | static const char * | |
47b0e7ad NC |
103 | parse_mimm (CGEN_CPU_DESC cd, |
104 | const char **strp, | |
105 | int opindex, | |
106 | unsigned long *valuep) | |
47b1a55a SC |
107 | { |
108 | const char *errmsg; | |
47b1a55a | 109 | |
33b71eeb | 110 | /* Verify this isn't a register. */ |
47b1a55a SC |
111 | if (iq2000_cgen_isa_register (strp)) |
112 | errmsg = _("immediate value cannot be register"); | |
113 | else | |
114 | { | |
115 | long value; | |
43e65147 | 116 | |
47b1a55a SC |
117 | errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); |
118 | if (errmsg == NULL) | |
119 | { | |
120 | long x = (-value) & 0xFFFF0000; | |
33b71eeb | 121 | |
4030fa5a | 122 | if (x != 0 && x != (long) 0xFFFF0000) |
47b1a55a SC |
123 | errmsg = _("immediate value out of range"); |
124 | else | |
125 | *valuep = (-value & 0xFFFF); | |
126 | } | |
127 | } | |
128 | return errmsg; | |
129 | } | |
130 | ||
131 | /* Handle signed/unsigned literal. */ | |
132 | ||
133 | static const char * | |
47b0e7ad NC |
134 | parse_imm (CGEN_CPU_DESC cd, |
135 | const char **strp, | |
136 | int opindex, | |
137 | unsigned long *valuep) | |
47b1a55a SC |
138 | { |
139 | const char *errmsg; | |
47b1a55a SC |
140 | |
141 | if (iq2000_cgen_isa_register (strp)) | |
142 | errmsg = _("immediate value cannot be register"); | |
143 | else | |
144 | { | |
145 | long value; | |
146 | ||
147 | errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); | |
148 | if (errmsg == NULL) | |
149 | { | |
150 | long x = value & 0xFFFF0000; | |
47b0e7ad | 151 | |
4030fa5a | 152 | if (x != 0 && x != (long) 0xFFFF0000) |
47b1a55a SC |
153 | errmsg = _("immediate value out of range"); |
154 | else | |
155 | *valuep = (value & 0xFFFF); | |
156 | } | |
157 | } | |
158 | return errmsg; | |
159 | } | |
160 | ||
161 | /* Handle iq10 21-bit jmp offset. */ | |
162 | ||
163 | static const char * | |
47b0e7ad NC |
164 | parse_jtargq10 (CGEN_CPU_DESC cd, |
165 | const char **strp, | |
166 | int opindex, | |
167 | int reloc ATTRIBUTE_UNUSED, | |
168 | enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED, | |
169 | bfd_vma *valuep) | |
47b1a55a SC |
170 | { |
171 | const char *errmsg; | |
172 | bfd_vma value; | |
173 | enum cgen_parse_operand_result result_type = CGEN_PARSE_OPERAND_RESULT_NUMBER; | |
174 | ||
175 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_OFFSET_21, | |
47b0e7ad | 176 | & result_type, & value); |
47b1a55a SC |
177 | if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) |
178 | { | |
47b0e7ad NC |
179 | /* Check value is within 23-bits |
180 | (remembering that 2-bit shift right will occur). */ | |
47b1a55a SC |
181 | if (value > 0x7fffff) |
182 | return _("21-bit offset out of range"); | |
183 | } | |
184 | *valuep = (value & 0x7FFFFF); | |
185 | return errmsg; | |
186 | } | |
187 | ||
188 | /* Handle high(). */ | |
189 | ||
190 | static const char * | |
47b0e7ad NC |
191 | parse_hi16 (CGEN_CPU_DESC cd, |
192 | const char **strp, | |
193 | int opindex, | |
194 | unsigned long *valuep) | |
47b1a55a SC |
195 | { |
196 | if (strncasecmp (*strp, "%hi(", 4) == 0) | |
197 | { | |
198 | enum cgen_parse_operand_result result_type; | |
199 | bfd_vma value; | |
200 | const char *errmsg; | |
201 | ||
202 | *strp += 4; | |
203 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16, | |
47b0e7ad | 204 | & result_type, & value); |
47b1a55a | 205 | if (**strp != ')') |
47b0e7ad | 206 | return MISSING_CLOSING_PARENTHESIS; |
47b1a55a SC |
207 | |
208 | ++*strp; | |
209 | if (errmsg == NULL | |
210 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) | |
211 | { | |
47b0e7ad | 212 | /* If value has top-bit of %lo on, then it will |
47b1a55a | 213 | sign-propagate and so we compensate by adding |
47b0e7ad | 214 | 1 to the resultant %hi value. */ |
47b1a55a SC |
215 | if (value & 0x8000) |
216 | value += 0x10000; | |
217 | value >>= 16; | |
ed963e2d | 218 | value &= 0xffff; |
47b1a55a SC |
219 | } |
220 | *valuep = value; | |
221 | ||
222 | return errmsg; | |
223 | } | |
224 | ||
47b0e7ad NC |
225 | /* We add %uhi in case a user just wants the high 16-bits or is using |
226 | an insn like ori for %lo which does not sign-propagate. */ | |
47b1a55a SC |
227 | if (strncasecmp (*strp, "%uhi(", 5) == 0) |
228 | { | |
229 | enum cgen_parse_operand_result result_type; | |
230 | bfd_vma value; | |
231 | const char *errmsg; | |
232 | ||
233 | *strp += 5; | |
234 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_UHI16, | |
47b0e7ad | 235 | & result_type, & value); |
47b1a55a | 236 | if (**strp != ')') |
47b0e7ad | 237 | return MISSING_CLOSING_PARENTHESIS; |
47b1a55a SC |
238 | |
239 | ++*strp; | |
240 | if (errmsg == NULL | |
241 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) | |
47b0e7ad NC |
242 | value >>= 16; |
243 | ||
8536c657 | 244 | value &= 0xffff; |
47b1a55a SC |
245 | *valuep = value; |
246 | ||
247 | return errmsg; | |
248 | } | |
249 | ||
250 | return parse_imm (cd, strp, opindex, valuep); | |
251 | } | |
252 | ||
253 | /* Handle %lo in a signed context. | |
254 | The signedness of the value doesn't matter to %lo(), but this also | |
255 | handles the case where %lo() isn't present. */ | |
256 | ||
257 | static const char * | |
47b0e7ad NC |
258 | parse_lo16 (CGEN_CPU_DESC cd, |
259 | const char **strp, | |
260 | int opindex, | |
3ec2b351 | 261 | unsigned long *valuep) |
47b1a55a SC |
262 | { |
263 | if (strncasecmp (*strp, "%lo(", 4) == 0) | |
264 | { | |
265 | const char *errmsg; | |
266 | enum cgen_parse_operand_result result_type; | |
267 | bfd_vma value; | |
268 | ||
269 | *strp += 4; | |
270 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, | |
47b0e7ad | 271 | & result_type, & value); |
47b1a55a | 272 | if (**strp != ')') |
47b0e7ad | 273 | return MISSING_CLOSING_PARENTHESIS; |
47b1a55a SC |
274 | ++*strp; |
275 | if (errmsg == NULL | |
276 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) | |
277 | value &= 0xffff; | |
278 | *valuep = value; | |
279 | return errmsg; | |
280 | } | |
281 | ||
282 | return parse_imm (cd, strp, opindex, valuep); | |
283 | } | |
284 | ||
285 | /* Handle %lo in a negated signed context. | |
286 | The signedness of the value doesn't matter to %lo(), but this also | |
287 | handles the case where %lo() isn't present. */ | |
288 | ||
289 | static const char * | |
47b0e7ad NC |
290 | parse_mlo16 (CGEN_CPU_DESC cd, |
291 | const char **strp, | |
292 | int opindex, | |
3ec2b351 | 293 | unsigned long *valuep) |
47b1a55a SC |
294 | { |
295 | if (strncasecmp (*strp, "%lo(", 4) == 0) | |
296 | { | |
297 | const char *errmsg; | |
298 | enum cgen_parse_operand_result result_type; | |
299 | bfd_vma value; | |
300 | ||
301 | *strp += 4; | |
302 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, | |
47b0e7ad | 303 | & result_type, & value); |
47b1a55a | 304 | if (**strp != ')') |
47b0e7ad | 305 | return MISSING_CLOSING_PARENTHESIS; |
47b1a55a SC |
306 | ++*strp; |
307 | if (errmsg == NULL | |
308 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) | |
309 | value = (-value) & 0xffff; | |
310 | *valuep = value; | |
311 | return errmsg; | |
312 | } | |
313 | ||
314 | return parse_mimm (cd, strp, opindex, valuep); | |
315 | } | |
316 | ||
317 | /* -- */ | |
318 | ||
319 | const char * iq2000_cgen_parse_operand | |
47b0e7ad | 320 | (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *); |
47b1a55a SC |
321 | |
322 | /* Main entry point for operand parsing. | |
323 | ||
324 | This function is basically just a big switch statement. Earlier versions | |
325 | used tables to look up the function to use, but | |
326 | - if the table contains both assembler and disassembler functions then | |
327 | the disassembler contains much of the assembler and vice-versa, | |
328 | - there's a lot of inlining possibilities as things grow, | |
329 | - using a switch statement avoids the function call overhead. | |
330 | ||
331 | This function could be moved into `parse_insn_normal', but keeping it | |
332 | separate makes clear the interface between `parse_insn_normal' and each of | |
333 | the handlers. */ | |
334 | ||
335 | const char * | |
47b0e7ad NC |
336 | iq2000_cgen_parse_operand (CGEN_CPU_DESC cd, |
337 | int opindex, | |
338 | const char ** strp, | |
339 | CGEN_FIELDS * fields) | |
47b1a55a SC |
340 | { |
341 | const char * errmsg = NULL; | |
342 | /* Used by scalar operands that still need to be parsed. */ | |
343 | long junk ATTRIBUTE_UNUSED; | |
344 | ||
345 | switch (opindex) | |
346 | { | |
4030fa5a | 347 | case IQ2000_OPERAND__INDEX : |
33b71eeb | 348 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND__INDEX, (unsigned long *) (& fields->f_index)); |
4030fa5a | 349 | break; |
47b1a55a SC |
350 | case IQ2000_OPERAND_BASE : |
351 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs); | |
352 | break; | |
353 | case IQ2000_OPERAND_BASEOFF : | |
354 | { | |
9494d739 | 355 | bfd_vma value = 0; |
47b1a55a SC |
356 | errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_BASEOFF, 0, NULL, & value); |
357 | fields->f_imm = value; | |
358 | } | |
359 | break; | |
360 | case IQ2000_OPERAND_BITNUM : | |
33b71eeb | 361 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BITNUM, (unsigned long *) (& fields->f_rt)); |
47b1a55a SC |
362 | break; |
363 | case IQ2000_OPERAND_BYTECOUNT : | |
33b71eeb | 364 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BYTECOUNT, (unsigned long *) (& fields->f_bytecount)); |
47b1a55a SC |
365 | break; |
366 | case IQ2000_OPERAND_CAM_Y : | |
33b71eeb | 367 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Y, (unsigned long *) (& fields->f_cam_y)); |
47b1a55a SC |
368 | break; |
369 | case IQ2000_OPERAND_CAM_Z : | |
33b71eeb | 370 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Z, (unsigned long *) (& fields->f_cam_z)); |
47b1a55a SC |
371 | break; |
372 | case IQ2000_OPERAND_CM_3FUNC : | |
33b71eeb | 373 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3FUNC, (unsigned long *) (& fields->f_cm_3func)); |
47b1a55a SC |
374 | break; |
375 | case IQ2000_OPERAND_CM_3Z : | |
33b71eeb | 376 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3Z, (unsigned long *) (& fields->f_cm_3z)); |
47b1a55a SC |
377 | break; |
378 | case IQ2000_OPERAND_CM_4FUNC : | |
33b71eeb | 379 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4FUNC, (unsigned long *) (& fields->f_cm_4func)); |
47b1a55a SC |
380 | break; |
381 | case IQ2000_OPERAND_CM_4Z : | |
33b71eeb | 382 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4Z, (unsigned long *) (& fields->f_cm_4z)); |
47b1a55a SC |
383 | break; |
384 | case IQ2000_OPERAND_COUNT : | |
33b71eeb | 385 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_COUNT, (unsigned long *) (& fields->f_count)); |
47b1a55a SC |
386 | break; |
387 | case IQ2000_OPERAND_EXECODE : | |
33b71eeb | 388 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, (unsigned long *) (& fields->f_excode)); |
47b1a55a SC |
389 | break; |
390 | case IQ2000_OPERAND_HI16 : | |
33b71eeb | 391 | errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, (unsigned long *) (& fields->f_imm)); |
47b1a55a SC |
392 | break; |
393 | case IQ2000_OPERAND_IMM : | |
33b71eeb | 394 | errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, (unsigned long *) (& fields->f_imm)); |
47b1a55a | 395 | break; |
47b1a55a SC |
396 | case IQ2000_OPERAND_JMPTARG : |
397 | { | |
9494d739 | 398 | bfd_vma value = 0; |
47b1a55a SC |
399 | errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_JMPTARG, 0, NULL, & value); |
400 | fields->f_jtarg = value; | |
401 | } | |
402 | break; | |
403 | case IQ2000_OPERAND_JMPTARGQ10 : | |
404 | { | |
33b71eeb | 405 | bfd_vma value = 0; |
47b1a55a SC |
406 | errmsg = parse_jtargq10 (cd, strp, IQ2000_OPERAND_JMPTARGQ10, 0, NULL, & value); |
407 | fields->f_jtargq10 = value; | |
408 | } | |
409 | break; | |
410 | case IQ2000_OPERAND_LO16 : | |
33b71eeb | 411 | errmsg = parse_lo16 (cd, strp, IQ2000_OPERAND_LO16, (unsigned long *) (& fields->f_imm)); |
47b1a55a SC |
412 | break; |
413 | case IQ2000_OPERAND_MASK : | |
33b71eeb | 414 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASK, (unsigned long *) (& fields->f_mask)); |
47b1a55a SC |
415 | break; |
416 | case IQ2000_OPERAND_MASKL : | |
33b71eeb | 417 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKL, (unsigned long *) (& fields->f_maskl)); |
47b1a55a SC |
418 | break; |
419 | case IQ2000_OPERAND_MASKQ10 : | |
33b71eeb | 420 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKQ10, (unsigned long *) (& fields->f_maskq10)); |
47b1a55a SC |
421 | break; |
422 | case IQ2000_OPERAND_MASKR : | |
33b71eeb | 423 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKR, (unsigned long *) (& fields->f_rs)); |
47b1a55a SC |
424 | break; |
425 | case IQ2000_OPERAND_MLO16 : | |
33b71eeb | 426 | errmsg = parse_mlo16 (cd, strp, IQ2000_OPERAND_MLO16, (unsigned long *) (& fields->f_imm)); |
47b1a55a SC |
427 | break; |
428 | case IQ2000_OPERAND_OFFSET : | |
429 | { | |
9494d739 | 430 | bfd_vma value = 0; |
47b1a55a SC |
431 | errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_OFFSET, 0, NULL, & value); |
432 | fields->f_offset = value; | |
433 | } | |
434 | break; | |
435 | case IQ2000_OPERAND_RD : | |
436 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd); | |
437 | break; | |
438 | case IQ2000_OPERAND_RD_RS : | |
439 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rs); | |
440 | break; | |
441 | case IQ2000_OPERAND_RD_RT : | |
442 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rt); | |
443 | break; | |
444 | case IQ2000_OPERAND_RS : | |
445 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs); | |
446 | break; | |
447 | case IQ2000_OPERAND_RT : | |
448 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt); | |
449 | break; | |
450 | case IQ2000_OPERAND_RT_RS : | |
451 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt_rs); | |
452 | break; | |
453 | case IQ2000_OPERAND_SHAMT : | |
33b71eeb | 454 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_SHAMT, (unsigned long *) (& fields->f_shamt)); |
47b1a55a SC |
455 | break; |
456 | ||
457 | default : | |
458 | /* xgettext:c-format */ | |
a6743a54 AM |
459 | opcodes_error_handler |
460 | (_("internal error: unrecognized field %d while parsing"), | |
461 | opindex); | |
47b1a55a SC |
462 | abort (); |
463 | } | |
464 | ||
465 | return errmsg; | |
466 | } | |
467 | ||
43e65147 | 468 | cgen_parse_fn * const iq2000_cgen_parse_handlers[] = |
47b1a55a SC |
469 | { |
470 | parse_insn_normal, | |
471 | }; | |
472 | ||
473 | void | |
47b0e7ad | 474 | iq2000_cgen_init_asm (CGEN_CPU_DESC cd) |
47b1a55a SC |
475 | { |
476 | iq2000_cgen_init_opcode_table (cd); | |
477 | iq2000_cgen_init_ibld_table (cd); | |
478 | cd->parse_handlers = & iq2000_cgen_parse_handlers[0]; | |
479 | cd->parse_operand = iq2000_cgen_parse_operand; | |
1620f33d AM |
480 | #ifdef CGEN_ASM_INIT_HOOK |
481 | CGEN_ASM_INIT_HOOK | |
482 | #endif | |
47b1a55a SC |
483 | } |
484 | ||
485 | \f | |
486 | ||
487 | /* Regex construction routine. | |
488 | ||
489 | This translates an opcode syntax string into a regex string, | |
490 | by replacing any non-character syntax element (such as an | |
491 | opcode) with the pattern '.*' | |
492 | ||
493 | It then compiles the regex and stores it in the opcode, for | |
494 | later use by iq2000_cgen_assemble_insn | |
495 | ||
496 | Returns NULL for success, an error message for failure. */ | |
497 | ||
43e65147 | 498 | char * |
ffead7ae | 499 | iq2000_cgen_build_insn_regex (CGEN_INSN *insn) |
43e65147 | 500 | { |
47b1a55a SC |
501 | CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); |
502 | const char *mnem = CGEN_INSN_MNEMONIC (insn); | |
503 | char rxbuf[CGEN_MAX_RX_ELEMENTS]; | |
504 | char *rx = rxbuf; | |
505 | const CGEN_SYNTAX_CHAR_TYPE *syn; | |
506 | int reg_err; | |
507 | ||
508 | syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); | |
509 | ||
510 | /* Mnemonics come first in the syntax string. */ | |
511 | if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) | |
512 | return _("missing mnemonic in syntax string"); | |
513 | ++syn; | |
514 | ||
515 | /* Generate a case sensitive regular expression that emulates case | |
516 | insensitive matching in the "C" locale. We cannot generate a case | |
517 | insensitive regular expression because in Turkish locales, 'i' and 'I' | |
518 | are not equal modulo case conversion. */ | |
519 | ||
520 | /* Copy the literal mnemonic out of the insn. */ | |
521 | for (; *mnem; mnem++) | |
522 | { | |
523 | char c = *mnem; | |
524 | ||
525 | if (ISALPHA (c)) | |
526 | { | |
527 | *rx++ = '['; | |
528 | *rx++ = TOLOWER (c); | |
529 | *rx++ = TOUPPER (c); | |
530 | *rx++ = ']'; | |
531 | } | |
532 | else | |
533 | *rx++ = c; | |
534 | } | |
535 | ||
536 | /* Copy any remaining literals from the syntax string into the rx. */ | |
537 | for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) | |
538 | { | |
43e65147 | 539 | if (CGEN_SYNTAX_CHAR_P (* syn)) |
47b1a55a SC |
540 | { |
541 | char c = CGEN_SYNTAX_CHAR (* syn); | |
542 | ||
43e65147 | 543 | switch (c) |
47b1a55a SC |
544 | { |
545 | /* Escape any regex metacharacters in the syntax. */ | |
43e65147 L |
546 | case '.': case '[': case '\\': |
547 | case '*': case '^': case '$': | |
47b1a55a SC |
548 | |
549 | #ifdef CGEN_ESCAPE_EXTENDED_REGEX | |
43e65147 | 550 | case '?': case '{': case '}': |
47b1a55a SC |
551 | case '(': case ')': case '*': |
552 | case '|': case '+': case ']': | |
553 | #endif | |
554 | *rx++ = '\\'; | |
555 | *rx++ = c; | |
556 | break; | |
557 | ||
558 | default: | |
559 | if (ISALPHA (c)) | |
560 | { | |
561 | *rx++ = '['; | |
562 | *rx++ = TOLOWER (c); | |
563 | *rx++ = TOUPPER (c); | |
564 | *rx++ = ']'; | |
565 | } | |
566 | else | |
567 | *rx++ = c; | |
568 | break; | |
569 | } | |
570 | } | |
571 | else | |
572 | { | |
573 | /* Replace non-syntax fields with globs. */ | |
574 | *rx++ = '.'; | |
575 | *rx++ = '*'; | |
576 | } | |
577 | } | |
578 | ||
579 | /* Trailing whitespace ok. */ | |
43e65147 L |
580 | * rx++ = '['; |
581 | * rx++ = ' '; | |
582 | * rx++ = '\t'; | |
583 | * rx++ = ']'; | |
584 | * rx++ = '*'; | |
47b1a55a SC |
585 | |
586 | /* But anchor it after that. */ | |
43e65147 | 587 | * rx++ = '$'; |
47b1a55a SC |
588 | * rx = '\0'; |
589 | ||
590 | CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); | |
591 | reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); | |
592 | ||
43e65147 | 593 | if (reg_err == 0) |
47b1a55a SC |
594 | return NULL; |
595 | else | |
596 | { | |
597 | static char msg[80]; | |
598 | ||
599 | regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80); | |
600 | regfree ((regex_t *) CGEN_INSN_RX (insn)); | |
601 | free (CGEN_INSN_RX (insn)); | |
602 | (CGEN_INSN_RX (insn)) = NULL; | |
603 | return msg; | |
604 | } | |
605 | } | |
606 | ||
607 | \f | |
608 | /* Default insn parser. | |
609 | ||
610 | The syntax string is scanned and operands are parsed and stored in FIELDS. | |
611 | Relocs are queued as we go via other callbacks. | |
612 | ||
613 | ??? Note that this is currently an all-or-nothing parser. If we fail to | |
614 | parse the instruction, we return 0 and the caller will start over from | |
615 | the beginning. Backtracking will be necessary in parsing subexpressions, | |
616 | but that can be handled there. Not handling backtracking here may get | |
617 | expensive in the case of the m68k. Deal with later. | |
618 | ||
619 | Returns NULL for success, an error message for failure. */ | |
620 | ||
621 | static const char * | |
ffead7ae MM |
622 | parse_insn_normal (CGEN_CPU_DESC cd, |
623 | const CGEN_INSN *insn, | |
624 | const char **strp, | |
625 | CGEN_FIELDS *fields) | |
47b1a55a SC |
626 | { |
627 | /* ??? Runtime added insns not handled yet. */ | |
628 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); | |
629 | const char *str = *strp; | |
630 | const char *errmsg; | |
631 | const char *p; | |
632 | const CGEN_SYNTAX_CHAR_TYPE * syn; | |
633 | #ifdef CGEN_MNEMONIC_OPERANDS | |
634 | /* FIXME: wip */ | |
635 | int past_opcode_p; | |
636 | #endif | |
637 | ||
638 | /* For now we assume the mnemonic is first (there are no leading operands). | |
639 | We can parse it without needing to set up operand parsing. | |
640 | GAS's input scrubber will ensure mnemonics are lowercase, but we may | |
641 | not be called from GAS. */ | |
642 | p = CGEN_INSN_MNEMONIC (insn); | |
643 | while (*p && TOLOWER (*p) == TOLOWER (*str)) | |
644 | ++p, ++str; | |
645 | ||
646 | if (* p) | |
647 | return _("unrecognized instruction"); | |
648 | ||
649 | #ifndef CGEN_MNEMONIC_OPERANDS | |
650 | if (* str && ! ISSPACE (* str)) | |
651 | return _("unrecognized instruction"); | |
652 | #endif | |
653 | ||
654 | CGEN_INIT_PARSE (cd); | |
655 | cgen_init_parse_operand (cd); | |
656 | #ifdef CGEN_MNEMONIC_OPERANDS | |
657 | past_opcode_p = 0; | |
658 | #endif | |
659 | ||
660 | /* We don't check for (*str != '\0') here because we want to parse | |
661 | any trailing fake arguments in the syntax string. */ | |
662 | syn = CGEN_SYNTAX_STRING (syntax); | |
663 | ||
664 | /* Mnemonics come first for now, ensure valid string. */ | |
665 | if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) | |
666 | abort (); | |
667 | ||
668 | ++syn; | |
669 | ||
670 | while (* syn != 0) | |
671 | { | |
672 | /* Non operand chars must match exactly. */ | |
673 | if (CGEN_SYNTAX_CHAR_P (* syn)) | |
674 | { | |
675 | /* FIXME: While we allow for non-GAS callers above, we assume the | |
676 | first char after the mnemonic part is a space. */ | |
677 | /* FIXME: We also take inappropriate advantage of the fact that | |
678 | GAS's input scrubber will remove extraneous blanks. */ | |
679 | if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn))) | |
680 | { | |
681 | #ifdef CGEN_MNEMONIC_OPERANDS | |
682 | if (CGEN_SYNTAX_CHAR(* syn) == ' ') | |
683 | past_opcode_p = 1; | |
684 | #endif | |
685 | ++ syn; | |
686 | ++ str; | |
687 | } | |
688 | else if (*str) | |
689 | { | |
690 | /* Syntax char didn't match. Can't be this insn. */ | |
691 | static char msg [80]; | |
692 | ||
693 | /* xgettext:c-format */ | |
694 | sprintf (msg, _("syntax error (expected char `%c', found `%c')"), | |
695 | CGEN_SYNTAX_CHAR(*syn), *str); | |
696 | return msg; | |
697 | } | |
698 | else | |
699 | { | |
700 | /* Ran out of input. */ | |
701 | static char msg [80]; | |
702 | ||
703 | /* xgettext:c-format */ | |
704 | sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"), | |
705 | CGEN_SYNTAX_CHAR(*syn)); | |
706 | return msg; | |
707 | } | |
708 | continue; | |
709 | } | |
710 | ||
c7e2358a AM |
711 | #ifdef CGEN_MNEMONIC_OPERANDS |
712 | (void) past_opcode_p; | |
713 | #endif | |
47b1a55a | 714 | /* We have an operand of some sort. */ |
c7e2358a | 715 | errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), &str, fields); |
47b1a55a SC |
716 | if (errmsg) |
717 | return errmsg; | |
718 | ||
719 | /* Done with this operand, continue with next one. */ | |
720 | ++ syn; | |
721 | } | |
722 | ||
723 | /* If we're at the end of the syntax string, we're done. */ | |
724 | if (* syn == 0) | |
725 | { | |
726 | /* FIXME: For the moment we assume a valid `str' can only contain | |
727 | blanks now. IE: We needn't try again with a longer version of | |
728 | the insn and it is assumed that longer versions of insns appear | |
729 | before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ | |
730 | while (ISSPACE (* str)) | |
731 | ++ str; | |
732 | ||
733 | if (* str != '\0') | |
734 | return _("junk at end of line"); /* FIXME: would like to include `str' */ | |
735 | ||
736 | return NULL; | |
737 | } | |
738 | ||
739 | /* We couldn't parse it. */ | |
740 | return _("unrecognized instruction"); | |
741 | } | |
742 | \f | |
743 | /* Main entry point. | |
744 | This routine is called for each instruction to be assembled. | |
745 | STR points to the insn to be assembled. | |
746 | We assume all necessary tables have been initialized. | |
747 | The assembled instruction, less any fixups, is stored in BUF. | |
748 | Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value | |
749 | still needs to be converted to target byte order, otherwise BUF is an array | |
750 | of bytes in target byte order. | |
751 | The result is a pointer to the insn's entry in the opcode table, | |
752 | or NULL if an error occured (an error message will have already been | |
753 | printed). | |
754 | ||
755 | Note that when processing (non-alias) macro-insns, | |
756 | this function recurses. | |
757 | ||
758 | ??? It's possible to make this cpu-independent. | |
759 | One would have to deal with a few minor things. | |
760 | At this point in time doing so would be more of a curiosity than useful | |
761 | [for example this file isn't _that_ big], but keeping the possibility in | |
762 | mind helps keep the design clean. */ | |
763 | ||
764 | const CGEN_INSN * | |
ffead7ae MM |
765 | iq2000_cgen_assemble_insn (CGEN_CPU_DESC cd, |
766 | const char *str, | |
767 | CGEN_FIELDS *fields, | |
768 | CGEN_INSN_BYTES_PTR buf, | |
769 | char **errmsg) | |
47b1a55a SC |
770 | { |
771 | const char *start; | |
772 | CGEN_INSN_LIST *ilist; | |
773 | const char *parse_errmsg = NULL; | |
774 | const char *insert_errmsg = NULL; | |
775 | int recognized_mnemonic = 0; | |
776 | ||
777 | /* Skip leading white space. */ | |
778 | while (ISSPACE (* str)) | |
779 | ++ str; | |
780 | ||
781 | /* The instructions are stored in hashed lists. | |
782 | Get the first in the list. */ | |
783 | ilist = CGEN_ASM_LOOKUP_INSN (cd, str); | |
784 | ||
785 | /* Keep looking until we find a match. */ | |
786 | start = str; | |
787 | for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) | |
788 | { | |
789 | const CGEN_INSN *insn = ilist->insn; | |
790 | recognized_mnemonic = 1; | |
791 | ||
43e65147 | 792 | #ifdef CGEN_VALIDATE_INSN_SUPPORTED |
47b1a55a SC |
793 | /* Not usually needed as unsupported opcodes |
794 | shouldn't be in the hash lists. */ | |
795 | /* Is this insn supported by the selected cpu? */ | |
796 | if (! iq2000_cgen_insn_supported (cd, insn)) | |
797 | continue; | |
798 | #endif | |
b11dcf4e | 799 | /* If the RELAXED attribute is set, this is an insn that shouldn't be |
47b1a55a SC |
800 | chosen immediately. Instead, it is used during assembler/linker |
801 | relaxation if possible. */ | |
b11dcf4e | 802 | if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) |
47b1a55a SC |
803 | continue; |
804 | ||
805 | str = start; | |
806 | ||
807 | /* Skip this insn if str doesn't look right lexically. */ | |
808 | if (CGEN_INSN_RX (insn) != NULL && | |
809 | regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH) | |
810 | continue; | |
811 | ||
812 | /* Allow parse/insert handlers to obtain length of insn. */ | |
813 | CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); | |
814 | ||
815 | parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields); | |
816 | if (parse_errmsg != NULL) | |
817 | continue; | |
818 | ||
819 | /* ??? 0 is passed for `pc'. */ | |
820 | insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, | |
821 | (bfd_vma) 0); | |
822 | if (insert_errmsg != NULL) | |
823 | continue; | |
824 | ||
825 | /* It is up to the caller to actually output the insn and any | |
826 | queued relocs. */ | |
827 | return insn; | |
828 | } | |
829 | ||
830 | { | |
831 | static char errbuf[150]; | |
47b1a55a | 832 | const char *tmp_errmsg; |
c7e2358a AM |
833 | #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS |
834 | #define be_verbose 1 | |
47b1a55a | 835 | #else |
c7e2358a | 836 | #define be_verbose 0 |
47b1a55a | 837 | #endif |
c7e2358a AM |
838 | |
839 | if (be_verbose) | |
840 | { | |
841 | /* If requesting verbose error messages, use insert_errmsg. | |
842 | Failing that, use parse_errmsg. */ | |
843 | tmp_errmsg = (insert_errmsg ? insert_errmsg : | |
844 | parse_errmsg ? parse_errmsg : | |
845 | recognized_mnemonic ? | |
846 | _("unrecognized form of instruction") : | |
847 | _("unrecognized instruction")); | |
848 | ||
849 | if (strlen (start) > 50) | |
850 | /* xgettext:c-format */ | |
851 | sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); | |
43e65147 | 852 | else |
c7e2358a AM |
853 | /* xgettext:c-format */ |
854 | sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); | |
855 | } | |
856 | else | |
857 | { | |
858 | if (strlen (start) > 50) | |
859 | /* xgettext:c-format */ | |
860 | sprintf (errbuf, _("bad instruction `%.50s...'"), start); | |
43e65147 | 861 | else |
c7e2358a AM |
862 | /* xgettext:c-format */ |
863 | sprintf (errbuf, _("bad instruction `%.50s'"), start); | |
864 | } | |
43e65147 | 865 | |
47b1a55a SC |
866 | *errmsg = errbuf; |
867 | return NULL; | |
868 | } | |
869 | } |