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FRV: Use a signed 6-bit immediate value not unsigned for mdrotli insn.
[deliverable/binutils-gdb.git] / opcodes / iq2000-asm.c
CommitLineData
47b1a55a
SC		 1/* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4THIS FILE IS MACHINE GENERATED WITH CGEN.
5- the resultant file is machine generated, cgen-asm.in isn't
6
7Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
8
9This file is part of the GNU Binutils and GDB, the GNU debugger.
10
11This program is free software; you can redistribute it and/or modify
12it under the terms of the GNU General Public License as published by
13the Free Software Foundation; either version 2, or (at your option)
14any later version.
15
16This program is distributed in the hope that it will be useful,
17but WITHOUT ANY WARRANTY; without even the implied warranty of
18MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19GNU General Public License for more details.
20
21You should have received a copy of the GNU General Public License
22along with this program; if not, write to the Free Software Foundation, Inc.,
2359 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24
25/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28#include "sysdep.h"
29#include <stdio.h>
30#include "ansidecl.h"
31#include "bfd.h"
32#include "symcat.h"
33#include "iq2000-desc.h"
34#include "iq2000-opc.h"
35#include "opintl.h"
36#include "xregex.h"
37#include "libiberty.h"
38#include "safe-ctype.h"
39
40#undef min
41#define min(a,b) ((a) < (b) ? (a) : (b))
42#undef max
43#define max(a,b) ((a) > (b) ? (a) : (b))
44
45static const char * parse_insn_normal
46 PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *));
47\f
48/* -- assembler routines inserted here. */
49
50/* -- asm.c */
51static const char * parse_mimm PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
52static const char * parse_imm PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
53static const char * parse_hi16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
54static const char * parse_lo16 PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
55
56/* Special check to ensure that instruction exists for given machine */
57int
58iq2000_cgen_insn_supported (cd, insn)
59 CGEN_CPU_DESC cd;
60 CGEN_INSN *insn;
61{
62 int machs = cd->machs;
63
64 return ((CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0);
65}
66
67static int iq2000_cgen_isa_register (strp)
68 const char **strp;
69{
70 int len;
71 int ch1, ch2;
72 if (**strp == 'r' || **strp == 'R')
73 {
74 len = strlen (*strp);
75 if (len == 2)
76 {
77 ch1 = (*strp)[1];
78 if ('0' <= ch1 && ch1 <= '9')
79 return 1;
80 }
81 else if (len == 3)
82 {
83 ch1 = (*strp)[1];
84 ch2 = (*strp)[2];
85 if (('1' <= ch1 && ch1 <= '2') && ('0' <= ch2 && ch2 <= '9'))
86 return 1;
87 if ('3' == ch1 && (ch2 == '0' || ch2 == '1'))
88 return 1;
89 }
90 }
91 if (**strp == '%' && tolower((*strp)[1]) != 'l' && tolower((*strp)[1]) != 'h')
92 return 1;
93 return 0;
94}
95
96/* Handle negated literal. */
97
98static const char *
99parse_mimm (cd, strp, opindex, valuep)
100 CGEN_CPU_DESC cd;
101 const char **strp;
102 int opindex;
103 long *valuep;
104{
105 const char *errmsg;
106 long value;
107
108 /* Verify this isn't a register */
109 if (iq2000_cgen_isa_register (strp))
110 errmsg = _("immediate value cannot be register");
111 else
112 {
113 long value;
114
115 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
116 if (errmsg == NULL)
117 {
118 long x = (-value) & 0xFFFF0000;
119 if (x != 0 && x != 0xFFFF0000)
120 errmsg = _("immediate value out of range");
121 else
122 *valuep = (-value & 0xFFFF);
123 }
124 }
125 return errmsg;
126}
127
128/* Handle signed/unsigned literal. */
129
130static const char *
131parse_imm (cd, strp, opindex, valuep)
132 CGEN_CPU_DESC cd;
133 const char **strp;
134 int opindex;
135 unsigned long *valuep;
136{
137 const char *errmsg;
138 long value;
139
140 if (iq2000_cgen_isa_register (strp))
141 errmsg = _("immediate value cannot be register");
142 else
143 {
144 long value;
145
146 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
147 if (errmsg == NULL)
148 {
149 long x = value & 0xFFFF0000;
150 if (x != 0 && x != 0xFFFF0000)
151 errmsg = _("immediate value out of range");
152 else
153 *valuep = (value & 0xFFFF);
154 }
155 }
156 return errmsg;
157}
158
159/* Handle iq10 21-bit jmp offset. */
160
161static const char *
162parse_jtargq10 (cd, strp, opindex, reloc, type_addr, valuep)
163 CGEN_CPU_DESC cd;
164 const char **strp;
165 int opindex;
166 int reloc;
167 enum cgen_parse_operand_result *type_addr;
168 unsigned long *valuep;
169{
170 const char *errmsg;
171 bfd_vma value;
172 enum cgen_parse_operand_result result_type = CGEN_PARSE_OPERAND_RESULT_NUMBER;
173
174 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_OFFSET_21,
175 &result_type, &value);
176 if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
177 {
178 /* check value is within 23-bits (remembering that 2-bit shift right will occur) */
179 if (value > 0x7fffff)
180 return _("21-bit offset out of range");
181 }
182 *valuep = (value & 0x7FFFFF);
183 return errmsg;
184}
185
186/* Handle high(). */
187
188static const char *
189parse_hi16 (cd, strp, opindex, valuep)
190 CGEN_CPU_DESC cd;
191 const char **strp;
192 int opindex;
193 unsigned long *valuep;
194{
195 if (strncasecmp (*strp, "%hi(", 4) == 0)
196 {
197 enum cgen_parse_operand_result result_type;
198 bfd_vma value;
199 const char *errmsg;
200
201 *strp += 4;
202 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
203 &result_type, &value);
204 if (**strp != ')')
205 return _("missing `)'");
206
207 ++*strp;
208 if (errmsg == NULL
209 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
210 {
211 /* if value has top-bit of %lo on, then it will
212 sign-propagate and so we compensate by adding
213 1 to the resultant %hi value */
214 if (value & 0x8000)
215 value += 0x10000;
216 value >>= 16;
217 }
218 *valuep = value;
219
220 return errmsg;
221 }
222
223 /* we add %uhi in case a user just wants the high 16-bits or is using
224 an insn like ori for %lo which does not sign-propagate */
225 if (strncasecmp (*strp, "%uhi(", 5) == 0)
226 {
227 enum cgen_parse_operand_result result_type;
228 bfd_vma value;
229 const char *errmsg;
230
231 *strp += 5;
232 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_UHI16,
233 &result_type, &value);
234 if (**strp != ')')
235 return _("missing `)'");
236
237 ++*strp;
238 if (errmsg == NULL
239 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
240 {
241 value >>= 16;
242 }
243 *valuep = value;
244
245 return errmsg;
246 }
247
248 return parse_imm (cd, strp, opindex, valuep);
249}
250
251/* Handle %lo in a signed context.
252 The signedness of the value doesn't matter to %lo(), but this also
253 handles the case where %lo() isn't present. */
254
255static const char *
256parse_lo16 (cd, strp, opindex, valuep)
257 CGEN_CPU_DESC cd;
258 const char **strp;
259 int opindex;
260 long *valuep;
261{
262 if (strncasecmp (*strp, "%lo(", 4) == 0)
263 {
264 const char *errmsg;
265 enum cgen_parse_operand_result result_type;
266 bfd_vma value;
267
268 *strp += 4;
269 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
270 &result_type, &value);
271 if (**strp != ')')
272 return _("missing `)'");
273 ++*strp;
274 if (errmsg == NULL
275 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
276 value &= 0xffff;
277 *valuep = value;
278 return errmsg;
279 }
280
281 return parse_imm (cd, strp, opindex, valuep);
282}
283
284/* Handle %lo in a negated signed context.
285 The signedness of the value doesn't matter to %lo(), but this also
286 handles the case where %lo() isn't present. */
287
288static const char *
289parse_mlo16 (cd, strp, opindex, valuep)
290 CGEN_CPU_DESC cd;
291 const char **strp;
292 int opindex;
293 long *valuep;
294{
295 if (strncasecmp (*strp, "%lo(", 4) == 0)
296 {
297 const char *errmsg;
298 enum cgen_parse_operand_result result_type;
299 bfd_vma value;
300
301 *strp += 4;
302 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
303 &result_type, &value);
304 if (**strp != ')')
305 return _("missing `)'");
306 ++*strp;
307 if (errmsg == NULL
308 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
309 value = (-value) & 0xffff;
310 *valuep = value;
311 return errmsg;
312 }
313
314 return parse_mimm (cd, strp, opindex, valuep);
315}
316
317/* -- */
318
319const char * iq2000_cgen_parse_operand
320 PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
321
322/* Main entry point for operand parsing.
323
324 This function is basically just a big switch statement. Earlier versions
325 used tables to look up the function to use, but
326 - if the table contains both assembler and disassembler functions then
327 the disassembler contains much of the assembler and vice-versa,
328 - there's a lot of inlining possibilities as things grow,
329 - using a switch statement avoids the function call overhead.
330
331 This function could be moved into `parse_insn_normal', but keeping it
332 separate makes clear the interface between `parse_insn_normal' and each of
333 the handlers. */
334
335const char *
336iq2000_cgen_parse_operand (cd, opindex, strp, fields)
337 CGEN_CPU_DESC cd;
338 int opindex;
339 const char ** strp;
340 CGEN_FIELDS * fields;
341{
342 const char * errmsg = NULL;
343 /* Used by scalar operands that still need to be parsed. */
344 long junk ATTRIBUTE_UNUSED;
345
346 switch (opindex)
347 {
348 case IQ2000_OPERAND_BASE :
349 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs);
350 break;
351 case IQ2000_OPERAND_BASEOFF :
352 {
353 bfd_vma value;
354 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_BASEOFF, 0, NULL, & value);
355 fields->f_imm = value;
356 }
357 break;
358 case IQ2000_OPERAND_BITNUM :
359 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BITNUM, &fields->f_rt);
360 break;
361 case IQ2000_OPERAND_BYTECOUNT :
362 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BYTECOUNT, &fields->f_bytecount);
363 break;
364 case IQ2000_OPERAND_CAM_Y :
365 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Y, &fields->f_cam_y);
366 break;
367 case IQ2000_OPERAND_CAM_Z :
368 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Z, &fields->f_cam_z);
369 break;
370 case IQ2000_OPERAND_CM_3FUNC :
371 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3FUNC, &fields->f_cm_3func);
372 break;
373 case IQ2000_OPERAND_CM_3Z :
374 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3Z, &fields->f_cm_3z);
375 break;
376 case IQ2000_OPERAND_CM_4FUNC :
377 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4FUNC, &fields->f_cm_4func);
378 break;
379 case IQ2000_OPERAND_CM_4Z :
380 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4Z, &fields->f_cm_4z);
381 break;
382 case IQ2000_OPERAND_COUNT :
383 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_COUNT, &fields->f_count);
384 break;
385 case IQ2000_OPERAND_EXECODE :
386 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, &fields->f_excode);
387 break;
75798298
NC		 388 case IQ2000_OPERAND_F_INDEX :
389 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_F_INDEX, &fields->f_index);
390 break;
47b1a55a
SC		 391 case IQ2000_OPERAND_HI16 :
392 errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, &fields->f_imm);
393 break;
394 case IQ2000_OPERAND_IMM :
395 errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, &fields->f_imm);
396 break;
47b1a55a
SC		 397 case IQ2000_OPERAND_JMPTARG :
398 {
399 bfd_vma value;
400 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_JMPTARG, 0, NULL, & value);
401 fields->f_jtarg = value;
402 }
403 break;
404 case IQ2000_OPERAND_JMPTARGQ10 :
405 {
406 bfd_vma value;
407 errmsg = parse_jtargq10 (cd, strp, IQ2000_OPERAND_JMPTARGQ10, 0, NULL, & value);
408 fields->f_jtargq10 = value;
409 }
410 break;
411 case IQ2000_OPERAND_LO16 :
412 errmsg = parse_lo16 (cd, strp, IQ2000_OPERAND_LO16, &fields->f_imm);
413 break;
414 case IQ2000_OPERAND_MASK :
415 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASK, &fields->f_mask);
416 break;
417 case IQ2000_OPERAND_MASKL :
418 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKL, &fields->f_maskl);
419 break;
420 case IQ2000_OPERAND_MASKQ10 :
421 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKQ10, &fields->f_maskq10);
422 break;
423 case IQ2000_OPERAND_MASKR :
424 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKR, &fields->f_rs);
425 break;
426 case IQ2000_OPERAND_MLO16 :
427 errmsg = parse_mlo16 (cd, strp, IQ2000_OPERAND_MLO16, &fields->f_imm);
428 break;
429 case IQ2000_OPERAND_OFFSET :
430 {
431 bfd_vma value;
432 errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_OFFSET, 0, NULL, & value);
433 fields->f_offset = value;
434 }
435 break;
436 case IQ2000_OPERAND_RD :
437 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd);
438 break;
439 case IQ2000_OPERAND_RD_RS :
440 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rs);
441 break;
442 case IQ2000_OPERAND_RD_RT :
443 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rt);
444 break;
445 case IQ2000_OPERAND_RS :
446 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs);
447 break;
448 case IQ2000_OPERAND_RT :
449 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt);
450 break;
451 case IQ2000_OPERAND_RT_RS :
452 errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt_rs);
453 break;
454 case IQ2000_OPERAND_SHAMT :
455 errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_SHAMT, &fields->f_shamt);
456 break;
457
458 default :
459 /* xgettext:c-format */
460 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
461 abort ();
462 }
463
464 return errmsg;
465}
466
467cgen_parse_fn * const iq2000_cgen_parse_handlers[] =
468{
469 parse_insn_normal,
470};
471
472void
473iq2000_cgen_init_asm (cd)
474 CGEN_CPU_DESC cd;
475{
476 iq2000_cgen_init_opcode_table (cd);
477 iq2000_cgen_init_ibld_table (cd);
478 cd->parse_handlers = & iq2000_cgen_parse_handlers[0];
479 cd->parse_operand = iq2000_cgen_parse_operand;
47b1a55a
SC		 480}
481
482\f
483
484/* Regex construction routine.
485
486 This translates an opcode syntax string into a regex string,
487 by replacing any non-character syntax element (such as an
488 opcode) with the pattern '.*'
489
490 It then compiles the regex and stores it in the opcode, for
491 later use by iq2000_cgen_assemble_insn
492
493 Returns NULL for success, an error message for failure. */
494
495char *
496iq2000_cgen_build_insn_regex (insn)
497 CGEN_INSN *insn;
498{
499 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
500 const char *mnem = CGEN_INSN_MNEMONIC (insn);
501 char rxbuf[CGEN_MAX_RX_ELEMENTS];
502 char *rx = rxbuf;
503 const CGEN_SYNTAX_CHAR_TYPE *syn;
504 int reg_err;
505
506 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
507
508 /* Mnemonics come first in the syntax string. */
509 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
510 return _("missing mnemonic in syntax string");
511 ++syn;
512
513 /* Generate a case sensitive regular expression that emulates case
514 insensitive matching in the "C" locale. We cannot generate a case
515 insensitive regular expression because in Turkish locales, 'i' and 'I'
516 are not equal modulo case conversion. */
517
518 /* Copy the literal mnemonic out of the insn. */
519 for (; *mnem; mnem++)
520 {
521 char c = *mnem;
522
523 if (ISALPHA (c))
524 {
525 *rx++ = '[';
526 *rx++ = TOLOWER (c);
527 *rx++ = TOUPPER (c);
528 *rx++ = ']';
529 }
530 else
531 *rx++ = c;
532 }
533
534 /* Copy any remaining literals from the syntax string into the rx. */
535 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
536 {
537 if (CGEN_SYNTAX_CHAR_P (* syn))
538 {
539 char c = CGEN_SYNTAX_CHAR (* syn);
540
541 switch (c)
542 {
543 /* Escape any regex metacharacters in the syntax. */
544 case '.': case '[': case '\\':
545 case '*': case '^': case '$':
546
547#ifdef CGEN_ESCAPE_EXTENDED_REGEX
548 case '?': case '{': case '}':
549 case '(': case ')': case '*':
550 case '|': case '+': case ']':
551#endif
552 *rx++ = '\\';
553 *rx++ = c;
554 break;
555
556 default:
557 if (ISALPHA (c))
558 {
559 *rx++ = '[';
560 *rx++ = TOLOWER (c);
561 *rx++ = TOUPPER (c);
562 *rx++ = ']';
563 }
564 else
565 *rx++ = c;
566 break;
567 }
568 }
569 else
570 {
571 /* Replace non-syntax fields with globs. */
572 *rx++ = '.';
573 *rx++ = '*';
574 }
575 }
576
577 /* Trailing whitespace ok. */
578 * rx++ = '[';
579 * rx++ = ' ';
580 * rx++ = '\t';
581 * rx++ = ']';
582 * rx++ = '*';
583
584 /* But anchor it after that. */
585 * rx++ = '$';
586 * rx = '\0';
587
588 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
589 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
590
591 if (reg_err == 0)
592 return NULL;
593 else
594 {
595 static char msg[80];
596
597 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
598 regfree ((regex_t *) CGEN_INSN_RX (insn));
599 free (CGEN_INSN_RX (insn));
600 (CGEN_INSN_RX (insn)) = NULL;
601 return msg;
602 }
603}
604
605\f
606/* Default insn parser.
607
608 The syntax string is scanned and operands are parsed and stored in FIELDS.
609 Relocs are queued as we go via other callbacks.
610
611 ??? Note that this is currently an all-or-nothing parser. If we fail to
612 parse the instruction, we return 0 and the caller will start over from
613 the beginning. Backtracking will be necessary in parsing subexpressions,
614 but that can be handled there. Not handling backtracking here may get
615 expensive in the case of the m68k. Deal with later.
616
617 Returns NULL for success, an error message for failure. */
618
619static const char *
620parse_insn_normal (cd, insn, strp, fields)
621 CGEN_CPU_DESC cd;
622 const CGEN_INSN *insn;
623 const char **strp;
624 CGEN_FIELDS *fields;
625{
626 /* ??? Runtime added insns not handled yet. */
627 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
628 const char *str = *strp;
629 const char *errmsg;
630 const char *p;
631 const CGEN_SYNTAX_CHAR_TYPE * syn;
632#ifdef CGEN_MNEMONIC_OPERANDS
633 /* FIXME: wip */
634 int past_opcode_p;
635#endif
636
637 /* For now we assume the mnemonic is first (there are no leading operands).
638 We can parse it without needing to set up operand parsing.
639 GAS's input scrubber will ensure mnemonics are lowercase, but we may
640 not be called from GAS. */
641 p = CGEN_INSN_MNEMONIC (insn);
642 while (*p && TOLOWER (*p) == TOLOWER (*str))
643 ++p, ++str;
644
645 if (* p)
646 return _("unrecognized instruction");
647
648#ifndef CGEN_MNEMONIC_OPERANDS
649 if (* str && ! ISSPACE (* str))
650 return _("unrecognized instruction");
651#endif
652
653 CGEN_INIT_PARSE (cd);
654 cgen_init_parse_operand (cd);
655#ifdef CGEN_MNEMONIC_OPERANDS
656 past_opcode_p = 0;
657#endif
658
659 /* We don't check for (*str != '\0') here because we want to parse
660 any trailing fake arguments in the syntax string. */
661 syn = CGEN_SYNTAX_STRING (syntax);
662
663 /* Mnemonics come first for now, ensure valid string. */
664 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
665 abort ();
666
667 ++syn;
668
669 while (* syn != 0)
670 {
671 /* Non operand chars must match exactly. */
672 if (CGEN_SYNTAX_CHAR_P (* syn))
673 {
674 /* FIXME: While we allow for non-GAS callers above, we assume the
675 first char after the mnemonic part is a space. */
676 /* FIXME: We also take inappropriate advantage of the fact that
677 GAS's input scrubber will remove extraneous blanks. */
678 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
679 {
680#ifdef CGEN_MNEMONIC_OPERANDS
681 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
682 past_opcode_p = 1;
683#endif
684 ++ syn;
685 ++ str;
686 }
687 else if (*str)
688 {
689 /* Syntax char didn't match. Can't be this insn. */
690 static char msg [80];
691
692 /* xgettext:c-format */
693 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
694 CGEN_SYNTAX_CHAR(*syn), *str);
695 return msg;
696 }
697 else
698 {
699 /* Ran out of input. */
700 static char msg [80];
701
702 /* xgettext:c-format */
703 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
704 CGEN_SYNTAX_CHAR(*syn));
705 return msg;
706 }
707 continue;
708 }
709
710 /* We have an operand of some sort. */
711 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
712 &str, fields);
713 if (errmsg)
714 return errmsg;
715
716 /* Done with this operand, continue with next one. */
717 ++ syn;
718 }
719
720 /* If we're at the end of the syntax string, we're done. */
721 if (* syn == 0)
722 {
723 /* FIXME: For the moment we assume a valid `str' can only contain
724 blanks now. IE: We needn't try again with a longer version of
725 the insn and it is assumed that longer versions of insns appear
726 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
727 while (ISSPACE (* str))
728 ++ str;
729
730 if (* str != '\0')
731 return _("junk at end of line"); /* FIXME: would like to include `str' */
732
733 return NULL;
734 }
735
736 /* We couldn't parse it. */
737 return _("unrecognized instruction");
738}
739\f
740/* Main entry point.
741 This routine is called for each instruction to be assembled.
742 STR points to the insn to be assembled.
743 We assume all necessary tables have been initialized.
744 The assembled instruction, less any fixups, is stored in BUF.
745 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
746 still needs to be converted to target byte order, otherwise BUF is an array
747 of bytes in target byte order.
748 The result is a pointer to the insn's entry in the opcode table,
749 or NULL if an error occured (an error message will have already been
750 printed).
751
752 Note that when processing (non-alias) macro-insns,
753 this function recurses.
754
755 ??? It's possible to make this cpu-independent.
756 One would have to deal with a few minor things.
757 At this point in time doing so would be more of a curiosity than useful
758 [for example this file isn't _that_ big], but keeping the possibility in
759 mind helps keep the design clean. */
760
761const CGEN_INSN *
762iq2000_cgen_assemble_insn (cd, str, fields, buf, errmsg)
763 CGEN_CPU_DESC cd;
764 const char *str;
765 CGEN_FIELDS *fields;
766 CGEN_INSN_BYTES_PTR buf;
767 char **errmsg;
768{
769 const char *start;
770 CGEN_INSN_LIST *ilist;
771 const char *parse_errmsg = NULL;
772 const char *insert_errmsg = NULL;
773 int recognized_mnemonic = 0;
774
775 /* Skip leading white space. */
776 while (ISSPACE (* str))
777 ++ str;
778
779 /* The instructions are stored in hashed lists.
780 Get the first in the list. */
781 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
782
783 /* Keep looking until we find a match. */
784 start = str;
785 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
786 {
787 const CGEN_INSN *insn = ilist->insn;
788 recognized_mnemonic = 1;
789
790#ifdef CGEN_VALIDATE_INSN_SUPPORTED
791 /* Not usually needed as unsupported opcodes
792 shouldn't be in the hash lists. */
793 /* Is this insn supported by the selected cpu? */
794 if (! iq2000_cgen_insn_supported (cd, insn))
795 continue;
796#endif
797 /* If the RELAX attribute is set, this is an insn that shouldn't be
798 chosen immediately. Instead, it is used during assembler/linker
799 relaxation if possible. */
800 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
801 continue;
802
803 str = start;
804
805 /* Skip this insn if str doesn't look right lexically. */
806 if (CGEN_INSN_RX (insn) != NULL &&
807 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
808 continue;
809
810 /* Allow parse/insert handlers to obtain length of insn. */
811 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
812
813 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
814 if (parse_errmsg != NULL)
815 continue;
816
817 /* ??? 0 is passed for `pc'. */
818 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
819 (bfd_vma) 0);
820 if (insert_errmsg != NULL)
821 continue;
822
823 /* It is up to the caller to actually output the insn and any
824 queued relocs. */
825 return insn;
826 }
827
828 {
829 static char errbuf[150];
830#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
831 const char *tmp_errmsg;
832
833 /* If requesting verbose error messages, use insert_errmsg.
834 Failing that, use parse_errmsg. */
835 tmp_errmsg = (insert_errmsg ? insert_errmsg :
836 parse_errmsg ? parse_errmsg :
837 recognized_mnemonic ?
838 _("unrecognized form of instruction") :
839 _("unrecognized instruction"));
840
841 if (strlen (start) > 50)
842 /* xgettext:c-format */
843 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
844 else
845 /* xgettext:c-format */
846 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
847#else
848 if (strlen (start) > 50)
849 /* xgettext:c-format */
850 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
851 else
852 /* xgettext:c-format */
853 sprintf (errbuf, _("bad instruction `%.50s'"), start);
854#endif
855
856 *errmsg = errbuf;
857 return NULL;
858 }
859}
860\f
861#if 0 /* This calls back to GAS which we can't do without care. */
862
863/* Record each member of OPVALS in the assembler's symbol table.
864 This lets GAS parse registers for us.
865 ??? Interesting idea but not currently used. */
866
867/* Record each member of OPVALS in the assembler's symbol table.
868 FIXME: Not currently used. */
869
870void
871iq2000_cgen_asm_hash_keywords (cd, opvals)
872 CGEN_CPU_DESC cd;
873 CGEN_KEYWORD *opvals;
874{
875 CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
876 const CGEN_KEYWORD_ENTRY * ke;
877
878 while ((ke = cgen_keyword_search_next (& search)) != NULL)
879 {
880#if 0 /* Unnecessary, should be done in the search routine. */
881 if (! iq2000_cgen_opval_supported (ke))
882 continue;
883#endif
884 cgen_asm_record_register (cd, ke->name, ke->value);
885 }
886}
887
888#endif /* 0 */
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