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49f58d10 JB |
1 | /* Instruction building/extraction support for m32c. -*- C -*- |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. | |
4 | - the resultant file is machine generated, cgen-ibld.in isn't | |
5 | ||
6 | Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. | |
7 | ||
8 | This file is part of the GNU Binutils and GDB, the GNU debugger. | |
9 | ||
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2, or (at your option) | |
13 | any later version. | |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with this program; if not, write to the Free Software Foundation, Inc., | |
22 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ | |
23 | ||
24 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. | |
25 | Keep that in mind. */ | |
26 | ||
27 | #include "sysdep.h" | |
28 | #include <stdio.h> | |
29 | #include "ansidecl.h" | |
30 | #include "dis-asm.h" | |
31 | #include "bfd.h" | |
32 | #include "symcat.h" | |
33 | #include "m32c-desc.h" | |
34 | #include "m32c-opc.h" | |
35 | #include "opintl.h" | |
36 | #include "safe-ctype.h" | |
37 | ||
38 | #undef min | |
39 | #define min(a,b) ((a) < (b) ? (a) : (b)) | |
40 | #undef max | |
41 | #define max(a,b) ((a) > (b) ? (a) : (b)) | |
42 | ||
43 | /* Used by the ifield rtx function. */ | |
44 | #define FLD(f) (fields->f) | |
45 | ||
46 | static const char * insert_normal | |
47 | (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, | |
48 | unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); | |
49 | static const char * insert_insn_normal | |
50 | (CGEN_CPU_DESC, const CGEN_INSN *, | |
51 | CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); | |
52 | static int extract_normal | |
53 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, | |
54 | unsigned int, unsigned int, unsigned int, unsigned int, | |
55 | unsigned int, unsigned int, bfd_vma, long *); | |
56 | static int extract_insn_normal | |
57 | (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, | |
58 | CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); | |
59 | #if CGEN_INT_INSN_P | |
60 | static void put_insn_int_value | |
61 | (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); | |
62 | #endif | |
63 | #if ! CGEN_INT_INSN_P | |
64 | static CGEN_INLINE void insert_1 | |
65 | (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); | |
66 | static CGEN_INLINE int fill_cache | |
67 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); | |
68 | static CGEN_INLINE long extract_1 | |
69 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); | |
70 | #endif | |
71 | \f | |
72 | /* Operand insertion. */ | |
73 | ||
74 | #if ! CGEN_INT_INSN_P | |
75 | ||
76 | /* Subroutine of insert_normal. */ | |
77 | ||
78 | static CGEN_INLINE void | |
79 | insert_1 (CGEN_CPU_DESC cd, | |
80 | unsigned long value, | |
81 | int start, | |
82 | int length, | |
83 | int word_length, | |
84 | unsigned char *bufp) | |
85 | { | |
86 | unsigned long x,mask; | |
87 | int shift; | |
88 | ||
89 | x = cgen_get_insn_value (cd, bufp, word_length); | |
90 | ||
91 | /* Written this way to avoid undefined behaviour. */ | |
92 | mask = (((1L << (length - 1)) - 1) << 1) | 1; | |
93 | if (CGEN_INSN_LSB0_P) | |
94 | shift = (start + 1) - length; | |
95 | else | |
96 | shift = (word_length - (start + length)); | |
97 | x = (x & ~(mask << shift)) | ((value & mask) << shift); | |
98 | ||
99 | cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); | |
100 | } | |
101 | ||
102 | #endif /* ! CGEN_INT_INSN_P */ | |
103 | ||
104 | /* Default insertion routine. | |
105 | ||
106 | ATTRS is a mask of the boolean attributes. | |
107 | WORD_OFFSET is the offset in bits from the start of the insn of the value. | |
108 | WORD_LENGTH is the length of the word in bits in which the value resides. | |
109 | START is the starting bit number in the word, architecture origin. | |
110 | LENGTH is the length of VALUE in bits. | |
111 | TOTAL_LENGTH is the total length of the insn in bits. | |
112 | ||
113 | The result is an error message or NULL if success. */ | |
114 | ||
115 | /* ??? This duplicates functionality with bfd's howto table and | |
116 | bfd_install_relocation. */ | |
117 | /* ??? This doesn't handle bfd_vma's. Create another function when | |
118 | necessary. */ | |
119 | ||
120 | static const char * | |
121 | insert_normal (CGEN_CPU_DESC cd, | |
122 | long value, | |
123 | unsigned int attrs, | |
124 | unsigned int word_offset, | |
125 | unsigned int start, | |
126 | unsigned int length, | |
127 | unsigned int word_length, | |
128 | unsigned int total_length, | |
129 | CGEN_INSN_BYTES_PTR buffer) | |
130 | { | |
131 | static char errbuf[100]; | |
132 | /* Written this way to avoid undefined behaviour. */ | |
133 | unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; | |
134 | ||
135 | /* If LENGTH is zero, this operand doesn't contribute to the value. */ | |
136 | if (length == 0) | |
137 | return NULL; | |
138 | ||
139 | #if 0 | |
140 | if (CGEN_INT_INSN_P | |
141 | && word_offset != 0) | |
142 | abort (); | |
143 | #endif | |
144 | ||
145 | if (word_length > 32) | |
146 | abort (); | |
147 | ||
148 | /* For architectures with insns smaller than the base-insn-bitsize, | |
149 | word_length may be too big. */ | |
150 | if (cd->min_insn_bitsize < cd->base_insn_bitsize) | |
151 | { | |
152 | if (word_offset == 0 | |
153 | && word_length > total_length) | |
154 | word_length = total_length; | |
155 | } | |
156 | ||
157 | /* Ensure VALUE will fit. */ | |
158 | if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) | |
159 | { | |
160 | long minval = - (1L << (length - 1)); | |
161 | unsigned long maxval = mask; | |
162 | ||
163 | if ((value > 0 && (unsigned long) value > maxval) | |
164 | || value < minval) | |
165 | { | |
166 | /* xgettext:c-format */ | |
167 | sprintf (errbuf, | |
168 | _("operand out of range (%ld not between %ld and %lu)"), | |
169 | value, minval, maxval); | |
170 | return errbuf; | |
171 | } | |
172 | } | |
173 | else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) | |
174 | { | |
175 | unsigned long maxval = mask; | |
176 | ||
177 | if ((unsigned long) value > maxval) | |
178 | { | |
179 | /* xgettext:c-format */ | |
180 | sprintf (errbuf, | |
181 | _("operand out of range (%lu not between 0 and %lu)"), | |
182 | value, maxval); | |
183 | return errbuf; | |
184 | } | |
185 | } | |
186 | else | |
187 | { | |
188 | if (! cgen_signed_overflow_ok_p (cd)) | |
189 | { | |
190 | long minval = - (1L << (length - 1)); | |
191 | long maxval = (1L << (length - 1)) - 1; | |
192 | ||
193 | if (value < minval || value > maxval) | |
194 | { | |
195 | sprintf | |
196 | /* xgettext:c-format */ | |
197 | (errbuf, _("operand out of range (%ld not between %ld and %ld)"), | |
198 | value, minval, maxval); | |
199 | return errbuf; | |
200 | } | |
201 | } | |
202 | } | |
203 | ||
204 | #if CGEN_INT_INSN_P | |
205 | ||
206 | { | |
207 | int shift; | |
208 | ||
209 | if (CGEN_INSN_LSB0_P) | |
210 | shift = (word_offset + start + 1) - length; | |
211 | else | |
212 | shift = total_length - (word_offset + start + length); | |
213 | *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); | |
214 | } | |
215 | ||
216 | #else /* ! CGEN_INT_INSN_P */ | |
217 | ||
218 | { | |
219 | unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; | |
220 | ||
221 | insert_1 (cd, value, start, length, word_length, bufp); | |
222 | } | |
223 | ||
224 | #endif /* ! CGEN_INT_INSN_P */ | |
225 | ||
226 | return NULL; | |
227 | } | |
228 | ||
229 | /* Default insn builder (insert handler). | |
230 | The instruction is recorded in CGEN_INT_INSN_P byte order (meaning | |
231 | that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is | |
232 | recorded in host byte order, otherwise BUFFER is an array of bytes | |
233 | and the value is recorded in target byte order). | |
234 | The result is an error message or NULL if success. */ | |
235 | ||
236 | static const char * | |
237 | insert_insn_normal (CGEN_CPU_DESC cd, | |
238 | const CGEN_INSN * insn, | |
239 | CGEN_FIELDS * fields, | |
240 | CGEN_INSN_BYTES_PTR buffer, | |
241 | bfd_vma pc) | |
242 | { | |
243 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); | |
244 | unsigned long value; | |
245 | const CGEN_SYNTAX_CHAR_TYPE * syn; | |
246 | ||
247 | CGEN_INIT_INSERT (cd); | |
248 | value = CGEN_INSN_BASE_VALUE (insn); | |
249 | ||
250 | /* If we're recording insns as numbers (rather than a string of bytes), | |
251 | target byte order handling is deferred until later. */ | |
252 | ||
253 | #if CGEN_INT_INSN_P | |
254 | ||
255 | put_insn_int_value (cd, buffer, cd->base_insn_bitsize, | |
256 | CGEN_FIELDS_BITSIZE (fields), value); | |
257 | ||
258 | #else | |
259 | ||
260 | cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, | |
261 | (unsigned) CGEN_FIELDS_BITSIZE (fields)), | |
262 | value); | |
263 | ||
264 | #endif /* ! CGEN_INT_INSN_P */ | |
265 | ||
266 | /* ??? It would be better to scan the format's fields. | |
267 | Still need to be able to insert a value based on the operand though; | |
268 | e.g. storing a branch displacement that got resolved later. | |
269 | Needs more thought first. */ | |
270 | ||
271 | for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) | |
272 | { | |
273 | const char *errmsg; | |
274 | ||
275 | if (CGEN_SYNTAX_CHAR_P (* syn)) | |
276 | continue; | |
277 | ||
278 | errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), | |
279 | fields, buffer, pc); | |
280 | if (errmsg) | |
281 | return errmsg; | |
282 | } | |
283 | ||
284 | return NULL; | |
285 | } | |
286 | ||
287 | #if CGEN_INT_INSN_P | |
288 | /* Cover function to store an insn value into an integral insn. Must go here | |
289 | because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ | |
290 | ||
291 | static void | |
292 | put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, | |
293 | CGEN_INSN_BYTES_PTR buf, | |
294 | int length, | |
295 | int insn_length, | |
296 | CGEN_INSN_INT value) | |
297 | { | |
298 | /* For architectures with insns smaller than the base-insn-bitsize, | |
299 | length may be too big. */ | |
300 | if (length > insn_length) | |
301 | *buf = value; | |
302 | else | |
303 | { | |
304 | int shift = insn_length - length; | |
305 | /* Written this way to avoid undefined behaviour. */ | |
306 | CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; | |
307 | *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); | |
308 | } | |
309 | } | |
310 | #endif | |
311 | \f | |
312 | /* Operand extraction. */ | |
313 | ||
314 | #if ! CGEN_INT_INSN_P | |
315 | ||
316 | /* Subroutine of extract_normal. | |
317 | Ensure sufficient bytes are cached in EX_INFO. | |
318 | OFFSET is the offset in bytes from the start of the insn of the value. | |
319 | BYTES is the length of the needed value. | |
320 | Returns 1 for success, 0 for failure. */ | |
321 | ||
322 | static CGEN_INLINE int | |
323 | fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, | |
324 | CGEN_EXTRACT_INFO *ex_info, | |
325 | int offset, | |
326 | int bytes, | |
327 | bfd_vma pc) | |
328 | { | |
329 | /* It's doubtful that the middle part has already been fetched so | |
330 | we don't optimize that case. kiss. */ | |
331 | unsigned int mask; | |
332 | disassemble_info *info = (disassemble_info *) ex_info->dis_info; | |
333 | ||
334 | /* First do a quick check. */ | |
335 | mask = (1 << bytes) - 1; | |
336 | if (((ex_info->valid >> offset) & mask) == mask) | |
337 | return 1; | |
338 | ||
339 | /* Search for the first byte we need to read. */ | |
340 | for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) | |
341 | if (! (mask & ex_info->valid)) | |
342 | break; | |
343 | ||
344 | if (bytes) | |
345 | { | |
346 | int status; | |
347 | ||
348 | pc += offset; | |
349 | status = (*info->read_memory_func) | |
350 | (pc, ex_info->insn_bytes + offset, bytes, info); | |
351 | ||
352 | if (status != 0) | |
353 | { | |
354 | (*info->memory_error_func) (status, pc, info); | |
355 | return 0; | |
356 | } | |
357 | ||
358 | ex_info->valid |= ((1 << bytes) - 1) << offset; | |
359 | } | |
360 | ||
361 | return 1; | |
362 | } | |
363 | ||
364 | /* Subroutine of extract_normal. */ | |
365 | ||
366 | static CGEN_INLINE long | |
367 | extract_1 (CGEN_CPU_DESC cd, | |
368 | CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, | |
369 | int start, | |
370 | int length, | |
371 | int word_length, | |
372 | unsigned char *bufp, | |
373 | bfd_vma pc ATTRIBUTE_UNUSED) | |
374 | { | |
375 | unsigned long x; | |
376 | int shift; | |
377 | #if 0 | |
378 | int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG; | |
379 | #endif | |
380 | x = cgen_get_insn_value (cd, bufp, word_length); | |
381 | ||
382 | if (CGEN_INSN_LSB0_P) | |
383 | shift = (start + 1) - length; | |
384 | else | |
385 | shift = (word_length - (start + length)); | |
386 | return x >> shift; | |
387 | } | |
388 | ||
389 | #endif /* ! CGEN_INT_INSN_P */ | |
390 | ||
391 | /* Default extraction routine. | |
392 | ||
393 | INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, | |
394 | or sometimes less for cases like the m32r where the base insn size is 32 | |
395 | but some insns are 16 bits. | |
396 | ATTRS is a mask of the boolean attributes. We only need `SIGNED', | |
397 | but for generality we take a bitmask of all of them. | |
398 | WORD_OFFSET is the offset in bits from the start of the insn of the value. | |
399 | WORD_LENGTH is the length of the word in bits in which the value resides. | |
400 | START is the starting bit number in the word, architecture origin. | |
401 | LENGTH is the length of VALUE in bits. | |
402 | TOTAL_LENGTH is the total length of the insn in bits. | |
403 | ||
404 | Returns 1 for success, 0 for failure. */ | |
405 | ||
406 | /* ??? The return code isn't properly used. wip. */ | |
407 | ||
408 | /* ??? This doesn't handle bfd_vma's. Create another function when | |
409 | necessary. */ | |
410 | ||
411 | static int | |
412 | extract_normal (CGEN_CPU_DESC cd, | |
413 | #if ! CGEN_INT_INSN_P | |
414 | CGEN_EXTRACT_INFO *ex_info, | |
415 | #else | |
416 | CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, | |
417 | #endif | |
418 | CGEN_INSN_INT insn_value, | |
419 | unsigned int attrs, | |
420 | unsigned int word_offset, | |
421 | unsigned int start, | |
422 | unsigned int length, | |
423 | unsigned int word_length, | |
424 | unsigned int total_length, | |
425 | #if ! CGEN_INT_INSN_P | |
426 | bfd_vma pc, | |
427 | #else | |
428 | bfd_vma pc ATTRIBUTE_UNUSED, | |
429 | #endif | |
430 | long *valuep) | |
431 | { | |
432 | long value, mask; | |
433 | ||
434 | /* If LENGTH is zero, this operand doesn't contribute to the value | |
435 | so give it a standard value of zero. */ | |
436 | if (length == 0) | |
437 | { | |
438 | *valuep = 0; | |
439 | return 1; | |
440 | } | |
441 | ||
442 | #if 0 | |
443 | if (CGEN_INT_INSN_P | |
444 | && word_offset != 0) | |
445 | abort (); | |
446 | #endif | |
447 | ||
448 | if (word_length > 32) | |
449 | abort (); | |
450 | ||
451 | /* For architectures with insns smaller than the insn-base-bitsize, | |
452 | word_length may be too big. */ | |
453 | if (cd->min_insn_bitsize < cd->base_insn_bitsize) | |
454 | { | |
455 | if (word_offset == 0 | |
456 | && word_length > total_length) | |
457 | word_length = total_length; | |
458 | } | |
459 | ||
460 | /* Does the value reside in INSN_VALUE, and at the right alignment? */ | |
461 | ||
462 | if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) | |
463 | { | |
464 | if (CGEN_INSN_LSB0_P) | |
465 | value = insn_value >> ((word_offset + start + 1) - length); | |
466 | else | |
467 | value = insn_value >> (total_length - ( word_offset + start + length)); | |
468 | } | |
469 | ||
470 | #if ! CGEN_INT_INSN_P | |
471 | ||
472 | else | |
473 | { | |
474 | unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; | |
475 | ||
476 | if (word_length > 32) | |
477 | abort (); | |
478 | ||
479 | if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) | |
480 | return 0; | |
481 | ||
482 | value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); | |
483 | } | |
484 | ||
485 | #endif /* ! CGEN_INT_INSN_P */ | |
486 | ||
487 | /* Written this way to avoid undefined behaviour. */ | |
488 | mask = (((1L << (length - 1)) - 1) << 1) | 1; | |
489 | ||
490 | value &= mask; | |
491 | /* sign extend? */ | |
492 | if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) | |
493 | && (value & (1L << (length - 1)))) | |
494 | value |= ~mask; | |
495 | ||
496 | *valuep = value; | |
497 | ||
498 | return 1; | |
499 | } | |
500 | ||
501 | /* Default insn extractor. | |
502 | ||
503 | INSN_VALUE is the first base_insn_bitsize bits, translated to host order. | |
504 | The extracted fields are stored in FIELDS. | |
505 | EX_INFO is used to handle reading variable length insns. | |
506 | Return the length of the insn in bits, or 0 if no match, | |
507 | or -1 if an error occurs fetching data (memory_error_func will have | |
508 | been called). */ | |
509 | ||
510 | static int | |
511 | extract_insn_normal (CGEN_CPU_DESC cd, | |
512 | const CGEN_INSN *insn, | |
513 | CGEN_EXTRACT_INFO *ex_info, | |
514 | CGEN_INSN_INT insn_value, | |
515 | CGEN_FIELDS *fields, | |
516 | bfd_vma pc) | |
517 | { | |
518 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); | |
519 | const CGEN_SYNTAX_CHAR_TYPE *syn; | |
520 | ||
521 | CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); | |
522 | ||
523 | CGEN_INIT_EXTRACT (cd); | |
524 | ||
525 | for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) | |
526 | { | |
527 | int length; | |
528 | ||
529 | if (CGEN_SYNTAX_CHAR_P (*syn)) | |
530 | continue; | |
531 | ||
532 | length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), | |
533 | ex_info, insn_value, fields, pc); | |
534 | if (length <= 0) | |
535 | return length; | |
536 | } | |
537 | ||
538 | /* We recognized and successfully extracted this insn. */ | |
539 | return CGEN_INSN_BITSIZE (insn); | |
540 | } | |
541 | \f | |
542 | /* machine generated code added here */ | |
543 | ||
544 | const char * m32c_cgen_insert_operand | |
545 | PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma)); | |
546 | ||
547 | /* Main entry point for operand insertion. | |
548 | ||
549 | This function is basically just a big switch statement. Earlier versions | |
550 | used tables to look up the function to use, but | |
551 | - if the table contains both assembler and disassembler functions then | |
552 | the disassembler contains much of the assembler and vice-versa, | |
553 | - there's a lot of inlining possibilities as things grow, | |
554 | - using a switch statement avoids the function call overhead. | |
555 | ||
556 | This function could be moved into `parse_insn_normal', but keeping it | |
557 | separate makes clear the interface between `parse_insn_normal' and each of | |
558 | the handlers. It's also needed by GAS to insert operands that couldn't be | |
559 | resolved during parsing. */ | |
560 | ||
561 | const char * | |
562 | m32c_cgen_insert_operand (cd, opindex, fields, buffer, pc) | |
563 | CGEN_CPU_DESC cd; | |
564 | int opindex; | |
565 | CGEN_FIELDS * fields; | |
566 | CGEN_INSN_BYTES_PTR buffer; | |
567 | bfd_vma pc ATTRIBUTE_UNUSED; | |
568 | { | |
569 | const char * errmsg = NULL; | |
570 | unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); | |
571 | ||
572 | switch (opindex) | |
573 | { | |
574 | case M32C_OPERAND_A0 : | |
575 | break; | |
576 | case M32C_OPERAND_A1 : | |
577 | break; | |
578 | case M32C_OPERAND_AN16_PUSH_S : | |
579 | errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer); | |
580 | break; | |
581 | case M32C_OPERAND_BIT16AN : | |
582 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); | |
583 | break; | |
584 | case M32C_OPERAND_BIT16RN : | |
585 | errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); | |
586 | break; | |
587 | case M32C_OPERAND_BIT32ANPREFIXED : | |
588 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); | |
589 | break; | |
590 | case M32C_OPERAND_BIT32ANUNPREFIXED : | |
591 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
592 | break; | |
593 | case M32C_OPERAND_BIT32RNPREFIXED : | |
594 | { | |
595 | long value = fields->f_dst32_rn_prefixed_QI; | |
596 | value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); | |
597 | errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); | |
598 | } | |
599 | break; | |
600 | case M32C_OPERAND_BIT32RNUNPREFIXED : | |
601 | { | |
602 | long value = fields->f_dst32_rn_unprefixed_QI; | |
603 | value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); | |
604 | errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); | |
605 | } | |
606 | break; | |
607 | case M32C_OPERAND_BITBASE16_16_S8 : | |
608 | errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); | |
609 | break; | |
610 | case M32C_OPERAND_BITBASE16_16_U16 : | |
611 | { | |
612 | long value = fields->f_dsp_16_u16; | |
613 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
614 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); | |
615 | } | |
616 | break; | |
617 | case M32C_OPERAND_BITBASE16_16_U8 : | |
618 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); | |
619 | break; | |
620 | case M32C_OPERAND_BITBASE16_8_U11_S : | |
621 | { | |
622 | { | |
623 | FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7)); | |
624 | FLD (f_dsp_8_u8) = ((((unsigned int) (FLD (f_bitbase16_u11_S)) >> (3))) & (255)); | |
625 | } | |
626 | errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer); | |
627 | if (errmsg) | |
628 | break; | |
629 | errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer); | |
630 | if (errmsg) | |
631 | break; | |
632 | } | |
633 | break; | |
634 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : | |
635 | { | |
636 | { | |
637 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7)); | |
638 | FLD (f_dsp_16_s8) = ((int) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3)); | |
639 | } | |
640 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); | |
641 | if (errmsg) | |
642 | break; | |
643 | errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); | |
644 | if (errmsg) | |
645 | break; | |
646 | } | |
647 | break; | |
648 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : | |
649 | { | |
650 | { | |
651 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7)); | |
652 | FLD (f_dsp_16_s16) = ((int) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3)); | |
653 | } | |
654 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); | |
655 | if (errmsg) | |
656 | break; | |
657 | { | |
658 | long value = fields->f_dsp_16_s16; | |
659 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
660 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); | |
661 | } | |
662 | if (errmsg) | |
663 | break; | |
664 | } | |
665 | break; | |
666 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : | |
667 | { | |
668 | { | |
669 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7)); | |
670 | FLD (f_dsp_16_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255)); | |
671 | } | |
672 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); | |
673 | if (errmsg) | |
674 | break; | |
675 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); | |
676 | if (errmsg) | |
677 | break; | |
678 | } | |
679 | break; | |
680 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : | |
681 | { | |
682 | { | |
683 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7)); | |
684 | FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535)); | |
685 | } | |
686 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); | |
687 | if (errmsg) | |
688 | break; | |
689 | { | |
690 | long value = fields->f_dsp_16_u16; | |
691 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
692 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); | |
693 | } | |
694 | if (errmsg) | |
695 | break; | |
696 | } | |
697 | break; | |
698 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : | |
699 | { | |
700 | { | |
701 | FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7)); | |
702 | FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535)); | |
703 | FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255)); | |
704 | } | |
705 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); | |
706 | if (errmsg) | |
707 | break; | |
708 | { | |
709 | long value = fields->f_dsp_16_u16; | |
710 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
711 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); | |
712 | } | |
713 | if (errmsg) | |
714 | break; | |
715 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
716 | if (errmsg) | |
717 | break; | |
718 | } | |
719 | break; | |
720 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : | |
721 | { | |
722 | { | |
723 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7)); | |
724 | FLD (f_dsp_24_s8) = ((int) (FLD (f_bitbase32_24_s11_prefixed)) >> (3)); | |
725 | } | |
726 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); | |
727 | if (errmsg) | |
728 | break; | |
729 | errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); | |
730 | if (errmsg) | |
731 | break; | |
732 | } | |
733 | break; | |
734 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : | |
735 | { | |
736 | { | |
737 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7)); | |
738 | FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255)); | |
739 | FLD (f_dsp_32_s8) = ((int) (FLD (f_bitbase32_24_s19_prefixed)) >> (11)); | |
740 | } | |
741 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); | |
742 | if (errmsg) | |
743 | break; | |
744 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
745 | if (errmsg) | |
746 | break; | |
747 | errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); | |
748 | if (errmsg) | |
749 | break; | |
750 | } | |
751 | break; | |
752 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : | |
753 | { | |
754 | { | |
755 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7)); | |
756 | FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255)); | |
757 | } | |
758 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); | |
759 | if (errmsg) | |
760 | break; | |
761 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
762 | if (errmsg) | |
763 | break; | |
764 | } | |
765 | break; | |
766 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : | |
767 | { | |
768 | { | |
769 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7)); | |
770 | FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255)); | |
771 | FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255)); | |
772 | } | |
773 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); | |
774 | if (errmsg) | |
775 | break; | |
776 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
777 | if (errmsg) | |
778 | break; | |
779 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
780 | if (errmsg) | |
781 | break; | |
782 | } | |
783 | break; | |
784 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : | |
785 | { | |
786 | { | |
787 | FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7)); | |
788 | FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255)); | |
789 | FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535)); | |
790 | } | |
791 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); | |
792 | if (errmsg) | |
793 | break; | |
794 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
795 | if (errmsg) | |
796 | break; | |
797 | { | |
798 | long value = fields->f_dsp_32_u16; | |
799 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
800 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); | |
801 | } | |
802 | if (errmsg) | |
803 | break; | |
804 | } | |
805 | break; | |
806 | case M32C_OPERAND_BITNO16R : | |
807 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); | |
808 | break; | |
809 | case M32C_OPERAND_BITNO32PREFIXED : | |
810 | errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); | |
811 | break; | |
812 | case M32C_OPERAND_BITNO32UNPREFIXED : | |
813 | errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); | |
814 | break; | |
815 | case M32C_OPERAND_DSP_10_U6 : | |
816 | errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer); | |
817 | break; | |
818 | case M32C_OPERAND_DSP_16_S16 : | |
819 | { | |
820 | long value = fields->f_dsp_16_s16; | |
821 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
822 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); | |
823 | } | |
824 | break; | |
825 | case M32C_OPERAND_DSP_16_S8 : | |
826 | errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); | |
827 | break; | |
828 | case M32C_OPERAND_DSP_16_U16 : | |
829 | { | |
830 | long value = fields->f_dsp_16_u16; | |
831 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
832 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); | |
833 | } | |
834 | break; | |
835 | case M32C_OPERAND_DSP_16_U20 : | |
836 | { | |
837 | { | |
838 | FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535)); | |
839 | FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255)); | |
840 | } | |
841 | { | |
842 | long value = fields->f_dsp_16_u16; | |
843 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
844 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); | |
845 | } | |
846 | if (errmsg) | |
847 | break; | |
848 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
849 | if (errmsg) | |
850 | break; | |
851 | } | |
852 | break; | |
853 | case M32C_OPERAND_DSP_16_U24 : | |
854 | { | |
855 | { | |
856 | FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535)); | |
857 | FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255)); | |
858 | } | |
859 | { | |
860 | long value = fields->f_dsp_16_u16; | |
861 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
862 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); | |
863 | } | |
864 | if (errmsg) | |
865 | break; | |
866 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
867 | if (errmsg) | |
868 | break; | |
869 | } | |
870 | break; | |
871 | case M32C_OPERAND_DSP_16_U8 : | |
872 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); | |
873 | break; | |
874 | case M32C_OPERAND_DSP_24_S16 : | |
875 | { | |
876 | { | |
877 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255)); | |
878 | FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255)); | |
879 | } | |
880 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
881 | if (errmsg) | |
882 | break; | |
883 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
884 | if (errmsg) | |
885 | break; | |
886 | } | |
887 | break; | |
888 | case M32C_OPERAND_DSP_24_S8 : | |
889 | errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); | |
890 | break; | |
891 | case M32C_OPERAND_DSP_24_U16 : | |
892 | { | |
893 | { | |
894 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255)); | |
895 | FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_u16)) >> (8))) & (255)); | |
896 | } | |
897 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
898 | if (errmsg) | |
899 | break; | |
900 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
901 | if (errmsg) | |
902 | break; | |
903 | } | |
904 | break; | |
905 | case M32C_OPERAND_DSP_24_U20 : | |
906 | { | |
907 | { | |
908 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255)); | |
909 | FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535)); | |
910 | } | |
911 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
912 | if (errmsg) | |
913 | break; | |
914 | { | |
915 | long value = fields->f_dsp_32_u16; | |
916 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
917 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); | |
918 | } | |
919 | if (errmsg) | |
920 | break; | |
921 | } | |
922 | break; | |
923 | case M32C_OPERAND_DSP_24_U24 : | |
924 | { | |
925 | { | |
926 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255)); | |
927 | FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535)); | |
928 | } | |
929 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
930 | if (errmsg) | |
931 | break; | |
932 | { | |
933 | long value = fields->f_dsp_32_u16; | |
934 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
935 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); | |
936 | } | |
937 | if (errmsg) | |
938 | break; | |
939 | } | |
940 | break; | |
941 | case M32C_OPERAND_DSP_24_U8 : | |
942 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
943 | break; | |
944 | case M32C_OPERAND_DSP_32_S16 : | |
945 | { | |
946 | long value = fields->f_dsp_32_s16; | |
947 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
948 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer); | |
949 | } | |
950 | break; | |
951 | case M32C_OPERAND_DSP_32_S8 : | |
952 | errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); | |
953 | break; | |
954 | case M32C_OPERAND_DSP_32_U16 : | |
955 | { | |
956 | long value = fields->f_dsp_32_u16; | |
957 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
958 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); | |
959 | } | |
960 | break; | |
961 | case M32C_OPERAND_DSP_32_U20 : | |
962 | { | |
963 | long value = fields->f_dsp_32_u24; | |
964 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); | |
965 | errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); | |
966 | } | |
967 | break; | |
968 | case M32C_OPERAND_DSP_32_U24 : | |
969 | { | |
970 | long value = fields->f_dsp_32_u24; | |
971 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); | |
972 | errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); | |
973 | } | |
974 | break; | |
975 | case M32C_OPERAND_DSP_32_U8 : | |
976 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
977 | break; | |
978 | case M32C_OPERAND_DSP_40_S16 : | |
979 | { | |
980 | long value = fields->f_dsp_40_s16; | |
981 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
982 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer); | |
983 | } | |
984 | break; | |
985 | case M32C_OPERAND_DSP_40_S8 : | |
986 | errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer); | |
987 | break; | |
988 | case M32C_OPERAND_DSP_40_U16 : | |
989 | { | |
990 | long value = fields->f_dsp_40_u16; | |
991 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
992 | errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer); | |
993 | } | |
994 | break; | |
995 | case M32C_OPERAND_DSP_40_U24 : | |
996 | { | |
997 | long value = fields->f_dsp_40_u24; | |
998 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); | |
999 | errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer); | |
1000 | } | |
1001 | break; | |
1002 | case M32C_OPERAND_DSP_40_U8 : | |
1003 | errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer); | |
1004 | break; | |
1005 | case M32C_OPERAND_DSP_48_S16 : | |
1006 | { | |
1007 | long value = fields->f_dsp_48_s16; | |
1008 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
1009 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer); | |
1010 | } | |
1011 | break; | |
1012 | case M32C_OPERAND_DSP_48_S8 : | |
1013 | errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer); | |
1014 | break; | |
1015 | case M32C_OPERAND_DSP_48_U16 : | |
1016 | { | |
1017 | long value = fields->f_dsp_48_u16; | |
1018 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
1019 | errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); | |
1020 | } | |
1021 | break; | |
1022 | case M32C_OPERAND_DSP_48_U24 : | |
1023 | { | |
1024 | { | |
1025 | FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_48_u24)) >> (16))) & (255)); | |
1026 | FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535)); | |
1027 | } | |
1028 | { | |
1029 | long value = fields->f_dsp_48_u16; | |
1030 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
1031 | errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); | |
1032 | } | |
1033 | if (errmsg) | |
1034 | break; | |
1035 | errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); | |
1036 | if (errmsg) | |
1037 | break; | |
1038 | } | |
1039 | break; | |
1040 | case M32C_OPERAND_DSP_48_U8 : | |
1041 | errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer); | |
1042 | break; | |
1043 | case M32C_OPERAND_DSP_8_S8 : | |
1044 | errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer); | |
1045 | break; | |
1046 | case M32C_OPERAND_DSP_8_U16 : | |
1047 | { | |
1048 | long value = fields->f_dsp_8_u16; | |
1049 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
1050 | errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer); | |
1051 | } | |
1052 | break; | |
1053 | case M32C_OPERAND_DSP_8_U6 : | |
1054 | errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer); | |
1055 | break; | |
1056 | case M32C_OPERAND_DSP_8_U8 : | |
1057 | errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer); | |
1058 | break; | |
1059 | case M32C_OPERAND_DST16AN : | |
1060 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); | |
1061 | break; | |
1062 | case M32C_OPERAND_DST16AN_S : | |
1063 | errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer); | |
1064 | break; | |
1065 | case M32C_OPERAND_DST16ANHI : | |
1066 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); | |
1067 | break; | |
1068 | case M32C_OPERAND_DST16ANQI : | |
1069 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); | |
1070 | break; | |
1071 | case M32C_OPERAND_DST16ANQI_S : | |
1072 | errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer); | |
1073 | break; | |
1074 | case M32C_OPERAND_DST16ANSI : | |
1075 | errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); | |
1076 | break; | |
1077 | case M32C_OPERAND_DST16RNEXTQI : | |
1078 | errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer); | |
1079 | break; | |
1080 | case M32C_OPERAND_DST16RNHI : | |
1081 | errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); | |
1082 | break; | |
1083 | case M32C_OPERAND_DST16RNQI : | |
1084 | errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); | |
1085 | break; | |
1086 | case M32C_OPERAND_DST16RNQI_S : | |
1087 | errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer); | |
1088 | break; | |
1089 | case M32C_OPERAND_DST16RNSI : | |
1090 | errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); | |
1091 | break; | |
1092 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : | |
1093 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
1094 | break; | |
1095 | case M32C_OPERAND_DST32ANPREFIXED : | |
1096 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); | |
1097 | break; | |
1098 | case M32C_OPERAND_DST32ANPREFIXEDHI : | |
1099 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); | |
1100 | break; | |
1101 | case M32C_OPERAND_DST32ANPREFIXEDQI : | |
1102 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); | |
1103 | break; | |
1104 | case M32C_OPERAND_DST32ANPREFIXEDSI : | |
1105 | errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); | |
1106 | break; | |
1107 | case M32C_OPERAND_DST32ANUNPREFIXED : | |
1108 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
1109 | break; | |
1110 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : | |
1111 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
1112 | break; | |
1113 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : | |
1114 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
1115 | break; | |
1116 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : | |
1117 | errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
1118 | break; | |
1119 | case M32C_OPERAND_DST32R0HI_S : | |
1120 | break; | |
1121 | case M32C_OPERAND_DST32R0QI_S : | |
1122 | break; | |
1123 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : | |
1124 | errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
1125 | break; | |
1126 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : | |
1127 | errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); | |
1128 | break; | |
1129 | case M32C_OPERAND_DST32RNPREFIXEDHI : | |
1130 | { | |
1131 | long value = fields->f_dst32_rn_prefixed_HI; | |
1132 | value = ((((value) + (2))) % (4)); | |
1133 | errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); | |
1134 | } | |
1135 | break; | |
1136 | case M32C_OPERAND_DST32RNPREFIXEDQI : | |
1137 | { | |
1138 | long value = fields->f_dst32_rn_prefixed_QI; | |
1139 | value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); | |
1140 | errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); | |
1141 | } | |
1142 | break; | |
1143 | case M32C_OPERAND_DST32RNPREFIXEDSI : | |
1144 | { | |
1145 | long value = fields->f_dst32_rn_prefixed_SI; | |
1146 | value = ((value) + (2)); | |
1147 | errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); | |
1148 | } | |
1149 | break; | |
1150 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : | |
1151 | { | |
1152 | long value = fields->f_dst32_rn_unprefixed_HI; | |
1153 | value = ((((value) + (2))) % (4)); | |
1154 | errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); | |
1155 | } | |
1156 | break; | |
1157 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : | |
1158 | { | |
1159 | long value = fields->f_dst32_rn_unprefixed_QI; | |
1160 | value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); | |
1161 | errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); | |
1162 | } | |
1163 | break; | |
1164 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : | |
1165 | { | |
1166 | long value = fields->f_dst32_rn_unprefixed_SI; | |
1167 | value = ((value) + (2)); | |
1168 | errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); | |
1169 | } | |
1170 | break; | |
1171 | case M32C_OPERAND_G : | |
1172 | break; | |
1173 | case M32C_OPERAND_IMM_12_S4 : | |
1174 | errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer); | |
1175 | break; | |
1176 | case M32C_OPERAND_IMM_13_U3 : | |
1177 | errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer); | |
1178 | break; | |
1179 | case M32C_OPERAND_IMM_16_HI : | |
1180 | { | |
1181 | long value = fields->f_dsp_16_s16; | |
1182 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
1183 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); | |
1184 | } | |
1185 | break; | |
1186 | case M32C_OPERAND_IMM_16_QI : | |
1187 | errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); | |
1188 | break; | |
1189 | case M32C_OPERAND_IMM_16_SI : | |
1190 | { | |
1191 | { | |
1192 | FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_16_s32)) >> (16))) & (65535)); | |
1193 | FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535)); | |
1194 | } | |
1195 | { | |
1196 | long value = fields->f_dsp_16_u16; | |
1197 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
1198 | errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); | |
1199 | } | |
1200 | if (errmsg) | |
1201 | break; | |
1202 | { | |
1203 | long value = fields->f_dsp_32_u16; | |
1204 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
1205 | errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); | |
1206 | } | |
1207 | if (errmsg) | |
1208 | break; | |
1209 | } | |
1210 | break; | |
1211 | case M32C_OPERAND_IMM_20_S4 : | |
1212 | errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer); | |
1213 | break; | |
1214 | case M32C_OPERAND_IMM_24_HI : | |
1215 | { | |
1216 | { | |
1217 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255)); | |
1218 | FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255)); | |
1219 | } | |
1220 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
1221 | if (errmsg) | |
1222 | break; | |
1223 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
1224 | if (errmsg) | |
1225 | break; | |
1226 | } | |
1227 | break; | |
1228 | case M32C_OPERAND_IMM_24_QI : | |
1229 | errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); | |
1230 | break; | |
1231 | case M32C_OPERAND_IMM_24_SI : | |
1232 | { | |
1233 | { | |
1234 | FLD (f_dsp_32_u24) = ((((unsigned int) (FLD (f_dsp_24_s32)) >> (8))) & (16777215)); | |
1235 | FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255)); | |
1236 | } | |
1237 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
1238 | if (errmsg) | |
1239 | break; | |
1240 | { | |
1241 | long value = fields->f_dsp_32_u24; | |
1242 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); | |
1243 | errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); | |
1244 | } | |
1245 | if (errmsg) | |
1246 | break; | |
1247 | } | |
1248 | break; | |
1249 | case M32C_OPERAND_IMM_32_HI : | |
1250 | { | |
1251 | long value = fields->f_dsp_32_s16; | |
1252 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
1253 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer); | |
1254 | } | |
1255 | break; | |
1256 | case M32C_OPERAND_IMM_32_QI : | |
1257 | errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); | |
1258 | break; | |
1259 | case M32C_OPERAND_IMM_32_SI : | |
1260 | { | |
1261 | long value = fields->f_dsp_32_s32; | |
1262 | value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000))))))); | |
1263 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer); | |
1264 | } | |
1265 | break; | |
1266 | case M32C_OPERAND_IMM_40_HI : | |
1267 | { | |
1268 | long value = fields->f_dsp_40_s16; | |
1269 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
1270 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer); | |
1271 | } | |
1272 | break; | |
1273 | case M32C_OPERAND_IMM_40_QI : | |
1274 | errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer); | |
1275 | break; | |
1276 | case M32C_OPERAND_IMM_40_SI : | |
1277 | { | |
1278 | { | |
1279 | FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_40_s32)) >> (24))) & (255)); | |
1280 | FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215)); | |
1281 | } | |
1282 | { | |
1283 | long value = fields->f_dsp_40_u24; | |
1284 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); | |
1285 | errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer); | |
1286 | } | |
1287 | if (errmsg) | |
1288 | break; | |
1289 | errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); | |
1290 | if (errmsg) | |
1291 | break; | |
1292 | } | |
1293 | break; | |
1294 | case M32C_OPERAND_IMM_48_HI : | |
1295 | { | |
1296 | long value = fields->f_dsp_48_s16; | |
1297 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
1298 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer); | |
1299 | } | |
1300 | break; | |
1301 | case M32C_OPERAND_IMM_48_QI : | |
1302 | errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer); | |
1303 | break; | |
1304 | case M32C_OPERAND_IMM_48_SI : | |
1305 | { | |
1306 | { | |
1307 | FLD (f_dsp_64_u16) = ((((unsigned int) (FLD (f_dsp_48_s32)) >> (16))) & (65535)); | |
1308 | FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535)); | |
1309 | } | |
1310 | { | |
1311 | long value = fields->f_dsp_48_u16; | |
1312 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
1313 | errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); | |
1314 | } | |
1315 | if (errmsg) | |
1316 | break; | |
1317 | { | |
1318 | long value = fields->f_dsp_64_u16; | |
1319 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
1320 | errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer); | |
1321 | } | |
1322 | if (errmsg) | |
1323 | break; | |
1324 | } | |
1325 | break; | |
1326 | case M32C_OPERAND_IMM_56_HI : | |
1327 | { | |
1328 | { | |
1329 | FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255)); | |
1330 | FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_56_s16)) >> (8))) & (255)); | |
1331 | } | |
1332 | errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer); | |
1333 | if (errmsg) | |
1334 | break; | |
1335 | errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); | |
1336 | if (errmsg) | |
1337 | break; | |
1338 | } | |
1339 | break; | |
1340 | case M32C_OPERAND_IMM_56_QI : | |
1341 | errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer); | |
1342 | break; | |
1343 | case M32C_OPERAND_IMM_64_HI : | |
1344 | { | |
1345 | long value = fields->f_dsp_64_s16; | |
1346 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
1347 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer); | |
1348 | } | |
1349 | break; | |
1350 | case M32C_OPERAND_IMM_8_HI : | |
1351 | { | |
1352 | long value = fields->f_dsp_8_s16; | |
1353 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
1354 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer); | |
1355 | } | |
1356 | break; | |
1357 | case M32C_OPERAND_IMM_8_QI : | |
1358 | errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer); | |
1359 | break; | |
1360 | case M32C_OPERAND_IMM_8_S4 : | |
1361 | errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer); | |
1362 | break; | |
1363 | case M32C_OPERAND_IMM_SH_12_S4 : | |
1364 | errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer); | |
1365 | break; | |
1366 | case M32C_OPERAND_IMM_SH_20_S4 : | |
1367 | errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer); | |
1368 | break; | |
1369 | case M32C_OPERAND_IMM_SH_8_S4 : | |
1370 | errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer); | |
1371 | break; | |
1372 | case M32C_OPERAND_IMM1_S : | |
1373 | { | |
1374 | long value = fields->f_imm1_S; | |
1375 | value = ((value) - (1)); | |
1376 | errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer); | |
1377 | } | |
1378 | break; | |
1379 | case M32C_OPERAND_IMM3_S : | |
1380 | { | |
1381 | { | |
1382 | FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1)); | |
1383 | FLD (f_2_2) = ((((unsigned int) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3)); | |
1384 | } | |
1385 | errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); | |
1386 | if (errmsg) | |
1387 | break; | |
1388 | errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); | |
1389 | if (errmsg) | |
1390 | break; | |
1391 | } | |
1392 | break; | |
1393 | case M32C_OPERAND_LAB_16_8 : | |
1394 | { | |
1395 | long value = fields->f_lab_16_8; | |
1396 | value = ((value) - (((pc) + (2)))); | |
1397 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer); | |
1398 | } | |
1399 | break; | |
1400 | case M32C_OPERAND_LAB_24_8 : | |
1401 | { | |
1402 | long value = fields->f_lab_24_8; | |
1403 | value = ((value) - (((pc) + (2)))); | |
1404 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer); | |
1405 | } | |
1406 | break; | |
1407 | case M32C_OPERAND_LAB_32_8 : | |
1408 | { | |
1409 | long value = fields->f_lab_32_8; | |
1410 | value = ((value) - (((pc) + (2)))); | |
1411 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer); | |
1412 | } | |
1413 | break; | |
1414 | case M32C_OPERAND_LAB_40_8 : | |
1415 | { | |
1416 | long value = fields->f_lab_40_8; | |
1417 | value = ((value) - (((pc) + (2)))); | |
1418 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer); | |
1419 | } | |
1420 | break; | |
1421 | case M32C_OPERAND_LAB_5_3 : | |
1422 | { | |
1423 | long value = fields->f_lab_5_3; | |
1424 | value = ((value) - (((pc) + (2)))); | |
1425 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer); | |
1426 | } | |
1427 | break; | |
1428 | case M32C_OPERAND_LAB_8_16 : | |
1429 | { | |
1430 | long value = fields->f_lab_8_16; | |
1431 | value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((unsigned int) (((((value) - (((pc) + (1))))) & (65535))) >> (8)))); | |
1432 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer); | |
1433 | } | |
1434 | break; | |
1435 | case M32C_OPERAND_LAB_8_24 : | |
1436 | { | |
1437 | long value = fields->f_lab_8_24; | |
1438 | value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); | |
1439 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer); | |
1440 | } | |
1441 | break; | |
1442 | case M32C_OPERAND_LAB_8_8 : | |
1443 | { | |
1444 | long value = fields->f_lab_8_8; | |
1445 | value = ((value) - (((pc) + (1)))); | |
1446 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer); | |
1447 | } | |
1448 | break; | |
1449 | case M32C_OPERAND_LAB32_JMP_S : | |
1450 | { | |
1451 | { | |
1452 | FLD (f_7_1) = ((((FLD (f_lab32_jmp_s)) - (pc))) & (1)); | |
1453 | FLD (f_2_2) = ((unsigned int) (((FLD (f_lab32_jmp_s)) - (pc))) >> (1)); | |
1454 | } | |
1455 | errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); | |
1456 | if (errmsg) | |
1457 | break; | |
1458 | errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); | |
1459 | if (errmsg) | |
1460 | break; | |
1461 | } | |
1462 | break; | |
1463 | case M32C_OPERAND_Q : | |
1464 | break; | |
1465 | case M32C_OPERAND_R0 : | |
1466 | break; | |
1467 | case M32C_OPERAND_R0H : | |
1468 | break; | |
1469 | case M32C_OPERAND_R0L : | |
1470 | break; | |
1471 | case M32C_OPERAND_R1 : | |
1472 | break; | |
1473 | case M32C_OPERAND_R1R2R0 : | |
1474 | break; | |
1475 | case M32C_OPERAND_R2 : | |
1476 | break; | |
1477 | case M32C_OPERAND_R2R0 : | |
1478 | break; | |
1479 | case M32C_OPERAND_R3 : | |
1480 | break; | |
1481 | case M32C_OPERAND_R3R1 : | |
1482 | break; | |
1483 | case M32C_OPERAND_REGSETPOP : | |
1484 | errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer); | |
1485 | break; | |
1486 | case M32C_OPERAND_REGSETPUSH : | |
1487 | errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer); | |
1488 | break; | |
1489 | case M32C_OPERAND_RN16_PUSH_S : | |
1490 | errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer); | |
1491 | break; | |
1492 | case M32C_OPERAND_S : | |
1493 | break; | |
1494 | case M32C_OPERAND_SRC16AN : | |
1495 | errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); | |
1496 | break; | |
1497 | case M32C_OPERAND_SRC16ANHI : | |
1498 | errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); | |
1499 | break; | |
1500 | case M32C_OPERAND_SRC16ANQI : | |
1501 | errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); | |
1502 | break; | |
1503 | case M32C_OPERAND_SRC16RNHI : | |
1504 | errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer); | |
1505 | break; | |
1506 | case M32C_OPERAND_SRC16RNQI : | |
1507 | errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer); | |
1508 | break; | |
1509 | case M32C_OPERAND_SRC32ANPREFIXED : | |
1510 | errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); | |
1511 | break; | |
1512 | case M32C_OPERAND_SRC32ANPREFIXEDHI : | |
1513 | errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); | |
1514 | break; | |
1515 | case M32C_OPERAND_SRC32ANPREFIXEDQI : | |
1516 | errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); | |
1517 | break; | |
1518 | case M32C_OPERAND_SRC32ANPREFIXEDSI : | |
1519 | errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); | |
1520 | break; | |
1521 | case M32C_OPERAND_SRC32ANUNPREFIXED : | |
1522 | errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); | |
1523 | break; | |
1524 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : | |
1525 | errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); | |
1526 | break; | |
1527 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : | |
1528 | errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); | |
1529 | break; | |
1530 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : | |
1531 | errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); | |
1532 | break; | |
1533 | case M32C_OPERAND_SRC32RNPREFIXEDHI : | |
1534 | { | |
1535 | long value = fields->f_src32_rn_prefixed_HI; | |
1536 | value = ((((value) + (2))) % (4)); | |
1537 | errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); | |
1538 | } | |
1539 | break; | |
1540 | case M32C_OPERAND_SRC32RNPREFIXEDQI : | |
1541 | { | |
1542 | long value = fields->f_src32_rn_prefixed_QI; | |
1543 | value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); | |
1544 | errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); | |
1545 | } | |
1546 | break; | |
1547 | case M32C_OPERAND_SRC32RNPREFIXEDSI : | |
1548 | { | |
1549 | long value = fields->f_src32_rn_prefixed_SI; | |
1550 | value = ((value) + (2)); | |
1551 | errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); | |
1552 | } | |
1553 | break; | |
1554 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : | |
1555 | { | |
1556 | long value = fields->f_src32_rn_unprefixed_HI; | |
1557 | value = ((((value) + (2))) % (4)); | |
1558 | errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); | |
1559 | } | |
1560 | break; | |
1561 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : | |
1562 | { | |
1563 | long value = fields->f_src32_rn_unprefixed_QI; | |
1564 | value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1)))); | |
1565 | errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); | |
1566 | } | |
1567 | break; | |
1568 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : | |
1569 | { | |
1570 | long value = fields->f_src32_rn_unprefixed_SI; | |
1571 | value = ((value) + (2)); | |
1572 | errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); | |
1573 | } | |
1574 | break; | |
1575 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : | |
1576 | errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer); | |
1577 | break; | |
1578 | case M32C_OPERAND_X : | |
1579 | break; | |
1580 | case M32C_OPERAND_Z : | |
1581 | break; | |
1582 | case M32C_OPERAND_COND16_16 : | |
1583 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); | |
1584 | break; | |
1585 | case M32C_OPERAND_COND16_24 : | |
1586 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
1587 | break; | |
1588 | case M32C_OPERAND_COND16_32 : | |
1589 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
1590 | break; | |
1591 | case M32C_OPERAND_COND16C : | |
1592 | errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); | |
1593 | break; | |
1594 | case M32C_OPERAND_COND16J : | |
1595 | errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); | |
1596 | break; | |
1597 | case M32C_OPERAND_COND16J5 : | |
1598 | errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer); | |
1599 | break; | |
1600 | case M32C_OPERAND_COND32 : | |
1601 | { | |
1602 | { | |
1603 | FLD (f_9_1) = ((((unsigned int) (FLD (f_cond32)) >> (3))) & (1)); | |
1604 | FLD (f_13_3) = ((FLD (f_cond32)) & (7)); | |
1605 | } | |
1606 | errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer); | |
1607 | if (errmsg) | |
1608 | break; | |
1609 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); | |
1610 | if (errmsg) | |
1611 | break; | |
1612 | } | |
1613 | break; | |
1614 | case M32C_OPERAND_COND32_16 : | |
1615 | errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); | |
1616 | break; | |
1617 | case M32C_OPERAND_COND32_24 : | |
1618 | errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); | |
1619 | break; | |
1620 | case M32C_OPERAND_COND32_32 : | |
1621 | errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); | |
1622 | break; | |
1623 | case M32C_OPERAND_COND32_40 : | |
1624 | errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer); | |
1625 | break; | |
1626 | case M32C_OPERAND_COND32J : | |
1627 | { | |
1628 | { | |
1629 | FLD (f_1_3) = ((((unsigned int) (FLD (f_cond32j)) >> (1))) & (7)); | |
1630 | FLD (f_7_1) = ((FLD (f_cond32j)) & (1)); | |
1631 | } | |
1632 | errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer); | |
1633 | if (errmsg) | |
1634 | break; | |
1635 | errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); | |
1636 | if (errmsg) | |
1637 | break; | |
1638 | } | |
1639 | break; | |
1640 | case M32C_OPERAND_CR1_PREFIXED_32 : | |
1641 | errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer); | |
1642 | break; | |
1643 | case M32C_OPERAND_CR1_UNPREFIXED_32 : | |
1644 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); | |
1645 | break; | |
1646 | case M32C_OPERAND_CR16 : | |
1647 | errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer); | |
1648 | break; | |
1649 | case M32C_OPERAND_CR2_32 : | |
1650 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); | |
1651 | break; | |
1652 | case M32C_OPERAND_CR3_PREFIXED_32 : | |
1653 | errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer); | |
1654 | break; | |
1655 | case M32C_OPERAND_CR3_UNPREFIXED_32 : | |
1656 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); | |
1657 | break; | |
1658 | case M32C_OPERAND_FLAGS16 : | |
1659 | errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer); | |
1660 | break; | |
1661 | case M32C_OPERAND_FLAGS32 : | |
1662 | errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); | |
1663 | break; | |
1664 | case M32C_OPERAND_SCCOND32 : | |
1665 | errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); | |
1666 | break; | |
1667 | case M32C_OPERAND_SIZE : | |
1668 | break; | |
1669 | ||
1670 | default : | |
1671 | /* xgettext:c-format */ | |
1672 | fprintf (stderr, _("Unrecognized field %d while building insn.\n"), | |
1673 | opindex); | |
1674 | abort (); | |
1675 | } | |
1676 | ||
1677 | return errmsg; | |
1678 | } | |
1679 | ||
1680 | int m32c_cgen_extract_operand | |
1681 | PARAMS ((CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, | |
1682 | CGEN_FIELDS *, bfd_vma)); | |
1683 | ||
1684 | /* Main entry point for operand extraction. | |
1685 | The result is <= 0 for error, >0 for success. | |
1686 | ??? Actual values aren't well defined right now. | |
1687 | ||
1688 | This function is basically just a big switch statement. Earlier versions | |
1689 | used tables to look up the function to use, but | |
1690 | - if the table contains both assembler and disassembler functions then | |
1691 | the disassembler contains much of the assembler and vice-versa, | |
1692 | - there's a lot of inlining possibilities as things grow, | |
1693 | - using a switch statement avoids the function call overhead. | |
1694 | ||
1695 | This function could be moved into `print_insn_normal', but keeping it | |
1696 | separate makes clear the interface between `print_insn_normal' and each of | |
1697 | the handlers. */ | |
1698 | ||
1699 | int | |
1700 | m32c_cgen_extract_operand (cd, opindex, ex_info, insn_value, fields, pc) | |
1701 | CGEN_CPU_DESC cd; | |
1702 | int opindex; | |
1703 | CGEN_EXTRACT_INFO *ex_info; | |
1704 | CGEN_INSN_INT insn_value; | |
1705 | CGEN_FIELDS * fields; | |
1706 | bfd_vma pc; | |
1707 | { | |
1708 | /* Assume success (for those operands that are nops). */ | |
1709 | int length = 1; | |
1710 | unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); | |
1711 | ||
1712 | switch (opindex) | |
1713 | { | |
1714 | case M32C_OPERAND_A0 : | |
1715 | break; | |
1716 | case M32C_OPERAND_A1 : | |
1717 | break; | |
1718 | case M32C_OPERAND_AN16_PUSH_S : | |
1719 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1); | |
1720 | break; | |
1721 | case M32C_OPERAND_BIT16AN : | |
1722 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); | |
1723 | break; | |
1724 | case M32C_OPERAND_BIT16RN : | |
1725 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); | |
1726 | break; | |
1727 | case M32C_OPERAND_BIT32ANPREFIXED : | |
1728 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); | |
1729 | break; | |
1730 | case M32C_OPERAND_BIT32ANUNPREFIXED : | |
1731 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); | |
1732 | break; | |
1733 | case M32C_OPERAND_BIT32RNPREFIXED : | |
1734 | { | |
1735 | long value; | |
1736 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); | |
1737 | value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); | |
1738 | fields->f_dst32_rn_prefixed_QI = value; | |
1739 | } | |
1740 | break; | |
1741 | case M32C_OPERAND_BIT32RNUNPREFIXED : | |
1742 | { | |
1743 | long value; | |
1744 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); | |
1745 | value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); | |
1746 | fields->f_dst32_rn_unprefixed_QI = value; | |
1747 | } | |
1748 | break; | |
1749 | case M32C_OPERAND_BITBASE16_16_S8 : | |
1750 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); | |
1751 | break; | |
1752 | case M32C_OPERAND_BITBASE16_16_U16 : | |
1753 | { | |
1754 | long value; | |
1755 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); | |
1756 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
1757 | fields->f_dsp_16_u16 = value; | |
1758 | } | |
1759 | break; | |
1760 | case M32C_OPERAND_BITBASE16_16_U8 : | |
1761 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); | |
1762 | break; | |
1763 | case M32C_OPERAND_BITBASE16_8_U11_S : | |
1764 | { | |
1765 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S); | |
1766 | if (length <= 0) break; | |
1767 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8); | |
1768 | if (length <= 0) break; | |
1769 | { | |
1770 | FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S))); | |
1771 | } | |
1772 | } | |
1773 | break; | |
1774 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : | |
1775 | { | |
1776 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); | |
1777 | if (length <= 0) break; | |
1778 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); | |
1779 | if (length <= 0) break; | |
1780 | { | |
1781 | FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed))); | |
1782 | } | |
1783 | } | |
1784 | break; | |
1785 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : | |
1786 | { | |
1787 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); | |
1788 | if (length <= 0) break; | |
1789 | { | |
1790 | long value; | |
1791 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); | |
1792 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
1793 | fields->f_dsp_16_s16 = value; | |
1794 | } | |
1795 | if (length <= 0) break; | |
1796 | { | |
1797 | FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed))); | |
1798 | } | |
1799 | } | |
1800 | break; | |
1801 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : | |
1802 | { | |
1803 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); | |
1804 | if (length <= 0) break; | |
1805 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); | |
1806 | if (length <= 0) break; | |
1807 | { | |
1808 | FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed))); | |
1809 | } | |
1810 | } | |
1811 | break; | |
1812 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : | |
1813 | { | |
1814 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); | |
1815 | if (length <= 0) break; | |
1816 | { | |
1817 | long value; | |
1818 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); | |
1819 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
1820 | fields->f_dsp_16_u16 = value; | |
1821 | } | |
1822 | if (length <= 0) break; | |
1823 | { | |
1824 | FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed))); | |
1825 | } | |
1826 | } | |
1827 | break; | |
1828 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : | |
1829 | { | |
1830 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); | |
1831 | if (length <= 0) break; | |
1832 | { | |
1833 | long value; | |
1834 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); | |
1835 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
1836 | fields->f_dsp_16_u16 = value; | |
1837 | } | |
1838 | if (length <= 0) break; | |
1839 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
1840 | if (length <= 0) break; | |
1841 | { | |
1842 | FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed))))); | |
1843 | } | |
1844 | } | |
1845 | break; | |
1846 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : | |
1847 | { | |
1848 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); | |
1849 | if (length <= 0) break; | |
1850 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); | |
1851 | if (length <= 0) break; | |
1852 | { | |
1853 | FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed))); | |
1854 | } | |
1855 | } | |
1856 | break; | |
1857 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : | |
1858 | { | |
1859 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); | |
1860 | if (length <= 0) break; | |
1861 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
1862 | if (length <= 0) break; | |
1863 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); | |
1864 | if (length <= 0) break; | |
1865 | { | |
1866 | FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed))))); | |
1867 | } | |
1868 | } | |
1869 | break; | |
1870 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : | |
1871 | { | |
1872 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); | |
1873 | if (length <= 0) break; | |
1874 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
1875 | if (length <= 0) break; | |
1876 | { | |
1877 | FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed))); | |
1878 | } | |
1879 | } | |
1880 | break; | |
1881 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : | |
1882 | { | |
1883 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); | |
1884 | if (length <= 0) break; | |
1885 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
1886 | if (length <= 0) break; | |
1887 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
1888 | if (length <= 0) break; | |
1889 | { | |
1890 | FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed))))); | |
1891 | } | |
1892 | } | |
1893 | break; | |
1894 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : | |
1895 | { | |
1896 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); | |
1897 | if (length <= 0) break; | |
1898 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
1899 | if (length <= 0) break; | |
1900 | { | |
1901 | long value; | |
1902 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); | |
1903 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
1904 | fields->f_dsp_32_u16 = value; | |
1905 | } | |
1906 | if (length <= 0) break; | |
1907 | { | |
1908 | FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed))))); | |
1909 | } | |
1910 | } | |
1911 | break; | |
1912 | case M32C_OPERAND_BITNO16R : | |
1913 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); | |
1914 | break; | |
1915 | case M32C_OPERAND_BITNO32PREFIXED : | |
1916 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); | |
1917 | break; | |
1918 | case M32C_OPERAND_BITNO32UNPREFIXED : | |
1919 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); | |
1920 | break; | |
1921 | case M32C_OPERAND_DSP_10_U6 : | |
1922 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6); | |
1923 | break; | |
1924 | case M32C_OPERAND_DSP_16_S16 : | |
1925 | { | |
1926 | long value; | |
1927 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); | |
1928 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
1929 | fields->f_dsp_16_s16 = value; | |
1930 | } | |
1931 | break; | |
1932 | case M32C_OPERAND_DSP_16_S8 : | |
1933 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); | |
1934 | break; | |
1935 | case M32C_OPERAND_DSP_16_U16 : | |
1936 | { | |
1937 | long value; | |
1938 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); | |
1939 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
1940 | fields->f_dsp_16_u16 = value; | |
1941 | } | |
1942 | break; | |
1943 | case M32C_OPERAND_DSP_16_U20 : | |
1944 | { | |
1945 | { | |
1946 | long value; | |
1947 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); | |
1948 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
1949 | fields->f_dsp_16_u16 = value; | |
1950 | } | |
1951 | if (length <= 0) break; | |
1952 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
1953 | if (length <= 0) break; | |
1954 | { | |
1955 | FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16))); | |
1956 | } | |
1957 | } | |
1958 | break; | |
1959 | case M32C_OPERAND_DSP_16_U24 : | |
1960 | { | |
1961 | { | |
1962 | long value; | |
1963 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); | |
1964 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
1965 | fields->f_dsp_16_u16 = value; | |
1966 | } | |
1967 | if (length <= 0) break; | |
1968 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
1969 | if (length <= 0) break; | |
1970 | { | |
1971 | FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16))); | |
1972 | } | |
1973 | } | |
1974 | break; | |
1975 | case M32C_OPERAND_DSP_16_U8 : | |
1976 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); | |
1977 | break; | |
1978 | case M32C_OPERAND_DSP_24_S16 : | |
1979 | { | |
1980 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
1981 | if (length <= 0) break; | |
1982 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
1983 | if (length <= 0) break; | |
1984 | { | |
1985 | FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)))))); | |
1986 | } | |
1987 | } | |
1988 | break; | |
1989 | case M32C_OPERAND_DSP_24_S8 : | |
1990 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); | |
1991 | break; | |
1992 | case M32C_OPERAND_DSP_24_U16 : | |
1993 | { | |
1994 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
1995 | if (length <= 0) break; | |
1996 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
1997 | if (length <= 0) break; | |
1998 | { | |
1999 | FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))); | |
2000 | } | |
2001 | } | |
2002 | break; | |
2003 | case M32C_OPERAND_DSP_24_U20 : | |
2004 | { | |
2005 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
2006 | if (length <= 0) break; | |
2007 | { | |
2008 | long value; | |
2009 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); | |
2010 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
2011 | fields->f_dsp_32_u16 = value; | |
2012 | } | |
2013 | if (length <= 0) break; | |
2014 | { | |
2015 | FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8))); | |
2016 | } | |
2017 | } | |
2018 | break; | |
2019 | case M32C_OPERAND_DSP_24_U24 : | |
2020 | { | |
2021 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
2022 | if (length <= 0) break; | |
2023 | { | |
2024 | long value; | |
2025 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); | |
2026 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
2027 | fields->f_dsp_32_u16 = value; | |
2028 | } | |
2029 | if (length <= 0) break; | |
2030 | { | |
2031 | FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8))); | |
2032 | } | |
2033 | } | |
2034 | break; | |
2035 | case M32C_OPERAND_DSP_24_U8 : | |
2036 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
2037 | break; | |
2038 | case M32C_OPERAND_DSP_32_S16 : | |
2039 | { | |
2040 | long value; | |
2041 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value); | |
2042 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
2043 | fields->f_dsp_32_s16 = value; | |
2044 | } | |
2045 | break; | |
2046 | case M32C_OPERAND_DSP_32_S8 : | |
2047 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); | |
2048 | break; | |
2049 | case M32C_OPERAND_DSP_32_U16 : | |
2050 | { | |
2051 | long value; | |
2052 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); | |
2053 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
2054 | fields->f_dsp_32_u16 = value; | |
2055 | } | |
2056 | break; | |
2057 | case M32C_OPERAND_DSP_32_U20 : | |
2058 | { | |
2059 | long value; | |
2060 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); | |
2061 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); | |
2062 | fields->f_dsp_32_u24 = value; | |
2063 | } | |
2064 | break; | |
2065 | case M32C_OPERAND_DSP_32_U24 : | |
2066 | { | |
2067 | long value; | |
2068 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); | |
2069 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); | |
2070 | fields->f_dsp_32_u24 = value; | |
2071 | } | |
2072 | break; | |
2073 | case M32C_OPERAND_DSP_32_U8 : | |
2074 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
2075 | break; | |
2076 | case M32C_OPERAND_DSP_40_S16 : | |
2077 | { | |
2078 | long value; | |
2079 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value); | |
2080 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
2081 | fields->f_dsp_40_s16 = value; | |
2082 | } | |
2083 | break; | |
2084 | case M32C_OPERAND_DSP_40_S8 : | |
2085 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8); | |
2086 | break; | |
2087 | case M32C_OPERAND_DSP_40_U16 : | |
2088 | { | |
2089 | long value; | |
2090 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value); | |
2091 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
2092 | fields->f_dsp_40_u16 = value; | |
2093 | } | |
2094 | break; | |
2095 | case M32C_OPERAND_DSP_40_U24 : | |
2096 | { | |
2097 | long value; | |
2098 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value); | |
2099 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); | |
2100 | fields->f_dsp_40_u24 = value; | |
2101 | } | |
2102 | break; | |
2103 | case M32C_OPERAND_DSP_40_U8 : | |
2104 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8); | |
2105 | break; | |
2106 | case M32C_OPERAND_DSP_48_S16 : | |
2107 | { | |
2108 | long value; | |
2109 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value); | |
2110 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
2111 | fields->f_dsp_48_s16 = value; | |
2112 | } | |
2113 | break; | |
2114 | case M32C_OPERAND_DSP_48_S8 : | |
2115 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8); | |
2116 | break; | |
2117 | case M32C_OPERAND_DSP_48_U16 : | |
2118 | { | |
2119 | long value; | |
2120 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); | |
2121 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
2122 | fields->f_dsp_48_u16 = value; | |
2123 | } | |
2124 | break; | |
2125 | case M32C_OPERAND_DSP_48_U24 : | |
2126 | { | |
2127 | { | |
2128 | long value; | |
2129 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); | |
2130 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
2131 | fields->f_dsp_48_u16 = value; | |
2132 | } | |
2133 | if (length <= 0) break; | |
2134 | length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); | |
2135 | if (length <= 0) break; | |
2136 | { | |
2137 | FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680)))); | |
2138 | } | |
2139 | } | |
2140 | break; | |
2141 | case M32C_OPERAND_DSP_48_U8 : | |
2142 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8); | |
2143 | break; | |
2144 | case M32C_OPERAND_DSP_8_S8 : | |
2145 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8); | |
2146 | break; | |
2147 | case M32C_OPERAND_DSP_8_U16 : | |
2148 | { | |
2149 | long value; | |
2150 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value); | |
2151 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
2152 | fields->f_dsp_8_u16 = value; | |
2153 | } | |
2154 | break; | |
2155 | case M32C_OPERAND_DSP_8_U6 : | |
2156 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6); | |
2157 | break; | |
2158 | case M32C_OPERAND_DSP_8_U8 : | |
2159 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8); | |
2160 | break; | |
2161 | case M32C_OPERAND_DST16AN : | |
2162 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); | |
2163 | break; | |
2164 | case M32C_OPERAND_DST16AN_S : | |
2165 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s); | |
2166 | break; | |
2167 | case M32C_OPERAND_DST16ANHI : | |
2168 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); | |
2169 | break; | |
2170 | case M32C_OPERAND_DST16ANQI : | |
2171 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); | |
2172 | break; | |
2173 | case M32C_OPERAND_DST16ANQI_S : | |
2174 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s); | |
2175 | break; | |
2176 | case M32C_OPERAND_DST16ANSI : | |
2177 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); | |
2178 | break; | |
2179 | case M32C_OPERAND_DST16RNEXTQI : | |
2180 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext); | |
2181 | break; | |
2182 | case M32C_OPERAND_DST16RNHI : | |
2183 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); | |
2184 | break; | |
2185 | case M32C_OPERAND_DST16RNQI : | |
2186 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); | |
2187 | break; | |
2188 | case M32C_OPERAND_DST16RNQI_S : | |
2189 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s); | |
2190 | break; | |
2191 | case M32C_OPERAND_DST16RNSI : | |
2192 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); | |
2193 | break; | |
2194 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : | |
2195 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); | |
2196 | break; | |
2197 | case M32C_OPERAND_DST32ANPREFIXED : | |
2198 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); | |
2199 | break; | |
2200 | case M32C_OPERAND_DST32ANPREFIXEDHI : | |
2201 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); | |
2202 | break; | |
2203 | case M32C_OPERAND_DST32ANPREFIXEDQI : | |
2204 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); | |
2205 | break; | |
2206 | case M32C_OPERAND_DST32ANPREFIXEDSI : | |
2207 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); | |
2208 | break; | |
2209 | case M32C_OPERAND_DST32ANUNPREFIXED : | |
2210 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); | |
2211 | break; | |
2212 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : | |
2213 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); | |
2214 | break; | |
2215 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : | |
2216 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); | |
2217 | break; | |
2218 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : | |
2219 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); | |
2220 | break; | |
2221 | case M32C_OPERAND_DST32R0HI_S : | |
2222 | break; | |
2223 | case M32C_OPERAND_DST32R0QI_S : | |
2224 | break; | |
2225 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : | |
2226 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed); | |
2227 | break; | |
2228 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : | |
2229 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed); | |
2230 | break; | |
2231 | case M32C_OPERAND_DST32RNPREFIXEDHI : | |
2232 | { | |
2233 | long value; | |
2234 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); | |
2235 | value = ((((value) + (2))) % (4)); | |
2236 | fields->f_dst32_rn_prefixed_HI = value; | |
2237 | } | |
2238 | break; | |
2239 | case M32C_OPERAND_DST32RNPREFIXEDQI : | |
2240 | { | |
2241 | long value; | |
2242 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); | |
2243 | value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); | |
2244 | fields->f_dst32_rn_prefixed_QI = value; | |
2245 | } | |
2246 | break; | |
2247 | case M32C_OPERAND_DST32RNPREFIXEDSI : | |
2248 | { | |
2249 | long value; | |
2250 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); | |
2251 | value = ((value) - (2)); | |
2252 | fields->f_dst32_rn_prefixed_SI = value; | |
2253 | } | |
2254 | break; | |
2255 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : | |
2256 | { | |
2257 | long value; | |
2258 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); | |
2259 | value = ((((value) + (2))) % (4)); | |
2260 | fields->f_dst32_rn_unprefixed_HI = value; | |
2261 | } | |
2262 | break; | |
2263 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : | |
2264 | { | |
2265 | long value; | |
2266 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); | |
2267 | value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); | |
2268 | fields->f_dst32_rn_unprefixed_QI = value; | |
2269 | } | |
2270 | break; | |
2271 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : | |
2272 | { | |
2273 | long value; | |
2274 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); | |
2275 | value = ((value) - (2)); | |
2276 | fields->f_dst32_rn_unprefixed_SI = value; | |
2277 | } | |
2278 | break; | |
2279 | case M32C_OPERAND_G : | |
2280 | break; | |
2281 | case M32C_OPERAND_IMM_12_S4 : | |
2282 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4); | |
2283 | break; | |
2284 | case M32C_OPERAND_IMM_13_U3 : | |
2285 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3); | |
2286 | break; | |
2287 | case M32C_OPERAND_IMM_16_HI : | |
2288 | { | |
2289 | long value; | |
2290 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); | |
2291 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
2292 | fields->f_dsp_16_s16 = value; | |
2293 | } | |
2294 | break; | |
2295 | case M32C_OPERAND_IMM_16_QI : | |
2296 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); | |
2297 | break; | |
2298 | case M32C_OPERAND_IMM_16_SI : | |
2299 | { | |
2300 | { | |
2301 | long value; | |
2302 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); | |
2303 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
2304 | fields->f_dsp_16_u16 = value; | |
2305 | } | |
2306 | if (length <= 0) break; | |
2307 | { | |
2308 | long value; | |
2309 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); | |
2310 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
2311 | fields->f_dsp_32_u16 = value; | |
2312 | } | |
2313 | if (length <= 0) break; | |
2314 | { | |
2315 | FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000)))); | |
2316 | } | |
2317 | } | |
2318 | break; | |
2319 | case M32C_OPERAND_IMM_20_S4 : | |
2320 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4); | |
2321 | break; | |
2322 | case M32C_OPERAND_IMM_24_HI : | |
2323 | { | |
2324 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
2325 | if (length <= 0) break; | |
2326 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
2327 | if (length <= 0) break; | |
2328 | { | |
2329 | FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)))))); | |
2330 | } | |
2331 | } | |
2332 | break; | |
2333 | case M32C_OPERAND_IMM_24_QI : | |
2334 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); | |
2335 | break; | |
2336 | case M32C_OPERAND_IMM_24_SI : | |
2337 | { | |
2338 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
2339 | if (length <= 0) break; | |
2340 | { | |
2341 | long value; | |
2342 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); | |
2343 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); | |
2344 | fields->f_dsp_32_u24 = value; | |
2345 | } | |
2346 | if (length <= 0) break; | |
2347 | { | |
2348 | FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00)))); | |
2349 | } | |
2350 | } | |
2351 | break; | |
2352 | case M32C_OPERAND_IMM_32_HI : | |
2353 | { | |
2354 | long value; | |
2355 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value); | |
2356 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
2357 | fields->f_dsp_32_s16 = value; | |
2358 | } | |
2359 | break; | |
2360 | case M32C_OPERAND_IMM_32_QI : | |
2361 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); | |
2362 | break; | |
2363 | case M32C_OPERAND_IMM_32_SI : | |
2364 | { | |
2365 | long value; | |
2366 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value); | |
2367 | value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000))))))); | |
2368 | fields->f_dsp_32_s32 = value; | |
2369 | } | |
2370 | break; | |
2371 | case M32C_OPERAND_IMM_40_HI : | |
2372 | { | |
2373 | long value; | |
2374 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value); | |
2375 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
2376 | fields->f_dsp_40_s16 = value; | |
2377 | } | |
2378 | break; | |
2379 | case M32C_OPERAND_IMM_40_QI : | |
2380 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8); | |
2381 | break; | |
2382 | case M32C_OPERAND_IMM_40_SI : | |
2383 | { | |
2384 | { | |
2385 | long value; | |
2386 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value); | |
2387 | value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); | |
2388 | fields->f_dsp_40_u24 = value; | |
2389 | } | |
2390 | if (length <= 0) break; | |
2391 | length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); | |
2392 | if (length <= 0) break; | |
2393 | { | |
2394 | FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000)))); | |
2395 | } | |
2396 | } | |
2397 | break; | |
2398 | case M32C_OPERAND_IMM_48_HI : | |
2399 | { | |
2400 | long value; | |
2401 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value); | |
2402 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
2403 | fields->f_dsp_48_s16 = value; | |
2404 | } | |
2405 | break; | |
2406 | case M32C_OPERAND_IMM_48_QI : | |
2407 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8); | |
2408 | break; | |
2409 | case M32C_OPERAND_IMM_48_SI : | |
2410 | { | |
2411 | { | |
2412 | long value; | |
2413 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); | |
2414 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
2415 | fields->f_dsp_48_u16 = value; | |
2416 | } | |
2417 | if (length <= 0) break; | |
2418 | { | |
2419 | long value; | |
2420 | length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value); | |
2421 | value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); | |
2422 | fields->f_dsp_64_u16 = value; | |
2423 | } | |
2424 | if (length <= 0) break; | |
2425 | { | |
2426 | FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000)))); | |
2427 | } | |
2428 | } | |
2429 | break; | |
2430 | case M32C_OPERAND_IMM_56_HI : | |
2431 | { | |
2432 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8); | |
2433 | if (length <= 0) break; | |
2434 | length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); | |
2435 | if (length <= 0) break; | |
2436 | { | |
2437 | FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8)))))); | |
2438 | } | |
2439 | } | |
2440 | break; | |
2441 | case M32C_OPERAND_IMM_56_QI : | |
2442 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8); | |
2443 | break; | |
2444 | case M32C_OPERAND_IMM_64_HI : | |
2445 | { | |
2446 | long value; | |
2447 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value); | |
2448 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
2449 | fields->f_dsp_64_s16 = value; | |
2450 | } | |
2451 | break; | |
2452 | case M32C_OPERAND_IMM_8_HI : | |
2453 | { | |
2454 | long value; | |
2455 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value); | |
2456 | value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); | |
2457 | fields->f_dsp_8_s16 = value; | |
2458 | } | |
2459 | break; | |
2460 | case M32C_OPERAND_IMM_8_QI : | |
2461 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8); | |
2462 | break; | |
2463 | case M32C_OPERAND_IMM_8_S4 : | |
2464 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4); | |
2465 | break; | |
2466 | case M32C_OPERAND_IMM_SH_12_S4 : | |
2467 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4); | |
2468 | break; | |
2469 | case M32C_OPERAND_IMM_SH_20_S4 : | |
2470 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4); | |
2471 | break; | |
2472 | case M32C_OPERAND_IMM_SH_8_S4 : | |
2473 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4); | |
2474 | break; | |
2475 | case M32C_OPERAND_IMM1_S : | |
2476 | { | |
2477 | long value; | |
2478 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value); | |
2479 | value = ((value) + (1)); | |
2480 | fields->f_imm1_S = value; | |
2481 | } | |
2482 | break; | |
2483 | case M32C_OPERAND_IMM3_S : | |
2484 | { | |
2485 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2); | |
2486 | if (length <= 0) break; | |
2487 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); | |
2488 | if (length <= 0) break; | |
2489 | { | |
2490 | FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1)); | |
2491 | } | |
2492 | } | |
2493 | break; | |
2494 | case M32C_OPERAND_LAB_16_8 : | |
2495 | { | |
2496 | long value; | |
2497 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value); | |
2498 | value = ((value) + (((pc) + (2)))); | |
2499 | fields->f_lab_16_8 = value; | |
2500 | } | |
2501 | break; | |
2502 | case M32C_OPERAND_LAB_24_8 : | |
2503 | { | |
2504 | long value; | |
2505 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value); | |
2506 | value = ((value) + (((pc) + (2)))); | |
2507 | fields->f_lab_24_8 = value; | |
2508 | } | |
2509 | break; | |
2510 | case M32C_OPERAND_LAB_32_8 : | |
2511 | { | |
2512 | long value; | |
2513 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value); | |
2514 | value = ((value) + (((pc) + (2)))); | |
2515 | fields->f_lab_32_8 = value; | |
2516 | } | |
2517 | break; | |
2518 | case M32C_OPERAND_LAB_40_8 : | |
2519 | { | |
2520 | long value; | |
2521 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value); | |
2522 | value = ((value) + (((pc) + (2)))); | |
2523 | fields->f_lab_40_8 = value; | |
2524 | } | |
2525 | break; | |
2526 | case M32C_OPERAND_LAB_5_3 : | |
2527 | { | |
2528 | long value; | |
2529 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value); | |
2530 | value = ((value) + (((pc) + (2)))); | |
2531 | fields->f_lab_5_3 = value; | |
2532 | } | |
2533 | break; | |
2534 | case M32C_OPERAND_LAB_8_16 : | |
2535 | { | |
2536 | long value; | |
2537 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value); | |
2538 | value = ((((((unsigned int) (((value) & (65535))) >> (8))) | (((int) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1)))); | |
2539 | fields->f_lab_8_16 = value; | |
2540 | } | |
2541 | break; | |
2542 | case M32C_OPERAND_LAB_8_24 : | |
2543 | { | |
2544 | long value; | |
2545 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value); | |
2546 | value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); | |
2547 | fields->f_lab_8_24 = value; | |
2548 | } | |
2549 | break; | |
2550 | case M32C_OPERAND_LAB_8_8 : | |
2551 | { | |
2552 | long value; | |
2553 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value); | |
2554 | value = ((value) + (((pc) + (1)))); | |
2555 | fields->f_lab_8_8 = value; | |
2556 | } | |
2557 | break; | |
2558 | case M32C_OPERAND_LAB32_JMP_S : | |
2559 | { | |
2560 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2); | |
2561 | if (length <= 0) break; | |
2562 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); | |
2563 | if (length <= 0) break; | |
2564 | { | |
2565 | FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2)))); | |
2566 | } | |
2567 | } | |
2568 | break; | |
2569 | case M32C_OPERAND_Q : | |
2570 | break; | |
2571 | case M32C_OPERAND_R0 : | |
2572 | break; | |
2573 | case M32C_OPERAND_R0H : | |
2574 | break; | |
2575 | case M32C_OPERAND_R0L : | |
2576 | break; | |
2577 | case M32C_OPERAND_R1 : | |
2578 | break; | |
2579 | case M32C_OPERAND_R1R2R0 : | |
2580 | break; | |
2581 | case M32C_OPERAND_R2 : | |
2582 | break; | |
2583 | case M32C_OPERAND_R2R0 : | |
2584 | break; | |
2585 | case M32C_OPERAND_R3 : | |
2586 | break; | |
2587 | case M32C_OPERAND_R3R1 : | |
2588 | break; | |
2589 | case M32C_OPERAND_REGSETPOP : | |
2590 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8); | |
2591 | break; | |
2592 | case M32C_OPERAND_REGSETPUSH : | |
2593 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8); | |
2594 | break; | |
2595 | case M32C_OPERAND_RN16_PUSH_S : | |
2596 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1); | |
2597 | break; | |
2598 | case M32C_OPERAND_S : | |
2599 | break; | |
2600 | case M32C_OPERAND_SRC16AN : | |
2601 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); | |
2602 | break; | |
2603 | case M32C_OPERAND_SRC16ANHI : | |
2604 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); | |
2605 | break; | |
2606 | case M32C_OPERAND_SRC16ANQI : | |
2607 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); | |
2608 | break; | |
2609 | case M32C_OPERAND_SRC16RNHI : | |
2610 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn); | |
2611 | break; | |
2612 | case M32C_OPERAND_SRC16RNQI : | |
2613 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn); | |
2614 | break; | |
2615 | case M32C_OPERAND_SRC32ANPREFIXED : | |
2616 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); | |
2617 | break; | |
2618 | case M32C_OPERAND_SRC32ANPREFIXEDHI : | |
2619 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); | |
2620 | break; | |
2621 | case M32C_OPERAND_SRC32ANPREFIXEDQI : | |
2622 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); | |
2623 | break; | |
2624 | case M32C_OPERAND_SRC32ANPREFIXEDSI : | |
2625 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); | |
2626 | break; | |
2627 | case M32C_OPERAND_SRC32ANUNPREFIXED : | |
2628 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); | |
2629 | break; | |
2630 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : | |
2631 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); | |
2632 | break; | |
2633 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : | |
2634 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); | |
2635 | break; | |
2636 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : | |
2637 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); | |
2638 | break; | |
2639 | case M32C_OPERAND_SRC32RNPREFIXEDHI : | |
2640 | { | |
2641 | long value; | |
2642 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); | |
2643 | value = ((((value) + (2))) % (4)); | |
2644 | fields->f_src32_rn_prefixed_HI = value; | |
2645 | } | |
2646 | break; | |
2647 | case M32C_OPERAND_SRC32RNPREFIXEDQI : | |
2648 | { | |
2649 | long value; | |
2650 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); | |
2651 | value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); | |
2652 | fields->f_src32_rn_prefixed_QI = value; | |
2653 | } | |
2654 | break; | |
2655 | case M32C_OPERAND_SRC32RNPREFIXEDSI : | |
2656 | { | |
2657 | long value; | |
2658 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); | |
2659 | value = ((value) - (2)); | |
2660 | fields->f_src32_rn_prefixed_SI = value; | |
2661 | } | |
2662 | break; | |
2663 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : | |
2664 | { | |
2665 | long value; | |
2666 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); | |
2667 | value = ((((value) + (2))) % (4)); | |
2668 | fields->f_src32_rn_unprefixed_HI = value; | |
2669 | } | |
2670 | break; | |
2671 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : | |
2672 | { | |
2673 | long value; | |
2674 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); | |
2675 | value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); | |
2676 | fields->f_src32_rn_unprefixed_QI = value; | |
2677 | } | |
2678 | break; | |
2679 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : | |
2680 | { | |
2681 | long value; | |
2682 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); | |
2683 | value = ((value) - (2)); | |
2684 | fields->f_src32_rn_unprefixed_SI = value; | |
2685 | } | |
2686 | break; | |
2687 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : | |
2688 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1); | |
2689 | break; | |
2690 | case M32C_OPERAND_X : | |
2691 | break; | |
2692 | case M32C_OPERAND_Z : | |
2693 | break; | |
2694 | case M32C_OPERAND_COND16_16 : | |
2695 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); | |
2696 | break; | |
2697 | case M32C_OPERAND_COND16_24 : | |
2698 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
2699 | break; | |
2700 | case M32C_OPERAND_COND16_32 : | |
2701 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
2702 | break; | |
2703 | case M32C_OPERAND_COND16C : | |
2704 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); | |
2705 | break; | |
2706 | case M32C_OPERAND_COND16J : | |
2707 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); | |
2708 | break; | |
2709 | case M32C_OPERAND_COND16J5 : | |
2710 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5); | |
2711 | break; | |
2712 | case M32C_OPERAND_COND32 : | |
2713 | { | |
2714 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1); | |
2715 | if (length <= 0) break; | |
2716 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); | |
2717 | if (length <= 0) break; | |
2718 | { | |
2719 | FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3))); | |
2720 | } | |
2721 | } | |
2722 | break; | |
2723 | case M32C_OPERAND_COND32_16 : | |
2724 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); | |
2725 | break; | |
2726 | case M32C_OPERAND_COND32_24 : | |
2727 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); | |
2728 | break; | |
2729 | case M32C_OPERAND_COND32_32 : | |
2730 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); | |
2731 | break; | |
2732 | case M32C_OPERAND_COND32_40 : | |
2733 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8); | |
2734 | break; | |
2735 | case M32C_OPERAND_COND32J : | |
2736 | { | |
2737 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3); | |
2738 | if (length <= 0) break; | |
2739 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); | |
2740 | if (length <= 0) break; | |
2741 | { | |
2742 | FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1))); | |
2743 | } | |
2744 | } | |
2745 | break; | |
2746 | case M32C_OPERAND_CR1_PREFIXED_32 : | |
2747 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3); | |
2748 | break; | |
2749 | case M32C_OPERAND_CR1_UNPREFIXED_32 : | |
2750 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); | |
2751 | break; | |
2752 | case M32C_OPERAND_CR16 : | |
2753 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3); | |
2754 | break; | |
2755 | case M32C_OPERAND_CR2_32 : | |
2756 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); | |
2757 | break; | |
2758 | case M32C_OPERAND_CR3_PREFIXED_32 : | |
2759 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3); | |
2760 | break; | |
2761 | case M32C_OPERAND_CR3_UNPREFIXED_32 : | |
2762 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); | |
2763 | break; | |
2764 | case M32C_OPERAND_FLAGS16 : | |
2765 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3); | |
2766 | break; | |
2767 | case M32C_OPERAND_FLAGS32 : | |
2768 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); | |
2769 | break; | |
2770 | case M32C_OPERAND_SCCOND32 : | |
2771 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); | |
2772 | break; | |
2773 | case M32C_OPERAND_SIZE : | |
2774 | break; | |
2775 | ||
2776 | default : | |
2777 | /* xgettext:c-format */ | |
2778 | fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), | |
2779 | opindex); | |
2780 | abort (); | |
2781 | } | |
2782 | ||
2783 | return length; | |
2784 | } | |
2785 | ||
2786 | cgen_insert_fn * const m32c_cgen_insert_handlers[] = | |
2787 | { | |
2788 | insert_insn_normal, | |
2789 | }; | |
2790 | ||
2791 | cgen_extract_fn * const m32c_cgen_extract_handlers[] = | |
2792 | { | |
2793 | extract_insn_normal, | |
2794 | }; | |
2795 | ||
2796 | int m32c_cgen_get_int_operand | |
2797 | PARAMS ((CGEN_CPU_DESC, int, const CGEN_FIELDS *)); | |
2798 | bfd_vma m32c_cgen_get_vma_operand | |
2799 | PARAMS ((CGEN_CPU_DESC, int, const CGEN_FIELDS *)); | |
2800 | ||
2801 | /* Getting values from cgen_fields is handled by a collection of functions. | |
2802 | They are distinguished by the type of the VALUE argument they return. | |
2803 | TODO: floating point, inlining support, remove cases where result type | |
2804 | not appropriate. */ | |
2805 | ||
2806 | int | |
2807 | m32c_cgen_get_int_operand (cd, opindex, fields) | |
2808 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; | |
2809 | int opindex; | |
2810 | const CGEN_FIELDS * fields; | |
2811 | { | |
2812 | int value; | |
2813 | ||
2814 | switch (opindex) | |
2815 | { | |
2816 | case M32C_OPERAND_A0 : | |
2817 | value = 0; | |
2818 | break; | |
2819 | case M32C_OPERAND_A1 : | |
2820 | value = 0; | |
2821 | break; | |
2822 | case M32C_OPERAND_AN16_PUSH_S : | |
2823 | value = fields->f_4_1; | |
2824 | break; | |
2825 | case M32C_OPERAND_BIT16AN : | |
2826 | value = fields->f_dst16_an; | |
2827 | break; | |
2828 | case M32C_OPERAND_BIT16RN : | |
2829 | value = fields->f_dst16_rn; | |
2830 | break; | |
2831 | case M32C_OPERAND_BIT32ANPREFIXED : | |
2832 | value = fields->f_dst32_an_prefixed; | |
2833 | break; | |
2834 | case M32C_OPERAND_BIT32ANUNPREFIXED : | |
2835 | value = fields->f_dst32_an_unprefixed; | |
2836 | break; | |
2837 | case M32C_OPERAND_BIT32RNPREFIXED : | |
2838 | value = fields->f_dst32_rn_prefixed_QI; | |
2839 | break; | |
2840 | case M32C_OPERAND_BIT32RNUNPREFIXED : | |
2841 | value = fields->f_dst32_rn_unprefixed_QI; | |
2842 | break; | |
2843 | case M32C_OPERAND_BITBASE16_16_S8 : | |
2844 | value = fields->f_dsp_16_s8; | |
2845 | break; | |
2846 | case M32C_OPERAND_BITBASE16_16_U16 : | |
2847 | value = fields->f_dsp_16_u16; | |
2848 | break; | |
2849 | case M32C_OPERAND_BITBASE16_16_U8 : | |
2850 | value = fields->f_dsp_16_u8; | |
2851 | break; | |
2852 | case M32C_OPERAND_BITBASE16_8_U11_S : | |
2853 | value = fields->f_bitbase16_u11_S; | |
2854 | break; | |
2855 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : | |
2856 | value = fields->f_bitbase32_16_s11_unprefixed; | |
2857 | break; | |
2858 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : | |
2859 | value = fields->f_bitbase32_16_s19_unprefixed; | |
2860 | break; | |
2861 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : | |
2862 | value = fields->f_bitbase32_16_u11_unprefixed; | |
2863 | break; | |
2864 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : | |
2865 | value = fields->f_bitbase32_16_u19_unprefixed; | |
2866 | break; | |
2867 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : | |
2868 | value = fields->f_bitbase32_16_u27_unprefixed; | |
2869 | break; | |
2870 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : | |
2871 | value = fields->f_bitbase32_24_s11_prefixed; | |
2872 | break; | |
2873 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : | |
2874 | value = fields->f_bitbase32_24_s19_prefixed; | |
2875 | break; | |
2876 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : | |
2877 | value = fields->f_bitbase32_24_u11_prefixed; | |
2878 | break; | |
2879 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : | |
2880 | value = fields->f_bitbase32_24_u19_prefixed; | |
2881 | break; | |
2882 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : | |
2883 | value = fields->f_bitbase32_24_u27_prefixed; | |
2884 | break; | |
2885 | case M32C_OPERAND_BITNO16R : | |
2886 | value = fields->f_dsp_16_u8; | |
2887 | break; | |
2888 | case M32C_OPERAND_BITNO32PREFIXED : | |
2889 | value = fields->f_bitno32_prefixed; | |
2890 | break; | |
2891 | case M32C_OPERAND_BITNO32UNPREFIXED : | |
2892 | value = fields->f_bitno32_unprefixed; | |
2893 | break; | |
2894 | case M32C_OPERAND_DSP_10_U6 : | |
2895 | value = fields->f_dsp_10_u6; | |
2896 | break; | |
2897 | case M32C_OPERAND_DSP_16_S16 : | |
2898 | value = fields->f_dsp_16_s16; | |
2899 | break; | |
2900 | case M32C_OPERAND_DSP_16_S8 : | |
2901 | value = fields->f_dsp_16_s8; | |
2902 | break; | |
2903 | case M32C_OPERAND_DSP_16_U16 : | |
2904 | value = fields->f_dsp_16_u16; | |
2905 | break; | |
2906 | case M32C_OPERAND_DSP_16_U20 : | |
2907 | value = fields->f_dsp_16_u24; | |
2908 | break; | |
2909 | case M32C_OPERAND_DSP_16_U24 : | |
2910 | value = fields->f_dsp_16_u24; | |
2911 | break; | |
2912 | case M32C_OPERAND_DSP_16_U8 : | |
2913 | value = fields->f_dsp_16_u8; | |
2914 | break; | |
2915 | case M32C_OPERAND_DSP_24_S16 : | |
2916 | value = fields->f_dsp_24_s16; | |
2917 | break; | |
2918 | case M32C_OPERAND_DSP_24_S8 : | |
2919 | value = fields->f_dsp_24_s8; | |
2920 | break; | |
2921 | case M32C_OPERAND_DSP_24_U16 : | |
2922 | value = fields->f_dsp_24_u16; | |
2923 | break; | |
2924 | case M32C_OPERAND_DSP_24_U20 : | |
2925 | value = fields->f_dsp_24_u24; | |
2926 | break; | |
2927 | case M32C_OPERAND_DSP_24_U24 : | |
2928 | value = fields->f_dsp_24_u24; | |
2929 | break; | |
2930 | case M32C_OPERAND_DSP_24_U8 : | |
2931 | value = fields->f_dsp_24_u8; | |
2932 | break; | |
2933 | case M32C_OPERAND_DSP_32_S16 : | |
2934 | value = fields->f_dsp_32_s16; | |
2935 | break; | |
2936 | case M32C_OPERAND_DSP_32_S8 : | |
2937 | value = fields->f_dsp_32_s8; | |
2938 | break; | |
2939 | case M32C_OPERAND_DSP_32_U16 : | |
2940 | value = fields->f_dsp_32_u16; | |
2941 | break; | |
2942 | case M32C_OPERAND_DSP_32_U20 : | |
2943 | value = fields->f_dsp_32_u24; | |
2944 | break; | |
2945 | case M32C_OPERAND_DSP_32_U24 : | |
2946 | value = fields->f_dsp_32_u24; | |
2947 | break; | |
2948 | case M32C_OPERAND_DSP_32_U8 : | |
2949 | value = fields->f_dsp_32_u8; | |
2950 | break; | |
2951 | case M32C_OPERAND_DSP_40_S16 : | |
2952 | value = fields->f_dsp_40_s16; | |
2953 | break; | |
2954 | case M32C_OPERAND_DSP_40_S8 : | |
2955 | value = fields->f_dsp_40_s8; | |
2956 | break; | |
2957 | case M32C_OPERAND_DSP_40_U16 : | |
2958 | value = fields->f_dsp_40_u16; | |
2959 | break; | |
2960 | case M32C_OPERAND_DSP_40_U24 : | |
2961 | value = fields->f_dsp_40_u24; | |
2962 | break; | |
2963 | case M32C_OPERAND_DSP_40_U8 : | |
2964 | value = fields->f_dsp_40_u8; | |
2965 | break; | |
2966 | case M32C_OPERAND_DSP_48_S16 : | |
2967 | value = fields->f_dsp_48_s16; | |
2968 | break; | |
2969 | case M32C_OPERAND_DSP_48_S8 : | |
2970 | value = fields->f_dsp_48_s8; | |
2971 | break; | |
2972 | case M32C_OPERAND_DSP_48_U16 : | |
2973 | value = fields->f_dsp_48_u16; | |
2974 | break; | |
2975 | case M32C_OPERAND_DSP_48_U24 : | |
2976 | value = fields->f_dsp_48_u24; | |
2977 | break; | |
2978 | case M32C_OPERAND_DSP_48_U8 : | |
2979 | value = fields->f_dsp_48_u8; | |
2980 | break; | |
2981 | case M32C_OPERAND_DSP_8_S8 : | |
2982 | value = fields->f_dsp_8_s8; | |
2983 | break; | |
2984 | case M32C_OPERAND_DSP_8_U16 : | |
2985 | value = fields->f_dsp_8_u16; | |
2986 | break; | |
2987 | case M32C_OPERAND_DSP_8_U6 : | |
2988 | value = fields->f_dsp_8_u6; | |
2989 | break; | |
2990 | case M32C_OPERAND_DSP_8_U8 : | |
2991 | value = fields->f_dsp_8_u8; | |
2992 | break; | |
2993 | case M32C_OPERAND_DST16AN : | |
2994 | value = fields->f_dst16_an; | |
2995 | break; | |
2996 | case M32C_OPERAND_DST16AN_S : | |
2997 | value = fields->f_dst16_an_s; | |
2998 | break; | |
2999 | case M32C_OPERAND_DST16ANHI : | |
3000 | value = fields->f_dst16_an; | |
3001 | break; | |
3002 | case M32C_OPERAND_DST16ANQI : | |
3003 | value = fields->f_dst16_an; | |
3004 | break; | |
3005 | case M32C_OPERAND_DST16ANQI_S : | |
3006 | value = fields->f_dst16_rn_QI_s; | |
3007 | break; | |
3008 | case M32C_OPERAND_DST16ANSI : | |
3009 | value = fields->f_dst16_an; | |
3010 | break; | |
3011 | case M32C_OPERAND_DST16RNEXTQI : | |
3012 | value = fields->f_dst16_rn_ext; | |
3013 | break; | |
3014 | case M32C_OPERAND_DST16RNHI : | |
3015 | value = fields->f_dst16_rn; | |
3016 | break; | |
3017 | case M32C_OPERAND_DST16RNQI : | |
3018 | value = fields->f_dst16_rn; | |
3019 | break; | |
3020 | case M32C_OPERAND_DST16RNQI_S : | |
3021 | value = fields->f_dst16_rn_QI_s; | |
3022 | break; | |
3023 | case M32C_OPERAND_DST16RNSI : | |
3024 | value = fields->f_dst16_rn; | |
3025 | break; | |
3026 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : | |
3027 | value = fields->f_dst32_an_unprefixed; | |
3028 | break; | |
3029 | case M32C_OPERAND_DST32ANPREFIXED : | |
3030 | value = fields->f_dst32_an_prefixed; | |
3031 | break; | |
3032 | case M32C_OPERAND_DST32ANPREFIXEDHI : | |
3033 | value = fields->f_dst32_an_prefixed; | |
3034 | break; | |
3035 | case M32C_OPERAND_DST32ANPREFIXEDQI : | |
3036 | value = fields->f_dst32_an_prefixed; | |
3037 | break; | |
3038 | case M32C_OPERAND_DST32ANPREFIXEDSI : | |
3039 | value = fields->f_dst32_an_prefixed; | |
3040 | break; | |
3041 | case M32C_OPERAND_DST32ANUNPREFIXED : | |
3042 | value = fields->f_dst32_an_unprefixed; | |
3043 | break; | |
3044 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : | |
3045 | value = fields->f_dst32_an_unprefixed; | |
3046 | break; | |
3047 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : | |
3048 | value = fields->f_dst32_an_unprefixed; | |
3049 | break; | |
3050 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : | |
3051 | value = fields->f_dst32_an_unprefixed; | |
3052 | break; | |
3053 | case M32C_OPERAND_DST32R0HI_S : | |
3054 | value = 0; | |
3055 | break; | |
3056 | case M32C_OPERAND_DST32R0QI_S : | |
3057 | value = 0; | |
3058 | break; | |
3059 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : | |
3060 | value = fields->f_dst32_rn_ext_unprefixed; | |
3061 | break; | |
3062 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : | |
3063 | value = fields->f_dst32_rn_ext_unprefixed; | |
3064 | break; | |
3065 | case M32C_OPERAND_DST32RNPREFIXEDHI : | |
3066 | value = fields->f_dst32_rn_prefixed_HI; | |
3067 | break; | |
3068 | case M32C_OPERAND_DST32RNPREFIXEDQI : | |
3069 | value = fields->f_dst32_rn_prefixed_QI; | |
3070 | break; | |
3071 | case M32C_OPERAND_DST32RNPREFIXEDSI : | |
3072 | value = fields->f_dst32_rn_prefixed_SI; | |
3073 | break; | |
3074 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : | |
3075 | value = fields->f_dst32_rn_unprefixed_HI; | |
3076 | break; | |
3077 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : | |
3078 | value = fields->f_dst32_rn_unprefixed_QI; | |
3079 | break; | |
3080 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : | |
3081 | value = fields->f_dst32_rn_unprefixed_SI; | |
3082 | break; | |
3083 | case M32C_OPERAND_G : | |
3084 | value = 0; | |
3085 | break; | |
3086 | case M32C_OPERAND_IMM_12_S4 : | |
3087 | value = fields->f_imm_12_s4; | |
3088 | break; | |
3089 | case M32C_OPERAND_IMM_13_U3 : | |
3090 | value = fields->f_imm_13_u3; | |
3091 | break; | |
3092 | case M32C_OPERAND_IMM_16_HI : | |
3093 | value = fields->f_dsp_16_s16; | |
3094 | break; | |
3095 | case M32C_OPERAND_IMM_16_QI : | |
3096 | value = fields->f_dsp_16_s8; | |
3097 | break; | |
3098 | case M32C_OPERAND_IMM_16_SI : | |
3099 | value = fields->f_dsp_16_s32; | |
3100 | break; | |
3101 | case M32C_OPERAND_IMM_20_S4 : | |
3102 | value = fields->f_imm_20_s4; | |
3103 | break; | |
3104 | case M32C_OPERAND_IMM_24_HI : | |
3105 | value = fields->f_dsp_24_s16; | |
3106 | break; | |
3107 | case M32C_OPERAND_IMM_24_QI : | |
3108 | value = fields->f_dsp_24_s8; | |
3109 | break; | |
3110 | case M32C_OPERAND_IMM_24_SI : | |
3111 | value = fields->f_dsp_24_s32; | |
3112 | break; | |
3113 | case M32C_OPERAND_IMM_32_HI : | |
3114 | value = fields->f_dsp_32_s16; | |
3115 | break; | |
3116 | case M32C_OPERAND_IMM_32_QI : | |
3117 | value = fields->f_dsp_32_s8; | |
3118 | break; | |
3119 | case M32C_OPERAND_IMM_32_SI : | |
3120 | value = fields->f_dsp_32_s32; | |
3121 | break; | |
3122 | case M32C_OPERAND_IMM_40_HI : | |
3123 | value = fields->f_dsp_40_s16; | |
3124 | break; | |
3125 | case M32C_OPERAND_IMM_40_QI : | |
3126 | value = fields->f_dsp_40_s8; | |
3127 | break; | |
3128 | case M32C_OPERAND_IMM_40_SI : | |
3129 | value = fields->f_dsp_40_s32; | |
3130 | break; | |
3131 | case M32C_OPERAND_IMM_48_HI : | |
3132 | value = fields->f_dsp_48_s16; | |
3133 | break; | |
3134 | case M32C_OPERAND_IMM_48_QI : | |
3135 | value = fields->f_dsp_48_s8; | |
3136 | break; | |
3137 | case M32C_OPERAND_IMM_48_SI : | |
3138 | value = fields->f_dsp_48_s32; | |
3139 | break; | |
3140 | case M32C_OPERAND_IMM_56_HI : | |
3141 | value = fields->f_dsp_56_s16; | |
3142 | break; | |
3143 | case M32C_OPERAND_IMM_56_QI : | |
3144 | value = fields->f_dsp_56_s8; | |
3145 | break; | |
3146 | case M32C_OPERAND_IMM_64_HI : | |
3147 | value = fields->f_dsp_64_s16; | |
3148 | break; | |
3149 | case M32C_OPERAND_IMM_8_HI : | |
3150 | value = fields->f_dsp_8_s16; | |
3151 | break; | |
3152 | case M32C_OPERAND_IMM_8_QI : | |
3153 | value = fields->f_dsp_8_s8; | |
3154 | break; | |
3155 | case M32C_OPERAND_IMM_8_S4 : | |
3156 | value = fields->f_imm_8_s4; | |
3157 | break; | |
3158 | case M32C_OPERAND_IMM_SH_12_S4 : | |
3159 | value = fields->f_imm_12_s4; | |
3160 | break; | |
3161 | case M32C_OPERAND_IMM_SH_20_S4 : | |
3162 | value = fields->f_imm_20_s4; | |
3163 | break; | |
3164 | case M32C_OPERAND_IMM_SH_8_S4 : | |
3165 | value = fields->f_imm_8_s4; | |
3166 | break; | |
3167 | case M32C_OPERAND_IMM1_S : | |
3168 | value = fields->f_imm1_S; | |
3169 | break; | |
3170 | case M32C_OPERAND_IMM3_S : | |
3171 | value = fields->f_imm3_S; | |
3172 | break; | |
3173 | case M32C_OPERAND_LAB_16_8 : | |
3174 | value = fields->f_lab_16_8; | |
3175 | break; | |
3176 | case M32C_OPERAND_LAB_24_8 : | |
3177 | value = fields->f_lab_24_8; | |
3178 | break; | |
3179 | case M32C_OPERAND_LAB_32_8 : | |
3180 | value = fields->f_lab_32_8; | |
3181 | break; | |
3182 | case M32C_OPERAND_LAB_40_8 : | |
3183 | value = fields->f_lab_40_8; | |
3184 | break; | |
3185 | case M32C_OPERAND_LAB_5_3 : | |
3186 | value = fields->f_lab_5_3; | |
3187 | break; | |
3188 | case M32C_OPERAND_LAB_8_16 : | |
3189 | value = fields->f_lab_8_16; | |
3190 | break; | |
3191 | case M32C_OPERAND_LAB_8_24 : | |
3192 | value = fields->f_lab_8_24; | |
3193 | break; | |
3194 | case M32C_OPERAND_LAB_8_8 : | |
3195 | value = fields->f_lab_8_8; | |
3196 | break; | |
3197 | case M32C_OPERAND_LAB32_JMP_S : | |
3198 | value = fields->f_lab32_jmp_s; | |
3199 | break; | |
3200 | case M32C_OPERAND_Q : | |
3201 | value = 0; | |
3202 | break; | |
3203 | case M32C_OPERAND_R0 : | |
3204 | value = 0; | |
3205 | break; | |
3206 | case M32C_OPERAND_R0H : | |
3207 | value = 0; | |
3208 | break; | |
3209 | case M32C_OPERAND_R0L : | |
3210 | value = 0; | |
3211 | break; | |
3212 | case M32C_OPERAND_R1 : | |
3213 | value = 0; | |
3214 | break; | |
3215 | case M32C_OPERAND_R1R2R0 : | |
3216 | value = 0; | |
3217 | break; | |
3218 | case M32C_OPERAND_R2 : | |
3219 | value = 0; | |
3220 | break; | |
3221 | case M32C_OPERAND_R2R0 : | |
3222 | value = 0; | |
3223 | break; | |
3224 | case M32C_OPERAND_R3 : | |
3225 | value = 0; | |
3226 | break; | |
3227 | case M32C_OPERAND_R3R1 : | |
3228 | value = 0; | |
3229 | break; | |
3230 | case M32C_OPERAND_REGSETPOP : | |
3231 | value = fields->f_8_8; | |
3232 | break; | |
3233 | case M32C_OPERAND_REGSETPUSH : | |
3234 | value = fields->f_8_8; | |
3235 | break; | |
3236 | case M32C_OPERAND_RN16_PUSH_S : | |
3237 | value = fields->f_4_1; | |
3238 | break; | |
3239 | case M32C_OPERAND_S : | |
3240 | value = 0; | |
3241 | break; | |
3242 | case M32C_OPERAND_SRC16AN : | |
3243 | value = fields->f_src16_an; | |
3244 | break; | |
3245 | case M32C_OPERAND_SRC16ANHI : | |
3246 | value = fields->f_src16_an; | |
3247 | break; | |
3248 | case M32C_OPERAND_SRC16ANQI : | |
3249 | value = fields->f_src16_an; | |
3250 | break; | |
3251 | case M32C_OPERAND_SRC16RNHI : | |
3252 | value = fields->f_src16_rn; | |
3253 | break; | |
3254 | case M32C_OPERAND_SRC16RNQI : | |
3255 | value = fields->f_src16_rn; | |
3256 | break; | |
3257 | case M32C_OPERAND_SRC32ANPREFIXED : | |
3258 | value = fields->f_src32_an_prefixed; | |
3259 | break; | |
3260 | case M32C_OPERAND_SRC32ANPREFIXEDHI : | |
3261 | value = fields->f_src32_an_prefixed; | |
3262 | break; | |
3263 | case M32C_OPERAND_SRC32ANPREFIXEDQI : | |
3264 | value = fields->f_src32_an_prefixed; | |
3265 | break; | |
3266 | case M32C_OPERAND_SRC32ANPREFIXEDSI : | |
3267 | value = fields->f_src32_an_prefixed; | |
3268 | break; | |
3269 | case M32C_OPERAND_SRC32ANUNPREFIXED : | |
3270 | value = fields->f_src32_an_unprefixed; | |
3271 | break; | |
3272 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : | |
3273 | value = fields->f_src32_an_unprefixed; | |
3274 | break; | |
3275 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : | |
3276 | value = fields->f_src32_an_unprefixed; | |
3277 | break; | |
3278 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : | |
3279 | value = fields->f_src32_an_unprefixed; | |
3280 | break; | |
3281 | case M32C_OPERAND_SRC32RNPREFIXEDHI : | |
3282 | value = fields->f_src32_rn_prefixed_HI; | |
3283 | break; | |
3284 | case M32C_OPERAND_SRC32RNPREFIXEDQI : | |
3285 | value = fields->f_src32_rn_prefixed_QI; | |
3286 | break; | |
3287 | case M32C_OPERAND_SRC32RNPREFIXEDSI : | |
3288 | value = fields->f_src32_rn_prefixed_SI; | |
3289 | break; | |
3290 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : | |
3291 | value = fields->f_src32_rn_unprefixed_HI; | |
3292 | break; | |
3293 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : | |
3294 | value = fields->f_src32_rn_unprefixed_QI; | |
3295 | break; | |
3296 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : | |
3297 | value = fields->f_src32_rn_unprefixed_SI; | |
3298 | break; | |
3299 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : | |
3300 | value = fields->f_5_1; | |
3301 | break; | |
3302 | case M32C_OPERAND_X : | |
3303 | value = 0; | |
3304 | break; | |
3305 | case M32C_OPERAND_Z : | |
3306 | value = 0; | |
3307 | break; | |
3308 | case M32C_OPERAND_COND16_16 : | |
3309 | value = fields->f_dsp_16_u8; | |
3310 | break; | |
3311 | case M32C_OPERAND_COND16_24 : | |
3312 | value = fields->f_dsp_24_u8; | |
3313 | break; | |
3314 | case M32C_OPERAND_COND16_32 : | |
3315 | value = fields->f_dsp_32_u8; | |
3316 | break; | |
3317 | case M32C_OPERAND_COND16C : | |
3318 | value = fields->f_cond16; | |
3319 | break; | |
3320 | case M32C_OPERAND_COND16J : | |
3321 | value = fields->f_cond16; | |
3322 | break; | |
3323 | case M32C_OPERAND_COND16J5 : | |
3324 | value = fields->f_cond16j_5; | |
3325 | break; | |
3326 | case M32C_OPERAND_COND32 : | |
3327 | value = fields->f_cond32; | |
3328 | break; | |
3329 | case M32C_OPERAND_COND32_16 : | |
3330 | value = fields->f_dsp_16_u8; | |
3331 | break; | |
3332 | case M32C_OPERAND_COND32_24 : | |
3333 | value = fields->f_dsp_24_u8; | |
3334 | break; | |
3335 | case M32C_OPERAND_COND32_32 : | |
3336 | value = fields->f_dsp_32_u8; | |
3337 | break; | |
3338 | case M32C_OPERAND_COND32_40 : | |
3339 | value = fields->f_dsp_40_u8; | |
3340 | break; | |
3341 | case M32C_OPERAND_COND32J : | |
3342 | value = fields->f_cond32j; | |
3343 | break; | |
3344 | case M32C_OPERAND_CR1_PREFIXED_32 : | |
3345 | value = fields->f_21_3; | |
3346 | break; | |
3347 | case M32C_OPERAND_CR1_UNPREFIXED_32 : | |
3348 | value = fields->f_13_3; | |
3349 | break; | |
3350 | case M32C_OPERAND_CR16 : | |
3351 | value = fields->f_9_3; | |
3352 | break; | |
3353 | case M32C_OPERAND_CR2_32 : | |
3354 | value = fields->f_13_3; | |
3355 | break; | |
3356 | case M32C_OPERAND_CR3_PREFIXED_32 : | |
3357 | value = fields->f_21_3; | |
3358 | break; | |
3359 | case M32C_OPERAND_CR3_UNPREFIXED_32 : | |
3360 | value = fields->f_13_3; | |
3361 | break; | |
3362 | case M32C_OPERAND_FLAGS16 : | |
3363 | value = fields->f_9_3; | |
3364 | break; | |
3365 | case M32C_OPERAND_FLAGS32 : | |
3366 | value = fields->f_13_3; | |
3367 | break; | |
3368 | case M32C_OPERAND_SCCOND32 : | |
3369 | value = fields->f_cond16; | |
3370 | break; | |
3371 | case M32C_OPERAND_SIZE : | |
3372 | value = 0; | |
3373 | break; | |
3374 | ||
3375 | default : | |
3376 | /* xgettext:c-format */ | |
3377 | fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), | |
3378 | opindex); | |
3379 | abort (); | |
3380 | } | |
3381 | ||
3382 | return value; | |
3383 | } | |
3384 | ||
3385 | bfd_vma | |
3386 | m32c_cgen_get_vma_operand (cd, opindex, fields) | |
3387 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; | |
3388 | int opindex; | |
3389 | const CGEN_FIELDS * fields; | |
3390 | { | |
3391 | bfd_vma value; | |
3392 | ||
3393 | switch (opindex) | |
3394 | { | |
3395 | case M32C_OPERAND_A0 : | |
3396 | value = 0; | |
3397 | break; | |
3398 | case M32C_OPERAND_A1 : | |
3399 | value = 0; | |
3400 | break; | |
3401 | case M32C_OPERAND_AN16_PUSH_S : | |
3402 | value = fields->f_4_1; | |
3403 | break; | |
3404 | case M32C_OPERAND_BIT16AN : | |
3405 | value = fields->f_dst16_an; | |
3406 | break; | |
3407 | case M32C_OPERAND_BIT16RN : | |
3408 | value = fields->f_dst16_rn; | |
3409 | break; | |
3410 | case M32C_OPERAND_BIT32ANPREFIXED : | |
3411 | value = fields->f_dst32_an_prefixed; | |
3412 | break; | |
3413 | case M32C_OPERAND_BIT32ANUNPREFIXED : | |
3414 | value = fields->f_dst32_an_unprefixed; | |
3415 | break; | |
3416 | case M32C_OPERAND_BIT32RNPREFIXED : | |
3417 | value = fields->f_dst32_rn_prefixed_QI; | |
3418 | break; | |
3419 | case M32C_OPERAND_BIT32RNUNPREFIXED : | |
3420 | value = fields->f_dst32_rn_unprefixed_QI; | |
3421 | break; | |
3422 | case M32C_OPERAND_BITBASE16_16_S8 : | |
3423 | value = fields->f_dsp_16_s8; | |
3424 | break; | |
3425 | case M32C_OPERAND_BITBASE16_16_U16 : | |
3426 | value = fields->f_dsp_16_u16; | |
3427 | break; | |
3428 | case M32C_OPERAND_BITBASE16_16_U8 : | |
3429 | value = fields->f_dsp_16_u8; | |
3430 | break; | |
3431 | case M32C_OPERAND_BITBASE16_8_U11_S : | |
3432 | value = fields->f_bitbase16_u11_S; | |
3433 | break; | |
3434 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : | |
3435 | value = fields->f_bitbase32_16_s11_unprefixed; | |
3436 | break; | |
3437 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : | |
3438 | value = fields->f_bitbase32_16_s19_unprefixed; | |
3439 | break; | |
3440 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : | |
3441 | value = fields->f_bitbase32_16_u11_unprefixed; | |
3442 | break; | |
3443 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : | |
3444 | value = fields->f_bitbase32_16_u19_unprefixed; | |
3445 | break; | |
3446 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : | |
3447 | value = fields->f_bitbase32_16_u27_unprefixed; | |
3448 | break; | |
3449 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : | |
3450 | value = fields->f_bitbase32_24_s11_prefixed; | |
3451 | break; | |
3452 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : | |
3453 | value = fields->f_bitbase32_24_s19_prefixed; | |
3454 | break; | |
3455 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : | |
3456 | value = fields->f_bitbase32_24_u11_prefixed; | |
3457 | break; | |
3458 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : | |
3459 | value = fields->f_bitbase32_24_u19_prefixed; | |
3460 | break; | |
3461 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : | |
3462 | value = fields->f_bitbase32_24_u27_prefixed; | |
3463 | break; | |
3464 | case M32C_OPERAND_BITNO16R : | |
3465 | value = fields->f_dsp_16_u8; | |
3466 | break; | |
3467 | case M32C_OPERAND_BITNO32PREFIXED : | |
3468 | value = fields->f_bitno32_prefixed; | |
3469 | break; | |
3470 | case M32C_OPERAND_BITNO32UNPREFIXED : | |
3471 | value = fields->f_bitno32_unprefixed; | |
3472 | break; | |
3473 | case M32C_OPERAND_DSP_10_U6 : | |
3474 | value = fields->f_dsp_10_u6; | |
3475 | break; | |
3476 | case M32C_OPERAND_DSP_16_S16 : | |
3477 | value = fields->f_dsp_16_s16; | |
3478 | break; | |
3479 | case M32C_OPERAND_DSP_16_S8 : | |
3480 | value = fields->f_dsp_16_s8; | |
3481 | break; | |
3482 | case M32C_OPERAND_DSP_16_U16 : | |
3483 | value = fields->f_dsp_16_u16; | |
3484 | break; | |
3485 | case M32C_OPERAND_DSP_16_U20 : | |
3486 | value = fields->f_dsp_16_u24; | |
3487 | break; | |
3488 | case M32C_OPERAND_DSP_16_U24 : | |
3489 | value = fields->f_dsp_16_u24; | |
3490 | break; | |
3491 | case M32C_OPERAND_DSP_16_U8 : | |
3492 | value = fields->f_dsp_16_u8; | |
3493 | break; | |
3494 | case M32C_OPERAND_DSP_24_S16 : | |
3495 | value = fields->f_dsp_24_s16; | |
3496 | break; | |
3497 | case M32C_OPERAND_DSP_24_S8 : | |
3498 | value = fields->f_dsp_24_s8; | |
3499 | break; | |
3500 | case M32C_OPERAND_DSP_24_U16 : | |
3501 | value = fields->f_dsp_24_u16; | |
3502 | break; | |
3503 | case M32C_OPERAND_DSP_24_U20 : | |
3504 | value = fields->f_dsp_24_u24; | |
3505 | break; | |
3506 | case M32C_OPERAND_DSP_24_U24 : | |
3507 | value = fields->f_dsp_24_u24; | |
3508 | break; | |
3509 | case M32C_OPERAND_DSP_24_U8 : | |
3510 | value = fields->f_dsp_24_u8; | |
3511 | break; | |
3512 | case M32C_OPERAND_DSP_32_S16 : | |
3513 | value = fields->f_dsp_32_s16; | |
3514 | break; | |
3515 | case M32C_OPERAND_DSP_32_S8 : | |
3516 | value = fields->f_dsp_32_s8; | |
3517 | break; | |
3518 | case M32C_OPERAND_DSP_32_U16 : | |
3519 | value = fields->f_dsp_32_u16; | |
3520 | break; | |
3521 | case M32C_OPERAND_DSP_32_U20 : | |
3522 | value = fields->f_dsp_32_u24; | |
3523 | break; | |
3524 | case M32C_OPERAND_DSP_32_U24 : | |
3525 | value = fields->f_dsp_32_u24; | |
3526 | break; | |
3527 | case M32C_OPERAND_DSP_32_U8 : | |
3528 | value = fields->f_dsp_32_u8; | |
3529 | break; | |
3530 | case M32C_OPERAND_DSP_40_S16 : | |
3531 | value = fields->f_dsp_40_s16; | |
3532 | break; | |
3533 | case M32C_OPERAND_DSP_40_S8 : | |
3534 | value = fields->f_dsp_40_s8; | |
3535 | break; | |
3536 | case M32C_OPERAND_DSP_40_U16 : | |
3537 | value = fields->f_dsp_40_u16; | |
3538 | break; | |
3539 | case M32C_OPERAND_DSP_40_U24 : | |
3540 | value = fields->f_dsp_40_u24; | |
3541 | break; | |
3542 | case M32C_OPERAND_DSP_40_U8 : | |
3543 | value = fields->f_dsp_40_u8; | |
3544 | break; | |
3545 | case M32C_OPERAND_DSP_48_S16 : | |
3546 | value = fields->f_dsp_48_s16; | |
3547 | break; | |
3548 | case M32C_OPERAND_DSP_48_S8 : | |
3549 | value = fields->f_dsp_48_s8; | |
3550 | break; | |
3551 | case M32C_OPERAND_DSP_48_U16 : | |
3552 | value = fields->f_dsp_48_u16; | |
3553 | break; | |
3554 | case M32C_OPERAND_DSP_48_U24 : | |
3555 | value = fields->f_dsp_48_u24; | |
3556 | break; | |
3557 | case M32C_OPERAND_DSP_48_U8 : | |
3558 | value = fields->f_dsp_48_u8; | |
3559 | break; | |
3560 | case M32C_OPERAND_DSP_8_S8 : | |
3561 | value = fields->f_dsp_8_s8; | |
3562 | break; | |
3563 | case M32C_OPERAND_DSP_8_U16 : | |
3564 | value = fields->f_dsp_8_u16; | |
3565 | break; | |
3566 | case M32C_OPERAND_DSP_8_U6 : | |
3567 | value = fields->f_dsp_8_u6; | |
3568 | break; | |
3569 | case M32C_OPERAND_DSP_8_U8 : | |
3570 | value = fields->f_dsp_8_u8; | |
3571 | break; | |
3572 | case M32C_OPERAND_DST16AN : | |
3573 | value = fields->f_dst16_an; | |
3574 | break; | |
3575 | case M32C_OPERAND_DST16AN_S : | |
3576 | value = fields->f_dst16_an_s; | |
3577 | break; | |
3578 | case M32C_OPERAND_DST16ANHI : | |
3579 | value = fields->f_dst16_an; | |
3580 | break; | |
3581 | case M32C_OPERAND_DST16ANQI : | |
3582 | value = fields->f_dst16_an; | |
3583 | break; | |
3584 | case M32C_OPERAND_DST16ANQI_S : | |
3585 | value = fields->f_dst16_rn_QI_s; | |
3586 | break; | |
3587 | case M32C_OPERAND_DST16ANSI : | |
3588 | value = fields->f_dst16_an; | |
3589 | break; | |
3590 | case M32C_OPERAND_DST16RNEXTQI : | |
3591 | value = fields->f_dst16_rn_ext; | |
3592 | break; | |
3593 | case M32C_OPERAND_DST16RNHI : | |
3594 | value = fields->f_dst16_rn; | |
3595 | break; | |
3596 | case M32C_OPERAND_DST16RNQI : | |
3597 | value = fields->f_dst16_rn; | |
3598 | break; | |
3599 | case M32C_OPERAND_DST16RNQI_S : | |
3600 | value = fields->f_dst16_rn_QI_s; | |
3601 | break; | |
3602 | case M32C_OPERAND_DST16RNSI : | |
3603 | value = fields->f_dst16_rn; | |
3604 | break; | |
3605 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : | |
3606 | value = fields->f_dst32_an_unprefixed; | |
3607 | break; | |
3608 | case M32C_OPERAND_DST32ANPREFIXED : | |
3609 | value = fields->f_dst32_an_prefixed; | |
3610 | break; | |
3611 | case M32C_OPERAND_DST32ANPREFIXEDHI : | |
3612 | value = fields->f_dst32_an_prefixed; | |
3613 | break; | |
3614 | case M32C_OPERAND_DST32ANPREFIXEDQI : | |
3615 | value = fields->f_dst32_an_prefixed; | |
3616 | break; | |
3617 | case M32C_OPERAND_DST32ANPREFIXEDSI : | |
3618 | value = fields->f_dst32_an_prefixed; | |
3619 | break; | |
3620 | case M32C_OPERAND_DST32ANUNPREFIXED : | |
3621 | value = fields->f_dst32_an_unprefixed; | |
3622 | break; | |
3623 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : | |
3624 | value = fields->f_dst32_an_unprefixed; | |
3625 | break; | |
3626 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : | |
3627 | value = fields->f_dst32_an_unprefixed; | |
3628 | break; | |
3629 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : | |
3630 | value = fields->f_dst32_an_unprefixed; | |
3631 | break; | |
3632 | case M32C_OPERAND_DST32R0HI_S : | |
3633 | value = 0; | |
3634 | break; | |
3635 | case M32C_OPERAND_DST32R0QI_S : | |
3636 | value = 0; | |
3637 | break; | |
3638 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : | |
3639 | value = fields->f_dst32_rn_ext_unprefixed; | |
3640 | break; | |
3641 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : | |
3642 | value = fields->f_dst32_rn_ext_unprefixed; | |
3643 | break; | |
3644 | case M32C_OPERAND_DST32RNPREFIXEDHI : | |
3645 | value = fields->f_dst32_rn_prefixed_HI; | |
3646 | break; | |
3647 | case M32C_OPERAND_DST32RNPREFIXEDQI : | |
3648 | value = fields->f_dst32_rn_prefixed_QI; | |
3649 | break; | |
3650 | case M32C_OPERAND_DST32RNPREFIXEDSI : | |
3651 | value = fields->f_dst32_rn_prefixed_SI; | |
3652 | break; | |
3653 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : | |
3654 | value = fields->f_dst32_rn_unprefixed_HI; | |
3655 | break; | |
3656 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : | |
3657 | value = fields->f_dst32_rn_unprefixed_QI; | |
3658 | break; | |
3659 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : | |
3660 | value = fields->f_dst32_rn_unprefixed_SI; | |
3661 | break; | |
3662 | case M32C_OPERAND_G : | |
3663 | value = 0; | |
3664 | break; | |
3665 | case M32C_OPERAND_IMM_12_S4 : | |
3666 | value = fields->f_imm_12_s4; | |
3667 | break; | |
3668 | case M32C_OPERAND_IMM_13_U3 : | |
3669 | value = fields->f_imm_13_u3; | |
3670 | break; | |
3671 | case M32C_OPERAND_IMM_16_HI : | |
3672 | value = fields->f_dsp_16_s16; | |
3673 | break; | |
3674 | case M32C_OPERAND_IMM_16_QI : | |
3675 | value = fields->f_dsp_16_s8; | |
3676 | break; | |
3677 | case M32C_OPERAND_IMM_16_SI : | |
3678 | value = fields->f_dsp_16_s32; | |
3679 | break; | |
3680 | case M32C_OPERAND_IMM_20_S4 : | |
3681 | value = fields->f_imm_20_s4; | |
3682 | break; | |
3683 | case M32C_OPERAND_IMM_24_HI : | |
3684 | value = fields->f_dsp_24_s16; | |
3685 | break; | |
3686 | case M32C_OPERAND_IMM_24_QI : | |
3687 | value = fields->f_dsp_24_s8; | |
3688 | break; | |
3689 | case M32C_OPERAND_IMM_24_SI : | |
3690 | value = fields->f_dsp_24_s32; | |
3691 | break; | |
3692 | case M32C_OPERAND_IMM_32_HI : | |
3693 | value = fields->f_dsp_32_s16; | |
3694 | break; | |
3695 | case M32C_OPERAND_IMM_32_QI : | |
3696 | value = fields->f_dsp_32_s8; | |
3697 | break; | |
3698 | case M32C_OPERAND_IMM_32_SI : | |
3699 | value = fields->f_dsp_32_s32; | |
3700 | break; | |
3701 | case M32C_OPERAND_IMM_40_HI : | |
3702 | value = fields->f_dsp_40_s16; | |
3703 | break; | |
3704 | case M32C_OPERAND_IMM_40_QI : | |
3705 | value = fields->f_dsp_40_s8; | |
3706 | break; | |
3707 | case M32C_OPERAND_IMM_40_SI : | |
3708 | value = fields->f_dsp_40_s32; | |
3709 | break; | |
3710 | case M32C_OPERAND_IMM_48_HI : | |
3711 | value = fields->f_dsp_48_s16; | |
3712 | break; | |
3713 | case M32C_OPERAND_IMM_48_QI : | |
3714 | value = fields->f_dsp_48_s8; | |
3715 | break; | |
3716 | case M32C_OPERAND_IMM_48_SI : | |
3717 | value = fields->f_dsp_48_s32; | |
3718 | break; | |
3719 | case M32C_OPERAND_IMM_56_HI : | |
3720 | value = fields->f_dsp_56_s16; | |
3721 | break; | |
3722 | case M32C_OPERAND_IMM_56_QI : | |
3723 | value = fields->f_dsp_56_s8; | |
3724 | break; | |
3725 | case M32C_OPERAND_IMM_64_HI : | |
3726 | value = fields->f_dsp_64_s16; | |
3727 | break; | |
3728 | case M32C_OPERAND_IMM_8_HI : | |
3729 | value = fields->f_dsp_8_s16; | |
3730 | break; | |
3731 | case M32C_OPERAND_IMM_8_QI : | |
3732 | value = fields->f_dsp_8_s8; | |
3733 | break; | |
3734 | case M32C_OPERAND_IMM_8_S4 : | |
3735 | value = fields->f_imm_8_s4; | |
3736 | break; | |
3737 | case M32C_OPERAND_IMM_SH_12_S4 : | |
3738 | value = fields->f_imm_12_s4; | |
3739 | break; | |
3740 | case M32C_OPERAND_IMM_SH_20_S4 : | |
3741 | value = fields->f_imm_20_s4; | |
3742 | break; | |
3743 | case M32C_OPERAND_IMM_SH_8_S4 : | |
3744 | value = fields->f_imm_8_s4; | |
3745 | break; | |
3746 | case M32C_OPERAND_IMM1_S : | |
3747 | value = fields->f_imm1_S; | |
3748 | break; | |
3749 | case M32C_OPERAND_IMM3_S : | |
3750 | value = fields->f_imm3_S; | |
3751 | break; | |
3752 | case M32C_OPERAND_LAB_16_8 : | |
3753 | value = fields->f_lab_16_8; | |
3754 | break; | |
3755 | case M32C_OPERAND_LAB_24_8 : | |
3756 | value = fields->f_lab_24_8; | |
3757 | break; | |
3758 | case M32C_OPERAND_LAB_32_8 : | |
3759 | value = fields->f_lab_32_8; | |
3760 | break; | |
3761 | case M32C_OPERAND_LAB_40_8 : | |
3762 | value = fields->f_lab_40_8; | |
3763 | break; | |
3764 | case M32C_OPERAND_LAB_5_3 : | |
3765 | value = fields->f_lab_5_3; | |
3766 | break; | |
3767 | case M32C_OPERAND_LAB_8_16 : | |
3768 | value = fields->f_lab_8_16; | |
3769 | break; | |
3770 | case M32C_OPERAND_LAB_8_24 : | |
3771 | value = fields->f_lab_8_24; | |
3772 | break; | |
3773 | case M32C_OPERAND_LAB_8_8 : | |
3774 | value = fields->f_lab_8_8; | |
3775 | break; | |
3776 | case M32C_OPERAND_LAB32_JMP_S : | |
3777 | value = fields->f_lab32_jmp_s; | |
3778 | break; | |
3779 | case M32C_OPERAND_Q : | |
3780 | value = 0; | |
3781 | break; | |
3782 | case M32C_OPERAND_R0 : | |
3783 | value = 0; | |
3784 | break; | |
3785 | case M32C_OPERAND_R0H : | |
3786 | value = 0; | |
3787 | break; | |
3788 | case M32C_OPERAND_R0L : | |
3789 | value = 0; | |
3790 | break; | |
3791 | case M32C_OPERAND_R1 : | |
3792 | value = 0; | |
3793 | break; | |
3794 | case M32C_OPERAND_R1R2R0 : | |
3795 | value = 0; | |
3796 | break; | |
3797 | case M32C_OPERAND_R2 : | |
3798 | value = 0; | |
3799 | break; | |
3800 | case M32C_OPERAND_R2R0 : | |
3801 | value = 0; | |
3802 | break; | |
3803 | case M32C_OPERAND_R3 : | |
3804 | value = 0; | |
3805 | break; | |
3806 | case M32C_OPERAND_R3R1 : | |
3807 | value = 0; | |
3808 | break; | |
3809 | case M32C_OPERAND_REGSETPOP : | |
3810 | value = fields->f_8_8; | |
3811 | break; | |
3812 | case M32C_OPERAND_REGSETPUSH : | |
3813 | value = fields->f_8_8; | |
3814 | break; | |
3815 | case M32C_OPERAND_RN16_PUSH_S : | |
3816 | value = fields->f_4_1; | |
3817 | break; | |
3818 | case M32C_OPERAND_S : | |
3819 | value = 0; | |
3820 | break; | |
3821 | case M32C_OPERAND_SRC16AN : | |
3822 | value = fields->f_src16_an; | |
3823 | break; | |
3824 | case M32C_OPERAND_SRC16ANHI : | |
3825 | value = fields->f_src16_an; | |
3826 | break; | |
3827 | case M32C_OPERAND_SRC16ANQI : | |
3828 | value = fields->f_src16_an; | |
3829 | break; | |
3830 | case M32C_OPERAND_SRC16RNHI : | |
3831 | value = fields->f_src16_rn; | |
3832 | break; | |
3833 | case M32C_OPERAND_SRC16RNQI : | |
3834 | value = fields->f_src16_rn; | |
3835 | break; | |
3836 | case M32C_OPERAND_SRC32ANPREFIXED : | |
3837 | value = fields->f_src32_an_prefixed; | |
3838 | break; | |
3839 | case M32C_OPERAND_SRC32ANPREFIXEDHI : | |
3840 | value = fields->f_src32_an_prefixed; | |
3841 | break; | |
3842 | case M32C_OPERAND_SRC32ANPREFIXEDQI : | |
3843 | value = fields->f_src32_an_prefixed; | |
3844 | break; | |
3845 | case M32C_OPERAND_SRC32ANPREFIXEDSI : | |
3846 | value = fields->f_src32_an_prefixed; | |
3847 | break; | |
3848 | case M32C_OPERAND_SRC32ANUNPREFIXED : | |
3849 | value = fields->f_src32_an_unprefixed; | |
3850 | break; | |
3851 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : | |
3852 | value = fields->f_src32_an_unprefixed; | |
3853 | break; | |
3854 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : | |
3855 | value = fields->f_src32_an_unprefixed; | |
3856 | break; | |
3857 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : | |
3858 | value = fields->f_src32_an_unprefixed; | |
3859 | break; | |
3860 | case M32C_OPERAND_SRC32RNPREFIXEDHI : | |
3861 | value = fields->f_src32_rn_prefixed_HI; | |
3862 | break; | |
3863 | case M32C_OPERAND_SRC32RNPREFIXEDQI : | |
3864 | value = fields->f_src32_rn_prefixed_QI; | |
3865 | break; | |
3866 | case M32C_OPERAND_SRC32RNPREFIXEDSI : | |
3867 | value = fields->f_src32_rn_prefixed_SI; | |
3868 | break; | |
3869 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : | |
3870 | value = fields->f_src32_rn_unprefixed_HI; | |
3871 | break; | |
3872 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : | |
3873 | value = fields->f_src32_rn_unprefixed_QI; | |
3874 | break; | |
3875 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : | |
3876 | value = fields->f_src32_rn_unprefixed_SI; | |
3877 | break; | |
3878 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : | |
3879 | value = fields->f_5_1; | |
3880 | break; | |
3881 | case M32C_OPERAND_X : | |
3882 | value = 0; | |
3883 | break; | |
3884 | case M32C_OPERAND_Z : | |
3885 | value = 0; | |
3886 | break; | |
3887 | case M32C_OPERAND_COND16_16 : | |
3888 | value = fields->f_dsp_16_u8; | |
3889 | break; | |
3890 | case M32C_OPERAND_COND16_24 : | |
3891 | value = fields->f_dsp_24_u8; | |
3892 | break; | |
3893 | case M32C_OPERAND_COND16_32 : | |
3894 | value = fields->f_dsp_32_u8; | |
3895 | break; | |
3896 | case M32C_OPERAND_COND16C : | |
3897 | value = fields->f_cond16; | |
3898 | break; | |
3899 | case M32C_OPERAND_COND16J : | |
3900 | value = fields->f_cond16; | |
3901 | break; | |
3902 | case M32C_OPERAND_COND16J5 : | |
3903 | value = fields->f_cond16j_5; | |
3904 | break; | |
3905 | case M32C_OPERAND_COND32 : | |
3906 | value = fields->f_cond32; | |
3907 | break; | |
3908 | case M32C_OPERAND_COND32_16 : | |
3909 | value = fields->f_dsp_16_u8; | |
3910 | break; | |
3911 | case M32C_OPERAND_COND32_24 : | |
3912 | value = fields->f_dsp_24_u8; | |
3913 | break; | |
3914 | case M32C_OPERAND_COND32_32 : | |
3915 | value = fields->f_dsp_32_u8; | |
3916 | break; | |
3917 | case M32C_OPERAND_COND32_40 : | |
3918 | value = fields->f_dsp_40_u8; | |
3919 | break; | |
3920 | case M32C_OPERAND_COND32J : | |
3921 | value = fields->f_cond32j; | |
3922 | break; | |
3923 | case M32C_OPERAND_CR1_PREFIXED_32 : | |
3924 | value = fields->f_21_3; | |
3925 | break; | |
3926 | case M32C_OPERAND_CR1_UNPREFIXED_32 : | |
3927 | value = fields->f_13_3; | |
3928 | break; | |
3929 | case M32C_OPERAND_CR16 : | |
3930 | value = fields->f_9_3; | |
3931 | break; | |
3932 | case M32C_OPERAND_CR2_32 : | |
3933 | value = fields->f_13_3; | |
3934 | break; | |
3935 | case M32C_OPERAND_CR3_PREFIXED_32 : | |
3936 | value = fields->f_21_3; | |
3937 | break; | |
3938 | case M32C_OPERAND_CR3_UNPREFIXED_32 : | |
3939 | value = fields->f_13_3; | |
3940 | break; | |
3941 | case M32C_OPERAND_FLAGS16 : | |
3942 | value = fields->f_9_3; | |
3943 | break; | |
3944 | case M32C_OPERAND_FLAGS32 : | |
3945 | value = fields->f_13_3; | |
3946 | break; | |
3947 | case M32C_OPERAND_SCCOND32 : | |
3948 | value = fields->f_cond16; | |
3949 | break; | |
3950 | case M32C_OPERAND_SIZE : | |
3951 | value = 0; | |
3952 | break; | |
3953 | ||
3954 | default : | |
3955 | /* xgettext:c-format */ | |
3956 | fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), | |
3957 | opindex); | |
3958 | abort (); | |
3959 | } | |
3960 | ||
3961 | return value; | |
3962 | } | |
3963 | ||
3964 | void m32c_cgen_set_int_operand | |
3965 | PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, int)); | |
3966 | void m32c_cgen_set_vma_operand | |
3967 | PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma)); | |
3968 | ||
3969 | /* Stuffing values in cgen_fields is handled by a collection of functions. | |
3970 | They are distinguished by the type of the VALUE argument they accept. | |
3971 | TODO: floating point, inlining support, remove cases where argument type | |
3972 | not appropriate. */ | |
3973 | ||
3974 | void | |
3975 | m32c_cgen_set_int_operand (cd, opindex, fields, value) | |
3976 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; | |
3977 | int opindex; | |
3978 | CGEN_FIELDS * fields; | |
3979 | int value; | |
3980 | { | |
3981 | switch (opindex) | |
3982 | { | |
3983 | case M32C_OPERAND_A0 : | |
3984 | break; | |
3985 | case M32C_OPERAND_A1 : | |
3986 | break; | |
3987 | case M32C_OPERAND_AN16_PUSH_S : | |
3988 | fields->f_4_1 = value; | |
3989 | break; | |
3990 | case M32C_OPERAND_BIT16AN : | |
3991 | fields->f_dst16_an = value; | |
3992 | break; | |
3993 | case M32C_OPERAND_BIT16RN : | |
3994 | fields->f_dst16_rn = value; | |
3995 | break; | |
3996 | case M32C_OPERAND_BIT32ANPREFIXED : | |
3997 | fields->f_dst32_an_prefixed = value; | |
3998 | break; | |
3999 | case M32C_OPERAND_BIT32ANUNPREFIXED : | |
4000 | fields->f_dst32_an_unprefixed = value; | |
4001 | break; | |
4002 | case M32C_OPERAND_BIT32RNPREFIXED : | |
4003 | fields->f_dst32_rn_prefixed_QI = value; | |
4004 | break; | |
4005 | case M32C_OPERAND_BIT32RNUNPREFIXED : | |
4006 | fields->f_dst32_rn_unprefixed_QI = value; | |
4007 | break; | |
4008 | case M32C_OPERAND_BITBASE16_16_S8 : | |
4009 | fields->f_dsp_16_s8 = value; | |
4010 | break; | |
4011 | case M32C_OPERAND_BITBASE16_16_U16 : | |
4012 | fields->f_dsp_16_u16 = value; | |
4013 | break; | |
4014 | case M32C_OPERAND_BITBASE16_16_U8 : | |
4015 | fields->f_dsp_16_u8 = value; | |
4016 | break; | |
4017 | case M32C_OPERAND_BITBASE16_8_U11_S : | |
4018 | fields->f_bitbase16_u11_S = value; | |
4019 | break; | |
4020 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : | |
4021 | fields->f_bitbase32_16_s11_unprefixed = value; | |
4022 | break; | |
4023 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : | |
4024 | fields->f_bitbase32_16_s19_unprefixed = value; | |
4025 | break; | |
4026 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : | |
4027 | fields->f_bitbase32_16_u11_unprefixed = value; | |
4028 | break; | |
4029 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : | |
4030 | fields->f_bitbase32_16_u19_unprefixed = value; | |
4031 | break; | |
4032 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : | |
4033 | fields->f_bitbase32_16_u27_unprefixed = value; | |
4034 | break; | |
4035 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : | |
4036 | fields->f_bitbase32_24_s11_prefixed = value; | |
4037 | break; | |
4038 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : | |
4039 | fields->f_bitbase32_24_s19_prefixed = value; | |
4040 | break; | |
4041 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : | |
4042 | fields->f_bitbase32_24_u11_prefixed = value; | |
4043 | break; | |
4044 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : | |
4045 | fields->f_bitbase32_24_u19_prefixed = value; | |
4046 | break; | |
4047 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : | |
4048 | fields->f_bitbase32_24_u27_prefixed = value; | |
4049 | break; | |
4050 | case M32C_OPERAND_BITNO16R : | |
4051 | fields->f_dsp_16_u8 = value; | |
4052 | break; | |
4053 | case M32C_OPERAND_BITNO32PREFIXED : | |
4054 | fields->f_bitno32_prefixed = value; | |
4055 | break; | |
4056 | case M32C_OPERAND_BITNO32UNPREFIXED : | |
4057 | fields->f_bitno32_unprefixed = value; | |
4058 | break; | |
4059 | case M32C_OPERAND_DSP_10_U6 : | |
4060 | fields->f_dsp_10_u6 = value; | |
4061 | break; | |
4062 | case M32C_OPERAND_DSP_16_S16 : | |
4063 | fields->f_dsp_16_s16 = value; | |
4064 | break; | |
4065 | case M32C_OPERAND_DSP_16_S8 : | |
4066 | fields->f_dsp_16_s8 = value; | |
4067 | break; | |
4068 | case M32C_OPERAND_DSP_16_U16 : | |
4069 | fields->f_dsp_16_u16 = value; | |
4070 | break; | |
4071 | case M32C_OPERAND_DSP_16_U20 : | |
4072 | fields->f_dsp_16_u24 = value; | |
4073 | break; | |
4074 | case M32C_OPERAND_DSP_16_U24 : | |
4075 | fields->f_dsp_16_u24 = value; | |
4076 | break; | |
4077 | case M32C_OPERAND_DSP_16_U8 : | |
4078 | fields->f_dsp_16_u8 = value; | |
4079 | break; | |
4080 | case M32C_OPERAND_DSP_24_S16 : | |
4081 | fields->f_dsp_24_s16 = value; | |
4082 | break; | |
4083 | case M32C_OPERAND_DSP_24_S8 : | |
4084 | fields->f_dsp_24_s8 = value; | |
4085 | break; | |
4086 | case M32C_OPERAND_DSP_24_U16 : | |
4087 | fields->f_dsp_24_u16 = value; | |
4088 | break; | |
4089 | case M32C_OPERAND_DSP_24_U20 : | |
4090 | fields->f_dsp_24_u24 = value; | |
4091 | break; | |
4092 | case M32C_OPERAND_DSP_24_U24 : | |
4093 | fields->f_dsp_24_u24 = value; | |
4094 | break; | |
4095 | case M32C_OPERAND_DSP_24_U8 : | |
4096 | fields->f_dsp_24_u8 = value; | |
4097 | break; | |
4098 | case M32C_OPERAND_DSP_32_S16 : | |
4099 | fields->f_dsp_32_s16 = value; | |
4100 | break; | |
4101 | case M32C_OPERAND_DSP_32_S8 : | |
4102 | fields->f_dsp_32_s8 = value; | |
4103 | break; | |
4104 | case M32C_OPERAND_DSP_32_U16 : | |
4105 | fields->f_dsp_32_u16 = value; | |
4106 | break; | |
4107 | case M32C_OPERAND_DSP_32_U20 : | |
4108 | fields->f_dsp_32_u24 = value; | |
4109 | break; | |
4110 | case M32C_OPERAND_DSP_32_U24 : | |
4111 | fields->f_dsp_32_u24 = value; | |
4112 | break; | |
4113 | case M32C_OPERAND_DSP_32_U8 : | |
4114 | fields->f_dsp_32_u8 = value; | |
4115 | break; | |
4116 | case M32C_OPERAND_DSP_40_S16 : | |
4117 | fields->f_dsp_40_s16 = value; | |
4118 | break; | |
4119 | case M32C_OPERAND_DSP_40_S8 : | |
4120 | fields->f_dsp_40_s8 = value; | |
4121 | break; | |
4122 | case M32C_OPERAND_DSP_40_U16 : | |
4123 | fields->f_dsp_40_u16 = value; | |
4124 | break; | |
4125 | case M32C_OPERAND_DSP_40_U24 : | |
4126 | fields->f_dsp_40_u24 = value; | |
4127 | break; | |
4128 | case M32C_OPERAND_DSP_40_U8 : | |
4129 | fields->f_dsp_40_u8 = value; | |
4130 | break; | |
4131 | case M32C_OPERAND_DSP_48_S16 : | |
4132 | fields->f_dsp_48_s16 = value; | |
4133 | break; | |
4134 | case M32C_OPERAND_DSP_48_S8 : | |
4135 | fields->f_dsp_48_s8 = value; | |
4136 | break; | |
4137 | case M32C_OPERAND_DSP_48_U16 : | |
4138 | fields->f_dsp_48_u16 = value; | |
4139 | break; | |
4140 | case M32C_OPERAND_DSP_48_U24 : | |
4141 | fields->f_dsp_48_u24 = value; | |
4142 | break; | |
4143 | case M32C_OPERAND_DSP_48_U8 : | |
4144 | fields->f_dsp_48_u8 = value; | |
4145 | break; | |
4146 | case M32C_OPERAND_DSP_8_S8 : | |
4147 | fields->f_dsp_8_s8 = value; | |
4148 | break; | |
4149 | case M32C_OPERAND_DSP_8_U16 : | |
4150 | fields->f_dsp_8_u16 = value; | |
4151 | break; | |
4152 | case M32C_OPERAND_DSP_8_U6 : | |
4153 | fields->f_dsp_8_u6 = value; | |
4154 | break; | |
4155 | case M32C_OPERAND_DSP_8_U8 : | |
4156 | fields->f_dsp_8_u8 = value; | |
4157 | break; | |
4158 | case M32C_OPERAND_DST16AN : | |
4159 | fields->f_dst16_an = value; | |
4160 | break; | |
4161 | case M32C_OPERAND_DST16AN_S : | |
4162 | fields->f_dst16_an_s = value; | |
4163 | break; | |
4164 | case M32C_OPERAND_DST16ANHI : | |
4165 | fields->f_dst16_an = value; | |
4166 | break; | |
4167 | case M32C_OPERAND_DST16ANQI : | |
4168 | fields->f_dst16_an = value; | |
4169 | break; | |
4170 | case M32C_OPERAND_DST16ANQI_S : | |
4171 | fields->f_dst16_rn_QI_s = value; | |
4172 | break; | |
4173 | case M32C_OPERAND_DST16ANSI : | |
4174 | fields->f_dst16_an = value; | |
4175 | break; | |
4176 | case M32C_OPERAND_DST16RNEXTQI : | |
4177 | fields->f_dst16_rn_ext = value; | |
4178 | break; | |
4179 | case M32C_OPERAND_DST16RNHI : | |
4180 | fields->f_dst16_rn = value; | |
4181 | break; | |
4182 | case M32C_OPERAND_DST16RNQI : | |
4183 | fields->f_dst16_rn = value; | |
4184 | break; | |
4185 | case M32C_OPERAND_DST16RNQI_S : | |
4186 | fields->f_dst16_rn_QI_s = value; | |
4187 | break; | |
4188 | case M32C_OPERAND_DST16RNSI : | |
4189 | fields->f_dst16_rn = value; | |
4190 | break; | |
4191 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : | |
4192 | fields->f_dst32_an_unprefixed = value; | |
4193 | break; | |
4194 | case M32C_OPERAND_DST32ANPREFIXED : | |
4195 | fields->f_dst32_an_prefixed = value; | |
4196 | break; | |
4197 | case M32C_OPERAND_DST32ANPREFIXEDHI : | |
4198 | fields->f_dst32_an_prefixed = value; | |
4199 | break; | |
4200 | case M32C_OPERAND_DST32ANPREFIXEDQI : | |
4201 | fields->f_dst32_an_prefixed = value; | |
4202 | break; | |
4203 | case M32C_OPERAND_DST32ANPREFIXEDSI : | |
4204 | fields->f_dst32_an_prefixed = value; | |
4205 | break; | |
4206 | case M32C_OPERAND_DST32ANUNPREFIXED : | |
4207 | fields->f_dst32_an_unprefixed = value; | |
4208 | break; | |
4209 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : | |
4210 | fields->f_dst32_an_unprefixed = value; | |
4211 | break; | |
4212 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : | |
4213 | fields->f_dst32_an_unprefixed = value; | |
4214 | break; | |
4215 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : | |
4216 | fields->f_dst32_an_unprefixed = value; | |
4217 | break; | |
4218 | case M32C_OPERAND_DST32R0HI_S : | |
4219 | break; | |
4220 | case M32C_OPERAND_DST32R0QI_S : | |
4221 | break; | |
4222 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : | |
4223 | fields->f_dst32_rn_ext_unprefixed = value; | |
4224 | break; | |
4225 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : | |
4226 | fields->f_dst32_rn_ext_unprefixed = value; | |
4227 | break; | |
4228 | case M32C_OPERAND_DST32RNPREFIXEDHI : | |
4229 | fields->f_dst32_rn_prefixed_HI = value; | |
4230 | break; | |
4231 | case M32C_OPERAND_DST32RNPREFIXEDQI : | |
4232 | fields->f_dst32_rn_prefixed_QI = value; | |
4233 | break; | |
4234 | case M32C_OPERAND_DST32RNPREFIXEDSI : | |
4235 | fields->f_dst32_rn_prefixed_SI = value; | |
4236 | break; | |
4237 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : | |
4238 | fields->f_dst32_rn_unprefixed_HI = value; | |
4239 | break; | |
4240 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : | |
4241 | fields->f_dst32_rn_unprefixed_QI = value; | |
4242 | break; | |
4243 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : | |
4244 | fields->f_dst32_rn_unprefixed_SI = value; | |
4245 | break; | |
4246 | case M32C_OPERAND_G : | |
4247 | break; | |
4248 | case M32C_OPERAND_IMM_12_S4 : | |
4249 | fields->f_imm_12_s4 = value; | |
4250 | break; | |
4251 | case M32C_OPERAND_IMM_13_U3 : | |
4252 | fields->f_imm_13_u3 = value; | |
4253 | break; | |
4254 | case M32C_OPERAND_IMM_16_HI : | |
4255 | fields->f_dsp_16_s16 = value; | |
4256 | break; | |
4257 | case M32C_OPERAND_IMM_16_QI : | |
4258 | fields->f_dsp_16_s8 = value; | |
4259 | break; | |
4260 | case M32C_OPERAND_IMM_16_SI : | |
4261 | fields->f_dsp_16_s32 = value; | |
4262 | break; | |
4263 | case M32C_OPERAND_IMM_20_S4 : | |
4264 | fields->f_imm_20_s4 = value; | |
4265 | break; | |
4266 | case M32C_OPERAND_IMM_24_HI : | |
4267 | fields->f_dsp_24_s16 = value; | |
4268 | break; | |
4269 | case M32C_OPERAND_IMM_24_QI : | |
4270 | fields->f_dsp_24_s8 = value; | |
4271 | break; | |
4272 | case M32C_OPERAND_IMM_24_SI : | |
4273 | fields->f_dsp_24_s32 = value; | |
4274 | break; | |
4275 | case M32C_OPERAND_IMM_32_HI : | |
4276 | fields->f_dsp_32_s16 = value; | |
4277 | break; | |
4278 | case M32C_OPERAND_IMM_32_QI : | |
4279 | fields->f_dsp_32_s8 = value; | |
4280 | break; | |
4281 | case M32C_OPERAND_IMM_32_SI : | |
4282 | fields->f_dsp_32_s32 = value; | |
4283 | break; | |
4284 | case M32C_OPERAND_IMM_40_HI : | |
4285 | fields->f_dsp_40_s16 = value; | |
4286 | break; | |
4287 | case M32C_OPERAND_IMM_40_QI : | |
4288 | fields->f_dsp_40_s8 = value; | |
4289 | break; | |
4290 | case M32C_OPERAND_IMM_40_SI : | |
4291 | fields->f_dsp_40_s32 = value; | |
4292 | break; | |
4293 | case M32C_OPERAND_IMM_48_HI : | |
4294 | fields->f_dsp_48_s16 = value; | |
4295 | break; | |
4296 | case M32C_OPERAND_IMM_48_QI : | |
4297 | fields->f_dsp_48_s8 = value; | |
4298 | break; | |
4299 | case M32C_OPERAND_IMM_48_SI : | |
4300 | fields->f_dsp_48_s32 = value; | |
4301 | break; | |
4302 | case M32C_OPERAND_IMM_56_HI : | |
4303 | fields->f_dsp_56_s16 = value; | |
4304 | break; | |
4305 | case M32C_OPERAND_IMM_56_QI : | |
4306 | fields->f_dsp_56_s8 = value; | |
4307 | break; | |
4308 | case M32C_OPERAND_IMM_64_HI : | |
4309 | fields->f_dsp_64_s16 = value; | |
4310 | break; | |
4311 | case M32C_OPERAND_IMM_8_HI : | |
4312 | fields->f_dsp_8_s16 = value; | |
4313 | break; | |
4314 | case M32C_OPERAND_IMM_8_QI : | |
4315 | fields->f_dsp_8_s8 = value; | |
4316 | break; | |
4317 | case M32C_OPERAND_IMM_8_S4 : | |
4318 | fields->f_imm_8_s4 = value; | |
4319 | break; | |
4320 | case M32C_OPERAND_IMM_SH_12_S4 : | |
4321 | fields->f_imm_12_s4 = value; | |
4322 | break; | |
4323 | case M32C_OPERAND_IMM_SH_20_S4 : | |
4324 | fields->f_imm_20_s4 = value; | |
4325 | break; | |
4326 | case M32C_OPERAND_IMM_SH_8_S4 : | |
4327 | fields->f_imm_8_s4 = value; | |
4328 | break; | |
4329 | case M32C_OPERAND_IMM1_S : | |
4330 | fields->f_imm1_S = value; | |
4331 | break; | |
4332 | case M32C_OPERAND_IMM3_S : | |
4333 | fields->f_imm3_S = value; | |
4334 | break; | |
4335 | case M32C_OPERAND_LAB_16_8 : | |
4336 | fields->f_lab_16_8 = value; | |
4337 | break; | |
4338 | case M32C_OPERAND_LAB_24_8 : | |
4339 | fields->f_lab_24_8 = value; | |
4340 | break; | |
4341 | case M32C_OPERAND_LAB_32_8 : | |
4342 | fields->f_lab_32_8 = value; | |
4343 | break; | |
4344 | case M32C_OPERAND_LAB_40_8 : | |
4345 | fields->f_lab_40_8 = value; | |
4346 | break; | |
4347 | case M32C_OPERAND_LAB_5_3 : | |
4348 | fields->f_lab_5_3 = value; | |
4349 | break; | |
4350 | case M32C_OPERAND_LAB_8_16 : | |
4351 | fields->f_lab_8_16 = value; | |
4352 | break; | |
4353 | case M32C_OPERAND_LAB_8_24 : | |
4354 | fields->f_lab_8_24 = value; | |
4355 | break; | |
4356 | case M32C_OPERAND_LAB_8_8 : | |
4357 | fields->f_lab_8_8 = value; | |
4358 | break; | |
4359 | case M32C_OPERAND_LAB32_JMP_S : | |
4360 | fields->f_lab32_jmp_s = value; | |
4361 | break; | |
4362 | case M32C_OPERAND_Q : | |
4363 | break; | |
4364 | case M32C_OPERAND_R0 : | |
4365 | break; | |
4366 | case M32C_OPERAND_R0H : | |
4367 | break; | |
4368 | case M32C_OPERAND_R0L : | |
4369 | break; | |
4370 | case M32C_OPERAND_R1 : | |
4371 | break; | |
4372 | case M32C_OPERAND_R1R2R0 : | |
4373 | break; | |
4374 | case M32C_OPERAND_R2 : | |
4375 | break; | |
4376 | case M32C_OPERAND_R2R0 : | |
4377 | break; | |
4378 | case M32C_OPERAND_R3 : | |
4379 | break; | |
4380 | case M32C_OPERAND_R3R1 : | |
4381 | break; | |
4382 | case M32C_OPERAND_REGSETPOP : | |
4383 | fields->f_8_8 = value; | |
4384 | break; | |
4385 | case M32C_OPERAND_REGSETPUSH : | |
4386 | fields->f_8_8 = value; | |
4387 | break; | |
4388 | case M32C_OPERAND_RN16_PUSH_S : | |
4389 | fields->f_4_1 = value; | |
4390 | break; | |
4391 | case M32C_OPERAND_S : | |
4392 | break; | |
4393 | case M32C_OPERAND_SRC16AN : | |
4394 | fields->f_src16_an = value; | |
4395 | break; | |
4396 | case M32C_OPERAND_SRC16ANHI : | |
4397 | fields->f_src16_an = value; | |
4398 | break; | |
4399 | case M32C_OPERAND_SRC16ANQI : | |
4400 | fields->f_src16_an = value; | |
4401 | break; | |
4402 | case M32C_OPERAND_SRC16RNHI : | |
4403 | fields->f_src16_rn = value; | |
4404 | break; | |
4405 | case M32C_OPERAND_SRC16RNQI : | |
4406 | fields->f_src16_rn = value; | |
4407 | break; | |
4408 | case M32C_OPERAND_SRC32ANPREFIXED : | |
4409 | fields->f_src32_an_prefixed = value; | |
4410 | break; | |
4411 | case M32C_OPERAND_SRC32ANPREFIXEDHI : | |
4412 | fields->f_src32_an_prefixed = value; | |
4413 | break; | |
4414 | case M32C_OPERAND_SRC32ANPREFIXEDQI : | |
4415 | fields->f_src32_an_prefixed = value; | |
4416 | break; | |
4417 | case M32C_OPERAND_SRC32ANPREFIXEDSI : | |
4418 | fields->f_src32_an_prefixed = value; | |
4419 | break; | |
4420 | case M32C_OPERAND_SRC32ANUNPREFIXED : | |
4421 | fields->f_src32_an_unprefixed = value; | |
4422 | break; | |
4423 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : | |
4424 | fields->f_src32_an_unprefixed = value; | |
4425 | break; | |
4426 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : | |
4427 | fields->f_src32_an_unprefixed = value; | |
4428 | break; | |
4429 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : | |
4430 | fields->f_src32_an_unprefixed = value; | |
4431 | break; | |
4432 | case M32C_OPERAND_SRC32RNPREFIXEDHI : | |
4433 | fields->f_src32_rn_prefixed_HI = value; | |
4434 | break; | |
4435 | case M32C_OPERAND_SRC32RNPREFIXEDQI : | |
4436 | fields->f_src32_rn_prefixed_QI = value; | |
4437 | break; | |
4438 | case M32C_OPERAND_SRC32RNPREFIXEDSI : | |
4439 | fields->f_src32_rn_prefixed_SI = value; | |
4440 | break; | |
4441 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : | |
4442 | fields->f_src32_rn_unprefixed_HI = value; | |
4443 | break; | |
4444 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : | |
4445 | fields->f_src32_rn_unprefixed_QI = value; | |
4446 | break; | |
4447 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : | |
4448 | fields->f_src32_rn_unprefixed_SI = value; | |
4449 | break; | |
4450 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : | |
4451 | fields->f_5_1 = value; | |
4452 | break; | |
4453 | case M32C_OPERAND_X : | |
4454 | break; | |
4455 | case M32C_OPERAND_Z : | |
4456 | break; | |
4457 | case M32C_OPERAND_COND16_16 : | |
4458 | fields->f_dsp_16_u8 = value; | |
4459 | break; | |
4460 | case M32C_OPERAND_COND16_24 : | |
4461 | fields->f_dsp_24_u8 = value; | |
4462 | break; | |
4463 | case M32C_OPERAND_COND16_32 : | |
4464 | fields->f_dsp_32_u8 = value; | |
4465 | break; | |
4466 | case M32C_OPERAND_COND16C : | |
4467 | fields->f_cond16 = value; | |
4468 | break; | |
4469 | case M32C_OPERAND_COND16J : | |
4470 | fields->f_cond16 = value; | |
4471 | break; | |
4472 | case M32C_OPERAND_COND16J5 : | |
4473 | fields->f_cond16j_5 = value; | |
4474 | break; | |
4475 | case M32C_OPERAND_COND32 : | |
4476 | fields->f_cond32 = value; | |
4477 | break; | |
4478 | case M32C_OPERAND_COND32_16 : | |
4479 | fields->f_dsp_16_u8 = value; | |
4480 | break; | |
4481 | case M32C_OPERAND_COND32_24 : | |
4482 | fields->f_dsp_24_u8 = value; | |
4483 | break; | |
4484 | case M32C_OPERAND_COND32_32 : | |
4485 | fields->f_dsp_32_u8 = value; | |
4486 | break; | |
4487 | case M32C_OPERAND_COND32_40 : | |
4488 | fields->f_dsp_40_u8 = value; | |
4489 | break; | |
4490 | case M32C_OPERAND_COND32J : | |
4491 | fields->f_cond32j = value; | |
4492 | break; | |
4493 | case M32C_OPERAND_CR1_PREFIXED_32 : | |
4494 | fields->f_21_3 = value; | |
4495 | break; | |
4496 | case M32C_OPERAND_CR1_UNPREFIXED_32 : | |
4497 | fields->f_13_3 = value; | |
4498 | break; | |
4499 | case M32C_OPERAND_CR16 : | |
4500 | fields->f_9_3 = value; | |
4501 | break; | |
4502 | case M32C_OPERAND_CR2_32 : | |
4503 | fields->f_13_3 = value; | |
4504 | break; | |
4505 | case M32C_OPERAND_CR3_PREFIXED_32 : | |
4506 | fields->f_21_3 = value; | |
4507 | break; | |
4508 | case M32C_OPERAND_CR3_UNPREFIXED_32 : | |
4509 | fields->f_13_3 = value; | |
4510 | break; | |
4511 | case M32C_OPERAND_FLAGS16 : | |
4512 | fields->f_9_3 = value; | |
4513 | break; | |
4514 | case M32C_OPERAND_FLAGS32 : | |
4515 | fields->f_13_3 = value; | |
4516 | break; | |
4517 | case M32C_OPERAND_SCCOND32 : | |
4518 | fields->f_cond16 = value; | |
4519 | break; | |
4520 | case M32C_OPERAND_SIZE : | |
4521 | break; | |
4522 | ||
4523 | default : | |
4524 | /* xgettext:c-format */ | |
4525 | fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), | |
4526 | opindex); | |
4527 | abort (); | |
4528 | } | |
4529 | } | |
4530 | ||
4531 | void | |
4532 | m32c_cgen_set_vma_operand (cd, opindex, fields, value) | |
4533 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; | |
4534 | int opindex; | |
4535 | CGEN_FIELDS * fields; | |
4536 | bfd_vma value; | |
4537 | { | |
4538 | switch (opindex) | |
4539 | { | |
4540 | case M32C_OPERAND_A0 : | |
4541 | break; | |
4542 | case M32C_OPERAND_A1 : | |
4543 | break; | |
4544 | case M32C_OPERAND_AN16_PUSH_S : | |
4545 | fields->f_4_1 = value; | |
4546 | break; | |
4547 | case M32C_OPERAND_BIT16AN : | |
4548 | fields->f_dst16_an = value; | |
4549 | break; | |
4550 | case M32C_OPERAND_BIT16RN : | |
4551 | fields->f_dst16_rn = value; | |
4552 | break; | |
4553 | case M32C_OPERAND_BIT32ANPREFIXED : | |
4554 | fields->f_dst32_an_prefixed = value; | |
4555 | break; | |
4556 | case M32C_OPERAND_BIT32ANUNPREFIXED : | |
4557 | fields->f_dst32_an_unprefixed = value; | |
4558 | break; | |
4559 | case M32C_OPERAND_BIT32RNPREFIXED : | |
4560 | fields->f_dst32_rn_prefixed_QI = value; | |
4561 | break; | |
4562 | case M32C_OPERAND_BIT32RNUNPREFIXED : | |
4563 | fields->f_dst32_rn_unprefixed_QI = value; | |
4564 | break; | |
4565 | case M32C_OPERAND_BITBASE16_16_S8 : | |
4566 | fields->f_dsp_16_s8 = value; | |
4567 | break; | |
4568 | case M32C_OPERAND_BITBASE16_16_U16 : | |
4569 | fields->f_dsp_16_u16 = value; | |
4570 | break; | |
4571 | case M32C_OPERAND_BITBASE16_16_U8 : | |
4572 | fields->f_dsp_16_u8 = value; | |
4573 | break; | |
4574 | case M32C_OPERAND_BITBASE16_8_U11_S : | |
4575 | fields->f_bitbase16_u11_S = value; | |
4576 | break; | |
4577 | case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : | |
4578 | fields->f_bitbase32_16_s11_unprefixed = value; | |
4579 | break; | |
4580 | case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : | |
4581 | fields->f_bitbase32_16_s19_unprefixed = value; | |
4582 | break; | |
4583 | case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : | |
4584 | fields->f_bitbase32_16_u11_unprefixed = value; | |
4585 | break; | |
4586 | case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : | |
4587 | fields->f_bitbase32_16_u19_unprefixed = value; | |
4588 | break; | |
4589 | case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : | |
4590 | fields->f_bitbase32_16_u27_unprefixed = value; | |
4591 | break; | |
4592 | case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : | |
4593 | fields->f_bitbase32_24_s11_prefixed = value; | |
4594 | break; | |
4595 | case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : | |
4596 | fields->f_bitbase32_24_s19_prefixed = value; | |
4597 | break; | |
4598 | case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : | |
4599 | fields->f_bitbase32_24_u11_prefixed = value; | |
4600 | break; | |
4601 | case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : | |
4602 | fields->f_bitbase32_24_u19_prefixed = value; | |
4603 | break; | |
4604 | case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : | |
4605 | fields->f_bitbase32_24_u27_prefixed = value; | |
4606 | break; | |
4607 | case M32C_OPERAND_BITNO16R : | |
4608 | fields->f_dsp_16_u8 = value; | |
4609 | break; | |
4610 | case M32C_OPERAND_BITNO32PREFIXED : | |
4611 | fields->f_bitno32_prefixed = value; | |
4612 | break; | |
4613 | case M32C_OPERAND_BITNO32UNPREFIXED : | |
4614 | fields->f_bitno32_unprefixed = value; | |
4615 | break; | |
4616 | case M32C_OPERAND_DSP_10_U6 : | |
4617 | fields->f_dsp_10_u6 = value; | |
4618 | break; | |
4619 | case M32C_OPERAND_DSP_16_S16 : | |
4620 | fields->f_dsp_16_s16 = value; | |
4621 | break; | |
4622 | case M32C_OPERAND_DSP_16_S8 : | |
4623 | fields->f_dsp_16_s8 = value; | |
4624 | break; | |
4625 | case M32C_OPERAND_DSP_16_U16 : | |
4626 | fields->f_dsp_16_u16 = value; | |
4627 | break; | |
4628 | case M32C_OPERAND_DSP_16_U20 : | |
4629 | fields->f_dsp_16_u24 = value; | |
4630 | break; | |
4631 | case M32C_OPERAND_DSP_16_U24 : | |
4632 | fields->f_dsp_16_u24 = value; | |
4633 | break; | |
4634 | case M32C_OPERAND_DSP_16_U8 : | |
4635 | fields->f_dsp_16_u8 = value; | |
4636 | break; | |
4637 | case M32C_OPERAND_DSP_24_S16 : | |
4638 | fields->f_dsp_24_s16 = value; | |
4639 | break; | |
4640 | case M32C_OPERAND_DSP_24_S8 : | |
4641 | fields->f_dsp_24_s8 = value; | |
4642 | break; | |
4643 | case M32C_OPERAND_DSP_24_U16 : | |
4644 | fields->f_dsp_24_u16 = value; | |
4645 | break; | |
4646 | case M32C_OPERAND_DSP_24_U20 : | |
4647 | fields->f_dsp_24_u24 = value; | |
4648 | break; | |
4649 | case M32C_OPERAND_DSP_24_U24 : | |
4650 | fields->f_dsp_24_u24 = value; | |
4651 | break; | |
4652 | case M32C_OPERAND_DSP_24_U8 : | |
4653 | fields->f_dsp_24_u8 = value; | |
4654 | break; | |
4655 | case M32C_OPERAND_DSP_32_S16 : | |
4656 | fields->f_dsp_32_s16 = value; | |
4657 | break; | |
4658 | case M32C_OPERAND_DSP_32_S8 : | |
4659 | fields->f_dsp_32_s8 = value; | |
4660 | break; | |
4661 | case M32C_OPERAND_DSP_32_U16 : | |
4662 | fields->f_dsp_32_u16 = value; | |
4663 | break; | |
4664 | case M32C_OPERAND_DSP_32_U20 : | |
4665 | fields->f_dsp_32_u24 = value; | |
4666 | break; | |
4667 | case M32C_OPERAND_DSP_32_U24 : | |
4668 | fields->f_dsp_32_u24 = value; | |
4669 | break; | |
4670 | case M32C_OPERAND_DSP_32_U8 : | |
4671 | fields->f_dsp_32_u8 = value; | |
4672 | break; | |
4673 | case M32C_OPERAND_DSP_40_S16 : | |
4674 | fields->f_dsp_40_s16 = value; | |
4675 | break; | |
4676 | case M32C_OPERAND_DSP_40_S8 : | |
4677 | fields->f_dsp_40_s8 = value; | |
4678 | break; | |
4679 | case M32C_OPERAND_DSP_40_U16 : | |
4680 | fields->f_dsp_40_u16 = value; | |
4681 | break; | |
4682 | case M32C_OPERAND_DSP_40_U24 : | |
4683 | fields->f_dsp_40_u24 = value; | |
4684 | break; | |
4685 | case M32C_OPERAND_DSP_40_U8 : | |
4686 | fields->f_dsp_40_u8 = value; | |
4687 | break; | |
4688 | case M32C_OPERAND_DSP_48_S16 : | |
4689 | fields->f_dsp_48_s16 = value; | |
4690 | break; | |
4691 | case M32C_OPERAND_DSP_48_S8 : | |
4692 | fields->f_dsp_48_s8 = value; | |
4693 | break; | |
4694 | case M32C_OPERAND_DSP_48_U16 : | |
4695 | fields->f_dsp_48_u16 = value; | |
4696 | break; | |
4697 | case M32C_OPERAND_DSP_48_U24 : | |
4698 | fields->f_dsp_48_u24 = value; | |
4699 | break; | |
4700 | case M32C_OPERAND_DSP_48_U8 : | |
4701 | fields->f_dsp_48_u8 = value; | |
4702 | break; | |
4703 | case M32C_OPERAND_DSP_8_S8 : | |
4704 | fields->f_dsp_8_s8 = value; | |
4705 | break; | |
4706 | case M32C_OPERAND_DSP_8_U16 : | |
4707 | fields->f_dsp_8_u16 = value; | |
4708 | break; | |
4709 | case M32C_OPERAND_DSP_8_U6 : | |
4710 | fields->f_dsp_8_u6 = value; | |
4711 | break; | |
4712 | case M32C_OPERAND_DSP_8_U8 : | |
4713 | fields->f_dsp_8_u8 = value; | |
4714 | break; | |
4715 | case M32C_OPERAND_DST16AN : | |
4716 | fields->f_dst16_an = value; | |
4717 | break; | |
4718 | case M32C_OPERAND_DST16AN_S : | |
4719 | fields->f_dst16_an_s = value; | |
4720 | break; | |
4721 | case M32C_OPERAND_DST16ANHI : | |
4722 | fields->f_dst16_an = value; | |
4723 | break; | |
4724 | case M32C_OPERAND_DST16ANQI : | |
4725 | fields->f_dst16_an = value; | |
4726 | break; | |
4727 | case M32C_OPERAND_DST16ANQI_S : | |
4728 | fields->f_dst16_rn_QI_s = value; | |
4729 | break; | |
4730 | case M32C_OPERAND_DST16ANSI : | |
4731 | fields->f_dst16_an = value; | |
4732 | break; | |
4733 | case M32C_OPERAND_DST16RNEXTQI : | |
4734 | fields->f_dst16_rn_ext = value; | |
4735 | break; | |
4736 | case M32C_OPERAND_DST16RNHI : | |
4737 | fields->f_dst16_rn = value; | |
4738 | break; | |
4739 | case M32C_OPERAND_DST16RNQI : | |
4740 | fields->f_dst16_rn = value; | |
4741 | break; | |
4742 | case M32C_OPERAND_DST16RNQI_S : | |
4743 | fields->f_dst16_rn_QI_s = value; | |
4744 | break; | |
4745 | case M32C_OPERAND_DST16RNSI : | |
4746 | fields->f_dst16_rn = value; | |
4747 | break; | |
4748 | case M32C_OPERAND_DST32ANEXTUNPREFIXED : | |
4749 | fields->f_dst32_an_unprefixed = value; | |
4750 | break; | |
4751 | case M32C_OPERAND_DST32ANPREFIXED : | |
4752 | fields->f_dst32_an_prefixed = value; | |
4753 | break; | |
4754 | case M32C_OPERAND_DST32ANPREFIXEDHI : | |
4755 | fields->f_dst32_an_prefixed = value; | |
4756 | break; | |
4757 | case M32C_OPERAND_DST32ANPREFIXEDQI : | |
4758 | fields->f_dst32_an_prefixed = value; | |
4759 | break; | |
4760 | case M32C_OPERAND_DST32ANPREFIXEDSI : | |
4761 | fields->f_dst32_an_prefixed = value; | |
4762 | break; | |
4763 | case M32C_OPERAND_DST32ANUNPREFIXED : | |
4764 | fields->f_dst32_an_unprefixed = value; | |
4765 | break; | |
4766 | case M32C_OPERAND_DST32ANUNPREFIXEDHI : | |
4767 | fields->f_dst32_an_unprefixed = value; | |
4768 | break; | |
4769 | case M32C_OPERAND_DST32ANUNPREFIXEDQI : | |
4770 | fields->f_dst32_an_unprefixed = value; | |
4771 | break; | |
4772 | case M32C_OPERAND_DST32ANUNPREFIXEDSI : | |
4773 | fields->f_dst32_an_unprefixed = value; | |
4774 | break; | |
4775 | case M32C_OPERAND_DST32R0HI_S : | |
4776 | break; | |
4777 | case M32C_OPERAND_DST32R0QI_S : | |
4778 | break; | |
4779 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : | |
4780 | fields->f_dst32_rn_ext_unprefixed = value; | |
4781 | break; | |
4782 | case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : | |
4783 | fields->f_dst32_rn_ext_unprefixed = value; | |
4784 | break; | |
4785 | case M32C_OPERAND_DST32RNPREFIXEDHI : | |
4786 | fields->f_dst32_rn_prefixed_HI = value; | |
4787 | break; | |
4788 | case M32C_OPERAND_DST32RNPREFIXEDQI : | |
4789 | fields->f_dst32_rn_prefixed_QI = value; | |
4790 | break; | |
4791 | case M32C_OPERAND_DST32RNPREFIXEDSI : | |
4792 | fields->f_dst32_rn_prefixed_SI = value; | |
4793 | break; | |
4794 | case M32C_OPERAND_DST32RNUNPREFIXEDHI : | |
4795 | fields->f_dst32_rn_unprefixed_HI = value; | |
4796 | break; | |
4797 | case M32C_OPERAND_DST32RNUNPREFIXEDQI : | |
4798 | fields->f_dst32_rn_unprefixed_QI = value; | |
4799 | break; | |
4800 | case M32C_OPERAND_DST32RNUNPREFIXEDSI : | |
4801 | fields->f_dst32_rn_unprefixed_SI = value; | |
4802 | break; | |
4803 | case M32C_OPERAND_G : | |
4804 | break; | |
4805 | case M32C_OPERAND_IMM_12_S4 : | |
4806 | fields->f_imm_12_s4 = value; | |
4807 | break; | |
4808 | case M32C_OPERAND_IMM_13_U3 : | |
4809 | fields->f_imm_13_u3 = value; | |
4810 | break; | |
4811 | case M32C_OPERAND_IMM_16_HI : | |
4812 | fields->f_dsp_16_s16 = value; | |
4813 | break; | |
4814 | case M32C_OPERAND_IMM_16_QI : | |
4815 | fields->f_dsp_16_s8 = value; | |
4816 | break; | |
4817 | case M32C_OPERAND_IMM_16_SI : | |
4818 | fields->f_dsp_16_s32 = value; | |
4819 | break; | |
4820 | case M32C_OPERAND_IMM_20_S4 : | |
4821 | fields->f_imm_20_s4 = value; | |
4822 | break; | |
4823 | case M32C_OPERAND_IMM_24_HI : | |
4824 | fields->f_dsp_24_s16 = value; | |
4825 | break; | |
4826 | case M32C_OPERAND_IMM_24_QI : | |
4827 | fields->f_dsp_24_s8 = value; | |
4828 | break; | |
4829 | case M32C_OPERAND_IMM_24_SI : | |
4830 | fields->f_dsp_24_s32 = value; | |
4831 | break; | |
4832 | case M32C_OPERAND_IMM_32_HI : | |
4833 | fields->f_dsp_32_s16 = value; | |
4834 | break; | |
4835 | case M32C_OPERAND_IMM_32_QI : | |
4836 | fields->f_dsp_32_s8 = value; | |
4837 | break; | |
4838 | case M32C_OPERAND_IMM_32_SI : | |
4839 | fields->f_dsp_32_s32 = value; | |
4840 | break; | |
4841 | case M32C_OPERAND_IMM_40_HI : | |
4842 | fields->f_dsp_40_s16 = value; | |
4843 | break; | |
4844 | case M32C_OPERAND_IMM_40_QI : | |
4845 | fields->f_dsp_40_s8 = value; | |
4846 | break; | |
4847 | case M32C_OPERAND_IMM_40_SI : | |
4848 | fields->f_dsp_40_s32 = value; | |
4849 | break; | |
4850 | case M32C_OPERAND_IMM_48_HI : | |
4851 | fields->f_dsp_48_s16 = value; | |
4852 | break; | |
4853 | case M32C_OPERAND_IMM_48_QI : | |
4854 | fields->f_dsp_48_s8 = value; | |
4855 | break; | |
4856 | case M32C_OPERAND_IMM_48_SI : | |
4857 | fields->f_dsp_48_s32 = value; | |
4858 | break; | |
4859 | case M32C_OPERAND_IMM_56_HI : | |
4860 | fields->f_dsp_56_s16 = value; | |
4861 | break; | |
4862 | case M32C_OPERAND_IMM_56_QI : | |
4863 | fields->f_dsp_56_s8 = value; | |
4864 | break; | |
4865 | case M32C_OPERAND_IMM_64_HI : | |
4866 | fields->f_dsp_64_s16 = value; | |
4867 | break; | |
4868 | case M32C_OPERAND_IMM_8_HI : | |
4869 | fields->f_dsp_8_s16 = value; | |
4870 | break; | |
4871 | case M32C_OPERAND_IMM_8_QI : | |
4872 | fields->f_dsp_8_s8 = value; | |
4873 | break; | |
4874 | case M32C_OPERAND_IMM_8_S4 : | |
4875 | fields->f_imm_8_s4 = value; | |
4876 | break; | |
4877 | case M32C_OPERAND_IMM_SH_12_S4 : | |
4878 | fields->f_imm_12_s4 = value; | |
4879 | break; | |
4880 | case M32C_OPERAND_IMM_SH_20_S4 : | |
4881 | fields->f_imm_20_s4 = value; | |
4882 | break; | |
4883 | case M32C_OPERAND_IMM_SH_8_S4 : | |
4884 | fields->f_imm_8_s4 = value; | |
4885 | break; | |
4886 | case M32C_OPERAND_IMM1_S : | |
4887 | fields->f_imm1_S = value; | |
4888 | break; | |
4889 | case M32C_OPERAND_IMM3_S : | |
4890 | fields->f_imm3_S = value; | |
4891 | break; | |
4892 | case M32C_OPERAND_LAB_16_8 : | |
4893 | fields->f_lab_16_8 = value; | |
4894 | break; | |
4895 | case M32C_OPERAND_LAB_24_8 : | |
4896 | fields->f_lab_24_8 = value; | |
4897 | break; | |
4898 | case M32C_OPERAND_LAB_32_8 : | |
4899 | fields->f_lab_32_8 = value; | |
4900 | break; | |
4901 | case M32C_OPERAND_LAB_40_8 : | |
4902 | fields->f_lab_40_8 = value; | |
4903 | break; | |
4904 | case M32C_OPERAND_LAB_5_3 : | |
4905 | fields->f_lab_5_3 = value; | |
4906 | break; | |
4907 | case M32C_OPERAND_LAB_8_16 : | |
4908 | fields->f_lab_8_16 = value; | |
4909 | break; | |
4910 | case M32C_OPERAND_LAB_8_24 : | |
4911 | fields->f_lab_8_24 = value; | |
4912 | break; | |
4913 | case M32C_OPERAND_LAB_8_8 : | |
4914 | fields->f_lab_8_8 = value; | |
4915 | break; | |
4916 | case M32C_OPERAND_LAB32_JMP_S : | |
4917 | fields->f_lab32_jmp_s = value; | |
4918 | break; | |
4919 | case M32C_OPERAND_Q : | |
4920 | break; | |
4921 | case M32C_OPERAND_R0 : | |
4922 | break; | |
4923 | case M32C_OPERAND_R0H : | |
4924 | break; | |
4925 | case M32C_OPERAND_R0L : | |
4926 | break; | |
4927 | case M32C_OPERAND_R1 : | |
4928 | break; | |
4929 | case M32C_OPERAND_R1R2R0 : | |
4930 | break; | |
4931 | case M32C_OPERAND_R2 : | |
4932 | break; | |
4933 | case M32C_OPERAND_R2R0 : | |
4934 | break; | |
4935 | case M32C_OPERAND_R3 : | |
4936 | break; | |
4937 | case M32C_OPERAND_R3R1 : | |
4938 | break; | |
4939 | case M32C_OPERAND_REGSETPOP : | |
4940 | fields->f_8_8 = value; | |
4941 | break; | |
4942 | case M32C_OPERAND_REGSETPUSH : | |
4943 | fields->f_8_8 = value; | |
4944 | break; | |
4945 | case M32C_OPERAND_RN16_PUSH_S : | |
4946 | fields->f_4_1 = value; | |
4947 | break; | |
4948 | case M32C_OPERAND_S : | |
4949 | break; | |
4950 | case M32C_OPERAND_SRC16AN : | |
4951 | fields->f_src16_an = value; | |
4952 | break; | |
4953 | case M32C_OPERAND_SRC16ANHI : | |
4954 | fields->f_src16_an = value; | |
4955 | break; | |
4956 | case M32C_OPERAND_SRC16ANQI : | |
4957 | fields->f_src16_an = value; | |
4958 | break; | |
4959 | case M32C_OPERAND_SRC16RNHI : | |
4960 | fields->f_src16_rn = value; | |
4961 | break; | |
4962 | case M32C_OPERAND_SRC16RNQI : | |
4963 | fields->f_src16_rn = value; | |
4964 | break; | |
4965 | case M32C_OPERAND_SRC32ANPREFIXED : | |
4966 | fields->f_src32_an_prefixed = value; | |
4967 | break; | |
4968 | case M32C_OPERAND_SRC32ANPREFIXEDHI : | |
4969 | fields->f_src32_an_prefixed = value; | |
4970 | break; | |
4971 | case M32C_OPERAND_SRC32ANPREFIXEDQI : | |
4972 | fields->f_src32_an_prefixed = value; | |
4973 | break; | |
4974 | case M32C_OPERAND_SRC32ANPREFIXEDSI : | |
4975 | fields->f_src32_an_prefixed = value; | |
4976 | break; | |
4977 | case M32C_OPERAND_SRC32ANUNPREFIXED : | |
4978 | fields->f_src32_an_unprefixed = value; | |
4979 | break; | |
4980 | case M32C_OPERAND_SRC32ANUNPREFIXEDHI : | |
4981 | fields->f_src32_an_unprefixed = value; | |
4982 | break; | |
4983 | case M32C_OPERAND_SRC32ANUNPREFIXEDQI : | |
4984 | fields->f_src32_an_unprefixed = value; | |
4985 | break; | |
4986 | case M32C_OPERAND_SRC32ANUNPREFIXEDSI : | |
4987 | fields->f_src32_an_unprefixed = value; | |
4988 | break; | |
4989 | case M32C_OPERAND_SRC32RNPREFIXEDHI : | |
4990 | fields->f_src32_rn_prefixed_HI = value; | |
4991 | break; | |
4992 | case M32C_OPERAND_SRC32RNPREFIXEDQI : | |
4993 | fields->f_src32_rn_prefixed_QI = value; | |
4994 | break; | |
4995 | case M32C_OPERAND_SRC32RNPREFIXEDSI : | |
4996 | fields->f_src32_rn_prefixed_SI = value; | |
4997 | break; | |
4998 | case M32C_OPERAND_SRC32RNUNPREFIXEDHI : | |
4999 | fields->f_src32_rn_unprefixed_HI = value; | |
5000 | break; | |
5001 | case M32C_OPERAND_SRC32RNUNPREFIXEDQI : | |
5002 | fields->f_src32_rn_unprefixed_QI = value; | |
5003 | break; | |
5004 | case M32C_OPERAND_SRC32RNUNPREFIXEDSI : | |
5005 | fields->f_src32_rn_unprefixed_SI = value; | |
5006 | break; | |
5007 | case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : | |
5008 | fields->f_5_1 = value; | |
5009 | break; | |
5010 | case M32C_OPERAND_X : | |
5011 | break; | |
5012 | case M32C_OPERAND_Z : | |
5013 | break; | |
5014 | case M32C_OPERAND_COND16_16 : | |
5015 | fields->f_dsp_16_u8 = value; | |
5016 | break; | |
5017 | case M32C_OPERAND_COND16_24 : | |
5018 | fields->f_dsp_24_u8 = value; | |
5019 | break; | |
5020 | case M32C_OPERAND_COND16_32 : | |
5021 | fields->f_dsp_32_u8 = value; | |
5022 | break; | |
5023 | case M32C_OPERAND_COND16C : | |
5024 | fields->f_cond16 = value; | |
5025 | break; | |
5026 | case M32C_OPERAND_COND16J : | |
5027 | fields->f_cond16 = value; | |
5028 | break; | |
5029 | case M32C_OPERAND_COND16J5 : | |
5030 | fields->f_cond16j_5 = value; | |
5031 | break; | |
5032 | case M32C_OPERAND_COND32 : | |
5033 | fields->f_cond32 = value; | |
5034 | break; | |
5035 | case M32C_OPERAND_COND32_16 : | |
5036 | fields->f_dsp_16_u8 = value; | |
5037 | break; | |
5038 | case M32C_OPERAND_COND32_24 : | |
5039 | fields->f_dsp_24_u8 = value; | |
5040 | break; | |
5041 | case M32C_OPERAND_COND32_32 : | |
5042 | fields->f_dsp_32_u8 = value; | |
5043 | break; | |
5044 | case M32C_OPERAND_COND32_40 : | |
5045 | fields->f_dsp_40_u8 = value; | |
5046 | break; | |
5047 | case M32C_OPERAND_COND32J : | |
5048 | fields->f_cond32j = value; | |
5049 | break; | |
5050 | case M32C_OPERAND_CR1_PREFIXED_32 : | |
5051 | fields->f_21_3 = value; | |
5052 | break; | |
5053 | case M32C_OPERAND_CR1_UNPREFIXED_32 : | |
5054 | fields->f_13_3 = value; | |
5055 | break; | |
5056 | case M32C_OPERAND_CR16 : | |
5057 | fields->f_9_3 = value; | |
5058 | break; | |
5059 | case M32C_OPERAND_CR2_32 : | |
5060 | fields->f_13_3 = value; | |
5061 | break; | |
5062 | case M32C_OPERAND_CR3_PREFIXED_32 : | |
5063 | fields->f_21_3 = value; | |
5064 | break; | |
5065 | case M32C_OPERAND_CR3_UNPREFIXED_32 : | |
5066 | fields->f_13_3 = value; | |
5067 | break; | |
5068 | case M32C_OPERAND_FLAGS16 : | |
5069 | fields->f_9_3 = value; | |
5070 | break; | |
5071 | case M32C_OPERAND_FLAGS32 : | |
5072 | fields->f_13_3 = value; | |
5073 | break; | |
5074 | case M32C_OPERAND_SCCOND32 : | |
5075 | fields->f_cond16 = value; | |
5076 | break; | |
5077 | case M32C_OPERAND_SIZE : | |
5078 | break; | |
5079 | ||
5080 | default : | |
5081 | /* xgettext:c-format */ | |
5082 | fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), | |
5083 | opindex); | |
5084 | abort (); | |
5085 | } | |
5086 | } | |
5087 | ||
5088 | /* Function to call before using the instruction builder tables. */ | |
5089 | ||
5090 | void | |
5091 | m32c_cgen_init_ibld_table (cd) | |
5092 | CGEN_CPU_DESC cd; | |
5093 | { | |
5094 | cd->insert_handlers = & m32c_cgen_insert_handlers[0]; | |
5095 | cd->extract_handlers = & m32c_cgen_extract_handlers[0]; | |
5096 | ||
5097 | cd->insert_operand = m32c_cgen_insert_operand; | |
5098 | cd->extract_operand = m32c_cgen_extract_operand; | |
5099 | ||
5100 | cd->get_int_operand = m32c_cgen_get_int_operand; | |
5101 | cd->set_int_operand = m32c_cgen_set_int_operand; | |
5102 | cd->get_vma_operand = m32c_cgen_get_vma_operand; | |
5103 | cd->set_vma_operand = m32c_cgen_set_vma_operand; | |
5104 | } |