bfd/
[deliverable/binutils-gdb.git] / opcodes / m32r-asm.c
CommitLineData
252b5132
RH
1/* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
47b0e7ad
NC
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
252b5132 6
47b0e7ad
NC
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
8 Free Software Foundation, Inc.
252b5132 9
47b0e7ad 10 This file is part of the GNU Binutils and GDB, the GNU debugger.
252b5132 11
47b0e7ad
NC
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
15 any later version.
252b5132 16
47b0e7ad
NC
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
252b5132 21
47b0e7ad
NC
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132
RH
25
26/* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29#include "sysdep.h"
252b5132
RH
30#include <stdio.h>
31#include "ansidecl.h"
32#include "bfd.h"
33#include "symcat.h"
34#include "m32r-desc.h"
35#include "m32r-opc.h"
36#include "opintl.h"
fc7bc883 37#include "xregex.h"
fc05c67f 38#include "libiberty.h"
37111cc7 39#include "safe-ctype.h"
252b5132 40
37111cc7 41#undef min
252b5132 42#define min(a,b) ((a) < (b) ? (a) : (b))
37111cc7 43#undef max
252b5132
RH
44#define max(a,b) ((a) > (b) ? (a) : (b))
45
0e2ee3ca 46static const char * parse_insn_normal
ffead7ae 47 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
252b5132 48\f
37111cc7 49/* -- assembler routines inserted here. */
252b5132
RH
50
51/* -- asm.c */
47b0e7ad 52static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'");
252b5132
RH
53
54/* Handle '#' prefixes (i.e. skip over them). */
55
56static const char *
47b0e7ad
NC
57parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
58 const char **strp,
59 int opindex ATTRIBUTE_UNUSED,
60 long *valuep ATTRIBUTE_UNUSED)
252b5132
RH
61{
62 if (**strp == '#')
63 ++*strp;
64 return NULL;
65}
66
67/* Handle shigh(), high(). */
68
69static const char *
47b0e7ad
NC
70parse_hi16 (CGEN_CPU_DESC cd,
71 const char **strp,
72 int opindex,
73 unsigned long *valuep)
252b5132
RH
74{
75 const char *errmsg;
76 enum cgen_parse_operand_result result_type;
77 bfd_vma value;
78
79 if (**strp == '#')
80 ++*strp;
81
82 if (strncasecmp (*strp, "high(", 5) == 0)
83 {
84 *strp += 5;
85 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
47b0e7ad 86 & result_type, & value);
252b5132 87 if (**strp != ')')
47b0e7ad 88 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
89 ++*strp;
90 if (errmsg == NULL
1620f33d 91 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
e277c00b
AM
92 {
93 value >>= 16;
94 value &= 0xffff;
95 }
252b5132
RH
96 *valuep = value;
97 return errmsg;
98 }
99 else if (strncasecmp (*strp, "shigh(", 6) == 0)
100 {
101 *strp += 6;
102 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
1620f33d 103 & result_type, & value);
252b5132 104 if (**strp != ')')
47b0e7ad 105 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
106 ++*strp;
107 if (errmsg == NULL
108 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
1620f33d
AM
109 {
110 value += 0x8000;
111 value >>= 16;
e277c00b 112 value &= 0xffff;
1620f33d 113 }
252b5132
RH
114 *valuep = value;
115 return errmsg;
116 }
117
118 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
119}
120
121/* Handle low() in a signed context. Also handle sda().
122 The signedness of the value doesn't matter to low(), but this also
123 handles the case where low() isn't present. */
124
125static const char *
d125c27b
AM
126parse_slo16 (CGEN_CPU_DESC cd,
127 const char ** strp,
128 int opindex,
129 long * valuep)
252b5132
RH
130{
131 const char *errmsg;
132 enum cgen_parse_operand_result result_type;
133 bfd_vma value;
134
135 if (**strp == '#')
136 ++*strp;
137
138 if (strncasecmp (*strp, "low(", 4) == 0)
139 {
140 *strp += 4;
141 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
47b0e7ad 142 & result_type, & value);
252b5132 143 if (**strp != ')')
47b0e7ad 144 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
145 ++*strp;
146 if (errmsg == NULL
147 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
1620f33d 148 value = ((value & 0xffff) ^ 0x8000) - 0x8000;
252b5132
RH
149 *valuep = value;
150 return errmsg;
151 }
152
153 if (strncasecmp (*strp, "sda(", 4) == 0)
154 {
155 *strp += 4;
156 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
47b0e7ad 157 NULL, & value);
252b5132 158 if (**strp != ')')
47b0e7ad 159 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
160 ++*strp;
161 *valuep = value;
162 return errmsg;
163 }
164
165 return cgen_parse_signed_integer (cd, strp, opindex, valuep);
166}
167
168/* Handle low() in an unsigned context.
169 The signedness of the value doesn't matter to low(), but this also
170 handles the case where low() isn't present. */
171
172static const char *
47b0e7ad
NC
173parse_ulo16 (CGEN_CPU_DESC cd,
174 const char **strp,
175 int opindex,
176 unsigned long *valuep)
252b5132
RH
177{
178 const char *errmsg;
179 enum cgen_parse_operand_result result_type;
180 bfd_vma value;
181
182 if (**strp == '#')
183 ++*strp;
184
185 if (strncasecmp (*strp, "low(", 4) == 0)
186 {
187 *strp += 4;
188 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
47b0e7ad 189 & result_type, & value);
252b5132 190 if (**strp != ')')
47b0e7ad 191 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
192 ++*strp;
193 if (errmsg == NULL
194 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
195 value &= 0xffff;
196 *valuep = value;
197 return errmsg;
198 }
199
200 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
201}
202
203/* -- */
204
0e2ee3ca 205const char * m32r_cgen_parse_operand
47b0e7ad 206 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
0e2ee3ca 207
252b5132
RH
208/* Main entry point for operand parsing.
209
210 This function is basically just a big switch statement. Earlier versions
211 used tables to look up the function to use, but
212 - if the table contains both assembler and disassembler functions then
213 the disassembler contains much of the assembler and vice-versa,
214 - there's a lot of inlining possibilities as things grow,
215 - using a switch statement avoids the function call overhead.
216
217 This function could be moved into `parse_insn_normal', but keeping it
218 separate makes clear the interface between `parse_insn_normal' and each of
9a2e995d 219 the handlers. */
252b5132
RH
220
221const char *
47b0e7ad
NC
222m32r_cgen_parse_operand (CGEN_CPU_DESC cd,
223 int opindex,
224 const char ** strp,
225 CGEN_FIELDS * fields)
252b5132 226{
eb1b03df
DE
227 const char * errmsg = NULL;
228 /* Used by scalar operands that still need to be parsed. */
0e2ee3ca 229 long junk ATTRIBUTE_UNUSED;
252b5132
RH
230
231 switch (opindex)
232 {
1fa60b5d
DE
233 case M32R_OPERAND_ACC :
234 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
235 break;
236 case M32R_OPERAND_ACCD :
237 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
238 break;
239 case M32R_OPERAND_ACCS :
240 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
241 break;
252b5132
RH
242 case M32R_OPERAND_DCR :
243 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1);
244 break;
245 case M32R_OPERAND_DISP16 :
246 {
9494d739 247 bfd_vma value = 0;
252b5132
RH
248 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value);
249 fields->f_disp16 = value;
250 }
251 break;
252 case M32R_OPERAND_DISP24 :
253 {
9494d739 254 bfd_vma value = 0;
252b5132
RH
255 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value);
256 fields->f_disp24 = value;
257 }
258 break;
259 case M32R_OPERAND_DISP8 :
260 {
9494d739 261 bfd_vma value = 0;
252b5132
RH
262 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value);
263 fields->f_disp8 = value;
264 }
265 break;
266 case M32R_OPERAND_DR :
267 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
268 break;
269 case M32R_OPERAND_HASH :
33b71eeb 270 errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, (long *) (& junk));
252b5132
RH
271 break;
272 case M32R_OPERAND_HI16 :
33b71eeb 273 errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, (unsigned long *) (& fields->f_hi16));
252b5132 274 break;
1fa60b5d 275 case M32R_OPERAND_IMM1 :
33b71eeb 276 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, (unsigned long *) (& fields->f_imm1));
1fa60b5d 277 break;
252b5132
RH
278 case M32R_OPERAND_SCR :
279 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2);
280 break;
281 case M32R_OPERAND_SIMM16 :
33b71eeb 282 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, (long *) (& fields->f_simm16));
252b5132
RH
283 break;
284 case M32R_OPERAND_SIMM8 :
33b71eeb 285 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, (long *) (& fields->f_simm8));
252b5132
RH
286 break;
287 case M32R_OPERAND_SLO16 :
33b71eeb 288 errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, (long *) (& fields->f_simm16));
252b5132
RH
289 break;
290 case M32R_OPERAND_SR :
291 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
292 break;
293 case M32R_OPERAND_SRC1 :
294 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
295 break;
296 case M32R_OPERAND_SRC2 :
297 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
298 break;
299 case M32R_OPERAND_UIMM16 :
33b71eeb 300 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, (unsigned long *) (& fields->f_uimm16));
252b5132
RH
301 break;
302 case M32R_OPERAND_UIMM24 :
303 {
9494d739 304 bfd_vma value = 0;
252b5132
RH
305 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL, & value);
306 fields->f_uimm24 = value;
307 }
308 break;
88845958 309 case M32R_OPERAND_UIMM3 :
33b71eeb 310 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM3, (unsigned long *) (& fields->f_uimm3));
88845958 311 break;
252b5132 312 case M32R_OPERAND_UIMM4 :
33b71eeb 313 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, (unsigned long *) (& fields->f_uimm4));
252b5132
RH
314 break;
315 case M32R_OPERAND_UIMM5 :
33b71eeb 316 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, (unsigned long *) (& fields->f_uimm5));
252b5132 317 break;
88845958 318 case M32R_OPERAND_UIMM8 :
33b71eeb 319 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM8, (unsigned long *) (& fields->f_uimm8));
88845958 320 break;
252b5132 321 case M32R_OPERAND_ULO16 :
33b71eeb 322 errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, (unsigned long *) (& fields->f_uimm16));
252b5132
RH
323 break;
324
325 default :
326 /* xgettext:c-format */
327 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
328 abort ();
329 }
330
331 return errmsg;
332}
333
334cgen_parse_fn * const m32r_cgen_parse_handlers[] =
335{
336 parse_insn_normal,
337};
338
339void
47b0e7ad 340m32r_cgen_init_asm (CGEN_CPU_DESC cd)
252b5132
RH
341{
342 m32r_cgen_init_opcode_table (cd);
343 m32r_cgen_init_ibld_table (cd);
344 cd->parse_handlers = & m32r_cgen_parse_handlers[0];
345 cd->parse_operand = m32r_cgen_parse_operand;
1620f33d
AM
346#ifdef CGEN_ASM_INIT_HOOK
347CGEN_ASM_INIT_HOOK
348#endif
252b5132
RH
349}
350
fc7bc883
RH
351\f
352
37111cc7 353/* Regex construction routine.
fc7bc883 354
37111cc7
NC
355 This translates an opcode syntax string into a regex string,
356 by replacing any non-character syntax element (such as an
357 opcode) with the pattern '.*'
fc7bc883 358
37111cc7
NC
359 It then compiles the regex and stores it in the opcode, for
360 later use by m32r_cgen_assemble_insn
fc7bc883 361
37111cc7 362 Returns NULL for success, an error message for failure. */
fc7bc883
RH
363
364char *
ffead7ae 365m32r_cgen_build_insn_regex (CGEN_INSN *insn)
fc7bc883 366{
fc05c67f 367 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
fc7bc883 368 const char *mnem = CGEN_INSN_MNEMONIC (insn);
fc7bc883
RH
369 char rxbuf[CGEN_MAX_RX_ELEMENTS];
370 char *rx = rxbuf;
371 const CGEN_SYNTAX_CHAR_TYPE *syn;
372 int reg_err;
373
374 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
375
f3a55c17
NC
376 /* Mnemonics come first in the syntax string. */
377 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
378 return _("missing mnemonic in syntax string");
fc7bc883
RH
379 ++syn;
380
f3a55c17
NC
381 /* Generate a case sensitive regular expression that emulates case
382 insensitive matching in the "C" locale. We cannot generate a case
383 insensitive regular expression because in Turkish locales, 'i' and 'I'
384 are not equal modulo case conversion. */
fc7bc883 385
f3a55c17
NC
386 /* Copy the literal mnemonic out of the insn. */
387 for (; *mnem; mnem++)
388 {
389 char c = *mnem;
390
391 if (ISALPHA (c))
392 {
393 *rx++ = '[';
394 *rx++ = TOLOWER (c);
395 *rx++ = TOUPPER (c);
396 *rx++ = ']';
397 }
398 else
399 *rx++ = c;
400 }
401
402 /* Copy any remaining literals from the syntax string into the rx. */
403 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
fc7bc883
RH
404 {
405 if (CGEN_SYNTAX_CHAR_P (* syn))
406 {
f3a55c17
NC
407 char c = CGEN_SYNTAX_CHAR (* syn);
408
409 switch (c)
410 {
411 /* Escape any regex metacharacters in the syntax. */
412 case '.': case '[': case '\\':
413 case '*': case '^': case '$':
fc7bc883
RH
414
415#ifdef CGEN_ESCAPE_EXTENDED_REGEX
f3a55c17
NC
416 case '?': case '{': case '}':
417 case '(': case ')': case '*':
418 case '|': case '+': case ']':
fc7bc883 419#endif
f3a55c17
NC
420 *rx++ = '\\';
421 *rx++ = c;
422 break;
423
424 default:
425 if (ISALPHA (c))
426 {
427 *rx++ = '[';
428 *rx++ = TOLOWER (c);
429 *rx++ = TOUPPER (c);
430 *rx++ = ']';
431 }
432 else
433 *rx++ = c;
434 break;
435 }
fc7bc883
RH
436 }
437 else
438 {
f3a55c17
NC
439 /* Replace non-syntax fields with globs. */
440 *rx++ = '.';
441 *rx++ = '*';
fc7bc883
RH
442 }
443 }
444
f3a55c17 445 /* Trailing whitespace ok. */
fc7bc883
RH
446 * rx++ = '[';
447 * rx++ = ' ';
448 * rx++ = '\t';
449 * rx++ = ']';
450 * rx++ = '*';
451
f3a55c17 452 /* But anchor it after that. */
fc7bc883
RH
453 * rx++ = '$';
454 * rx = '\0';
455
456 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
f3a55c17 457 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
fc7bc883
RH
458
459 if (reg_err == 0)
460 return NULL;
461 else
462 {
463 static char msg[80];
f3a55c17 464
fc7bc883
RH
465 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
466 regfree ((regex_t *) CGEN_INSN_RX (insn));
467 free (CGEN_INSN_RX (insn));
468 (CGEN_INSN_RX (insn)) = NULL;
37111cc7 469 return msg;
fc7bc883
RH
470 }
471}
472
252b5132
RH
473\f
474/* Default insn parser.
475
476 The syntax string is scanned and operands are parsed and stored in FIELDS.
477 Relocs are queued as we go via other callbacks.
478
479 ??? Note that this is currently an all-or-nothing parser. If we fail to
480 parse the instruction, we return 0 and the caller will start over from
481 the beginning. Backtracking will be necessary in parsing subexpressions,
482 but that can be handled there. Not handling backtracking here may get
483 expensive in the case of the m68k. Deal with later.
484
f3a55c17 485 Returns NULL for success, an error message for failure. */
252b5132
RH
486
487static const char *
ffead7ae
MM
488parse_insn_normal (CGEN_CPU_DESC cd,
489 const CGEN_INSN *insn,
490 const char **strp,
491 CGEN_FIELDS *fields)
252b5132
RH
492{
493 /* ??? Runtime added insns not handled yet. */
494 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
495 const char *str = *strp;
496 const char *errmsg;
497 const char *p;
b3466c39 498 const CGEN_SYNTAX_CHAR_TYPE * syn;
252b5132
RH
499#ifdef CGEN_MNEMONIC_OPERANDS
500 /* FIXME: wip */
501 int past_opcode_p;
502#endif
503
504 /* For now we assume the mnemonic is first (there are no leading operands).
505 We can parse it without needing to set up operand parsing.
506 GAS's input scrubber will ensure mnemonics are lowercase, but we may
507 not be called from GAS. */
508 p = CGEN_INSN_MNEMONIC (insn);
37111cc7 509 while (*p && TOLOWER (*p) == TOLOWER (*str))
252b5132 510 ++p, ++str;
1fa60b5d
DE
511
512 if (* p)
513 return _("unrecognized instruction");
514
515#ifndef CGEN_MNEMONIC_OPERANDS
37111cc7 516 if (* str && ! ISSPACE (* str))
252b5132 517 return _("unrecognized instruction");
1fa60b5d 518#endif
252b5132
RH
519
520 CGEN_INIT_PARSE (cd);
521 cgen_init_parse_operand (cd);
522#ifdef CGEN_MNEMONIC_OPERANDS
523 past_opcode_p = 0;
524#endif
525
526 /* We don't check for (*str != '\0') here because we want to parse
527 any trailing fake arguments in the syntax string. */
528 syn = CGEN_SYNTAX_STRING (syntax);
529
530 /* Mnemonics come first for now, ensure valid string. */
531 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
532 abort ();
533
534 ++syn;
535
536 while (* syn != 0)
537 {
538 /* Non operand chars must match exactly. */
539 if (CGEN_SYNTAX_CHAR_P (* syn))
540 {
1fa60b5d
DE
541 /* FIXME: While we allow for non-GAS callers above, we assume the
542 first char after the mnemonic part is a space. */
543 /* FIXME: We also take inappropriate advantage of the fact that
544 GAS's input scrubber will remove extraneous blanks. */
37111cc7 545 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
252b5132
RH
546 {
547#ifdef CGEN_MNEMONIC_OPERANDS
b3466c39 548 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
252b5132
RH
549 past_opcode_p = 1;
550#endif
551 ++ syn;
552 ++ str;
553 }
b3466c39 554 else if (*str)
252b5132
RH
555 {
556 /* Syntax char didn't match. Can't be this insn. */
6bb95a0f 557 static char msg [80];
f3a55c17 558
6bb95a0f
DB
559 /* xgettext:c-format */
560 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
b3466c39
DB
561 CGEN_SYNTAX_CHAR(*syn), *str);
562 return msg;
563 }
564 else
565 {
566 /* Ran out of input. */
567 static char msg [80];
f3a55c17 568
b3466c39
DB
569 /* xgettext:c-format */
570 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
571 CGEN_SYNTAX_CHAR(*syn));
6bb95a0f 572 return msg;
252b5132
RH
573 }
574 continue;
575 }
576
577 /* We have an operand of some sort. */
a978a3e5 578 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
252b5132
RH
579 &str, fields);
580 if (errmsg)
581 return errmsg;
582
583 /* Done with this operand, continue with next one. */
584 ++ syn;
585 }
586
587 /* If we're at the end of the syntax string, we're done. */
b3466c39 588 if (* syn == 0)
252b5132
RH
589 {
590 /* FIXME: For the moment we assume a valid `str' can only contain
591 blanks now. IE: We needn't try again with a longer version of
592 the insn and it is assumed that longer versions of insns appear
593 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
37111cc7 594 while (ISSPACE (* str))
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RH
595 ++ str;
596
597 if (* str != '\0')
598 return _("junk at end of line"); /* FIXME: would like to include `str' */
599
600 return NULL;
601 }
602
603 /* We couldn't parse it. */
604 return _("unrecognized instruction");
605}
606\f
607/* Main entry point.
608 This routine is called for each instruction to be assembled.
609 STR points to the insn to be assembled.
610 We assume all necessary tables have been initialized.
611 The assembled instruction, less any fixups, is stored in BUF.
612 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
613 still needs to be converted to target byte order, otherwise BUF is an array
614 of bytes in target byte order.
615 The result is a pointer to the insn's entry in the opcode table,
616 or NULL if an error occured (an error message will have already been
617 printed).
618
619 Note that when processing (non-alias) macro-insns,
620 this function recurses.
621
622 ??? It's possible to make this cpu-independent.
623 One would have to deal with a few minor things.
624 At this point in time doing so would be more of a curiosity than useful
625 [for example this file isn't _that_ big], but keeping the possibility in
626 mind helps keep the design clean. */
627
628const CGEN_INSN *
ffead7ae
MM
629m32r_cgen_assemble_insn (CGEN_CPU_DESC cd,
630 const char *str,
631 CGEN_FIELDS *fields,
632 CGEN_INSN_BYTES_PTR buf,
633 char **errmsg)
252b5132
RH
634{
635 const char *start;
636 CGEN_INSN_LIST *ilist;
b3466c39
DB
637 const char *parse_errmsg = NULL;
638 const char *insert_errmsg = NULL;
fc7bc883 639 int recognized_mnemonic = 0;
252b5132
RH
640
641 /* Skip leading white space. */
37111cc7 642 while (ISSPACE (* str))
252b5132
RH
643 ++ str;
644
645 /* The instructions are stored in hashed lists.
646 Get the first in the list. */
647 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
648
649 /* Keep looking until we find a match. */
252b5132
RH
650 start = str;
651 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
652 {
653 const CGEN_INSN *insn = ilist->insn;
fc7bc883 654 recognized_mnemonic = 1;
252b5132 655
cfcdbe97 656#ifdef CGEN_VALIDATE_INSN_SUPPORTED
f3a55c17
NC
657 /* Not usually needed as unsupported opcodes
658 shouldn't be in the hash lists. */
252b5132
RH
659 /* Is this insn supported by the selected cpu? */
660 if (! m32r_cgen_insn_supported (cd, insn))
661 continue;
662#endif
b11dcf4e 663 /* If the RELAXED attribute is set, this is an insn that shouldn't be
252b5132
RH
664 chosen immediately. Instead, it is used during assembler/linker
665 relaxation if possible. */
b11dcf4e 666 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
252b5132
RH
667 continue;
668
669 str = start;
670
f3a55c17 671 /* Skip this insn if str doesn't look right lexically. */
fc7bc883
RH
672 if (CGEN_INSN_RX (insn) != NULL &&
673 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
674 continue;
675
252b5132
RH
676 /* Allow parse/insert handlers to obtain length of insn. */
677 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
678
b3466c39
DB
679 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
680 if (parse_errmsg != NULL)
6bb95a0f 681 continue;
252b5132 682
f3a55c17 683 /* ??? 0 is passed for `pc'. */
b3466c39
DB
684 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
685 (bfd_vma) 0);
686 if (insert_errmsg != NULL)
6bb95a0f
DB
687 continue;
688
689 /* It is up to the caller to actually output the insn and any
690 queued relocs. */
691 return insn;
252b5132
RH
692 }
693
252b5132 694 {
cfcdbe97 695 static char errbuf[150];
52646233 696#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
b3466c39 697 const char *tmp_errmsg;
cfcdbe97 698
b3466c39 699 /* If requesting verbose error messages, use insert_errmsg.
f3a55c17 700 Failing that, use parse_errmsg. */
b3466c39
DB
701 tmp_errmsg = (insert_errmsg ? insert_errmsg :
702 parse_errmsg ? parse_errmsg :
f3a55c17
NC
703 recognized_mnemonic ?
704 _("unrecognized form of instruction") :
b3466c39
DB
705 _("unrecognized instruction"));
706
cfcdbe97
AH
707 if (strlen (start) > 50)
708 /* xgettext:c-format */
709 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
710 else
711 /* xgettext:c-format */
712 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
713#else
252b5132
RH
714 if (strlen (start) > 50)
715 /* xgettext:c-format */
716 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
717 else
718 /* xgettext:c-format */
719 sprintf (errbuf, _("bad instruction `%.50s'"), start);
cfcdbe97 720#endif
252b5132
RH
721
722 *errmsg = errbuf;
723 return NULL;
724 }
725}
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