* dwarf2loc.c (dwarf_expr_frame_base): Error out on missing
[deliverable/binutils-gdb.git] / opcodes / m32r-asm.c
CommitLineData
252b5132
RH
1/* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
47b0e7ad
NC
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
252b5132 6
9b201bb5 7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2007
47b0e7ad 8 Free Software Foundation, Inc.
252b5132 9
9b201bb5 10 This file is part of libopcodes.
252b5132 11
9b201bb5 12 This library is free software; you can redistribute it and/or modify
47b0e7ad 13 it under the terms of the GNU General Public License as published by
9b201bb5 14 the Free Software Foundation; either version 3, or (at your option)
47b0e7ad 15 any later version.
252b5132 16
9b201bb5
NC
17 It is distributed in the hope that it will be useful, but WITHOUT
18 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
19 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
20 License for more details.
252b5132 21
47b0e7ad
NC
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132 25
9b201bb5 26
252b5132
RH
27/* ??? Eventually more and more of this stuff can go to cpu-independent files.
28 Keep that in mind. */
29
30#include "sysdep.h"
252b5132
RH
31#include <stdio.h>
32#include "ansidecl.h"
33#include "bfd.h"
34#include "symcat.h"
35#include "m32r-desc.h"
36#include "m32r-opc.h"
37#include "opintl.h"
fc7bc883 38#include "xregex.h"
fc05c67f 39#include "libiberty.h"
37111cc7 40#include "safe-ctype.h"
252b5132 41
37111cc7 42#undef min
252b5132 43#define min(a,b) ((a) < (b) ? (a) : (b))
37111cc7 44#undef max
252b5132
RH
45#define max(a,b) ((a) > (b) ? (a) : (b))
46
0e2ee3ca 47static const char * parse_insn_normal
ffead7ae 48 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
252b5132 49\f
37111cc7 50/* -- assembler routines inserted here. */
252b5132
RH
51
52/* -- asm.c */
47b0e7ad 53static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'");
252b5132
RH
54
55/* Handle '#' prefixes (i.e. skip over them). */
56
57static const char *
47b0e7ad
NC
58parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
59 const char **strp,
60 int opindex ATTRIBUTE_UNUSED,
61 long *valuep ATTRIBUTE_UNUSED)
252b5132
RH
62{
63 if (**strp == '#')
64 ++*strp;
65 return NULL;
66}
67
68/* Handle shigh(), high(). */
69
70static const char *
47b0e7ad
NC
71parse_hi16 (CGEN_CPU_DESC cd,
72 const char **strp,
73 int opindex,
74 unsigned long *valuep)
252b5132
RH
75{
76 const char *errmsg;
77 enum cgen_parse_operand_result result_type;
78 bfd_vma value;
79
80 if (**strp == '#')
81 ++*strp;
82
83 if (strncasecmp (*strp, "high(", 5) == 0)
84 {
85 *strp += 5;
86 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
47b0e7ad 87 & result_type, & value);
252b5132 88 if (**strp != ')')
47b0e7ad 89 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
90 ++*strp;
91 if (errmsg == NULL
1620f33d 92 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
e277c00b
AM
93 {
94 value >>= 16;
95 value &= 0xffff;
96 }
252b5132
RH
97 *valuep = value;
98 return errmsg;
99 }
100 else if (strncasecmp (*strp, "shigh(", 6) == 0)
101 {
102 *strp += 6;
103 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
1620f33d 104 & result_type, & value);
252b5132 105 if (**strp != ')')
47b0e7ad 106 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
107 ++*strp;
108 if (errmsg == NULL
109 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
1620f33d
AM
110 {
111 value += 0x8000;
112 value >>= 16;
e277c00b 113 value &= 0xffff;
1620f33d 114 }
252b5132
RH
115 *valuep = value;
116 return errmsg;
117 }
118
119 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
120}
121
122/* Handle low() in a signed context. Also handle sda().
123 The signedness of the value doesn't matter to low(), but this also
124 handles the case where low() isn't present. */
125
126static const char *
d125c27b
AM
127parse_slo16 (CGEN_CPU_DESC cd,
128 const char ** strp,
129 int opindex,
130 long * valuep)
252b5132
RH
131{
132 const char *errmsg;
133 enum cgen_parse_operand_result result_type;
134 bfd_vma value;
135
136 if (**strp == '#')
137 ++*strp;
138
139 if (strncasecmp (*strp, "low(", 4) == 0)
140 {
141 *strp += 4;
142 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
47b0e7ad 143 & result_type, & value);
252b5132 144 if (**strp != ')')
47b0e7ad 145 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
146 ++*strp;
147 if (errmsg == NULL
148 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
1620f33d 149 value = ((value & 0xffff) ^ 0x8000) - 0x8000;
252b5132
RH
150 *valuep = value;
151 return errmsg;
152 }
153
154 if (strncasecmp (*strp, "sda(", 4) == 0)
155 {
156 *strp += 4;
157 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
47b0e7ad 158 NULL, & value);
252b5132 159 if (**strp != ')')
47b0e7ad 160 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
161 ++*strp;
162 *valuep = value;
163 return errmsg;
164 }
165
166 return cgen_parse_signed_integer (cd, strp, opindex, valuep);
167}
168
169/* Handle low() in an unsigned context.
170 The signedness of the value doesn't matter to low(), but this also
171 handles the case where low() isn't present. */
172
173static const char *
47b0e7ad
NC
174parse_ulo16 (CGEN_CPU_DESC cd,
175 const char **strp,
176 int opindex,
177 unsigned long *valuep)
252b5132
RH
178{
179 const char *errmsg;
180 enum cgen_parse_operand_result result_type;
181 bfd_vma value;
182
183 if (**strp == '#')
184 ++*strp;
185
186 if (strncasecmp (*strp, "low(", 4) == 0)
187 {
188 *strp += 4;
189 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
47b0e7ad 190 & result_type, & value);
252b5132 191 if (**strp != ')')
47b0e7ad 192 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
193 ++*strp;
194 if (errmsg == NULL
195 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
196 value &= 0xffff;
197 *valuep = value;
198 return errmsg;
199 }
200
201 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
202}
203
204/* -- */
205
0e2ee3ca 206const char * m32r_cgen_parse_operand
47b0e7ad 207 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
0e2ee3ca 208
252b5132
RH
209/* Main entry point for operand parsing.
210
211 This function is basically just a big switch statement. Earlier versions
212 used tables to look up the function to use, but
213 - if the table contains both assembler and disassembler functions then
214 the disassembler contains much of the assembler and vice-versa,
215 - there's a lot of inlining possibilities as things grow,
216 - using a switch statement avoids the function call overhead.
217
218 This function could be moved into `parse_insn_normal', but keeping it
219 separate makes clear the interface between `parse_insn_normal' and each of
9a2e995d 220 the handlers. */
252b5132
RH
221
222const char *
47b0e7ad
NC
223m32r_cgen_parse_operand (CGEN_CPU_DESC cd,
224 int opindex,
225 const char ** strp,
226 CGEN_FIELDS * fields)
252b5132 227{
eb1b03df
DE
228 const char * errmsg = NULL;
229 /* Used by scalar operands that still need to be parsed. */
0e2ee3ca 230 long junk ATTRIBUTE_UNUSED;
252b5132
RH
231
232 switch (opindex)
233 {
1fa60b5d
DE
234 case M32R_OPERAND_ACC :
235 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
236 break;
237 case M32R_OPERAND_ACCD :
238 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
239 break;
240 case M32R_OPERAND_ACCS :
241 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
242 break;
252b5132
RH
243 case M32R_OPERAND_DCR :
244 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1);
245 break;
246 case M32R_OPERAND_DISP16 :
247 {
9494d739 248 bfd_vma value = 0;
252b5132
RH
249 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value);
250 fields->f_disp16 = value;
251 }
252 break;
253 case M32R_OPERAND_DISP24 :
254 {
9494d739 255 bfd_vma value = 0;
252b5132
RH
256 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value);
257 fields->f_disp24 = value;
258 }
259 break;
260 case M32R_OPERAND_DISP8 :
261 {
9494d739 262 bfd_vma value = 0;
252b5132
RH
263 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value);
264 fields->f_disp8 = value;
265 }
266 break;
267 case M32R_OPERAND_DR :
268 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
269 break;
270 case M32R_OPERAND_HASH :
33b71eeb 271 errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, (long *) (& junk));
252b5132
RH
272 break;
273 case M32R_OPERAND_HI16 :
33b71eeb 274 errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, (unsigned long *) (& fields->f_hi16));
252b5132 275 break;
1fa60b5d 276 case M32R_OPERAND_IMM1 :
33b71eeb 277 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, (unsigned long *) (& fields->f_imm1));
1fa60b5d 278 break;
252b5132
RH
279 case M32R_OPERAND_SCR :
280 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2);
281 break;
282 case M32R_OPERAND_SIMM16 :
33b71eeb 283 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, (long *) (& fields->f_simm16));
252b5132
RH
284 break;
285 case M32R_OPERAND_SIMM8 :
33b71eeb 286 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, (long *) (& fields->f_simm8));
252b5132
RH
287 break;
288 case M32R_OPERAND_SLO16 :
33b71eeb 289 errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, (long *) (& fields->f_simm16));
252b5132
RH
290 break;
291 case M32R_OPERAND_SR :
292 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
293 break;
294 case M32R_OPERAND_SRC1 :
295 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
296 break;
297 case M32R_OPERAND_SRC2 :
298 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
299 break;
300 case M32R_OPERAND_UIMM16 :
33b71eeb 301 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, (unsigned long *) (& fields->f_uimm16));
252b5132
RH
302 break;
303 case M32R_OPERAND_UIMM24 :
304 {
9494d739 305 bfd_vma value = 0;
252b5132
RH
306 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL, & value);
307 fields->f_uimm24 = value;
308 }
309 break;
88845958 310 case M32R_OPERAND_UIMM3 :
33b71eeb 311 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM3, (unsigned long *) (& fields->f_uimm3));
88845958 312 break;
252b5132 313 case M32R_OPERAND_UIMM4 :
33b71eeb 314 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, (unsigned long *) (& fields->f_uimm4));
252b5132
RH
315 break;
316 case M32R_OPERAND_UIMM5 :
33b71eeb 317 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, (unsigned long *) (& fields->f_uimm5));
252b5132 318 break;
88845958 319 case M32R_OPERAND_UIMM8 :
33b71eeb 320 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM8, (unsigned long *) (& fields->f_uimm8));
88845958 321 break;
252b5132 322 case M32R_OPERAND_ULO16 :
33b71eeb 323 errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, (unsigned long *) (& fields->f_uimm16));
252b5132
RH
324 break;
325
326 default :
327 /* xgettext:c-format */
328 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
329 abort ();
330 }
331
332 return errmsg;
333}
334
335cgen_parse_fn * const m32r_cgen_parse_handlers[] =
336{
337 parse_insn_normal,
338};
339
340void
47b0e7ad 341m32r_cgen_init_asm (CGEN_CPU_DESC cd)
252b5132
RH
342{
343 m32r_cgen_init_opcode_table (cd);
344 m32r_cgen_init_ibld_table (cd);
345 cd->parse_handlers = & m32r_cgen_parse_handlers[0];
346 cd->parse_operand = m32r_cgen_parse_operand;
1620f33d
AM
347#ifdef CGEN_ASM_INIT_HOOK
348CGEN_ASM_INIT_HOOK
349#endif
252b5132
RH
350}
351
fc7bc883
RH
352\f
353
37111cc7 354/* Regex construction routine.
fc7bc883 355
37111cc7
NC
356 This translates an opcode syntax string into a regex string,
357 by replacing any non-character syntax element (such as an
358 opcode) with the pattern '.*'
fc7bc883 359
37111cc7
NC
360 It then compiles the regex and stores it in the opcode, for
361 later use by m32r_cgen_assemble_insn
fc7bc883 362
37111cc7 363 Returns NULL for success, an error message for failure. */
fc7bc883
RH
364
365char *
ffead7ae 366m32r_cgen_build_insn_regex (CGEN_INSN *insn)
fc7bc883 367{
fc05c67f 368 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
fc7bc883 369 const char *mnem = CGEN_INSN_MNEMONIC (insn);
fc7bc883
RH
370 char rxbuf[CGEN_MAX_RX_ELEMENTS];
371 char *rx = rxbuf;
372 const CGEN_SYNTAX_CHAR_TYPE *syn;
373 int reg_err;
374
375 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
376
f3a55c17
NC
377 /* Mnemonics come first in the syntax string. */
378 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
379 return _("missing mnemonic in syntax string");
fc7bc883
RH
380 ++syn;
381
f3a55c17
NC
382 /* Generate a case sensitive regular expression that emulates case
383 insensitive matching in the "C" locale. We cannot generate a case
384 insensitive regular expression because in Turkish locales, 'i' and 'I'
385 are not equal modulo case conversion. */
fc7bc883 386
f3a55c17
NC
387 /* Copy the literal mnemonic out of the insn. */
388 for (; *mnem; mnem++)
389 {
390 char c = *mnem;
391
392 if (ISALPHA (c))
393 {
394 *rx++ = '[';
395 *rx++ = TOLOWER (c);
396 *rx++ = TOUPPER (c);
397 *rx++ = ']';
398 }
399 else
400 *rx++ = c;
401 }
402
403 /* Copy any remaining literals from the syntax string into the rx. */
404 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
fc7bc883
RH
405 {
406 if (CGEN_SYNTAX_CHAR_P (* syn))
407 {
f3a55c17
NC
408 char c = CGEN_SYNTAX_CHAR (* syn);
409
410 switch (c)
411 {
412 /* Escape any regex metacharacters in the syntax. */
413 case '.': case '[': case '\\':
414 case '*': case '^': case '$':
fc7bc883
RH
415
416#ifdef CGEN_ESCAPE_EXTENDED_REGEX
f3a55c17
NC
417 case '?': case '{': case '}':
418 case '(': case ')': case '*':
419 case '|': case '+': case ']':
fc7bc883 420#endif
f3a55c17
NC
421 *rx++ = '\\';
422 *rx++ = c;
423 break;
424
425 default:
426 if (ISALPHA (c))
427 {
428 *rx++ = '[';
429 *rx++ = TOLOWER (c);
430 *rx++ = TOUPPER (c);
431 *rx++ = ']';
432 }
433 else
434 *rx++ = c;
435 break;
436 }
fc7bc883
RH
437 }
438 else
439 {
f3a55c17
NC
440 /* Replace non-syntax fields with globs. */
441 *rx++ = '.';
442 *rx++ = '*';
fc7bc883
RH
443 }
444 }
445
f3a55c17 446 /* Trailing whitespace ok. */
fc7bc883
RH
447 * rx++ = '[';
448 * rx++ = ' ';
449 * rx++ = '\t';
450 * rx++ = ']';
451 * rx++ = '*';
452
f3a55c17 453 /* But anchor it after that. */
fc7bc883
RH
454 * rx++ = '$';
455 * rx = '\0';
456
457 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
f3a55c17 458 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
fc7bc883
RH
459
460 if (reg_err == 0)
461 return NULL;
462 else
463 {
464 static char msg[80];
f3a55c17 465
fc7bc883
RH
466 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
467 regfree ((regex_t *) CGEN_INSN_RX (insn));
468 free (CGEN_INSN_RX (insn));
469 (CGEN_INSN_RX (insn)) = NULL;
37111cc7 470 return msg;
fc7bc883
RH
471 }
472}
473
252b5132
RH
474\f
475/* Default insn parser.
476
477 The syntax string is scanned and operands are parsed and stored in FIELDS.
478 Relocs are queued as we go via other callbacks.
479
480 ??? Note that this is currently an all-or-nothing parser. If we fail to
481 parse the instruction, we return 0 and the caller will start over from
482 the beginning. Backtracking will be necessary in parsing subexpressions,
483 but that can be handled there. Not handling backtracking here may get
484 expensive in the case of the m68k. Deal with later.
485
f3a55c17 486 Returns NULL for success, an error message for failure. */
252b5132
RH
487
488static const char *
ffead7ae
MM
489parse_insn_normal (CGEN_CPU_DESC cd,
490 const CGEN_INSN *insn,
491 const char **strp,
492 CGEN_FIELDS *fields)
252b5132
RH
493{
494 /* ??? Runtime added insns not handled yet. */
495 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
496 const char *str = *strp;
497 const char *errmsg;
498 const char *p;
b3466c39 499 const CGEN_SYNTAX_CHAR_TYPE * syn;
252b5132
RH
500#ifdef CGEN_MNEMONIC_OPERANDS
501 /* FIXME: wip */
502 int past_opcode_p;
503#endif
504
505 /* For now we assume the mnemonic is first (there are no leading operands).
506 We can parse it without needing to set up operand parsing.
507 GAS's input scrubber will ensure mnemonics are lowercase, but we may
508 not be called from GAS. */
509 p = CGEN_INSN_MNEMONIC (insn);
37111cc7 510 while (*p && TOLOWER (*p) == TOLOWER (*str))
252b5132 511 ++p, ++str;
1fa60b5d
DE
512
513 if (* p)
514 return _("unrecognized instruction");
515
516#ifndef CGEN_MNEMONIC_OPERANDS
37111cc7 517 if (* str && ! ISSPACE (* str))
252b5132 518 return _("unrecognized instruction");
1fa60b5d 519#endif
252b5132
RH
520
521 CGEN_INIT_PARSE (cd);
522 cgen_init_parse_operand (cd);
523#ifdef CGEN_MNEMONIC_OPERANDS
524 past_opcode_p = 0;
525#endif
526
527 /* We don't check for (*str != '\0') here because we want to parse
528 any trailing fake arguments in the syntax string. */
529 syn = CGEN_SYNTAX_STRING (syntax);
530
531 /* Mnemonics come first for now, ensure valid string. */
532 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
533 abort ();
534
535 ++syn;
536
537 while (* syn != 0)
538 {
539 /* Non operand chars must match exactly. */
540 if (CGEN_SYNTAX_CHAR_P (* syn))
541 {
1fa60b5d
DE
542 /* FIXME: While we allow for non-GAS callers above, we assume the
543 first char after the mnemonic part is a space. */
544 /* FIXME: We also take inappropriate advantage of the fact that
545 GAS's input scrubber will remove extraneous blanks. */
37111cc7 546 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
252b5132
RH
547 {
548#ifdef CGEN_MNEMONIC_OPERANDS
b3466c39 549 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
252b5132
RH
550 past_opcode_p = 1;
551#endif
552 ++ syn;
553 ++ str;
554 }
b3466c39 555 else if (*str)
252b5132
RH
556 {
557 /* Syntax char didn't match. Can't be this insn. */
6bb95a0f 558 static char msg [80];
f3a55c17 559
6bb95a0f
DB
560 /* xgettext:c-format */
561 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
b3466c39
DB
562 CGEN_SYNTAX_CHAR(*syn), *str);
563 return msg;
564 }
565 else
566 {
567 /* Ran out of input. */
568 static char msg [80];
f3a55c17 569
b3466c39
DB
570 /* xgettext:c-format */
571 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
572 CGEN_SYNTAX_CHAR(*syn));
6bb95a0f 573 return msg;
252b5132
RH
574 }
575 continue;
576 }
577
578 /* We have an operand of some sort. */
a978a3e5 579 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
252b5132
RH
580 &str, fields);
581 if (errmsg)
582 return errmsg;
583
584 /* Done with this operand, continue with next one. */
585 ++ syn;
586 }
587
588 /* If we're at the end of the syntax string, we're done. */
b3466c39 589 if (* syn == 0)
252b5132
RH
590 {
591 /* FIXME: For the moment we assume a valid `str' can only contain
592 blanks now. IE: We needn't try again with a longer version of
593 the insn and it is assumed that longer versions of insns appear
594 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
37111cc7 595 while (ISSPACE (* str))
252b5132
RH
596 ++ str;
597
598 if (* str != '\0')
599 return _("junk at end of line"); /* FIXME: would like to include `str' */
600
601 return NULL;
602 }
603
604 /* We couldn't parse it. */
605 return _("unrecognized instruction");
606}
607\f
608/* Main entry point.
609 This routine is called for each instruction to be assembled.
610 STR points to the insn to be assembled.
611 We assume all necessary tables have been initialized.
612 The assembled instruction, less any fixups, is stored in BUF.
613 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
614 still needs to be converted to target byte order, otherwise BUF is an array
615 of bytes in target byte order.
616 The result is a pointer to the insn's entry in the opcode table,
617 or NULL if an error occured (an error message will have already been
618 printed).
619
620 Note that when processing (non-alias) macro-insns,
621 this function recurses.
622
623 ??? It's possible to make this cpu-independent.
624 One would have to deal with a few minor things.
625 At this point in time doing so would be more of a curiosity than useful
626 [for example this file isn't _that_ big], but keeping the possibility in
627 mind helps keep the design clean. */
628
629const CGEN_INSN *
ffead7ae
MM
630m32r_cgen_assemble_insn (CGEN_CPU_DESC cd,
631 const char *str,
632 CGEN_FIELDS *fields,
633 CGEN_INSN_BYTES_PTR buf,
634 char **errmsg)
252b5132
RH
635{
636 const char *start;
637 CGEN_INSN_LIST *ilist;
b3466c39
DB
638 const char *parse_errmsg = NULL;
639 const char *insert_errmsg = NULL;
fc7bc883 640 int recognized_mnemonic = 0;
252b5132
RH
641
642 /* Skip leading white space. */
37111cc7 643 while (ISSPACE (* str))
252b5132
RH
644 ++ str;
645
646 /* The instructions are stored in hashed lists.
647 Get the first in the list. */
648 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
649
650 /* Keep looking until we find a match. */
252b5132
RH
651 start = str;
652 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
653 {
654 const CGEN_INSN *insn = ilist->insn;
fc7bc883 655 recognized_mnemonic = 1;
252b5132 656
cfcdbe97 657#ifdef CGEN_VALIDATE_INSN_SUPPORTED
f3a55c17
NC
658 /* Not usually needed as unsupported opcodes
659 shouldn't be in the hash lists. */
252b5132
RH
660 /* Is this insn supported by the selected cpu? */
661 if (! m32r_cgen_insn_supported (cd, insn))
662 continue;
663#endif
b11dcf4e 664 /* If the RELAXED attribute is set, this is an insn that shouldn't be
252b5132
RH
665 chosen immediately. Instead, it is used during assembler/linker
666 relaxation if possible. */
b11dcf4e 667 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
252b5132
RH
668 continue;
669
670 str = start;
671
f3a55c17 672 /* Skip this insn if str doesn't look right lexically. */
fc7bc883
RH
673 if (CGEN_INSN_RX (insn) != NULL &&
674 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
675 continue;
676
252b5132
RH
677 /* Allow parse/insert handlers to obtain length of insn. */
678 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
679
b3466c39
DB
680 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
681 if (parse_errmsg != NULL)
6bb95a0f 682 continue;
252b5132 683
f3a55c17 684 /* ??? 0 is passed for `pc'. */
b3466c39
DB
685 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
686 (bfd_vma) 0);
687 if (insert_errmsg != NULL)
6bb95a0f
DB
688 continue;
689
690 /* It is up to the caller to actually output the insn and any
691 queued relocs. */
692 return insn;
252b5132
RH
693 }
694
252b5132 695 {
cfcdbe97 696 static char errbuf[150];
52646233 697#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
b3466c39 698 const char *tmp_errmsg;
cfcdbe97 699
b3466c39 700 /* If requesting verbose error messages, use insert_errmsg.
f3a55c17 701 Failing that, use parse_errmsg. */
b3466c39
DB
702 tmp_errmsg = (insert_errmsg ? insert_errmsg :
703 parse_errmsg ? parse_errmsg :
f3a55c17
NC
704 recognized_mnemonic ?
705 _("unrecognized form of instruction") :
b3466c39
DB
706 _("unrecognized instruction"));
707
cfcdbe97
AH
708 if (strlen (start) > 50)
709 /* xgettext:c-format */
710 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
711 else
712 /* xgettext:c-format */
713 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
714#else
252b5132
RH
715 if (strlen (start) > 50)
716 /* xgettext:c-format */
717 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
718 else
719 /* xgettext:c-format */
720 sprintf (errbuf, _("bad instruction `%.50s'"), start);
cfcdbe97 721#endif
252b5132
RH
722
723 *errmsg = errbuf;
724 return NULL;
725 }
726}
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