* iq2000.cpu: Include from binutils cpu dir.
[deliverable/binutils-gdb.git] / opcodes / m32r-asm.c
CommitLineData
252b5132
RH
1/* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
47b0e7ad
NC
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
252b5132 6
47b0e7ad
NC
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
8 Free Software Foundation, Inc.
252b5132 9
47b0e7ad 10 This file is part of the GNU Binutils and GDB, the GNU debugger.
252b5132 11
47b0e7ad
NC
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
15 any later version.
252b5132 16
47b0e7ad
NC
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
252b5132 21
47b0e7ad
NC
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132
RH
25
26/* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29#include "sysdep.h"
252b5132
RH
30#include <stdio.h>
31#include "ansidecl.h"
32#include "bfd.h"
33#include "symcat.h"
34#include "m32r-desc.h"
35#include "m32r-opc.h"
36#include "opintl.h"
fc7bc883 37#include "xregex.h"
fc05c67f 38#include "libiberty.h"
37111cc7 39#include "safe-ctype.h"
252b5132 40
37111cc7 41#undef min
252b5132 42#define min(a,b) ((a) < (b) ? (a) : (b))
37111cc7 43#undef max
252b5132
RH
44#define max(a,b) ((a) > (b) ? (a) : (b))
45
0e2ee3ca 46static const char * parse_insn_normal
ffead7ae 47 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
252b5132 48\f
37111cc7 49/* -- assembler routines inserted here. */
252b5132
RH
50
51/* -- asm.c */
47b0e7ad
NC
52
53static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'");
252b5132
RH
54
55/* Handle '#' prefixes (i.e. skip over them). */
56
57static const char *
47b0e7ad
NC
58parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
59 const char **strp,
60 int opindex ATTRIBUTE_UNUSED,
61 long *valuep ATTRIBUTE_UNUSED)
252b5132
RH
62{
63 if (**strp == '#')
64 ++*strp;
65 return NULL;
66}
67
68/* Handle shigh(), high(). */
69
70static const char *
47b0e7ad
NC
71parse_hi16 (CGEN_CPU_DESC cd,
72 const char **strp,
73 int opindex,
74 unsigned long *valuep)
252b5132
RH
75{
76 const char *errmsg;
77 enum cgen_parse_operand_result result_type;
78 bfd_vma value;
79
80 if (**strp == '#')
81 ++*strp;
82
83 if (strncasecmp (*strp, "high(", 5) == 0)
84 {
85 *strp += 5;
86 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
47b0e7ad 87 & result_type, & value);
252b5132 88 if (**strp != ')')
47b0e7ad 89 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
90 ++*strp;
91 if (errmsg == NULL
92 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
93 value >>= 16;
94 *valuep = value;
95 return errmsg;
96 }
97 else if (strncasecmp (*strp, "shigh(", 6) == 0)
98 {
99 *strp += 6;
100 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
47b0e7ad 101 & result_type, & value);
252b5132 102 if (**strp != ')')
47b0e7ad 103 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
104 ++*strp;
105 if (errmsg == NULL
106 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
f4453dfa
NC
107 {
108 value = value + (value & 0x8000 ? 0x10000 : 0);
109 value >>= 16;
110 }
252b5132
RH
111 *valuep = value;
112 return errmsg;
113 }
114
115 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
116}
117
118/* Handle low() in a signed context. Also handle sda().
119 The signedness of the value doesn't matter to low(), but this also
120 handles the case where low() isn't present. */
121
122static const char *
47b0e7ad 123parse_slo16 (CGEN_CPU_DESC cd, const char ** strp, int opindex, long * valuep)
252b5132
RH
124{
125 const char *errmsg;
126 enum cgen_parse_operand_result result_type;
127 bfd_vma value;
128
129 if (**strp == '#')
130 ++*strp;
131
132 if (strncasecmp (*strp, "low(", 4) == 0)
133 {
134 *strp += 4;
135 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
47b0e7ad 136 & result_type, & value);
252b5132 137 if (**strp != ')')
47b0e7ad 138 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
139 ++*strp;
140 if (errmsg == NULL
141 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
88845958
NC
142 {
143 value &= 0xffff;
144 if (value & 0x8000)
145 value |= 0xffff0000;
146 }
252b5132
RH
147 *valuep = value;
148 return errmsg;
149 }
150
151 if (strncasecmp (*strp, "sda(", 4) == 0)
152 {
153 *strp += 4;
154 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
47b0e7ad 155 NULL, & value);
252b5132 156 if (**strp != ')')
47b0e7ad 157 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
158 ++*strp;
159 *valuep = value;
160 return errmsg;
161 }
162
163 return cgen_parse_signed_integer (cd, strp, opindex, valuep);
164}
165
166/* Handle low() in an unsigned context.
167 The signedness of the value doesn't matter to low(), but this also
168 handles the case where low() isn't present. */
169
170static const char *
47b0e7ad
NC
171parse_ulo16 (CGEN_CPU_DESC cd,
172 const char **strp,
173 int opindex,
174 unsigned long *valuep)
252b5132
RH
175{
176 const char *errmsg;
177 enum cgen_parse_operand_result result_type;
178 bfd_vma value;
179
180 if (**strp == '#')
181 ++*strp;
182
183 if (strncasecmp (*strp, "low(", 4) == 0)
184 {
185 *strp += 4;
186 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
47b0e7ad 187 & result_type, & value);
252b5132 188 if (**strp != ')')
47b0e7ad 189 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
190 ++*strp;
191 if (errmsg == NULL
192 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
193 value &= 0xffff;
194 *valuep = value;
195 return errmsg;
196 }
197
198 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
199}
200
201/* -- */
202
0e2ee3ca 203const char * m32r_cgen_parse_operand
47b0e7ad 204 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
0e2ee3ca 205
252b5132
RH
206/* Main entry point for operand parsing.
207
208 This function is basically just a big switch statement. Earlier versions
209 used tables to look up the function to use, but
210 - if the table contains both assembler and disassembler functions then
211 the disassembler contains much of the assembler and vice-versa,
212 - there's a lot of inlining possibilities as things grow,
213 - using a switch statement avoids the function call overhead.
214
215 This function could be moved into `parse_insn_normal', but keeping it
216 separate makes clear the interface between `parse_insn_normal' and each of
9a2e995d 217 the handlers. */
252b5132
RH
218
219const char *
47b0e7ad
NC
220m32r_cgen_parse_operand (CGEN_CPU_DESC cd,
221 int opindex,
222 const char ** strp,
223 CGEN_FIELDS * fields)
252b5132 224{
eb1b03df
DE
225 const char * errmsg = NULL;
226 /* Used by scalar operands that still need to be parsed. */
0e2ee3ca 227 long junk ATTRIBUTE_UNUSED;
252b5132
RH
228
229 switch (opindex)
230 {
1fa60b5d
DE
231 case M32R_OPERAND_ACC :
232 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
233 break;
234 case M32R_OPERAND_ACCD :
235 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
236 break;
237 case M32R_OPERAND_ACCS :
238 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
239 break;
252b5132
RH
240 case M32R_OPERAND_DCR :
241 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1);
242 break;
243 case M32R_OPERAND_DISP16 :
244 {
9494d739 245 bfd_vma value = 0;
252b5132
RH
246 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value);
247 fields->f_disp16 = value;
248 }
249 break;
250 case M32R_OPERAND_DISP24 :
251 {
9494d739 252 bfd_vma value = 0;
252b5132
RH
253 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value);
254 fields->f_disp24 = value;
255 }
256 break;
257 case M32R_OPERAND_DISP8 :
258 {
9494d739 259 bfd_vma value = 0;
252b5132
RH
260 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value);
261 fields->f_disp8 = value;
262 }
263 break;
264 case M32R_OPERAND_DR :
265 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
266 break;
267 case M32R_OPERAND_HASH :
33b71eeb 268 errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, (long *) (& junk));
252b5132
RH
269 break;
270 case M32R_OPERAND_HI16 :
33b71eeb 271 errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, (unsigned long *) (& fields->f_hi16));
252b5132 272 break;
1fa60b5d 273 case M32R_OPERAND_IMM1 :
33b71eeb 274 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, (unsigned long *) (& fields->f_imm1));
1fa60b5d 275 break;
252b5132
RH
276 case M32R_OPERAND_SCR :
277 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2);
278 break;
279 case M32R_OPERAND_SIMM16 :
33b71eeb 280 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, (long *) (& fields->f_simm16));
252b5132
RH
281 break;
282 case M32R_OPERAND_SIMM8 :
33b71eeb 283 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, (long *) (& fields->f_simm8));
252b5132
RH
284 break;
285 case M32R_OPERAND_SLO16 :
33b71eeb 286 errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, (long *) (& fields->f_simm16));
252b5132
RH
287 break;
288 case M32R_OPERAND_SR :
289 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
290 break;
291 case M32R_OPERAND_SRC1 :
292 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
293 break;
294 case M32R_OPERAND_SRC2 :
295 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
296 break;
297 case M32R_OPERAND_UIMM16 :
33b71eeb 298 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, (unsigned long *) (& fields->f_uimm16));
252b5132
RH
299 break;
300 case M32R_OPERAND_UIMM24 :
301 {
9494d739 302 bfd_vma value = 0;
252b5132
RH
303 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL, & value);
304 fields->f_uimm24 = value;
305 }
306 break;
88845958 307 case M32R_OPERAND_UIMM3 :
33b71eeb 308 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM3, (unsigned long *) (& fields->f_uimm3));
88845958 309 break;
252b5132 310 case M32R_OPERAND_UIMM4 :
33b71eeb 311 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, (unsigned long *) (& fields->f_uimm4));
252b5132
RH
312 break;
313 case M32R_OPERAND_UIMM5 :
33b71eeb 314 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, (unsigned long *) (& fields->f_uimm5));
252b5132 315 break;
88845958 316 case M32R_OPERAND_UIMM8 :
33b71eeb 317 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM8, (unsigned long *) (& fields->f_uimm8));
88845958 318 break;
252b5132 319 case M32R_OPERAND_ULO16 :
33b71eeb 320 errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, (unsigned long *) (& fields->f_uimm16));
252b5132
RH
321 break;
322
323 default :
324 /* xgettext:c-format */
325 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
326 abort ();
327 }
328
329 return errmsg;
330}
331
332cgen_parse_fn * const m32r_cgen_parse_handlers[] =
333{
334 parse_insn_normal,
335};
336
337void
47b0e7ad 338m32r_cgen_init_asm (CGEN_CPU_DESC cd)
252b5132
RH
339{
340 m32r_cgen_init_opcode_table (cd);
341 m32r_cgen_init_ibld_table (cd);
342 cd->parse_handlers = & m32r_cgen_parse_handlers[0];
343 cd->parse_operand = m32r_cgen_parse_operand;
344}
345
fc7bc883
RH
346\f
347
37111cc7 348/* Regex construction routine.
fc7bc883 349
37111cc7
NC
350 This translates an opcode syntax string into a regex string,
351 by replacing any non-character syntax element (such as an
352 opcode) with the pattern '.*'
fc7bc883 353
37111cc7
NC
354 It then compiles the regex and stores it in the opcode, for
355 later use by m32r_cgen_assemble_insn
fc7bc883 356
37111cc7 357 Returns NULL for success, an error message for failure. */
fc7bc883
RH
358
359char *
ffead7ae 360m32r_cgen_build_insn_regex (CGEN_INSN *insn)
fc7bc883 361{
fc05c67f 362 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
fc7bc883 363 const char *mnem = CGEN_INSN_MNEMONIC (insn);
fc7bc883
RH
364 char rxbuf[CGEN_MAX_RX_ELEMENTS];
365 char *rx = rxbuf;
366 const CGEN_SYNTAX_CHAR_TYPE *syn;
367 int reg_err;
368
369 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
370
f3a55c17
NC
371 /* Mnemonics come first in the syntax string. */
372 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
373 return _("missing mnemonic in syntax string");
fc7bc883
RH
374 ++syn;
375
f3a55c17
NC
376 /* Generate a case sensitive regular expression that emulates case
377 insensitive matching in the "C" locale. We cannot generate a case
378 insensitive regular expression because in Turkish locales, 'i' and 'I'
379 are not equal modulo case conversion. */
fc7bc883 380
f3a55c17
NC
381 /* Copy the literal mnemonic out of the insn. */
382 for (; *mnem; mnem++)
383 {
384 char c = *mnem;
385
386 if (ISALPHA (c))
387 {
388 *rx++ = '[';
389 *rx++ = TOLOWER (c);
390 *rx++ = TOUPPER (c);
391 *rx++ = ']';
392 }
393 else
394 *rx++ = c;
395 }
396
397 /* Copy any remaining literals from the syntax string into the rx. */
398 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
fc7bc883
RH
399 {
400 if (CGEN_SYNTAX_CHAR_P (* syn))
401 {
f3a55c17
NC
402 char c = CGEN_SYNTAX_CHAR (* syn);
403
404 switch (c)
405 {
406 /* Escape any regex metacharacters in the syntax. */
407 case '.': case '[': case '\\':
408 case '*': case '^': case '$':
fc7bc883
RH
409
410#ifdef CGEN_ESCAPE_EXTENDED_REGEX
f3a55c17
NC
411 case '?': case '{': case '}':
412 case '(': case ')': case '*':
413 case '|': case '+': case ']':
fc7bc883 414#endif
f3a55c17
NC
415 *rx++ = '\\';
416 *rx++ = c;
417 break;
418
419 default:
420 if (ISALPHA (c))
421 {
422 *rx++ = '[';
423 *rx++ = TOLOWER (c);
424 *rx++ = TOUPPER (c);
425 *rx++ = ']';
426 }
427 else
428 *rx++ = c;
429 break;
430 }
fc7bc883
RH
431 }
432 else
433 {
f3a55c17
NC
434 /* Replace non-syntax fields with globs. */
435 *rx++ = '.';
436 *rx++ = '*';
fc7bc883
RH
437 }
438 }
439
f3a55c17 440 /* Trailing whitespace ok. */
fc7bc883
RH
441 * rx++ = '[';
442 * rx++ = ' ';
443 * rx++ = '\t';
444 * rx++ = ']';
445 * rx++ = '*';
446
f3a55c17 447 /* But anchor it after that. */
fc7bc883
RH
448 * rx++ = '$';
449 * rx = '\0';
450
451 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
f3a55c17 452 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
fc7bc883
RH
453
454 if (reg_err == 0)
455 return NULL;
456 else
457 {
458 static char msg[80];
f3a55c17 459
fc7bc883
RH
460 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
461 regfree ((regex_t *) CGEN_INSN_RX (insn));
462 free (CGEN_INSN_RX (insn));
463 (CGEN_INSN_RX (insn)) = NULL;
37111cc7 464 return msg;
fc7bc883
RH
465 }
466}
467
252b5132
RH
468\f
469/* Default insn parser.
470
471 The syntax string is scanned and operands are parsed and stored in FIELDS.
472 Relocs are queued as we go via other callbacks.
473
474 ??? Note that this is currently an all-or-nothing parser. If we fail to
475 parse the instruction, we return 0 and the caller will start over from
476 the beginning. Backtracking will be necessary in parsing subexpressions,
477 but that can be handled there. Not handling backtracking here may get
478 expensive in the case of the m68k. Deal with later.
479
f3a55c17 480 Returns NULL for success, an error message for failure. */
252b5132
RH
481
482static const char *
ffead7ae
MM
483parse_insn_normal (CGEN_CPU_DESC cd,
484 const CGEN_INSN *insn,
485 const char **strp,
486 CGEN_FIELDS *fields)
252b5132
RH
487{
488 /* ??? Runtime added insns not handled yet. */
489 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
490 const char *str = *strp;
491 const char *errmsg;
492 const char *p;
b3466c39 493 const CGEN_SYNTAX_CHAR_TYPE * syn;
252b5132
RH
494#ifdef CGEN_MNEMONIC_OPERANDS
495 /* FIXME: wip */
496 int past_opcode_p;
497#endif
498
499 /* For now we assume the mnemonic is first (there are no leading operands).
500 We can parse it without needing to set up operand parsing.
501 GAS's input scrubber will ensure mnemonics are lowercase, but we may
502 not be called from GAS. */
503 p = CGEN_INSN_MNEMONIC (insn);
37111cc7 504 while (*p && TOLOWER (*p) == TOLOWER (*str))
252b5132 505 ++p, ++str;
1fa60b5d
DE
506
507 if (* p)
508 return _("unrecognized instruction");
509
510#ifndef CGEN_MNEMONIC_OPERANDS
37111cc7 511 if (* str && ! ISSPACE (* str))
252b5132 512 return _("unrecognized instruction");
1fa60b5d 513#endif
252b5132
RH
514
515 CGEN_INIT_PARSE (cd);
516 cgen_init_parse_operand (cd);
517#ifdef CGEN_MNEMONIC_OPERANDS
518 past_opcode_p = 0;
519#endif
520
521 /* We don't check for (*str != '\0') here because we want to parse
522 any trailing fake arguments in the syntax string. */
523 syn = CGEN_SYNTAX_STRING (syntax);
524
525 /* Mnemonics come first for now, ensure valid string. */
526 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
527 abort ();
528
529 ++syn;
530
531 while (* syn != 0)
532 {
533 /* Non operand chars must match exactly. */
534 if (CGEN_SYNTAX_CHAR_P (* syn))
535 {
1fa60b5d
DE
536 /* FIXME: While we allow for non-GAS callers above, we assume the
537 first char after the mnemonic part is a space. */
538 /* FIXME: We also take inappropriate advantage of the fact that
539 GAS's input scrubber will remove extraneous blanks. */
37111cc7 540 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
252b5132
RH
541 {
542#ifdef CGEN_MNEMONIC_OPERANDS
b3466c39 543 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
252b5132
RH
544 past_opcode_p = 1;
545#endif
546 ++ syn;
547 ++ str;
548 }
b3466c39 549 else if (*str)
252b5132
RH
550 {
551 /* Syntax char didn't match. Can't be this insn. */
6bb95a0f 552 static char msg [80];
f3a55c17 553
6bb95a0f
DB
554 /* xgettext:c-format */
555 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
b3466c39
DB
556 CGEN_SYNTAX_CHAR(*syn), *str);
557 return msg;
558 }
559 else
560 {
561 /* Ran out of input. */
562 static char msg [80];
f3a55c17 563
b3466c39
DB
564 /* xgettext:c-format */
565 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
566 CGEN_SYNTAX_CHAR(*syn));
6bb95a0f 567 return msg;
252b5132
RH
568 }
569 continue;
570 }
571
572 /* We have an operand of some sort. */
a978a3e5 573 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
252b5132
RH
574 &str, fields);
575 if (errmsg)
576 return errmsg;
577
578 /* Done with this operand, continue with next one. */
579 ++ syn;
580 }
581
582 /* If we're at the end of the syntax string, we're done. */
b3466c39 583 if (* syn == 0)
252b5132
RH
584 {
585 /* FIXME: For the moment we assume a valid `str' can only contain
586 blanks now. IE: We needn't try again with a longer version of
587 the insn and it is assumed that longer versions of insns appear
588 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
37111cc7 589 while (ISSPACE (* str))
252b5132
RH
590 ++ str;
591
592 if (* str != '\0')
593 return _("junk at end of line"); /* FIXME: would like to include `str' */
594
595 return NULL;
596 }
597
598 /* We couldn't parse it. */
599 return _("unrecognized instruction");
600}
601\f
602/* Main entry point.
603 This routine is called for each instruction to be assembled.
604 STR points to the insn to be assembled.
605 We assume all necessary tables have been initialized.
606 The assembled instruction, less any fixups, is stored in BUF.
607 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
608 still needs to be converted to target byte order, otherwise BUF is an array
609 of bytes in target byte order.
610 The result is a pointer to the insn's entry in the opcode table,
611 or NULL if an error occured (an error message will have already been
612 printed).
613
614 Note that when processing (non-alias) macro-insns,
615 this function recurses.
616
617 ??? It's possible to make this cpu-independent.
618 One would have to deal with a few minor things.
619 At this point in time doing so would be more of a curiosity than useful
620 [for example this file isn't _that_ big], but keeping the possibility in
621 mind helps keep the design clean. */
622
623const CGEN_INSN *
ffead7ae
MM
624m32r_cgen_assemble_insn (CGEN_CPU_DESC cd,
625 const char *str,
626 CGEN_FIELDS *fields,
627 CGEN_INSN_BYTES_PTR buf,
628 char **errmsg)
252b5132
RH
629{
630 const char *start;
631 CGEN_INSN_LIST *ilist;
b3466c39
DB
632 const char *parse_errmsg = NULL;
633 const char *insert_errmsg = NULL;
fc7bc883 634 int recognized_mnemonic = 0;
252b5132
RH
635
636 /* Skip leading white space. */
37111cc7 637 while (ISSPACE (* str))
252b5132
RH
638 ++ str;
639
640 /* The instructions are stored in hashed lists.
641 Get the first in the list. */
642 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
643
644 /* Keep looking until we find a match. */
252b5132
RH
645 start = str;
646 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
647 {
648 const CGEN_INSN *insn = ilist->insn;
fc7bc883 649 recognized_mnemonic = 1;
252b5132 650
cfcdbe97 651#ifdef CGEN_VALIDATE_INSN_SUPPORTED
f3a55c17
NC
652 /* Not usually needed as unsupported opcodes
653 shouldn't be in the hash lists. */
252b5132
RH
654 /* Is this insn supported by the selected cpu? */
655 if (! m32r_cgen_insn_supported (cd, insn))
656 continue;
657#endif
b11dcf4e 658 /* If the RELAXED attribute is set, this is an insn that shouldn't be
252b5132
RH
659 chosen immediately. Instead, it is used during assembler/linker
660 relaxation if possible. */
b11dcf4e 661 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
252b5132
RH
662 continue;
663
664 str = start;
665
f3a55c17 666 /* Skip this insn if str doesn't look right lexically. */
fc7bc883
RH
667 if (CGEN_INSN_RX (insn) != NULL &&
668 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
669 continue;
670
252b5132
RH
671 /* Allow parse/insert handlers to obtain length of insn. */
672 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
673
b3466c39
DB
674 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
675 if (parse_errmsg != NULL)
6bb95a0f 676 continue;
252b5132 677
f3a55c17 678 /* ??? 0 is passed for `pc'. */
b3466c39
DB
679 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
680 (bfd_vma) 0);
681 if (insert_errmsg != NULL)
6bb95a0f
DB
682 continue;
683
684 /* It is up to the caller to actually output the insn and any
685 queued relocs. */
686 return insn;
252b5132
RH
687 }
688
252b5132 689 {
cfcdbe97 690 static char errbuf[150];
52646233 691#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
b3466c39 692 const char *tmp_errmsg;
cfcdbe97 693
b3466c39 694 /* If requesting verbose error messages, use insert_errmsg.
f3a55c17 695 Failing that, use parse_errmsg. */
b3466c39
DB
696 tmp_errmsg = (insert_errmsg ? insert_errmsg :
697 parse_errmsg ? parse_errmsg :
f3a55c17
NC
698 recognized_mnemonic ?
699 _("unrecognized form of instruction") :
b3466c39
DB
700 _("unrecognized instruction"));
701
cfcdbe97
AH
702 if (strlen (start) > 50)
703 /* xgettext:c-format */
704 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
705 else
706 /* xgettext:c-format */
707 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
708#else
252b5132
RH
709 if (strlen (start) > 50)
710 /* xgettext:c-format */
711 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
712 else
713 /* xgettext:c-format */
714 sprintf (errbuf, _("bad instruction `%.50s'"), start);
cfcdbe97 715#endif
252b5132
RH
716
717 *errmsg = errbuf;
718 return NULL;
719 }
720}
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