Commit | Line | Data |
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3442f309 | 1 | /* Disassemble Motorola M*Core instructions. |
97ee9b94 | 2 | Copyright (C) 1993, 1999, 2000 Free Software Foundation, Inc. |
3f230321 NC |
3 | |
4 | This program is free software; you can redistribute it and/or modify | |
5 | it under the terms of the GNU General Public License as published by | |
6 | the Free Software Foundation; either version 2 of the License, or | |
7 | (at your option) any later version. | |
8 | ||
9 | This program is distributed in the hope that it will be useful, | |
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | GNU General Public License for more details. | |
13 | ||
14 | You should have received a copy of the GNU General Public License | |
15 | along with this program; if not, write to the Free Software | |
d7f1f2b0 | 16 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
3f230321 NC |
17 | |
18 | #include <stdio.h> | |
19 | #define STATIC_TABLE | |
20 | #define DEFINE_TABLE | |
21 | ||
22 | #include "mcore-opc.h" | |
23 | #include "dis-asm.h" | |
24 | ||
9cac79d3 NC |
25 | /* Mask for each mcore_opclass: */ |
26 | static const unsigned short imsk[] = | |
27 | { | |
28 | /* O0 */ 0xFFFF, | |
29 | /* OT */ 0xFFFC, | |
30 | /* O1 */ 0xFFF0, | |
31 | /* OC */ 0xFFE0, | |
32 | /* O2 */ 0xFF00, | |
33 | /* X1 */ 0xFFF0, | |
34 | /* OI */ 0xFE00, | |
35 | /* OB */ 0xFE00, | |
36 | ||
37 | /* OMa */ 0xFFF0, | |
38 | /* SI */ 0xFE00, | |
39 | /* I7 */ 0xF800, | |
40 | /* LS */ 0xF000, | |
41 | /* BR */ 0xF800, | |
42 | /* BL */ 0xFF00, | |
43 | /* LR */ 0xF000, | |
44 | /* LJ */ 0xFF00, | |
45 | ||
46 | /* RM */ 0xFFF0, | |
47 | /* RQ */ 0xFFF0, | |
48 | /* JSR */ 0xFFF0, | |
49 | /* JMP */ 0xFFF0, | |
50 | /* OBRa*/ 0xFFF0, | |
51 | /* OBRb*/ 0xFF80, | |
52 | /* OBRc*/ 0xFF00, | |
53 | /* OBR2*/ 0xFE00, | |
54 | ||
55 | /* O1R1*/ 0xFFF0, | |
56 | /* OMb */ 0xFF80, | |
57 | /* OMc */ 0xFF00, | |
58 | /* SIa */ 0xFE00, | |
59 | ||
97ee9b94 NC |
60 | /* MULSH */ 0xFF00, |
61 | /* OPSR */ 0xFFF8, /* psrset/psrclr */ | |
62 | ||
3f230321 NC |
63 | /* JC */ 0, /* JC,JU,JL don't appear in object */ |
64 | /* JU */ 0, | |
65 | /* JL */ 0, | |
66 | /* RSI */ 0, | |
67 | /* DO21*/ 0, | |
68 | /* OB2 */ 0 /* OB2 won't appear in object. */ | |
69 | }; | |
70 | ||
71 | static const char * grname[] = | |
72 | { | |
73 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
74 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" | |
75 | }; | |
76 | ||
77 | static const char X[] = "??"; | |
78 | ||
79 | static const char * crname[] = | |
80 | { | |
81 | "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1", | |
82 | "ss2", "ss3", "ss4", "gcr", "gsr", X, X, X, | |
83 | X, X, X, X, X, X, X, X, | |
84 | X, X, X, X, X, X, X, X | |
85 | }; | |
86 | ||
87 | static const unsigned isiz[] = { 2, 0, 1, 0 }; | |
88 | ||
89 | int | |
90 | print_insn_mcore (memaddr, info) | |
91 | bfd_vma memaddr; | |
92 | struct disassemble_info * info; | |
93 | { | |
94 | unsigned char ibytes[4]; | |
95 | fprintf_ftype fprintf = info->fprintf_func; | |
96 | void * stream = info->stream; | |
97 | unsigned short inst; | |
98 | mcore_opcode_info * op; | |
99 | int status; | |
100 | ||
101 | info->bytes_per_chunk = 2; | |
102 | ||
103 | status = info->read_memory_func (memaddr, ibytes, 2, info); | |
104 | ||
105 | if (status != 0) | |
106 | { | |
107 | info->memory_error_func (status, memaddr, info); | |
108 | return -1; | |
109 | } | |
110 | ||
97ee9b94 | 111 | if (info->endian == BFD_ENDIAN_BIG) |
3f230321 | 112 | inst = (ibytes[0] << 8) | ibytes[1]; |
97ee9b94 NC |
113 | else if (info->endian == BFD_ENDIAN_LITTLE) |
114 | inst = (ibytes[1] << 8) | ibytes[0]; | |
115 | else | |
116 | abort (); | |
3f230321 NC |
117 | |
118 | /* Just a linear search of the table. */ | |
119 | for (op = mcore_table; op->name != 0; op ++) | |
120 | if (op->inst == (inst & imsk[op->opclass])) | |
121 | break; | |
122 | ||
123 | if (op->name == 0) | |
88685153 | 124 | fprintf (stream, ".short 0x%04x", inst); |
3f230321 NC |
125 | else |
126 | { | |
127 | const char * name = grname[inst & 0x0F]; | |
128 | ||
129 | fprintf (stream, "%s", op->name); | |
130 | ||
131 | switch (op->opclass) | |
132 | { | |
133 | case O0: break; | |
134 | case OT: fprintf (stream, "\t%d", inst & 0x3); break; | |
135 | case O1: | |
136 | case JMP: | |
137 | case JSR: fprintf (stream, "\t%s", name); break; | |
138 | case OC: fprintf (stream, "\t%s, %s", name, crname[(inst >> 4) & 0x1F]); break; | |
139 | case O1R1: fprintf (stream, "\t%s, r1", name); break; | |
97ee9b94 | 140 | case MULSH: |
3f230321 NC |
141 | case O2: fprintf (stream, "\t%s, %s", name, grname[(inst >> 4) & 0xF]); break; |
142 | case X1: fprintf (stream, "\tr1, %s", name); break; | |
143 | case OI: fprintf (stream, "\t%s, %d", name, ((inst >> 4) & 0x1F) + 1); break; | |
144 | case RM: fprintf (stream, "\t%s-r15, (r0)", name); break; | |
145 | case RQ: fprintf (stream, "\tr4-r7, (%s)", name); break; | |
146 | case OB: | |
147 | case OBRa: | |
148 | case OBRb: | |
149 | case OBRc: | |
150 | case SI: | |
151 | case SIa: | |
152 | case OMa: | |
153 | case OMb: | |
154 | case OMc: fprintf (stream, "\t%s, %d", name, (inst >> 4) & 0x1F); break; | |
155 | case I7: fprintf (stream, "\t%s, %d", name, (inst >> 4) & 0x7F); break; | |
156 | case LS: fprintf (stream, "\t%s, (%s, %d)", grname[(inst >> 8) & 0xF], | |
157 | name, ((inst >> 4) & 0xF) << isiz[(inst >> 13) & 3]); | |
158 | break; | |
159 | ||
160 | case BR: | |
161 | { | |
162 | long val = inst & 0x3FF; | |
163 | ||
164 | if (inst & 0x400) | |
165 | val |= 0xFFFFFC00; | |
166 | ||
167 | fprintf (stream, "\t0x%x", memaddr + 2 + (val<<1)); | |
168 | ||
169 | if (strcmp (op->name, "bsr") == 0) | |
170 | { | |
171 | /* for bsr, we'll try to get a symbol for the target */ | |
172 | val = memaddr + 2 + (val << 1); | |
173 | ||
174 | if (info->print_address_func && val != 0) | |
175 | { | |
176 | fprintf (stream, "\t// "); | |
177 | info->print_address_func (val, info); | |
178 | } | |
179 | } | |
180 | } | |
181 | break; | |
182 | ||
183 | case BL: | |
184 | { | |
185 | long val; | |
186 | val = (inst & 0x000F); | |
187 | fprintf (stream, "\t%s, 0x%x", | |
188 | grname[(inst >> 4) & 0xF], memaddr - (val << 1)); | |
189 | } | |
190 | break; | |
191 | ||
192 | case LR: | |
193 | { | |
194 | unsigned long val; | |
195 | ||
196 | val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC; | |
197 | ||
198 | status = info->read_memory_func (val, ibytes, 4, info); | |
199 | if (status != 0) | |
200 | { | |
201 | info->memory_error_func (status, memaddr, info); | |
202 | break; | |
203 | } | |
204 | ||
97ee9b94 NC |
205 | if (info->endian == BFD_ENDIAN_LITTLE) |
206 | val = (ibytes[3] << 24) | (ibytes[2] << 16) | |
207 | | (ibytes[1] << 8) | (ibytes[0]); | |
208 | else | |
3f230321 NC |
209 | val = (ibytes[0] << 24) | (ibytes[1] << 16) |
210 | | (ibytes[2] << 8) | (ibytes[3]); | |
211 | ||
212 | /* Removed [] around literal value to match ABI syntax 12/95. */ | |
213 | fprintf (stream, "\t%s, 0x%X", grname[(inst >> 8) & 0xF], val); | |
214 | ||
215 | if (val == 0) | |
216 | fprintf (stream, "\t// from address pool at 0x%x", | |
217 | (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC); | |
218 | } | |
219 | break; | |
220 | ||
221 | case LJ: | |
222 | { | |
223 | unsigned long val; | |
224 | ||
225 | val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC; | |
226 | ||
227 | status = info->read_memory_func (val, ibytes, 4, info); | |
228 | if (status != 0) | |
229 | { | |
230 | info->memory_error_func (status, memaddr, info); | |
231 | break; | |
232 | } | |
233 | ||
97ee9b94 NC |
234 | if (info->endian == BFD_ENDIAN_LITTLE) |
235 | val = (ibytes[3] << 24) | (ibytes[2] << 16) | |
236 | | (ibytes[1] << 8) | (ibytes[0]); | |
237 | else | |
3f230321 NC |
238 | val = (ibytes[0] << 24) | (ibytes[1] << 16) |
239 | | (ibytes[2] << 8) | (ibytes[3]); | |
240 | ||
241 | /* Removed [] around literal value to match ABI syntax 12/95. */ | |
242 | fprintf (stream, "\t0x%X", val); | |
243 | /* For jmpi/jsri, we'll try to get a symbol for the target. */ | |
244 | if (info->print_address_func && val != 0) | |
245 | { | |
246 | fprintf (stream, "\t// "); | |
247 | info->print_address_func (val, info); | |
248 | } | |
249 | else | |
250 | { | |
251 | fprintf (stream, "\t// from address pool at 0x%x", | |
252 | (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC); | |
253 | } | |
254 | } | |
255 | break; | |
256 | ||
97ee9b94 NC |
257 | case OPSR: |
258 | { | |
259 | static char * fields[] = | |
260 | { | |
261 | "af", "ie", "fe", "fe,ie", | |
262 | "ee", "ee,ie", "ee,fe", "ee,fe,ie" | |
263 | }; | |
264 | ||
265 | fprintf (stream, "\t%s", fields[inst & 0x7]); | |
266 | } | |
267 | break; | |
268 | ||
3f230321 NC |
269 | default: |
270 | /* if the disassembler lags the instruction set */ | |
271 | fprintf (stream, "\tundecoded operands, inst is 0x%04x", inst); | |
272 | break; | |
273 | } | |
274 | } | |
275 | ||
276 | /* Say how many bytes we consumed? */ | |
277 | return 2; | |
278 | } |