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Add some prototypes, and fix a few warnings.
[deliverable/binutils-gdb.git] / opcodes / mips-opc.c
CommitLineData
252b5132
RH		 1/* mips.h. Mips opcode list for GDB, the GNU debugger.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
3 Contributed by Ralph Campbell and OSF
4 Commented and modified by Ian Lance Taylor, Cygnus Support
5
6This file is part of GDB, GAS, and the GNU binutils.
7
8GDB, GAS, and the GNU binutils are free software; you can redistribute
9them and/or modify them under the terms of the GNU General Public
10License as published by the Free Software Foundation; either version
111, or (at your option) any later version.
12
13GDB, GAS, and the GNU binutils are distributed in the hope that they
14will be useful, but WITHOUT ANY WARRANTY; without even the implied
15warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
16the GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
19along with this file; see the file COPYING. If not, write to the Free
20Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21
22#include <stdio.h>
0d8dfecf 23#include "sysdep.h"
252b5132
RH		 24#include "opcode/mips.h"
25
26/* Short hand so the lines aren't too long. */
27
28#define LDD INSN_LOAD_MEMORY_DELAY
29#define LCD INSN_LOAD_COPROC_DELAY
30#define UBD INSN_UNCOND_BRANCH_DELAY
31#define CBD INSN_COND_BRANCH_DELAY
32#define COD INSN_COPROC_MOVE_DELAY
33#define CLD INSN_COPROC_MEMORY_DELAY
34#define CBL INSN_COND_BRANCH_LIKELY
35#define TRAP INSN_TRAP
36#define SM INSN_STORE_MEMORY
37
38#define WR_d INSN_WRITE_GPR_D
39#define WR_t INSN_WRITE_GPR_T
40#define WR_31 INSN_WRITE_GPR_31
41#define WR_D INSN_WRITE_FPR_D
42#define WR_T INSN_WRITE_FPR_T
43#define WR_S INSN_WRITE_FPR_S
44#define RD_s INSN_READ_GPR_S
45#define RD_b INSN_READ_GPR_S
46#define RD_t INSN_READ_GPR_T
47#define RD_S INSN_READ_FPR_S
48#define RD_T INSN_READ_FPR_T
49#define RD_R INSN_READ_FPR_R
50#define WR_CC INSN_WRITE_COND_CODE
51#define RD_CC INSN_READ_COND_CODE
52#define RD_C0 INSN_COP
53#define RD_C1 INSN_COP
54#define RD_C2 INSN_COP
55#define RD_C3 INSN_COP
56#define WR_C0 INSN_COP
57#define WR_C1 INSN_COP
58#define WR_C2 INSN_COP
59#define WR_C3 INSN_COP
60
61#define WR_HI INSN_WRITE_HI
62#define RD_HI INSN_READ_HI
63#define MOD_HI WR_HI|RD_HI
64
65#define WR_LO INSN_WRITE_LO
66#define RD_LO INSN_READ_LO
67#define MOD_LO WR_LO|RD_LO
68
69#define WR_HILO WR_HI|WR_LO
70#define RD_HILO RD_HI|RD_LO
71#define MOD_HILO WR_HILO|RD_HILO
72
73#define IS_M INSN_MULT
74
75#define I1 INSN_ISA1
76#define I2 INSN_ISA2
77#define I3 INSN_ISA3
78#define I4 INSN_ISA4
5fce5ddf 79#define I5 INSN_ISA5
252b5132
RH		 80#define P3 INSN_4650
81#define L1 INSN_4010
82#define V1 INSN_4100
83#define T3 INSN_3900
84
85#define G1 (T3 \
86 )
87
88#define G2 (T3 \
89 )
90
91#define G3 (I4 \
92 )
93
8027df89
AH		 94#define G6 INSN_GP32
95
c156a9fd
NC		 96#define M1 0
97#define M2 0
98
252b5132
RH		 99/* The order of overloaded instructions matters. Label arguments and
100 register arguments look the same. Instructions that can have either
101 for arguments must apear in the correct order in this table for the
102 assembler to pick the right one. In other words, entries with
103 immediate operands must apear after the same instruction with
104 registers.
105
106 Many instructions are short hand for other instructions (i.e., The
107 jal <register> instruction is short for jalr <register>). */
108
109const struct mips_opcode mips_builtin_opcodes[] = {
110/* These instructions appear first so that the disassembler will find
111 them first. The assemblers uses a hash table based on the
112 instruction name anyhow. */
113/* name, args, mask, match, pinfo */
114{"nop", "", 0x00000000, 0xffffffff, 0, I1 },
115{"li", "t,j", 0x24000000, 0xffe00000, WR_t, I1 }, /* addiu */
116{"li", "t,i", 0x34000000, 0xffe00000, WR_t, I1 }, /* ori */
117{"li", "t,I", 0, (int) M_LI, INSN_MACRO, I1 },
8027df89 118{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1|G6 },/* or */
252b5132
RH		 119{"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, I3 },/* daddu */
120{"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d|RD_s, I1 },/* addu */
121{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1 },/* or */
122{"b", "p", 0x10000000, 0xffff0000, UBD, I1 },/* beq 0,0 */
123{"b", "p", 0x04010000, 0xffff0000, UBD, I1 },/* bgez 0 */
124{"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31, I1 },/* bgezal 0*/
125
126{"abs", "d,v", 0, (int) M_ABS, INSN_MACRO, I1 },
127{"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D|RD_S|FP_S, I1 },
128{"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D|RD_S|FP_D, I1 },
5fce5ddf 129{"abs.ps", "D,V", 0x46c00005, 0xffff003f, WR_D|RD_S|FP_D, I5 },
252b5132
RH		 130{"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
131{"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, I1 },
132{"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1},
133{"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1},
5fce5ddf 134{"add.ps", "D,V,T", 0x46c00000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5},
252b5132
RH		 135{"addi", "t,r,j", 0x20000000, 0xfc000000, WR_t|RD_s, I1 },
136{"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_t|RD_s, I1 },
137{"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
138{"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO, I1 },
5fce5ddf 139{"alnv.ps", "D,V,T,s", 0x4c00001e, 0xfc00003f, WR_D|RD_S|RD_T|FP_D, I5},
252b5132
RH		 140{"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
141{"and", "t,r,I", 0, (int) M_AND_I, INSN_MACRO, I1 },
142{"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t|RD_s, I1 },
143/* b is at the top of the table. */
144/* bal is at the top of the table. */
145{"bc0f", "p", 0x41000000, 0xffff0000, CBD|RD_CC, I1 },
146{"bc0fl", "p", 0x41020000, 0xffff0000, CBL|RD_CC, I2|T3 },
c156a9fd
NC		 147{"bc1f", "p", 0x45000000, 0xffff0000, CBD|RD_CC|FP_S, I1|M1 },
148{"bc1f", "N,p", 0x45000000, 0xffe30000, CBD|RD_CC|FP_S, I4|M1 },
149{"bc1fl", "p", 0x45020000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3|M1},
150{"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL|RD_CC|FP_S, I4|M1 },
252b5132
RH		 151{"bc2f", "p", 0x49000000, 0xffff0000, CBD|RD_CC, I1 },
152{"bc2fl", "p", 0x49020000, 0xffff0000, CBL|RD_CC, I2|T3 },
153{"bc3f", "p", 0x4d000000, 0xffff0000, CBD|RD_CC, I1 },
154{"bc3fl", "p", 0x4d020000, 0xffff0000, CBL|RD_CC, I2|T3 },
155{"bc0t", "p", 0x41010000, 0xffff0000, CBD|RD_CC, I1 },
156{"bc0tl", "p", 0x41030000, 0xffff0000, CBL|RD_CC, I2|T3 },
157{"bc1t", "p", 0x45010000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
c1485d85 158{"bc1t", "N,p", 0x45010000, 0xffe30000, CBD|RD_CC|FP_S, I4|M1 },
252b5132 159{"bc1tl", "p", 0x45030000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
c1485d85 160{"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL|RD_CC|FP_S, I4|M1 },
252b5132
RH		 161{"bc2t", "p", 0x49010000, 0xffff0000, CBD|RD_CC, I1 },
162{"bc2tl", "p", 0x49030000, 0xffff0000, CBL|RD_CC, I2|T3 },
163{"bc3t", "p", 0x4d010000, 0xffff0000, CBD|RD_CC, I1 },
164{"bc3tl", "p", 0x4d030000, 0xffff0000, CBL|RD_CC, I2|T3 },
165{"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD|RD_s, I1 },
166{"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
167{"beq", "s,t,p", 0x10000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
168{"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, I1 },
169{"beql", "s,t,p", 0x50000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
170{"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, I2 },
171{"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO, I1 },
172{"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO, I1 },
173{"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, I2 },
174{"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, I2 },
175{"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO, I1 },
176{"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO, I1 },
177{"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, I2 },
178{"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, I2 },
179{"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD|RD_s, I1 },
180{"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL|RD_s, I2|T3 },
181{"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
182{"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL|RD_s, I2|T3 },
183{"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO, I1 },
184{"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO, I1 },
185{"bgtl", "s,t,p", 0, (int) M_BGTL, INSN_MACRO, I2 },
186{"bgtl", "s,I,p", 0, (int) M_BGTL_I, INSN_MACRO, I2 },
187{"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO, I1 },
188{"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO, I1 },
189{"bgtul", "s,t,p", 0, (int) M_BGTUL, INSN_MACRO, I2 },
190{"bgtul", "s,I,p", 0, (int) M_BGTUL_I, INSN_MACRO, I2 },
191{"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD|RD_s, I1 },
192{"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
193{"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO, I1 },
194{"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO, I1 },
195{"blel", "s,t,p", 0, (int) M_BLEL, INSN_MACRO, I2 },
196{"blel", "s,I,p", 0, (int) M_BLEL_I, INSN_MACRO, I2 },
197{"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO, I1 },
198{"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO, I1 },
199{"bleul", "s,t,p", 0, (int) M_BLEUL, INSN_MACRO, I2 },
200{"bleul", "s,I,p", 0, (int) M_BLEUL_I, INSN_MACRO, I2 },
201{"blez", "s,p", 0x18000000, 0xfc1f0000, CBD|RD_s, I1 },
202{"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
203{"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO, I1 },
204{"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO, I1 },
205{"bltl", "s,t,p", 0, (int) M_BLTL, INSN_MACRO, I2 },
206{"bltl", "s,I,p", 0, (int) M_BLTL_I, INSN_MACRO, I2 },
207{"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO, I1 },
208{"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO, I1 },
209{"bltul", "s,t,p", 0, (int) M_BLTUL, INSN_MACRO, I2 },
210{"bltul", "s,I,p", 0, (int) M_BLTUL_I, INSN_MACRO, I2 },
211{"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD|RD_s, I1 },
212{"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL|RD_s, I2|T3 },
213{"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
214{"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL|RD_s, I2|T3 },
215{"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD|RD_s, I1 },
216{"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
217{"bne", "s,t,p", 0x14000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
218{"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, I1 },
219{"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
220{"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, I2 },
221{"break", "", 0x0000000d, 0xffffffff, TRAP, I1 },
222{"break", "c", 0x0000000d, 0xfc00ffff, TRAP, I1 },
223{"break", "c,q", 0x0000000d, 0xfc00003f, TRAP, I1 },
224{"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 225{"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 226{"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 227{"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 228{"c.f.ps", "S,T", 0x46c00030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
229{"c.f.ps", "M,S,T", 0x46c00030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 230{"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 231{"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 232{"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 233{"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 234{"c.un.ps", "S,T", 0x46c00031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
235{"c.un.ps", "M,S,T", 0x46c00031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 236{"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 237{"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 238{"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 239{"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 240{"c.eq.ps", "S,T", 0x46c00032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
241{"c.eq.ps", "M,S,T", 0x46c00032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 242{"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 243{"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 244{"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 245{"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 246{"c.ueq.ps","S,T", 0x46c00033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
247{"c.ueq.ps","M,S,T", 0x46c00033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
c156a9fd 248{"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 249{"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
252b5132 250{"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 251{"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 252{"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 253{"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 254{"c.olt.ps","S,T", 0x46c00034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
255{"c.olt.ps","M,S,T", 0x46c00034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 256{"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 257{"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 258{"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 259{"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 260{"c.ult.ps","S,T", 0x46c00035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
261{"c.ult.ps","M,S,T", 0x46c00035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
c156a9fd 262{"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 263{"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
252b5132 264{"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 265{"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 266{"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 267{"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 268{"c.ole.ps","S,T", 0x46c00036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
269{"c.ole.ps","M,S,T", 0x46c00036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 270{"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 271{"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 272{"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 273{"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 274{"c.ule.ps","S,T", 0x46c00037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
275{"c.ule.ps","M,S,T", 0x46c00037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 276{"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 277{"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 278{"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 279{"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 280{"c.sf.ps", "S,T", 0x46c00038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
281{"c.sf.ps", "M,S,T", 0x46c00038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 282{"c.ngle.d","S,T", 0x46200039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 283{"c.ngle.d","M,S,T", 0x46200039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 284{"c.ngle.s","S,T", 0x46000039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 285{"c.ngle.s","M,S,T", 0x46000039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 286{"c.ngle.ps","S,T", 0x46c00039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
287{"c.ngle.ps","M,S,T", 0x46c00039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 288{"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 289{"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 290{"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 291{"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 292{"c.seq.ps","S,T", 0x46c0003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
293{"c.seq.ps","M,S,T", 0x46c0003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 294{"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 295{"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 296{"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 297{"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 298{"c.ngl.ps","S,T", 0x46c0003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
299{"c.ngl.ps","M,S,T", 0x46c0003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 300{"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 301{"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
5fce5ddf
GRK		 302{"c.lt.ps", "S,T", 0x46c0003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
303{"c.lt.ps", "M,S,T", 0x46c0003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 304{"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 305{"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 306{"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 307{"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 308{"c.nge.ps","S,T", 0x46c0003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
309{"c.nge.ps","M,S,T", 0x46c0003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 310{"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 311{"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
5fce5ddf
GRK		 312{"c.le.ps", "S,T", 0x46c0003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
313{"c.le.ps", "M,S,T", 0x46c0003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 314{"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 315{"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 316{"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 317{"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 318{"c.ngt.ps","S,T", 0x46c0003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
319{"c.ngt.ps","M,S,T", 0x46c0003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
c156a9fd 320{"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, I3|T3|M1 },
252b5132
RH		 321{"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, I3 },
322{"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S, I3 },
323{"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D|RD_S|FP_D, I2 },
324{"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D|RD_S|FP_S, I2 },
325{"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
326{"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
327{"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
328{"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
329{"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
330{"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
331{"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
332{"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
333{"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
334{"ctc3", "t,G", 0x4cc00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
335{"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, I3 },
336{"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D|RD_S|FP_D|FP_S, I1 },
337{"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D|RD_S|FP_D, I1 },
338{"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|FP_D, I3 },
339{"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|FP_S, I3 },
340{"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|FP_S, I3 },
341{"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I1 },
342{"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D|RD_S|FP_S, I1 },
5fce5ddf
GRK		 343{"cvt.s.pl","D,S", 0x46c00028, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I5 },
344{"cvt.s.pu","D,S", 0x46c00020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I5 },
252b5132
RH		 345{"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D|RD_S|FP_D, I1 },
346{"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D|RD_S|FP_S, I1 },
5fce5ddf 347{"cvt.ps.s","D,V,T", 0x46000026, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5},
252b5132
RH		 348{"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, I3 },
349{"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
350{"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, I3 },
351{"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t|RD_s, I3 },
352{"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t|RD_s, I3 },
353{"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
354{"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, I3 },
355/* dctr and dctw are used on the r5000. */
356{"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b, I3 },
357{"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, I3 },
c156a9fd 358{"deret", "", 0x4200001f, 0xffffffff, 0, G2|M1 },
252b5132
RH		 359/* For ddiv, see the comments about div. */
360{"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
361{"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, I3 },
362{"ddiv", "d,v,I", 0, (int) M_DDIV_3I, INSN_MACRO, I3 },
363/* For ddivu, see the comments about div. */
364{"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
365{"ddivu", "d,v,t", 0, (int) M_DDIVU_3, INSN_MACRO, I3 },
366{"ddivu", "d,v,I", 0, (int) M_DDIVU_3I, INSN_MACRO, I3 },
367/* The MIPS assembler treats the div opcode with two operands as
368 though the first operand appeared twice (the first operand is both
369 a source and a destination). To get the div machine instruction,
370 you must use an explicit destination of $0. */
371{"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
372{"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
373{"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO, I1 },
374{"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO, I1 },
375{"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
376{"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
377/* For divu, see the comments about div. */
378{"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
379{"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
380{"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, I1 },
381{"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, I1 },
6e3708af 382{"dla", "t,o(b)", 0x64000000, 0xfc000000, WR_t|RD_s, I3 }, /* daddiu */
252b5132
RH		 383{"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, I3 },
384{"dli", "t,j", 0x24000000, 0xffe00000, WR_t, I3 }, /* addiu */
385{"dli", "t,i", 0x34000000, 0xffe00000, WR_t, I3 }, /* ori */
386{"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, I3 },
387
388{"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s|RD_t|WR_LO|RD_LO, V1 },
389{"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD|WR_t|RD_C0, I3 },
390{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I3 },
391{"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
392{"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
393{"dmfc2", "t,S", 0x48200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
394{"dmtc2", "t,S", 0x48a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
395{"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, I3 },
396{"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, I3 },
397{"dmulo", "d,v,t", 0, (int) M_DMULO, INSN_MACRO, I3 },
398{"dmulo", "d,v,I", 0, (int) M_DMULO_I, INSN_MACRO, I3 },
399{"dmulou", "d,v,t", 0, (int) M_DMULOU, INSN_MACRO, I3 },
400{"dmulou", "d,v,I", 0, (int) M_DMULOU_I, INSN_MACRO, I3 },
401{"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3},
402{"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3},
403{"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d|RD_t, I3 }, /* dsub 0 */
404{"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d|RD_t, I3 }, /* dsubu 0*/
405{"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
406{"drem", "d,v,t", 3, (int) M_DREM_3, INSN_MACRO, I3 },
407{"drem", "d,v,I", 3, (int) M_DREM_3I, INSN_MACRO, I3 },
408{"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
409{"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 },
410{"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 },
411{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
412{"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 },
413{"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
414{"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 }, /* dsll32 */
415{"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_d|RD_t, I3 },
416{"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
417{"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 },
418{"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrav */
419{"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 }, /* dsra32 */
420{"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_d|RD_t, I3 },
421{"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
422{"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 },
423{"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrlv */
424{"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 }, /* dsrl32 */
425{"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_d|RD_t, I3 },
426{"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
427{"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, I3 },
428{"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
429{"dsubu", "d,v,I", 0, (int) M_DSUBU_I, INSN_MACRO, I3 },
c156a9fd 430{"eret", "", 0x42000018, 0xffffffff, 0, I3|M1 },
252b5132
RH		 431{"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, I3 },
432{"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S, I3 },
433{"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_D, I2 },
434{"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D|RD_S|FP_S, I2 },
435{"flushi", "", 0xbc010000, 0xffffffff, 0, L1 },
436{"flushd", "", 0xbc020000, 0xffffffff, 0, L1 },
437{"flushid", "", 0xbc030000, 0xffffffff, 0, L1 },
438{"hibernate","", 0x42000023, 0xffffffff, 0, V1 },
439{"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 },
440{"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 }, /* jr */
441/* SVR4 PIC code requires special handling for j, so it must be a
442 macro. */
443{"j", "a", 0, (int) M_J_A, INSN_MACRO, I1 },
444/* This form of j is used by the disassembler and internally by the
445 assembler, but will never match user input (because the line above
446 will match first). */
447{"j", "a", 0x08000000, 0xfc000000, UBD, I1 },
448{"jalr", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d, I1 },
449{"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d, I1 },
450/* SVR4 PIC code requires special handling for jal, so it must be a
451 macro. */
452{"jal", "d,s", 0, (int) M_JAL_2, INSN_MACRO, I1 },
453{"jal", "s", 0, (int) M_JAL_1, INSN_MACRO, I1 },
454{"jal", "a", 0, (int) M_JAL_A, INSN_MACRO, I1 },
455/* This form of jal is used by the disassembler and internally by the
456 assembler, but will never match user input (because the line above
457 will match first). */
458{"jal", "a", 0x0c000000, 0xfc000000, UBD|WR_31, I1 },
459 /* jalx really should only be avaliable if mips16 is available,
460 but for now make it I1. */
461{"jalx", "a", 0x74000000, 0xfc000000, UBD|WR_31, I1 },
6e3708af 462{"la", "t,o(b)", 0x24000000, 0xfc000000, WR_t|RD_s, I1 }, /* addiu */
252b5132
RH		 463{"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, I1 },
464{"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
465{"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, I1 },
466{"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
467{"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, I1 },
468{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, I3 },
469{"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, I1 },
470{"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, I1 },
471{"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
472{"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
473{"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
474{"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
475{"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 }, /* ldc1 */
476{"l.d", "T,o(b)", 0, (int) M_L_DOB, INSN_MACRO, I1 },
477{"l.d", "T,A(b)", 0, (int) M_L_DAB, INSN_MACRO, I1 },
478{"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
479{"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, I2 },
480{"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
481{"ldc3", "E,A(b)", 0, (int) M_LDC3_AB, INSN_MACRO, I2 },
482{"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
483{"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, I3 },
484{"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
485{"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, I3 },
486{"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
487{"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
488{"lh", "t,A(b)", 0, (int) M_LH_AB, INSN_MACRO, I1 },
489{"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
490{"lhu", "t,A(b)", 0, (int) M_LHU_AB, INSN_MACRO, I1 },
491/* li is at the start of the table. */
492{"li.d", "t,F", 0, (int) M_LI_D, INSN_MACRO, I1 },
493{"li.d", "T,L", 0, (int) M_LI_DD, INSN_MACRO, I1 },
494{"li.s", "t,f", 0, (int) M_LI_S, INSN_MACRO, I1 },
495{"li.s", "T,l", 0, (int) M_LI_SS, INSN_MACRO, I1 },
496{"ll", "t,o(b)", 0xc0000000, 0xfc000000, LDD|RD_b|WR_t, I2 },
497{"ll", "t,A(b)", 0, (int) M_LL_AB, INSN_MACRO, I2 },
498{"lld", "t,o(b)", 0xd0000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
499{"lld", "t,A(b)", 0, (int) M_LLD_AB, INSN_MACRO, I3 },
500{"lui", "t,u", 0x3c000000, 0xffe00000, WR_t, I1 },
5fce5ddf 501{"luxc1", "D,t(b)", 0x4c000005, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I5 },
252b5132
RH		 502{"lw", "t,o(b)", 0x8c000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
503{"lw", "t,A(b)", 0, (int) M_LW_AB, INSN_MACRO, I1 },
504{"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
505{"lwc0", "E,A(b)", 0, (int) M_LWC0_AB, INSN_MACRO, I1 },
506{"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
507{"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
508{"lwc1", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
509{"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
510{"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 }, /* lwc1 */
511{"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
512{"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
513{"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, I1 },
514{"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
515{"lwc3", "E,A(b)", 0, (int) M_LWC3_AB, INSN_MACRO, I1 },
516{"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
517{"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I1 },
518{"lcache", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
519{"lcache", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I2 }, /* as lwl */
520{"lwr", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
521{"lwr", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I1 },
522{"flush", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
523{"flush", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I2 }, /* as lwr */
524{"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
525{"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, I3 },
526{"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
527
528
529{"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3 },
530{"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3 },
531{"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
532{"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
5fce5ddf 533{"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
252b5132 534{"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 },
c156a9fd 535{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M, G1|M1 },
252b5132
RH		 536{"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1 },
537{"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 },
c156a9fd 538{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M, G1|M1},
252b5132
RH		 539{"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1},
540{"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, V1 },
541{"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
c1485d85
NC		 542{"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1},
543{"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1},
252b5132
RH		 544{"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
545{"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
546{"mfhi", "d", 0x00000010, 0xffff07ff, WR_d|RD_HI, I1 },
547{"mflo", "d", 0x00000012, 0xffff07ff, WR_d|RD_LO, I1 },
548{"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D|RD_S|FP_D, I1 },
549{"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D|RD_S|FP_S, I1 },
5fce5ddf 550{"mov.ps", "D,S", 0x46c00006, 0xffff003f, WR_D|RD_S|FP_D, I5 },
c156a9fd
NC		 551{"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_D|FP_S, I4|M1},
552{"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|M1 },
553{"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|M1 },
5fce5ddf 554{"movf.ps", "D,S,N", 0x46c00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I5 },
c156a9fd 555{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, I4|M1 },
252b5132 556{"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d|RD_s,L1 },
c156a9fd
NC		 557{"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|M1 },
558{"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|M1 },
559{"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC, I4|M1 },
560{"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|M1 },
561{"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|M1 },
5fce5ddf 562{"movt.ps", "D,S,N", 0x46c10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I5},
c156a9fd 563{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, I4|M1 },
252b5132 564{"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d|RD_s,L1 },
c156a9fd
NC		 565{"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|M1 },
566{"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|M1 },
252b5132
RH		 567/* move is at the top of the table. */
568{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
569{"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
5fce5ddf 570{"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
252b5132
RH		 571{"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,L1 },
572{"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,L1 },
573{"mtc0", "t,G", 0x40800000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I1 },
574{"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
575{"mtc1", "t,G", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
576{"mtc2", "t,G", 0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I1 },
577{"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I1 },
578{"mthi", "s", 0x00000011, 0xfc1fffff, RD_s|WR_HI, I1 },
579{"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s|WR_LO, I1 },
580{"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
581{"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
5fce5ddf 582{"mul.ps", "D,V,T", 0x46c00002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
252b5132
RH		 583{"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,P3},
584{"mul", "d,v,t", 0, (int) M_MUL, INSN_MACRO, I1 },
585{"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, I1 },
586{"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO, I1 },
587{"mulo", "d,v,I", 0, (int) M_MULO_I, INSN_MACRO, I1 },
588{"mulou", "d,v,t", 0, (int) M_MULOU, INSN_MACRO, I1 },
589{"mulou", "d,v,I", 0, (int) M_MULOU_I, INSN_MACRO, I1 },
590{"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M, I1},
591{"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1},
592{"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M, I1},
593{"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1},
594{"neg", "d,w", 0x00000022, 0xffe007ff, WR_d|RD_t, I1 }, /* sub 0 */
595{"negu", "d,w", 0x00000023, 0xffe007ff, WR_d|RD_t, I1 }, /* subu 0 */
596{"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D|RD_S|FP_D, I1 },
597{"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D|RD_S|FP_S, I1 },
5fce5ddf 598{"neg.ps", "D,V", 0x46c00007, 0xffff003f, WR_D|RD_S|FP_D,I5 },
252b5132
RH		 599{"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
600{"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
5fce5ddf 601{"nmadd.ps","D,R,S,T", 0x4c000036, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
252b5132
RH		 602{"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
603{"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
5fce5ddf 604{"nmsub.ps","D,R,S,T", 0x4c00003e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
252b5132
RH		 605/* nop is at the start of the table. */
606{"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
607{"nor", "t,r,I", 0, (int) M_NOR_I, INSN_MACRO, I1 },
608{"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d|RD_s|RD_t, I1 },/*nor d,s,0*/
609{"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
610{"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO, I1 },
611{"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t|RD_s, I1 },
612
5fce5ddf
GRK		 613{"pll.ps", "D,V,T", 0x46c0002c, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5},
614{"plu.ps", "D,V,T", 0x46c0002d, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5},
252b5132 615
c156a9fd 616{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, G3|M1 },
252b5132
RH		 617{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, I4 },
618
5fce5ddf
GRK		 619{"pul.ps", "D,V,T", 0x46c0002e, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5},
620{"puu.ps", "D,V,T", 0x46c0002f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5},
252b5132
RH		 621
622{"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D|RD_S|FP_D, I4 },
623{"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D|RD_S|FP_S, I4 },
624{"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
625{"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO, I1 },
626{"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO, I1 },
627{"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
628{"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, I1 },
629{"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, I1 },
630{"rfe", "", 0x42000010, 0xffffffff, 0, I1|T3 },
631{"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, I1 },
632{"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I1 },
633{"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I1 },
634{"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I1 },
635{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3 },
636{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3 },
637{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2 },
638{"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D|RD_S|FP_S, I2 },
639{"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D|RD_S|FP_D, I4 },
640{"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, I4 },
641{"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM|RD_t|RD_b, I1 },
642{"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, I1 },
643{"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I2 },
644{"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, I2 },
645{"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I3 },
646{"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, I3 },
647{"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, I3 },
648{"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, I1 },
649{"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, I1 },
c156a9fd
NC		 650{"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, G2|M1 },
651{"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP, G2|M1 },
652{"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP, G2|M1 },
252b5132
RH		 653{"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
654{"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
655{"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
656{"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
657{"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM|RD_C2|RD_b, I2 },
658{"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, I2 },
659{"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, I2 },
660{"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, I2 },
661{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
662{"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, I1 },
663{"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, I1 },
664{"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, I3 },
665{"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, I3 },
666{"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM|RD_t|RD_b, I3 },
667{"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, I3 },
668{"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
669{"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t,L1 },
670{"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t,L1 },
671{"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, I1 },
672{"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, I1 },
673{"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, I1 },
674{"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, I1 },
675{"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, I1 },
676{"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO, I1 },
677{"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO, I1 },
678{"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO, I1 },
679{"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO, I1 },
680{"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO, I1 },
681{"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM|RD_t|RD_b, I1 },
682{"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO, I1 },
683{"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, I1 },
684{"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, I1 },
685{"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO, I1 },
686{"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO, I1 },
687{"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
688{"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* sllv */
689{"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d|RD_t, I1 },
690{"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
691{"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO, I1 },
692{"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t|RD_s, I1 },
693{"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t|RD_s, I1 },
694{"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
695{"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, I1 },
696{"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, I1 },
697{"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, I1 },
698{"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D|RD_S|FP_D, I2 },
699{"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D|RD_S|FP_S, I2 },
700{"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
701{"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srav */
702{"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d|RD_t, I1 },
703{"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
704{"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srlv */
705{"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d|RD_t, I1 },
c156a9fd 706{"ssnop", "", 0x00000040, 0xffffffff, 0, M1 },
252b5132
RH		 707{"standby", "", 0x42000021, 0xffffffff, 0, V1 },
708{"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
709{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, I1 },
710{"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
711{"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
5fce5ddf 712{"sub.ps", "D,V,T", 0x46c00001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
252b5132
RH		 713{"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
714{"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO, I1 },
715{"suspend", "", 0x42000022, 0xffffffff, 0, V1 },
5fce5ddf 716{"suxc1", "S,t(b)", 0x4c00000d, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I5 },
252b5132
RH		 717{"sw", "t,o(b)", 0xac000000, 0xfc000000, SM|RD_t|RD_b, I1 },
718{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, I1 },
719{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM|RD_C0|RD_b, I1 },
720{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, I1 },
721{"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
722{"swc1", "E,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
723{"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
724{"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
725{"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 }, /* swc1 */
726{"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
727{"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM|RD_C2|RD_b, I1 },
728{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, I1 },
729{"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM|RD_C3|RD_b, I1 },
730{"swc3", "E,A(b)", 0, (int) M_SWC3_AB, INSN_MACRO, I1 },
731{"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
732{"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I1 },
733{"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
734{"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I2 }, /* as swl */
735{"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
736{"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, I1 },
737{"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
738{"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, I2 }, /* as swr */
739{"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
740{"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2|G1 },
741{"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, I2 },
742{"sync.l", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2 },
743{"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 },
744{"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 },
745{"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 },
746{"teq", "s,t", 0x00000034, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
747{"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
748{"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* teqi */
749{"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, I2 },
750{"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 },
751{"tge", "s,t", 0x00000030, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
752{"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
753{"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgei */
754{"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, I2 },
755{"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 },
756{"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
757{"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
758{"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgeiu */
759{"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, I2 },
c156a9fd
NC		 760{"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, I1|M1 },
761{"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, I1|M1 },
762{"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, I1|M1 },
763{"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, I1|M1 },
252b5132
RH		 764{"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 },
765{"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
766{"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
767{"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tlti */
768{"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, I2 },
769{"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 },
770{"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
771{"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
772{"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tltiu */
773{"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, I2 },
774{"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 },
775{"tne", "s,t", 0x00000036, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
776{"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
777{"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tnei */
778{"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, I2 },
779{"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|FP_D, I3 },
780{"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D|RD_S|FP_S, I3 },
781{"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
782{"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
783{"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD, INSN_MACRO, I1 },
784{"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
785{"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
786{"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS, INSN_MACRO, I1 },
787{"uld", "t,o(b)", 0, (int) M_ULD, INSN_MACRO, I3 },
788{"uld", "t,A(b)", 0, (int) M_ULD_A, INSN_MACRO, I3 },
789{"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO, I1 },
790{"ulh", "t,A(b)", 0, (int) M_ULH_A, INSN_MACRO, I1 },
791{"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO, I1 },
792{"ulhu", "t,A(b)", 0, (int) M_ULHU_A, INSN_MACRO, I1 },
793{"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO, I1 },
794{"ulw", "t,A(b)", 0, (int) M_ULW_A, INSN_MACRO, I1 },
795{"usd", "t,o(b)", 0, (int) M_USD, INSN_MACRO, I3 },
796{"usd", "t,A(b)", 0, (int) M_USD_A, INSN_MACRO, I3 },
797{"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO, I1 },
798{"ush", "t,A(b)", 0, (int) M_USH_A, INSN_MACRO, I1 },
799{"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO, I1 },
800{"usw", "t,A(b)", 0, (int) M_USW_A, INSN_MACRO, I1 },
801{"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
802{"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, I1 },
803{"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t|RD_s, I1 },
c156a9fd 804{"wait", "", 0x42000020, 0xffffffff, TRAP, I3|M1 },
252b5132
RH		 805{"waiti", "", 0x42000020, 0xffffffff, TRAP, L1 },
806{"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM|RD_b, L1 },
807/* No hazard protection on coprocessor instructions--they shouldn't
808 change the state of the processor and if they do it's up to the
809 user to put in nops as necessary. These are at the end so that the
810 disasembler recognizes more specific versions first. */
811{"c0", "C", 0x42000000, 0xfe000000, 0, I1 },
812{"c1", "C", 0x46000000, 0xfe000000, 0, I1 },
813{"c2", "C", 0x4a000000, 0xfe000000, 0, I1 },
814{"c3", "C", 0x4e000000, 0xfe000000, 0, I1 },
815{"cop0", "C", 0, (int) M_COP0, INSN_MACRO, I1 },
816{"cop1", "C", 0, (int) M_COP1, INSN_MACRO, I1 },
817{"cop2", "C", 0, (int) M_COP2, INSN_MACRO, I1 },
818{"cop3", "C", 0, (int) M_COP3, INSN_MACRO, I1 },
819
820 /* Conflicts with the 4650's "mul" instruction. Nobody's using the
821 4010 any more, so move this insn out of the way. If the object
822 format gave us more info, we could do this right. */
823{"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t|RD_s,L1 },
824};
825
826#define MIPS_NUM_OPCODES \
827 ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
828const int bfd_mips_num_builtin_opcodes = MIPS_NUM_OPCODES;
829
830/* const removed from the following to allow for dynamic extensions to the
831 * built-in instruction set. */
832struct mips_opcode *mips_opcodes =
833 (struct mips_opcode *) mips_builtin_opcodes;
834int bfd_mips_num_opcodes = MIPS_NUM_OPCODES;
835#undef MIPS_NUM_OPCODES
836
GDB Binutils - Deliverables
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