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Document new --unwind option to readelf.
[deliverable/binutils-gdb.git] / opcodes / mips-opc.c
CommitLineData
657e7cec 1/* mips-opc.c -- MIPS opcode list.
239f0c5c 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 2000 Free Software Foundation, Inc.
252b5132
RH		 3 Contributed by Ralph Campbell and OSF
4 Commented and modified by Ian Lance Taylor, Cygnus Support
e70f2590 5 Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
252b5132
RH		 6
7This file is part of GDB, GAS, and the GNU binutils.
8
9GDB, GAS, and the GNU binutils are free software; you can redistribute
10them and/or modify them under the terms of the GNU General Public
11License as published by the Free Software Foundation; either version
121, or (at your option) any later version.
13
14GDB, GAS, and the GNU binutils are distributed in the hope that they
15will be useful, but WITHOUT ANY WARRANTY; without even the implied
16warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
17the GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License
20along with this file; see the file COPYING. If not, write to the Free
21Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22
23#include <stdio.h>
0d8dfecf 24#include "sysdep.h"
252b5132
RH		 25#include "opcode/mips.h"
26
27/* Short hand so the lines aren't too long. */
28
29#define LDD INSN_LOAD_MEMORY_DELAY
30#define LCD INSN_LOAD_COPROC_DELAY
31#define UBD INSN_UNCOND_BRANCH_DELAY
32#define CBD INSN_COND_BRANCH_DELAY
33#define COD INSN_COPROC_MOVE_DELAY
34#define CLD INSN_COPROC_MEMORY_DELAY
35#define CBL INSN_COND_BRANCH_LIKELY
36#define TRAP INSN_TRAP
37#define SM INSN_STORE_MEMORY
38
39#define WR_d INSN_WRITE_GPR_D
40#define WR_t INSN_WRITE_GPR_T
41#define WR_31 INSN_WRITE_GPR_31
42#define WR_D INSN_WRITE_FPR_D
43#define WR_T INSN_WRITE_FPR_T
44#define WR_S INSN_WRITE_FPR_S
45#define RD_s INSN_READ_GPR_S
46#define RD_b INSN_READ_GPR_S
47#define RD_t INSN_READ_GPR_T
48#define RD_S INSN_READ_FPR_S
49#define RD_T INSN_READ_FPR_T
50#define RD_R INSN_READ_FPR_R
51#define WR_CC INSN_WRITE_COND_CODE
52#define RD_CC INSN_READ_COND_CODE
53#define RD_C0 INSN_COP
54#define RD_C1 INSN_COP
55#define RD_C2 INSN_COP
56#define RD_C3 INSN_COP
57#define WR_C0 INSN_COP
58#define WR_C1 INSN_COP
59#define WR_C2 INSN_COP
60#define WR_C3 INSN_COP
61
62#define WR_HI INSN_WRITE_HI
63#define RD_HI INSN_READ_HI
64#define MOD_HI WR_HI|RD_HI
65
66#define WR_LO INSN_WRITE_LO
67#define RD_LO INSN_READ_LO
68#define MOD_LO WR_LO|RD_LO
69
70#define WR_HILO WR_HI|WR_LO
71#define RD_HILO RD_HI|RD_LO
72#define MOD_HILO WR_HILO|RD_HILO
73
74#define IS_M INSN_MULT
75
76#define I1 INSN_ISA1
77#define I2 INSN_ISA2
78#define I3 INSN_ISA3
79#define I4 INSN_ISA4
5fce5ddf 80#define I5 INSN_ISA5
e7af610e 81#define I32 INSN_ISA32
84ea6cf2 82#define I64 INSN_ISA64
e7af610e 83
252b5132
RH		 84#define P3 INSN_4650
85#define L1 INSN_4010
86#define V1 INSN_4100
87#define T3 INSN_3900
88
89#define G1 (T3 \
90 )
91
92#define G2 (T3 \
93 )
94
95#define G3 (I4 \
96 )
97
8027df89
AH		 98#define G6 INSN_GP32
99
252b5132
RH		 100/* The order of overloaded instructions matters. Label arguments and
101 register arguments look the same. Instructions that can have either
102 for arguments must apear in the correct order in this table for the
103 assembler to pick the right one. In other words, entries with
104 immediate operands must apear after the same instruction with
105 registers.
106
107 Many instructions are short hand for other instructions (i.e., The
108 jal <register> instruction is short for jalr <register>). */
109
4372b673
NC		 110const struct mips_opcode mips_builtin_opcodes[] =
111{
252b5132
RH		 112/* These instructions appear first so that the disassembler will find
113 them first. The assemblers uses a hash table based on the
114 instruction name anyhow. */
08fe7a7e 115/* name, args, match, mask, pinfo, membership */
15305553 116{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, I32|G3 },
08fe7a7e 117{"nop", "", 0x00000000, 0xffffffff, 0, I1 },
15305553 118{"ssnop", "", 0x00000040, 0xffffffff, 0, I32 },
08fe7a7e
NC		 119{"li", "t,j", 0x24000000, 0xffe00000, WR_t, I1 }, /* addiu */
120{"li", "t,i", 0x34000000, 0xffe00000, WR_t, I1 }, /* ori */
121{"li", "t,I", 0, (int) M_LI, INSN_MACRO, I1 },
122{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1|G6 },/* or */
123{"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, I3 },/* daddu */
124{"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d|RD_s, I1 },/* addu */
125{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1 },/* or */
126{"b", "p", 0x10000000, 0xffff0000, UBD, I1 },/* beq 0,0 */
127{"b", "p", 0x04010000, 0xffff0000, UBD, I1 },/* bgez 0 */
128{"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31, I1 },/* bgezal 0*/
252b5132 129
e70f2590
NC		 130{"abs", "d,v", 0, (int) M_ABS, INSN_MACRO, I1 },
131{"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D|RD_S|FP_S, I1 },
132{"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D|RD_S|FP_D, I1 },
133{"abs.ps", "D,V", 0x46c00005, 0xffff003f, WR_D|RD_S|FP_D, I5 },
134{"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
135{"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, I1 },
136{"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
137{"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
138{"add.ps", "D,V,T", 0x46c00000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
139{"addi", "t,r,j", 0x20000000, 0xfc000000, WR_t|RD_s, I1 },
140{"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_t|RD_s, I1 },
141{"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
142{"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO, I1 },
143{"alnv.ps", "D,V,T,s", 0x4c00001e, 0xfc00003f, WR_D|RD_S|RD_T|FP_D, I5 },
144{"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
145{"and", "t,r,I", 0, (int) M_AND_I, INSN_MACRO, I1 },
146{"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t|RD_s, I1 },
252b5132
RH		 147/* b is at the top of the table. */
148/* bal is at the top of the table. */
08fe7a7e
NC		 149{"bc0f", "p", 0x41000000, 0xffff0000, CBD|RD_CC, I1 },
150{"bc0fl", "p", 0x41020000, 0xffff0000, CBL|RD_CC, I2|T3 },
15305553
NC		 151{"bc1f", "p", 0x45000000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
152{"bc1f", "N,p", 0x45000000, 0xffe30000, CBD|RD_CC|FP_S, I4|I32 },
153{"bc1fl", "p", 0x45020000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
154{"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL|RD_CC|FP_S, I4|I32 },
08fe7a7e
NC		 155{"bc2f", "p", 0x49000000, 0xffff0000, CBD|RD_CC, I1 },
156{"bc2fl", "p", 0x49020000, 0xffff0000, CBL|RD_CC, I2|T3 },
157{"bc3f", "p", 0x4d000000, 0xffff0000, CBD|RD_CC, I1 },
158{"bc3fl", "p", 0x4d020000, 0xffff0000, CBL|RD_CC, I2|T3 },
159{"bc0t", "p", 0x41010000, 0xffff0000, CBD|RD_CC, I1 },
160{"bc0tl", "p", 0x41030000, 0xffff0000, CBL|RD_CC, I2|T3 },
161{"bc1t", "p", 0x45010000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
15305553 162{"bc1t", "N,p", 0x45010000, 0xffe30000, CBD|RD_CC|FP_S, I4|I32 },
08fe7a7e 163{"bc1tl", "p", 0x45030000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
15305553 164{"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL|RD_CC|FP_S, I4|I32 },
08fe7a7e
NC		 165{"bc2t", "p", 0x49010000, 0xffff0000, CBD|RD_CC, I1 },
166{"bc2tl", "p", 0x49030000, 0xffff0000, CBL|RD_CC, I2|T3 },
167{"bc3t", "p", 0x4d010000, 0xffff0000, CBD|RD_CC, I1 },
168{"bc3tl", "p", 0x4d030000, 0xffff0000, CBL|RD_CC, I2|T3 },
169{"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD|RD_s, I1 },
170{"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
171{"beq", "s,t,p", 0x10000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
172{"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, I1 },
173{"beql", "s,t,p", 0x50000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
174{"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, I2 },
175{"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO, I1 },
176{"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO, I1 },
177{"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, I2 },
178{"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, I2 },
179{"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO, I1 },
180{"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO, I1 },
181{"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, I2 },
182{"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, I2 },
183{"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD|RD_s, I1 },
184{"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL|RD_s, I2|T3 },
185{"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
186{"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL|RD_s, I2|T3 },
187{"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO, I1 },
188{"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO, I1 },
189{"bgtl", "s,t,p", 0, (int) M_BGTL, INSN_MACRO, I2 },
190{"bgtl", "s,I,p", 0, (int) M_BGTL_I, INSN_MACRO, I2 },
191{"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO, I1 },
192{"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO, I1 },
193{"bgtul", "s,t,p", 0, (int) M_BGTUL, INSN_MACRO, I2 },
194{"bgtul", "s,I,p", 0, (int) M_BGTUL_I, INSN_MACRO, I2 },
195{"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD|RD_s, I1 },
196{"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
197{"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO, I1 },
198{"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO, I1 },
199{"blel", "s,t,p", 0, (int) M_BLEL, INSN_MACRO, I2 },
200{"blel", "s,I,p", 0, (int) M_BLEL_I, INSN_MACRO, I2 },
201{"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO, I1 },
202{"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO, I1 },
203{"bleul", "s,t,p", 0, (int) M_BLEUL, INSN_MACRO, I2 },
204{"bleul", "s,I,p", 0, (int) M_BLEUL_I, INSN_MACRO, I2 },
205{"blez", "s,p", 0x18000000, 0xfc1f0000, CBD|RD_s, I1 },
206{"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
207{"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO, I1 },
208{"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO, I1 },
209{"bltl", "s,t,p", 0, (int) M_BLTL, INSN_MACRO, I2 },
210{"bltl", "s,I,p", 0, (int) M_BLTL_I, INSN_MACRO, I2 },
211{"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO, I1 },
212{"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO, I1 },
213{"bltul", "s,t,p", 0, (int) M_BLTUL, INSN_MACRO, I2 },
214{"bltul", "s,I,p", 0, (int) M_BLTUL_I, INSN_MACRO, I2 },
215{"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD|RD_s, I1 },
216{"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL|RD_s, I2|T3 },
217{"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
218{"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL|RD_s, I2|T3 },
219{"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD|RD_s, I1 },
220{"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
221{"bne", "s,t,p", 0x14000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
222{"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, I1 },
223{"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
224{"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, I2 },
225{"break", "", 0x0000000d, 0xffffffff, TRAP, I1 },
226{"break", "B", 0x0000000d, 0xfc00003f, TRAP, I32 },
227{"break", "c", 0x0000000d, 0xfc00ffff, TRAP, I1 },
228{"break", "c,q", 0x0000000d, 0xfc00003f, TRAP, I1 },
252b5132 229{"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 230{"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 231{"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 232{"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 233{"c.f.ps", "S,T", 0x46c00030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
234{"c.f.ps", "M,S,T", 0x46c00030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 235{"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 236{"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 237{"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 238{"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 239{"c.un.ps", "S,T", 0x46c00031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
240{"c.un.ps", "M,S,T", 0x46c00031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 241{"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 242{"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 243{"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 244{"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 245{"c.eq.ps", "S,T", 0x46c00032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
246{"c.eq.ps", "M,S,T", 0x46c00032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 247{"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 248{"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 249{"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 250{"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 251{"c.ueq.ps","S,T", 0x46c00033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252{"c.ueq.ps","M,S,T", 0x46c00033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
c156a9fd 253{"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 254{"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
e70f2590 255{"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 256{"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
252b5132 257{"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 258{"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 259{"c.olt.ps","S,T", 0x46c00034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
260{"c.olt.ps","M,S,T", 0x46c00034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 261{"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 262{"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 263{"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 264{"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 265{"c.ult.ps","S,T", 0x46c00035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
266{"c.ult.ps","M,S,T", 0x46c00035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
c156a9fd 267{"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 268{"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
e70f2590 269{"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 270{"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 271{"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 272{"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 273{"c.ole.ps","S,T", 0x46c00036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
274{"c.ole.ps","M,S,T", 0x46c00036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 275{"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 276{"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 277{"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 278{"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 279{"c.ule.ps","S,T", 0x46c00037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
280{"c.ule.ps","M,S,T", 0x46c00037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 281{"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 282{"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 283{"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 284{"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 285{"c.sf.ps", "S,T", 0x46c00038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
286{"c.sf.ps", "M,S,T", 0x46c00038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 287{"c.ngle.d","S,T", 0x46200039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 288{"c.ngle.d","M,S,T", 0x46200039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 289{"c.ngle.s","S,T", 0x46000039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 290{"c.ngle.s","M,S,T", 0x46000039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 291{"c.ngle.ps","S,T", 0x46c00039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
292{"c.ngle.ps","M,S,T", 0x46c00039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 293{"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 294{"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 295{"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 296{"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 297{"c.seq.ps","S,T", 0x46c0003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
298{"c.seq.ps","M,S,T", 0x46c0003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 299{"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 300{"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 301{"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 302{"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 303{"c.ngl.ps","S,T", 0x46c0003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
304{"c.ngl.ps","M,S,T", 0x46c0003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 305{"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 306{"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
5fce5ddf
GRK		 307{"c.lt.ps", "S,T", 0x46c0003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
308{"c.lt.ps", "M,S,T", 0x46c0003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 309{"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 310{"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 311{"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 312{"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 313{"c.nge.ps","S,T", 0x46c0003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
314{"c.nge.ps","M,S,T", 0x46c0003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 315{"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 316{"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
5fce5ddf
GRK		 317{"c.le.ps", "S,T", 0x46c0003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
318{"c.le.ps", "M,S,T", 0x46c0003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 319{"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
15305553 320{"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
e70f2590 321{"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
15305553 322{"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
5fce5ddf
GRK		 323{"c.ngt.ps","S,T", 0x46c0003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
324{"c.ngt.ps","M,S,T", 0x46c0003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
15305553 325{"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, I3|I32|T3},
e70f2590
NC		 326{"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, I3 },
327{"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S, I3 },
328{"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D|RD_S|FP_D, I2 },
329{"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D|RD_S|FP_S, I2 },
330{"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
252b5132
RH		 331{"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
332{"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
e70f2590
NC		 333{"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
334{"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
335{"clo", "U,s", 0x70000021, 0xfc0007ff, WR_d|WR_t|RD_s, I32 },
336{"clz", "U,s", 0x70000020, 0xfc0007ff, WR_d|WR_t|RD_s, I32 },
337{"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
252b5132
RH		 338{"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
339{"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
e70f2590
NC		 340{"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
341{"ctc3", "t,G", 0x4cc00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
342{"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, I3 },
252b5132 343{"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D|RD_S|FP_D|FP_S, I1 },
e70f2590
NC		 344{"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D|RD_S|FP_D, I1 },
345{"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|FP_D, I3 },
346{"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|FP_S, I3 },
347{"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|FP_S, I3 },
252b5132 348{"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I1 },
e70f2590 349{"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D|RD_S|FP_S, I1 },
5fce5ddf
GRK		 350{"cvt.s.pl","D,S", 0x46c00028, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I5 },
351{"cvt.s.pu","D,S", 0x46c00020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I5 },
e70f2590
NC		 352{"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D|RD_S|FP_D, I1 },
353{"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D|RD_S|FP_S, I1 },
354{"cvt.ps.s","D,V,T", 0x46000026, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
355{"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, I3 },
356{"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
357{"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, I3 },
358{"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t|RD_s, I3 },
359{"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t|RD_s, I3 },
360{"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
361{"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, I3 },
0808b8a9
NC		 362{"dclo", "U,s", 0x70000025, 0xfc0007ff, RD_s|WR_d|WR_t, I64 },
363{"dclz", "U,s", 0x70000024, 0xfc0007ff, RD_s|WR_d|WR_t, I64 },
252b5132 364/* dctr and dctw are used on the r5000. */
e70f2590
NC		 365{"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b, I3 },
366{"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, I3 },
15305553 367{"deret", "", 0x4200001f, 0xffffffff, 0, I32|G2 },
252b5132 368/* For ddiv, see the comments about div. */
08fe7a7e 369{"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
e70f2590
NC		 370{"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, I3 },
371{"ddiv", "d,v,I", 0, (int) M_DDIV_3I, INSN_MACRO, I3 },
252b5132 372/* For ddivu, see the comments about div. */
08fe7a7e 373{"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
e70f2590
NC		 374{"ddivu", "d,v,t", 0, (int) M_DDIVU_3, INSN_MACRO, I3 },
375{"ddivu", "d,v,I", 0, (int) M_DDIVU_3I, INSN_MACRO, I3 },
252b5132
RH		 376/* The MIPS assembler treats the div opcode with two operands as
377 though the first operand appeared twice (the first operand is both
378 a source and a destination). To get the div machine instruction,
379 you must use an explicit destination of $0. */
08fe7a7e
NC		 380{"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
381{"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HILO, I1 },
e70f2590
NC		 382{"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO, I1 },
383{"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO, I1 },
252b5132
RH		 384{"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
385{"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
386/* For divu, see the comments about div. */
08fe7a7e
NC		 387{"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
388{"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HILO, I1 },
e70f2590
NC		 389{"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, I1 },
390{"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, I1 },
391{"dla", "t,o(b)", 0x64000000, 0xfc000000, WR_t|RD_s, I3 }, /* daddiu */
392{"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, I3 },
393{"dli", "t,j", 0x24000000, 0xffe00000, WR_t, I3 }, /* addiu */
394{"dli", "t,i", 0x34000000, 0xffe00000, WR_t, I3 }, /* ori */
395{"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, I3 },
252b5132 396
08fe7a7e 397{"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s|RD_t|MOD_LO, V1 },
e70f2590 398{"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD|WR_t|RD_C0, I3 },
0808b8a9 399{"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, I64 },
252b5132 400{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I3 },
0808b8a9 401{"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I64 },
252b5132 402{"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
0808b8a9 403{"dmfc1", "t,G", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
252b5132 404{"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
0808b8a9
NC		 405{"dmtc1", "t,G", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
406{"dmfc2", "t,G", 0x48200000, 0xffe007ff, LCD|WR_t|RD_C2, I3 },
407{"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, LCD|WR_t|RD_C2, I64 },
408{"dmtc2", "t,G", 0x48a00000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I3 },
409{"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, I64 },
410{"dmfc3", "t,G", 0x4c200000, 0xffe007ff, LCD|WR_t|RD_C3, I3 },
411{"dmfc3", "t,G,H", 0x4c200000, 0xffe007f8, LCD|WR_t|RD_C3, I64 },
412{"dmtc3", "t,G", 0x4ca00000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I3 },
413{"dmtc3", "t,G,H", 0x4ca00000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC, I64 },
e70f2590
NC		 414{"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, I3 },
415{"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, I3 },
416{"dmulo", "d,v,t", 0, (int) M_DMULO, INSN_MACRO, I3 },
417{"dmulo", "d,v,I", 0, (int) M_DMULO_I, INSN_MACRO, I3 },
418{"dmulou", "d,v,t", 0, (int) M_DMULOU, INSN_MACRO, I3 },
419{"dmulou", "d,v,I", 0, (int) M_DMULOU_I, INSN_MACRO, I3 },
08fe7a7e
NC		 420{"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
421{"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
e70f2590
NC		 422{"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d|RD_t, I3 }, /* dsub 0 */
423{"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d|RD_t, I3 }, /* dsubu 0*/
08fe7a7e 424{"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
e70f2590
NC		 425{"drem", "d,v,t", 3, (int) M_DREM_3, INSN_MACRO, I3 },
426{"drem", "d,v,I", 3, (int) M_DREM_3I, INSN_MACRO, I3 },
08fe7a7e 427{"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
e70f2590
NC		 428{"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 },
429{"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 },
430{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
431{"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 },
432{"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
433{"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 }, /* dsll32 */
434{"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_d|RD_t, I3 },
435{"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
436{"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 },
437{"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrav */
438{"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 }, /* dsra32 */
439{"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_d|RD_t, I3 },
440{"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
441{"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 },
442{"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrlv */
443{"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 }, /* dsrl32 */
444{"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_d|RD_t, I3 },
445{"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
446{"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, I3 },
447{"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
448{"dsubu", "d,v,I", 0, (int) M_DSUBU_I, INSN_MACRO, I3 },
15305553 449{"eret", "", 0x42000018, 0xffffffff, 0, I3|I32 },
e70f2590
NC		 450{"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, I3 },
451{"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S, I3 },
452{"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_D, I2 },
453{"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D|RD_S|FP_S, I2 },
454{"flushi", "", 0xbc010000, 0xffffffff, 0, L1 },
455{"flushd", "", 0xbc020000, 0xffffffff, 0, L1 },
456{"flushid", "", 0xbc030000, 0xffffffff, 0, L1 },
457{"hibernate","", 0x42000023, 0xffffffff, 0, V1 },
458{"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 },
459{"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 }, /* jr */
252b5132
RH		 460/* SVR4 PIC code requires special handling for j, so it must be a
461 macro. */
e70f2590 462{"j", "a", 0, (int) M_J_A, INSN_MACRO, I1 },
252b5132
RH		 463/* This form of j is used by the disassembler and internally by the
464 assembler, but will never match user input (because the line above
465 will match first). */
e70f2590
NC		 466{"j", "a", 0x08000000, 0xfc000000, UBD, I1 },
467{"jalr", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d, I1 },
468{"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d, I1 },
252b5132
RH		 469/* SVR4 PIC code requires special handling for jal, so it must be a
470 macro. */
e70f2590
NC		 471{"jal", "d,s", 0, (int) M_JAL_2, INSN_MACRO, I1 },
472{"jal", "s", 0, (int) M_JAL_1, INSN_MACRO, I1 },
473{"jal", "a", 0, (int) M_JAL_A, INSN_MACRO, I1 },
252b5132
RH		 474/* This form of jal is used by the disassembler and internally by the
475 assembler, but will never match user input (because the line above
476 will match first). */
e70f2590 477{"jal", "a", 0x0c000000, 0xfc000000, UBD|WR_31, I1 },
252b5132
RH		 478 /* jalx really should only be avaliable if mips16 is available,
479 but for now make it I1. */
e70f2590
NC		 480{"jalx", "a", 0x74000000, 0xfc000000, UBD|WR_31, I1 },
481{"la", "t,o(b)", 0x24000000, 0xfc000000, WR_t|RD_s, I1 }, /* addiu */
482{"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, I1 },
483{"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
484{"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, I1 },
485{"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
486{"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, I1 },
487{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, I3 },
488{"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, I1 },
489{"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, I1 },
252b5132
RH		 490{"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
491{"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
e70f2590
NC		 492{"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
493{"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
252b5132 494{"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 }, /* ldc1 */
e70f2590
NC		 495{"l.d", "T,o(b)", 0, (int) M_L_DOB, INSN_MACRO, I1 },
496{"l.d", "T,A(b)", 0, (int) M_L_DAB, INSN_MACRO, I1 },
497{"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
498{"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, I2 },
499{"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
500{"ldc3", "E,A(b)", 0, (int) M_LDC3_AB, INSN_MACRO, I2 },
501{"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
502{"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, I3 },
503{"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
504{"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, I3 },
252b5132 505{"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
e70f2590
NC		 506{"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
507{"lh", "t,A(b)", 0, (int) M_LH_AB, INSN_MACRO, I1 },
508{"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
509{"lhu", "t,A(b)", 0, (int) M_LHU_AB, INSN_MACRO, I1 },
252b5132 510/* li is at the start of the table. */
e70f2590
NC		 511{"li.d", "t,F", 0, (int) M_LI_D, INSN_MACRO, I1 },
512{"li.d", "T,L", 0, (int) M_LI_DD, INSN_MACRO, I1 },
513{"li.s", "t,f", 0, (int) M_LI_S, INSN_MACRO, I1 },
514{"li.s", "T,l", 0, (int) M_LI_SS, INSN_MACRO, I1 },
515{"ll", "t,o(b)", 0xc0000000, 0xfc000000, LDD|RD_b|WR_t, I2 },
516{"ll", "t,A(b)", 0, (int) M_LL_AB, INSN_MACRO, I2 },
517{"lld", "t,o(b)", 0xd0000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
518{"lld", "t,A(b)", 0, (int) M_LLD_AB, INSN_MACRO, I3 },
519{"lui", "t,u", 0x3c000000, 0xffe00000, WR_t, I1 },
5fce5ddf 520{"luxc1", "D,t(b)", 0x4c000005, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I5 },
e70f2590
NC		 521{"lw", "t,o(b)", 0x8c000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
522{"lw", "t,A(b)", 0, (int) M_LW_AB, INSN_MACRO, I1 },
523{"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
524{"lwc0", "E,A(b)", 0, (int) M_LWC0_AB, INSN_MACRO, I1 },
252b5132
RH		 525{"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
526{"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
e70f2590
NC		 527{"lwc1", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
528{"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
252b5132 529{"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 }, /* lwc1 */
e70f2590
NC		 530{"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
531{"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
532{"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, I1 },
533{"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
534{"lwc3", "E,A(b)", 0, (int) M_LWC3_AB, INSN_MACRO, I1 },
535{"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
536{"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I1 },
537{"lcache", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
538{"lcache", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I2 }, /* as lwl */
539{"lwr", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
540{"lwr", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I1 },
541{"flush", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
542{"flush", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I2 }, /* as lwr */
543{"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
544{"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, I3 },
252b5132 545{"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
08fe7a7e
NC		 546{"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO, P3 },
547{"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO, P3 },
15305553
NC		 548{"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
549{"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
550{"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
551{"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
552{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32},
553{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, G1 },
554{"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
555{"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
556{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32},
557{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, G1 },
558{"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
559{"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|MOD_HILO, V1 },
e70f2590
NC		 560{"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
561{"mfc0", "t,G,H", 0x40000000, 0xffe007f8, LCD|WR_t|RD_C0, I32 },
562{"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
563{"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
e70f2590
NC		 564{"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
565{"mfc2", "t,G,H", 0x48000000, 0xffe007f8, LCD|WR_t|RD_C2, I32 },
566{"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
567{"mfc3", "t,G,H", 0x4c000000, 0xffe007f8, LCD|WR_t|RD_C3, I32 },
568{"mfhi", "d", 0x00000010, 0xffff07ff, WR_d|RD_HI, I1 },
569{"mflo", "d", 0x00000012, 0xffff07ff, WR_d|RD_LO, I1 },
570{"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D|RD_S|FP_D, I1 },
571{"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D|RD_S|FP_S, I1 },
572{"mov.ps", "D,S", 0x46c00006, 0xffff003f, WR_D|RD_S|FP_D, I5 },
15305553
NC		 573{"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_D|FP_S, I4|I32},
574{"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|I32 },
575{"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|I32 },
5fce5ddf 576{"movf.ps", "D,S,N", 0x46c00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I5 },
15305553 577{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, I4|I32 },
e70f2590 578{"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d|RD_s, L1 },
15305553
NC		 579{"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|I32 },
580{"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|I32 },
581{"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC, I4|I32 },
582{"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|I32 },
583{"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|I32 },
e70f2590 584{"movt.ps", "D,S,N", 0x46c10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I5 },
15305553 585{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, I4|I32 },
e70f2590 586{"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d|RD_s, L1 },
15305553
NC		 587{"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|I32 },
588{"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|I32 },
252b5132 589/* move is at the top of the table. */
15305553
NC		 590{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
591{"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
592{"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
08fe7a7e
NC		 593{"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
594{"msub", "s,t", 0x70000004, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32 },
595{"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
596{"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32 },
252b5132 597{"mtc0", "t,G", 0x40800000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I1 },
e7af610e 598{"mtc0", "t,G,H", 0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I32 },
252b5132
RH		 599{"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
600{"mtc1", "t,G", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
601{"mtc2", "t,G", 0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I1 },
e7af610e 602{"mtc2", "t,G,H", 0x48800000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, I32 },
252b5132 603{"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I1 },
e7af610e 604{"mtc3", "t,G,H", 0x4c800000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC, I32 },
e70f2590
NC		 605{"mthi", "s", 0x00000011, 0xfc1fffff, RD_s|WR_HI, I1 },
606{"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s|WR_LO, I1 },
252b5132
RH		 607{"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
608{"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
5fce5ddf 609{"mul.ps", "D,V,T", 0x46c00002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
08fe7a7e 610{"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, I32|P3 },
e70f2590
NC		 611{"mul", "d,v,t", 0, (int) M_MUL, INSN_MACRO, I1 },
612{"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, I1 },
613{"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO, I1 },
614{"mulo", "d,v,I", 0, (int) M_MULO_I, INSN_MACRO, I1 },
615{"mulou", "d,v,t", 0, (int) M_MULOU, INSN_MACRO, I1 },
616{"mulou", "d,v,I", 0, (int) M_MULOU_I, INSN_MACRO, I1 },
08fe7a7e
NC		 617{"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, I1 },
618{"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
619{"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, I1 },
620{"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
e70f2590
NC		 621{"neg", "d,w", 0x00000022, 0xffe007ff, WR_d|RD_t, I1 }, /* sub 0 */
622{"negu", "d,w", 0x00000023, 0xffe007ff, WR_d|RD_t, I1 }, /* subu 0 */
623{"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D|RD_S|FP_D, I1 },
624{"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D|RD_S|FP_S, I1 },
625{"neg.ps", "D,V", 0x46c00007, 0xffff003f, WR_D|RD_S|FP_D, I5 },
15305553
NC		 626{"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
627{"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
628{"nmadd.ps","D,R,S,T", 0x4c000036, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
629{"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
630{"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
631{"nmsub.ps","D,R,S,T", 0x4c00003e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
252b5132 632/* nop is at the start of the table. */
08fe7a7e
NC		 633{"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
634{"nor", "t,r,I", 0, (int) M_NOR_I, INSN_MACRO, I1 },
635{"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d|RD_s|RD_t, I1 },/*nor d,s,0*/
636{"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
637{"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO, I1 },
638{"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t|RD_s, I1 },
252b5132 639
e70f2590
NC		 640{"pll.ps", "D,V,T", 0x46c0002c, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
641{"plu.ps", "D,V,T", 0x46c0002d, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
252b5132 642
4372b673 643/* pref is at the start of the table. */
08fe7a7e 644{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, I4 },
252b5132 645
e70f2590
NC		 646{"pul.ps", "D,V,T", 0x46c0002e, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
647{"puu.ps", "D,V,T", 0x46c0002f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
252b5132 648
08fe7a7e
NC		 649{"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D|RD_S|FP_D, I4 },
650{"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D|RD_S|FP_S, I4 },
651{"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
652{"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO, I1 },
653{"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO, I1 },
654{"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
655{"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, I1 },
656{"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, I1 },
657{"rfe", "", 0x42000010, 0xffffffff, 0, I1|T3 },
658{"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, I1 },
659{"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I1 },
660{"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I1 },
661{"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I1 },
662{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3 },
663{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3 },
664{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2 },
665{"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D|RD_S|FP_S, I2 },
666{"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D|RD_S|FP_D, I4 },
667{"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, I4 },
668{"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM|RD_t|RD_b, I1 },
669{"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, I1 },
252b5132 670{"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I2 },
08fe7a7e 671{"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, I2 },
252b5132 672{"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I3 },
08fe7a7e
NC		 673{"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, I3 },
674{"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, I3 },
675{"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, I1 },
676{"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, I1 },
15305553
NC		 677{"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, G2 },
678{"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP, G2 },
679{"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP, G2 },
08fe7a7e
NC		 680{"sdbbp", "", 0x7000003f, 0xffffffff, TRAP, I32 },
681{"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP, I32 },
252b5132
RH		 682{"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
683{"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
08fe7a7e
NC		 684{"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
685{"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
686{"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM|RD_C2|RD_b, I2 },
687{"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, I2 },
688{"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, I2 },
689{"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, I2 },
252b5132 690{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
08fe7a7e
NC		 691{"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, I1 },
692{"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, I1 },
693{"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, I3 },
694{"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, I3 },
695{"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM|RD_t|RD_b, I3 },
696{"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, I3 },
252b5132 697{"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
08fe7a7e
NC		 698{"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t, L1 },
699{"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t, L1 },
700{"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, I1 },
701{"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, I1 },
702{"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, I1 },
703{"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, I1 },
704{"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, I1 },
705{"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO, I1 },
706{"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO, I1 },
707{"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO, I1 },
708{"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO, I1 },
709{"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO, I1 },
710{"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM|RD_t|RD_b, I1 },
711{"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO, I1 },
712{"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, I1 },
713{"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, I1 },
714{"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO, I1 },
715{"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO, I1 },
716{"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
717{"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* sllv */
718{"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d|RD_t, I1 },
719{"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
720{"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO, I1 },
721{"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t|RD_s, I1 },
722{"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t|RD_s, I1 },
723{"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
724{"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, I1 },
725{"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, I1 },
726{"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, I1 },
727{"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D|RD_S|FP_D, I2 },
728{"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D|RD_S|FP_S, I2 },
729{"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
730{"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srav */
731{"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d|RD_t, I1 },
732{"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
733{"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srlv */
734{"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d|RD_t, I1 },
4372b673 735/* ssnop is at the start of the table. */
08fe7a7e
NC		 736{"standby", "", 0x42000021, 0xffffffff, 0, V1 },
737{"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
738{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, I1 },
252b5132
RH		 739{"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
740{"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
5fce5ddf 741{"sub.ps", "D,V,T", 0x46c00001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
08fe7a7e
NC		 742{"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
743{"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO, I1 },
744{"suspend", "", 0x42000022, 0xffffffff, 0, V1 },
5fce5ddf 745{"suxc1", "S,t(b)", 0x4c00000d, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I5 },
08fe7a7e
NC		 746{"sw", "t,o(b)", 0xac000000, 0xfc000000, SM|RD_t|RD_b, I1 },
747{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, I1 },
748{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM|RD_C0|RD_b, I1 },
749{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, I1 },
252b5132
RH		 750{"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
751{"swc1", "E,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
08fe7a7e
NC		 752{"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
753{"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
252b5132 754{"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 }, /* swc1 */
08fe7a7e
NC		 755{"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
756{"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM|RD_C2|RD_b, I1 },
757{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, I1 },
758{"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM|RD_C3|RD_b, I1 },
759{"swc3", "E,A(b)", 0, (int) M_SWC3_AB, INSN_MACRO, I1 },
760{"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
761{"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I1 },
762{"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
763{"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I2 }, /* as swl */
764{"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
765{"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, I1 },
766{"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
767{"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, I2 }, /* as swr */
252b5132 768{"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
08fe7a7e
NC		 769{"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2|G1 },
770{"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, I2 },
771{"sync.l", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2 },
772{"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 },
773{"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 },
774{"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 },
775{"teq", "s,t", 0x00000034, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
776{"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
777{"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* teqi */
778{"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, I2 },
779{"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 },
780{"tge", "s,t", 0x00000030, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
781{"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
782{"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgei */
783{"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, I2 },
784{"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 },
785{"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
786{"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
787{"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgeiu */
788{"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, I2 },
15305553
NC		 789{"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, I1 },
790{"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, I1 },
791{"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, I1 },
792{"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, I1 },
08fe7a7e
NC		 793{"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 },
794{"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
795{"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
796{"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tlti */
797{"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, I2 },
798{"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 },
799{"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
800{"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
801{"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tltiu */
802{"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, I2 },
803{"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 },
804{"tne", "s,t", 0x00000036, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
805{"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
806{"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tnei */
807{"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, I2 },
808{"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|FP_D, I3 },
809{"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D|RD_S|FP_S, I3 },
810{"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
811{"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
812{"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD, INSN_MACRO, I1 },
813{"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
814{"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
815{"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS, INSN_MACRO, I1 },
816{"uld", "t,o(b)", 0, (int) M_ULD, INSN_MACRO, I3 },
817{"uld", "t,A(b)", 0, (int) M_ULD_A, INSN_MACRO, I3 },
818{"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO, I1 },
819{"ulh", "t,A(b)", 0, (int) M_ULH_A, INSN_MACRO, I1 },
820{"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO, I1 },
821{"ulhu", "t,A(b)", 0, (int) M_ULHU_A, INSN_MACRO, I1 },
822{"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO, I1 },
823{"ulw", "t,A(b)", 0, (int) M_ULW_A, INSN_MACRO, I1 },
824{"usd", "t,o(b)", 0, (int) M_USD, INSN_MACRO, I3 },
825{"usd", "t,A(b)", 0, (int) M_USD_A, INSN_MACRO, I3 },
826{"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO, I1 },
827{"ush", "t,A(b)", 0, (int) M_USH_A, INSN_MACRO, I1 },
828{"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO, I1 },
829{"usw", "t,A(b)", 0, (int) M_USW_A, INSN_MACRO, I1 },
830{"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
831{"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, I1 },
832{"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t|RD_s, I1 },
15305553 833{"wait", "", 0x42000020, 0xffffffff, TRAP, I3|I32 },
08fe7a7e
NC		 834{"wait", "J", 0x42000020, 0xfe00003f, TRAP, I32 },
835{"waiti", "", 0x42000020, 0xffffffff, TRAP, L1 },
836{"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM|RD_b, L1 },
252b5132
RH		 837/* No hazard protection on coprocessor instructions--they shouldn't
838 change the state of the processor and if they do it's up to the
839 user to put in nops as necessary. These are at the end so that the
840 disasembler recognizes more specific versions first. */
08fe7a7e
NC		 841{"c0", "C", 0x42000000, 0xfe000000, 0, I1 },
842{"c1", "C", 0x46000000, 0xfe000000, 0, I1 },
843{"c2", "C", 0x4a000000, 0xfe000000, 0, I1 },
844{"c3", "C", 0x4e000000, 0xfe000000, 0, I1 },
845{"cop0", "C", 0, (int) M_COP0, INSN_MACRO, I1 },
846{"cop1", "C", 0, (int) M_COP1, INSN_MACRO, I1 },
847{"cop2", "C", 0, (int) M_COP2, INSN_MACRO, I1 },
848{"cop3", "C", 0, (int) M_COP3, INSN_MACRO, I1 },
252b5132
RH		 849
850 /* Conflicts with the 4650's "mul" instruction. Nobody's using the
851 4010 any more, so move this insn out of the way. If the object
852 format gave us more info, we could do this right. */
08fe7a7e 853{"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t|RD_s, L1 },
252b5132
RH		 854};
855
856#define MIPS_NUM_OPCODES \
857 ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
858const int bfd_mips_num_builtin_opcodes = MIPS_NUM_OPCODES;
859
860/* const removed from the following to allow for dynamic extensions to the
861 * built-in instruction set. */
862struct mips_opcode *mips_opcodes =
863 (struct mips_opcode *) mips_builtin_opcodes;
864int bfd_mips_num_opcodes = MIPS_NUM_OPCODES;
865#undef MIPS_NUM_OPCODES
866
GDB Binutils - Deliverables
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