projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Add MIPS32 as a seperate MIPS architecture
[deliverable/binutils-gdb.git] / opcodes / mips-opc.c
CommitLineData
657e7cec 1/* mips-opc.c -- MIPS opcode list.
252b5132
RH		 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
3 Contributed by Ralph Campbell and OSF
4 Commented and modified by Ian Lance Taylor, Cygnus Support
5
6This file is part of GDB, GAS, and the GNU binutils.
7
8GDB, GAS, and the GNU binutils are free software; you can redistribute
9them and/or modify them under the terms of the GNU General Public
10License as published by the Free Software Foundation; either version
111, or (at your option) any later version.
12
13GDB, GAS, and the GNU binutils are distributed in the hope that they
14will be useful, but WITHOUT ANY WARRANTY; without even the implied
15warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
16the GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
19along with this file; see the file COPYING. If not, write to the Free
20Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21
22#include <stdio.h>
0d8dfecf 23#include "sysdep.h"
252b5132
RH		 24#include "opcode/mips.h"
25
26/* Short hand so the lines aren't too long. */
27
28#define LDD INSN_LOAD_MEMORY_DELAY
29#define LCD INSN_LOAD_COPROC_DELAY
30#define UBD INSN_UNCOND_BRANCH_DELAY
31#define CBD INSN_COND_BRANCH_DELAY
32#define COD INSN_COPROC_MOVE_DELAY
33#define CLD INSN_COPROC_MEMORY_DELAY
34#define CBL INSN_COND_BRANCH_LIKELY
35#define TRAP INSN_TRAP
36#define SM INSN_STORE_MEMORY
37
38#define WR_d INSN_WRITE_GPR_D
39#define WR_t INSN_WRITE_GPR_T
40#define WR_31 INSN_WRITE_GPR_31
41#define WR_D INSN_WRITE_FPR_D
42#define WR_T INSN_WRITE_FPR_T
43#define WR_S INSN_WRITE_FPR_S
44#define RD_s INSN_READ_GPR_S
45#define RD_b INSN_READ_GPR_S
46#define RD_t INSN_READ_GPR_T
47#define RD_S INSN_READ_FPR_S
48#define RD_T INSN_READ_FPR_T
49#define RD_R INSN_READ_FPR_R
50#define WR_CC INSN_WRITE_COND_CODE
51#define RD_CC INSN_READ_COND_CODE
52#define RD_C0 INSN_COP
53#define RD_C1 INSN_COP
54#define RD_C2 INSN_COP
55#define RD_C3 INSN_COP
56#define WR_C0 INSN_COP
57#define WR_C1 INSN_COP
58#define WR_C2 INSN_COP
59#define WR_C3 INSN_COP
60
61#define WR_HI INSN_WRITE_HI
62#define RD_HI INSN_READ_HI
63#define MOD_HI WR_HI|RD_HI
64
65#define WR_LO INSN_WRITE_LO
66#define RD_LO INSN_READ_LO
67#define MOD_LO WR_LO|RD_LO
68
69#define WR_HILO WR_HI|WR_LO
70#define RD_HILO RD_HI|RD_LO
71#define MOD_HILO WR_HILO|RD_HILO
72
73#define IS_M INSN_MULT
74
75#define I1 INSN_ISA1
76#define I2 INSN_ISA2
77#define I3 INSN_ISA3
78#define I4 INSN_ISA4
5fce5ddf 79#define I5 INSN_ISA5
e7af610e
NC		 80#define I32 INSN_ISA32
81
252b5132
RH		 82#define P3 INSN_4650
83#define L1 INSN_4010
84#define V1 INSN_4100
85#define T3 INSN_3900
86
87#define G1 (T3 \
88 )
89
90#define G2 (T3 \
91 )
92
93#define G3 (I4 \
94 )
95
8027df89
AH		 96#define G6 INSN_GP32
97
c156a9fd
NC		 98#define M1 0
99#define M2 0
100
252b5132
RH		 101/* The order of overloaded instructions matters. Label arguments and
102 register arguments look the same. Instructions that can have either
103 for arguments must apear in the correct order in this table for the
104 assembler to pick the right one. In other words, entries with
105 immediate operands must apear after the same instruction with
106 registers.
107
108 Many instructions are short hand for other instructions (i.e., The
109 jal <register> instruction is short for jalr <register>). */
110
4372b673
NC		 111const struct mips_opcode mips_builtin_opcodes[] =
112{
252b5132
RH		 113/* These instructions appear first so that the disassembler will find
114 them first. The assemblers uses a hash table based on the
115 instruction name anyhow. */
f1c8d843 116/* name, args, match, mask, pinfo, membership */
e7af610e 117{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, G3|M1|I32},
4372b673 118{"nop", "", 0x00000000, 0xffffffff, 0, I1 },
e7af610e 119{"ssnop", "", 0x00000040, 0xffffffff, 0, M1|I32 },
252b5132
RH		 120{"li", "t,j", 0x24000000, 0xffe00000, WR_t, I1 }, /* addiu */
121{"li", "t,i", 0x34000000, 0xffe00000, WR_t, I1 }, /* ori */
122{"li", "t,I", 0, (int) M_LI, INSN_MACRO, I1 },
8027df89 123{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1|G6 },/* or */
252b5132
RH		 124{"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, I3 },/* daddu */
125{"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d|RD_s, I1 },/* addu */
126{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1 },/* or */
127{"b", "p", 0x10000000, 0xffff0000, UBD, I1 },/* beq 0,0 */
128{"b", "p", 0x04010000, 0xffff0000, UBD, I1 },/* bgez 0 */
129{"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31, I1 },/* bgezal 0*/
130
131{"abs", "d,v", 0, (int) M_ABS, INSN_MACRO, I1 },
132{"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D|RD_S|FP_S, I1 },
133{"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D|RD_S|FP_D, I1 },
5fce5ddf 134{"abs.ps", "D,V", 0x46c00005, 0xffff003f, WR_D|RD_S|FP_D, I5 },
252b5132
RH		 135{"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
136{"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, I1 },
137{"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1},
138{"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1},
5fce5ddf 139{"add.ps", "D,V,T", 0x46c00000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5},
252b5132
RH		 140{"addi", "t,r,j", 0x20000000, 0xfc000000, WR_t|RD_s, I1 },
141{"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_t|RD_s, I1 },
142{"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
143{"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO, I1 },
5fce5ddf 144{"alnv.ps", "D,V,T,s", 0x4c00001e, 0xfc00003f, WR_D|RD_S|RD_T|FP_D, I5},
252b5132
RH		 145{"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
146{"and", "t,r,I", 0, (int) M_AND_I, INSN_MACRO, I1 },
147{"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t|RD_s, I1 },
148/* b is at the top of the table. */
149/* bal is at the top of the table. */
150{"bc0f", "p", 0x41000000, 0xffff0000, CBD|RD_CC, I1 },
151{"bc0fl", "p", 0x41020000, 0xffff0000, CBL|RD_CC, I2|T3 },
c156a9fd
NC		 152{"bc1f", "p", 0x45000000, 0xffff0000, CBD|RD_CC|FP_S, I1|M1 },
153{"bc1f", "N,p", 0x45000000, 0xffe30000, CBD|RD_CC|FP_S, I4|M1 },
154{"bc1fl", "p", 0x45020000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3|M1},
155{"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL|RD_CC|FP_S, I4|M1 },
252b5132
RH		 156{"bc2f", "p", 0x49000000, 0xffff0000, CBD|RD_CC, I1 },
157{"bc2fl", "p", 0x49020000, 0xffff0000, CBL|RD_CC, I2|T3 },
158{"bc3f", "p", 0x4d000000, 0xffff0000, CBD|RD_CC, I1 },
159{"bc3fl", "p", 0x4d020000, 0xffff0000, CBL|RD_CC, I2|T3 },
160{"bc0t", "p", 0x41010000, 0xffff0000, CBD|RD_CC, I1 },
161{"bc0tl", "p", 0x41030000, 0xffff0000, CBL|RD_CC, I2|T3 },
162{"bc1t", "p", 0x45010000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
c1485d85 163{"bc1t", "N,p", 0x45010000, 0xffe30000, CBD|RD_CC|FP_S, I4|M1 },
252b5132 164{"bc1tl", "p", 0x45030000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
c1485d85 165{"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL|RD_CC|FP_S, I4|M1 },
252b5132
RH		 166{"bc2t", "p", 0x49010000, 0xffff0000, CBD|RD_CC, I1 },
167{"bc2tl", "p", 0x49030000, 0xffff0000, CBL|RD_CC, I2|T3 },
168{"bc3t", "p", 0x4d010000, 0xffff0000, CBD|RD_CC, I1 },
169{"bc3tl", "p", 0x4d030000, 0xffff0000, CBL|RD_CC, I2|T3 },
170{"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD|RD_s, I1 },
171{"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
172{"beq", "s,t,p", 0x10000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
173{"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, I1 },
174{"beql", "s,t,p", 0x50000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
175{"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, I2 },
176{"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO, I1 },
177{"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO, I1 },
178{"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, I2 },
179{"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, I2 },
180{"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO, I1 },
181{"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO, I1 },
182{"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, I2 },
183{"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, I2 },
184{"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD|RD_s, I1 },
185{"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL|RD_s, I2|T3 },
186{"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
187{"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL|RD_s, I2|T3 },
188{"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO, I1 },
189{"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO, I1 },
190{"bgtl", "s,t,p", 0, (int) M_BGTL, INSN_MACRO, I2 },
191{"bgtl", "s,I,p", 0, (int) M_BGTL_I, INSN_MACRO, I2 },
192{"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO, I1 },
193{"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO, I1 },
194{"bgtul", "s,t,p", 0, (int) M_BGTUL, INSN_MACRO, I2 },
195{"bgtul", "s,I,p", 0, (int) M_BGTUL_I, INSN_MACRO, I2 },
196{"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD|RD_s, I1 },
197{"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
198{"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO, I1 },
199{"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO, I1 },
200{"blel", "s,t,p", 0, (int) M_BLEL, INSN_MACRO, I2 },
201{"blel", "s,I,p", 0, (int) M_BLEL_I, INSN_MACRO, I2 },
202{"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO, I1 },
203{"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO, I1 },
204{"bleul", "s,t,p", 0, (int) M_BLEUL, INSN_MACRO, I2 },
205{"bleul", "s,I,p", 0, (int) M_BLEUL_I, INSN_MACRO, I2 },
206{"blez", "s,p", 0x18000000, 0xfc1f0000, CBD|RD_s, I1 },
207{"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
208{"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO, I1 },
209{"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO, I1 },
210{"bltl", "s,t,p", 0, (int) M_BLTL, INSN_MACRO, I2 },
211{"bltl", "s,I,p", 0, (int) M_BLTL_I, INSN_MACRO, I2 },
212{"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO, I1 },
213{"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO, I1 },
214{"bltul", "s,t,p", 0, (int) M_BLTUL, INSN_MACRO, I2 },
215{"bltul", "s,I,p", 0, (int) M_BLTUL_I, INSN_MACRO, I2 },
216{"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD|RD_s, I1 },
217{"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL|RD_s, I2|T3 },
218{"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
219{"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL|RD_s, I2|T3 },
220{"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD|RD_s, I1 },
221{"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
222{"bne", "s,t,p", 0x14000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
223{"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, I1 },
224{"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
225{"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, I2 },
226{"break", "", 0x0000000d, 0xffffffff, TRAP, I1 },
e7af610e 227{"break", "B", 0x0000000d, 0xfc00003f, TRAP, I32 },
252b5132
RH		 228{"break", "c", 0x0000000d, 0xfc00ffff, TRAP, I1 },
229{"break", "c,q", 0x0000000d, 0xfc00003f, TRAP, I1 },
230{"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 231{"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 232{"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 233{"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 234{"c.f.ps", "S,T", 0x46c00030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
235{"c.f.ps", "M,S,T", 0x46c00030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 236{"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 237{"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 238{"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 239{"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 240{"c.un.ps", "S,T", 0x46c00031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
241{"c.un.ps", "M,S,T", 0x46c00031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 242{"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 243{"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 244{"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 245{"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 246{"c.eq.ps", "S,T", 0x46c00032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
247{"c.eq.ps", "M,S,T", 0x46c00032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 248{"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 249{"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 250{"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 251{"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 252{"c.ueq.ps","S,T", 0x46c00033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
253{"c.ueq.ps","M,S,T", 0x46c00033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
c156a9fd 254{"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 255{"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
252b5132 256{"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 257{"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 258{"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 259{"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 260{"c.olt.ps","S,T", 0x46c00034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
261{"c.olt.ps","M,S,T", 0x46c00034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 262{"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 263{"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 264{"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 265{"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 266{"c.ult.ps","S,T", 0x46c00035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
267{"c.ult.ps","M,S,T", 0x46c00035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
c156a9fd 268{"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 269{"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
252b5132 270{"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 271{"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 272{"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 273{"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 274{"c.ole.ps","S,T", 0x46c00036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
275{"c.ole.ps","M,S,T", 0x46c00036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 276{"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 277{"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 278{"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 279{"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 280{"c.ule.ps","S,T", 0x46c00037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
281{"c.ule.ps","M,S,T", 0x46c00037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 282{"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 283{"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 284{"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 285{"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 286{"c.sf.ps", "S,T", 0x46c00038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
287{"c.sf.ps", "M,S,T", 0x46c00038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 288{"c.ngle.d","S,T", 0x46200039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 289{"c.ngle.d","M,S,T", 0x46200039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 290{"c.ngle.s","S,T", 0x46000039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 291{"c.ngle.s","M,S,T", 0x46000039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 292{"c.ngle.ps","S,T", 0x46c00039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
293{"c.ngle.ps","M,S,T", 0x46c00039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 294{"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 295{"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 296{"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 297{"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 298{"c.seq.ps","S,T", 0x46c0003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
299{"c.seq.ps","M,S,T", 0x46c0003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 300{"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 301{"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 302{"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 303{"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 304{"c.ngl.ps","S,T", 0x46c0003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
305{"c.ngl.ps","M,S,T", 0x46c0003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 306{"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 307{"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
5fce5ddf
GRK		 308{"c.lt.ps", "S,T", 0x46c0003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
309{"c.lt.ps", "M,S,T", 0x46c0003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 310{"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 311{"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 312{"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 313{"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 314{"c.nge.ps","S,T", 0x46c0003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
315{"c.nge.ps","M,S,T", 0x46c0003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 316{"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 317{"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
5fce5ddf
GRK		 318{"c.le.ps", "S,T", 0x46c0003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
319{"c.le.ps", "M,S,T", 0x46c0003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252b5132 320{"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
c1485d85 321{"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|M1 },
252b5132 322{"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
c1485d85 323{"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|M1 },
5fce5ddf
GRK		 324{"c.ngt.ps","S,T", 0x46c0003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
325{"c.ngt.ps","M,S,T", 0x46c0003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
e7af610e 326{"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, I3|T3|M1|I32 },
252b5132
RH		 327{"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, I3 },
328{"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S, I3 },
329{"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D|RD_S|FP_D, I2 },
330{"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D|RD_S|FP_S, I2 },
331{"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
332{"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
333{"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
334{"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
335{"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
e7af610e
NC		 336{"clo", "U,s", 0x70000021, 0xfc0007ff, WR_d|RD_s, I32 },
337{"clz", "U,s", 0x70000020, 0xfc0007ff, WR_d|RD_s, I32 },
252b5132
RH		 338{"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
339{"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
340{"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
341{"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
342{"ctc3", "t,G", 0x4cc00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
343{"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, I3 },
344{"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D|RD_S|FP_D|FP_S, I1 },
345{"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D|RD_S|FP_D, I1 },
346{"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|FP_D, I3 },
347{"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|FP_S, I3 },
348{"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|FP_S, I3 },
349{"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I1 },
350{"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D|RD_S|FP_S, I1 },
5fce5ddf
GRK		 351{"cvt.s.pl","D,S", 0x46c00028, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I5 },
352{"cvt.s.pu","D,S", 0x46c00020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I5 },
252b5132
RH		 353{"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D|RD_S|FP_D, I1 },
354{"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D|RD_S|FP_S, I1 },
5fce5ddf 355{"cvt.ps.s","D,V,T", 0x46000026, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5},
252b5132
RH		 356{"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, I3 },
357{"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
358{"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, I3 },
359{"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t|RD_s, I3 },
360{"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t|RD_s, I3 },
361{"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
362{"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, I3 },
363/* dctr and dctw are used on the r5000. */
364{"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b, I3 },
365{"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, I3 },
e7af610e 366{"deret", "", 0x4200001f, 0xffffffff, 0, G2|M1|I32 },
252b5132
RH		 367/* For ddiv, see the comments about div. */
368{"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
369{"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, I3 },
370{"ddiv", "d,v,I", 0, (int) M_DDIV_3I, INSN_MACRO, I3 },
371/* For ddivu, see the comments about div. */
372{"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
373{"ddivu", "d,v,t", 0, (int) M_DDIVU_3, INSN_MACRO, I3 },
374{"ddivu", "d,v,I", 0, (int) M_DDIVU_3I, INSN_MACRO, I3 },
375/* The MIPS assembler treats the div opcode with two operands as
376 though the first operand appeared twice (the first operand is both
377 a source and a destination). To get the div machine instruction,
378 you must use an explicit destination of $0. */
379{"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
380{"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
381{"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO, I1 },
382{"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO, I1 },
383{"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
384{"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
385/* For divu, see the comments about div. */
386{"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
387{"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
388{"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, I1 },
389{"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, I1 },
6e3708af 390{"dla", "t,o(b)", 0x64000000, 0xfc000000, WR_t|RD_s, I3 }, /* daddiu */
252b5132
RH		 391{"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, I3 },
392{"dli", "t,j", 0x24000000, 0xffe00000, WR_t, I3 }, /* addiu */
393{"dli", "t,i", 0x34000000, 0xffe00000, WR_t, I3 }, /* ori */
394{"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, I3 },
395
396{"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s|RD_t|WR_LO|RD_LO, V1 },
397{"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD|WR_t|RD_C0, I3 },
398{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I3 },
399{"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
400{"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
401{"dmfc2", "t,S", 0x48200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
402{"dmtc2", "t,S", 0x48a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
403{"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, I3 },
404{"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, I3 },
405{"dmulo", "d,v,t", 0, (int) M_DMULO, INSN_MACRO, I3 },
406{"dmulo", "d,v,I", 0, (int) M_DMULO_I, INSN_MACRO, I3 },
407{"dmulou", "d,v,t", 0, (int) M_DMULOU, INSN_MACRO, I3 },
408{"dmulou", "d,v,I", 0, (int) M_DMULOU_I, INSN_MACRO, I3 },
409{"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3},
410{"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3},
411{"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d|RD_t, I3 }, /* dsub 0 */
412{"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d|RD_t, I3 }, /* dsubu 0*/
413{"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
414{"drem", "d,v,t", 3, (int) M_DREM_3, INSN_MACRO, I3 },
415{"drem", "d,v,I", 3, (int) M_DREM_3I, INSN_MACRO, I3 },
416{"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
417{"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 },
418{"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 },
419{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
420{"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 },
421{"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
422{"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 }, /* dsll32 */
423{"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_d|RD_t, I3 },
424{"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
425{"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 },
426{"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrav */
427{"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 }, /* dsra32 */
428{"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_d|RD_t, I3 },
429{"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
430{"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 },
431{"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrlv */
432{"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 }, /* dsrl32 */
433{"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_d|RD_t, I3 },
434{"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
435{"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, I3 },
436{"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
437{"dsubu", "d,v,I", 0, (int) M_DSUBU_I, INSN_MACRO, I3 },
e7af610e 438{"eret", "", 0x42000018, 0xffffffff, 0, I3|M1|I32},
252b5132
RH		 439{"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, I3 },
440{"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S, I3 },
441{"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_D, I2 },
442{"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D|RD_S|FP_S, I2 },
443{"flushi", "", 0xbc010000, 0xffffffff, 0, L1 },
444{"flushd", "", 0xbc020000, 0xffffffff, 0, L1 },
445{"flushid", "", 0xbc030000, 0xffffffff, 0, L1 },
446{"hibernate","", 0x42000023, 0xffffffff, 0, V1 },
447{"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 },
448{"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 }, /* jr */
449/* SVR4 PIC code requires special handling for j, so it must be a
450 macro. */
451{"j", "a", 0, (int) M_J_A, INSN_MACRO, I1 },
452/* This form of j is used by the disassembler and internally by the
453 assembler, but will never match user input (because the line above
454 will match first). */
455{"j", "a", 0x08000000, 0xfc000000, UBD, I1 },
456{"jalr", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d, I1 },
457{"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d, I1 },
458/* SVR4 PIC code requires special handling for jal, so it must be a
459 macro. */
460{"jal", "d,s", 0, (int) M_JAL_2, INSN_MACRO, I1 },
461{"jal", "s", 0, (int) M_JAL_1, INSN_MACRO, I1 },
462{"jal", "a", 0, (int) M_JAL_A, INSN_MACRO, I1 },
463/* This form of jal is used by the disassembler and internally by the
464 assembler, but will never match user input (because the line above
465 will match first). */
466{"jal", "a", 0x0c000000, 0xfc000000, UBD|WR_31, I1 },
467 /* jalx really should only be avaliable if mips16 is available,
468 but for now make it I1. */
469{"jalx", "a", 0x74000000, 0xfc000000, UBD|WR_31, I1 },
6e3708af 470{"la", "t,o(b)", 0x24000000, 0xfc000000, WR_t|RD_s, I1 }, /* addiu */
252b5132
RH		 471{"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, I1 },
472{"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
473{"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, I1 },
474{"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
475{"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, I1 },
476{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, I3 },
477{"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, I1 },
478{"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, I1 },
479{"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
480{"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
481{"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
482{"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
483{"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 }, /* ldc1 */
484{"l.d", "T,o(b)", 0, (int) M_L_DOB, INSN_MACRO, I1 },
485{"l.d", "T,A(b)", 0, (int) M_L_DAB, INSN_MACRO, I1 },
486{"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
487{"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, I2 },
488{"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
489{"ldc3", "E,A(b)", 0, (int) M_LDC3_AB, INSN_MACRO, I2 },
490{"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
491{"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, I3 },
492{"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
493{"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, I3 },
494{"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
495{"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
496{"lh", "t,A(b)", 0, (int) M_LH_AB, INSN_MACRO, I1 },
497{"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
498{"lhu", "t,A(b)", 0, (int) M_LHU_AB, INSN_MACRO, I1 },
499/* li is at the start of the table. */
500{"li.d", "t,F", 0, (int) M_LI_D, INSN_MACRO, I1 },
501{"li.d", "T,L", 0, (int) M_LI_DD, INSN_MACRO, I1 },
502{"li.s", "t,f", 0, (int) M_LI_S, INSN_MACRO, I1 },
503{"li.s", "T,l", 0, (int) M_LI_SS, INSN_MACRO, I1 },
504{"ll", "t,o(b)", 0xc0000000, 0xfc000000, LDD|RD_b|WR_t, I2 },
505{"ll", "t,A(b)", 0, (int) M_LL_AB, INSN_MACRO, I2 },
506{"lld", "t,o(b)", 0xd0000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
507{"lld", "t,A(b)", 0, (int) M_LLD_AB, INSN_MACRO, I3 },
508{"lui", "t,u", 0x3c000000, 0xffe00000, WR_t, I1 },
5fce5ddf 509{"luxc1", "D,t(b)", 0x4c000005, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I5 },
252b5132
RH		 510{"lw", "t,o(b)", 0x8c000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
511{"lw", "t,A(b)", 0, (int) M_LW_AB, INSN_MACRO, I1 },
512{"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
513{"lwc0", "E,A(b)", 0, (int) M_LWC0_AB, INSN_MACRO, I1 },
514{"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
515{"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
516{"lwc1", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
517{"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
518{"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 }, /* lwc1 */
519{"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
520{"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
521{"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, I1 },
522{"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
523{"lwc3", "E,A(b)", 0, (int) M_LWC3_AB, INSN_MACRO, I1 },
524{"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
525{"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I1 },
526{"lcache", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
527{"lcache", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I2 }, /* as lwl */
528{"lwr", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
529{"lwr", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I1 },
530{"flush", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
531{"flush", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I2 }, /* as lwr */
532{"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
533{"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, I3 },
534{"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
e7af610e
NC		 535{"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3|I32 },
536{"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3|I32 },
252b5132
RH		 537{"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
538{"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
5fce5ddf 539{"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
252b5132 540{"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 },
e7af610e 541{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, I32 },
c156a9fd 542{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M, G1|M1 },
252b5132
RH		 543{"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1 },
544{"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 },
e7af610e 545{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, I32 },
c156a9fd 546{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M, G1|M1},
252b5132
RH		 547{"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1},
548{"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, V1 },
549{"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
e7af610e 550{"mfc0", "t,G,H", 0x40000000, 0xffe007f8, LCD|WR_t|RD_C0, I32 },
c1485d85
NC		 551{"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1},
552{"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1},
e7af610e 553{"mfc1", "t,G,H", 0x44000000, 0xffe007f8, LCD|WR_t|RD_S|FP_S, I32},
252b5132 554{"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
e7af610e 555{"mfc2", "t,G,H", 0x48000000, 0xffe007f8, LCD|WR_t|RD_C2, I32 },
252b5132 556{"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
e7af610e 557{"mfc3", "t,G,H", 0x4c000000, 0xffe007f8, LCD|WR_t|RD_C3, I32 },
252b5132
RH		 558{"mfhi", "d", 0x00000010, 0xffff07ff, WR_d|RD_HI, I1 },
559{"mflo", "d", 0x00000012, 0xffff07ff, WR_d|RD_LO, I1 },
560{"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D|RD_S|FP_D, I1 },
561{"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D|RD_S|FP_S, I1 },
5fce5ddf 562{"mov.ps", "D,S", 0x46c00006, 0xffff003f, WR_D|RD_S|FP_D, I5 },
c156a9fd
NC		 563{"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_D|FP_S, I4|M1},
564{"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|M1 },
565{"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|M1 },
5fce5ddf 566{"movf.ps", "D,S,N", 0x46c00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I5 },
e7af610e 567{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, I4|M1|I32 },
252b5132 568{"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d|RD_s,L1 },
c156a9fd
NC		 569{"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|M1 },
570{"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|M1 },
571{"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC, I4|M1 },
572{"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|M1 },
573{"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|M1 },
5fce5ddf 574{"movt.ps", "D,S,N", 0x46c10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I5},
e7af610e 575{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, I4|M1|I32 },
252b5132 576{"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d|RD_s,L1 },
c156a9fd
NC		 577{"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|M1 },
578{"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|M1 },
252b5132
RH		 579/* move is at the top of the table. */
580{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
581{"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
5fce5ddf 582{"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
252b5132 583{"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,L1 },
e7af610e 584{"msub", "s,t", 0x70000004, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, I32 },
252b5132 585{"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,L1 },
e7af610e 586{"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, I32 },
252b5132 587{"mtc0", "t,G", 0x40800000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I1 },
e7af610e 588{"mtc0", "t,G,H", 0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I32 },
252b5132
RH		 589{"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
590{"mtc1", "t,G", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
e7af610e 591{"mtc1", "t,G,H", 0x44800000, 0xffe007f8, COD|RD_t|WR_S|FP_S, I32 },
252b5132 592{"mtc2", "t,G", 0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I1 },
e7af610e 593{"mtc2", "t,G,H", 0x48800000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, I32 },
252b5132 594{"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I1 },
e7af610e 595{"mtc3", "t,G,H", 0x4c800000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC, I32 },
252b5132
RH		 596{"mthi", "s", 0x00000011, 0xfc1fffff, RD_s|WR_HI, I1 },
597{"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s|WR_LO, I1 },
598{"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
599{"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
5fce5ddf 600{"mul.ps", "D,V,T", 0x46c00002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
e7af610e 601{"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, P3|I32 },
252b5132
RH		 602{"mul", "d,v,t", 0, (int) M_MUL, INSN_MACRO, I1 },
603{"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, I1 },
604{"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO, I1 },
605{"mulo", "d,v,I", 0, (int) M_MULO_I, INSN_MACRO, I1 },
606{"mulou", "d,v,t", 0, (int) M_MULOU, INSN_MACRO, I1 },
607{"mulou", "d,v,I", 0, (int) M_MULOU_I, INSN_MACRO, I1 },
608{"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M, I1},
609{"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1},
610{"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M, I1},
611{"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1},
612{"neg", "d,w", 0x00000022, 0xffe007ff, WR_d|RD_t, I1 }, /* sub 0 */
613{"negu", "d,w", 0x00000023, 0xffe007ff, WR_d|RD_t, I1 }, /* subu 0 */
614{"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D|RD_S|FP_D, I1 },
615{"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D|RD_S|FP_S, I1 },
5fce5ddf 616{"neg.ps", "D,V", 0x46c00007, 0xffff003f, WR_D|RD_S|FP_D,I5 },
252b5132
RH		 617{"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
618{"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
5fce5ddf 619{"nmadd.ps","D,R,S,T", 0x4c000036, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
252b5132
RH		 620{"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
621{"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
5fce5ddf 622{"nmsub.ps","D,R,S,T", 0x4c00003e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
252b5132
RH		 623/* nop is at the start of the table. */
624{"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
625{"nor", "t,r,I", 0, (int) M_NOR_I, INSN_MACRO, I1 },
626{"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d|RD_s|RD_t, I1 },/*nor d,s,0*/
627{"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
628{"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO, I1 },
629{"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t|RD_s, I1 },
630
5fce5ddf
GRK		 631{"pll.ps", "D,V,T", 0x46c0002c, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5},
632{"plu.ps", "D,V,T", 0x46c0002d, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5},
252b5132 633
4372b673 634/* pref is at the start of the table. */
252b5132
RH		 635{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, I4 },
636
5fce5ddf
GRK		 637{"pul.ps", "D,V,T", 0x46c0002e, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5},
638{"puu.ps", "D,V,T", 0x46c0002f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5},
252b5132
RH		 639
640{"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D|RD_S|FP_D, I4 },
641{"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D|RD_S|FP_S, I4 },
642{"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
643{"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO, I1 },
644{"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO, I1 },
645{"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
646{"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, I1 },
647{"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, I1 },
648{"rfe", "", 0x42000010, 0xffffffff, 0, I1|T3 },
649{"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, I1 },
650{"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I1 },
651{"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I1 },
652{"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I1 },
653{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3 },
654{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3 },
655{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2 },
656{"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D|RD_S|FP_S, I2 },
657{"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D|RD_S|FP_D, I4 },
658{"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, I4 },
659{"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM|RD_t|RD_b, I1 },
660{"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, I1 },
661{"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I2 },
662{"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, I2 },
663{"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I3 },
664{"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, I3 },
665{"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, I3 },
666{"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, I1 },
667{"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, I1 },
c156a9fd
NC		 668{"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, G2|M1 },
669{"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP, G2|M1 },
670{"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP, G2|M1 },
e7af610e 671{"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP, I32 },
252b5132
RH		 672{"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
673{"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
674{"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
675{"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
676{"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM|RD_C2|RD_b, I2 },
677{"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, I2 },
678{"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, I2 },
679{"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, I2 },
680{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
681{"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, I1 },
682{"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, I1 },
683{"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, I3 },
684{"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, I3 },
685{"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM|RD_t|RD_b, I3 },
686{"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, I3 },
687{"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
688{"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t,L1 },
689{"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t,L1 },
690{"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, I1 },
691{"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, I1 },
692{"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, I1 },
693{"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, I1 },
694{"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, I1 },
695{"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO, I1 },
696{"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO, I1 },
697{"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO, I1 },
698{"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO, I1 },
699{"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO, I1 },
700{"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM|RD_t|RD_b, I1 },
701{"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO, I1 },
702{"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, I1 },
703{"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, I1 },
704{"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO, I1 },
705{"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO, I1 },
706{"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
707{"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* sllv */
708{"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d|RD_t, I1 },
709{"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
710{"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO, I1 },
711{"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t|RD_s, I1 },
712{"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t|RD_s, I1 },
713{"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
714{"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, I1 },
715{"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, I1 },
716{"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, I1 },
717{"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D|RD_S|FP_D, I2 },
718{"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D|RD_S|FP_S, I2 },
719{"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
720{"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srav */
721{"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d|RD_t, I1 },
722{"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
723{"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srlv */
724{"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d|RD_t, I1 },
4372b673 725/* ssnop is at the start of the table. */
252b5132
RH		 726{"standby", "", 0x42000021, 0xffffffff, 0, V1 },
727{"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
728{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, I1 },
729{"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
730{"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
5fce5ddf 731{"sub.ps", "D,V,T", 0x46c00001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
252b5132
RH		 732{"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
733{"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO, I1 },
734{"suspend", "", 0x42000022, 0xffffffff, 0, V1 },
5fce5ddf 735{"suxc1", "S,t(b)", 0x4c00000d, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I5 },
252b5132
RH		 736{"sw", "t,o(b)", 0xac000000, 0xfc000000, SM|RD_t|RD_b, I1 },
737{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, I1 },
738{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM|RD_C0|RD_b, I1 },
739{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, I1 },
740{"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
741{"swc1", "E,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
742{"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
743{"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
744{"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 }, /* swc1 */
745{"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
746{"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM|RD_C2|RD_b, I1 },
747{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, I1 },
748{"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM|RD_C3|RD_b, I1 },
749{"swc3", "E,A(b)", 0, (int) M_SWC3_AB, INSN_MACRO, I1 },
750{"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
751{"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I1 },
752{"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
753{"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I2 }, /* as swl */
754{"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
755{"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, I1 },
756{"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
757{"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, I2 }, /* as swr */
758{"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
759{"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2|G1 },
760{"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, I2 },
761{"sync.l", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2 },
762{"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 },
763{"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 },
764{"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 },
765{"teq", "s,t", 0x00000034, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
766{"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
767{"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* teqi */
768{"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, I2 },
769{"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 },
770{"tge", "s,t", 0x00000030, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
771{"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
772{"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgei */
773{"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, I2 },
774{"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 },
775{"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
776{"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
777{"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgeiu */
778{"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, I2 },
e7af610e
NC		 779{"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, I1|M1|I32 },
780{"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, I1|M1|I32 },
781{"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, I1|M1|I32 },
782{"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, I1|M1|I32 },
252b5132
RH		 783{"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 },
784{"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
785{"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
786{"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tlti */
787{"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, I2 },
788{"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 },
789{"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
790{"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
791{"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tltiu */
792{"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, I2 },
793{"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 },
794{"tne", "s,t", 0x00000036, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
795{"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
796{"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tnei */
797{"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, I2 },
798{"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|FP_D, I3 },
799{"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D|RD_S|FP_S, I3 },
800{"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
801{"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
802{"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD, INSN_MACRO, I1 },
803{"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
804{"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
805{"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS, INSN_MACRO, I1 },
806{"uld", "t,o(b)", 0, (int) M_ULD, INSN_MACRO, I3 },
807{"uld", "t,A(b)", 0, (int) M_ULD_A, INSN_MACRO, I3 },
808{"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO, I1 },
809{"ulh", "t,A(b)", 0, (int) M_ULH_A, INSN_MACRO, I1 },
810{"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO, I1 },
811{"ulhu", "t,A(b)", 0, (int) M_ULHU_A, INSN_MACRO, I1 },
812{"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO, I1 },
813{"ulw", "t,A(b)", 0, (int) M_ULW_A, INSN_MACRO, I1 },
814{"usd", "t,o(b)", 0, (int) M_USD, INSN_MACRO, I3 },
815{"usd", "t,A(b)", 0, (int) M_USD_A, INSN_MACRO, I3 },
816{"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO, I1 },
817{"ush", "t,A(b)", 0, (int) M_USH_A, INSN_MACRO, I1 },
818{"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO, I1 },
819{"usw", "t,A(b)", 0, (int) M_USW_A, INSN_MACRO, I1 },
820{"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
821{"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, I1 },
822{"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t|RD_s, I1 },
e7af610e
NC		 823{"wait", "", 0x42000020, 0xffffffff, TRAP, I3|M1|I32 },
824{"wait", "J", 0x42000020, 0xfe00003f, TRAP, I32 },
252b5132
RH		 825{"waiti", "", 0x42000020, 0xffffffff, TRAP, L1 },
826{"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM|RD_b, L1 },
827/* No hazard protection on coprocessor instructions--they shouldn't
828 change the state of the processor and if they do it's up to the
829 user to put in nops as necessary. These are at the end so that the
830 disasembler recognizes more specific versions first. */
831{"c0", "C", 0x42000000, 0xfe000000, 0, I1 },
832{"c1", "C", 0x46000000, 0xfe000000, 0, I1 },
833{"c2", "C", 0x4a000000, 0xfe000000, 0, I1 },
834{"c3", "C", 0x4e000000, 0xfe000000, 0, I1 },
835{"cop0", "C", 0, (int) M_COP0, INSN_MACRO, I1 },
836{"cop1", "C", 0, (int) M_COP1, INSN_MACRO, I1 },
837{"cop2", "C", 0, (int) M_COP2, INSN_MACRO, I1 },
838{"cop3", "C", 0, (int) M_COP3, INSN_MACRO, I1 },
839
840 /* Conflicts with the 4650's "mul" instruction. Nobody's using the
841 4010 any more, so move this insn out of the way. If the object
842 format gave us more info, we could do this right. */
843{"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t|RD_s,L1 },
844};
845
846#define MIPS_NUM_OPCODES \
847 ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
848const int bfd_mips_num_builtin_opcodes = MIPS_NUM_OPCODES;
849
850/* const removed from the following to allow for dynamic extensions to the
851 * built-in instruction set. */
852struct mips_opcode *mips_opcodes =
853 (struct mips_opcode *) mips_builtin_opcodes;
854int bfd_mips_num_opcodes = MIPS_NUM_OPCODES;
855#undef MIPS_NUM_OPCODES
856
GDB Binutils - Deliverables
This page took 0.122943 seconds and 4 git commands to generate.