* mn10300-dis.c (disassemble): Remove '$' register prefixing.
[deliverable/binutils-gdb.git] / opcodes / mn10200-opc.c
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ae1b99e4 1/* Assemble Matsushita MN10200 instructions.
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2 Copyright (C) 1996 Free Software Foundation, Inc.
3
4This program is free software; you can redistribute it and/or modify
5it under the terms of the GNU General Public License as published by
6the Free Software Foundation; either version 2 of the License, or
7(at your option) any later version.
8
9This program is distributed in the hope that it will be useful,
10but WITHOUT ANY WARRANTY; without even the implied warranty of
11MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12GNU General Public License for more details.
13
14You should have received a copy of the GNU General Public License
15along with this program; if not, write to the Free Software
16Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
17
18#include "ansidecl.h"
ae1b99e4 19#include "opcode/mn10200.h"
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20
21\f
ae1b99e4 22const struct mn10200_operand mn10200_operands[] = {
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23#define UNUSED 0
24 { 0, 0, 0 },
25} ;
26
27\f
28/* The opcode table.
29
30 The format of the opcode table is:
31
32 NAME OPCODE MASK { OPERANDS }
33
34 NAME is the name of the instruction.
35 OPCODE is the instruction opcode.
36 MASK is the opcode mask; this is used to tell the disassembler
37 which bits in the actual opcode must match OPCODE.
38 OPERANDS is the list of operands.
39
40 The disassembler reads the table in order and prints the first
41 instruction which matches, so this table is sorted to put more
42 specific instructions before more general instructions. It is also
43 sorted by major opcode. */
44
ae1b99e4 45const struct mn10200_opcode mn10200_opcodes[] = {
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46{ 0, 0, 0, {0}, } } ;
47
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48const int mn10200_num_opcodes =
49 sizeof (mn10200_opcodes) / sizeof (mn10200_opcodes[0]);
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50
51\f
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