Commit | Line | Data |
---|---|---|
ac188222 DB |
1 | /* Disassembler interface for targets using CGEN. -*- C -*- |
2 | CGEN: Cpu tools GENerator | |
3 | ||
47b0e7ad NC |
4 | THIS FILE IS MACHINE GENERATED WITH CGEN. |
5 | - the resultant file is machine generated, cgen-dis.in isn't | |
ac188222 | 6 | |
6f3b91a6 | 7 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007, |
05994f45 | 8 | 2008, 2010 Free Software Foundation, Inc. |
ac188222 | 9 | |
9b201bb5 | 10 | This file is part of libopcodes. |
ac188222 | 11 | |
9b201bb5 | 12 | This library is free software; you can redistribute it and/or modify |
47b0e7ad | 13 | it under the terms of the GNU General Public License as published by |
9b201bb5 | 14 | the Free Software Foundation; either version 3, or (at your option) |
47b0e7ad | 15 | any later version. |
ac188222 | 16 | |
9b201bb5 NC |
17 | It is distributed in the hope that it will be useful, but WITHOUT |
18 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
19 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
20 | License for more details. | |
ac188222 | 21 | |
47b0e7ad NC |
22 | You should have received a copy of the GNU General Public License |
23 | along with this program; if not, write to the Free Software Foundation, Inc., | |
24 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ | |
ac188222 DB |
25 | |
26 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. | |
27 | Keep that in mind. */ | |
28 | ||
29 | #include "sysdep.h" | |
30 | #include <stdio.h> | |
31 | #include "ansidecl.h" | |
32 | #include "dis-asm.h" | |
33 | #include "bfd.h" | |
34 | #include "symcat.h" | |
35 | #include "libiberty.h" | |
d031aafb NS |
36 | #include "mt-desc.h" |
37 | #include "mt-opc.h" | |
ac188222 DB |
38 | #include "opintl.h" |
39 | ||
40 | /* Default text to print if an instruction isn't recognized. */ | |
41 | #define UNKNOWN_INSN_MSG _("*unknown*") | |
42 | ||
43 | static void print_normal | |
44 | (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int); | |
45 | static void print_address | |
46 | (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED; | |
47 | static void print_keyword | |
48 | (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED; | |
49 | static void print_insn_normal | |
50 | (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); | |
51 | static int print_insn | |
52 | (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); | |
53 | static int default_print_insn | |
54 | (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; | |
55 | static int read_insn | |
56 | (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, | |
57 | unsigned long *); | |
58 | \f | |
47b0e7ad | 59 | /* -- disassembler routines inserted here. */ |
ac188222 DB |
60 | |
61 | /* -- dis.c */ | |
62 | static void print_dollarhex (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int); | |
6f84a2a6 | 63 | static void print_pcrel (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int); |
ac188222 DB |
64 | |
65 | static void | |
66 | print_dollarhex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, | |
67 | void * dis_info, | |
68 | long value, | |
69 | unsigned int attrs ATTRIBUTE_UNUSED, | |
70 | bfd_vma pc ATTRIBUTE_UNUSED, | |
71 | int length ATTRIBUTE_UNUSED) | |
72 | { | |
73 | disassemble_info *info = (disassemble_info *) dis_info; | |
74 | ||
a597d2d3 | 75 | info->fprintf_func (info->stream, "$%lx", value & 0xffffffff); |
ac188222 DB |
76 | |
77 | if (0) | |
78 | print_normal (cd, dis_info, value, attrs, pc, length); | |
79 | } | |
80 | ||
6f84a2a6 NS |
81 | static void |
82 | print_pcrel (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, | |
83 | void * dis_info, | |
84 | long value, | |
85 | unsigned int attrs ATTRIBUTE_UNUSED, | |
86 | bfd_vma pc ATTRIBUTE_UNUSED, | |
87 | int length ATTRIBUTE_UNUSED) | |
88 | { | |
89 | print_address (cd, dis_info, value + pc, attrs, pc, length); | |
90 | } | |
ac188222 DB |
91 | |
92 | /* -- */ | |
93 | ||
d031aafb | 94 | void mt_cgen_print_operand |
47b0e7ad | 95 | (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int); |
ac188222 DB |
96 | |
97 | /* Main entry point for printing operands. | |
98 | XINFO is a `void *' and not a `disassemble_info *' to not put a requirement | |
99 | of dis-asm.h on cgen.h. | |
100 | ||
101 | This function is basically just a big switch statement. Earlier versions | |
102 | used tables to look up the function to use, but | |
103 | - if the table contains both assembler and disassembler functions then | |
104 | the disassembler contains much of the assembler and vice-versa, | |
105 | - there's a lot of inlining possibilities as things grow, | |
106 | - using a switch statement avoids the function call overhead. | |
107 | ||
108 | This function could be moved into `print_insn_normal', but keeping it | |
109 | separate makes clear the interface between `print_insn_normal' and each of | |
110 | the handlers. */ | |
111 | ||
112 | void | |
d031aafb | 113 | mt_cgen_print_operand (CGEN_CPU_DESC cd, |
47b0e7ad NC |
114 | int opindex, |
115 | void * xinfo, | |
116 | CGEN_FIELDS *fields, | |
117 | void const *attrs ATTRIBUTE_UNUSED, | |
118 | bfd_vma pc, | |
119 | int length) | |
ac188222 | 120 | { |
47b0e7ad | 121 | disassemble_info *info = (disassemble_info *) xinfo; |
ac188222 DB |
122 | |
123 | switch (opindex) | |
124 | { | |
d031aafb | 125 | case MT_OPERAND_A23 : |
ac188222 DB |
126 | print_dollarhex (cd, info, fields->f_a23, 0, pc, length); |
127 | break; | |
d031aafb | 128 | case MT_OPERAND_BALL : |
ac188222 DB |
129 | print_dollarhex (cd, info, fields->f_ball, 0, pc, length); |
130 | break; | |
d031aafb | 131 | case MT_OPERAND_BALL2 : |
ac188222 DB |
132 | print_dollarhex (cd, info, fields->f_ball2, 0, pc, length); |
133 | break; | |
d031aafb | 134 | case MT_OPERAND_BANKADDR : |
ac188222 DB |
135 | print_dollarhex (cd, info, fields->f_bankaddr, 0, pc, length); |
136 | break; | |
d031aafb | 137 | case MT_OPERAND_BRC : |
ac188222 DB |
138 | print_dollarhex (cd, info, fields->f_brc, 0, pc, length); |
139 | break; | |
d031aafb | 140 | case MT_OPERAND_BRC2 : |
ac188222 DB |
141 | print_dollarhex (cd, info, fields->f_brc2, 0, pc, length); |
142 | break; | |
d031aafb | 143 | case MT_OPERAND_CB1INCR : |
6f84a2a6 NS |
144 | print_dollarhex (cd, info, fields->f_cb1incr, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); |
145 | break; | |
d031aafb | 146 | case MT_OPERAND_CB1SEL : |
6f84a2a6 NS |
147 | print_dollarhex (cd, info, fields->f_cb1sel, 0, pc, length); |
148 | break; | |
d031aafb | 149 | case MT_OPERAND_CB2INCR : |
6f84a2a6 NS |
150 | print_dollarhex (cd, info, fields->f_cb2incr, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); |
151 | break; | |
d031aafb | 152 | case MT_OPERAND_CB2SEL : |
6f84a2a6 NS |
153 | print_dollarhex (cd, info, fields->f_cb2sel, 0, pc, length); |
154 | break; | |
d031aafb | 155 | case MT_OPERAND_CBRB : |
ac188222 DB |
156 | print_dollarhex (cd, info, fields->f_cbrb, 0, pc, length); |
157 | break; | |
d031aafb | 158 | case MT_OPERAND_CBS : |
ac188222 DB |
159 | print_dollarhex (cd, info, fields->f_cbs, 0, pc, length); |
160 | break; | |
d031aafb | 161 | case MT_OPERAND_CBX : |
ac188222 DB |
162 | print_dollarhex (cd, info, fields->f_cbx, 0, pc, length); |
163 | break; | |
d031aafb | 164 | case MT_OPERAND_CCB : |
ac188222 DB |
165 | print_dollarhex (cd, info, fields->f_ccb, 0, pc, length); |
166 | break; | |
d031aafb | 167 | case MT_OPERAND_CDB : |
ac188222 DB |
168 | print_dollarhex (cd, info, fields->f_cdb, 0, pc, length); |
169 | break; | |
d031aafb | 170 | case MT_OPERAND_CELL : |
ac188222 DB |
171 | print_dollarhex (cd, info, fields->f_cell, 0, pc, length); |
172 | break; | |
d031aafb | 173 | case MT_OPERAND_COLNUM : |
ac188222 DB |
174 | print_dollarhex (cd, info, fields->f_colnum, 0, pc, length); |
175 | break; | |
d031aafb | 176 | case MT_OPERAND_CONTNUM : |
ac188222 DB |
177 | print_dollarhex (cd, info, fields->f_contnum, 0, pc, length); |
178 | break; | |
d031aafb | 179 | case MT_OPERAND_CR : |
ac188222 DB |
180 | print_dollarhex (cd, info, fields->f_cr, 0, pc, length); |
181 | break; | |
d031aafb | 182 | case MT_OPERAND_CTXDISP : |
ac188222 DB |
183 | print_dollarhex (cd, info, fields->f_ctxdisp, 0, pc, length); |
184 | break; | |
d031aafb | 185 | case MT_OPERAND_DUP : |
ac188222 DB |
186 | print_dollarhex (cd, info, fields->f_dup, 0, pc, length); |
187 | break; | |
d031aafb | 188 | case MT_OPERAND_FBDISP : |
ac188222 DB |
189 | print_dollarhex (cd, info, fields->f_fbdisp, 0, pc, length); |
190 | break; | |
d031aafb | 191 | case MT_OPERAND_FBINCR : |
ac188222 DB |
192 | print_dollarhex (cd, info, fields->f_fbincr, 0, pc, length); |
193 | break; | |
d031aafb NS |
194 | case MT_OPERAND_FRDR : |
195 | print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_dr, 0|(1<<CGEN_OPERAND_ABS_ADDR)); | |
ac188222 | 196 | break; |
d031aafb NS |
197 | case MT_OPERAND_FRDRRR : |
198 | print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_drrr, 0|(1<<CGEN_OPERAND_ABS_ADDR)); | |
ac188222 | 199 | break; |
d031aafb NS |
200 | case MT_OPERAND_FRSR1 : |
201 | print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_sr1, 0|(1<<CGEN_OPERAND_ABS_ADDR)); | |
ac188222 | 202 | break; |
d031aafb NS |
203 | case MT_OPERAND_FRSR2 : |
204 | print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_sr2, 0|(1<<CGEN_OPERAND_ABS_ADDR)); | |
ac188222 | 205 | break; |
d031aafb | 206 | case MT_OPERAND_ID : |
ac188222 DB |
207 | print_dollarhex (cd, info, fields->f_id, 0, pc, length); |
208 | break; | |
d031aafb | 209 | case MT_OPERAND_IMM16 : |
ac188222 DB |
210 | print_dollarhex (cd, info, fields->f_imm16s, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); |
211 | break; | |
d031aafb | 212 | case MT_OPERAND_IMM16L : |
6f84a2a6 NS |
213 | print_dollarhex (cd, info, fields->f_imm16l, 0, pc, length); |
214 | break; | |
d031aafb | 215 | case MT_OPERAND_IMM16O : |
6f84a2a6 | 216 | print_pcrel (cd, info, fields->f_imm16s, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); |
ac188222 | 217 | break; |
d031aafb | 218 | case MT_OPERAND_IMM16Z : |
ac188222 DB |
219 | print_dollarhex (cd, info, fields->f_imm16u, 0, pc, length); |
220 | break; | |
d031aafb | 221 | case MT_OPERAND_INCAMT : |
ac188222 DB |
222 | print_dollarhex (cd, info, fields->f_incamt, 0, pc, length); |
223 | break; | |
d031aafb | 224 | case MT_OPERAND_INCR : |
ac188222 DB |
225 | print_dollarhex (cd, info, fields->f_incr, 0, pc, length); |
226 | break; | |
d031aafb | 227 | case MT_OPERAND_LENGTH : |
ac188222 DB |
228 | print_dollarhex (cd, info, fields->f_length, 0, pc, length); |
229 | break; | |
d031aafb | 230 | case MT_OPERAND_LOOPSIZE : |
6f84a2a6 NS |
231 | print_pcrel (cd, info, fields->f_loopo, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); |
232 | break; | |
d031aafb | 233 | case MT_OPERAND_MASK : |
ac188222 DB |
234 | print_dollarhex (cd, info, fields->f_mask, 0, pc, length); |
235 | break; | |
d031aafb | 236 | case MT_OPERAND_MASK1 : |
ac188222 DB |
237 | print_dollarhex (cd, info, fields->f_mask1, 0, pc, length); |
238 | break; | |
d031aafb | 239 | case MT_OPERAND_MODE : |
ac188222 DB |
240 | print_dollarhex (cd, info, fields->f_mode, 0, pc, length); |
241 | break; | |
d031aafb | 242 | case MT_OPERAND_PERM : |
ac188222 DB |
243 | print_dollarhex (cd, info, fields->f_perm, 0, pc, length); |
244 | break; | |
d031aafb | 245 | case MT_OPERAND_RBBC : |
ac188222 DB |
246 | print_dollarhex (cd, info, fields->f_rbbc, 0, pc, length); |
247 | break; | |
d031aafb | 248 | case MT_OPERAND_RC : |
ac188222 DB |
249 | print_dollarhex (cd, info, fields->f_rc, 0, pc, length); |
250 | break; | |
d031aafb | 251 | case MT_OPERAND_RC1 : |
ac188222 DB |
252 | print_dollarhex (cd, info, fields->f_rc1, 0, pc, length); |
253 | break; | |
d031aafb | 254 | case MT_OPERAND_RC2 : |
ac188222 DB |
255 | print_dollarhex (cd, info, fields->f_rc2, 0, pc, length); |
256 | break; | |
d031aafb | 257 | case MT_OPERAND_RC3 : |
6f84a2a6 NS |
258 | print_dollarhex (cd, info, fields->f_rc3, 0, pc, length); |
259 | break; | |
d031aafb | 260 | case MT_OPERAND_RCNUM : |
ac188222 DB |
261 | print_dollarhex (cd, info, fields->f_rcnum, 0, pc, length); |
262 | break; | |
d031aafb | 263 | case MT_OPERAND_RDA : |
ac188222 DB |
264 | print_dollarhex (cd, info, fields->f_rda, 0, pc, length); |
265 | break; | |
d031aafb | 266 | case MT_OPERAND_ROWNUM : |
ac188222 DB |
267 | print_dollarhex (cd, info, fields->f_rownum, 0, pc, length); |
268 | break; | |
d031aafb | 269 | case MT_OPERAND_ROWNUM1 : |
ac188222 DB |
270 | print_dollarhex (cd, info, fields->f_rownum1, 0, pc, length); |
271 | break; | |
d031aafb | 272 | case MT_OPERAND_ROWNUM2 : |
ac188222 DB |
273 | print_dollarhex (cd, info, fields->f_rownum2, 0, pc, length); |
274 | break; | |
d031aafb | 275 | case MT_OPERAND_SIZE : |
ac188222 DB |
276 | print_dollarhex (cd, info, fields->f_size, 0, pc, length); |
277 | break; | |
d031aafb | 278 | case MT_OPERAND_TYPE : |
ac188222 DB |
279 | print_dollarhex (cd, info, fields->f_type, 0, pc, length); |
280 | break; | |
d031aafb | 281 | case MT_OPERAND_WR : |
ac188222 DB |
282 | print_dollarhex (cd, info, fields->f_wr, 0, pc, length); |
283 | break; | |
d031aafb | 284 | case MT_OPERAND_XMODE : |
ac188222 DB |
285 | print_dollarhex (cd, info, fields->f_xmode, 0, pc, length); |
286 | break; | |
287 | ||
288 | default : | |
289 | /* xgettext:c-format */ | |
290 | fprintf (stderr, _("Unrecognized field %d while printing insn.\n"), | |
291 | opindex); | |
292 | abort (); | |
293 | } | |
294 | } | |
295 | ||
d031aafb | 296 | cgen_print_fn * const mt_cgen_print_handlers[] = |
ac188222 DB |
297 | { |
298 | print_insn_normal, | |
299 | }; | |
300 | ||
301 | ||
302 | void | |
d031aafb | 303 | mt_cgen_init_dis (CGEN_CPU_DESC cd) |
ac188222 | 304 | { |
d031aafb NS |
305 | mt_cgen_init_opcode_table (cd); |
306 | mt_cgen_init_ibld_table (cd); | |
307 | cd->print_handlers = & mt_cgen_print_handlers[0]; | |
308 | cd->print_operand = mt_cgen_print_operand; | |
ac188222 DB |
309 | } |
310 | ||
311 | \f | |
312 | /* Default print handler. */ | |
313 | ||
314 | static void | |
315 | print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, | |
316 | void *dis_info, | |
317 | long value, | |
318 | unsigned int attrs, | |
319 | bfd_vma pc ATTRIBUTE_UNUSED, | |
320 | int length ATTRIBUTE_UNUSED) | |
321 | { | |
322 | disassemble_info *info = (disassemble_info *) dis_info; | |
323 | ||
ac188222 DB |
324 | /* Print the operand as directed by the attributes. */ |
325 | if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) | |
326 | ; /* nothing to do */ | |
327 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) | |
328 | (*info->fprintf_func) (info->stream, "%ld", value); | |
329 | else | |
330 | (*info->fprintf_func) (info->stream, "0x%lx", value); | |
331 | } | |
332 | ||
333 | /* Default address handler. */ | |
334 | ||
335 | static void | |
336 | print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, | |
337 | void *dis_info, | |
338 | bfd_vma value, | |
339 | unsigned int attrs, | |
340 | bfd_vma pc ATTRIBUTE_UNUSED, | |
341 | int length ATTRIBUTE_UNUSED) | |
342 | { | |
343 | disassemble_info *info = (disassemble_info *) dis_info; | |
344 | ||
ac188222 DB |
345 | /* Print the operand as directed by the attributes. */ |
346 | if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) | |
47b0e7ad | 347 | ; /* Nothing to do. */ |
ac188222 DB |
348 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) |
349 | (*info->print_address_func) (value, info); | |
350 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) | |
351 | (*info->print_address_func) (value, info); | |
352 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) | |
353 | (*info->fprintf_func) (info->stream, "%ld", (long) value); | |
354 | else | |
355 | (*info->fprintf_func) (info->stream, "0x%lx", (long) value); | |
356 | } | |
357 | ||
358 | /* Keyword print handler. */ | |
359 | ||
360 | static void | |
361 | print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, | |
362 | void *dis_info, | |
363 | CGEN_KEYWORD *keyword_table, | |
364 | long value, | |
365 | unsigned int attrs ATTRIBUTE_UNUSED) | |
366 | { | |
367 | disassemble_info *info = (disassemble_info *) dis_info; | |
368 | const CGEN_KEYWORD_ENTRY *ke; | |
369 | ||
370 | ke = cgen_keyword_lookup_value (keyword_table, value); | |
371 | if (ke != NULL) | |
372 | (*info->fprintf_func) (info->stream, "%s", ke->name); | |
373 | else | |
374 | (*info->fprintf_func) (info->stream, "???"); | |
375 | } | |
376 | \f | |
377 | /* Default insn printer. | |
378 | ||
379 | DIS_INFO is defined as `void *' so the disassembler needn't know anything | |
380 | about disassemble_info. */ | |
381 | ||
382 | static void | |
383 | print_insn_normal (CGEN_CPU_DESC cd, | |
384 | void *dis_info, | |
385 | const CGEN_INSN *insn, | |
386 | CGEN_FIELDS *fields, | |
387 | bfd_vma pc, | |
388 | int length) | |
389 | { | |
390 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); | |
391 | disassemble_info *info = (disassemble_info *) dis_info; | |
392 | const CGEN_SYNTAX_CHAR_TYPE *syn; | |
393 | ||
394 | CGEN_INIT_PRINT (cd); | |
395 | ||
396 | for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) | |
397 | { | |
398 | if (CGEN_SYNTAX_MNEMONIC_P (*syn)) | |
399 | { | |
400 | (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn)); | |
401 | continue; | |
402 | } | |
403 | if (CGEN_SYNTAX_CHAR_P (*syn)) | |
404 | { | |
405 | (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn)); | |
406 | continue; | |
407 | } | |
408 | ||
409 | /* We have an operand. */ | |
d031aafb | 410 | mt_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info, |
ac188222 DB |
411 | fields, CGEN_INSN_ATTRS (insn), pc, length); |
412 | } | |
413 | } | |
414 | \f | |
415 | /* Subroutine of print_insn. Reads an insn into the given buffers and updates | |
416 | the extract info. | |
417 | Returns 0 if all is well, non-zero otherwise. */ | |
418 | ||
419 | static int | |
420 | read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, | |
421 | bfd_vma pc, | |
422 | disassemble_info *info, | |
423 | bfd_byte *buf, | |
424 | int buflen, | |
425 | CGEN_EXTRACT_INFO *ex_info, | |
426 | unsigned long *insn_value) | |
427 | { | |
428 | int status = (*info->read_memory_func) (pc, buf, buflen, info); | |
47b0e7ad | 429 | |
ac188222 DB |
430 | if (status != 0) |
431 | { | |
432 | (*info->memory_error_func) (status, pc, info); | |
433 | return -1; | |
434 | } | |
435 | ||
436 | ex_info->dis_info = info; | |
437 | ex_info->valid = (1 << buflen) - 1; | |
438 | ex_info->insn_bytes = buf; | |
439 | ||
440 | *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG); | |
441 | return 0; | |
442 | } | |
443 | ||
444 | /* Utility to print an insn. | |
445 | BUF is the base part of the insn, target byte order, BUFLEN bytes long. | |
446 | The result is the size of the insn in bytes or zero for an unknown insn | |
447 | or -1 if an error occurs fetching data (memory_error_func will have | |
448 | been called). */ | |
449 | ||
450 | static int | |
451 | print_insn (CGEN_CPU_DESC cd, | |
452 | bfd_vma pc, | |
453 | disassemble_info *info, | |
454 | bfd_byte *buf, | |
455 | unsigned int buflen) | |
456 | { | |
457 | CGEN_INSN_INT insn_value; | |
458 | const CGEN_INSN_LIST *insn_list; | |
459 | CGEN_EXTRACT_INFO ex_info; | |
460 | int basesize; | |
461 | ||
462 | /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */ | |
463 | basesize = cd->base_insn_bitsize < buflen * 8 ? | |
464 | cd->base_insn_bitsize : buflen * 8; | |
465 | insn_value = cgen_get_insn_value (cd, buf, basesize); | |
466 | ||
467 | ||
468 | /* Fill in ex_info fields like read_insn would. Don't actually call | |
469 | read_insn, since the incoming buffer is already read (and possibly | |
470 | modified a la m32r). */ | |
471 | ex_info.valid = (1 << buflen) - 1; | |
472 | ex_info.dis_info = info; | |
473 | ex_info.insn_bytes = buf; | |
474 | ||
475 | /* The instructions are stored in hash lists. | |
476 | Pick the first one and keep trying until we find the right one. */ | |
477 | ||
478 | insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); | |
479 | while (insn_list != NULL) | |
480 | { | |
481 | const CGEN_INSN *insn = insn_list->insn; | |
482 | CGEN_FIELDS fields; | |
483 | int length; | |
484 | unsigned long insn_value_cropped; | |
485 | ||
486 | #ifdef CGEN_VALIDATE_INSN_SUPPORTED | |
487 | /* Not needed as insn shouldn't be in hash lists if not supported. */ | |
488 | /* Supported by this cpu? */ | |
d031aafb | 489 | if (! mt_cgen_insn_supported (cd, insn)) |
ac188222 DB |
490 | { |
491 | insn_list = CGEN_DIS_NEXT_INSN (insn_list); | |
492 | continue; | |
493 | } | |
494 | #endif | |
495 | ||
496 | /* Basic bit mask must be correct. */ | |
497 | /* ??? May wish to allow target to defer this check until the extract | |
498 | handler. */ | |
499 | ||
500 | /* Base size may exceed this instruction's size. Extract the | |
501 | relevant part from the buffer. */ | |
502 | if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && | |
503 | (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) | |
504 | insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), | |
505 | info->endian == BFD_ENDIAN_BIG); | |
506 | else | |
507 | insn_value_cropped = insn_value; | |
508 | ||
509 | if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn)) | |
510 | == CGEN_INSN_BASE_VALUE (insn)) | |
511 | { | |
512 | /* Printing is handled in two passes. The first pass parses the | |
513 | machine insn and extracts the fields. The second pass prints | |
514 | them. */ | |
515 | ||
516 | /* Make sure the entire insn is loaded into insn_value, if it | |
517 | can fit. */ | |
518 | if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) && | |
519 | (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) | |
520 | { | |
521 | unsigned long full_insn_value; | |
522 | int rc = read_insn (cd, pc, info, buf, | |
523 | CGEN_INSN_BITSIZE (insn) / 8, | |
524 | & ex_info, & full_insn_value); | |
525 | if (rc != 0) | |
526 | return rc; | |
527 | length = CGEN_EXTRACT_FN (cd, insn) | |
528 | (cd, insn, &ex_info, full_insn_value, &fields, pc); | |
529 | } | |
530 | else | |
531 | length = CGEN_EXTRACT_FN (cd, insn) | |
532 | (cd, insn, &ex_info, insn_value_cropped, &fields, pc); | |
533 | ||
47b0e7ad | 534 | /* Length < 0 -> error. */ |
ac188222 DB |
535 | if (length < 0) |
536 | return length; | |
537 | if (length > 0) | |
538 | { | |
539 | CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); | |
47b0e7ad | 540 | /* Length is in bits, result is in bytes. */ |
ac188222 DB |
541 | return length / 8; |
542 | } | |
543 | } | |
544 | ||
545 | insn_list = CGEN_DIS_NEXT_INSN (insn_list); | |
546 | } | |
547 | ||
548 | return 0; | |
549 | } | |
550 | ||
551 | /* Default value for CGEN_PRINT_INSN. | |
552 | The result is the size of the insn in bytes or zero for an unknown insn | |
553 | or -1 if an error occured fetching bytes. */ | |
554 | ||
555 | #ifndef CGEN_PRINT_INSN | |
556 | #define CGEN_PRINT_INSN default_print_insn | |
557 | #endif | |
558 | ||
559 | static int | |
560 | default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) | |
561 | { | |
562 | bfd_byte buf[CGEN_MAX_INSN_SIZE]; | |
563 | int buflen; | |
564 | int status; | |
565 | ||
566 | /* Attempt to read the base part of the insn. */ | |
567 | buflen = cd->base_insn_bitsize / 8; | |
568 | status = (*info->read_memory_func) (pc, buf, buflen, info); | |
569 | ||
570 | /* Try again with the minimum part, if min < base. */ | |
571 | if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) | |
572 | { | |
573 | buflen = cd->min_insn_bitsize / 8; | |
574 | status = (*info->read_memory_func) (pc, buf, buflen, info); | |
575 | } | |
576 | ||
577 | if (status != 0) | |
578 | { | |
579 | (*info->memory_error_func) (status, pc, info); | |
580 | return -1; | |
581 | } | |
582 | ||
583 | return print_insn (cd, pc, info, buf, buflen); | |
584 | } | |
585 | ||
586 | /* Main entry point. | |
587 | Print one instruction from PC on INFO->STREAM. | |
588 | Return the size of the instruction (in bytes). */ | |
589 | ||
47b0e7ad NC |
590 | typedef struct cpu_desc_list |
591 | { | |
ac188222 | 592 | struct cpu_desc_list *next; |
fb53f5a8 | 593 | CGEN_BITSET *isa; |
ac188222 DB |
594 | int mach; |
595 | int endian; | |
596 | CGEN_CPU_DESC cd; | |
597 | } cpu_desc_list; | |
598 | ||
599 | int | |
d031aafb | 600 | print_insn_mt (bfd_vma pc, disassemble_info *info) |
ac188222 DB |
601 | { |
602 | static cpu_desc_list *cd_list = 0; | |
603 | cpu_desc_list *cl = 0; | |
604 | static CGEN_CPU_DESC cd = 0; | |
fb53f5a8 | 605 | static CGEN_BITSET *prev_isa; |
ac188222 DB |
606 | static int prev_mach; |
607 | static int prev_endian; | |
608 | int length; | |
fb53f5a8 DB |
609 | CGEN_BITSET *isa; |
610 | int mach; | |
ac188222 DB |
611 | int endian = (info->endian == BFD_ENDIAN_BIG |
612 | ? CGEN_ENDIAN_BIG | |
613 | : CGEN_ENDIAN_LITTLE); | |
614 | enum bfd_architecture arch; | |
615 | ||
616 | /* ??? gdb will set mach but leave the architecture as "unknown" */ | |
617 | #ifndef CGEN_BFD_ARCH | |
d031aafb | 618 | #define CGEN_BFD_ARCH bfd_arch_mt |
ac188222 DB |
619 | #endif |
620 | arch = info->arch; | |
621 | if (arch == bfd_arch_unknown) | |
622 | arch = CGEN_BFD_ARCH; | |
623 | ||
624 | /* There's no standard way to compute the machine or isa number | |
625 | so we leave it to the target. */ | |
626 | #ifdef CGEN_COMPUTE_MACH | |
627 | mach = CGEN_COMPUTE_MACH (info); | |
628 | #else | |
629 | mach = info->mach; | |
630 | #endif | |
631 | ||
632 | #ifdef CGEN_COMPUTE_ISA | |
fb53f5a8 DB |
633 | { |
634 | static CGEN_BITSET *permanent_isa; | |
635 | ||
636 | if (!permanent_isa) | |
637 | permanent_isa = cgen_bitset_create (MAX_ISAS); | |
638 | isa = permanent_isa; | |
639 | cgen_bitset_clear (isa); | |
640 | cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); | |
641 | } | |
ac188222 DB |
642 | #else |
643 | isa = info->insn_sets; | |
644 | #endif | |
645 | ||
646 | /* If we've switched cpu's, try to find a handle we've used before */ | |
647 | if (cd | |
fb53f5a8 | 648 | && (cgen_bitset_compare (isa, prev_isa) != 0 |
ac188222 DB |
649 | || mach != prev_mach |
650 | || endian != prev_endian)) | |
651 | { | |
652 | cd = 0; | |
653 | for (cl = cd_list; cl; cl = cl->next) | |
654 | { | |
fb53f5a8 | 655 | if (cgen_bitset_compare (cl->isa, isa) == 0 && |
ac188222 DB |
656 | cl->mach == mach && |
657 | cl->endian == endian) | |
658 | { | |
659 | cd = cl->cd; | |
fb53f5a8 | 660 | prev_isa = cd->isas; |
ac188222 DB |
661 | break; |
662 | } | |
663 | } | |
664 | } | |
665 | ||
666 | /* If we haven't initialized yet, initialize the opcode table. */ | |
667 | if (! cd) | |
668 | { | |
669 | const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach); | |
670 | const char *mach_name; | |
671 | ||
672 | if (!arch_type) | |
673 | abort (); | |
674 | mach_name = arch_type->printable_name; | |
675 | ||
fb53f5a8 | 676 | prev_isa = cgen_bitset_copy (isa); |
ac188222 DB |
677 | prev_mach = mach; |
678 | prev_endian = endian; | |
d031aafb | 679 | cd = mt_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, |
ac188222 DB |
680 | CGEN_CPU_OPEN_BFDMACH, mach_name, |
681 | CGEN_CPU_OPEN_ENDIAN, prev_endian, | |
682 | CGEN_CPU_OPEN_END); | |
683 | if (!cd) | |
684 | abort (); | |
685 | ||
47b0e7ad | 686 | /* Save this away for future reference. */ |
ac188222 DB |
687 | cl = xmalloc (sizeof (struct cpu_desc_list)); |
688 | cl->cd = cd; | |
fb53f5a8 | 689 | cl->isa = prev_isa; |
ac188222 DB |
690 | cl->mach = mach; |
691 | cl->endian = endian; | |
692 | cl->next = cd_list; | |
693 | cd_list = cl; | |
694 | ||
d031aafb | 695 | mt_cgen_init_dis (cd); |
ac188222 DB |
696 | } |
697 | ||
698 | /* We try to have as much common code as possible. | |
699 | But at this point some targets need to take over. */ | |
700 | /* ??? Some targets may need a hook elsewhere. Try to avoid this, | |
701 | but if not possible try to move this hook elsewhere rather than | |
702 | have two hooks. */ | |
703 | length = CGEN_PRINT_INSN (cd, pc, info); | |
704 | if (length > 0) | |
705 | return length; | |
706 | if (length < 0) | |
707 | return -1; | |
708 | ||
709 | (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); | |
710 | return cd->default_insn_bitsize / 8; | |
711 | } |