ubsan: m32r: left shift of negative value
[deliverable/binutils-gdb.git] / opcodes / mt-opc.h
CommitLineData
4162bb66 1/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
d031aafb 2/* Instruction opcode header for mt.
ac188222
DB
3
4THIS FILE IS MACHINE GENERATED WITH CGEN.
5
b3adc24a 6Copyright (C) 1996-2020 Free Software Foundation, Inc.
ac188222
DB
7
8This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9
9b201bb5
NC
10 This file is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
13 any later version.
ac188222 14
9b201bb5
NC
15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
ac188222 19
9b201bb5
NC
20 You should have received a copy of the GNU General Public License along
21 with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
ac188222
DB
23
24*/
25
d031aafb
NS
26#ifndef MT_OPC_H
27#define MT_OPC_H
ac188222 28
f47b0d4a
AM
29#ifdef __cplusplus
30extern "C" {
31#endif
32
ac188222
DB
33/* -- opc.h */
34
35/* Check applicability of instructions against machines. */
36#define CGEN_VALIDATE_INSN_SUPPORTED
37
38/* Allows reason codes to be output when assembler errors occur. */
39#define CGEN_VERBOSE_ASSEMBLER_ERRORS
40
41/* Override disassembly hashing - there are variable bits in the top
42 byte of these instructions. */
43#define CGEN_DIS_HASH_SIZE 8
44#define CGEN_DIS_HASH(buf, value) (((* (unsigned char *) (buf)) >> 5) % CGEN_DIS_HASH_SIZE)
45
46#define CGEN_ASM_HASH_SIZE 127
d031aafb 47#define CGEN_ASM_HASH(insn) mt_asm_hash (insn)
ac188222 48
d031aafb 49extern unsigned int mt_asm_hash (const char *);
ac188222 50
d031aafb 51extern int mt_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
ac188222
DB
52
53\f
54/* -- opc.c */
d031aafb 55/* Enum declaration for mt instruction types. */
ac188222 56typedef enum cgen_insn_type {
d031aafb
NS
57 MT_INSN_INVALID, MT_INSN_ADD, MT_INSN_ADDU, MT_INSN_ADDI
58 , MT_INSN_ADDUI, MT_INSN_SUB, MT_INSN_SUBU, MT_INSN_SUBI
59 , MT_INSN_SUBUI, MT_INSN_MUL, MT_INSN_MULI, MT_INSN_AND
60 , MT_INSN_ANDI, MT_INSN_OR, MT_INSN_NOP, MT_INSN_ORI
61 , MT_INSN_XOR, MT_INSN_XORI, MT_INSN_NAND, MT_INSN_NANDI
62 , MT_INSN_NOR, MT_INSN_NORI, MT_INSN_XNOR, MT_INSN_XNORI
63 , MT_INSN_LDUI, MT_INSN_LSL, MT_INSN_LSLI, MT_INSN_LSR
64 , MT_INSN_LSRI, MT_INSN_ASR, MT_INSN_ASRI, MT_INSN_BRLT
65 , MT_INSN_BRLE, MT_INSN_BREQ, MT_INSN_BRNE, MT_INSN_JMP
66 , MT_INSN_JAL, MT_INSN_DBNZ, MT_INSN_EI, MT_INSN_DI
67 , MT_INSN_SI, MT_INSN_RETI, MT_INSN_LDW, MT_INSN_STW
68 , MT_INSN_BREAK, MT_INSN_IFLUSH, MT_INSN_LDCTXT, MT_INSN_LDFB
69 , MT_INSN_STFB, MT_INSN_FBCB, MT_INSN_MFBCB, MT_INSN_FBCCI
70 , MT_INSN_FBRCI, MT_INSN_FBCRI, MT_INSN_FBRRI, MT_INSN_MFBCCI
71 , MT_INSN_MFBRCI, MT_INSN_MFBCRI, MT_INSN_MFBRRI, MT_INSN_FBCBDR
72 , MT_INSN_RCFBCB, MT_INSN_MRCFBCB, MT_INSN_CBCAST, MT_INSN_DUPCBCAST
73 , MT_INSN_WFBI, MT_INSN_WFB, MT_INSN_RCRISC, MT_INSN_FBCBINC
74 , MT_INSN_RCXMODE, MT_INSN_INTERLEAVER, MT_INSN_WFBINC, MT_INSN_MWFBINC
75 , MT_INSN_WFBINCR, MT_INSN_MWFBINCR, MT_INSN_FBCBINCS, MT_INSN_MFBCBINCS
76 , MT_INSN_FBCBINCRS, MT_INSN_MFBCBINCRS, MT_INSN_LOOP, MT_INSN_LOOPI
77 , MT_INSN_DFBC, MT_INSN_DWFB, MT_INSN_FBWFB, MT_INSN_DFBR
ac188222
DB
78} CGEN_INSN_TYPE;
79
80/* Index of `invalid' insn place holder. */
d031aafb 81#define CGEN_INSN_INVALID MT_INSN_INVALID
ac188222
DB
82
83/* Total number of insns in table. */
d031aafb 84#define MAX_INSNS ((int) MT_INSN_DFBR + 1)
ac188222
DB
85
86/* This struct records data prior to insertion or after extraction. */
87struct cgen_fields
88{
89 int length;
90 long f_nil;
91 long f_anyof;
92 long f_msys;
93 long f_opc;
94 long f_imm;
95 long f_uu24;
96 long f_sr1;
97 long f_sr2;
98 long f_dr;
99 long f_drrr;
100 long f_imm16u;
101 long f_imm16s;
102 long f_imm16a;
103 long f_uu4a;
104 long f_uu4b;
105 long f_uu12;
6f84a2a6 106 long f_uu8;
ac188222 107 long f_uu16;
6f84a2a6 108 long f_uu1;
ac188222
DB
109 long f_msopc;
110 long f_uu_26_25;
111 long f_mask;
112 long f_bankaddr;
113 long f_rda;
114 long f_uu_2_25;
115 long f_rbbc;
116 long f_perm;
117 long f_mode;
118 long f_uu_1_24;
119 long f_wr;
120 long f_fbincr;
121 long f_uu_2_23;
122 long f_xmode;
123 long f_a23;
124 long f_mask1;
125 long f_cr;
126 long f_type;
127 long f_incamt;
128 long f_cbs;
129 long f_uu_1_19;
130 long f_ball;
131 long f_colnum;
132 long f_brc;
133 long f_incr;
134 long f_fbdisp;
135 long f_uu_4_15;
136 long f_length;
137 long f_uu_1_15;
138 long f_rc;
139 long f_rcnum;
140 long f_rownum;
141 long f_cbx;
142 long f_id;
143 long f_size;
144 long f_rownum1;
145 long f_uu_3_11;
146 long f_rc1;
147 long f_ccb;
148 long f_cbrb;
149 long f_cdb;
150 long f_rownum2;
151 long f_cell;
152 long f_uu_3_9;
153 long f_contnum;
154 long f_uu_1_6;
155 long f_dup;
156 long f_rc2;
157 long f_ctxdisp;
6f84a2a6
NS
158 long f_imm16l;
159 long f_loopo;
160 long f_cb1sel;
161 long f_cb2sel;
162 long f_cb1incr;
163 long f_cb2incr;
164 long f_rc3;
ac188222
DB
165 long f_msysfrsr2;
166 long f_brc2;
167 long f_ball2;
168};
169
170#define CGEN_INIT_PARSE(od) \
171{\
172}
173#define CGEN_INIT_INSERT(od) \
174{\
175}
176#define CGEN_INIT_EXTRACT(od) \
177{\
178}
179#define CGEN_INIT_PRINT(od) \
180{\
181}
182
183
f47b0d4a
AM
184 #ifdef __cplusplus
185 }
186 #endif
187
d031aafb 188#endif /* MT_OPC_H */
This page took 0.698798 seconds and 4 git commands to generate.