Commit | Line | Data |
---|---|---|
87e6d782 NC |
1 | /* Disassembler interface for targets using CGEN. -*- C -*- |
2 | CGEN: Cpu tools GENerator | |
3 | ||
4 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
5 | - the resultant file is machine generated, cgen-dis.in isn't | |
6 | ||
98f70fc4 AM |
7 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 |
8 | Free Software Foundation, Inc. | |
87e6d782 NC |
9 | |
10 | This file is part of the GNU Binutils and GDB, the GNU debugger. | |
11 | ||
12 | This program is free software; you can redistribute it and/or modify | |
13 | it under the terms of the GNU General Public License as published by | |
14 | the Free Software Foundation; either version 2, or (at your option) | |
15 | any later version. | |
16 | ||
17 | This program is distributed in the hope that it will be useful, | |
18 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | GNU General Public License for more details. | |
21 | ||
22 | You should have received a copy of the GNU General Public License | |
23 | along with this program; if not, write to the Free Software Foundation, Inc., | |
24 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
25 | ||
26 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. | |
27 | Keep that in mind. */ | |
28 | ||
29 | #include "sysdep.h" | |
30 | #include <stdio.h> | |
31 | #include "ansidecl.h" | |
32 | #include "dis-asm.h" | |
33 | #include "bfd.h" | |
34 | #include "symcat.h" | |
98f70fc4 | 35 | #include "libiberty.h" |
87e6d782 NC |
36 | #include "openrisc-desc.h" |
37 | #include "openrisc-opc.h" | |
38 | #include "opintl.h" | |
39 | ||
40 | /* Default text to print if an instruction isn't recognized. */ | |
41 | #define UNKNOWN_INSN_MSG _("*unknown*") | |
42 | ||
43 | static void print_normal | |
ffead7ae | 44 | (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int); |
87e6d782 | 45 | static void print_address |
ffead7ae | 46 | (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int); |
87e6d782 | 47 | static void print_keyword |
ffead7ae | 48 | (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int); |
87e6d782 | 49 | static void print_insn_normal |
ffead7ae | 50 | (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); |
0e2ee3ca | 51 | static int print_insn |
ffead7ae | 52 | (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned); |
87e6d782 | 53 | static int default_print_insn |
ffead7ae | 54 | (CGEN_CPU_DESC, bfd_vma, disassemble_info *); |
fc05c67f | 55 | static int read_insn |
ffead7ae MM |
56 | (CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, CGEN_EXTRACT_INFO *, |
57 | unsigned long *); | |
87e6d782 NC |
58 | \f |
59 | /* -- disassembler routines inserted here */ | |
60 | ||
61 | ||
0e2ee3ca NC |
62 | void openrisc_cgen_print_operand |
63 | PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, | |
64 | void const *, bfd_vma, int)); | |
65 | ||
87e6d782 NC |
66 | /* Main entry point for printing operands. |
67 | XINFO is a `void *' and not a `disassemble_info *' to not put a requirement | |
68 | of dis-asm.h on cgen.h. | |
69 | ||
70 | This function is basically just a big switch statement. Earlier versions | |
71 | used tables to look up the function to use, but | |
72 | - if the table contains both assembler and disassembler functions then | |
73 | the disassembler contains much of the assembler and vice-versa, | |
74 | - there's a lot of inlining possibilities as things grow, | |
75 | - using a switch statement avoids the function call overhead. | |
76 | ||
77 | This function could be moved into `print_insn_normal', but keeping it | |
78 | separate makes clear the interface between `print_insn_normal' and each of | |
9a2e995d | 79 | the handlers. */ |
87e6d782 NC |
80 | |
81 | void | |
82 | openrisc_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) | |
83 | CGEN_CPU_DESC cd; | |
84 | int opindex; | |
85 | PTR xinfo; | |
86 | CGEN_FIELDS *fields; | |
fc05c67f | 87 | void const *attrs ATTRIBUTE_UNUSED; |
87e6d782 NC |
88 | bfd_vma pc; |
89 | int length; | |
90 | { | |
91 | disassemble_info *info = (disassemble_info *) xinfo; | |
92 | ||
93 | switch (opindex) | |
94 | { | |
95 | case OPENRISC_OPERAND_ABS_26 : | |
96 | print_address (cd, info, fields->f_abs26, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length); | |
97 | break; | |
98 | case OPENRISC_OPERAND_DISP_26 : | |
99 | print_address (cd, info, fields->f_disp26, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); | |
100 | break; | |
101 | case OPENRISC_OPERAND_HI16 : | |
102 | print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT), pc, length); | |
103 | break; | |
104 | case OPENRISC_OPERAND_LO16 : | |
105 | print_normal (cd, info, fields->f_lo16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT), pc, length); | |
106 | break; | |
107 | case OPENRISC_OPERAND_OP_F_23 : | |
108 | print_normal (cd, info, fields->f_op4, 0, pc, length); | |
109 | break; | |
110 | case OPENRISC_OPERAND_OP_F_3 : | |
111 | print_normal (cd, info, fields->f_op5, 0, pc, length); | |
112 | break; | |
113 | case OPENRISC_OPERAND_RA : | |
114 | print_keyword (cd, info, & openrisc_cgen_opval_h_gr, fields->f_r2, 0); | |
115 | break; | |
116 | case OPENRISC_OPERAND_RB : | |
117 | print_keyword (cd, info, & openrisc_cgen_opval_h_gr, fields->f_r3, 0); | |
118 | break; | |
119 | case OPENRISC_OPERAND_RD : | |
120 | print_keyword (cd, info, & openrisc_cgen_opval_h_gr, fields->f_r1, 0); | |
121 | break; | |
122 | case OPENRISC_OPERAND_SIMM_16 : | |
123 | print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); | |
124 | break; | |
125 | case OPENRISC_OPERAND_UI16NC : | |
126 | print_normal (cd, info, fields->f_i16nc, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_VIRTUAL), pc, length); | |
127 | break; | |
128 | case OPENRISC_OPERAND_UIMM_16 : | |
129 | print_normal (cd, info, fields->f_uimm16, 0, pc, length); | |
130 | break; | |
131 | case OPENRISC_OPERAND_UIMM_5 : | |
132 | print_normal (cd, info, fields->f_uimm5, 0, pc, length); | |
133 | break; | |
134 | ||
135 | default : | |
136 | /* xgettext:c-format */ | |
137 | fprintf (stderr, _("Unrecognized field %d while printing insn.\n"), | |
138 | opindex); | |
139 | abort (); | |
140 | } | |
141 | } | |
142 | ||
143 | cgen_print_fn * const openrisc_cgen_print_handlers[] = | |
144 | { | |
145 | print_insn_normal, | |
146 | }; | |
147 | ||
148 | ||
149 | void | |
150 | openrisc_cgen_init_dis (cd) | |
151 | CGEN_CPU_DESC cd; | |
152 | { | |
153 | openrisc_cgen_init_opcode_table (cd); | |
154 | openrisc_cgen_init_ibld_table (cd); | |
155 | cd->print_handlers = & openrisc_cgen_print_handlers[0]; | |
156 | cd->print_operand = openrisc_cgen_print_operand; | |
157 | } | |
158 | ||
159 | \f | |
160 | /* Default print handler. */ | |
161 | ||
162 | static void | |
ffead7ae MM |
163 | print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
164 | void *dis_info, | |
165 | long value, | |
166 | unsigned int attrs, | |
167 | bfd_vma pc ATTRIBUTE_UNUSED, | |
168 | int length ATTRIBUTE_UNUSED) | |
87e6d782 NC |
169 | { |
170 | disassemble_info *info = (disassemble_info *) dis_info; | |
171 | ||
172 | #ifdef CGEN_PRINT_NORMAL | |
173 | CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); | |
174 | #endif | |
175 | ||
176 | /* Print the operand as directed by the attributes. */ | |
177 | if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) | |
178 | ; /* nothing to do */ | |
179 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) | |
180 | (*info->fprintf_func) (info->stream, "%ld", value); | |
181 | else | |
182 | (*info->fprintf_func) (info->stream, "0x%lx", value); | |
183 | } | |
184 | ||
185 | /* Default address handler. */ | |
186 | ||
187 | static void | |
ffead7ae MM |
188 | print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
189 | void *dis_info, | |
190 | bfd_vma value, | |
191 | unsigned int attrs, | |
192 | bfd_vma pc ATTRIBUTE_UNUSED, | |
193 | int length ATTRIBUTE_UNUSED) | |
87e6d782 NC |
194 | { |
195 | disassemble_info *info = (disassemble_info *) dis_info; | |
196 | ||
197 | #ifdef CGEN_PRINT_ADDRESS | |
198 | CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); | |
199 | #endif | |
200 | ||
201 | /* Print the operand as directed by the attributes. */ | |
202 | if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) | |
203 | ; /* nothing to do */ | |
204 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) | |
205 | (*info->print_address_func) (value, info); | |
206 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) | |
207 | (*info->print_address_func) (value, info); | |
208 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) | |
209 | (*info->fprintf_func) (info->stream, "%ld", (long) value); | |
210 | else | |
211 | (*info->fprintf_func) (info->stream, "0x%lx", (long) value); | |
212 | } | |
213 | ||
214 | /* Keyword print handler. */ | |
215 | ||
216 | static void | |
ffead7ae MM |
217 | print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
218 | void *dis_info, | |
219 | CGEN_KEYWORD *keyword_table, | |
220 | long value, | |
221 | unsigned int attrs ATTRIBUTE_UNUSED) | |
87e6d782 NC |
222 | { |
223 | disassemble_info *info = (disassemble_info *) dis_info; | |
224 | const CGEN_KEYWORD_ENTRY *ke; | |
225 | ||
226 | ke = cgen_keyword_lookup_value (keyword_table, value); | |
227 | if (ke != NULL) | |
228 | (*info->fprintf_func) (info->stream, "%s", ke->name); | |
229 | else | |
230 | (*info->fprintf_func) (info->stream, "???"); | |
231 | } | |
232 | \f | |
233 | /* Default insn printer. | |
234 | ||
ffead7ae | 235 | DIS_INFO is defined as `void *' so the disassembler needn't know anything |
87e6d782 NC |
236 | about disassemble_info. */ |
237 | ||
238 | static void | |
ffead7ae MM |
239 | print_insn_normal (CGEN_CPU_DESC cd, |
240 | void *dis_info, | |
241 | const CGEN_INSN *insn, | |
242 | CGEN_FIELDS *fields, | |
243 | bfd_vma pc, | |
244 | int length) | |
87e6d782 NC |
245 | { |
246 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); | |
247 | disassemble_info *info = (disassemble_info *) dis_info; | |
248 | const CGEN_SYNTAX_CHAR_TYPE *syn; | |
249 | ||
250 | CGEN_INIT_PRINT (cd); | |
251 | ||
252 | for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) | |
253 | { | |
254 | if (CGEN_SYNTAX_MNEMONIC_P (*syn)) | |
255 | { | |
256 | (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn)); | |
257 | continue; | |
258 | } | |
259 | if (CGEN_SYNTAX_CHAR_P (*syn)) | |
260 | { | |
261 | (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn)); | |
262 | continue; | |
263 | } | |
264 | ||
265 | /* We have an operand. */ | |
266 | openrisc_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info, | |
267 | fields, CGEN_INSN_ATTRS (insn), pc, length); | |
268 | } | |
269 | } | |
270 | \f | |
271 | /* Subroutine of print_insn. Reads an insn into the given buffers and updates | |
272 | the extract info. | |
273 | Returns 0 if all is well, non-zero otherwise. */ | |
0e2ee3ca | 274 | |
87e6d782 | 275 | static int |
ffead7ae MM |
276 | read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
277 | bfd_vma pc, | |
278 | disassemble_info *info, | |
279 | char *buf, | |
280 | int buflen, | |
281 | CGEN_EXTRACT_INFO *ex_info, | |
282 | unsigned long *insn_value) | |
87e6d782 NC |
283 | { |
284 | int status = (*info->read_memory_func) (pc, buf, buflen, info); | |
285 | if (status != 0) | |
286 | { | |
287 | (*info->memory_error_func) (status, pc, info); | |
288 | return -1; | |
289 | } | |
290 | ||
291 | ex_info->dis_info = info; | |
292 | ex_info->valid = (1 << buflen) - 1; | |
293 | ex_info->insn_bytes = buf; | |
294 | ||
295 | *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG); | |
296 | return 0; | |
297 | } | |
298 | ||
299 | /* Utility to print an insn. | |
300 | BUF is the base part of the insn, target byte order, BUFLEN bytes long. | |
301 | The result is the size of the insn in bytes or zero for an unknown insn | |
302 | or -1 if an error occurs fetching data (memory_error_func will have | |
303 | been called). */ | |
304 | ||
305 | static int | |
ffead7ae MM |
306 | print_insn (CGEN_CPU_DESC cd, |
307 | bfd_vma pc, | |
308 | disassemble_info *info, | |
309 | char *buf, | |
310 | unsigned int buflen) | |
87e6d782 | 311 | { |
fc7bc883 | 312 | CGEN_INSN_INT insn_value; |
87e6d782 NC |
313 | const CGEN_INSN_LIST *insn_list; |
314 | CGEN_EXTRACT_INFO ex_info; | |
3c3bdf30 | 315 | int basesize; |
87e6d782 | 316 | |
fc7bc883 | 317 | /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */ |
3c3bdf30 NC |
318 | basesize = cd->base_insn_bitsize < buflen * 8 ? |
319 | cd->base_insn_bitsize : buflen * 8; | |
320 | insn_value = cgen_get_insn_value (cd, buf, basesize); | |
321 | ||
fc7bc883 RH |
322 | |
323 | /* Fill in ex_info fields like read_insn would. Don't actually call | |
324 | read_insn, since the incoming buffer is already read (and possibly | |
325 | modified a la m32r). */ | |
326 | ex_info.valid = (1 << buflen) - 1; | |
327 | ex_info.dis_info = info; | |
328 | ex_info.insn_bytes = buf; | |
87e6d782 NC |
329 | |
330 | /* The instructions are stored in hash lists. | |
331 | Pick the first one and keep trying until we find the right one. */ | |
332 | ||
333 | insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); | |
334 | while (insn_list != NULL) | |
335 | { | |
336 | const CGEN_INSN *insn = insn_list->insn; | |
337 | CGEN_FIELDS fields; | |
338 | int length; | |
fc7bc883 | 339 | unsigned long insn_value_cropped; |
87e6d782 NC |
340 | |
341 | #ifdef CGEN_VALIDATE_INSN_SUPPORTED | |
0e2ee3ca | 342 | /* Not needed as insn shouldn't be in hash lists if not supported. */ |
87e6d782 NC |
343 | /* Supported by this cpu? */ |
344 | if (! openrisc_cgen_insn_supported (cd, insn)) | |
345 | { | |
346 | insn_list = CGEN_DIS_NEXT_INSN (insn_list); | |
347 | continue; | |
348 | } | |
349 | #endif | |
350 | ||
351 | /* Basic bit mask must be correct. */ | |
352 | /* ??? May wish to allow target to defer this check until the extract | |
353 | handler. */ | |
fc7bc883 RH |
354 | |
355 | /* Base size may exceed this instruction's size. Extract the | |
356 | relevant part from the buffer. */ | |
0e2ee3ca NC |
357 | if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && |
358 | (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) | |
fc7bc883 RH |
359 | insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), |
360 | info->endian == BFD_ENDIAN_BIG); | |
361 | else | |
362 | insn_value_cropped = insn_value; | |
363 | ||
364 | if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn)) | |
87e6d782 NC |
365 | == CGEN_INSN_BASE_VALUE (insn)) |
366 | { | |
367 | /* Printing is handled in two passes. The first pass parses the | |
368 | machine insn and extracts the fields. The second pass prints | |
369 | them. */ | |
370 | ||
371 | /* Make sure the entire insn is loaded into insn_value, if it | |
372 | can fit. */ | |
0e2ee3ca NC |
373 | if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) && |
374 | (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) | |
87e6d782 NC |
375 | { |
376 | unsigned long full_insn_value; | |
377 | int rc = read_insn (cd, pc, info, buf, | |
378 | CGEN_INSN_BITSIZE (insn) / 8, | |
379 | & ex_info, & full_insn_value); | |
380 | if (rc != 0) | |
381 | return rc; | |
382 | length = CGEN_EXTRACT_FN (cd, insn) | |
383 | (cd, insn, &ex_info, full_insn_value, &fields, pc); | |
384 | } | |
385 | else | |
386 | length = CGEN_EXTRACT_FN (cd, insn) | |
fc7bc883 | 387 | (cd, insn, &ex_info, insn_value_cropped, &fields, pc); |
87e6d782 NC |
388 | |
389 | /* length < 0 -> error */ | |
390 | if (length < 0) | |
391 | return length; | |
392 | if (length > 0) | |
393 | { | |
394 | CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); | |
395 | /* length is in bits, result is in bytes */ | |
396 | return length / 8; | |
397 | } | |
398 | } | |
399 | ||
400 | insn_list = CGEN_DIS_NEXT_INSN (insn_list); | |
401 | } | |
402 | ||
403 | return 0; | |
404 | } | |
405 | ||
406 | /* Default value for CGEN_PRINT_INSN. | |
407 | The result is the size of the insn in bytes or zero for an unknown insn | |
408 | or -1 if an error occured fetching bytes. */ | |
409 | ||
410 | #ifndef CGEN_PRINT_INSN | |
411 | #define CGEN_PRINT_INSN default_print_insn | |
412 | #endif | |
413 | ||
414 | static int | |
ffead7ae | 415 | default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) |
87e6d782 NC |
416 | { |
417 | char buf[CGEN_MAX_INSN_SIZE]; | |
fc7bc883 | 418 | int buflen; |
87e6d782 NC |
419 | int status; |
420 | ||
fc7bc883 RH |
421 | /* Attempt to read the base part of the insn. */ |
422 | buflen = cd->base_insn_bitsize / 8; | |
423 | status = (*info->read_memory_func) (pc, buf, buflen, info); | |
424 | ||
425 | /* Try again with the minimum part, if min < base. */ | |
426 | if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) | |
427 | { | |
428 | buflen = cd->min_insn_bitsize / 8; | |
429 | status = (*info->read_memory_func) (pc, buf, buflen, info); | |
430 | } | |
87e6d782 | 431 | |
87e6d782 NC |
432 | if (status != 0) |
433 | { | |
434 | (*info->memory_error_func) (status, pc, info); | |
435 | return -1; | |
436 | } | |
437 | ||
fc7bc883 | 438 | return print_insn (cd, pc, info, buf, buflen); |
87e6d782 NC |
439 | } |
440 | ||
441 | /* Main entry point. | |
442 | Print one instruction from PC on INFO->STREAM. | |
443 | Return the size of the instruction (in bytes). */ | |
444 | ||
a978a3e5 NC |
445 | typedef struct cpu_desc_list { |
446 | struct cpu_desc_list *next; | |
447 | int isa; | |
448 | int mach; | |
449 | int endian; | |
450 | CGEN_CPU_DESC cd; | |
451 | } cpu_desc_list; | |
452 | ||
87e6d782 | 453 | int |
ffead7ae | 454 | print_insn_openrisc (bfd_vma pc, disassemble_info *info) |
87e6d782 | 455 | { |
a978a3e5 NC |
456 | static cpu_desc_list *cd_list = 0; |
457 | cpu_desc_list *cl = 0; | |
87e6d782 NC |
458 | static CGEN_CPU_DESC cd = 0; |
459 | static int prev_isa; | |
460 | static int prev_mach; | |
461 | static int prev_endian; | |
462 | int length; | |
463 | int isa,mach; | |
464 | int endian = (info->endian == BFD_ENDIAN_BIG | |
465 | ? CGEN_ENDIAN_BIG | |
466 | : CGEN_ENDIAN_LITTLE); | |
467 | enum bfd_architecture arch; | |
468 | ||
469 | /* ??? gdb will set mach but leave the architecture as "unknown" */ | |
470 | #ifndef CGEN_BFD_ARCH | |
471 | #define CGEN_BFD_ARCH bfd_arch_openrisc | |
472 | #endif | |
473 | arch = info->arch; | |
474 | if (arch == bfd_arch_unknown) | |
475 | arch = CGEN_BFD_ARCH; | |
476 | ||
477 | /* There's no standard way to compute the machine or isa number | |
478 | so we leave it to the target. */ | |
479 | #ifdef CGEN_COMPUTE_MACH | |
480 | mach = CGEN_COMPUTE_MACH (info); | |
481 | #else | |
482 | mach = info->mach; | |
483 | #endif | |
484 | ||
485 | #ifdef CGEN_COMPUTE_ISA | |
486 | isa = CGEN_COMPUTE_ISA (info); | |
487 | #else | |
a978a3e5 | 488 | isa = info->insn_sets; |
87e6d782 NC |
489 | #endif |
490 | ||
a978a3e5 | 491 | /* If we've switched cpu's, try to find a handle we've used before */ |
87e6d782 NC |
492 | if (cd |
493 | && (isa != prev_isa | |
494 | || mach != prev_mach | |
495 | || endian != prev_endian)) | |
496 | { | |
87e6d782 | 497 | cd = 0; |
a978a3e5 NC |
498 | for (cl = cd_list; cl; cl = cl->next) |
499 | { | |
500 | if (cl->isa == isa && | |
501 | cl->mach == mach && | |
502 | cl->endian == endian) | |
503 | { | |
504 | cd = cl->cd; | |
505 | break; | |
506 | } | |
507 | } | |
508 | } | |
87e6d782 NC |
509 | |
510 | /* If we haven't initialized yet, initialize the opcode table. */ | |
511 | if (! cd) | |
512 | { | |
513 | const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach); | |
514 | const char *mach_name; | |
515 | ||
516 | if (!arch_type) | |
517 | abort (); | |
518 | mach_name = arch_type->printable_name; | |
519 | ||
520 | prev_isa = isa; | |
521 | prev_mach = mach; | |
522 | prev_endian = endian; | |
523 | cd = openrisc_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, | |
524 | CGEN_CPU_OPEN_BFDMACH, mach_name, | |
525 | CGEN_CPU_OPEN_ENDIAN, prev_endian, | |
526 | CGEN_CPU_OPEN_END); | |
527 | if (!cd) | |
528 | abort (); | |
a978a3e5 NC |
529 | |
530 | /* save this away for future reference */ | |
531 | cl = xmalloc (sizeof (struct cpu_desc_list)); | |
532 | cl->cd = cd; | |
533 | cl->isa = isa; | |
534 | cl->mach = mach; | |
535 | cl->endian = endian; | |
536 | cl->next = cd_list; | |
537 | cd_list = cl; | |
538 | ||
87e6d782 NC |
539 | openrisc_cgen_init_dis (cd); |
540 | } | |
541 | ||
542 | /* We try to have as much common code as possible. | |
543 | But at this point some targets need to take over. */ | |
544 | /* ??? Some targets may need a hook elsewhere. Try to avoid this, | |
545 | but if not possible try to move this hook elsewhere rather than | |
546 | have two hooks. */ | |
547 | length = CGEN_PRINT_INSN (cd, pc, info); | |
548 | if (length > 0) | |
549 | return length; | |
550 | if (length < 0) | |
551 | return -1; | |
552 | ||
553 | (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); | |
554 | return cd->default_insn_bitsize / 8; | |
555 | } |