Commit | Line | Data |
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87e6d782 NC |
1 | /* Disassembler interface for targets using CGEN. -*- C -*- |
2 | CGEN: Cpu tools GENerator | |
3 | ||
4 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
5 | - the resultant file is machine generated, cgen-dis.in isn't | |
6 | ||
7 | Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. | |
8 | ||
9 | This file is part of the GNU Binutils and GDB, the GNU debugger. | |
10 | ||
11 | This program is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
13 | the Free Software Foundation; either version 2, or (at your option) | |
14 | any later version. | |
15 | ||
16 | This program is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
22 | along with this program; if not, write to the Free Software Foundation, Inc., | |
23 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
24 | ||
25 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. | |
26 | Keep that in mind. */ | |
27 | ||
28 | #include "sysdep.h" | |
29 | #include <stdio.h> | |
30 | #include "ansidecl.h" | |
31 | #include "dis-asm.h" | |
32 | #include "bfd.h" | |
33 | #include "symcat.h" | |
34 | #include "openrisc-desc.h" | |
35 | #include "openrisc-opc.h" | |
36 | #include "opintl.h" | |
37 | ||
38 | /* Default text to print if an instruction isn't recognized. */ | |
39 | #define UNKNOWN_INSN_MSG _("*unknown*") | |
40 | ||
41 | static void print_normal | |
42 | PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int)); | |
43 | static void print_address | |
44 | PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int)); | |
45 | static void print_keyword | |
46 | PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int)); | |
47 | static void print_insn_normal | |
48 | PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *, | |
49 | bfd_vma, int)); | |
0e2ee3ca NC |
50 | static int print_insn |
51 | PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned)); | |
87e6d782 NC |
52 | static int default_print_insn |
53 | PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *)); | |
fc05c67f | 54 | static int read_insn |
0e2ee3ca NC |
55 | PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, |
56 | CGEN_EXTRACT_INFO *, unsigned long *)); | |
87e6d782 NC |
57 | \f |
58 | /* -- disassembler routines inserted here */ | |
59 | ||
60 | ||
0e2ee3ca NC |
61 | void openrisc_cgen_print_operand |
62 | PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, | |
63 | void const *, bfd_vma, int)); | |
64 | ||
87e6d782 NC |
65 | /* Main entry point for printing operands. |
66 | XINFO is a `void *' and not a `disassemble_info *' to not put a requirement | |
67 | of dis-asm.h on cgen.h. | |
68 | ||
69 | This function is basically just a big switch statement. Earlier versions | |
70 | used tables to look up the function to use, but | |
71 | - if the table contains both assembler and disassembler functions then | |
72 | the disassembler contains much of the assembler and vice-versa, | |
73 | - there's a lot of inlining possibilities as things grow, | |
74 | - using a switch statement avoids the function call overhead. | |
75 | ||
76 | This function could be moved into `print_insn_normal', but keeping it | |
77 | separate makes clear the interface between `print_insn_normal' and each of | |
78 | the handlers. | |
79 | */ | |
80 | ||
81 | void | |
82 | openrisc_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) | |
83 | CGEN_CPU_DESC cd; | |
84 | int opindex; | |
85 | PTR xinfo; | |
86 | CGEN_FIELDS *fields; | |
fc05c67f | 87 | void const *attrs ATTRIBUTE_UNUSED; |
87e6d782 NC |
88 | bfd_vma pc; |
89 | int length; | |
90 | { | |
91 | disassemble_info *info = (disassemble_info *) xinfo; | |
92 | ||
93 | switch (opindex) | |
94 | { | |
95 | case OPENRISC_OPERAND_ABS_26 : | |
96 | print_address (cd, info, fields->f_abs26, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length); | |
97 | break; | |
98 | case OPENRISC_OPERAND_DISP_26 : | |
99 | print_address (cd, info, fields->f_disp26, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); | |
100 | break; | |
101 | case OPENRISC_OPERAND_HI16 : | |
102 | print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT), pc, length); | |
103 | break; | |
104 | case OPENRISC_OPERAND_LO16 : | |
105 | print_normal (cd, info, fields->f_lo16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT), pc, length); | |
106 | break; | |
107 | case OPENRISC_OPERAND_OP_F_23 : | |
108 | print_normal (cd, info, fields->f_op4, 0, pc, length); | |
109 | break; | |
110 | case OPENRISC_OPERAND_OP_F_3 : | |
111 | print_normal (cd, info, fields->f_op5, 0, pc, length); | |
112 | break; | |
113 | case OPENRISC_OPERAND_RA : | |
114 | print_keyword (cd, info, & openrisc_cgen_opval_h_gr, fields->f_r2, 0); | |
115 | break; | |
116 | case OPENRISC_OPERAND_RB : | |
117 | print_keyword (cd, info, & openrisc_cgen_opval_h_gr, fields->f_r3, 0); | |
118 | break; | |
119 | case OPENRISC_OPERAND_RD : | |
120 | print_keyword (cd, info, & openrisc_cgen_opval_h_gr, fields->f_r1, 0); | |
121 | break; | |
122 | case OPENRISC_OPERAND_SIMM_16 : | |
123 | print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); | |
124 | break; | |
125 | case OPENRISC_OPERAND_UI16NC : | |
126 | print_normal (cd, info, fields->f_i16nc, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_VIRTUAL), pc, length); | |
127 | break; | |
128 | case OPENRISC_OPERAND_UIMM_16 : | |
129 | print_normal (cd, info, fields->f_uimm16, 0, pc, length); | |
130 | break; | |
131 | case OPENRISC_OPERAND_UIMM_5 : | |
132 | print_normal (cd, info, fields->f_uimm5, 0, pc, length); | |
133 | break; | |
134 | ||
135 | default : | |
136 | /* xgettext:c-format */ | |
137 | fprintf (stderr, _("Unrecognized field %d while printing insn.\n"), | |
138 | opindex); | |
139 | abort (); | |
140 | } | |
141 | } | |
142 | ||
143 | cgen_print_fn * const openrisc_cgen_print_handlers[] = | |
144 | { | |
145 | print_insn_normal, | |
146 | }; | |
147 | ||
148 | ||
149 | void | |
150 | openrisc_cgen_init_dis (cd) | |
151 | CGEN_CPU_DESC cd; | |
152 | { | |
153 | openrisc_cgen_init_opcode_table (cd); | |
154 | openrisc_cgen_init_ibld_table (cd); | |
155 | cd->print_handlers = & openrisc_cgen_print_handlers[0]; | |
156 | cd->print_operand = openrisc_cgen_print_operand; | |
157 | } | |
158 | ||
159 | \f | |
160 | /* Default print handler. */ | |
161 | ||
162 | static void | |
163 | print_normal (cd, dis_info, value, attrs, pc, length) | |
87e6d782 | 164 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; |
87e6d782 NC |
165 | PTR dis_info; |
166 | long value; | |
167 | unsigned int attrs; | |
87e6d782 NC |
168 | bfd_vma pc ATTRIBUTE_UNUSED; |
169 | int length ATTRIBUTE_UNUSED; | |
87e6d782 NC |
170 | { |
171 | disassemble_info *info = (disassemble_info *) dis_info; | |
172 | ||
173 | #ifdef CGEN_PRINT_NORMAL | |
174 | CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); | |
175 | #endif | |
176 | ||
177 | /* Print the operand as directed by the attributes. */ | |
178 | if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) | |
179 | ; /* nothing to do */ | |
180 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) | |
181 | (*info->fprintf_func) (info->stream, "%ld", value); | |
182 | else | |
183 | (*info->fprintf_func) (info->stream, "0x%lx", value); | |
184 | } | |
185 | ||
186 | /* Default address handler. */ | |
187 | ||
188 | static void | |
189 | print_address (cd, dis_info, value, attrs, pc, length) | |
87e6d782 | 190 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; |
87e6d782 NC |
191 | PTR dis_info; |
192 | bfd_vma value; | |
193 | unsigned int attrs; | |
87e6d782 NC |
194 | bfd_vma pc ATTRIBUTE_UNUSED; |
195 | int length ATTRIBUTE_UNUSED; | |
87e6d782 NC |
196 | { |
197 | disassemble_info *info = (disassemble_info *) dis_info; | |
198 | ||
199 | #ifdef CGEN_PRINT_ADDRESS | |
200 | CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); | |
201 | #endif | |
202 | ||
203 | /* Print the operand as directed by the attributes. */ | |
204 | if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) | |
205 | ; /* nothing to do */ | |
206 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) | |
207 | (*info->print_address_func) (value, info); | |
208 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) | |
209 | (*info->print_address_func) (value, info); | |
210 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) | |
211 | (*info->fprintf_func) (info->stream, "%ld", (long) value); | |
212 | else | |
213 | (*info->fprintf_func) (info->stream, "0x%lx", (long) value); | |
214 | } | |
215 | ||
216 | /* Keyword print handler. */ | |
217 | ||
218 | static void | |
219 | print_keyword (cd, dis_info, keyword_table, value, attrs) | |
220 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; | |
221 | PTR dis_info; | |
222 | CGEN_KEYWORD *keyword_table; | |
223 | long value; | |
224 | unsigned int attrs ATTRIBUTE_UNUSED; | |
225 | { | |
226 | disassemble_info *info = (disassemble_info *) dis_info; | |
227 | const CGEN_KEYWORD_ENTRY *ke; | |
228 | ||
229 | ke = cgen_keyword_lookup_value (keyword_table, value); | |
230 | if (ke != NULL) | |
231 | (*info->fprintf_func) (info->stream, "%s", ke->name); | |
232 | else | |
233 | (*info->fprintf_func) (info->stream, "???"); | |
234 | } | |
235 | \f | |
236 | /* Default insn printer. | |
237 | ||
238 | DIS_INFO is defined as `PTR' so the disassembler needn't know anything | |
239 | about disassemble_info. */ | |
240 | ||
241 | static void | |
242 | print_insn_normal (cd, dis_info, insn, fields, pc, length) | |
243 | CGEN_CPU_DESC cd; | |
244 | PTR dis_info; | |
245 | const CGEN_INSN *insn; | |
246 | CGEN_FIELDS *fields; | |
247 | bfd_vma pc; | |
248 | int length; | |
249 | { | |
250 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); | |
251 | disassemble_info *info = (disassemble_info *) dis_info; | |
252 | const CGEN_SYNTAX_CHAR_TYPE *syn; | |
253 | ||
254 | CGEN_INIT_PRINT (cd); | |
255 | ||
256 | for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) | |
257 | { | |
258 | if (CGEN_SYNTAX_MNEMONIC_P (*syn)) | |
259 | { | |
260 | (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn)); | |
261 | continue; | |
262 | } | |
263 | if (CGEN_SYNTAX_CHAR_P (*syn)) | |
264 | { | |
265 | (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn)); | |
266 | continue; | |
267 | } | |
268 | ||
269 | /* We have an operand. */ | |
270 | openrisc_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info, | |
271 | fields, CGEN_INSN_ATTRS (insn), pc, length); | |
272 | } | |
273 | } | |
274 | \f | |
275 | /* Subroutine of print_insn. Reads an insn into the given buffers and updates | |
276 | the extract info. | |
277 | Returns 0 if all is well, non-zero otherwise. */ | |
0e2ee3ca | 278 | |
87e6d782 NC |
279 | static int |
280 | read_insn (cd, pc, info, buf, buflen, ex_info, insn_value) | |
fc05c67f | 281 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; |
87e6d782 NC |
282 | bfd_vma pc; |
283 | disassemble_info *info; | |
284 | char *buf; | |
285 | int buflen; | |
286 | CGEN_EXTRACT_INFO *ex_info; | |
287 | unsigned long *insn_value; | |
288 | { | |
289 | int status = (*info->read_memory_func) (pc, buf, buflen, info); | |
290 | if (status != 0) | |
291 | { | |
292 | (*info->memory_error_func) (status, pc, info); | |
293 | return -1; | |
294 | } | |
295 | ||
296 | ex_info->dis_info = info; | |
297 | ex_info->valid = (1 << buflen) - 1; | |
298 | ex_info->insn_bytes = buf; | |
299 | ||
300 | *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG); | |
301 | return 0; | |
302 | } | |
303 | ||
304 | /* Utility to print an insn. | |
305 | BUF is the base part of the insn, target byte order, BUFLEN bytes long. | |
306 | The result is the size of the insn in bytes or zero for an unknown insn | |
307 | or -1 if an error occurs fetching data (memory_error_func will have | |
308 | been called). */ | |
309 | ||
310 | static int | |
311 | print_insn (cd, pc, info, buf, buflen) | |
312 | CGEN_CPU_DESC cd; | |
313 | bfd_vma pc; | |
314 | disassemble_info *info; | |
315 | char *buf; | |
0e2ee3ca | 316 | unsigned int buflen; |
87e6d782 | 317 | { |
fc7bc883 | 318 | CGEN_INSN_INT insn_value; |
87e6d782 NC |
319 | const CGEN_INSN_LIST *insn_list; |
320 | CGEN_EXTRACT_INFO ex_info; | |
3c3bdf30 | 321 | int basesize; |
87e6d782 | 322 | |
fc7bc883 | 323 | /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */ |
3c3bdf30 NC |
324 | basesize = cd->base_insn_bitsize < buflen * 8 ? |
325 | cd->base_insn_bitsize : buflen * 8; | |
326 | insn_value = cgen_get_insn_value (cd, buf, basesize); | |
327 | ||
fc7bc883 RH |
328 | |
329 | /* Fill in ex_info fields like read_insn would. Don't actually call | |
330 | read_insn, since the incoming buffer is already read (and possibly | |
331 | modified a la m32r). */ | |
332 | ex_info.valid = (1 << buflen) - 1; | |
333 | ex_info.dis_info = info; | |
334 | ex_info.insn_bytes = buf; | |
87e6d782 NC |
335 | |
336 | /* The instructions are stored in hash lists. | |
337 | Pick the first one and keep trying until we find the right one. */ | |
338 | ||
339 | insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); | |
340 | while (insn_list != NULL) | |
341 | { | |
342 | const CGEN_INSN *insn = insn_list->insn; | |
343 | CGEN_FIELDS fields; | |
344 | int length; | |
fc7bc883 | 345 | unsigned long insn_value_cropped; |
87e6d782 NC |
346 | |
347 | #ifdef CGEN_VALIDATE_INSN_SUPPORTED | |
0e2ee3ca | 348 | /* Not needed as insn shouldn't be in hash lists if not supported. */ |
87e6d782 NC |
349 | /* Supported by this cpu? */ |
350 | if (! openrisc_cgen_insn_supported (cd, insn)) | |
351 | { | |
352 | insn_list = CGEN_DIS_NEXT_INSN (insn_list); | |
353 | continue; | |
354 | } | |
355 | #endif | |
356 | ||
357 | /* Basic bit mask must be correct. */ | |
358 | /* ??? May wish to allow target to defer this check until the extract | |
359 | handler. */ | |
fc7bc883 RH |
360 | |
361 | /* Base size may exceed this instruction's size. Extract the | |
362 | relevant part from the buffer. */ | |
0e2ee3ca NC |
363 | if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && |
364 | (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) | |
fc7bc883 RH |
365 | insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), |
366 | info->endian == BFD_ENDIAN_BIG); | |
367 | else | |
368 | insn_value_cropped = insn_value; | |
369 | ||
370 | if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn)) | |
87e6d782 NC |
371 | == CGEN_INSN_BASE_VALUE (insn)) |
372 | { | |
373 | /* Printing is handled in two passes. The first pass parses the | |
374 | machine insn and extracts the fields. The second pass prints | |
375 | them. */ | |
376 | ||
377 | /* Make sure the entire insn is loaded into insn_value, if it | |
378 | can fit. */ | |
0e2ee3ca NC |
379 | if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) && |
380 | (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) | |
87e6d782 NC |
381 | { |
382 | unsigned long full_insn_value; | |
383 | int rc = read_insn (cd, pc, info, buf, | |
384 | CGEN_INSN_BITSIZE (insn) / 8, | |
385 | & ex_info, & full_insn_value); | |
386 | if (rc != 0) | |
387 | return rc; | |
388 | length = CGEN_EXTRACT_FN (cd, insn) | |
389 | (cd, insn, &ex_info, full_insn_value, &fields, pc); | |
390 | } | |
391 | else | |
392 | length = CGEN_EXTRACT_FN (cd, insn) | |
fc7bc883 | 393 | (cd, insn, &ex_info, insn_value_cropped, &fields, pc); |
87e6d782 NC |
394 | |
395 | /* length < 0 -> error */ | |
396 | if (length < 0) | |
397 | return length; | |
398 | if (length > 0) | |
399 | { | |
400 | CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); | |
401 | /* length is in bits, result is in bytes */ | |
402 | return length / 8; | |
403 | } | |
404 | } | |
405 | ||
406 | insn_list = CGEN_DIS_NEXT_INSN (insn_list); | |
407 | } | |
408 | ||
409 | return 0; | |
410 | } | |
411 | ||
412 | /* Default value for CGEN_PRINT_INSN. | |
413 | The result is the size of the insn in bytes or zero for an unknown insn | |
414 | or -1 if an error occured fetching bytes. */ | |
415 | ||
416 | #ifndef CGEN_PRINT_INSN | |
417 | #define CGEN_PRINT_INSN default_print_insn | |
418 | #endif | |
419 | ||
420 | static int | |
421 | default_print_insn (cd, pc, info) | |
422 | CGEN_CPU_DESC cd; | |
423 | bfd_vma pc; | |
424 | disassemble_info *info; | |
425 | { | |
426 | char buf[CGEN_MAX_INSN_SIZE]; | |
fc7bc883 | 427 | int buflen; |
87e6d782 NC |
428 | int status; |
429 | ||
fc7bc883 RH |
430 | /* Attempt to read the base part of the insn. */ |
431 | buflen = cd->base_insn_bitsize / 8; | |
432 | status = (*info->read_memory_func) (pc, buf, buflen, info); | |
433 | ||
434 | /* Try again with the minimum part, if min < base. */ | |
435 | if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) | |
436 | { | |
437 | buflen = cd->min_insn_bitsize / 8; | |
438 | status = (*info->read_memory_func) (pc, buf, buflen, info); | |
439 | } | |
87e6d782 | 440 | |
87e6d782 NC |
441 | if (status != 0) |
442 | { | |
443 | (*info->memory_error_func) (status, pc, info); | |
444 | return -1; | |
445 | } | |
446 | ||
fc7bc883 | 447 | return print_insn (cd, pc, info, buf, buflen); |
87e6d782 NC |
448 | } |
449 | ||
450 | /* Main entry point. | |
451 | Print one instruction from PC on INFO->STREAM. | |
452 | Return the size of the instruction (in bytes). */ | |
453 | ||
454 | int | |
455 | print_insn_openrisc (pc, info) | |
456 | bfd_vma pc; | |
457 | disassemble_info *info; | |
458 | { | |
459 | static CGEN_CPU_DESC cd = 0; | |
460 | static int prev_isa; | |
461 | static int prev_mach; | |
462 | static int prev_endian; | |
463 | int length; | |
464 | int isa,mach; | |
465 | int endian = (info->endian == BFD_ENDIAN_BIG | |
466 | ? CGEN_ENDIAN_BIG | |
467 | : CGEN_ENDIAN_LITTLE); | |
468 | enum bfd_architecture arch; | |
469 | ||
470 | /* ??? gdb will set mach but leave the architecture as "unknown" */ | |
471 | #ifndef CGEN_BFD_ARCH | |
472 | #define CGEN_BFD_ARCH bfd_arch_openrisc | |
473 | #endif | |
474 | arch = info->arch; | |
475 | if (arch == bfd_arch_unknown) | |
476 | arch = CGEN_BFD_ARCH; | |
477 | ||
478 | /* There's no standard way to compute the machine or isa number | |
479 | so we leave it to the target. */ | |
480 | #ifdef CGEN_COMPUTE_MACH | |
481 | mach = CGEN_COMPUTE_MACH (info); | |
482 | #else | |
483 | mach = info->mach; | |
484 | #endif | |
485 | ||
486 | #ifdef CGEN_COMPUTE_ISA | |
487 | isa = CGEN_COMPUTE_ISA (info); | |
488 | #else | |
489 | isa = 0; | |
490 | #endif | |
491 | ||
492 | /* If we've switched cpu's, close the current table and open a new one. */ | |
493 | if (cd | |
494 | && (isa != prev_isa | |
495 | || mach != prev_mach | |
496 | || endian != prev_endian)) | |
497 | { | |
498 | openrisc_cgen_cpu_close (cd); | |
499 | cd = 0; | |
500 | } | |
501 | ||
502 | /* If we haven't initialized yet, initialize the opcode table. */ | |
503 | if (! cd) | |
504 | { | |
505 | const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach); | |
506 | const char *mach_name; | |
507 | ||
508 | if (!arch_type) | |
509 | abort (); | |
510 | mach_name = arch_type->printable_name; | |
511 | ||
512 | prev_isa = isa; | |
513 | prev_mach = mach; | |
514 | prev_endian = endian; | |
515 | cd = openrisc_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, | |
516 | CGEN_CPU_OPEN_BFDMACH, mach_name, | |
517 | CGEN_CPU_OPEN_ENDIAN, prev_endian, | |
518 | CGEN_CPU_OPEN_END); | |
519 | if (!cd) | |
520 | abort (); | |
521 | openrisc_cgen_init_dis (cd); | |
522 | } | |
523 | ||
524 | /* We try to have as much common code as possible. | |
525 | But at this point some targets need to take over. */ | |
526 | /* ??? Some targets may need a hook elsewhere. Try to avoid this, | |
527 | but if not possible try to move this hook elsewhere rather than | |
528 | have two hooks. */ | |
529 | length = CGEN_PRINT_INSN (cd, pc, info); | |
530 | if (length > 0) | |
531 | return length; | |
532 | if (length < 0) | |
533 | return -1; | |
534 | ||
535 | (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); | |
536 | return cd->default_insn_bitsize / 8; | |
537 | } |