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4162bb66 | 1 | /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ |
73589c9d CS |
2 | /* Semantic operand instances for or1k. |
3 | ||
4 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
5 | ||
219d1afa | 6 | Copyright (C) 1996-2018 Free Software Foundation, Inc. |
73589c9d CS |
7 | |
8 | This file is part of the GNU Binutils and/or GDB, the GNU debugger. | |
9 | ||
10 | This file is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 3, or (at your option) | |
13 | any later version. | |
14 | ||
15 | It is distributed in the hope that it will be useful, but WITHOUT | |
16 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
17 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
18 | License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License along | |
21 | with this program; if not, write to the Free Software Foundation, Inc., | |
22 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. | |
23 | ||
24 | */ | |
25 | ||
26 | #include "sysdep.h" | |
27 | #include "ansidecl.h" | |
28 | #include "bfd.h" | |
29 | #include "symcat.h" | |
30 | #include "or1k-desc.h" | |
31 | #include "or1k-opc.h" | |
32 | ||
33 | /* Operand references. */ | |
34 | ||
35 | #define OP_ENT(op) OR1K_OPERAND_##op | |
36 | #define INPUT CGEN_OPINST_INPUT | |
37 | #define OUTPUT CGEN_OPINST_OUTPUT | |
38 | #define END CGEN_OPINST_END | |
39 | #define COND_REF CGEN_OPINST_COND_REF | |
40 | ||
41 | static const CGEN_OPINST sfmt_empty_ops[] ATTRIBUTE_UNUSED = { | |
42 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
43 | }; | |
44 | ||
45 | static const CGEN_OPINST sfmt_l_j_ops[] ATTRIBUTE_UNUSED = { | |
46 | { INPUT, "disp26", HW_H_IADDR, CGEN_MODE_UDI, OP_ENT (DISP26), 0, 0 }, | |
47 | { INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, 0 }, | |
48 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 }, | |
49 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
50 | }; | |
51 | ||
c8e98e36 SH |
52 | static const CGEN_OPINST sfmt_l_adrp_ops[] ATTRIBUTE_UNUSED = { |
53 | { INPUT, "disp21", HW_H_IADDR, CGEN_MODE_UDI, OP_ENT (DISP21), 0, 0 }, | |
54 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
55 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
56 | }; | |
57 | ||
73589c9d CS |
58 | static const CGEN_OPINST sfmt_l_jal_ops[] ATTRIBUTE_UNUSED = { |
59 | { INPUT, "disp26", HW_H_IADDR, CGEN_MODE_UDI, OP_ENT (DISP26), 0, 0 }, | |
60 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 }, | |
61 | { INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, 0 }, | |
62 | { OUTPUT, "h_gpr_UDI_9", HW_H_GPR, CGEN_MODE_UDI, 0, 9, 0 }, | |
63 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 }, | |
64 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
65 | }; | |
66 | ||
67 | static const CGEN_OPINST sfmt_l_jr_ops[] ATTRIBUTE_UNUSED = { | |
68 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
69 | { INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, 0 }, | |
70 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 }, | |
71 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
72 | }; | |
73 | ||
74 | static const CGEN_OPINST sfmt_l_jalr_ops[] ATTRIBUTE_UNUSED = { | |
75 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 }, | |
76 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
77 | { INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, 0 }, | |
78 | { OUTPUT, "h_gpr_UDI_9", HW_H_GPR, CGEN_MODE_UDI, 0, 9, 0 }, | |
79 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 }, | |
80 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
81 | }; | |
82 | ||
83 | static const CGEN_OPINST sfmt_l_bnf_ops[] ATTRIBUTE_UNUSED = { | |
84 | { INPUT, "disp26", HW_H_IADDR, CGEN_MODE_UDI, OP_ENT (DISP26), 0, COND_REF }, | |
85 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
86 | { INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
87 | { INPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, | |
88 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
89 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
90 | }; | |
91 | ||
92 | static const CGEN_OPINST sfmt_l_trap_ops[] ATTRIBUTE_UNUSED = { | |
93 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, 0 }, | |
94 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
95 | }; | |
96 | ||
018dc9be | 97 | static const CGEN_OPINST sfmt_l_msync_ops[] ATTRIBUTE_UNUSED = { |
73589c9d CS |
98 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
99 | }; | |
100 | ||
101 | static const CGEN_OPINST sfmt_l_nop_imm_ops[] ATTRIBUTE_UNUSED = { | |
102 | { INPUT, "uimm16", HW_H_UIMM16, CGEN_MODE_UINT, OP_ENT (UIMM16), 0, 0 }, | |
103 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
104 | }; | |
105 | ||
106 | static const CGEN_OPINST sfmt_l_movhi_ops[] ATTRIBUTE_UNUSED = { | |
107 | { INPUT, "uimm16", HW_H_UIMM16, CGEN_MODE_UINT, OP_ENT (UIMM16), 0, 0 }, | |
108 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
109 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
110 | }; | |
111 | ||
112 | static const CGEN_OPINST sfmt_l_macrc_ops[] ATTRIBUTE_UNUSED = { | |
113 | { INPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, | |
114 | { OUTPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 }, | |
115 | { OUTPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, | |
116 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
117 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
118 | }; | |
119 | ||
120 | static const CGEN_OPINST sfmt_l_mfspr_ops[] ATTRIBUTE_UNUSED = { | |
121 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
122 | { INPUT, "uimm16", HW_H_UIMM16, CGEN_MODE_UINT, OP_ENT (UIMM16), 0, 0 }, | |
123 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
124 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
125 | }; | |
126 | ||
127 | static const CGEN_OPINST sfmt_l_mtspr_ops[] ATTRIBUTE_UNUSED = { | |
128 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
129 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
130 | { INPUT, "uimm16_split", HW_H_UIMM16, CGEN_MODE_UINT, OP_ENT (UIMM16_SPLIT), 0, 0 }, | |
131 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
132 | }; | |
133 | ||
134 | static const CGEN_OPINST sfmt_l_lwz_ops[] ATTRIBUTE_UNUSED = { | |
135 | { INPUT, "h_memory_USI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_4", HW_H_MEMORY, CGEN_MODE_USI, 0, 0, 0 }, | |
136 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
137 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, | |
138 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
139 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
140 | }; | |
141 | ||
142 | static const CGEN_OPINST sfmt_l_lws_ops[] ATTRIBUTE_UNUSED = { | |
143 | { INPUT, "h_memory_SI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_4", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 }, | |
144 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
145 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, | |
146 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
147 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
148 | }; | |
149 | ||
999b995d SK |
150 | static const CGEN_OPINST sfmt_l_lwa_ops[] ATTRIBUTE_UNUSED = { |
151 | { INPUT, "h_memory_USI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_4", HW_H_MEMORY, CGEN_MODE_USI, 0, 0, 0 }, | |
152 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
153 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, | |
154 | { OUTPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 }, | |
155 | { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, 0 }, | |
156 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
157 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
158 | }; | |
159 | ||
73589c9d CS |
160 | static const CGEN_OPINST sfmt_l_lbz_ops[] ATTRIBUTE_UNUSED = { |
161 | { INPUT, "h_memory_UQI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_1", HW_H_MEMORY, CGEN_MODE_UQI, 0, 0, 0 }, | |
162 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
163 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, | |
164 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
165 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
166 | }; | |
167 | ||
168 | static const CGEN_OPINST sfmt_l_lbs_ops[] ATTRIBUTE_UNUSED = { | |
169 | { INPUT, "h_memory_QI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_1", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 }, | |
170 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
171 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, | |
172 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
173 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
174 | }; | |
175 | ||
176 | static const CGEN_OPINST sfmt_l_lhz_ops[] ATTRIBUTE_UNUSED = { | |
177 | { INPUT, "h_memory_UHI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_2", HW_H_MEMORY, CGEN_MODE_UHI, 0, 0, 0 }, | |
178 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
179 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, | |
180 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
181 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
182 | }; | |
183 | ||
184 | static const CGEN_OPINST sfmt_l_lhs_ops[] ATTRIBUTE_UNUSED = { | |
185 | { INPUT, "h_memory_HI_c_call__AI_@cpu@_make_load_store_addr_rA_ext__SI_simm16_2", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 }, | |
186 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
187 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, | |
188 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
189 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
190 | }; | |
191 | ||
192 | static const CGEN_OPINST sfmt_l_sw_ops[] ATTRIBUTE_UNUSED = { | |
999b995d | 193 | { INPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 }, |
73589c9d CS |
194 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
195 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
196 | { INPUT, "simm16_split", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16_SPLIT), 0, 0 }, | |
999b995d SK |
197 | { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF }, |
198 | { OUTPUT, "h_memory_USI_addr", HW_H_MEMORY, CGEN_MODE_USI, 0, 0, 0 }, | |
73589c9d CS |
199 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
200 | }; | |
201 | ||
202 | static const CGEN_OPINST sfmt_l_sb_ops[] ATTRIBUTE_UNUSED = { | |
999b995d | 203 | { INPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 }, |
73589c9d CS |
204 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
205 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
206 | { INPUT, "simm16_split", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16_SPLIT), 0, 0 }, | |
999b995d SK |
207 | { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF }, |
208 | { OUTPUT, "h_memory_UQI_addr", HW_H_MEMORY, CGEN_MODE_UQI, 0, 0, 0 }, | |
73589c9d CS |
209 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
210 | }; | |
211 | ||
212 | static const CGEN_OPINST sfmt_l_sh_ops[] ATTRIBUTE_UNUSED = { | |
999b995d | 213 | { INPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 }, |
73589c9d CS |
214 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
215 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
216 | { INPUT, "simm16_split", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16_SPLIT), 0, 0 }, | |
999b995d SK |
217 | { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF }, |
218 | { OUTPUT, "h_memory_UHI_addr", HW_H_MEMORY, CGEN_MODE_UHI, 0, 0, 0 }, | |
219 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
220 | }; | |
221 | ||
222 | static const CGEN_OPINST sfmt_l_swa_ops[] ATTRIBUTE_UNUSED = { | |
223 | { INPUT, "atomic_address", HW_H_ATOMIC_ADDRESS, CGEN_MODE_SI, 0, 0, 0 }, | |
224 | { INPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, 0 }, | |
225 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
226 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, COND_REF }, | |
227 | { INPUT, "simm16_split", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16_SPLIT), 0, 0 }, | |
228 | { INPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, | |
229 | { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, 0 }, | |
230 | { OUTPUT, "h_memory_USI_addr", HW_H_MEMORY, CGEN_MODE_USI, 0, 0, COND_REF }, | |
231 | { OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, | |
73589c9d CS |
232 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
233 | }; | |
234 | ||
235 | static const CGEN_OPINST sfmt_l_sll_ops[] ATTRIBUTE_UNUSED = { | |
236 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
237 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
238 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
239 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
240 | }; | |
241 | ||
242 | static const CGEN_OPINST sfmt_l_slli_ops[] ATTRIBUTE_UNUSED = { | |
243 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
244 | { INPUT, "uimm6", HW_H_UIMM6, CGEN_MODE_UINT, OP_ENT (UIMM6), 0, 0 }, | |
245 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
246 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
247 | }; | |
248 | ||
249 | static const CGEN_OPINST sfmt_l_and_ops[] ATTRIBUTE_UNUSED = { | |
250 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
251 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
252 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
253 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
254 | }; | |
255 | ||
256 | static const CGEN_OPINST sfmt_l_add_ops[] ATTRIBUTE_UNUSED = { | |
257 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
258 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
259 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
260 | { INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, | |
261 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, | |
262 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
263 | { OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, | |
264 | { OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, | |
265 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
266 | }; | |
267 | ||
268 | static const CGEN_OPINST sfmt_l_addc_ops[] ATTRIBUTE_UNUSED = { | |
269 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
270 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
271 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
272 | { INPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, | |
273 | { INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, | |
274 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, | |
275 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
276 | { OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, | |
277 | { OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, | |
278 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
279 | }; | |
280 | ||
07f5f4c6 | 281 | static const CGEN_OPINST sfmt_l_mul_ops[] ATTRIBUTE_UNUSED = { |
73589c9d | 282 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, |
07f5f4c6 RH |
283 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
284 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
285 | { INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, | |
286 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, | |
287 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
288 | { OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, | |
289 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
290 | }; | |
291 | ||
292 | static const CGEN_OPINST sfmt_l_muld_ops[] ATTRIBUTE_UNUSED = { | |
293 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
294 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
295 | { OUTPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 }, | |
296 | { OUTPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, | |
297 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
298 | }; | |
299 | ||
300 | static const CGEN_OPINST sfmt_l_mulu_ops[] ATTRIBUTE_UNUSED = { | |
301 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
302 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
73589c9d CS |
303 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, |
304 | { INPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, | |
305 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, | |
07f5f4c6 RH |
306 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, |
307 | { OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, | |
308 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
309 | }; | |
310 | ||
311 | static const CGEN_OPINST sfmt_l_div_ops[] ATTRIBUTE_UNUSED = { | |
312 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
313 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, COND_REF }, | |
314 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
315 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
316 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, COND_REF }, | |
317 | { OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
318 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
319 | }; | |
320 | ||
321 | static const CGEN_OPINST sfmt_l_divu_ops[] ATTRIBUTE_UNUSED = { | |
322 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
323 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, COND_REF }, | |
324 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
325 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
73589c9d CS |
326 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, COND_REF }, |
327 | { OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
73589c9d CS |
328 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
329 | }; | |
330 | ||
331 | static const CGEN_OPINST sfmt_l_ff1_ops[] ATTRIBUTE_UNUSED = { | |
332 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
333 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
334 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
335 | }; | |
336 | ||
337 | static const CGEN_OPINST sfmt_l_xori_ops[] ATTRIBUTE_UNUSED = { | |
338 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
339 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, | |
340 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
341 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
342 | }; | |
343 | ||
344 | static const CGEN_OPINST sfmt_l_addi_ops[] ATTRIBUTE_UNUSED = { | |
345 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
346 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
347 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, | |
348 | { INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, | |
349 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, | |
350 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
351 | { OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, | |
352 | { OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, | |
353 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
354 | }; | |
355 | ||
356 | static const CGEN_OPINST sfmt_l_addic_ops[] ATTRIBUTE_UNUSED = { | |
357 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
358 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
359 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, | |
360 | { INPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, | |
361 | { INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, | |
362 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, | |
363 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
364 | { OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, | |
365 | { OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, | |
366 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
367 | }; | |
368 | ||
07f5f4c6 RH |
369 | static const CGEN_OPINST sfmt_l_muli_ops[] ATTRIBUTE_UNUSED = { |
370 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
371 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
372 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, | |
373 | { INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, | |
374 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, | |
375 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
376 | { OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, | |
377 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
378 | }; | |
379 | ||
73589c9d CS |
380 | static const CGEN_OPINST sfmt_l_exths_ops[] ATTRIBUTE_UNUSED = { |
381 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
382 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
383 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
384 | }; | |
385 | ||
386 | static const CGEN_OPINST sfmt_l_cmov_ops[] ATTRIBUTE_UNUSED = { | |
387 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, COND_REF }, | |
388 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, COND_REF }, | |
389 | { INPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, | |
390 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, COND_REF }, | |
391 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
392 | }; | |
393 | ||
394 | static const CGEN_OPINST sfmt_l_sfgts_ops[] ATTRIBUTE_UNUSED = { | |
395 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
396 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
397 | { OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, | |
398 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
399 | }; | |
400 | ||
401 | static const CGEN_OPINST sfmt_l_sfgtsi_ops[] ATTRIBUTE_UNUSED = { | |
402 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
403 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, | |
404 | { OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, | |
405 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
406 | }; | |
407 | ||
408 | static const CGEN_OPINST sfmt_l_mac_ops[] ATTRIBUTE_UNUSED = { | |
409 | { INPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 }, | |
410 | { INPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, | |
07f5f4c6 | 411 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, |
73589c9d CS |
412 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
413 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
07f5f4c6 RH |
414 | { INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, |
415 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, | |
73589c9d CS |
416 | { OUTPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 }, |
417 | { OUTPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, | |
07f5f4c6 | 418 | { OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, |
73589c9d CS |
419 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
420 | }; | |
421 | ||
422 | static const CGEN_OPINST sfmt_l_maci_ops[] ATTRIBUTE_UNUSED = { | |
423 | { INPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 }, | |
424 | { INPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, | |
07f5f4c6 | 425 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, |
73589c9d CS |
426 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, |
427 | { INPUT, "simm16", HW_H_SIMM16, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, | |
07f5f4c6 RH |
428 | { INPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, |
429 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, | |
73589c9d CS |
430 | { OUTPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 }, |
431 | { OUTPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, | |
07f5f4c6 RH |
432 | { OUTPUT, "sys_sr_ov", HW_H_SYS_SR_OV, CGEN_MODE_UDI, 0, 0, 0 }, |
433 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
434 | }; | |
435 | ||
436 | static const CGEN_OPINST sfmt_l_macu_ops[] ATTRIBUTE_UNUSED = { | |
437 | { INPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 }, | |
438 | { INPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, | |
439 | { INPUT, "pc", HW_H_PC, CGEN_MODE_UDI, 0, 0, COND_REF }, | |
440 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
441 | { INPUT, "rB", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RB), 0, 0 }, | |
442 | { INPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, | |
443 | { INPUT, "sys_sr_ove", HW_H_SYS_SR_OVE, CGEN_MODE_UDI, 0, 0, 0 }, | |
444 | { OUTPUT, "mac_machi", HW_H_MAC_MACHI, CGEN_MODE_UDI, 0, 0, 0 }, | |
445 | { OUTPUT, "mac_maclo", HW_H_MAC_MACLO, CGEN_MODE_UDI, 0, 0, 0 }, | |
446 | { OUTPUT, "sys_sr_cy", HW_H_SYS_SR_CY, CGEN_MODE_UDI, 0, 0, 0 }, | |
73589c9d CS |
447 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
448 | }; | |
449 | ||
450 | static const CGEN_OPINST sfmt_lf_add_s_ops[] ATTRIBUTE_UNUSED = { | |
451 | { INPUT, "rASF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RASF), 0, 0 }, | |
452 | { INPUT, "rBSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RBSF), 0, 0 }, | |
453 | { OUTPUT, "rDSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RDSF), 0, 0 }, | |
454 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
455 | }; | |
456 | ||
457 | static const CGEN_OPINST sfmt_lf_add_d_ops[] ATTRIBUTE_UNUSED = { | |
458 | { INPUT, "rADF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RADF), 0, 0 }, | |
459 | { INPUT, "rBDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RBDF), 0, 0 }, | |
460 | { OUTPUT, "rDDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RDDF), 0, 0 }, | |
461 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
462 | }; | |
463 | ||
464 | static const CGEN_OPINST sfmt_lf_itof_s_ops[] ATTRIBUTE_UNUSED = { | |
465 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
466 | { INPUT, "sys_fpcsr_rm", HW_H_SYS_FPCSR_RM, CGEN_MODE_UDI, 0, 0, 0 }, | |
467 | { OUTPUT, "rDSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RDSF), 0, 0 }, | |
468 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
469 | }; | |
470 | ||
471 | static const CGEN_OPINST sfmt_lf_itof_d_ops[] ATTRIBUTE_UNUSED = { | |
472 | { INPUT, "rA", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RA), 0, 0 }, | |
473 | { INPUT, "sys_fpcsr_rm", HW_H_SYS_FPCSR_RM, CGEN_MODE_UDI, 0, 0, 0 }, | |
474 | { OUTPUT, "rDDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RDDF), 0, 0 }, | |
475 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
476 | }; | |
477 | ||
478 | static const CGEN_OPINST sfmt_lf_ftoi_s_ops[] ATTRIBUTE_UNUSED = { | |
479 | { INPUT, "rASF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RASF), 0, 0 }, | |
480 | { INPUT, "sys_fpcsr_rm", HW_H_SYS_FPCSR_RM, CGEN_MODE_UDI, 0, 0, 0 }, | |
481 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
482 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
483 | }; | |
484 | ||
485 | static const CGEN_OPINST sfmt_lf_ftoi_d_ops[] ATTRIBUTE_UNUSED = { | |
486 | { INPUT, "rADF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RADF), 0, 0 }, | |
487 | { INPUT, "sys_fpcsr_rm", HW_H_SYS_FPCSR_RM, CGEN_MODE_UDI, 0, 0, 0 }, | |
488 | { OUTPUT, "rD", HW_H_GPR, CGEN_MODE_UDI, OP_ENT (RD), 0, 0 }, | |
489 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
490 | }; | |
491 | ||
492 | static const CGEN_OPINST sfmt_lf_eq_s_ops[] ATTRIBUTE_UNUSED = { | |
493 | { INPUT, "rASF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RASF), 0, 0 }, | |
494 | { INPUT, "rBSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RBSF), 0, 0 }, | |
495 | { OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, | |
496 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
497 | }; | |
498 | ||
499 | static const CGEN_OPINST sfmt_lf_eq_d_ops[] ATTRIBUTE_UNUSED = { | |
500 | { INPUT, "rADF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RADF), 0, 0 }, | |
501 | { INPUT, "rBDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RBDF), 0, 0 }, | |
502 | { OUTPUT, "sys_sr_f", HW_H_SYS_SR_F, CGEN_MODE_UDI, 0, 0, 0 }, | |
503 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
504 | }; | |
505 | ||
506 | static const CGEN_OPINST sfmt_lf_madd_s_ops[] ATTRIBUTE_UNUSED = { | |
507 | { INPUT, "rASF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RASF), 0, 0 }, | |
508 | { INPUT, "rBSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RBSF), 0, 0 }, | |
509 | { INPUT, "rDSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RDSF), 0, 0 }, | |
510 | { OUTPUT, "rDSF", HW_H_FSR, CGEN_MODE_SF, OP_ENT (RDSF), 0, 0 }, | |
511 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
512 | }; | |
513 | ||
514 | static const CGEN_OPINST sfmt_lf_madd_d_ops[] ATTRIBUTE_UNUSED = { | |
515 | { INPUT, "rADF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RADF), 0, 0 }, | |
516 | { INPUT, "rBDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RBDF), 0, 0 }, | |
517 | { INPUT, "rDDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RDDF), 0, 0 }, | |
518 | { OUTPUT, "rDDF", HW_H_FDR, CGEN_MODE_DF, OP_ENT (RDDF), 0, 0 }, | |
519 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } | |
520 | }; | |
521 | ||
522 | #undef OP_ENT | |
523 | #undef INPUT | |
524 | #undef OUTPUT | |
525 | #undef END | |
526 | #undef COND_REF | |
527 | ||
528 | /* Operand instance lookup table. */ | |
529 | ||
530 | static const CGEN_OPINST *or1k_cgen_opinst_table[MAX_INSNS] = { | |
531 | 0, | |
532 | & sfmt_l_j_ops[0], | |
c8e98e36 | 533 | & sfmt_l_adrp_ops[0], |
73589c9d CS |
534 | & sfmt_l_jal_ops[0], |
535 | & sfmt_l_jr_ops[0], | |
536 | & sfmt_l_jalr_ops[0], | |
537 | & sfmt_l_bnf_ops[0], | |
538 | & sfmt_l_bnf_ops[0], | |
539 | & sfmt_l_trap_ops[0], | |
540 | & sfmt_l_trap_ops[0], | |
018dc9be SK |
541 | & sfmt_l_msync_ops[0], |
542 | & sfmt_l_msync_ops[0], | |
543 | & sfmt_l_msync_ops[0], | |
544 | & sfmt_l_msync_ops[0], | |
73589c9d | 545 | & sfmt_l_nop_imm_ops[0], |
018dc9be | 546 | & sfmt_l_msync_ops[0], |
73589c9d CS |
547 | & sfmt_l_movhi_ops[0], |
548 | & sfmt_l_macrc_ops[0], | |
549 | & sfmt_l_mfspr_ops[0], | |
550 | & sfmt_l_mtspr_ops[0], | |
551 | & sfmt_l_lwz_ops[0], | |
552 | & sfmt_l_lws_ops[0], | |
999b995d | 553 | & sfmt_l_lwa_ops[0], |
73589c9d CS |
554 | & sfmt_l_lbz_ops[0], |
555 | & sfmt_l_lbs_ops[0], | |
556 | & sfmt_l_lhz_ops[0], | |
557 | & sfmt_l_lhs_ops[0], | |
558 | & sfmt_l_sw_ops[0], | |
559 | & sfmt_l_sb_ops[0], | |
560 | & sfmt_l_sh_ops[0], | |
999b995d | 561 | & sfmt_l_swa_ops[0], |
73589c9d CS |
562 | & sfmt_l_sll_ops[0], |
563 | & sfmt_l_slli_ops[0], | |
564 | & sfmt_l_sll_ops[0], | |
565 | & sfmt_l_slli_ops[0], | |
566 | & sfmt_l_sll_ops[0], | |
567 | & sfmt_l_slli_ops[0], | |
568 | & sfmt_l_sll_ops[0], | |
569 | & sfmt_l_slli_ops[0], | |
570 | & sfmt_l_and_ops[0], | |
571 | & sfmt_l_and_ops[0], | |
572 | & sfmt_l_and_ops[0], | |
573 | & sfmt_l_add_ops[0], | |
574 | & sfmt_l_add_ops[0], | |
575 | & sfmt_l_addc_ops[0], | |
07f5f4c6 RH |
576 | & sfmt_l_mul_ops[0], |
577 | & sfmt_l_muld_ops[0], | |
578 | & sfmt_l_mulu_ops[0], | |
579 | & sfmt_l_muld_ops[0], | |
73589c9d | 580 | & sfmt_l_div_ops[0], |
07f5f4c6 | 581 | & sfmt_l_divu_ops[0], |
73589c9d CS |
582 | & sfmt_l_ff1_ops[0], |
583 | & sfmt_l_ff1_ops[0], | |
584 | & sfmt_l_mfspr_ops[0], | |
585 | & sfmt_l_mfspr_ops[0], | |
586 | & sfmt_l_xori_ops[0], | |
587 | & sfmt_l_addi_ops[0], | |
588 | & sfmt_l_addic_ops[0], | |
07f5f4c6 | 589 | & sfmt_l_muli_ops[0], |
73589c9d CS |
590 | & sfmt_l_exths_ops[0], |
591 | & sfmt_l_exths_ops[0], | |
592 | & sfmt_l_exths_ops[0], | |
593 | & sfmt_l_exths_ops[0], | |
594 | & sfmt_l_exths_ops[0], | |
595 | & sfmt_l_exths_ops[0], | |
596 | & sfmt_l_cmov_ops[0], | |
597 | & sfmt_l_sfgts_ops[0], | |
598 | & sfmt_l_sfgtsi_ops[0], | |
599 | & sfmt_l_sfgts_ops[0], | |
600 | & sfmt_l_sfgtsi_ops[0], | |
601 | & sfmt_l_sfgts_ops[0], | |
602 | & sfmt_l_sfgtsi_ops[0], | |
603 | & sfmt_l_sfgts_ops[0], | |
604 | & sfmt_l_sfgtsi_ops[0], | |
605 | & sfmt_l_sfgts_ops[0], | |
606 | & sfmt_l_sfgtsi_ops[0], | |
607 | & sfmt_l_sfgts_ops[0], | |
608 | & sfmt_l_sfgtsi_ops[0], | |
609 | & sfmt_l_sfgts_ops[0], | |
610 | & sfmt_l_sfgtsi_ops[0], | |
611 | & sfmt_l_sfgts_ops[0], | |
612 | & sfmt_l_sfgtsi_ops[0], | |
613 | & sfmt_l_sfgts_ops[0], | |
614 | & sfmt_l_sfgtsi_ops[0], | |
615 | & sfmt_l_sfgts_ops[0], | |
616 | & sfmt_l_sfgtsi_ops[0], | |
617 | & sfmt_l_mac_ops[0], | |
73589c9d | 618 | & sfmt_l_maci_ops[0], |
07f5f4c6 RH |
619 | & sfmt_l_macu_ops[0], |
620 | & sfmt_l_mac_ops[0], | |
621 | & sfmt_l_macu_ops[0], | |
018dc9be SK |
622 | & sfmt_l_msync_ops[0], |
623 | & sfmt_l_msync_ops[0], | |
624 | & sfmt_l_msync_ops[0], | |
625 | & sfmt_l_msync_ops[0], | |
626 | & sfmt_l_msync_ops[0], | |
627 | & sfmt_l_msync_ops[0], | |
628 | & sfmt_l_msync_ops[0], | |
629 | & sfmt_l_msync_ops[0], | |
73589c9d CS |
630 | & sfmt_lf_add_s_ops[0], |
631 | & sfmt_lf_add_d_ops[0], | |
632 | & sfmt_lf_add_s_ops[0], | |
633 | & sfmt_lf_add_d_ops[0], | |
634 | & sfmt_lf_add_s_ops[0], | |
635 | & sfmt_lf_add_d_ops[0], | |
636 | & sfmt_lf_add_s_ops[0], | |
637 | & sfmt_lf_add_d_ops[0], | |
638 | & sfmt_lf_add_s_ops[0], | |
639 | & sfmt_lf_add_d_ops[0], | |
640 | & sfmt_lf_itof_s_ops[0], | |
641 | & sfmt_lf_itof_d_ops[0], | |
642 | & sfmt_lf_ftoi_s_ops[0], | |
643 | & sfmt_lf_ftoi_d_ops[0], | |
644 | & sfmt_lf_eq_s_ops[0], | |
645 | & sfmt_lf_eq_d_ops[0], | |
646 | & sfmt_lf_eq_s_ops[0], | |
647 | & sfmt_lf_eq_d_ops[0], | |
648 | & sfmt_lf_eq_s_ops[0], | |
649 | & sfmt_lf_eq_d_ops[0], | |
650 | & sfmt_lf_eq_s_ops[0], | |
651 | & sfmt_lf_eq_d_ops[0], | |
652 | & sfmt_lf_eq_s_ops[0], | |
653 | & sfmt_lf_eq_d_ops[0], | |
654 | & sfmt_lf_eq_s_ops[0], | |
655 | & sfmt_lf_eq_d_ops[0], | |
656 | & sfmt_lf_madd_s_ops[0], | |
657 | & sfmt_lf_madd_d_ops[0], | |
018dc9be SK |
658 | & sfmt_l_msync_ops[0], |
659 | & sfmt_l_msync_ops[0], | |
73589c9d CS |
660 | }; |
661 | ||
662 | /* Function to call before using the operand instance table. */ | |
663 | ||
664 | void | |
e6c7cdec | 665 | or1k_cgen_init_opinst_table (CGEN_CPU_DESC cd) |
73589c9d CS |
666 | { |
667 | int i; | |
668 | const CGEN_OPINST **oi = & or1k_cgen_opinst_table[0]; | |
669 | CGEN_INSN *insns = (CGEN_INSN *) cd->insn_table.init_entries; | |
670 | for (i = 0; i < MAX_INSNS; ++i) | |
671 | insns[i].opinst = oi[i]; | |
672 | } |