[deliverable/binutils-gdb.git] / opcodes / ppc-dis.c

/* ppc-dis.c -- Disassemble PowerPC instructions
   Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005
   Free Software Foundation, Inc.
   Written by Ian Lance Taylor, Cygnus Support

This file is part of GDB, GAS, and the GNU binutils.

GDB, GAS, and the GNU binutils are free software; you can redistribute
them and/or modify them under the terms of the GNU General Public
License as published by the Free Software Foundation; either version
2, or (at your option) any later version.

GDB, GAS, and the GNU binutils are distributed in the hope that they
will be useful, but WITHOUT ANY WARRANTY; without even the implied
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
the GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this file; see the file COPYING.  If not, write to the Free
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */

#include <stdio.h>
#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/ppc.h"

/* This file provides several disassembler functions, all of which use
   the disassembler interface defined in dis-asm.h.  Several functions
   are provided because this file handles disassembly for the PowerPC
   in both big and little endian mode and also for the POWER (RS/6000)
   chip.  */

static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int, int);

struct dis_private {
  /* Stash the result of parsing disassembler_options here.  */
  int dialect;
};

/* Determine which set of machines to disassemble for.  PPC403/601 or
   BookE.  For convenience, also disassemble instructions supported
   by the AltiVec vector unit.  */

static int
powerpc_dialect (struct disassemble_info *info)
{
  int dialect = PPC_OPCODE_PPC;

  if (BFD_DEFAULT_TARGET_SIZE == 64)
    dialect |= PPC_OPCODE_64;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "booke") != NULL)
    dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
  else if ((info->mach == bfd_mach_ppc_e500)
	   || (info->disassembler_options
	       && strstr (info->disassembler_options, "e500") != NULL))
    dialect |= (PPC_OPCODE_BOOKE
		| PPC_OPCODE_SPE | PPC_OPCODE_ISEL
		| PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
		| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
		| PPC_OPCODE_RFMCI);
  else if (info->disassembler_options
	   && strstr (info->disassembler_options, "efs") != NULL)
    dialect |= PPC_OPCODE_EFS;
  else if (info->disassembler_options
	   && strstr (info->disassembler_options, "e300") != NULL)
    dialect |= PPC_OPCODE_E300 | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON;
  else
    dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
		| PPC_OPCODE_COMMON | PPC_OPCODE_ALTIVEC);

  if (info->disassembler_options
      && strstr (info->disassembler_options, "power4") != NULL)
    dialect |= PPC_OPCODE_POWER4;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "power5") != NULL)
    dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "any") != NULL)
    dialect |= PPC_OPCODE_ANY;

  if (info->disassembler_options)
    {
      if (strstr (info->disassembler_options, "32") != NULL)
	dialect &= ~PPC_OPCODE_64;
      else if (strstr (info->disassembler_options, "64") != NULL)
	dialect |= PPC_OPCODE_64;
    }

  ((struct dis_private *) &info->private_data)->dialect = dialect;
  return dialect;
}

/* Print a big endian PowerPC instruction.  */

int
print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
{
  int dialect = ((struct dis_private *) &info->private_data)->dialect;
  return print_insn_powerpc (memaddr, info, 1, dialect);
}

/* Print a little endian PowerPC instruction.  */

int
print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
{
  int dialect = ((struct dis_private *) &info->private_data)->dialect;
  return print_insn_powerpc (memaddr, info, 0, dialect);
}

/* Print a POWER (RS/6000) instruction.  */

int
print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
{
  return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
}

/* Print a PowerPC or POWER instruction.  */

static int
print_insn_powerpc (bfd_vma memaddr,
		    struct disassemble_info *info,
		    int bigendian,
		    int dialect)
{
  bfd_byte buffer[4];
  int status;
  unsigned long insn;
  const struct powerpc_opcode *opcode;
  const struct powerpc_opcode *opcode_end;
  unsigned long op;

  if (dialect == 0)
    dialect = powerpc_dialect (info);

  status = (*info->read_memory_func) (memaddr, buffer, 4, info);
  if (status != 0)
    {
      (*info->memory_error_func) (status, memaddr, info);
      return -1;
    }

  if (bigendian)
    insn = bfd_getb32 (buffer);
  else
    insn = bfd_getl32 (buffer);

  /* Get the major opcode of the instruction.  */
  op = PPC_OP (insn);

  /* Find the first match in the opcode table.  We could speed this up
     a bit by doing a binary search on the major opcode.  */
  opcode_end = powerpc_opcodes + powerpc_num_opcodes;
 again:
  for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
    {
      unsigned long table_op;
      const unsigned char *opindex;
      const struct powerpc_operand *operand;
      int invalid;
      int need_comma;
      int need_paren;

      table_op = PPC_OP (opcode->opcode);
      if (op < table_op)
	break;
      if (op > table_op)
	continue;

      if ((insn & opcode->mask) != opcode->opcode
	  || (opcode->flags & dialect) == 0)
	continue;

      /* Make two passes over the operands.  First see if any of them
	 have extraction functions, and, if they do, make sure the
	 instruction is valid.  */
      invalid = 0;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
	{
	  operand = powerpc_operands + *opindex;
	  if (operand->extract)
	    (*operand->extract) (insn, dialect, &invalid);
	}
      if (invalid)
	continue;

      /* The instruction is valid.  */
      if (opcode->operands[0] != 0)
	(*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
      else
	(*info->fprintf_func) (info->stream, "%s", opcode->name);

      /* Now extract and print the operands.  */
      need_comma = 0;
      need_paren = 0;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
	{
	  long value;

	  operand = powerpc_operands + *opindex;

	  /* Operands that are marked FAKE are simply ignored.  We
	     already made sure that the extract function considered
	     the instruction to be valid.  */
	  if ((operand->flags & PPC_OPERAND_FAKE) != 0)
	    continue;

	  /* Extract the value from the instruction.  */
	  if (operand->extract)
	    value = (*operand->extract) (insn, dialect, &invalid);
	  else
	    {
	      value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
	      if ((operand->flags & PPC_OPERAND_SIGNED) != 0
		  && (value & (1 << (operand->bits - 1))) != 0)
		value -= 1 << operand->bits;
	    }

	  /* If the operand is optional, and the value is zero, don't
	     print anything.  */
	  if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
	      && (operand->flags & PPC_OPERAND_NEXT) == 0
	      && value == 0)
	    continue;

	  if (need_comma)
	    {
	      (*info->fprintf_func) (info->stream, ",");
	      need_comma = 0;
	    }

	  /* Print the operand as directed by the flags.  */
	  if ((operand->flags & PPC_OPERAND_GPR) != 0
	      || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
	    (*info->fprintf_func) (info->stream, "r%ld", value);
	  else if ((operand->flags & PPC_OPERAND_FPR) != 0)
	    (*info->fprintf_func) (info->stream, "f%ld", value);
	  else if ((operand->flags & PPC_OPERAND_VR) != 0)
	    (*info->fprintf_func) (info->stream, "v%ld", value);
	  else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
	    (*info->print_address_func) (memaddr + value, info);
	  else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
	    (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
	  else if ((operand->flags & PPC_OPERAND_CR) == 0
		   || (dialect & PPC_OPCODE_PPC) == 0)
	    (*info->fprintf_func) (info->stream, "%ld", value);
	  else
	    {
	      if (operand->bits == 3)
		(*info->fprintf_func) (info->stream, "cr%ld", value);
	      else
		{
		  static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
		  int cr;
		  int cc;

		  cr = value >> 2;
		  if (cr != 0)
		    (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
		  cc = value & 3;
		  (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
		}
	    }

	  if (need_paren)
	    {
	      (*info->fprintf_func) (info->stream, ")");
	      need_paren = 0;
	    }

	  if ((operand->flags & PPC_OPERAND_PARENS) == 0)
	    need_comma = 1;
	  else
	    {
	      (*info->fprintf_func) (info->stream, "(");
	      need_paren = 1;
	    }
	}

      /* We have found and printed an instruction; return.  */
      return 4;
    }

  if ((dialect & PPC_OPCODE_ANY) != 0)
    {
      dialect = ~PPC_OPCODE_ANY;
      goto again;
    }

  /* We could not find a match.  */
  (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);

  return 4;
}

void
print_ppc_disassembler_options (FILE *stream)
{
  fprintf (stream, "\n\
The following PPC specific disassembler options are supported for use with\n\
the -M switch:\n");

  fprintf (stream, "  booke|booke32|booke64    Disassemble the BookE instructions\n");
  fprintf (stream, "  e300                     Disassemble the e300 instructions\n");
  fprintf (stream, "  e500|e500x2              Disassemble the e500 instructions\n");
  fprintf (stream, "  efs                      Disassemble the EFS instructions\n");
  fprintf (stream, "  power4                   Disassemble the Power4 instructions\n");
  fprintf (stream, "  power5                   Disassemble the Power5 instructions\n");
  fprintf (stream, "  32                       Do not disassemble 64-bit instructions\n");
  fprintf (stream, "  64                       Allow disassembly of 64-bit instructions\n");
}
Commit	Line	Data
252b5132	1	/* ppc-dis.c -- Disassemble PowerPC instructions
4eb30afc	2	Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005
8427c424	3	Free Software Foundation, Inc.
252b5132 RH	4	Written by Ian Lance Taylor, Cygnus Support
	5
	6	This file is part of GDB, GAS, and the GNU binutils.
	7
	8	GDB, GAS, and the GNU binutils are free software; you can redistribute
	9	them and/or modify them under the terms of the GNU General Public
	10	License as published by the Free Software Foundation; either version
	11	2, or (at your option) any later version.
	12
	13	GDB, GAS, and the GNU binutils are distributed in the hope that they
	14	will be useful, but WITHOUT ANY WARRANTY; without even the implied
	15	warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
	16	the GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
	19	along with this file; see the file COPYING. If not, write to the Free
f4321104	20	Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132 RH	21
252b5132 RH	22	#include <stdio.h>
252b5132 RH	23	#include "sysdep.h"
	24	#include "dis-asm.h"
	25	#include "opcode/ppc.h"
	26
	27	/* This file provides several disassembler functions, all of which use
	28	the disassembler interface defined in dis-asm.h. Several functions
	29	are provided because this file handles disassembly for the PowerPC
	30	in both big and little endian mode and also for the POWER (RS/6000)
	31	chip. */
	32
823bbe9d	33	static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int, int);
418c1742	34
661bd698 AM	35	struct dis_private {
	36	/* Stash the result of parsing disassembler_options here. */
	37	int dialect;
	38	};
	39
418c1742	40	/* Determine which set of machines to disassemble for. PPC403/601 or
9a0ccb24 MG	41	BookE. For convenience, also disassemble instructions supported
9a0ccb24 MG	42	by the AltiVec vector unit. */
418c1742	43
661bd698	44	static int
823bbe9d	45	powerpc_dialect (struct disassemble_info *info)
418c1742	46	{
4eb30afc	47	int dialect = PPC_OPCODE_PPC;
418c1742	48
802a735e AM	49	if (BFD_DEFAULT_TARGET_SIZE == 64)
	50	dialect \|= PPC_OPCODE_64;
	51
	52	if (info->disassembler_options
661bd698	53	&& strstr (info->disassembler_options, "booke") != NULL)
418c1742	54	dialect \|= PPC_OPCODE_BOOKE \| PPC_OPCODE_BOOKE64;
661bd698 AM	55	else if ((info->mach == bfd_mach_ppc_e500)
	56	\|\| (info->disassembler_options
	57	&& strstr (info->disassembler_options, "e500") != NULL))
4eb30afc AM	58	dialect \|= (PPC_OPCODE_BOOKE
	59	\| PPC_OPCODE_SPE \| PPC_OPCODE_ISEL
	60	\| PPC_OPCODE_EFS \| PPC_OPCODE_BRLOCK
	61	\| PPC_OPCODE_PMR \| PPC_OPCODE_CACHELCK
	62	\| PPC_OPCODE_RFMCI);
661bd698 AM	63	else if (info->disassembler_options
661bd698 AM	64	&& strstr (info->disassembler_options, "efs") != NULL)
4eb30afc	65	dialect \|= PPC_OPCODE_EFS;
36ae0db3 DJ	66	else if (info->disassembler_options
	67	&& strstr (info->disassembler_options, "e300") != NULL)
	68	dialect \|= PPC_OPCODE_E300 \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_COMMON;
23976049	69	else
9ec878e3	70	dialect \|= (PPC_OPCODE_403 \| PPC_OPCODE_601 \| PPC_OPCODE_CLASSIC
4eb30afc	71	\| PPC_OPCODE_COMMON \| PPC_OPCODE_ALTIVEC);
802a735e	72
94efba12	73	if (info->disassembler_options
661bd698	74	&& strstr (info->disassembler_options, "power4") != NULL)
94efba12 AM	75	dialect \|= PPC_OPCODE_POWER4;
94efba12 AM	76
1ed8e1e4 AM	77	if (info->disassembler_options
	78	&& strstr (info->disassembler_options, "power5") != NULL)
	79	dialect \|= PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5;
	80
661bd698 AM	81	if (info->disassembler_options
	82	&& strstr (info->disassembler_options, "any") != NULL)
	83	dialect \|= PPC_OPCODE_ANY;
	84
802a735e AM	85	if (info->disassembler_options)
	86	{
	87	if (strstr (info->disassembler_options, "32") != NULL)
	88	dialect &= ~PPC_OPCODE_64;
	89	else if (strstr (info->disassembler_options, "64") != NULL)
	90	dialect \|= PPC_OPCODE_64;
	91	}
	92
661bd698	93	((struct dis_private *) &info->private_data)->dialect = dialect;
418c1742 MG	94	return dialect;
	95	}
	96
	97	/* Print a big endian PowerPC instruction. */
252b5132 RH	98
252b5132 RH	99	int
823bbe9d	100	print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
252b5132	101	{
661bd698 AM	102	int dialect = ((struct dis_private *) &info->private_data)->dialect;
661bd698 AM	103	return print_insn_powerpc (memaddr, info, 1, dialect);
252b5132 RH	104	}
252b5132 RH	105
418c1742	106	/* Print a little endian PowerPC instruction. */
252b5132 RH	107
252b5132 RH	108	int
823bbe9d	109	print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
252b5132	110	{
661bd698 AM	111	int dialect = ((struct dis_private *) &info->private_data)->dialect;
661bd698 AM	112	return print_insn_powerpc (memaddr, info, 0, dialect);
252b5132 RH	113	}
	114
	115	/* Print a POWER (RS/6000) instruction. */
	116
	117	int
823bbe9d	118	print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
252b5132 RH	119	{
	120	return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
	121	}
	122
	123	/* Print a PowerPC or POWER instruction. */
	124
	125	static int
823bbe9d AM	126	print_insn_powerpc (bfd_vma memaddr,
	127	struct disassemble_info *info,
	128	int bigendian,
	129	int dialect)
252b5132 RH	130	{
	131	bfd_byte buffer[4];
	132	int status;
	133	unsigned long insn;
	134	const struct powerpc_opcode *opcode;
	135	const struct powerpc_opcode *opcode_end;
	136	unsigned long op;
	137
661bd698 AM	138	if (dialect == 0)
	139	dialect = powerpc_dialect (info);
	140
252b5132 RH	141	status = (*info->read_memory_func) (memaddr, buffer, 4, info);
	142	if (status != 0)
	143	{
	144	(*info->memory_error_func) (status, memaddr, info);
	145	return -1;
	146	}
	147
	148	if (bigendian)
	149	insn = bfd_getb32 (buffer);
	150	else
	151	insn = bfd_getl32 (buffer);
	152
	153	/* Get the major opcode of the instruction. */
	154	op = PPC_OP (insn);
	155
	156	/* Find the first match in the opcode table. We could speed this up
	157	a bit by doing a binary search on the major opcode. */
	158	opcode_end = powerpc_opcodes + powerpc_num_opcodes;
661bd698	159	again:
252b5132 RH	160	for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
	161	{
	162	unsigned long table_op;
	163	const unsigned char *opindex;
	164	const struct powerpc_operand *operand;
	165	int invalid;
	166	int need_comma;
	167	int need_paren;
	168
	169	table_op = PPC_OP (opcode->opcode);
	170	if (op < table_op)
	171	break;
	172	if (op > table_op)
	173	continue;
	174
	175	if ((insn & opcode->mask) != opcode->opcode
	176	\|\| (opcode->flags & dialect) == 0)
	177	continue;
	178
	179	/* Make two passes over the operands. First see if any of them
	180	have extraction functions, and, if they do, make sure the
	181	instruction is valid. */
	182	invalid = 0;
	183	for (opindex = opcode->operands; *opindex != 0; opindex++)
	184	{
	185	operand = powerpc_operands + *opindex;
	186	if (operand->extract)
802a735e	187	(*operand->extract) (insn, dialect, &invalid);
252b5132 RH	188	}
	189	if (invalid)
	190	continue;
	191
	192	/* The instruction is valid. */
252b5132	193	if (opcode->operands[0] != 0)
fdd12ef3 AM	194	(*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
	195	else
	196	(*info->fprintf_func) (info->stream, "%s", opcode->name);
252b5132 RH	197
	198	/* Now extract and print the operands. */
	199	need_comma = 0;
	200	need_paren = 0;
	201	for (opindex = opcode->operands; *opindex != 0; opindex++)
	202	{
	203	long value;
	204
	205	operand = powerpc_operands + *opindex;
	206
	207	/* Operands that are marked FAKE are simply ignored. We
	208	already made sure that the extract function considered
	209	the instruction to be valid. */
	210	if ((operand->flags & PPC_OPERAND_FAKE) != 0)
	211	continue;
	212
	213	/* Extract the value from the instruction. */
	214	if (operand->extract)
8427c424	215	value = (*operand->extract) (insn, dialect, &invalid);
252b5132 RH	216	else
	217	{
	218	value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
	219	if ((operand->flags & PPC_OPERAND_SIGNED) != 0
	220	&& (value & (1 << (operand->bits - 1))) != 0)
	221	value -= 1 << operand->bits;
	222	}
	223
	224	/* If the operand is optional, and the value is zero, don't
	225	print anything. */
	226	if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
	227	&& (operand->flags & PPC_OPERAND_NEXT) == 0
	228	&& value == 0)
	229	continue;
	230
	231	if (need_comma)
	232	{
	233	(*info->fprintf_func) (info->stream, ",");
	234	need_comma = 0;
	235	}
	236
	237	/* Print the operand as directed by the flags. */
fdd12ef3 AM	238	if ((operand->flags & PPC_OPERAND_GPR) != 0
fdd12ef3 AM	239	\|\| ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
252b5132 RH	240	(*info->fprintf_func) (info->stream, "r%ld", value);
	241	else if ((operand->flags & PPC_OPERAND_FPR) != 0)
	242	(*info->fprintf_func) (info->stream, "f%ld", value);
786e2c0f C	243	else if ((operand->flags & PPC_OPERAND_VR) != 0)
786e2c0f C	244	(*info->fprintf_func) (info->stream, "v%ld", value);
252b5132 RH	245	else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
	246	(*info->print_address_func) (memaddr + value, info);
	247	else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
	248	(*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
	249	else if ((operand->flags & PPC_OPERAND_CR) == 0
	250	\|\| (dialect & PPC_OPCODE_PPC) == 0)
	251	(*info->fprintf_func) (info->stream, "%ld", value);
	252	else
	253	{
	254	if (operand->bits == 3)
0fd3a477	255	(*info->fprintf_func) (info->stream, "cr%ld", value);
252b5132 RH	256	else
	257	{
	258	static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
	259	int cr;
	260	int cc;
	261
	262	cr = value >> 2;
	263	if (cr != 0)
8b4fa155	264	(info->fprintf_func) (info->stream, "4cr%d+", cr);
252b5132	265	cc = value & 3;
8b4fa155	266	(*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
252b5132 RH	267	}
	268	}
	269
	270	if (need_paren)
	271	{
	272	(*info->fprintf_func) (info->stream, ")");
	273	need_paren = 0;
	274	}
	275
	276	if ((operand->flags & PPC_OPERAND_PARENS) == 0)
	277	need_comma = 1;
	278	else
	279	{
	280	(*info->fprintf_func) (info->stream, "(");
	281	need_paren = 1;
	282	}
	283	}
	284
	285	/* We have found and printed an instruction; return. */
	286	return 4;
	287	}
	288
661bd698 AM	289	if ((dialect & PPC_OPCODE_ANY) != 0)
	290	{
	291	dialect = ~PPC_OPCODE_ANY;
	292	goto again;
	293	}
	294
252b5132 RH	295	/* We could not find a match. */
	296	(*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
	297
	298	return 4;
	299	}
07dd56a9 NC	300
07dd56a9 NC	301	void
823bbe9d	302	print_ppc_disassembler_options (FILE *stream)
07dd56a9 NC	303	{
	304	fprintf (stream, "\n\
	305	The following PPC specific disassembler options are supported for use with\n\
	306	the -M switch:\n");
8b4fa155	307
07dd56a9	308	fprintf (stream, " booke\|booke32\|booke64 Disassemble the BookE instructions\n");
36ae0db3	309	fprintf (stream, " e300 Disassemble the e300 instructions\n");
07dd56a9 NC	310	fprintf (stream, " e500\|e500x2 Disassemble the e500 instructions\n");
	311	fprintf (stream, " efs Disassemble the EFS instructions\n");
	312	fprintf (stream, " power4 Disassemble the Power4 instructions\n");
1ed8e1e4	313	fprintf (stream, " power5 Disassemble the Power5 instructions\n");
07dd56a9 NC	314	fprintf (stream, " 32 Do not disassemble 64-bit instructions\n");
	315	fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n");
	316	}