[deliverable/binutils-gdb.git] / opcodes / ppc-dis.c

/* ppc-dis.c -- Disassemble PowerPC instructions
   Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006
   Free Software Foundation, Inc.
   Written by Ian Lance Taylor, Cygnus Support

This file is part of GDB, GAS, and the GNU binutils.

GDB, GAS, and the GNU binutils are free software; you can redistribute
them and/or modify them under the terms of the GNU General Public
License as published by the Free Software Foundation; either version
2, or (at your option) any later version.

GDB, GAS, and the GNU binutils are distributed in the hope that they
will be useful, but WITHOUT ANY WARRANTY; without even the implied
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
the GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this file; see the file COPYING.  If not, write to the Free
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */

#include <stdio.h>
#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/ppc.h"

/* This file provides several disassembler functions, all of which use
   the disassembler interface defined in dis-asm.h.  Several functions
   are provided because this file handles disassembly for the PowerPC
   in both big and little endian mode and also for the POWER (RS/6000)
   chip.  */

static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int, int);

/* Determine which set of machines to disassemble for.  PPC403/601 or
   BookE.  For convenience, also disassemble instructions supported
   by the AltiVec vector unit.  */

static int
powerpc_dialect (struct disassemble_info *info)
{
  int dialect = PPC_OPCODE_PPC;

  if (BFD_DEFAULT_TARGET_SIZE == 64)
    dialect |= PPC_OPCODE_64;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "booke") != NULL)
    dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
  else if ((info->mach == bfd_mach_ppc_e500)
	   || (info->disassembler_options
	       && strstr (info->disassembler_options, "e500") != NULL))
    dialect |= (PPC_OPCODE_BOOKE
		| PPC_OPCODE_SPE | PPC_OPCODE_ISEL
		| PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
		| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
		| PPC_OPCODE_RFMCI);
  else if (info->disassembler_options
	   && strstr (info->disassembler_options, "efs") != NULL)
    dialect |= PPC_OPCODE_EFS;
  else if (info->disassembler_options
	   && strstr (info->disassembler_options, "e300") != NULL)
    dialect |= PPC_OPCODE_E300 | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON;
  else
    dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
		| PPC_OPCODE_COMMON | PPC_OPCODE_ALTIVEC);

  if (info->disassembler_options
      && strstr (info->disassembler_options, "power4") != NULL)
    dialect |= PPC_OPCODE_POWER4;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "power5") != NULL)
    dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "power6") != NULL)
    dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "any") != NULL)
    dialect |= PPC_OPCODE_ANY;

  if (info->disassembler_options)
    {
      if (strstr (info->disassembler_options, "32") != NULL)
	dialect &= ~PPC_OPCODE_64;
      else if (strstr (info->disassembler_options, "64") != NULL)
	dialect |= PPC_OPCODE_64;
    }

  info->private_data = (char *) 0 + dialect;
  return dialect;
}

/* Print a big endian PowerPC instruction.  */

int
print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
{
  int dialect = (char *) info->private_data - (char *) 0;
  return print_insn_powerpc (memaddr, info, 1, dialect);
}

/* Print a little endian PowerPC instruction.  */

int
print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
{
  int dialect = (char *) info->private_data - (char *) 0;
  return print_insn_powerpc (memaddr, info, 0, dialect);
}

/* Print a POWER (RS/6000) instruction.  */

int
print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
{
  return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
}

/* Print a PowerPC or POWER instruction.  */

static int
print_insn_powerpc (bfd_vma memaddr,
		    struct disassemble_info *info,
		    int bigendian,
		    int dialect)
{
  bfd_byte buffer[4];
  int status;
  unsigned long insn;
  const struct powerpc_opcode *opcode;
  const struct powerpc_opcode *opcode_end;
  unsigned long op;

  if (dialect == 0)
    dialect = powerpc_dialect (info);

  status = (*info->read_memory_func) (memaddr, buffer, 4, info);
  if (status != 0)
    {
      (*info->memory_error_func) (status, memaddr, info);
      return -1;
    }

  if (bigendian)
    insn = bfd_getb32 (buffer);
  else
    insn = bfd_getl32 (buffer);

  /* Get the major opcode of the instruction.  */
  op = PPC_OP (insn);

  /* Find the first match in the opcode table.  We could speed this up
     a bit by doing a binary search on the major opcode.  */
  opcode_end = powerpc_opcodes + powerpc_num_opcodes;
 again:
  for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
    {
      unsigned long table_op;
      const unsigned char *opindex;
      const struct powerpc_operand *operand;
      int invalid;
      int need_comma;
      int need_paren;

      table_op = PPC_OP (opcode->opcode);
      if (op < table_op)
	break;
      if (op > table_op)
	continue;

      if ((insn & opcode->mask) != opcode->opcode
	  || (opcode->flags & dialect) == 0)
	continue;

      /* Make two passes over the operands.  First see if any of them
	 have extraction functions, and, if they do, make sure the
	 instruction is valid.  */
      invalid = 0;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
	{
	  operand = powerpc_operands + *opindex;
	  if (operand->extract)
	    (*operand->extract) (insn, dialect, &invalid);
	}
      if (invalid)
	continue;

      /* The instruction is valid.  */
      if (opcode->operands[0] != 0)
	(*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
      else
	(*info->fprintf_func) (info->stream, "%s", opcode->name);

      /* Now extract and print the operands.  */
      need_comma = 0;
      need_paren = 0;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
	{
	  long value;

	  operand = powerpc_operands + *opindex;

	  /* Operands that are marked FAKE are simply ignored.  We
	     already made sure that the extract function considered
	     the instruction to be valid.  */
	  if ((operand->flags & PPC_OPERAND_FAKE) != 0)
	    continue;

	  /* Extract the value from the instruction.  */
	  if (operand->extract)
	    value = (*operand->extract) (insn, dialect, &invalid);
	  else
	    {
	      value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
	      if ((operand->flags & PPC_OPERAND_SIGNED) != 0
		  && (value & (1 << (operand->bits - 1))) != 0)
		value -= 1 << operand->bits;
	    }

	  /* If the operand is optional, and the value is zero, don't
	     print anything.  */
	  if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
	      && (operand->flags & PPC_OPERAND_NEXT) == 0
	      && value == 0)
	    continue;

	  if (need_comma)
	    {
	      (*info->fprintf_func) (info->stream, ",");
	      need_comma = 0;
	    }

	  /* Print the operand as directed by the flags.  */
	  if ((operand->flags & PPC_OPERAND_GPR) != 0
	      || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
	    (*info->fprintf_func) (info->stream, "r%ld", value);
	  else if ((operand->flags & PPC_OPERAND_FPR) != 0)
	    (*info->fprintf_func) (info->stream, "f%ld", value);
	  else if ((operand->flags & PPC_OPERAND_VR) != 0)
	    (*info->fprintf_func) (info->stream, "v%ld", value);
	  else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
	    (*info->print_address_func) (memaddr + value, info);
	  else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
	    (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
	  else if ((operand->flags & PPC_OPERAND_CR) == 0
		   || (dialect & PPC_OPCODE_PPC) == 0)
	    (*info->fprintf_func) (info->stream, "%ld", value);
	  else
	    {
	      if (operand->bits == 3)
		(*info->fprintf_func) (info->stream, "cr%ld", value);
	      else
		{
		  static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
		  int cr;
		  int cc;

		  cr = value >> 2;
		  if (cr != 0)
		    (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
		  cc = value & 3;
		  (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
		}
	    }

	  if (need_paren)
	    {
	      (*info->fprintf_func) (info->stream, ")");
	      need_paren = 0;
	    }

	  if ((operand->flags & PPC_OPERAND_PARENS) == 0)
	    need_comma = 1;
	  else
	    {
	      (*info->fprintf_func) (info->stream, "(");
	      need_paren = 1;
	    }
	}

      /* We have found and printed an instruction; return.  */
      return 4;
    }

  if ((dialect & PPC_OPCODE_ANY) != 0)
    {
      dialect = ~PPC_OPCODE_ANY;
      goto again;
    }

  /* We could not find a match.  */
  (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);

  return 4;
}

void
print_ppc_disassembler_options (FILE *stream)
{
  fprintf (stream, "\n\
The following PPC specific disassembler options are supported for use with\n\
the -M switch:\n");

  fprintf (stream, "  booke|booke32|booke64    Disassemble the BookE instructions\n");
  fprintf (stream, "  e300                     Disassemble the e300 instructions\n");
  fprintf (stream, "  e500|e500x2              Disassemble the e500 instructions\n");
  fprintf (stream, "  efs                      Disassemble the EFS instructions\n");
  fprintf (stream, "  power4                   Disassemble the Power4 instructions\n");
  fprintf (stream, "  power5                   Disassemble the Power5 instructions\n");
  fprintf (stream, "  power6                   Disassemble the Power6 instructions\n");
  fprintf (stream, "  32                       Do not disassemble 64-bit instructions\n");
  fprintf (stream, "  64                       Allow disassembly of 64-bit instructions\n");
}
Commit	Line	Data
252b5132	1	/* ppc-dis.c -- Disassemble PowerPC instructions
9622b051	2	Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006
8427c424	3	Free Software Foundation, Inc.
252b5132 RH	4	Written by Ian Lance Taylor, Cygnus Support
	5
	6	This file is part of GDB, GAS, and the GNU binutils.
	7
	8	GDB, GAS, and the GNU binutils are free software; you can redistribute
	9	them and/or modify them under the terms of the GNU General Public
	10	License as published by the Free Software Foundation; either version
	11	2, or (at your option) any later version.
	12
	13	GDB, GAS, and the GNU binutils are distributed in the hope that they
	14	will be useful, but WITHOUT ANY WARRANTY; without even the implied
	15	warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
	16	the GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
	19	along with this file; see the file COPYING. If not, write to the Free
f4321104	20	Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132 RH	21
252b5132 RH	22	#include <stdio.h>
252b5132 RH	23	#include "sysdep.h"
	24	#include "dis-asm.h"
	25	#include "opcode/ppc.h"
	26
	27	/* This file provides several disassembler functions, all of which use
	28	the disassembler interface defined in dis-asm.h. Several functions
	29	are provided because this file handles disassembly for the PowerPC
	30	in both big and little endian mode and also for the POWER (RS/6000)
	31	chip. */
	32
823bbe9d	33	static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int, int);
418c1742 MG	34
418c1742 MG	35	/* Determine which set of machines to disassemble for. PPC403/601 or
9a0ccb24 MG	36	BookE. For convenience, also disassemble instructions supported
9a0ccb24 MG	37	by the AltiVec vector unit. */
418c1742	38
661bd698	39	static int
823bbe9d	40	powerpc_dialect (struct disassemble_info *info)
418c1742	41	{
4eb30afc	42	int dialect = PPC_OPCODE_PPC;
418c1742	43
802a735e AM	44	if (BFD_DEFAULT_TARGET_SIZE == 64)
	45	dialect \|= PPC_OPCODE_64;
	46
	47	if (info->disassembler_options
661bd698	48	&& strstr (info->disassembler_options, "booke") != NULL)
418c1742	49	dialect \|= PPC_OPCODE_BOOKE \| PPC_OPCODE_BOOKE64;
661bd698 AM	50	else if ((info->mach == bfd_mach_ppc_e500)
	51	\|\| (info->disassembler_options
	52	&& strstr (info->disassembler_options, "e500") != NULL))
4eb30afc AM	53	dialect \|= (PPC_OPCODE_BOOKE
	54	\| PPC_OPCODE_SPE \| PPC_OPCODE_ISEL
	55	\| PPC_OPCODE_EFS \| PPC_OPCODE_BRLOCK
	56	\| PPC_OPCODE_PMR \| PPC_OPCODE_CACHELCK
	57	\| PPC_OPCODE_RFMCI);
661bd698 AM	58	else if (info->disassembler_options
661bd698 AM	59	&& strstr (info->disassembler_options, "efs") != NULL)
4eb30afc	60	dialect \|= PPC_OPCODE_EFS;
36ae0db3 DJ	61	else if (info->disassembler_options
	62	&& strstr (info->disassembler_options, "e300") != NULL)
	63	dialect \|= PPC_OPCODE_E300 \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_COMMON;
23976049	64	else
9ec878e3	65	dialect \|= (PPC_OPCODE_403 \| PPC_OPCODE_601 \| PPC_OPCODE_CLASSIC
4eb30afc	66	\| PPC_OPCODE_COMMON \| PPC_OPCODE_ALTIVEC);
802a735e	67
94efba12	68	if (info->disassembler_options
661bd698	69	&& strstr (info->disassembler_options, "power4") != NULL)
94efba12 AM	70	dialect \|= PPC_OPCODE_POWER4;
94efba12 AM	71
1ed8e1e4 AM	72	if (info->disassembler_options
	73	&& strstr (info->disassembler_options, "power5") != NULL)
	74	dialect \|= PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5;
	75
9622b051 AM	76	if (info->disassembler_options
	77	&& strstr (info->disassembler_options, "power6") != NULL)
	78	dialect \|= PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5 \| PPC_OPCODE_POWER6 \| PPC_OPCODE_ALTIVEC;
	79
661bd698 AM	80	if (info->disassembler_options
	81	&& strstr (info->disassembler_options, "any") != NULL)
	82	dialect \|= PPC_OPCODE_ANY;
	83
802a735e AM	84	if (info->disassembler_options)
	85	{
	86	if (strstr (info->disassembler_options, "32") != NULL)
	87	dialect &= ~PPC_OPCODE_64;
	88	else if (strstr (info->disassembler_options, "64") != NULL)
	89	dialect \|= PPC_OPCODE_64;
	90	}
	91
6edfbbad	92	info->private_data = (char *) 0 + dialect;
418c1742 MG	93	return dialect;
	94	}
	95
	96	/* Print a big endian PowerPC instruction. */
252b5132 RH	97
252b5132 RH	98	int
823bbe9d	99	print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
252b5132	100	{
6edfbbad	101	int dialect = (char ) info->private_data - (char ) 0;
661bd698	102	return print_insn_powerpc (memaddr, info, 1, dialect);
252b5132 RH	103	}
252b5132 RH	104
418c1742	105	/* Print a little endian PowerPC instruction. */
252b5132 RH	106
252b5132 RH	107	int
823bbe9d	108	print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
252b5132	109	{
6edfbbad	110	int dialect = (char ) info->private_data - (char ) 0;
661bd698	111	return print_insn_powerpc (memaddr, info, 0, dialect);
252b5132 RH	112	}
	113
	114	/* Print a POWER (RS/6000) instruction. */
	115
	116	int
823bbe9d	117	print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
252b5132 RH	118	{
	119	return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
	120	}
	121
	122	/* Print a PowerPC or POWER instruction. */
	123
	124	static int
823bbe9d AM	125	print_insn_powerpc (bfd_vma memaddr,
	126	struct disassemble_info *info,
	127	int bigendian,
	128	int dialect)
252b5132 RH	129	{
	130	bfd_byte buffer[4];
	131	int status;
	132	unsigned long insn;
	133	const struct powerpc_opcode *opcode;
	134	const struct powerpc_opcode *opcode_end;
	135	unsigned long op;
	136
661bd698 AM	137	if (dialect == 0)
	138	dialect = powerpc_dialect (info);
	139
252b5132 RH	140	status = (*info->read_memory_func) (memaddr, buffer, 4, info);
	141	if (status != 0)
	142	{
	143	(*info->memory_error_func) (status, memaddr, info);
	144	return -1;
	145	}
	146
	147	if (bigendian)
	148	insn = bfd_getb32 (buffer);
	149	else
	150	insn = bfd_getl32 (buffer);
	151
	152	/* Get the major opcode of the instruction. */
	153	op = PPC_OP (insn);
	154
	155	/* Find the first match in the opcode table. We could speed this up
	156	a bit by doing a binary search on the major opcode. */
	157	opcode_end = powerpc_opcodes + powerpc_num_opcodes;
661bd698	158	again:
252b5132 RH	159	for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
	160	{
	161	unsigned long table_op;
	162	const unsigned char *opindex;
	163	const struct powerpc_operand *operand;
	164	int invalid;
	165	int need_comma;
	166	int need_paren;
	167
	168	table_op = PPC_OP (opcode->opcode);
	169	if (op < table_op)
	170	break;
	171	if (op > table_op)
	172	continue;
	173
	174	if ((insn & opcode->mask) != opcode->opcode
	175	\|\| (opcode->flags & dialect) == 0)
	176	continue;
	177
	178	/* Make two passes over the operands. First see if any of them
	179	have extraction functions, and, if they do, make sure the
	180	instruction is valid. */
	181	invalid = 0;
	182	for (opindex = opcode->operands; *opindex != 0; opindex++)
	183	{
	184	operand = powerpc_operands + *opindex;
	185	if (operand->extract)
802a735e	186	(*operand->extract) (insn, dialect, &invalid);
252b5132 RH	187	}
	188	if (invalid)
	189	continue;
	190
	191	/* The instruction is valid. */
252b5132	192	if (opcode->operands[0] != 0)
fdd12ef3 AM	193	(*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
	194	else
	195	(*info->fprintf_func) (info->stream, "%s", opcode->name);
252b5132 RH	196
	197	/* Now extract and print the operands. */
	198	need_comma = 0;
	199	need_paren = 0;
	200	for (opindex = opcode->operands; *opindex != 0; opindex++)
	201	{
	202	long value;
	203
	204	operand = powerpc_operands + *opindex;
	205
	206	/* Operands that are marked FAKE are simply ignored. We
	207	already made sure that the extract function considered
	208	the instruction to be valid. */
	209	if ((operand->flags & PPC_OPERAND_FAKE) != 0)
	210	continue;
	211
	212	/* Extract the value from the instruction. */
	213	if (operand->extract)
8427c424	214	value = (*operand->extract) (insn, dialect, &invalid);
252b5132 RH	215	else
	216	{
	217	value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
	218	if ((operand->flags & PPC_OPERAND_SIGNED) != 0
	219	&& (value & (1 << (operand->bits - 1))) != 0)
	220	value -= 1 << operand->bits;
	221	}
	222
	223	/* If the operand is optional, and the value is zero, don't
	224	print anything. */
	225	if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
	226	&& (operand->flags & PPC_OPERAND_NEXT) == 0
	227	&& value == 0)
	228	continue;
	229
	230	if (need_comma)
	231	{
	232	(*info->fprintf_func) (info->stream, ",");
	233	need_comma = 0;
	234	}
	235
	236	/* Print the operand as directed by the flags. */
fdd12ef3 AM	237	if ((operand->flags & PPC_OPERAND_GPR) != 0
fdd12ef3 AM	238	\|\| ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
252b5132 RH	239	(*info->fprintf_func) (info->stream, "r%ld", value);
	240	else if ((operand->flags & PPC_OPERAND_FPR) != 0)
	241	(*info->fprintf_func) (info->stream, "f%ld", value);
786e2c0f C	242	else if ((operand->flags & PPC_OPERAND_VR) != 0)
786e2c0f C	243	(*info->fprintf_func) (info->stream, "v%ld", value);
252b5132 RH	244	else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
	245	(*info->print_address_func) (memaddr + value, info);
	246	else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
	247	(*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
	248	else if ((operand->flags & PPC_OPERAND_CR) == 0
	249	\|\| (dialect & PPC_OPCODE_PPC) == 0)
	250	(*info->fprintf_func) (info->stream, "%ld", value);
	251	else
	252	{
	253	if (operand->bits == 3)
0fd3a477	254	(*info->fprintf_func) (info->stream, "cr%ld", value);
252b5132 RH	255	else
	256	{
	257	static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
	258	int cr;
	259	int cc;
	260
	261	cr = value >> 2;
	262	if (cr != 0)
8b4fa155	263	(info->fprintf_func) (info->stream, "4cr%d+", cr);
252b5132	264	cc = value & 3;
8b4fa155	265	(*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
252b5132 RH	266	}
	267	}
	268
	269	if (need_paren)
	270	{
	271	(*info->fprintf_func) (info->stream, ")");
	272	need_paren = 0;
	273	}
	274
	275	if ((operand->flags & PPC_OPERAND_PARENS) == 0)
	276	need_comma = 1;
	277	else
	278	{
	279	(*info->fprintf_func) (info->stream, "(");
	280	need_paren = 1;
	281	}
	282	}
	283
	284	/* We have found and printed an instruction; return. */
	285	return 4;
	286	}
	287
661bd698 AM	288	if ((dialect & PPC_OPCODE_ANY) != 0)
	289	{
	290	dialect = ~PPC_OPCODE_ANY;
	291	goto again;
	292	}
	293
252b5132 RH	294	/* We could not find a match. */
	295	(*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
	296
	297	return 4;
	298	}
07dd56a9 NC	299
07dd56a9 NC	300	void
823bbe9d	301	print_ppc_disassembler_options (FILE *stream)
07dd56a9 NC	302	{
	303	fprintf (stream, "\n\
	304	The following PPC specific disassembler options are supported for use with\n\
	305	the -M switch:\n");
8b4fa155	306
07dd56a9	307	fprintf (stream, " booke\|booke32\|booke64 Disassemble the BookE instructions\n");
36ae0db3	308	fprintf (stream, " e300 Disassemble the e300 instructions\n");
07dd56a9 NC	309	fprintf (stream, " e500\|e500x2 Disassemble the e500 instructions\n");
	310	fprintf (stream, " efs Disassemble the EFS instructions\n");
	311	fprintf (stream, " power4 Disassemble the Power4 instructions\n");
1ed8e1e4	312	fprintf (stream, " power5 Disassemble the Power5 instructions\n");
9622b051	313	fprintf (stream, " power6 Disassemble the Power6 instructions\n");
07dd56a9 NC	314	fprintf (stream, " 32 Do not disassemble 64-bit instructions\n");
	315	fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n");
	316	}