2001-11-04 Chris Demetriou <cgd@broadcom.com>
[deliverable/binutils-gdb.git] / opcodes / ppc-dis.c
CommitLineData
252b5132 1/* ppc-dis.c -- Disassemble PowerPC instructions
060d22b0 2 Copyright 1994, 1995, 2000 Free Software Foundation, Inc.
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3 Written by Ian Lance Taylor, Cygnus Support
4
5This file is part of GDB, GAS, and the GNU binutils.
6
7GDB, GAS, and the GNU binutils are free software; you can redistribute
8them and/or modify them under the terms of the GNU General Public
9License as published by the Free Software Foundation; either version
102, or (at your option) any later version.
11
12GDB, GAS, and the GNU binutils are distributed in the hope that they
13will be useful, but WITHOUT ANY WARRANTY; without even the implied
14warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
15the GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this file; see the file COPYING. If not, write to the Free
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#include <stdio.h>
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22#include "sysdep.h"
23#include "dis-asm.h"
24#include "opcode/ppc.h"
25
26/* This file provides several disassembler functions, all of which use
27 the disassembler interface defined in dis-asm.h. Several functions
28 are provided because this file handles disassembly for the PowerPC
29 in both big and little endian mode and also for the POWER (RS/6000)
30 chip. */
31
32static int print_insn_powerpc PARAMS ((bfd_vma, struct disassemble_info *,
33 int bigendian, int dialect));
34
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35static int powerpc_dialect PARAMS ((struct disassemble_info *));
36
37/* Determine which set of machines to disassemble for. PPC403/601 or
38 Motorola BookE. For convenience, also disassemble instructions
39 supported by the AltiVec vector unit. */
40
41int
42powerpc_dialect(info)
43 struct disassemble_info *info;
44{
45 int dialect = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC;
46
47 if (info->disassembler_options &&
48 (strcmp(info->disassembler_options, "booke") == 0 ||
49 strcmp(info->disassembler_options, "booke32") == 0 ||
50 strcmp(info->disassembler_options, "booke64") == 0))
51 dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
52 else
53 dialect |= PPC_OPCODE_403 | PPC_OPCODE_601;
54 return dialect;
55}
56
57/* Print a big endian PowerPC instruction. */
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58
59int
60print_insn_big_powerpc (memaddr, info)
61 bfd_vma memaddr;
62 struct disassemble_info *info;
63{
418c1742 64 return print_insn_powerpc (memaddr, info, 1, powerpc_dialect(info));
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65}
66
418c1742 67/* Print a little endian PowerPC instruction. */
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68
69int
70print_insn_little_powerpc (memaddr, info)
71 bfd_vma memaddr;
72 struct disassemble_info *info;
73{
418c1742 74 return print_insn_powerpc (memaddr, info, 0, powerpc_dialect(info));
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75}
76
77/* Print a POWER (RS/6000) instruction. */
78
79int
80print_insn_rs6000 (memaddr, info)
81 bfd_vma memaddr;
82 struct disassemble_info *info;
83{
84 return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
85}
86
87/* Print a PowerPC or POWER instruction. */
88
89static int
90print_insn_powerpc (memaddr, info, bigendian, dialect)
91 bfd_vma memaddr;
92 struct disassemble_info *info;
93 int bigendian;
94 int dialect;
95{
96 bfd_byte buffer[4];
97 int status;
98 unsigned long insn;
99 const struct powerpc_opcode *opcode;
100 const struct powerpc_opcode *opcode_end;
101 unsigned long op;
102
103 status = (*info->read_memory_func) (memaddr, buffer, 4, info);
104 if (status != 0)
105 {
106 (*info->memory_error_func) (status, memaddr, info);
107 return -1;
108 }
109
110 if (bigendian)
111 insn = bfd_getb32 (buffer);
112 else
113 insn = bfd_getl32 (buffer);
114
115 /* Get the major opcode of the instruction. */
116 op = PPC_OP (insn);
117
118 /* Find the first match in the opcode table. We could speed this up
119 a bit by doing a binary search on the major opcode. */
120 opcode_end = powerpc_opcodes + powerpc_num_opcodes;
121 for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
122 {
123 unsigned long table_op;
124 const unsigned char *opindex;
125 const struct powerpc_operand *operand;
126 int invalid;
127 int need_comma;
128 int need_paren;
129
130 table_op = PPC_OP (opcode->opcode);
131 if (op < table_op)
132 break;
133 if (op > table_op)
134 continue;
135
136 if ((insn & opcode->mask) != opcode->opcode
137 || (opcode->flags & dialect) == 0)
138 continue;
139
140 /* Make two passes over the operands. First see if any of them
141 have extraction functions, and, if they do, make sure the
142 instruction is valid. */
143 invalid = 0;
144 for (opindex = opcode->operands; *opindex != 0; opindex++)
145 {
146 operand = powerpc_operands + *opindex;
147 if (operand->extract)
148 (*operand->extract) (insn, &invalid);
149 }
150 if (invalid)
151 continue;
152
153 /* The instruction is valid. */
154 (*info->fprintf_func) (info->stream, "%s", opcode->name);
155 if (opcode->operands[0] != 0)
156 (*info->fprintf_func) (info->stream, "\t");
157
158 /* Now extract and print the operands. */
159 need_comma = 0;
160 need_paren = 0;
161 for (opindex = opcode->operands; *opindex != 0; opindex++)
162 {
163 long value;
164
165 operand = powerpc_operands + *opindex;
166
167 /* Operands that are marked FAKE are simply ignored. We
168 already made sure that the extract function considered
169 the instruction to be valid. */
170 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
171 continue;
172
173 /* Extract the value from the instruction. */
174 if (operand->extract)
175 value = (*operand->extract) (insn, (int *) NULL);
176 else
177 {
178 value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
179 if ((operand->flags & PPC_OPERAND_SIGNED) != 0
180 && (value & (1 << (operand->bits - 1))) != 0)
181 value -= 1 << operand->bits;
182 }
183
184 /* If the operand is optional, and the value is zero, don't
185 print anything. */
186 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
187 && (operand->flags & PPC_OPERAND_NEXT) == 0
188 && value == 0)
189 continue;
190
191 if (need_comma)
192 {
193 (*info->fprintf_func) (info->stream, ",");
194 need_comma = 0;
195 }
196
197 /* Print the operand as directed by the flags. */
198 if ((operand->flags & PPC_OPERAND_GPR) != 0)
199 (*info->fprintf_func) (info->stream, "r%ld", value);
200 else if ((operand->flags & PPC_OPERAND_FPR) != 0)
201 (*info->fprintf_func) (info->stream, "f%ld", value);
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202 else if ((operand->flags & PPC_OPERAND_VR) != 0)
203 (*info->fprintf_func) (info->stream, "v%ld", value);
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204 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
205 (*info->print_address_func) (memaddr + value, info);
206 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
207 (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
208 else if ((operand->flags & PPC_OPERAND_CR) == 0
209 || (dialect & PPC_OPCODE_PPC) == 0)
210 (*info->fprintf_func) (info->stream, "%ld", value);
211 else
212 {
213 if (operand->bits == 3)
214 (*info->fprintf_func) (info->stream, "cr%d", value);
215 else
216 {
217 static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
218 int cr;
219 int cc;
220
221 cr = value >> 2;
222 if (cr != 0)
223 (*info->fprintf_func) (info->stream, "4*cr%d", cr);
224 cc = value & 3;
225 if (cc != 0)
226 {
227 if (cr != 0)
228 (*info->fprintf_func) (info->stream, "+");
229 (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
230 }
231 }
232 }
233
234 if (need_paren)
235 {
236 (*info->fprintf_func) (info->stream, ")");
237 need_paren = 0;
238 }
239
240 if ((operand->flags & PPC_OPERAND_PARENS) == 0)
241 need_comma = 1;
242 else
243 {
244 (*info->fprintf_func) (info->stream, "(");
245 need_paren = 1;
246 }
247 }
248
249 /* We have found and printed an instruction; return. */
250 return 4;
251 }
252
253 /* We could not find a match. */
254 (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
255
256 return 4;
257}
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