[deliverable/binutils-gdb.git] / opcodes / ppc-dis.c

/* ppc-dis.c -- Disassemble PowerPC instructions
   Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
   Free Software Foundation, Inc.
   Written by Ian Lance Taylor, Cygnus Support

   This file is part of the GNU opcodes library.

   This library is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

   It is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with this file; see the file COPYING.  If not, write to the
   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
   MA 02110-1301, USA.  */

#include <stdio.h>
#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/ppc.h"

/* This file provides several disassembler functions, all of which use
   the disassembler interface defined in dis-asm.h.  Several functions
   are provided because this file handles disassembly for the PowerPC
   in both big and little endian mode and also for the POWER (RS/6000)
   chip.  */
static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
			       ppc_cpu_t);

struct dis_private
{
  /* Stash the result of parsing disassembler_options here.  */
  ppc_cpu_t dialect;
};

#define POWERPC_DIALECT(INFO) \
  (((struct dis_private *) ((INFO)->private_data))->dialect)

/* Determine which set of machines to disassemble for.  PPC403/601 or
   BookE.  For convenience, also disassemble instructions supported
   by the AltiVec vector unit.  */

static int
powerpc_init_dialect (struct disassemble_info *info)
{
  ppc_cpu_t dialect = PPC_OPCODE_PPC;
  struct dis_private *priv = calloc (sizeof (*priv), 1);

  if (priv == NULL)
    return FALSE;

  if (BFD_DEFAULT_TARGET_SIZE == 64)
    dialect |= PPC_OPCODE_64;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "ppcps") != NULL)
    dialect |= PPC_OPCODE_PPCPS;
  else if (info->disassembler_options
      && strstr (info->disassembler_options, "booke") != NULL)
    dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
  else if ((info->mach == bfd_mach_ppc_e500mc)
	   || (info->disassembler_options
	       && strstr (info->disassembler_options, "e500mc") != NULL))
    dialect |= (PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
		| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
		| PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
  else if ((info->mach == bfd_mach_ppc_e500)
	   || (info->disassembler_options
	       && strstr (info->disassembler_options, "e500") != NULL))
    dialect |= (PPC_OPCODE_BOOKE
		| PPC_OPCODE_SPE | PPC_OPCODE_ISEL
		| PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
		| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
		| PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
  else if (info->disassembler_options
	   && strstr (info->disassembler_options, "efs") != NULL)
    dialect |= PPC_OPCODE_EFS;
  else if (info->disassembler_options
	   && strstr (info->disassembler_options, "e300") != NULL)
    dialect |= PPC_OPCODE_E300 | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON;
  else if (info->disassembler_options
	   && (strstr (info->disassembler_options, "440") != NULL
	       || strstr (info->disassembler_options, "464") != NULL))
    dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_32
      | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI;
  else
    dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
		| PPC_OPCODE_COMMON | PPC_OPCODE_ALTIVEC);

  if (info->disassembler_options
      && strstr (info->disassembler_options, "power4") != NULL)
    dialect |= PPC_OPCODE_POWER4;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "power5") != NULL)
    dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "cell") != NULL)
    dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "power6") != NULL)
    dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "any") != NULL)
    dialect |= PPC_OPCODE_ANY;

  if (info->disassembler_options)
    {
      if (strstr (info->disassembler_options, "32") != NULL)
	dialect &= ~PPC_OPCODE_64;
      else if (strstr (info->disassembler_options, "64") != NULL)
	dialect |= PPC_OPCODE_64;
    }

  info->private_data = priv;
  POWERPC_DIALECT(info) = dialect;

  return TRUE;
}

/* Print a big endian PowerPC instruction.  */

int
print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
{
  if (info->private_data == NULL && !powerpc_init_dialect (info))
    return -1;
  return print_insn_powerpc (memaddr, info, 1, POWERPC_DIALECT(info));
}

/* Print a little endian PowerPC instruction.  */

int
print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
{
  if (info->private_data == NULL && !powerpc_init_dialect (info))
    return -1;
  return print_insn_powerpc (memaddr, info, 0, POWERPC_DIALECT(info));
}

/* Print a POWER (RS/6000) instruction.  */

int
print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
{
  return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
}

/* Extract the operand value from the PowerPC or POWER instruction.  */

static long
operand_value_powerpc (const struct powerpc_operand *operand,
		       unsigned long insn, ppc_cpu_t dialect)
{
  long value;
  int invalid;
  /* Extract the value from the instruction.  */
  if (operand->extract)
    value = (*operand->extract) (insn, dialect, &invalid);
  else
    {
      value = (insn >> operand->shift) & operand->bitm;
      if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
	{
	  /* BITM is always some number of zeros followed by some
	     number of ones, followed by some numer of zeros.  */
	  unsigned long top = operand->bitm;
	  /* top & -top gives the rightmost 1 bit, so this
	     fills in any trailing zeros.  */
	  top |= (top & -top) - 1;
	  top &= ~(top >> 1);
	  value = (value ^ top) - top;
	}
    }

  return value;
}

/* Determine whether the optional operand(s) should be printed.  */

static int
skip_optional_operands (const unsigned char *opindex,
			unsigned long insn, ppc_cpu_t dialect)
{
  const struct powerpc_operand *operand;

  for (; *opindex != 0; opindex++)
    {
      operand = &powerpc_operands[*opindex];
      if ((operand->flags & PPC_OPERAND_NEXT) != 0
	  || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
	      && operand_value_powerpc (operand, insn, dialect) != 0))
	return 0;
    }

  return 1;
}

/* Print a PowerPC or POWER instruction.  */

static int
print_insn_powerpc (bfd_vma memaddr,
		    struct disassemble_info *info,
		    int bigendian,
		    ppc_cpu_t dialect)
{
  bfd_byte buffer[4];
  int status;
  unsigned long insn;
  const struct powerpc_opcode *opcode;
  const struct powerpc_opcode *opcode_end;
  unsigned long op;

  status = (*info->read_memory_func) (memaddr, buffer, 4, info);
  if (status != 0)
    {
      (*info->memory_error_func) (status, memaddr, info);
      return -1;
    }

  if (bigendian)
    insn = bfd_getb32 (buffer);
  else
    insn = bfd_getl32 (buffer);

  /* Get the major opcode of the instruction.  */
  op = PPC_OP (insn);

  /* Find the first match in the opcode table.  We could speed this up
     a bit by doing a binary search on the major opcode.  */
  opcode_end = powerpc_opcodes + powerpc_num_opcodes;
 again:
  for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
    {
      unsigned long table_op;
      const unsigned char *opindex;
      const struct powerpc_operand *operand;
      int invalid;
      int need_comma;
      int need_paren;
      int skip_optional;

      table_op = PPC_OP (opcode->opcode);
      if (op < table_op)
	break;
      if (op > table_op)
	continue;

      if ((insn & opcode->mask) != opcode->opcode
	  || (opcode->flags & dialect) == 0)
	continue;

      /* Make two passes over the operands.  First see if any of them
	 have extraction functions, and, if they do, make sure the
	 instruction is valid.  */
      invalid = 0;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
	{
	  operand = powerpc_operands + *opindex;
	  if (operand->extract)
	    (*operand->extract) (insn, dialect, &invalid);
	}
      if (invalid)
	continue;

      /* The instruction is valid.  */
      if (opcode->operands[0] != 0)
	(*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
      else
	(*info->fprintf_func) (info->stream, "%s", opcode->name);

      /* Now extract and print the operands.  */
      need_comma = 0;
      need_paren = 0;
      skip_optional = -1;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
	{
	  long value;

	  operand = powerpc_operands + *opindex;

	  /* Operands that are marked FAKE are simply ignored.  We
	     already made sure that the extract function considered
	     the instruction to be valid.  */
	  if ((operand->flags & PPC_OPERAND_FAKE) != 0)
	    continue;

	  /* If all of the optional operands have the value zero,
	     then don't print any of them.  */
	  if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
	    {
	      if (skip_optional < 0)
		skip_optional = skip_optional_operands (opindex, insn,
							dialect);
	      if (skip_optional)
		continue;
	    }

	  value = operand_value_powerpc (operand, insn, dialect);

	  if (need_comma)
	    {
	      (*info->fprintf_func) (info->stream, ",");
	      need_comma = 0;
	    }

	  /* Print the operand as directed by the flags.  */
	  if ((operand->flags & PPC_OPERAND_GPR) != 0
	      || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
	    (*info->fprintf_func) (info->stream, "r%ld", value);
	  else if ((operand->flags & PPC_OPERAND_FPR) != 0)
	    (*info->fprintf_func) (info->stream, "f%ld", value);
	  else if ((operand->flags & PPC_OPERAND_VR) != 0)
	    (*info->fprintf_func) (info->stream, "v%ld", value);
	  else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
	    (*info->print_address_func) (memaddr + value, info);
	  else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
	    (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
	  else if ((operand->flags & PPC_OPERAND_CR) == 0
		   || (dialect & PPC_OPCODE_PPC) == 0)
	    (*info->fprintf_func) (info->stream, "%ld", value);
	  else
	    {
	      if (operand->bitm == 7)
		(*info->fprintf_func) (info->stream, "cr%ld", value);
	      else
		{
		  static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
		  int cr;
		  int cc;

		  cr = value >> 2;
		  if (cr != 0)
		    (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
		  cc = value & 3;
		  (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
		}
	    }

	  if (need_paren)
	    {
	      (*info->fprintf_func) (info->stream, ")");
	      need_paren = 0;
	    }

	  if ((operand->flags & PPC_OPERAND_PARENS) == 0)
	    need_comma = 1;
	  else
	    {
	      (*info->fprintf_func) (info->stream, "(");
	      need_paren = 1;
	    }
	}

      /* We have found and printed an instruction; return.  */
      return 4;
    }

  if ((dialect & PPC_OPCODE_ANY) != 0)
    {
      dialect = ~PPC_OPCODE_ANY;
      goto again;
    }

  /* We could not find a match.  */
  (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);

  return 4;
}

void
print_ppc_disassembler_options (FILE *stream)
{
  fprintf (stream, "\n\
The following PPC specific disassembler options are supported for use with\n\
the -M switch:\n");

  fprintf (stream, "  booke|booke32|booke64    Disassemble the BookE instructions\n");
  fprintf (stream, "  e300                     Disassemble the e300 instructions\n");
  fprintf (stream, "  e500|e500x2              Disassemble the e500 instructions\n");
  fprintf (stream, "  e500mc                   Disassemble the e500mc instructions\n");
  fprintf (stream, "  440                      Disassemble the 440 instructions\n");
  fprintf (stream, "  464                      Disassemble the 464 instructions\n");
  fprintf (stream, "  efs                      Disassemble the EFS instructions\n");
  fprintf (stream, "  ppcps                    Disassemble the PowerPC paired singles instructions\n");
  fprintf (stream, "  power4                   Disassemble the Power4 instructions\n");
  fprintf (stream, "  power5                   Disassemble the Power5 instructions\n");
  fprintf (stream, "  power6                   Disassemble the Power6 instructions\n");
  fprintf (stream, "  32                       Do not disassemble 64-bit instructions\n");
  fprintf (stream, "  64                       Allow disassembly of 64-bit instructions\n");
}
Commit	Line	Data
252b5132	1	/* ppc-dis.c -- Disassemble PowerPC instructions
64a3a6fc	2	Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
8427c424	3	Free Software Foundation, Inc.
252b5132 RH	4	Written by Ian Lance Taylor, Cygnus Support
252b5132 RH	5
9b201bb5 NC	6	This file is part of the GNU opcodes library.
	7
	8	This library is free software; you can redistribute it and/or modify
	9	it under the terms of the GNU General Public License as published by
	10	the Free Software Foundation; either version 3, or (at your option)
	11	any later version.
	12
	13	It is distributed in the hope that it will be useful, but WITHOUT
	14	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	15	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	16	License for more details.
	17
	18	You should have received a copy of the GNU General Public License
	19	along with this file; see the file COPYING. If not, write to the
	20	Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
	21	MA 02110-1301, USA. */
252b5132 RH	22
252b5132 RH	23	#include <stdio.h>
252b5132 RH	24	#include "sysdep.h"
	25	#include "dis-asm.h"
	26	#include "opcode/ppc.h"
	27
	28	/* This file provides several disassembler functions, all of which use
	29	the disassembler interface defined in dis-asm.h. Several functions
	30	are provided because this file handles disassembly for the PowerPC
	31	in both big and little endian mode and also for the POWER (RS/6000)
	32	chip. */
fa452fa6 PB	33	static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
fa452fa6 PB	34	ppc_cpu_t);
252b5132	35
fa452fa6 PB	36	struct dis_private
	37	{
	38	/* Stash the result of parsing disassembler_options here. */
	39	ppc_cpu_t dialect;
	40	};
	41
	42	#define POWERPC_DIALECT(INFO) \
	43	(((struct dis_private *) ((INFO)->private_data))->dialect)
418c1742 MG	44
418c1742 MG	45	/* Determine which set of machines to disassemble for. PPC403/601 or
9a0ccb24 MG	46	BookE. For convenience, also disassemble instructions supported
9a0ccb24 MG	47	by the AltiVec vector unit. */
418c1742	48
661bd698	49	static int
fa452fa6	50	powerpc_init_dialect (struct disassemble_info *info)
418c1742	51	{
fa452fa6 PB	52	ppc_cpu_t dialect = PPC_OPCODE_PPC;
	53	struct dis_private priv = calloc (sizeof (priv), 1);
	54
	55	if (priv == NULL)
	56	return FALSE;
418c1742	57
802a735e AM	58	if (BFD_DEFAULT_TARGET_SIZE == 64)
	59	dialect \|= PPC_OPCODE_64;
	60
	61	if (info->disassembler_options
c3d65c1c BE	62	&& strstr (info->disassembler_options, "ppcps") != NULL)
	63	dialect \|= PPC_OPCODE_PPCPS;
	64	else if (info->disassembler_options
661bd698	65	&& strstr (info->disassembler_options, "booke") != NULL)
418c1742	66	dialect \|= PPC_OPCODE_BOOKE \| PPC_OPCODE_BOOKE64;
19a6653c AM	67	else if ((info->mach == bfd_mach_ppc_e500mc)
	68	\|\| (info->disassembler_options
	69	&& strstr (info->disassembler_options, "e500mc") != NULL))
	70	dialect \|= (PPC_OPCODE_BOOKE \| PPC_OPCODE_ISEL
	71	\| PPC_OPCODE_PMR \| PPC_OPCODE_CACHELCK
	72	\| PPC_OPCODE_RFMCI \| PPC_OPCODE_E500MC);
661bd698 AM	73	else if ((info->mach == bfd_mach_ppc_e500)
	74	\|\| (info->disassembler_options
	75	&& strstr (info->disassembler_options, "e500") != NULL))
4eb30afc AM	76	dialect \|= (PPC_OPCODE_BOOKE
	77	\| PPC_OPCODE_SPE \| PPC_OPCODE_ISEL
	78	\| PPC_OPCODE_EFS \| PPC_OPCODE_BRLOCK
	79	\| PPC_OPCODE_PMR \| PPC_OPCODE_CACHELCK
19a6653c	80	\| PPC_OPCODE_RFMCI \| PPC_OPCODE_E500MC);
661bd698 AM	81	else if (info->disassembler_options
661bd698 AM	82	&& strstr (info->disassembler_options, "efs") != NULL)
4eb30afc	83	dialect \|= PPC_OPCODE_EFS;
36ae0db3 DJ	84	else if (info->disassembler_options
	85	&& strstr (info->disassembler_options, "e300") != NULL)
	86	dialect \|= PPC_OPCODE_E300 \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_COMMON;
64a3a6fc	87	else if (info->disassembler_options
c8187e15 PB	88	&& (strstr (info->disassembler_options, "440") != NULL
c8187e15 PB	89	\|\| strstr (info->disassembler_options, "464") != NULL))
64a3a6fc NC	90	dialect \|= PPC_OPCODE_BOOKE \| PPC_OPCODE_32
64a3a6fc NC	91	\| PPC_OPCODE_440 \| PPC_OPCODE_ISEL \| PPC_OPCODE_RFMCI;
23976049	92	else
9ec878e3	93	dialect \|= (PPC_OPCODE_403 \| PPC_OPCODE_601 \| PPC_OPCODE_CLASSIC
4eb30afc	94	\| PPC_OPCODE_COMMON \| PPC_OPCODE_ALTIVEC);
802a735e	95
94efba12	96	if (info->disassembler_options
661bd698	97	&& strstr (info->disassembler_options, "power4") != NULL)
94efba12 AM	98	dialect \|= PPC_OPCODE_POWER4;
94efba12 AM	99
1ed8e1e4 AM	100	if (info->disassembler_options
	101	&& strstr (info->disassembler_options, "power5") != NULL)
	102	dialect \|= PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5;
	103
ede602d7 AM	104	if (info->disassembler_options
	105	&& strstr (info->disassembler_options, "cell") != NULL)
	106	dialect \|= PPC_OPCODE_POWER4 \| PPC_OPCODE_CELL \| PPC_OPCODE_ALTIVEC;
	107
9622b051 AM	108	if (info->disassembler_options
	109	&& strstr (info->disassembler_options, "power6") != NULL)
	110	dialect \|= PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5 \| PPC_OPCODE_POWER6 \| PPC_OPCODE_ALTIVEC;
	111
661bd698 AM	112	if (info->disassembler_options
	113	&& strstr (info->disassembler_options, "any") != NULL)
	114	dialect \|= PPC_OPCODE_ANY;
	115
802a735e AM	116	if (info->disassembler_options)
	117	{
	118	if (strstr (info->disassembler_options, "32") != NULL)
	119	dialect &= ~PPC_OPCODE_64;
	120	else if (strstr (info->disassembler_options, "64") != NULL)
	121	dialect \|= PPC_OPCODE_64;
	122	}
	123
fa452fa6 PB	124	info->private_data = priv;
	125	POWERPC_DIALECT(info) = dialect;
	126
	127	return TRUE;
418c1742 MG	128	}
	129
	130	/* Print a big endian PowerPC instruction. */
252b5132 RH	131
252b5132 RH	132	int
823bbe9d	133	print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
252b5132	134	{
fa452fa6 PB	135	if (info->private_data == NULL && !powerpc_init_dialect (info))
	136	return -1;
	137	return print_insn_powerpc (memaddr, info, 1, POWERPC_DIALECT(info));
252b5132 RH	138	}
252b5132 RH	139
418c1742	140	/* Print a little endian PowerPC instruction. */
252b5132 RH	141
252b5132 RH	142	int
823bbe9d	143	print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
252b5132	144	{
fa452fa6 PB	145	if (info->private_data == NULL && !powerpc_init_dialect (info))
	146	return -1;
	147	return print_insn_powerpc (memaddr, info, 0, POWERPC_DIALECT(info));
252b5132 RH	148	}
	149
	150	/* Print a POWER (RS/6000) instruction. */
	151
	152	int
823bbe9d	153	print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
252b5132 RH	154	{
	155	return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
	156	}
	157
ea192fa3 PB	158	/* Extract the operand value from the PowerPC or POWER instruction. */
	159
	160	static long
	161	operand_value_powerpc (const struct powerpc_operand *operand,
fa452fa6	162	unsigned long insn, ppc_cpu_t dialect)
ea192fa3 PB	163	{
	164	long value;
	165	int invalid;
	166	/* Extract the value from the instruction. */
	167	if (operand->extract)
	168	value = (*operand->extract) (insn, dialect, &invalid);
	169	else
	170	{
	171	value = (insn >> operand->shift) & operand->bitm;
	172	if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
	173	{
	174	/* BITM is always some number of zeros followed by some
	175	number of ones, followed by some numer of zeros. */
	176	unsigned long top = operand->bitm;
	177	/* top & -top gives the rightmost 1 bit, so this
	178	fills in any trailing zeros. */
	179	top \|= (top & -top) - 1;
	180	top &= ~(top >> 1);
	181	value = (value ^ top) - top;
	182	}
	183	}
	184
	185	return value;
	186	}
	187
	188	/* Determine whether the optional operand(s) should be printed. */
	189
	190	static int
	191	skip_optional_operands (const unsigned char *opindex,
fa452fa6	192	unsigned long insn, ppc_cpu_t dialect)
ea192fa3 PB	193	{
	194	const struct powerpc_operand *operand;
	195
	196	for (; *opindex != 0; opindex++)
	197	{
	198	operand = &powerpc_operands[*opindex];
	199	if ((operand->flags & PPC_OPERAND_NEXT) != 0
	200	\|\| ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
	201	&& operand_value_powerpc (operand, insn, dialect) != 0))
	202	return 0;
	203	}
	204
	205	return 1;
	206	}
	207
252b5132 RH	208	/* Print a PowerPC or POWER instruction. */
	209
	210	static int
823bbe9d AM	211	print_insn_powerpc (bfd_vma memaddr,
	212	struct disassemble_info *info,
	213	int bigendian,
fa452fa6	214	ppc_cpu_t dialect)
252b5132 RH	215	{
	216	bfd_byte buffer[4];
	217	int status;
	218	unsigned long insn;
	219	const struct powerpc_opcode *opcode;
	220	const struct powerpc_opcode *opcode_end;
	221	unsigned long op;
	222
	223	status = (*info->read_memory_func) (memaddr, buffer, 4, info);
	224	if (status != 0)
	225	{
	226	(*info->memory_error_func) (status, memaddr, info);
	227	return -1;
	228	}
	229
	230	if (bigendian)
	231	insn = bfd_getb32 (buffer);
	232	else
	233	insn = bfd_getl32 (buffer);
	234
	235	/* Get the major opcode of the instruction. */
	236	op = PPC_OP (insn);
	237
	238	/* Find the first match in the opcode table. We could speed this up
	239	a bit by doing a binary search on the major opcode. */
	240	opcode_end = powerpc_opcodes + powerpc_num_opcodes;
661bd698	241	again:
252b5132 RH	242	for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
	243	{
	244	unsigned long table_op;
	245	const unsigned char *opindex;
	246	const struct powerpc_operand *operand;
	247	int invalid;
	248	int need_comma;
	249	int need_paren;
ea192fa3	250	int skip_optional;
252b5132 RH	251
	252	table_op = PPC_OP (opcode->opcode);
	253	if (op < table_op)
	254	break;
	255	if (op > table_op)
	256	continue;
	257
	258	if ((insn & opcode->mask) != opcode->opcode
	259	\|\| (opcode->flags & dialect) == 0)
	260	continue;
	261
	262	/* Make two passes over the operands. First see if any of them
	263	have extraction functions, and, if they do, make sure the
	264	instruction is valid. */
	265	invalid = 0;
	266	for (opindex = opcode->operands; *opindex != 0; opindex++)
	267	{
	268	operand = powerpc_operands + *opindex;
	269	if (operand->extract)
802a735e	270	(*operand->extract) (insn, dialect, &invalid);
252b5132 RH	271	}
	272	if (invalid)
	273	continue;
	274
	275	/* The instruction is valid. */
252b5132	276	if (opcode->operands[0] != 0)
fdd12ef3 AM	277	(*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
	278	else
	279	(*info->fprintf_func) (info->stream, "%s", opcode->name);
252b5132 RH	280
	281	/* Now extract and print the operands. */
	282	need_comma = 0;
	283	need_paren = 0;
ea192fa3	284	skip_optional = -1;
252b5132 RH	285	for (opindex = opcode->operands; *opindex != 0; opindex++)
	286	{
	287	long value;
	288
	289	operand = powerpc_operands + *opindex;
	290
	291	/* Operands that are marked FAKE are simply ignored. We
	292	already made sure that the extract function considered
	293	the instruction to be valid. */
	294	if ((operand->flags & PPC_OPERAND_FAKE) != 0)
	295	continue;
	296
ea192fa3 PB	297	/* If all of the optional operands have the value zero,
ea192fa3 PB	298	then don't print any of them. */
65b650b4 AM	299	if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
	300	{
	301	if (skip_optional < 0)
	302	skip_optional = skip_optional_operands (opindex, insn,
	303	dialect);
	304	if (skip_optional)
	305	continue;
	306	}
252b5132	307
ea192fa3 PB	308	value = operand_value_powerpc (operand, insn, dialect);
ea192fa3 PB	309
252b5132 RH	310	if (need_comma)
	311	{
	312	(*info->fprintf_func) (info->stream, ",");
	313	need_comma = 0;
	314	}
	315
	316	/* Print the operand as directed by the flags. */
fdd12ef3 AM	317	if ((operand->flags & PPC_OPERAND_GPR) != 0
fdd12ef3 AM	318	\|\| ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
252b5132 RH	319	(*info->fprintf_func) (info->stream, "r%ld", value);
	320	else if ((operand->flags & PPC_OPERAND_FPR) != 0)
	321	(*info->fprintf_func) (info->stream, "f%ld", value);
786e2c0f C	322	else if ((operand->flags & PPC_OPERAND_VR) != 0)
786e2c0f C	323	(*info->fprintf_func) (info->stream, "v%ld", value);
252b5132 RH	324	else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
	325	(*info->print_address_func) (memaddr + value, info);
	326	else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
	327	(*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
	328	else if ((operand->flags & PPC_OPERAND_CR) == 0
	329	\|\| (dialect & PPC_OPCODE_PPC) == 0)
	330	(*info->fprintf_func) (info->stream, "%ld", value);
	331	else
	332	{
b84bf58a	333	if (operand->bitm == 7)
0fd3a477	334	(*info->fprintf_func) (info->stream, "cr%ld", value);
252b5132 RH	335	else
	336	{
	337	static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
	338	int cr;
	339	int cc;
	340
	341	cr = value >> 2;
	342	if (cr != 0)
8b4fa155	343	(info->fprintf_func) (info->stream, "4cr%d+", cr);
252b5132	344	cc = value & 3;
8b4fa155	345	(*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
252b5132 RH	346	}
	347	}
	348
	349	if (need_paren)
	350	{
	351	(*info->fprintf_func) (info->stream, ")");
	352	need_paren = 0;
	353	}
	354
	355	if ((operand->flags & PPC_OPERAND_PARENS) == 0)
	356	need_comma = 1;
	357	else
	358	{
	359	(*info->fprintf_func) (info->stream, "(");
	360	need_paren = 1;
	361	}
	362	}
	363
	364	/* We have found and printed an instruction; return. */
	365	return 4;
	366	}
	367
661bd698 AM	368	if ((dialect & PPC_OPCODE_ANY) != 0)
	369	{
	370	dialect = ~PPC_OPCODE_ANY;
	371	goto again;
	372	}
	373
252b5132 RH	374	/* We could not find a match. */
	375	(*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
	376
	377	return 4;
	378	}
07dd56a9 NC	379
07dd56a9 NC	380	void
823bbe9d	381	print_ppc_disassembler_options (FILE *stream)
07dd56a9 NC	382	{
	383	fprintf (stream, "\n\
	384	The following PPC specific disassembler options are supported for use with\n\
	385	the -M switch:\n");
8b4fa155	386
07dd56a9	387	fprintf (stream, " booke\|booke32\|booke64 Disassemble the BookE instructions\n");
36ae0db3	388	fprintf (stream, " e300 Disassemble the e300 instructions\n");
07dd56a9	389	fprintf (stream, " e500\|e500x2 Disassemble the e500 instructions\n");
19a6653c	390	fprintf (stream, " e500mc Disassemble the e500mc instructions\n");
64a3a6fc	391	fprintf (stream, " 440 Disassemble the 440 instructions\n");
c8187e15	392	fprintf (stream, " 464 Disassemble the 464 instructions\n");
07dd56a9	393	fprintf (stream, " efs Disassemble the EFS instructions\n");
c3d65c1c	394	fprintf (stream, " ppcps Disassemble the PowerPC paired singles instructions\n");
07dd56a9	395	fprintf (stream, " power4 Disassemble the Power4 instructions\n");
1ed8e1e4	396	fprintf (stream, " power5 Disassemble the Power5 instructions\n");
9622b051	397	fprintf (stream, " power6 Disassemble the Power6 instructions\n");
07dd56a9 NC	398	fprintf (stream, " 32 Do not disassemble 64-bit instructions\n");
	399	fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n");
	400	}