[deliverable/binutils-gdb.git] / opcodes / ppc-dis.c

/* ppc-dis.c -- Disassemble PowerPC instructions
   Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
   Free Software Foundation, Inc.
   Written by Ian Lance Taylor, Cygnus Support

This file is part of GDB, GAS, and the GNU binutils.

GDB, GAS, and the GNU binutils are free software; you can redistribute
them and/or modify them under the terms of the GNU General Public
License as published by the Free Software Foundation; either version
2, or (at your option) any later version.

GDB, GAS, and the GNU binutils are distributed in the hope that they
will be useful, but WITHOUT ANY WARRANTY; without even the implied
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
the GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this file; see the file COPYING.  If not, write to the Free
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */

#include <stdio.h>
#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/ppc.h"

/* This file provides several disassembler functions, all of which use
   the disassembler interface defined in dis-asm.h.  Several functions
   are provided because this file handles disassembly for the PowerPC
   in both big and little endian mode and also for the POWER (RS/6000)
   chip.  */

static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int, int);

/* Determine which set of machines to disassemble for.  PPC403/601 or
   BookE.  For convenience, also disassemble instructions supported
   by the AltiVec vector unit.  */

static int
powerpc_dialect (struct disassemble_info *info)
{
  int dialect = PPC_OPCODE_PPC;

  if (BFD_DEFAULT_TARGET_SIZE == 64)
    dialect |= PPC_OPCODE_64;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "booke") != NULL)
    dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
  else if ((info->mach == bfd_mach_ppc_e500)
	   || (info->disassembler_options
	       && strstr (info->disassembler_options, "e500") != NULL))
    dialect |= (PPC_OPCODE_BOOKE
		| PPC_OPCODE_SPE | PPC_OPCODE_ISEL
		| PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
		| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
		| PPC_OPCODE_RFMCI);
  else if (info->disassembler_options
	   && strstr (info->disassembler_options, "efs") != NULL)
    dialect |= PPC_OPCODE_EFS;
  else if (info->disassembler_options
	   && strstr (info->disassembler_options, "e300") != NULL)
    dialect |= PPC_OPCODE_E300 | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON;
  else if (info->disassembler_options
	   && strstr (info->disassembler_options, "440") != NULL)
    dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_32
      | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI;
  else
    dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
		| PPC_OPCODE_COMMON | PPC_OPCODE_ALTIVEC);

  if (info->disassembler_options
      && strstr (info->disassembler_options, "power4") != NULL)
    dialect |= PPC_OPCODE_POWER4;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "power5") != NULL)
    dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "cell") != NULL)
    dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "power6") != NULL)
    dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC;

  if (info->disassembler_options
      && strstr (info->disassembler_options, "any") != NULL)
    dialect |= PPC_OPCODE_ANY;

  if (info->disassembler_options)
    {
      if (strstr (info->disassembler_options, "32") != NULL)
	dialect &= ~PPC_OPCODE_64;
      else if (strstr (info->disassembler_options, "64") != NULL)
	dialect |= PPC_OPCODE_64;
    }

  info->private_data = (char *) 0 + dialect;
  return dialect;
}

/* Print a big endian PowerPC instruction.  */

int
print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
{
  int dialect = (char *) info->private_data - (char *) 0;
  return print_insn_powerpc (memaddr, info, 1, dialect);
}

/* Print a little endian PowerPC instruction.  */

int
print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
{
  int dialect = (char *) info->private_data - (char *) 0;
  return print_insn_powerpc (memaddr, info, 0, dialect);
}

/* Print a POWER (RS/6000) instruction.  */

int
print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
{
  return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
}

/* Extract the operand value from the PowerPC or POWER instruction.  */

static long
operand_value_powerpc (const struct powerpc_operand *operand,
		       unsigned long insn, int dialect)
{
  long value;
  int invalid;
  /* Extract the value from the instruction.  */
  if (operand->extract)
    value = (*operand->extract) (insn, dialect, &invalid);
  else
    {
      value = (insn >> operand->shift) & operand->bitm;
      if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
	{
	  /* BITM is always some number of zeros followed by some
	     number of ones, followed by some numer of zeros.  */
	  unsigned long top = operand->bitm;
	  /* top & -top gives the rightmost 1 bit, so this
	     fills in any trailing zeros.  */
	  top |= (top & -top) - 1;
	  top &= ~(top >> 1);
	  value = (value ^ top) - top;
	}
    }

  return value;
}

/* Determine whether the optional operand(s) should be printed.  */

static int
skip_optional_operands (const unsigned char *opindex,
			unsigned long insn, int dialect)
{
  const struct powerpc_operand *operand;

  for (; *opindex != 0; opindex++)
    {
      operand = &powerpc_operands[*opindex];
      if ((operand->flags & PPC_OPERAND_NEXT) != 0
	  || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
	      && operand_value_powerpc (operand, insn, dialect) != 0))
	return 0;
    }

  return 1;
}

/* Print a PowerPC or POWER instruction.  */

static int
print_insn_powerpc (bfd_vma memaddr,
		    struct disassemble_info *info,
		    int bigendian,
		    int dialect)
{
  bfd_byte buffer[4];
  int status;
  unsigned long insn;
  const struct powerpc_opcode *opcode;
  const struct powerpc_opcode *opcode_end;
  unsigned long op;

  if (dialect == 0)
    dialect = powerpc_dialect (info);

  status = (*info->read_memory_func) (memaddr, buffer, 4, info);
  if (status != 0)
    {
      (*info->memory_error_func) (status, memaddr, info);
      return -1;
    }

  if (bigendian)
    insn = bfd_getb32 (buffer);
  else
    insn = bfd_getl32 (buffer);

  /* Get the major opcode of the instruction.  */
  op = PPC_OP (insn);

  /* Find the first match in the opcode table.  We could speed this up
     a bit by doing a binary search on the major opcode.  */
  opcode_end = powerpc_opcodes + powerpc_num_opcodes;
 again:
  for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
    {
      unsigned long table_op;
      const unsigned char *opindex;
      const struct powerpc_operand *operand;
      int invalid;
      int need_comma;
      int need_paren;
      int skip_optional;

      table_op = PPC_OP (opcode->opcode);
      if (op < table_op)
	break;
      if (op > table_op)
	continue;

      if ((insn & opcode->mask) != opcode->opcode
	  || (opcode->flags & dialect) == 0)
	continue;

      /* Make two passes over the operands.  First see if any of them
	 have extraction functions, and, if they do, make sure the
	 instruction is valid.  */
      invalid = 0;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
	{
	  operand = powerpc_operands + *opindex;
	  if (operand->extract)
	    (*operand->extract) (insn, dialect, &invalid);
	}
      if (invalid)
	continue;

      /* The instruction is valid.  */
      if (opcode->operands[0] != 0)
	(*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
      else
	(*info->fprintf_func) (info->stream, "%s", opcode->name);

      /* Now extract and print the operands.  */
      need_comma = 0;
      need_paren = 0;
      skip_optional = -1;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
	{
	  long value;

	  operand = powerpc_operands + *opindex;

	  /* Operands that are marked FAKE are simply ignored.  We
	     already made sure that the extract function considered
	     the instruction to be valid.  */
	  if ((operand->flags & PPC_OPERAND_FAKE) != 0)
	    continue;

	  /* If all of the optional operands have the value zero,
	     then don't print any of them.  */
	  if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
	    {
	      if (skip_optional < 0)
		skip_optional = skip_optional_operands (opindex, insn,
							dialect);
	      if (skip_optional)
		continue;
	    }

	  value = operand_value_powerpc (operand, insn, dialect);

	  if (need_comma)
	    {
	      (*info->fprintf_func) (info->stream, ",");
	      need_comma = 0;
	    }

	  /* Print the operand as directed by the flags.  */
	  if ((operand->flags & PPC_OPERAND_GPR) != 0
	      || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
	    (*info->fprintf_func) (info->stream, "r%ld", value);
	  else if ((operand->flags & PPC_OPERAND_FPR) != 0)
	    (*info->fprintf_func) (info->stream, "f%ld", value);
	  else if ((operand->flags & PPC_OPERAND_VR) != 0)
	    (*info->fprintf_func) (info->stream, "v%ld", value);
	  else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
	    (*info->print_address_func) (memaddr + value, info);
	  else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
	    (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
	  else if ((operand->flags & PPC_OPERAND_CR) == 0
		   || (dialect & PPC_OPCODE_PPC) == 0)
	    (*info->fprintf_func) (info->stream, "%ld", value);
	  else
	    {
	      if (operand->bitm == 7)
		(*info->fprintf_func) (info->stream, "cr%ld", value);
	      else
		{
		  static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
		  int cr;
		  int cc;

		  cr = value >> 2;
		  if (cr != 0)
		    (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
		  cc = value & 3;
		  (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
		}
	    }

	  if (need_paren)
	    {
	      (*info->fprintf_func) (info->stream, ")");
	      need_paren = 0;
	    }

	  if ((operand->flags & PPC_OPERAND_PARENS) == 0)
	    need_comma = 1;
	  else
	    {
	      (*info->fprintf_func) (info->stream, "(");
	      need_paren = 1;
	    }
	}

      /* We have found and printed an instruction; return.  */
      return 4;
    }

  if ((dialect & PPC_OPCODE_ANY) != 0)
    {
      dialect = ~PPC_OPCODE_ANY;
      goto again;
    }

  /* We could not find a match.  */
  (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);

  return 4;
}

void
print_ppc_disassembler_options (FILE *stream)
{
  fprintf (stream, "\n\
The following PPC specific disassembler options are supported for use with\n\
the -M switch:\n");

  fprintf (stream, "  booke|booke32|booke64    Disassemble the BookE instructions\n");
  fprintf (stream, "  e300                     Disassemble the e300 instructions\n");
  fprintf (stream, "  e500|e500x2              Disassemble the e500 instructions\n");
  fprintf (stream, "  440                      Disassemble the 440 instructions\n");
  fprintf (stream, "  efs                      Disassemble the EFS instructions\n");
  fprintf (stream, "  power4                   Disassemble the Power4 instructions\n");
  fprintf (stream, "  power5                   Disassemble the Power5 instructions\n");
  fprintf (stream, "  power6                   Disassemble the Power6 instructions\n");
  fprintf (stream, "  32                       Do not disassemble 64-bit instructions\n");
  fprintf (stream, "  64                       Allow disassembly of 64-bit instructions\n");
}
Commit	Line	Data
252b5132	1	/* ppc-dis.c -- Disassemble PowerPC instructions
64a3a6fc	2	Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
8427c424	3	Free Software Foundation, Inc.
252b5132 RH	4	Written by Ian Lance Taylor, Cygnus Support
	5
	6	This file is part of GDB, GAS, and the GNU binutils.
	7
	8	GDB, GAS, and the GNU binutils are free software; you can redistribute
	9	them and/or modify them under the terms of the GNU General Public
	10	License as published by the Free Software Foundation; either version
	11	2, or (at your option) any later version.
	12
	13	GDB, GAS, and the GNU binutils are distributed in the hope that they
	14	will be useful, but WITHOUT ANY WARRANTY; without even the implied
	15	warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
	16	the GNU General Public License for more details.
	17
	18	You should have received a copy of the GNU General Public License
	19	along with this file; see the file COPYING. If not, write to the Free
f4321104	20	Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132 RH	21
252b5132 RH	22	#include <stdio.h>
252b5132 RH	23	#include "sysdep.h"
	24	#include "dis-asm.h"
	25	#include "opcode/ppc.h"
	26
	27	/* This file provides several disassembler functions, all of which use
	28	the disassembler interface defined in dis-asm.h. Several functions
	29	are provided because this file handles disassembly for the PowerPC
	30	in both big and little endian mode and also for the POWER (RS/6000)
	31	chip. */
	32
823bbe9d	33	static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int, int);
418c1742 MG	34
418c1742 MG	35	/* Determine which set of machines to disassemble for. PPC403/601 or
9a0ccb24 MG	36	BookE. For convenience, also disassemble instructions supported
9a0ccb24 MG	37	by the AltiVec vector unit. */
418c1742	38
661bd698	39	static int
823bbe9d	40	powerpc_dialect (struct disassemble_info *info)
418c1742	41	{
4eb30afc	42	int dialect = PPC_OPCODE_PPC;
418c1742	43
802a735e AM	44	if (BFD_DEFAULT_TARGET_SIZE == 64)
	45	dialect \|= PPC_OPCODE_64;
	46
	47	if (info->disassembler_options
661bd698	48	&& strstr (info->disassembler_options, "booke") != NULL)
418c1742	49	dialect \|= PPC_OPCODE_BOOKE \| PPC_OPCODE_BOOKE64;
661bd698 AM	50	else if ((info->mach == bfd_mach_ppc_e500)
	51	\|\| (info->disassembler_options
	52	&& strstr (info->disassembler_options, "e500") != NULL))
4eb30afc AM	53	dialect \|= (PPC_OPCODE_BOOKE
	54	\| PPC_OPCODE_SPE \| PPC_OPCODE_ISEL
	55	\| PPC_OPCODE_EFS \| PPC_OPCODE_BRLOCK
	56	\| PPC_OPCODE_PMR \| PPC_OPCODE_CACHELCK
	57	\| PPC_OPCODE_RFMCI);
661bd698 AM	58	else if (info->disassembler_options
661bd698 AM	59	&& strstr (info->disassembler_options, "efs") != NULL)
4eb30afc	60	dialect \|= PPC_OPCODE_EFS;
36ae0db3 DJ	61	else if (info->disassembler_options
	62	&& strstr (info->disassembler_options, "e300") != NULL)
	63	dialect \|= PPC_OPCODE_E300 \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_COMMON;
64a3a6fc NC	64	else if (info->disassembler_options
	65	&& strstr (info->disassembler_options, "440") != NULL)
	66	dialect \|= PPC_OPCODE_BOOKE \| PPC_OPCODE_32
	67	\| PPC_OPCODE_440 \| PPC_OPCODE_ISEL \| PPC_OPCODE_RFMCI;
23976049	68	else
9ec878e3	69	dialect \|= (PPC_OPCODE_403 \| PPC_OPCODE_601 \| PPC_OPCODE_CLASSIC
4eb30afc	70	\| PPC_OPCODE_COMMON \| PPC_OPCODE_ALTIVEC);
802a735e	71
94efba12	72	if (info->disassembler_options
661bd698	73	&& strstr (info->disassembler_options, "power4") != NULL)
94efba12 AM	74	dialect \|= PPC_OPCODE_POWER4;
94efba12 AM	75
1ed8e1e4 AM	76	if (info->disassembler_options
	77	&& strstr (info->disassembler_options, "power5") != NULL)
	78	dialect \|= PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5;
	79
ede602d7 AM	80	if (info->disassembler_options
	81	&& strstr (info->disassembler_options, "cell") != NULL)
	82	dialect \|= PPC_OPCODE_POWER4 \| PPC_OPCODE_CELL \| PPC_OPCODE_ALTIVEC;
	83
9622b051 AM	84	if (info->disassembler_options
	85	&& strstr (info->disassembler_options, "power6") != NULL)
	86	dialect \|= PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5 \| PPC_OPCODE_POWER6 \| PPC_OPCODE_ALTIVEC;
	87
661bd698 AM	88	if (info->disassembler_options
	89	&& strstr (info->disassembler_options, "any") != NULL)
	90	dialect \|= PPC_OPCODE_ANY;
	91
802a735e AM	92	if (info->disassembler_options)
	93	{
	94	if (strstr (info->disassembler_options, "32") != NULL)
	95	dialect &= ~PPC_OPCODE_64;
	96	else if (strstr (info->disassembler_options, "64") != NULL)
	97	dialect \|= PPC_OPCODE_64;
	98	}
	99
6edfbbad	100	info->private_data = (char *) 0 + dialect;
418c1742 MG	101	return dialect;
	102	}
	103
	104	/* Print a big endian PowerPC instruction. */
252b5132 RH	105
252b5132 RH	106	int
823bbe9d	107	print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
252b5132	108	{
6edfbbad	109	int dialect = (char ) info->private_data - (char ) 0;
661bd698	110	return print_insn_powerpc (memaddr, info, 1, dialect);
252b5132 RH	111	}
252b5132 RH	112
418c1742	113	/* Print a little endian PowerPC instruction. */
252b5132 RH	114
252b5132 RH	115	int
823bbe9d	116	print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
252b5132	117	{
6edfbbad	118	int dialect = (char ) info->private_data - (char ) 0;
661bd698	119	return print_insn_powerpc (memaddr, info, 0, dialect);
252b5132 RH	120	}
	121
	122	/* Print a POWER (RS/6000) instruction. */
	123
	124	int
823bbe9d	125	print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
252b5132 RH	126	{
	127	return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
	128	}
	129
ea192fa3 PB	130	/* Extract the operand value from the PowerPC or POWER instruction. */
	131
	132	static long
	133	operand_value_powerpc (const struct powerpc_operand *operand,
	134	unsigned long insn, int dialect)
	135	{
	136	long value;
	137	int invalid;
	138	/* Extract the value from the instruction. */
	139	if (operand->extract)
	140	value = (*operand->extract) (insn, dialect, &invalid);
	141	else
	142	{
	143	value = (insn >> operand->shift) & operand->bitm;
	144	if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
	145	{
	146	/* BITM is always some number of zeros followed by some
	147	number of ones, followed by some numer of zeros. */
	148	unsigned long top = operand->bitm;
	149	/* top & -top gives the rightmost 1 bit, so this
	150	fills in any trailing zeros. */
	151	top \|= (top & -top) - 1;
	152	top &= ~(top >> 1);
	153	value = (value ^ top) - top;
	154	}
	155	}
	156
	157	return value;
	158	}
	159
	160	/* Determine whether the optional operand(s) should be printed. */
	161
	162	static int
	163	skip_optional_operands (const unsigned char *opindex,
	164	unsigned long insn, int dialect)
	165	{
	166	const struct powerpc_operand *operand;
	167
	168	for (; *opindex != 0; opindex++)
	169	{
	170	operand = &powerpc_operands[*opindex];
	171	if ((operand->flags & PPC_OPERAND_NEXT) != 0
	172	\|\| ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
	173	&& operand_value_powerpc (operand, insn, dialect) != 0))
	174	return 0;
	175	}
	176
	177	return 1;
	178	}
	179
252b5132 RH	180	/* Print a PowerPC or POWER instruction. */
	181
	182	static int
823bbe9d AM	183	print_insn_powerpc (bfd_vma memaddr,
	184	struct disassemble_info *info,
	185	int bigendian,
	186	int dialect)
252b5132 RH	187	{
	188	bfd_byte buffer[4];
	189	int status;
	190	unsigned long insn;
	191	const struct powerpc_opcode *opcode;
	192	const struct powerpc_opcode *opcode_end;
	193	unsigned long op;
	194
661bd698 AM	195	if (dialect == 0)
	196	dialect = powerpc_dialect (info);
	197
252b5132 RH	198	status = (*info->read_memory_func) (memaddr, buffer, 4, info);
	199	if (status != 0)
	200	{
	201	(*info->memory_error_func) (status, memaddr, info);
	202	return -1;
	203	}
	204
	205	if (bigendian)
	206	insn = bfd_getb32 (buffer);
	207	else
	208	insn = bfd_getl32 (buffer);
	209
	210	/* Get the major opcode of the instruction. */
	211	op = PPC_OP (insn);
	212
	213	/* Find the first match in the opcode table. We could speed this up
	214	a bit by doing a binary search on the major opcode. */
	215	opcode_end = powerpc_opcodes + powerpc_num_opcodes;
661bd698	216	again:
252b5132 RH	217	for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
	218	{
	219	unsigned long table_op;
	220	const unsigned char *opindex;
	221	const struct powerpc_operand *operand;
	222	int invalid;
	223	int need_comma;
	224	int need_paren;
ea192fa3	225	int skip_optional;
252b5132 RH	226
	227	table_op = PPC_OP (opcode->opcode);
	228	if (op < table_op)
	229	break;
	230	if (op > table_op)
	231	continue;
	232
	233	if ((insn & opcode->mask) != opcode->opcode
	234	\|\| (opcode->flags & dialect) == 0)
	235	continue;
	236
	237	/* Make two passes over the operands. First see if any of them
	238	have extraction functions, and, if they do, make sure the
	239	instruction is valid. */
	240	invalid = 0;
	241	for (opindex = opcode->operands; *opindex != 0; opindex++)
	242	{
	243	operand = powerpc_operands + *opindex;
	244	if (operand->extract)
802a735e	245	(*operand->extract) (insn, dialect, &invalid);
252b5132 RH	246	}
	247	if (invalid)
	248	continue;
	249
	250	/* The instruction is valid. */
252b5132	251	if (opcode->operands[0] != 0)
fdd12ef3 AM	252	(*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
	253	else
	254	(*info->fprintf_func) (info->stream, "%s", opcode->name);
252b5132 RH	255
	256	/* Now extract and print the operands. */
	257	need_comma = 0;
	258	need_paren = 0;
ea192fa3	259	skip_optional = -1;
252b5132 RH	260	for (opindex = opcode->operands; *opindex != 0; opindex++)
	261	{
	262	long value;
	263
	264	operand = powerpc_operands + *opindex;
	265
	266	/* Operands that are marked FAKE are simply ignored. We
	267	already made sure that the extract function considered
	268	the instruction to be valid. */
	269	if ((operand->flags & PPC_OPERAND_FAKE) != 0)
	270	continue;
	271
ea192fa3 PB	272	/* If all of the optional operands have the value zero,
ea192fa3 PB	273	then don't print any of them. */
65b650b4 AM	274	if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
	275	{
	276	if (skip_optional < 0)
	277	skip_optional = skip_optional_operands (opindex, insn,
	278	dialect);
	279	if (skip_optional)
	280	continue;
	281	}
252b5132	282
ea192fa3 PB	283	value = operand_value_powerpc (operand, insn, dialect);
ea192fa3 PB	284
252b5132 RH	285	if (need_comma)
	286	{
	287	(*info->fprintf_func) (info->stream, ",");
	288	need_comma = 0;
	289	}
	290
	291	/* Print the operand as directed by the flags. */
fdd12ef3 AM	292	if ((operand->flags & PPC_OPERAND_GPR) != 0
fdd12ef3 AM	293	\|\| ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
252b5132 RH	294	(*info->fprintf_func) (info->stream, "r%ld", value);
	295	else if ((operand->flags & PPC_OPERAND_FPR) != 0)
	296	(*info->fprintf_func) (info->stream, "f%ld", value);
786e2c0f C	297	else if ((operand->flags & PPC_OPERAND_VR) != 0)
786e2c0f C	298	(*info->fprintf_func) (info->stream, "v%ld", value);
252b5132 RH	299	else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
	300	(*info->print_address_func) (memaddr + value, info);
	301	else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
	302	(*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
	303	else if ((operand->flags & PPC_OPERAND_CR) == 0
	304	\|\| (dialect & PPC_OPCODE_PPC) == 0)
	305	(*info->fprintf_func) (info->stream, "%ld", value);
	306	else
	307	{
b84bf58a	308	if (operand->bitm == 7)
0fd3a477	309	(*info->fprintf_func) (info->stream, "cr%ld", value);
252b5132 RH	310	else
	311	{
	312	static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
	313	int cr;
	314	int cc;
	315
	316	cr = value >> 2;
	317	if (cr != 0)
8b4fa155	318	(info->fprintf_func) (info->stream, "4cr%d+", cr);
252b5132	319	cc = value & 3;
8b4fa155	320	(*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
252b5132 RH	321	}
	322	}
	323
	324	if (need_paren)
	325	{
	326	(*info->fprintf_func) (info->stream, ")");
	327	need_paren = 0;
	328	}
	329
	330	if ((operand->flags & PPC_OPERAND_PARENS) == 0)
	331	need_comma = 1;
	332	else
	333	{
	334	(*info->fprintf_func) (info->stream, "(");
	335	need_paren = 1;
	336	}
	337	}
	338
	339	/* We have found and printed an instruction; return. */
	340	return 4;
	341	}
	342
661bd698 AM	343	if ((dialect & PPC_OPCODE_ANY) != 0)
	344	{
	345	dialect = ~PPC_OPCODE_ANY;
	346	goto again;
	347	}
	348
252b5132 RH	349	/* We could not find a match. */
	350	(*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
	351
	352	return 4;
	353	}
07dd56a9 NC	354
07dd56a9 NC	355	void
823bbe9d	356	print_ppc_disassembler_options (FILE *stream)
07dd56a9 NC	357	{
	358	fprintf (stream, "\n\
	359	The following PPC specific disassembler options are supported for use with\n\
	360	the -M switch:\n");
8b4fa155	361
07dd56a9	362	fprintf (stream, " booke\|booke32\|booke64 Disassemble the BookE instructions\n");
36ae0db3	363	fprintf (stream, " e300 Disassemble the e300 instructions\n");
07dd56a9	364	fprintf (stream, " e500\|e500x2 Disassemble the e500 instructions\n");
64a3a6fc	365	fprintf (stream, " 440 Disassemble the 440 instructions\n");
07dd56a9 NC	366	fprintf (stream, " efs Disassemble the EFS instructions\n");
07dd56a9 NC	367	fprintf (stream, " power4 Disassemble the Power4 instructions\n");
1ed8e1e4	368	fprintf (stream, " power5 Disassemble the Power5 instructions\n");
9622b051	369	fprintf (stream, " power6 Disassemble the Power6 instructions\n");
07dd56a9 NC	370	fprintf (stream, " 32 Do not disassemble 64-bit instructions\n");
	371	fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n");
	372	}