[deliverable/binutils-gdb.git] / opcodes / ppc-dis.c

/* ppc-dis.c -- Disassemble PowerPC instructions
   Copyright 1994, 1995, 2000 Free Software Foundation, Inc.
   Written by Ian Lance Taylor, Cygnus Support

This file is part of GDB, GAS, and the GNU binutils.

GDB, GAS, and the GNU binutils are free software; you can redistribute
them and/or modify them under the terms of the GNU General Public
License as published by the Free Software Foundation; either version
2, or (at your option) any later version.

GDB, GAS, and the GNU binutils are distributed in the hope that they
will be useful, but WITHOUT ANY WARRANTY; without even the implied
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
the GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this file; see the file COPYING.  If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

#include <stdio.h>
#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/ppc.h"

/* This file provides several disassembler functions, all of which use
   the disassembler interface defined in dis-asm.h.  Several functions
   are provided because this file handles disassembly for the PowerPC
   in both big and little endian mode and also for the POWER (RS/6000)
   chip.  */

static int print_insn_powerpc PARAMS ((bfd_vma, struct disassemble_info *,
				       int bigendian, int dialect));

static int powerpc_dialect PARAMS ((struct disassemble_info *));

/* Determine which set of machines to disassemble for.  PPC403/601 or
   BookE.  For convenience, also disassemble instructions supported
   by the AltiVec vector unit.  */

int
powerpc_dialect(info)
     struct disassemble_info *info;
{
  int dialect = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC;

  if (BFD_DEFAULT_TARGET_SIZE == 64)
    dialect |= PPC_OPCODE_64;

  if (info->disassembler_options
      && (strcmp (info->disassembler_options, "booke") == 0
	  || strcmp (info->disassembler_options, "booke32") == 0
	  || strcmp (info->disassembler_options, "booke64") == 0))
    dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
  else 
    dialect |= PPC_OPCODE_403 | PPC_OPCODE_601;

  if (info->disassembler_options)
    {
      if (strstr (info->disassembler_options, "32") != NULL)
	dialect &= ~PPC_OPCODE_64;
      else if (strstr (info->disassembler_options, "64") != NULL)
	dialect |= PPC_OPCODE_64;
    }

  return dialect;
}

/* Print a big endian PowerPC instruction.  */

int
print_insn_big_powerpc (memaddr, info)
     bfd_vma memaddr;
     struct disassemble_info *info;
{
  return print_insn_powerpc (memaddr, info, 1, powerpc_dialect(info));
}

/* Print a little endian PowerPC instruction.  */

int
print_insn_little_powerpc (memaddr, info)
     bfd_vma memaddr;
     struct disassemble_info *info;
{
  return print_insn_powerpc (memaddr, info, 0, powerpc_dialect(info));
}

/* Print a POWER (RS/6000) instruction.  */

int
print_insn_rs6000 (memaddr, info)
     bfd_vma memaddr;
     struct disassemble_info *info;
{
  return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
}

/* Print a PowerPC or POWER instruction.  */

static int
print_insn_powerpc (memaddr, info, bigendian, dialect)
     bfd_vma memaddr;
     struct disassemble_info *info;
     int bigendian;
     int dialect;
{
  bfd_byte buffer[4];
  int status;
  unsigned long insn;
  const struct powerpc_opcode *opcode;
  const struct powerpc_opcode *opcode_end;
  unsigned long op;

  status = (*info->read_memory_func) (memaddr, buffer, 4, info);
  if (status != 0)
    {
      (*info->memory_error_func) (status, memaddr, info);
      return -1;
    }

  if (bigendian)
    insn = bfd_getb32 (buffer);
  else
    insn = bfd_getl32 (buffer);

  /* Get the major opcode of the instruction.  */
  op = PPC_OP (insn);

  /* Find the first match in the opcode table.  We could speed this up
     a bit by doing a binary search on the major opcode.  */
  opcode_end = powerpc_opcodes + powerpc_num_opcodes;
  for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
    {
      unsigned long table_op;
      const unsigned char *opindex;
      const struct powerpc_operand *operand;
      int invalid;
      int need_comma;
      int need_paren;

      table_op = PPC_OP (opcode->opcode);
      if (op < table_op)
	break;
      if (op > table_op)
	continue;

      if ((insn & opcode->mask) != opcode->opcode
	  || (opcode->flags & dialect) == 0)
	continue;

      /* Make two passes over the operands.  First see if any of them
	 have extraction functions, and, if they do, make sure the
	 instruction is valid.  */
      invalid = 0;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
	{
	  operand = powerpc_operands + *opindex;
	  if (operand->extract)
	    (*operand->extract) (insn, dialect, &invalid);
	}
      if (invalid)
	continue;

      /* The instruction is valid.  */
      (*info->fprintf_func) (info->stream, "%s", opcode->name);
      if (opcode->operands[0] != 0)
	(*info->fprintf_func) (info->stream, "\t");

      /* Now extract and print the operands.  */
      need_comma = 0;
      need_paren = 0;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
	{
	  long value;

	  operand = powerpc_operands + *opindex;

	  /* Operands that are marked FAKE are simply ignored.  We
	     already made sure that the extract function considered
	     the instruction to be valid.  */
	  if ((operand->flags & PPC_OPERAND_FAKE) != 0)
	    continue;

	  /* Extract the value from the instruction.  */
	  if (operand->extract)
	    value = (*operand->extract) (insn, dialect, (int *) NULL);
	  else
	    {
	      value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
	      if ((operand->flags & PPC_OPERAND_SIGNED) != 0
		  && (value & (1 << (operand->bits - 1))) != 0)
		value -= 1 << operand->bits;
	    }

	  /* If the operand is optional, and the value is zero, don't
	     print anything.  */
	  if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
	      && (operand->flags & PPC_OPERAND_NEXT) == 0
	      && value == 0)
	    continue;

	  if (need_comma)
	    {
	      (*info->fprintf_func) (info->stream, ",");
	      need_comma = 0;
	    }

	  /* Print the operand as directed by the flags.  */
	  if ((operand->flags & PPC_OPERAND_GPR) != 0)
	    (*info->fprintf_func) (info->stream, "r%ld", value);
	  else if ((operand->flags & PPC_OPERAND_FPR) != 0)
	    (*info->fprintf_func) (info->stream, "f%ld", value);
	  else if ((operand->flags & PPC_OPERAND_VR) != 0)
	    (*info->fprintf_func) (info->stream, "v%ld", value);
	  else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
	    (*info->print_address_func) (memaddr + value, info);
	  else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
	    (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
	  else if ((operand->flags & PPC_OPERAND_CR) == 0
		   || (dialect & PPC_OPCODE_PPC) == 0)
	    (*info->fprintf_func) (info->stream, "%ld", value);
	  else
	    {
	      if (operand->bits == 3)
		(*info->fprintf_func) (info->stream, "cr%d", value);
	      else
		{
		  static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
		  int cr;
		  int cc;

		  cr = value >> 2;
		  if (cr != 0)
		    (*info->fprintf_func) (info->stream, "4*cr%d", cr);
		  cc = value & 3;
		  if (cc != 0)
		    {
		      if (cr != 0)
			(*info->fprintf_func) (info->stream, "+");
		      (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
		    }
		}
	    }

	  if (need_paren)
	    {
	      (*info->fprintf_func) (info->stream, ")");
	      need_paren = 0;
	    }

	  if ((operand->flags & PPC_OPERAND_PARENS) == 0)
	    need_comma = 1;
	  else
	    {
	      (*info->fprintf_func) (info->stream, "(");
	      need_paren = 1;
	    }
	}

      /* We have found and printed an instruction; return.  */
      return 4;
    }

  /* We could not find a match.  */
  (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);

  return 4;
}
Commit	Line	Data
252b5132	1	/* ppc-dis.c -- Disassemble PowerPC instructions
060d22b0	2	Copyright 1994, 1995, 2000 Free Software Foundation, Inc.
252b5132 RH	3	Written by Ian Lance Taylor, Cygnus Support
	4
	5	This file is part of GDB, GAS, and the GNU binutils.
	6
	7	GDB, GAS, and the GNU binutils are free software; you can redistribute
	8	them and/or modify them under the terms of the GNU General Public
	9	License as published by the Free Software Foundation; either version
	10	2, or (at your option) any later version.
	11
	12	GDB, GAS, and the GNU binutils are distributed in the hope that they
	13	will be useful, but WITHOUT ANY WARRANTY; without even the implied
	14	warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
	15	the GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with this file; see the file COPYING. If not, write to the Free
	19	Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	20
	21	#include <stdio.h>
252b5132 RH	22	#include "sysdep.h"
	23	#include "dis-asm.h"
	24	#include "opcode/ppc.h"
	25
	26	/* This file provides several disassembler functions, all of which use
	27	the disassembler interface defined in dis-asm.h. Several functions
	28	are provided because this file handles disassembly for the PowerPC
	29	in both big and little endian mode and also for the POWER (RS/6000)
	30	chip. */
	31
	32	static int print_insn_powerpc PARAMS ((bfd_vma, struct disassemble_info *,
	33	int bigendian, int dialect));
	34
418c1742 MG	35	static int powerpc_dialect PARAMS ((struct disassemble_info *));
	36
	37	/* Determine which set of machines to disassemble for. PPC403/601 or
9a0ccb24 MG	38	BookE. For convenience, also disassemble instructions supported
9a0ccb24 MG	39	by the AltiVec vector unit. */
418c1742 MG	40
	41	int
	42	powerpc_dialect(info)
	43	struct disassemble_info *info;
	44	{
	45	int dialect = PPC_OPCODE_PPC \| PPC_OPCODE_ALTIVEC;
	46
802a735e AM	47	if (BFD_DEFAULT_TARGET_SIZE == 64)
	48	dialect \|= PPC_OPCODE_64;
	49
	50	if (info->disassembler_options
	51	&& (strcmp (info->disassembler_options, "booke") == 0
	52	\|\| strcmp (info->disassembler_options, "booke32") == 0
	53	\|\| strcmp (info->disassembler_options, "booke64") == 0))
418c1742 MG	54	dialect \|= PPC_OPCODE_BOOKE \| PPC_OPCODE_BOOKE64;
	55	else
	56	dialect \|= PPC_OPCODE_403 \| PPC_OPCODE_601;
802a735e AM	57
	58	if (info->disassembler_options)
	59	{
	60	if (strstr (info->disassembler_options, "32") != NULL)
	61	dialect &= ~PPC_OPCODE_64;
	62	else if (strstr (info->disassembler_options, "64") != NULL)
	63	dialect \|= PPC_OPCODE_64;
	64	}
	65
418c1742 MG	66	return dialect;
	67	}
	68
	69	/* Print a big endian PowerPC instruction. */
252b5132 RH	70
	71	int
	72	print_insn_big_powerpc (memaddr, info)
	73	bfd_vma memaddr;
	74	struct disassemble_info *info;
	75	{
418c1742	76	return print_insn_powerpc (memaddr, info, 1, powerpc_dialect(info));
252b5132 RH	77	}
252b5132 RH	78
418c1742	79	/* Print a little endian PowerPC instruction. */
252b5132 RH	80
	81	int
	82	print_insn_little_powerpc (memaddr, info)
	83	bfd_vma memaddr;
	84	struct disassemble_info *info;
	85	{
418c1742	86	return print_insn_powerpc (memaddr, info, 0, powerpc_dialect(info));
252b5132 RH	87	}
	88
	89	/* Print a POWER (RS/6000) instruction. */
	90
	91	int
	92	print_insn_rs6000 (memaddr, info)
	93	bfd_vma memaddr;
	94	struct disassemble_info *info;
	95	{
	96	return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
	97	}
	98
	99	/* Print a PowerPC or POWER instruction. */
	100
	101	static int
	102	print_insn_powerpc (memaddr, info, bigendian, dialect)
	103	bfd_vma memaddr;
	104	struct disassemble_info *info;
	105	int bigendian;
	106	int dialect;
	107	{
	108	bfd_byte buffer[4];
	109	int status;
	110	unsigned long insn;
	111	const struct powerpc_opcode *opcode;
	112	const struct powerpc_opcode *opcode_end;
	113	unsigned long op;
	114
	115	status = (*info->read_memory_func) (memaddr, buffer, 4, info);
	116	if (status != 0)
	117	{
	118	(*info->memory_error_func) (status, memaddr, info);
	119	return -1;
	120	}
	121
	122	if (bigendian)
	123	insn = bfd_getb32 (buffer);
	124	else
	125	insn = bfd_getl32 (buffer);
	126
	127	/* Get the major opcode of the instruction. */
	128	op = PPC_OP (insn);
	129
	130	/* Find the first match in the opcode table. We could speed this up
	131	a bit by doing a binary search on the major opcode. */
	132	opcode_end = powerpc_opcodes + powerpc_num_opcodes;
	133	for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
	134	{
	135	unsigned long table_op;
	136	const unsigned char *opindex;
	137	const struct powerpc_operand *operand;
	138	int invalid;
	139	int need_comma;
	140	int need_paren;
	141
	142	table_op = PPC_OP (opcode->opcode);
	143	if (op < table_op)
	144	break;
	145	if (op > table_op)
	146	continue;
	147
	148	if ((insn & opcode->mask) != opcode->opcode
	149	\|\| (opcode->flags & dialect) == 0)
	150	continue;
151
152	/* Make two passes over the operands. First see if any of them
153	have extraction functions, and, if they do, make sure the
154	instruction is valid. */
155	invalid = 0;
156	for (opindex = opcode->operands; *opindex != 0; opindex++)
157	{
158	operand = powerpc_operands + *opindex;
159	if (operand->extract)
802a735e	160	(*operand->extract) (insn, dialect, &invalid);
252b5132 RH	161	}
	162	if (invalid)
	163	continue;
	164
	165	/* The instruction is valid. */
	166	(*info->fprintf_func) (info->stream, "%s", opcode->name);
	167	if (opcode->operands[0] != 0)
	168	(*info->fprintf_func) (info->stream, "\t");
	169
	170	/* Now extract and print the operands. */
	171	need_comma = 0;
	172	need_paren = 0;
	173	for (opindex = opcode->operands; *opindex != 0; opindex++)
	174	{
	175	long value;
	176
	177	operand = powerpc_operands + *opindex;
	178
	179	/* Operands that are marked FAKE are simply ignored. We
	180	already made sure that the extract function considered
	181	the instruction to be valid. */
	182	if ((operand->flags & PPC_OPERAND_FAKE) != 0)
	183	continue;
	184
	185	/* Extract the value from the instruction. */
	186	if (operand->extract)
802a735e	187	value = (operand->extract) (insn, dialect, (int ) NULL);
252b5132 RH	188	else
	189	{
	190	value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
	191	if ((operand->flags & PPC_OPERAND_SIGNED) != 0
	192	&& (value & (1 << (operand->bits - 1))) != 0)
	193	value -= 1 << operand->bits;
	194	}
	195
	196	/* If the operand is optional, and the value is zero, don't
	197	print anything. */
	198	if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
	199	&& (operand->flags & PPC_OPERAND_NEXT) == 0
	200	&& value == 0)
	201	continue;
	202
	203	if (need_comma)
	204	{
	205	(*info->fprintf_func) (info->stream, ",");
	206	need_comma = 0;
	207	}
	208
	209	/* Print the operand as directed by the flags. */
	210	if ((operand->flags & PPC_OPERAND_GPR) != 0)
	211	(*info->fprintf_func) (info->stream, "r%ld", value);
	212	else if ((operand->flags & PPC_OPERAND_FPR) != 0)
	213	(*info->fprintf_func) (info->stream, "f%ld", value);
786e2c0f C	214	else if ((operand->flags & PPC_OPERAND_VR) != 0)
786e2c0f C	215	(*info->fprintf_func) (info->stream, "v%ld", value);
252b5132 RH	216	else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
	217	(*info->print_address_func) (memaddr + value, info);
	218	else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
	219	(*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
	220	else if ((operand->flags & PPC_OPERAND_CR) == 0
	221	\|\| (dialect & PPC_OPCODE_PPC) == 0)
	222	(*info->fprintf_func) (info->stream, "%ld", value);
	223	else
	224	{
	225	if (operand->bits == 3)
	226	(*info->fprintf_func) (info->stream, "cr%d", value);
	227	else
	228	{
	229	static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
	230	int cr;
	231	int cc;
	232
	233	cr = value >> 2;
	234	if (cr != 0)
	235	(info->fprintf_func) (info->stream, "4cr%d", cr);
	236	cc = value & 3;
	237	if (cc != 0)
	238	{
	239	if (cr != 0)
	240	(*info->fprintf_func) (info->stream, "+");
	241	(*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
	242	}
	243	}
	244	}
	245
	246	if (need_paren)
	247	{
	248	(*info->fprintf_func) (info->stream, ")");
	249	need_paren = 0;
	250	}
	251
	252	if ((operand->flags & PPC_OPERAND_PARENS) == 0)
	253	need_comma = 1;
	254	else
	255	{
	256	(*info->fprintf_func) (info->stream, "(");
	257	need_paren = 1;
	258	}
	259	}
	260
	261	/* We have found and printed an instruction; return. */
	262	return 4;
	263	}
	264
	265	/* We could not find a match. */
	266	(*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
	267
	268	return 4;
	269	}